Design World / EE Network Power Electronics Handbook 2016

2016

Designing with permanent magnets Page 14

Teardown: What’s inside an electric toothbrush Page 08

POWER ELECTRONICS HANDBOOK

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Power Electronics

Leland Teschler Executive Editor @DW_LeeTeschler

Fear of

MAGNETICS DOES IT REALLY TAKE A VOODOO PRACTITIONER TO DESIGN A SWITCHING POWER SUPPLY? You might think so judging by the “black art” label that’s often applied to this aspect of power electronics. The reputation for witchcraft here comes in large part from the role magnetic materials play in getting such circuits to work properly. The problem: Seemingly, few people understand how magnetic cores really work, let alone how to design circuits that use them effectively.

“The misconceptions and misunderstandings about magnetics are immense both in universities and in industry,” said Dr. Ray Ridley, an expert in magnetic design practices. He said one problem with circuits involving magnetics is that they don’t lend themselves to neat analytical solutions. “They don’t fit in a modern spreadsheet simulation or CAD solution box. People want something that is canned that they can pick up without doing anything extra. Magnetic circuits aren’t like that.”

One reason magnetics don’t lend themselves to straightforward analysis is that there are no standards for expressing the properties of magnetic materials.

“Two different vendors of similar materials will present data in two different ways.

You can’t just put the material properties on a spreadsheet and then figure how the core losses vary with frequency, temperature and duty cycle. There is no single way of doing that right now,” said Ridley.

This lack of standards thwarts teaching methods in universities that tend to gravitate toward neat, codified solutions. “Academics like to go solely with equations. They make the mistake of trying to find one that works for everybody.

They are chasing something that can’t be done,” Ridley said. “In industry, people who actually do magnetics design well don’t approach it with such complicated methods, but with a heavy dose of practicality.”

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Another difficulty with depending too heavily on a mathematical approach is that it tends to foster a fear factor when it comes to designing real magnetics. “It all seems to start in the first circuits theory course,” Ridley said. “When you draw a schematic, you put in lines showing where currents go and where voltages appear. But when you put a magnetic field in there, the lines go all over the place.

You can’t capture that in your schematic. It is inconvenient from the teaching point of view.”

Making the problem worse is that most university courses on circuits spend little time discussing magnetic components.

“I recently looked at the notes for a major university’s circuit theory course. They spent 20 minutes on the workings of capacitors, five on inductors, and zero time on transformers,” said Ridley. “So there is a massive hole in terms of what universities could be teaching. Perhaps 5% of engineers will learn these things by osmosis in industry.

But it appears as though few universities are providing a good practical education on about how to approach magnetic design problems.”

This lack of educational resources is one reason Ridley is on the agenda for the upcoming APEC Applied Power Electronics Conference in Long Beach.

He’s teaching a short course on the difficulties of modeling transformers. He’s also chairing a plenary session and an industry session on how to grapple with magnetic core losses at the higher switching frequencies at which state-of-the-art supplies now operate.

Judging by the complexities of magnetic design, his sessions will probably be well attended. powerelectronictips.com | designworldonline.com

2/23/16 1:23 PM

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2/23/16 12:36 PM

CONTENTS

8 02 08

14

20

4

Fear of Magnetics

Does it really take a voodoo practitioner to design a switching power supply?

Teardown: What’s inside a Phillips Sonicare electric toothbrush

26

It can be tricky to correctly specify magnetic materials for power circuits and actuators. An understanding of definitions and common properties serves as a good starting point.

GaN components boost power density in supplies To understand why gallium-nitride components shrink the size of power supplies, examine how they dissipate energy at high frequencies.

DESIGN WORLD

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2016

Test instruments help tame power factor and signal integrity

Harmonic analysis helps design electronics that will behave well on the power grid.

30

A novel ac rectification and coildriving scheme may characterize the electronics found in this widely used oral hygiene instrument.

Basics of designing with permanent magnets

48

A close look at the Level VI power supply spec

48

52

DOE power supply efficiency specifications target a broader array of power supplies to save energy and reduce greenhousegas emissions.

36

42

Multiple charging modes from a single amplifier Though there are two standards for charging appliances wirelessly, a single circuit can be devised to serve as a charging node for both of them.

58 How and when MOSFETs blow up High temperatures and operating conditions outside the safe operating area can sabotage MOSFETs used in switching circuits.

Measuring wireless charging efficiency in the real world

When it comes to energy efficiency, there are significant differences in competing wireless charging methods.

58

Digital inrush current controller reference design

A reference design shows how to control current inrush in ac-to-dc rectifiers.

Compensating for temperature in high-frequency rectifier diodes

Over-temperature can be a problem in high-performance switching supplies. New power rectifier diodes build in safeguards to head off heat build-up. www.powerelectronictips.com

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Power Electronics

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www.powerelectronictips.com

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Power Electronics

Teardown: What’s inside a Phillips Sonicare electric toothbrush LELAND TESCHLER Executive Editor

A novel ac rectification and coil-driving scheme may characterize the electronics found in this widely used oral hygiene instrument.

T

he Philips Sonicare Elite series toothbrush is billed as generating over 31,000 brush strokes per minute thanks to “sonic motion” driving its brush. A teardown reveals what Philips is talking about in its marketing material: The brush head drive involves torsion bars positioned electromagnetically rather than by an electric motor.

Cut through the plastic handle of the Philips device and you’ll see a plastic frame holding a battery—a nickel-cadmium 1.2-V unit from Sanyo—the pickup coil in the base, which is used for inductive charging, and a massive electromagnet on an E-shaped frame. This electromagnet is used to move the brush head back and forth to get the brushing movement. The circuit board that contains the electronics solders onto this frame with seven pins making connections for the pickup coil, the battery and the brush-head drive coil.

Like most electric toothbrushes these days, the Philips Sonicare Elite employs wireless charging while it sits in a charging unit that doubles as a holder for the toothbrush. When we park the toothbrush in the holder and put a scope on the inductive pickup coil, we get a waveform that turns out to be at a frequency of about 100 kHz. So the base unit is generating a 100-kHz signal and the brush unit picks it up.

The base unit evidently contains a frequency converter that ups the mains frequency from 60 Hz to 100 kHz. Unfortunately, we couldn’t see the details of this circuitry because the base unit electronics are potted in some kind of epoxy.

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On the toothbrush itself, the charging circuit is interesting in that there is extremely little to it. One can find teardowns of other brands of electric toothbrushes on the web that reveal what might be called conventional rectifier components: rectifier diodes and a capacitor or two for filtering, used to rectify the ac signal picked up by the charge coil into a dc signal that then goes to the rest of the components on the board.

But that’s not at all what goes on in the Philips Sonicare brush.

Following the tiny traces on the circuit board in the handle shows that the pickup coil connects directly to a 24-pin chip. The chip doesn’t carry markings for any kind of commercially available device, so its functions can only be discerned by examining its connections.

Chip markings indicate the IC comes from ams, or Austriamicrosystems.

There are no intervening components for rectification (or for anything else) between the wireless charging coil and this 24-pin IC, so the only conclusion can be that the chip does the rectifying.

But that’s not all it does. An examination of its connections shows it probably also contains an 8-bit processor. ams doesn’t make a processor chip, let alone one that contains some kind of ac rectifier. So we must conclude this is an ASIC of some kind that ams did for Philips.

Teardowns of other electric toothbrush brands have found 4-bit, rather than 8-bit, processors handling the brush controls. But we counted what seem to be

powerelectronictips.com | designworldonline.com

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Power Electronics

10 I/O lines on the ams chip that would seem to indicate the use of at least an 8-bit controller: The board contains two momentary contact switches. One is a main turn-on switch, the other changes the speed of the brush if the operator desires. The ams processor chip has an input from both of them. Six pin connections go to six LEDs on the board that show the state of battery charging. Two more of the IC’s pins go to another chip that basically drives the brush back and forth, for a total of 10 outputs. Our guess: It is easier to manage 10 I/O connections with an 8-bit processor rather than a 4-bit device.

One thing is for sure: Regardless of its processing abilities, the ams chip is a clocked device.

The presence of a crystal oscillator (again, with non-standard markings) on the backside of the board is a dead giveaway that we have a clocked circuit here.

POWER CONVERSION The lack of markings on the ams chip makes the toothbrush charging scheme somewhat of a mystery.

But there is a clue on the board in the form of five capacitors. It

The Sonicare PCB attached to the plastic frame with seven solder connections: two for the wireless charging coil, three for the electromagnet coils on the E frame, and two for the nickelcadmium battery.

looks as though a couple of these capacitors might be part of the clock oscillator. But the other three don’t seem to have any function other than perhaps to work in the rectifier circuit somehow. Also, there are no inductors on the circuit board.

One ac-to-dc rectification scheme that uses capacitors only, no inductors, is a charge pump. It basically employs a network of diodes and charging or discharging capacitors to change an ac signal to a dc voltage. While the ac signal is positive, current flows through diodes and charges capacitors.

When the ac signal goes negative, the diodes don’t conduct and the capacitors discharge. Multiple stages can be stacked to get better rectification.

The components found on the board are consistent with this

approach. So it is plausible that this toothbrush uses some kind of a simple charge pump to get dc that charges up the battery.

Also, a look at the specs for the Sanyo battery reveals it slowcharges at 150 mA in about 16 hours. The Sonicare manual says the brush takes 24 hours to fully charge, so the charge current may be below 150 mA. That seems to be well within the level that an ASIC this size should be able to handle.

Perhaps the most interesting part of the circuit comes into play when the brush moves back and forth. With a push of the on/off switch, the processor turns on a circuit that generates an oscillating electric field. This happens using another chip, a Toshiba dual n-channel MOSFET. An output from the ams chip goes to the gate of

The crystal clock oscillator was the sole component residing on the back of the PCB.

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powerelectronictips.com | designworldonline.com

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Power Electronics

The base unit for the toothbrush had its electronics potted in the epoxy visible here; so there wasn’t much to see or analyze.

each MOSFET. Each MOSFET output ties to one end of a coil driving the brush. There is a center tap on the coil that connects directly to the positive terminal of the battery.

So in operation, the processor drives one side of the coil, then the other, to generate an alternating magnetic field that vibrates the brush back and forth. We were unable to measure the frequency of that oscillating field, but one of the original patents for electric toothbrushes available online said it is in the range of 250 Hz.

The brush oscillation circuit contains two diodes. (We initially thought these had something to do with rectifying the 100-kHz charging waveform until we mapped out

all the PCB traces.) These diodes are there to bleed off the inductive kick that arises when suddenly switching on big coils. The same kind of diodes can be found to reduce inductive kicks on circuits that switch electromechanical relays. Without the diodes, there’s a risk of destroying the MOSFETs. Completing the connection to the MOSFETs are two resistors serving as pull-down resistors for the MOSFET gates.

The oscillating field that appears at the end of the E-shaped frame interacts with the bottom of the brush head. And on the bottom of the brush head are two magnets, and they appear to be pretty strong magnets at that. We have no way of quantifying their magnetic fields, but they act as though they might be of the rare earth variety. This

Based on the components found on the PCB, one possibility is that the ac rectification scheme on the Sonicare toothbrush might be something along the lines of a simple charge pump, as depicted here.

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The schematic for the connections we found on the PCB for the ams chip look like this; quite simple indeed.

The drive circuit for the brush head centers on a Toshiba n-channel MOSFET chip. It includes two kickback diodes and two pull-up resistors.

powerelectronictips.com | designworldonline.com

2/24/16 11:20 AM

TOOTHBRUSH TEARDOWN

Prominent on the PCB for the Sonicare brush are the two ICs from ams and Toshiba, five capacitors that seem to be part of the clock oscillator and rectifier, two momentary switches, two kick-back diodes and pull-up resistors, and the six LEDs serving as charge indicators. The clock oscillator mounts on the back.

might also help explain why replacement brush heads for the Sonicare Elite series go for about $8 a piece or more as of this writing.

As the field changes, it basically pushes the magnets back and forth. The magnets in turn connect to the brush through three torsion bars which transmit the magnet motion to the brush itself.

And after a couple minutes of this 250-Hz oscillating action, the brush user has clean teeth.

Torsion bars

REFERENCES Austriamicrosystems (ams) ams.com/eng Acoustic toothbrush patent: A lot of the circuit details on the Philips toothbrush resemble those described in this patent: google.com/patents/US20020092104.

Philips USA usa.philips.com/c-m/consumer-products

powerelectronictips.com | designworldonline.com

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Brushhead magnets Two strong magnets sit on the end of three torsion bars in the replaceable brush head. The magnets are positioned on the end of the E frame and are oscillated back and forth by the electric field.

2 • 2016

DESIGN WORLD — EE Network

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Power Electronics

Basics of designing with permanent magnets STAN TROUT Owner/Metallurgist Spontaneous Materials

It can be tricky to correctly specify magnetic materials for power circuits and actuators. An understanding of definitions and common properties serves as a good starting point.

T

hough magnetic materials are widely used in power components, engineers frequently have misunderstandings about their magnetic properties. For example, the energy product (BH)max is the most frequently used permanent magnet property, but probably the least understood. And most engineers do not learn much about permanent magnets in school. Likely they will learn a few bits of jargon, like units and parameters, but will never really master the subtle points. So it can be overwhelming the first time an engineer becomes involved in a project involving a permanent magnet.

The three vectors describing magnet performance are related to each other and the relationships take different forms in different unit systems.

14

Commonly used units for permanent magnets Quantity

Symbol

CGS Unit

SI Unit

Conversions

Magnetic Induction

B

Gauss (G)

Tesla (T)

1 T = 104 G = 10 kG 1 G = 10-4 T

Magnetic Field

H

Oersted (Oe)

Ampere/meter (A/m)

1 A/m = 4π × 10-3 Oe 1 Oe = 79.58 A/m

Magnetization

4πM (CGS) M (SI) µ0M (SI)

Gauss (G)

Ampere/meter (A/m) Tesla (T)

1 G = 79.58 A/m 1 A/m = 4π × 10-3 G 1 T = 104 G = 10 kG 1 G = 10-4 T

Energy Product

(BH)max

DESIGN WORLD — EE Network

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People designing with magnets frequently get surprised by several subtle points. These include magnet temperature characteristics, testing and the interactive nature of magnetic design; any single change has consequences elsewhere. It usually takes most engineers several tries before they feel comfortable designing with magnets. And it is quite common for designers to start the process by looking back at the last design for guidance, rather than starting from scratch.

Some magnetic materials are more difficult to design with than others. Alnico magnets, for example, are an

2016

Gauss-Oersted Joule/meter3 (G-Oe) (J/m3)

1 J/m3 = 40π G ∙ Oe = 125.7 G ∙ Oe 1 G ∙ Oe = 7.958 × 10-3 J/m3

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Major hysteresis loop, M vs. H

odd material compared to ferrite, samarium-cobalt or neodymium-ironboron. Because alnico has a relatively low intrinsic coercive field, alnico magnets must be relatively longer to prevent demagnetization. This leads to a geometry that looks long and skinny rather than the traditional short and fat. It also explains why there are few new designs in alnico.

Additionally, it is tough to develop a feel for relative magnetic strength. Mathematics only goes so far in describing magnetic behavior.

As a demonstration, I’ve put ferrite, SmCo and NdFeB of the same size on a steel plate. You can feel the difference in the force as you pull the magnets off the plate. Because the magnets are the same size, it is clear to the observer that the difference they are feeling must be due to the materials itself. This demonstration works well in-person. It is much tougher to visualize these differences rather than experience them.

The bottom line is that magnetic design can be a complicated subject.

But a firm grasp of the basics can help engineers get started on the right track.

THREE VECTORS Most magnetic behavior is characterized in terms of three interrelated vector quantities that either describe what is happening inside the permanent magnet or in the region around it. These quantities are: B, Magnetic induction or flux density. A vector quantity describing the concentration of magnetic flux at a point in space. It is expressed in terms of flux lines per unit of cross-sectional area. This quantity is reported as Gauss in CGS units (centimeter-gram-second) and as Tesla in SI units (Système International d’Unités).

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The major hysteresis loop for magnetic material typically takes on a rectangular shape when plotted with the magnetic field on the X axis and magnetization on Y. Application of a sufficiently large magnetic field saturates the sample in both directions, making the enclosed area as large as possible for the sample in question.

H, Magnetic field. A vector describing the intensity of the magnetic field created by a field source, such as current moving through a wire or a permanent magnet. Correct units for reporting this quantity are Oersted in CGS and Ampere-turn/meter (A/m) in SI. M, Magnetization. A quantity describing the magnetic state of the material, representing the vector sum of individual atomic magnetic moments per unit volume. The magnetic moments arise from unpaired spinning electrons, typically located in the 3d or 4f electron shell of each atom. The CGS unit for M is Gauss and the SI unit for M is A/m.

These three vectors are not independent, they are related. Fundamentally, induction is a combination of magnetization and magnetic field, but the exact relationship is slightly different between the two systems of units. The defining equations are B = H + 4πM or

B = µ0 (H + M)

(CGS)

(1a)

(SI)

(1b)

In CGS units the B and 4πM quantities are given units of Gauss, and H is in Oersteds. But equation (1a) makes it clear that Gauss and Oersteds are dimensionally equivalent. It is not unusual to hear someone refer to the intensity of a magnetic field in Gauss, although strictly speaking, it is not correct. The constant µ0 = 4π x 10–7 Tesla-m/A is called the permeability of free space. It is used only in SI units to relate H and M to B. Occasionally, µ0M = J is reported as a polarization in SI units of Tesla.

Magnetic materials display hysteresis. Hard magnetic materials (for example,

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PERMANENT MAGNETS

Major hysteresis loop B vs. H

Demagnetization curves for a permanent magnet

Hysteresis loops can be plotted with magnetic field on the X axis and flux density on the Y axis. Instead of flattening out at high fields, this curve assumes a fixed and constant positive slope.

Demagnetization curves are constructed by showing the second quadrant of magnetic field versus magnetization and versus flux density plots. This eliminates information that is redundant in the complete hysteresis loops.

permanent magnets) show a large amount of it, and soft magnetic materials show little hysteresis. A word of Greek derivation, hysteresis describes the observation that magnetic materials are highly nonlinear, meaning their response to a stimulus lags behind the applied stimulus in a consistent and repeatable manner, a hysteresis loop. The stimulus in this case is an applied magnetic field and the material’s response is the magnetization or induction.

In typical graphs of hysteresis loops, the X-axis shows the applied magnetic field, H, and the Y-axis shows the magnet’s internal response, the magnetization, M. Starting from the origin,

magnetization rises with increasing field until it hits a maximum, defined as the saturation magnetization, MS. The minimum applied magnetic field necessary for saturation is called HS; it is an important practical parameter, although frequently ignored and difficult to define precisely.

As the field drops to zero, we find much of the magnetization remains, defined as Br, the remanent magnetization. As the applied magnetic field becomes negative, a significant field is necessary to reduce the magnetization to zero, defined as Hci, the intrinsic coercive field. Applying a larger negative field will

The variation of saturation magnetization with temperature in nickel, demonstrating a Curie temperature of 358° C

Typical irreversible loss behavior of a permanent magnet

The temperature qualities of nickel mimic those of most permanent magnets which all have a large saturation magnetization at low temperature. The magnetization falls according to the pattern visible here, finally reaching zero at the Curie

A typical curve for irreversible loss shows how flux loss rises the longer a magnet sees high temperatures. Here the soak temperature was 150° C. The time scale in these plots is typically logarithmic.

temperature Tc. 2016

Magnetics_EE_2016_Power_Vs5.MD.indd 17

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Power Electronics

saturate the sample in the opposite direction, and a symmetric pattern can be seen in the rest of the curve that finally closes back on itself again in the first quadrant.

The loop in plots of hysteresis is called a major hysteresis loop because sufficient magnetic field is applied to saturate the sample in both directions, making the enclosed area as large as possible for the sample in question. Applying a larger maximum field will not affect the enclosed area of the loop, nor does it yield any additional information about the sample. Any data supplied about magnetic materials should be based on a major hysteresis loop, unless clearly stated otherwise.

Applying a smaller maximum field, one that does not fully saturate the sample, yields a minor hysteresis loop.

Typically, minor loops should be avoided for permanent magnets, as the size and features of a minor loop depend heavily on the maximum field supplied and not solely on the magnetic properties of the sample.

Hysteresis loops can alternatively be drawn with flux density, B, which is the externally available magnetic flux, plotted against the applied magnetic field. Instead of flattening out at high fields, this curve assumes a fixed and constant positive slope. The remanent magnetization, Br happens at the same place, but the field to reduce the flux density to zero, Hc, is less than Hci. The B versus H curve also gives the energy product, (BH)max, which is the largest product of B × H in the second quadrant. (This entity represents the area of the rectangles traced out in B-H major hysteresis loops and demagnetization curves.)

There is substantial redundancy in showing the complete hysteresis loop. The main interest is when the

applied magnetic field is in the opposite direction of the magnetization or induction. So the standard convention in the permanent magnet industry is to show just the second quadrant of both curves together. The resulting graphs are called demagnetization curves.

Assuming ideal behavior—meaning no drop in magnetization once a sample is saturated—all the following equations are true as equalities. When real cases are considered, the greater than (>) applies.

4πMs π Br

(CGS)

(2a)

µ0Ms ≥ Br

(SI)

(2b)

Br ≥ Hc

(CGS)

(3a)

Br ≥ µ0Hc

(SI)

(3b)

Hci ≥ Hc

(CGS and SI)

(4)

(Br /2) ≥ (BH)max

(CGS)

(5a)

(Br /2) ≥ µ0(BH)max

(SI)

(5b)

2 2

TEMPERATURE AND MAGNETS Permanent magnets are sensitive to temperature in several ways. We will consider three.

The first thermal quality to consider is the Curie temperature. Like nickel, most permanent magnets have a large saturation magnetization at low temperature. The magnetization begins to fall rapidly at higher temperatures, finally reaching zero at the Curie temperature Tc. Therefore, Tc is always worthy of note, but there are other thermal considerations that should be considered as well.

Because of the behavior of magnetization over temperature, there are small and reversible changes

Typical properties—The four families of permanent magnets

18

Ferrite

Alnico

PROPERTY

CERAMIC 8

ALNICO 5

REC-20

REC-26

MQ1-B

NMX-42BH

Br (kG)

4.0

12.5

9.0

10.5

6.9

13.1

≥ (%/αC)

-0.18

-0.02

-0.05

-0.03

-0.105

-0.11

(BH)max MGOe

3.8

5.5

20

26

10

42

Hci (kOe)

3.3

0.64

20+

10+

9

14

β (%/°C)

+0.4

-0.015

-0.3

-0.3

-0.4

-0.6

Hs (kOe)

10

3

20

30

35

25

Tc (°C)

450

890

727

825

360

310

Electrical conductivity

Poor

Good

Good

Good

Fair

Good

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SmCo

NdFeB

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PERMANENT MAGNETS

A plot of magnetic strength over time, from Spontaneous Materials, reveals why rare-earth magnets have become widely used. But each magnetic material has its own set of design issues.

in the magnetic parameters around room temperature. These variations are quantified in two temperature coefficients, α and β, which report the behavior of Br and Hci, respectively, the second thermal qualities to consider. The defining equations for these two parameters are:

α=

1 ΔBr Br ΔT

1 ΔHci β= Hci ΔT

To design a magnet application correctly, a temperature range should be given along with the reported values of α and β, for instance, 20 to 150° C. These are also called reversible temperature coefficients because these effects are completely reversed when the magnets are returned to room temperature.

The third and most conceptually difficult thermal quality is called irreversible loss, which arises when a magnet sees elevated temperatures for an extended period of time. In other words, one might see a flux loss of a few percent when a disc-shaped magnet with L/D = 0.5 is held at 150° C for a few hours. Unlike reversible loss, this loss is not reversed by returning the sample to room temperature.

However, all the magnetic flux can be recovered by remagnetizing the part. In

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practice, remagnetization may not always be practical, so the losses are irreversible in this context.

Note that the time scale in a typical irreversible loss plot is logarithmic. The exact loss observed depends on the time, temperature and shape of the sample.

Usually, the losses flatten out over time, so this is a stable situation. Irreversible loss is commonly observed in rare earth magnets and should be considered in the design process.

FAMILIES OF PERMANENT MAGNETS There are four major permanent magnet materials. Each material has at least one compelling reason to maintain its commercial interest.

Ferrite magnets cost the least in terms of dollars-per-kilogram of material, but they have the weakest magnetic properties, and Hci drops as the temperature decreases.

Alnico magnets have the lowest temperature coefficient of Br and the highest maximum operating temperature, but they have the lowest Hci. This latter property makes them easy to magnetize, but also prone to demagnetization.

2 • 2016

Samarium-cobalt magnets, both the SmCo5 and the Sm2Tm17 (where Tm is a combination of transition metals: typically Co, Fe, Cu and Zr or Hf) compositions, have exceptionally high Hci values and a relatively low temperature coefficient of Br, but the combined high cost of both samarium and cobalt makes these the most expensive magnets in use today.

Neodymium-iron-boron magnets come in bonded and sintered forms. Sintered neodymium magnets offer the highest (BH)max, while bonded magnets offer more design flexibility. Corrosion resistance and maximum operating temperature have been long- standing objections, but generally overcome with appropriate coatings and an understanding of the thermal properties of NdFeB, when designing a new device.

All in all, an understanding of the basics of magnetic materials begins with understanding their hysteresis loops and the basic permanent magnet parameters, for example, Br, Hci and (BH)max. Each type of permanent magnet material offers one or more reasons to consider it for use. The obligation of design engineers is to understand these reasons and the application under consideration to make good material selections.

REFERENCES Spontaneous Materials spontaneousmaterials.com The International System of Units (SI) NIST Special Publication 330 (2008) Barry N. Taylor and Ambler Thompson, Editors.

R. B. Goldfarb and F. R. Fickett, U.S. Department of Commerce, National Bureau of Standards, Boulder, CO, March 1985, NBS Special Publication 696.

Rainer Hilzinger and Werner Rodewald, Magnetics Materials, Vacuumschmelze 2013 pp. 134-135, Publicis Publishing, ISBN 978-3-89578-352-4.

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Power Electronics

GaN components boost power density in supplies ERIC PERSSON Infineon Technologies

To understand why gallium-nitride components shrink the size of power supplies, examine how they dissipate energy at high frequencies.

S

ilicon power FETs have come a long way over the past 35 years. Modern high-voltage superjunction FETs have developed over the past 15 years to even exceed what was thought to be the “theoretical limit of performance” for silicon.

As a result, power supplies have become more efficient, with many suppliers offering 96% peak efficiency today. Power density has benefited as well.

Today’s high- performance server power supplies have power densities of 40 W/in.3 or better.

Yet the industry goal is to significantly boost this power density for the future. You might wonder how this can be accomplished.

First, it is important to look at what is limiting density right now. Many power supply functions occupy a relatively fixed volume for given power

supply requirements. For example, the size of the dc bus capacitor is typically dictated by the holduptime requirement. But the EMI (electromagnetic interference) filters, PFC (power factor correction) and dc-to-dc stages, along with their thermal management, represent more than half the power supply volume. These functions can potentially be much smaller if the operating frequency can significantly rise without the corresponding penalty of increased switching loss.

So, why not simply increase the operating frequency of existing power supply topologies to improve the density? Often, the limiting factor is the power semiconductors in both the PFC and dc-to-dc circuits. These power transistors and rectifiers operate in switching modes that have

Typical power supply volume contribution by section % of Total Volume Power Supply Section

20

25%

Input—connector, EMI filter, Inrush limiter, protection network

22%

DC bus capacitors—energy storage for holdup time

10%

Thermal management—heatsinks, fans

10%

Bias power supply

15%

PFC stage

18%

DC-DC stage and O-ring FETs

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2016

A review of typical volumes occupied by the main functions in a modern 40 W/in.3 power supply as a percentage of total volume shows that the volume of some functions don’t change much for given power supply requirements. For example, the size of the dc bus capacitor is typically dictated by the holduptime requirement. But the EMI filters, PFC and dc-dc stages along with thermal management—which represents more than half of the entire power supply volume—can become much smaller if the operating frequency can rise without incurring more switching loss.

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GaN COMPONENTS

A comparison of a silicon superjunction FET to a GaN HEMT reveals the HEMT is still better in Eoss, but by a much smaller margin than Qoss, where it is 10x better.

Comparing typical parameters of 600-V Superjunction FET versus 600-V GaN HEMT For 55 mΩ nominal Rds(on)

Best superjunction

E mode GaN HEMT

Qg (typ)

68 nC

6 nC

Qoss (typ)

420 nC

44 nC

Eoss (typ)

8 μJ

7 μJ

Qrr (typ)

6,000 nC

0 nC

frequency-dependent switching losses.

Thus, boosting the switching frequency also increases the switching loss in the power semiconductors. This is exactly the opposite of what is needed: If the power supply density is to rise, the losses in the power supply will have to drop.

DENSITY AND EFFICIENCY Many of the common methods of improving efficiency do not necessarily improve power density. In fact, oftentimes the opposite is true. For example, lowering the operating frequency of a power supply reduces the frequency-dependent switching losses. But the lower frequency also necessitates use of bigger magnetics.

Thus the tradeoff: The highest-efficiency power supply will have the lowest density for a given design approach.

But improved efficiency (reduced power loss) is necessary to improve density for two reasons: First, lower losses also correspondingly reduce the size of heat sinks, fans and other thermal management devices.

Moreover, for a given maximum internal temperature limit, the internal power dissipated must drop as the physical volume of the power supply shrinks. Form factors with more optimal surface area/volume ratio can help, but the overall trend is toward less ability to dissipate power as physical volume shrinks.

So efficiency and density are linked: Smaller power supply volume requires a proportional reduction in losses.

It is possible to boost frequency without additional switching loss through use of a different control strategy.

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Regardless of the transistor technology, zero-voltage switching (ZVS) is one key to minimizing switching loss and enabling use of higher frequencies. The majority of power supply topologies are based on the concept of using transistors to switch a voltage source into an inductive load. The goal of ZVS is to use energy stored in the parasitic capacitance of the switching device along with inductor current to losslessly commutate the switch capacitance. This is instead of hard-switching where the transistor forces VSW = VDS (Q1)

IL

t0

commutation and dissipates the energy stored in the device capacitance.

HARD SWITCHING Hard switching is common in the PFC stage of a power supply. Consider a typical boost converter stage consisting of an inductor, diode, bus capacitor and transistor acting as a switch. Also consider the switching waveform at the moment the transistor turns on. Initially, current flowing through the inductor charges the bus capacitor, and the switch node voltage (Vsw) therefore

t2

t1

t3

IL

Reverse Recovery Loss

Crossover Loss

VSW

EOSS Loss

Graphed here is a typical boost converter stage switching waveform at the moment the transistor turns on. At t0- the inductor current flows through the diode into the bus capacitor. The switch node voltage Vsw equals the bus voltage. At t0, Q1 turns on and begins conducting current, ramping up to the inductor current IL at t1. Note that the voltage at the switch node Vsw has not moved yet. If the diode was perfect and there was no reverse-recovery charge, the switch node voltage would begin to move toward zero at t1. But if D1 is a PN junction diode (or the body diode of a synchronous rectifier), the diode cannot immediately stop conducting, so the current in Q1 continues to ramp up, as does the corresponding reverse current in the diode. This continues until t2, when the diode stops conducting. Here, there is a significant reverse-recovery current in addition to the steady-state inductor current, and the transistor Q1 carries the total current while seeing the full bus voltage across its drain-source.

2016

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Power Electronics

PFC CIRCUIT

VSW, IL

Vbus

VSW

t0

VSW

IL

equals the bus voltage. When the switching transistor turns on, it begins conducting current. Transistor current ramps up to the level of the inductor current (IL).

But the voltage at the switch node Vsw initially doesn’t drop. If the diode was perfect and there was no reverse-recovery charge, Vsw would begin to drop toward zero immediately. But if the diode is a PN junction diode (or the body diode of a synchronous rectifier), then it cannot immediately stop conducting, so the current in the transistor continues to ramp up, as does the corresponding reverse current in the diode.

Current continues to ramp up until the diode recovers its ability to block voltage and stops conducting.

At this point, there is a significant reverse-recovery current on top of the steady-state inductor current.

The transistor is supporting the total current while still supporting the full bus voltage across its drain-source.

This leads to the high peak power dissipated in the transistor during the turn-on interval.

The power dissipation, P(t), curve is the product of device current times voltage. It peaks at the same instant as the inductor current. Finally, the current through the transistor discharges the capacitance of the

22

IL

A PFC circuit operated in critical conduction mode can effect soft switching. Here, when the inductor current reaches zero, the equivalent circuit is an LC. The capacitance is the combined output capacitance of the switch plus the parasitic capacitance of the diode and inductor. The initial condition of the circuit is that this capacitance is charged to the bus voltage and at t0 it will resonate and ring down to negative bus voltage. But the switch will clamp it as it crosses zero volts. Q1 can then be turned on to begin the next cycle. Since it turns on when Vds is already zero, there is no turnon loss.

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2016 2016

switch node and drives the voltage to zero, thus dissipating the energy stored in the diode capacitance and the transistor’s own self-capacitance.

To summarize, in a hard-switched turnon, there are three main energy loss mechanisms each cycle: 1. Commutation or crossover loss— proportional to current rise time; faster turn-on means lower loss 2. Reverse recovery loss (does not apply for Schottky diode)—depends mostly on the diode characteristic; diodes with large Qrr, like the body diode of a superjunction FET, can have an extremely large Qrr and completely dominate the turn-on loss 3. Eoss loss—this is the energy stored in the capacitance of the switch node (including the switch itself, the diode, and parasitic capacitance in the inductor) that gets dissipatively discharged each time the switch turns-on.

ZVS As a simple example of ZVS, consider the same boost PFC circuit as in the previous example, but with a different control strategy. The previous example operated in continuous conduction mode (CCM) with the current through the inductor never falling to zero. Now suppose the

current is allowed to reach zero each cycle. Of course this means the ripple current of the PFC stage has a much higher magnitude (so there is both more rms current and corresponding conduction loss). But allowing the inductor to fully discharge sets up the condition for lossless commutation of the diode—essentially free ZVS.

When the inductor current reaches zero, the equivalent circuit is an LC, but the capacitance is not the big bulk capacitor on the dc bus—it is blocked by the diode. Instead, the total capacitance is the combined output capacitance of the switch plus the parasitic capacitance of the diode and inductor. The initial condition of the circuit is that C is charged to the bus voltage. The capacitance will resonate, and its voltage will ring down to negative bus voltage. But the switch will clamp the voltage as it crosses zero volts. When the switch does turn on again, the voltage across it is already zero, thus eliminating the turn-on switching loss. This mode of operating the PFC circuit is known as critical conduction mode, or CrCM.

The concept of using small amounts of energy stored in the inductor or in device capacitance is common practice for enabling ZVS in a variety of topologies and control strategies. The LLC converter is a

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The dotted lines represent charge (left axis) and the solid lines represent energy (right axis) on this graph of Qoss and Eoss versus Vds for a 650-V, 70-mΩ-rated high-performance superjunction FET compared to a GaN HEMT with the same rated on-resistance.

The superjunction charge (dotted blue line) rises steeply to 90% of its final value within the first 20 V, then rises the final 10% over the remaining 380 V because of how charge distributes in the columnar structures of a superjunction FET. This characteristic nonlinearity explains why superjunction FETs can have a relatively low Eoss for a given Qoss, and can be excellent (low Eoss) for hard-switching circuits. Note that the GaN HEMT has ~10x lower Qoss, which is the important parameter for ZVS applications.

Eoss (μJ)

Qoss (nC)

GaN COMPONENTS

Vds (V)

good example of a dc-to-dc stage that uses resonance to realize ZVS in the back half of a power supply.

As previously mentioned, ZVS can work with any type of switch, but here is where the big difference between conventional silicon FETs and GaN HEMTs becomes important: If the effective capacitance of the switch is made much smaller, the time required to make the ZVS transition also drops correspondingly. Or alternatively, the time can be made the same, but the amount of stored charge needed can be reduced correspondingly.

It is desirable to operate at a higher frequency to realize higher energy density.

This is where the shorter transition time becomes important. Normally in the LLC circuit, the ZVS transition only takes a small percentage of the total resonant period—for example, it may be 330 nsec, about 5% of the period, for one cycle of a typical 150-kHz operating frequency. But if the frequency rises 4x to 600 kHz, the 330 nsec (per edge) becomes 20% of the period.

The transition time (also known as dead time) is “non-productive” power transferring time—it is simply time spent waiting for the lossless ZVS transition. This

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Infineon_EE_2016_Power_Vs3.MD.indd 23

means that as the dead time becomes a larger percentage of the total period, the productive portion of the resonant period is proportionally smaller, and this drives the rms current much higher due to the higher peak-to-average ratio.

In other words, to boost frequency significantly in a ZVS circuit, the circulating energy needed to realize ZVS must drop proportionally. Otherwise, the penalty of higher rms current on both the primary and secondary sides will kill the efficiency of the power supply, making it impossible to improve density.

But the relationship between capacitance, charge and energy in modern high-voltage (superjunction) MOSFETs is complex because the capacitance is so nonlinear. This nonlinearity makes it difficult to compare devices based on datasheet capacitance values as they can change three orders of magnitude depending on voltage. It also makes a big difference between devices that are optimal for hard switching (low Eoss), versus those best for ZVS soft switching (low Qoss).

A graph of Qoss versus Eoss clearly illustrates this difference. Consider the case of a 650-V, 70-mΩ-rated high-performance superjunction FET compared to a GaN

2016

HEMT with the same rated on-resistance.

The superjunction charge Qoss rises steeply, reaching 90% of its final value within the first 20 V applied. The slope then abruptly diminishes so applying another 380 V only adds 10% more charge. This behavior arises because of how charge distributes in the columnar structures of a superjunction FET.

This behavior has an interesting effect: The energy needed to pump charge into the Coss at low voltage is smaller due to the V2 relationship in E = ½ CV2. Though 90% of the charge gets stored in the first 20 V, a far smaller portion of the total energy is stored by this point. This characteristic nonlinearity explains why superjunction FETs can have a relatively low Eoss for a given Qoss. It is this nonlinearity that makes them excellent (low Eoss) for hard-switching applications compared to the other silicon alternatives.

In stark contrast, the GaN HEMT is a lateral device and has a low, nearly linear capacitance versus voltage. Its graph of Qoss versus voltage has a shallow slope rising to a value an order of magnitude smaller than that of the superjunction Qoss.

This even distribution of charge along the voltage axis results in an Eoss having a final

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LLC CONVERTER

value (at 400 V) almost equaling that of the superjunction device, since Eoss is the integration of charge times voltage. All in all, the HEMT is better in Eoss, but by a much smaller margin than Qoss where it is 10x improved.

To further illustrate the effect of Qg and Qoss, consider the well-known LLC circuit. Suppose the same LLC circuit is used for comparison of both Si and GaN on the primary side running at about 325 kHz, delivering 750 W from a 385-V bus.

The waveforms for the superjunction FETs on the primary of the LLC show once the upper gate turns off, the drain voltage takes more than 350 nsec to slew from bus to zero volts. The superjunction nonlinear charge creates long, shallow tails on the voltage that mandate the long dead time. Even with a 350-nsec dead time, the voltage has not yet reached zero (so it is near ZVS) when

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GaN COMPONENTS Using an example of an LLC converter, the ZVS waveforms for superjunction FET Vgs (top graph) are displayed at 5 V/div, Vds at 100 V/div, and a time scale of 100 nsec/div.

Below it are ZVS waveforms for a GaN HEMT with the same settings. In the superjunction FET, the upper gate turns off and the drain voltage takes more than 350 nsec to slew from bus to zero volts. The superjunction nonlinear charge creates long, shallow tails on the voltage that mandate the long dead time. Even after a 350-nsec dead time, when the lower gate turns on the voltage has not yet reached zero (so it is near ZVS). In viewing the same waveforms for the GaN HEMT, note the gate voltage has a much faster rise and fall time than the superjunction device. This is a result of the gate driver having a much easier time driving the low-charge gate of the GaN device. Moreover, due to the low Qoss of the HEMT, the drain voltage is linear and much faster as well. Because of this, the dead time can be 3x shorter and have no additional loss from non-ZVS.

the lower gate turns on. It may seem that turning on slightly early, before the voltage across the switch is really zero, is a small compromise, but it is not. Don’t forget that nearly half the Eoss still remains at only 20 V on the drain because of the nonlinearity. In other words, this dead time is pushed to be as short as possible without significant compromises in power loss (and efficiency).

With the GaN HEMT in the same circuit, under the same conditions, the gate voltage has a much faster rise and fall time than in the superjunction device. This is a result of the gate driver having a much easier time driving the low-charge gate of the GaN device. Moreover, the low Qoss of the HEMT makes the drain voltage linear and much faster as well. This lets the dead time be 3x shorter, and there is have no additional loss from non-ZVS.

2016

Thus, for power supply applications that require higher density, GaN HEMTs provide far superior properties that enable higher operating frequencies while simultaneously reducing the overall losses. In the example and conditions described here with a 750-W output, the overall efficiency of the LLC converter is 96.5% for superjunction, 97.8% for GaN. This is a 38% reduction in power loss, from 27.2 to 16.9 W because of the GaN HEMT. REFERENCES Infineon Technologies AG infineon.com/gan

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Power Electronics

Test instruments help tame power factor and signal integrity SIMRAN NANDA Keysight Technologies

Harmonic analysis helps design electronics that will behave well on the power grid.

A screen capture of the mains input to a switch-mode power supply reveals a slightly distorted read out of the voltage (top trace). The current drawn by the device (middle trace) is clearly a non-linear load. The bottom trace is the power transferred.

26

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2016

E

lectronics that include switch-mode power supplies (SMPSs) and VFDs depend on non-linear components to minimize size and cost. This approach, however, forces designers to note the impact non-linear current flows have on the signal integrity of the input mains power SMPSs, for example, typically draw non-linear current and are therefore significant sources of harmonics on the power network.

The same applies to VFDs, used with ac motors as often found in HVAC equipment and industrial fans. Even LED lamps, despite their low power consumption, can produce significant harmonics when a multitude of LED lamps are installed in a building or house.

The negative effects of harmonics are well-known. They can include overheating of cabling and transformers, current flowing through neutral ac conductors, nuisance tripping of circuit breakers, high electromagnetic emissions and reduced life of motors and transformers. In addition, the presence of these harmonics forces transformers and cables to have a higher rated capacity than would otherwise be necessary. To alleviate such problems, designers begin by assessing the actual harmonic levels.

Unfortunately, getting a handle on the amplitude and character of harmonics present can be a challenging task.

Measuring the Total Harmonic Distortion (THD), power factor, and harmonic levels of the input mains provides a good indicator of how a device-under-test impacts power quality.

IEEE and IEC guidelines describe how measurements must take place and also specify maximum harmonic levels for power electronics connected to the power network (IEEE 519, IEC 61000-3-2). Many standards related to power quality are written in reference to harmonics, because this provides a rational way to specify testable limits on distortion.

If a power supply meets the limits specified in standards, it will be a minimal burden to power quality. Harmonic analysis provides an excellent tool to help identify the source of signal integrity issues and meet the specifications that standards require.

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A40_DesigWrld_9x10_875_Layout 1 1/19/16 10:27 AM Page 1

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PICO Electronics 2-16 EE.indd 27

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Power Electronics

BASICS OF HARMONIC ANALYSIS Harmonic analysis uses a Fourier series to decompose a complicated periodic waveform into a set of simple sinusoids.

The original waveform may be arbitrarily complex and most likely doesn’t have an analytical equation. The waveform can be digitized, however, and run through a harmonic analysis to generate a set of sinusoids (harmonics) that, when added together, approximate the original waveform.

Readers may recall that harmonics are organized by frequency. The lowest non-zero-frequency harmonic is the fundamental (or first harmonic). All other harmonics have frequencies that are integer multiples of the fundamental. The second harmonic is twice the fundamental frequency, the third is three times, and so on.

Now consider a simple system of an ac source and a load.

The average power delivered to the load from the source over one power line cycle is given by: Pavg=

1 T

∫

T

v(t)i(t) dt

(1)

0

where T is the period of the power line cycle, v(t) is the voltage across the load, and i(t) is the current through the load. Substituting the harmonics formulation for the v(t) and i(t) waveforms gives: ∞

∑

Pavg= V0 I0 +

VnIn 2

cos (Øvn - Øin)

(2)

n=1

This is a more useful form. Decomposing Pavg into sums of harmonics now lets you compute the power being delivered

Maximum current draw for harmonics as specified by IEC 61000-3-2 Class A Odd harmonics (n)

Max current (A)

Even harmonics (n)

Max current (A)

3

2.3

2

1.08

5

1.14

4

0.43

7

0.77

6

0.30

9

0.40

8-40

0.23×8/n

11

0.33

13

0.21

15-39

0.15×15/n

IEC 61000-3-2 Class A (equipment that draws <16 A per phase) dictates harmonic limits as delineated in this table.

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DESIGN WORLD — EE Network

Keysight_EE_2016_Power_Vs4.MD.indd 28

2016

by a particular harmonic frequency. For example, if you want to know how much power the ninth harmonic delivers, you can compute it directly by multiplying the amplitudes of the ninth harmonic voltage and current times the cosine of the angle difference between them: Pavg9 =

V9I9 2

cos (Øv9 - Øi9)

An interesting prediction from the above decomposition is that both voltage and current must have corresponding harmonics present. Otherwise there will be no average power transfer from that particular harmonic. For example, if the voltage contains just the fundamental, and the current contains just the third harmonic, the average power will be zero.

If the voltage is a clean sine wave and the current waveform is non-sinusoidal, only the fundamental will transfer power. All the higher harmonics in the current waveform will be unproductive.

One goal of power system design is to maximize the power factor, PF, defined as: Pavg PowerFactor = W = VA VrmsIrms But the harmonics that don’t transfer power work against this goal. They don’t contribute to Pavg, but they boost the VrmsIrms. The extra harmonic voltage and/ or current is not used, but the power system still must carry the extra harmonic voltage and/or current and incur the associated losses. To maximize power transfer efficiency, it’s therefore beneficial to minimize higher harmonics.

A sensible first step before harmonic analysis is to measure the THD, especially if the purpose is to troubleshoot power quality problems. This measurement can be done with a true-RMS digital multimeter with a bandwidth and sampling rate high enough to capture the higher harmonic frequencies. If the THD level is low (less than 3 to 5% depending on amplitude), there are no harmonics issues. However, if either THD is too high or you want to characterize the performance of your device, the THD measurement is not enough. You need the full breakdown of harmonic amplitudes.

You may also want to conduct multiple runs, evaluating the device in different operating modes and varying load conditions. With generalpurpose instruments (digital multimeters, spectrum

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2/23/16 2:12 PM

TAME POWER FACTOR

A power analyzer is a useful tool for measuring the power in a test setup. Here a function generator produces a voltage signal with just the fundamental (60 Hz) and a current with just the third harmonic (180 Hz). The bottom trace shows the power waveform. Note the average power transferred per cycle is effectively zero, though the voltage, current, and power traces have significant amplitude.

This example of a harmonics measurement shows the power line spectrum for a device generating mostly odd harmonics but with a fifteenth harmonic that is too high to meet the IEC 610000-3-2 standard for grid power quality.

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Keysight_EE_2016_Power_Vs5.MD.indd 29

analyzers or scopes), you may find the data collection and post-processing for harmonics analysis extremely timeconsuming. In addition, the process of comparing the harmonic levels to published standards can be tedious.

The modern power analyzer simplifies and speeds up such procedures with features specifically intended for harmonic analysis. Data collection, frequency domain processing, and harmonics analysis are built-in. Power analyzers typically have high sample rates and a graphical display that permits viewing the waveform in a manner analogous to that of a scope. This visualization is invaluable because you can quickly verify what you are measuring and that cabling or misconnections aren’t causing issues.

The power analyzer can simultaneously display other relevant information such as THD, frequency, amplitude, phase of the voltage, current, and power waveforms.

Once the measurement setup is verified, you can simply turn on the harmonic analysis and the power analyzer will display the harmonics in a table and/or visual bar graph format.

Many power analyzers also have builtin pass/fail limits based on widely used standards. This makes for quick, convenient and immediate feedback on how the harmonics of the device under test stack up against the compliance limits.

All in all, use of a power analyzer to minimize higher harmonics and maximize power transfer permits a quick investigation of harmonic content. Harmonic analysis can provide actionable guidance to address signal integrity issues in power systems with periodic switching waveforms. Using a modern power analyzer simplifies measurements and lets you model complicated interacting voltage and current waveforms in a way that is easy to understand.

REFERENCES Keysight Technologies keysight.com

2016

DESIGN WORLD — EE Network

29

2/24/16 10:03 AM

Power Electronics

A close look at the Level VI power supply spec JEFF SCHNABEL CUI Inc.

DOE power supply efficiency specifications target a broader array of power supplies to save energy and reduce greenhousegas emissions.

Efficiency versus Output

M

arket enthusiasm for new high-tech devices is undiminished. The Consumer Electronics Association, in its July 2015 U.S. Consumer Electronics Sales and Forecasts report, predicted a total industry revenue rise of 2.4% to $285B. Major contributors include continued growth in smartphone and notebook/netbook sales and new categories giving buyers more reasons to spend. These include 4K ultra-high-definition televisions, connected-home technologies and wearable devices.

On the other hand, governments are trying to limit demand for electrical energy, both to ensure grid stability and to combat climate change. As sales of high-volume consumer electronics continue rising, the resulting squeeze on resources force greater energy efficiency measures. A key concern has been the energy wasted when electrical devices are in standby modes. In 1998, this was estimated at about 5% of all electricity generated.

Eco-design initiatives, such as Energy Star in the U.S. and ErP in the E.U., have evolved to limit both the active and standby power of equipment such as televisions, set-top boxes, computers and domestic appliances. The external power adapters of equipment such as notebook computers and office machinery have also come under

A plot of efficiency levels versus power supply output shows how the Level VI average efficiency specification for power supplies stacks up against earlier Level IV and Level V specifications.

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2016

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Power Electronics

scrutiny. In 2004, California became the first authority to introduce mandatory specifications to reduce the energy dissipated by external power supplies.

Today, the International Energy Efficiency Marking Protocol for External Power Supplies is the globally accepted framework setting out limits on standby consumption and average efficiency for such adapters. Within this framework, the latest specification is Level VI, which was introduced by the U.S. Dept. of Energy (DOE) on February 10, 2016. This requires any external power supply manufactured after this date and shipped into the U.S. to meet new efficiency targets. DOE estimates this more rigorous standard will save 47 million tons of CO2 emissions annually.

NEW SPECIFICATION, TOUGHER TARGETS The new Level VI specifications demand higher average efficiency and lower no-load power consumption compared to current Level V power supplies. The new Level VI specification is also significantly more complex than previous versions. Several categories of power supplies are now defined, and new classifications will be regulated for the first time. Some of the newly regulated products include multi-voltage power supplies as well as single-voltage power supplies over 250 W. By including these high-power adapters, Level VI will have a significant impact in markets for industrial equipment not previously covered by the marking protocol.

Examples of basic single-voltage supplies include those used by routers, set-top boxes, portable industrial devices and other consumer electronic devices in the 1 to 49-W power range. Telecommunication network infrastructure equipment, appliances and office equipment are typical applications in the 49 to 250-W range while industrial devices featuring motors or lasers will be covered by the above-250-W category.

Required efficiency levels for several categories spelled out in the Level VI standard are specified as a calculation involving supply output power. Cranking through a few of these calculations for basic and lowvoltage supplies reveals that the standard’s distinction between basic- and low-voltage appears to apply a less stringent requirement for low-voltage supplies. This certainly helps ensure the manufacture of such supplies is economically viable in the more price sensitive market for consumer products and home automation devices that fall into this category. Similarly, running the standard’s efficiency calculation reveals the ≤1-W category appears to have a relatively undemanding efficiency specification of 66% or less. But currently, external adapters at these low power levels are rare.

The new specification also introduces a distinction between direct operation and indirect operation. It

Level VI power-supply categories and specifications Here are the specifications for all categories defined in the Level VI specification.

Note that low-voltage power supplies are defined as having output voltage less than 6 V and output current greater than 550 mA. Basic voltage refers to a power supply that is not a low-voltage power supply.

Power supply type

≤1 W

1 to 49 W

49 to 250 W

≥250 W

0.1 W

0.1 W

0.21 W

0.5 W

0.5 × Pout + 0.16

0.071 × ln(Pout) – 0.0014 × Pout + 0.67 (see note)

0.880

0.875

Single-Voltage ac/dc (basic voltage)

No load (max.)

Average efficiency (min.)

Single-Voltage ac/ac (basic voltage)

No load (max.)

0.21 W

0.21 W

0.21 W

0.5 W

Average efficiency (min.)

0.5 × Pout + 0.16

0.071 × ln(Pout) – 0.0014 × Pout + 0.67

0.880

0.875

No load (max.)

0.1 W

0.1 W

0.21 W

0.5 W

Average efficiency (min.)

0.517 × Pout + 0.087

0.0834 × ln(Pout) – 0.0014 × Pout + 0.609

0.870

0.875

No load (max.)

0.21 W

0.21 W

0.21 W

0.5 W

Average efficiency (min.)

0.517 × Pout + 0.087

0.0834 × ln(Pout) – 0.0014 × Pout + 0.609

0.870

0.875

No load (max.)

0.3 W

0.3 W

0.3 W

-

Average efficiency (min.)

0.497 × Pout + 0.067

0.075 × ln(Pout) + 0.561

0.860

Single-Voltage ac/dc (low voltage)

Single-Voltage ac/ac (low voltage)

MultipleVoltage

Note: ln = natural logarithm e.g. for Pout = 40W then ln(Pout) = 3.6888 so the efficiency would calculate as 87.5%

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2016

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2/24/16 2:14 PM

tlec-mda

Level V versus VI

LEVEL VI POWER SPEC

applies only to units intended for direct operation. Direct power supplies are defined as being able to function in the end product without a battery. An indirect power supply is not a battery charger, but cannot operate the end product without the assistance of a battery.

Some classes of direct power supplies are exempt from the need to comply with Level VI. These include devices that require FDA approval as a medical device in accordance with section 360c of title 21, and ac/dc power supplies with nameplate output voltage less than 3 V and nameplate output current greater than or equal to 1,000 mA that charges the battery of a product that is fully or primarily motor operated.

CHANGES UNDER THE SKIN Power supply makers have generally found that Level VI efficiency levels couldn’t be met with the same supply designs used for Level V or earlier designs. So new topologies have generally been necessary to

A comparison of the efficiency of equivalent Level V and Level VI power supplies, measured at 25, 50, 75 and 100% of full load (7.5 V, 4 A) shows that Level VI efficiency improves at all levels, and particularly at lower loads.

handle the more stringent efficiency demands.

For example, CUI anticipated the new Level VI regulations by introducing compliant adapters as early as the latter half of 2014.

Important design changes were necessary to satisfy the new, stricter targets, based on CUI’s established topologies. For units under 120 W, this is a flyback topology, while adapters over 120 W use an LLC resonant topology.

To meet the tougher standards, lowvoltage/high-current models now feature

synchronous rectification in the secondary side. Replacing conventional rectifier diodes with low-RDS(ON) MOSFETs has eliminated diode losses resulting in a net saving when the power to run the associated MOSFET controller IC is taken into account.

The PWM control strategy is significantly different compared to the previous generation. In CUI’s Level V adapters, the main control IC typically operates at a fixed frequency of 65 kHz, but the latest

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2:54 PM

Line Voltage, Current, and Power – The Basics LINE VOLTAGE

LINE CURRENT

SINGLE-PHASE

THREE-PHASE

Single-phase line voltage consists of one voltage vector with:

Three-phase line voltage consists of three voltage vectors.

• By definition, the system is “balanced” • Vectors are separated by 120° • Vectors are of equal magnitude • Sum of all three voltages = 0 V at Neutral

Line

At any given moment in time, the voltage magnitude is V * sin(α) • V = magnitude of voltage vector • α = angle of rotation, in radians

Neutral

120°

C

THREE-PHASE

Voltage value = VX*sin(α) • VX = magnitude of phase voltage vector • α = angle of rotation, in radians

• 50 Hz in Europe • 60 Hz in US • Either 50 or 60 Hz in Asia • Other frequencies are sometimes used in non-utility supplied power, e.g.

• 400 Hz • 25 Hz

Important to Know • Voltage is stated as “VAC”, but this is really VRMS • Rated Voltage is Line-Neutral • VPEAK = 2 * VAC (or 2 * VRMS ) • 169.7 V in the example below • VPK-PK = 2 * VPEAK • If rectified and filtered • VDC = 2 * VAC = VPEAK AC Single-Phase “Utility” Voltage

120 VAC Example

Volts (Peak), Line-Neutral

200

120VAC

150 100 50 0

800

Important to Know • Voltage is stated as “VAC”, but this is really VRMS • Rated Three-phase voltage is always Line-Line (VL-L) • Line-Line is A-B (VA-B), B-C (VB-C), and C-A (VC-A) • Line-Line is sometimes referred to as Phase-Phase • VPEAK(L-L) = 2 * VL-L • 679 V in the example to the right • VPK-PK(L-L) = 2 * VPEAK(L-L)

-100 -150 -200

“True” RMS

400

0

-800

800

If a neutral wire is present, three-phase voltages may also be measured Line-Neutral • VL-N = VL-L/ 3 • 277 VAC (VRMS) in this example • VPEAK = 2 * VL-N • 392 V in the example to the right • VPK-PK = 2 * VPEAK

AC Three-Phase “Utility” Voltage 480VAC , Measured Line-Neutral

600 400 200 0 -200

B

-400

-800

VRMS =

1 V PK-PK 2 2

For one power cycle

Time

A-N Voltage B-N Voltage C-N Voltage Three-phase Rectified DC

IC

480 VAC Example

N

IA

C

A

9 6 3

Real Power • P, in Watts • = instantaneous V * I for a given power cycle

0 -3 -6

Time A Current B Current C Current

A

Reactive Power • Q, in Volt-Amperes reactive, or VAr • Q = S2 - P2 • Does not “transfer” to load during a power cycle, just “moves around” in the circuit

10 ARMS Example

IA

Period 1 Mi = 18 points

Period 2 Mi = 18 points

A

mi = point 7

mi = point 25

IA

N

V C-N

IB

N V A- N

I

P≠V*I

φ

V

Capacitive load

• The digital samples are grouped into measurement cycles (periods) • For a given cycle index i….

• The digitally sampled voltage waveform is represented as having a set of sample points j in cycle index i • For a given cycle index i, there are Mi sample points beginning at mi and continuing through mi + Mi -1.

• Voltage, current, power, etc. values are calculated on each cycle index i from 1 to N cycles.

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V A- N

φ

IC

IC PTO TAL = VA- N * IA + VB - N * IB + VC - N * IC

IA PTO TAL ≠ VA- N * IA + VB - N * IB + VC - N * IC

V C-N

QB

Real Power for each Phase • P, in Watts • = instantaneous V * I for a given power cycle

Reactive Power for each Phase • Q, in Volt-Amperes reactive, or VAr • Q = S2 - P2

PB

φ

SB PA

SC

• PTOTAL = PA + PB + PC • STOTAL = SA + SB + SC • QTOTAL = QA + QB + QC

φ φ

QA

SA

PC QC

Line-Line Voltage Sensing Case Voltage is measured L-L • Neutral point may not be accessible, or • L-L voltage sensing may be preferred

Inductive load

N

B IB VB-C

Current is measured L-N

N

IC

L-L voltages must be transformed to L-N reference:

B

VB-N

VA-B

IA

IB

A

N

IC

VA-N IA

A

VC-A

C

Calculations are straightforward, as described above: • PTOTAL= PA + PB + PC • STOTAL = SA + SB + SC • QTOTAL = QA + QB + QC

C

VC-N

Two Wattmeter Method – 2 Voltages, 2 Currents with Wye (Y or Star) or Delta (∆) Winding

S

Q

φ P

-9

Delta (∆) 3-phase Connection • Neutral is not present in the winding (in most cases)

C

Apparent Power • |S|, in Volt-Amperes, or VA • = VRMS * IRMS for a given power cycle

15 12

-12 -15

IB

C

B

N

φ

Single-phase Real, Apparent and Reactive Power AC Three-Phase "Line" Currents

Digital Sampling Technique for Power Calculations�

C

V I

• For inductive loads • The current vector “lags” the voltage vector angle φ • Purely inductive load has angle φ = 90°

A IC

Three-Phase Winding Connections

Wye (Y) 3-phase Connection • Neutral is present in the winding • But often is not accessible • Most common configuration VRMS = VAC2 For one power cycle

B

IB

-600

B VPK-PK

P≠V*I N

• Capacitive Loads • The current vector “leads” the voltage vector by angle φ • Purely capacitive load has angle φ = 90°

Important to Know • Current is stated as “lAC”, but this is really IRMS • Line currents can represent either current through a coil, or current into a terminal (see image below) depending on the three-phase winding connection • IPEAK = 2 * IRMS • 14.14A for a 10 ARMS current in the example to the right • IPK-PK = 2 * IPEAK

A-B Voltage B-C Voltage C-A Voltage

V B-N

IB

Apparent Power for each Phase • |S|, in Volt-Amperes, or VA • = VRMS * IRMS for a given power cycle

Line Current Measurements Time

As with the single-phase case, Power is not the simple multiplication of voltage and current magnitudes, and subsequent summation for all three phases.

V B-N

Single-phase, Non-resistive Loads For capacitive and inductive loads • P ≠ V * I since voltage and current are not in phase

Current value = IX*sin(α) • IX = magnitude of line current vector • α = angle of rotation, in radians

200

-600

Line-Neutral Voltage Measurements

Time

“Not True” RMS

A

120°

-400

480 VAC Example

If all three phases are rectified and filtered • VDC = 2 * VL-N * 3 = VPEAK * 3 = 679 V in the example to the right

-50

Neutral

Like voltage, the resulting time-varying “rotating” current vectors appear as three sinusoidal waveforms • Separated by 120° • Of equal peak amplitude for a balanced load

AC Three-Phase “Utility” Voltage 480VAC , Measured Line-Line

600

-200

Three-phase, Non-resistive Loads

For purely resistive loads • PA = VA-N * IA • PB = VB-N * IB • PC = VC-N * IC • PTOTAL = PA + PB + PC

Power Factor (PF, or λ) • cos(φ) for purely sinusoidal waveforms • Unitless, 0 to 1, • 1 = V and I in phase, purely resistive load • 0 = 90° out of phase, purely capacitive or purely inductive load • Not typically “signed” – current either leads (capacitive load) or lags (inductive load) the voltage

C

Line-Line Voltage Measurements

Three-phase, Resistive Loads

Three-phase, Any Load

120°

VA-N

VC

V

Resistive load

Voltage Current

120°

ω (rad/s) or freq (Hz)

Like voltage, three-phase current has three different line current vectors that rotate at a given frequency • Typically, 50 or 60 Hz for utility-supplied voltage

VA

I

N

B

By definition, the system is “balanced” • Vectors are separated by 120˚ • Vectors are of equal magnitude • Sum of all three currents = O A at neutral (provided there is no leakage of current to ground)

VA-B

Neutral

120°

Volts (Peak), Line-Line

The resulting time-varying “rotating” voltage vector appears as a sinusoidal waveform with a fixed frequency

Voltages can be measured two ways: • Line-Line (L-L) • Also referred to as Phase-Phase • e.g. from VA to VB, or VA-B • Line-Neutral (L-N) • Neutral must be present and accessible • e.g. from VA to Neutral, or VA-N • VL-L conversion to VL-N • Magnitude: VL-N * 3 = VL-L • Phase: VL-N - 30° = VL-L

P=V * I

Power Factor

Phase Angle (φ) • Indicates the angular difference between the current and voltage vectors • Degrees: - 90° to +90° • Or radians: -π/2 to + π/2

Line

Neutral

The resulting time-varying “rotating” voltage vectors appear as three sinusoidal waveforms • Separated by 120° • Of equal peak amplitude

Volts (Peak), Line-Neutral

Line

Neutral

For purely resistive loads • P = I2R = V2/R = V * I • The current vector and voltage vector are in perfect phase

Phase Angle ω (rad/s) or freq (Hz)

VB ω (rad/s) or freq (Hz)

The resulting time-varying “rotating” current vector appears as a sinusoidal waveform

At any given moment in time, the current magnitude is I*sin(α) • I = magnitude of current vector • α = angle of rotation, in radians

A

120°

The three voltage vectors rotate at a given frequency • Typically, 50 or 60 Hz for utility-supplied voltage The single-phase voltage vector rotates at a given frequency • Typically, 50 or 60 Hz for utility-supplied voltage

120°

ω (rad/s) or freq (Hz)

Typically, the three phases are referred to as A, B, and C, but other conventions are also used: • 1, 2, and 3 • L1, L2, and L3 • R, S, and T

THREE-PHASE

Electric Power • “The rate at which energy is transferred to a circuit” • Units = Watts (one Joule/second)

Imaginary Power

Neutral

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SINGLE-PHASE

Like voltage, the single-phase current vector rotates at a given frequency • Typically, 50 or 60 Hz

Line Current (Peak)

• Magnitude (voltage) • Angle (phase) Typically, the single-phase is referred to as “Line” voltage, and is referenced to neutral.

LINE POWER

SINGLE-PHASE B

Real Power

Note: Any distortion present on the Line voltage and current waveforms will result in power measurement errors if real power (P) is calculated as |S|*cos(φ). To avoid measurement errors, a digital sampling technique for power calculations should be used, and this technique is also valid for pure sinusoidal waveforms.

Voltage is measured L-L on two phases • Note that the both voltages are measured with reference to C phase

Mathematical assumptions: • Σ(IA + IB + IC) = 0 • Σ(VA-B + VB-C + VC-A) = 0 This is a widely used and valid method for a balanced three-phase system

Formulas Used for Per-cycle Digitally Sampled Calculations

VRMS

VRMSi =

mi + Mi - 1 1 V j2 Mi j=mi

IRMS

IRMSi =

mi + Mi - 1 1 I j2 Mi j=mi

Σ Σ

Real Power (P, in Watts)

Pi =

Apparent Power (S, in VA)

Reactive Power (Q, in VAR)

PTOTAL = VA-C * IA + VB-C * IB STOTAL= VRMSA-C * IRMSA + VRMSB-C * IRMSB QTOTAL = STOTAL2 - PTOTAL2

Current is measured on two phases • The two that flow into the C phase

mi + Mi - 1 1 Vj * Ij Mi j=mi

Σ

B

B

IB VB-C

C

Power Factor (λ)

N

IA VA-C

A

IB

VB-C

C

λi =

VA-C

A

IA

Pi Si

Si = VRMSi * IRMSi

magnitude Qi =

S i2 - P i2

Sign of Qi is positive if the fundamental voltage vector leads the fundamental current vector

Phase Angle (φ)

magnitude Φi = cos-1λi Sign of Φi is positive if the fundamental voltage vector leads the fundamental current vector

| teledynelecroy.com/contactus © 2015 Teledyne LeCroy, Inc. All rights reserved.

Learn more about the MDA800 and sign up to receive a free Power Basics Poster: teledynelecroy.com/static-dynamic-complete

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Power Electronics

controllers for Level VI units improve efficiency as load drops by reducing the switching frequency to 22 kHz. Improving light-load efficiency is important because the IEC-approved test method for assessing average efficiency (AS/NZS 4665) calls for power to be measured at 25, 50, 75 and 100% of rated load.

The arithmetic average of the data from all four points is then calculated to determine overall average efficiency.

Because the efficiency at 25% load is the lowest of the four points, improving performance at light load results in better average efficiency.

In addition, the latest controllers draw lower quiescent current than their predecessors. This helps meet the aggressive Level VI no-load targets.

Careful management of powerfactor correction (PFC) circuitry is another feature of the new Level VI units. Although PFC is mandatory for power supplies rated at 90 W or over, the circuitry can be disabled at lower

loads. This eliminates significant energy losses, thereby helping to improve both the average efficiency and noload consumption. Ripple noise can be slightly higher when the PFC circuitry is de-activated, but this should not be a problem for most applications.

Despite changes throughout the design, most of the new Level VI units retain the same case sizes and external appearance as the earlier models.

On the other hand, greater average efficiency has helped to reduce typical working temperatures, resulting in an improvement in reliability.

Level VI specification themselves.

It is usually more economical and straightforward to ship products with the same power supply type to all markets globally, so it makes sense to ensure that all units comply with the highest standard currently in force. This helps to minimize productmanagement challenges and avoid any potential for costly shipping errors.

Level VI power supplies have been available in the market for over a year now, and OEMs have had every opportunity to prepare for the transition to Level VI. Anyone who is unsure whether the power supplies they are now purchasing are compliant would be well advised to look for the Level VI marking on the label or check with their supplier.

MANDATORY COMPLIANCE The new Level VI efficiency standards for external power supplies are currently only mandatory in the U.S., but in practice it is forcing OEMs worldwide to adjust their purchasing and supply-chain arrangements. In any case, historical patterns suggest that other territories, such as the E.U., are likely to adopt the

REFERENCES More information on the Level VI standard: cui.com/efficiencystandards

Unique Power Devices Reverse Conducting IGBTs (BiMOSFETs™) C G E

•

•

High frequency operation

Reverse blocking capability

•

Very high current capability

•

Monolithic series diode

•

Anti-parallel diodes

•

Soft reverse recovery

•

Isolated mounting surface

•

Low gate drive requirement

•

• • • •

Part Number

T =25°C (A) 200 116 70

2.6 2.5 2.9

IXRP15N120 IXRA15N120 IXRH25N120

IC25

(V) 1700 2500 3600

POWER

G

K

Positive temperature coefficient of on-state voltage

APPLICATIONS

Current source inverters Matrix converters Bi-directional switches 3-level power converters

VCE(sat) typ.

TJ=25°C (V)

VCES C

IXBK75N170 IXBL64N250 IXBH20N360HV

•

APPLICATIONS

Resonant-mode power supplies Uninterruptible Power Supplies Laser and X-ray generators High voltage pulser circuits

Part Number

3

MOS gate turn on for drive simplicity

APPLICATIONS • • • •

A

1

High power density

MOS Gated Thyristors

2

"Free" intrinsic body diode

•

•

Reverse Blocking IGBTs

• • • •

Capacitive discharge circuits Ignition circuits Overcurrent protection Solid state surge protection

Part Number

T =25°C (A)

VCE(sat) typ.

TJ=25°C (V)

25 25 35

2.5 2.5 2.3

IXHH40N150HV IXHX40N150V1HV MMJX1H40N150

VCES

IC25

(V) ±1200 ±1200 ±1200

C

EUROPE IXYS GmbH marcom@ixys.de +49 (0) 6206-503-249

USA IXYS Power sales@ixys.com +1 408-457-9042

VCES

IC25

(V)

T =25°C (A)

VCE(sat) typ.

TJ=25°C (V)

1500 1500 1500

7.6 7.6 15.5

3.5 3.5 6.4

C

ASIA IXYS Taiwan/IXYS Korea sales@ixys.com.tw sales@ixyskorea.com

www.ixys.com

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Power Electronics

Multiple charging modes from a single amplifier MICHAEL A. DE ROOIJ VP, Applications Engineering Efficient Power Conversion

Though there are two standards for charging appliances wirelessly, a single circuit can be devised to serve as a charging node for both of them.

T

he good news about wireless charging techniques is that they do away with messy wiring that tethers phones and other appliances to wall outlets. The bad news is that there are multiple wireless charging schemes and they are generally incompatible with each other. Clearly, this incompatibility is not part of the formula for widespread adoption of wireless power technology.

This is the reason why manufacturers are trying to come up with a multi-mode capable wireless power design. Such a design could handle the two main competing wireless technologies: inductive coupling (also known as Qi), adopted by the Wireless Power Consortium (WPC) along

Block diagram for a typical wireless power system

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with the Power Matters Alliance (PMA), and the highly resonant method adopted by the Alliance for Wireless Power (A4WP). Recently PMA and A4WP merged to become known as AirFuel.

An amplifier that can operate to all the wireless power standards must be capable of operating at both high (6.78 MHz) and low (100 to 367 kHz) frequencies efficiently. A single amplifier design like this has been elusive, so multi-mode source solutions have resorted to using multiple amplifiers, each driving their own corresponding source coil.

This approach has generally been expensive with limited market appeal.

However, there is a simple single-amplifier topology based on eGaN FETs that is capable of operating to all of the mobile device wireless power

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Broad Range of Solutions for Power Conversion Designers

The power conversion market is constantly evolving, with a focus on increased efficiencies and higher integration.

The devices you used in your last power conversion design may already be old news. No matter which topology or approach you choose, Microchip can support your design with our comprehensive portfolio of intelligent power products, which covers the spectrum from discrete analog solutions to sophisticated and flexible power conversion using our digital signal controllers (DSCs).

The dsPIC® “GS” family of DSCs is optimized to provide full digital control of power conversion stages. Compensation loops implemented in software offer the ultimate in flexibility, enabling designs leveraging numerous topologies to be tailored for energy efficiency over widely varying load or environmental conditions.

Complete reference designs for AC/DC and DC/DC power conversion are available to enable faster time-to-market and simplify designs.

www.microchip.com/intelligentpower The Microchip name and logo, the Microchip logo and dsPIC are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks are the property of their registered owners. © 2015 Microchip Technology Inc. All rights reserved. 1/15 DS40001764B

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Power Electronics

TUNED COIL SET BLOCK DIAGRAM

SMITH CHART

standards. The design is based on a modified ZVS (zero-voltage switching) class D amplifier topology coupled to a specially designed source coil.

The system components have been individually experimentally verified to the A4WP class 2 and Qi/PMA standards and are designed to efficiently deliver up to 10 W.

Effect of device load resistance variation on the reflected impedance (left) for a tuned coil-set for the schematic shown (right).

WIRELESS POWER SYSTEM OVERVIEW The general architecture of a wireless power transfer system generally consists of four basic building blocks: an amplifier, also known as a power converter; a source coil that includes a matching network; a device coil that includes a matching network; and a rectifier with high-frequency filtering.

This architecture is similar regardless of inductive coupling or highly resonant wireless power technology.

It takes a thorough understanding of how the highly resonant coil and inductive coil systems operate to properly design the amplifier that can drive both modes efficiently. The complete schematic for a highly resonant wireless power coil system uses both shunt and series tuning in the device coil and only series tuning in the source coil. An equivalent circuit of a transformer represents the coupling between the two coils. This equivalent circuit is used to analyze the reflected impedance (labeled ZCoil_Tuned in the above diagram) presented at the source terminals as a result of varying load power. This reflected impedance would arise from a charging battery and manifests as a varying dc load

SIMPLIFIED CLASS D STAGE

Modified ZVS class D amplifier for multi-mode operation

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resistance (labeled Rload in the diagram).

Starting with a high dc load resistance value (shown by the red dot a in the accompanying Smith chart and decreasing until it reaches red dot b), the reflected impedance of the tuned source coil is shown by the green trace and moves in the opposite direction starting with a low impedance at green dot a and increasing until the end at green dot b. This is the negative impedance effect of the highly resonant wireless power coil-set.

There is a similar analysis for the inductive coil set. The device and source coils are still tuned, but at different operating frequencies and for different reasons. Here, the tuning is used to set a specific inductance for the reflected coil impedance that is used by the amplifier for optimal operation.

The coupling between the source coil and device coil will also affect the reflected impedance and must be considered in the design, particularly for the highly resonant operating mode. The reason will become apparent once the inductive system coil is integrated with the resonant coil and their effects must be analyzed in unison.

The coupling between the two coils is affected by changes in the distance and the turns ratio between them. If one assumes a fixed dc load resistance variation, then changes in distance between the coils, represented by d1, d2 and d3 in the figure at the top of page 39, show that as the coils get farther apart, the

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MULTIPLE CHARGING MODES

COIL COUPLING AT VARIED DISTANCES

reflected impedance variation drops. For a fixed number of turns and a fixed turns ratio between the coils, this can be a bad outcome. It can be corrected by changing the number of turns on the source coil, where reducing the number of turns will reduce the reflected impedance range.

The source coil is adjusted for compatibility with existing devices and the charging coils they contain.

In a multi-mode system, the ability to custom design the coil is critical to finding the optimal operating points for both the coil set and amplifier, as well as for realizing high system efficiency. Charging systems based on inductive coupling typically demand good coupling between the device and the source. Consequently, the distance between the coils is kept fairly short.

In the case of charging systems based on highly resonant methods, the coils typically sit further apart with more spatial freedom. It is important to artificially reduce the coupling between the coils so as to re-align the reflected impedance of the source coil to the optimal operating point of the amplifier. One way to accomplish this is to reduce the number of turns on the source coil.

The coil set design is only the first step toward realizing a single amplifier operating multi-mode. The source coil must be assembled so it can be driven by a single amplifier. The figure to the left shows the top view and cross-section of such an integrated coil structure. Coil selectivity is implemented by changing the frequency of operation using applicable matching circuits. There is inherent coupling between the coils in the integrated structure that usually

RESULTING SMITH CHART

Effect of device coupling on the reflected impedance (bottom center) for various source coil designs and distances between the source and device.

The traces on the Smith chart have been offset for clarity; they actually lay one on top of the other.

MULTIMODE MATCHING CIRCUIT

MULTIMODE COIL STRUCTURE

Integrated multi-mode coil structure and frequency selective matching

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Power Electronics

forces designs to incorporate decoupling circuitry between the inductive mode and highly resonant mode coils. This decoupling can be realized using a parallel resonant circuit (LLF and CLF) as depicted in the figure at the bottom of page 39. The circuit effectively blocks high frequency current. At low frequencies, the highly resonant tuning capacitor (CHF) blocks current.

A MULTI-MODE AMPLIFIER TOPOLOGY A single amplifier can now be used to drive the integrated coil structure. The ZVS class D amplifier has proven to be a simple highefficiency solution for 6.78-MHz highly resonant wireless power applications. The circuit that establishes ZVS for high-frequency operation must be disconnected to let the amplifier operate at low frequency in hard-switching mode without leading to over-current.

In the case of the low-frequency system, hard-switching operation was still able to yield amplifier efficiencies well above 90%. Using the ZVS technique for the amplifier, amplifier efficiencies exceeding 85% could be realized for most operating conditions when operating at 6.78 MHz. eGaN FETs have proven to be efficient in the range of 100 to 367 kHz, despite operating in hardswitching mode. This is because of their lower input capacitance (CISS), output capacitance (COSS), excellent Miller ratio (QGD/QGS1, and lack of reverse recovery (QRR). The figure found on page 38 shows a multimode amplifier employing eGaN FETs. A small low-cost eGaN FET (Q3) disconnects the ZVS tank circuit from the amplifier to let it operate in hard-switching mode. This device can be driven directly from logic as it does not switch at high frequency. A suitable device for this application is the EPC2036.

WPC - A29: 10 µH transmitter, Test #20 receiver • Test parameters: Vout = 7.0 V fsw = 130 kHz

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2016

• Test limits: 12 Vin_max 100˚ C

The eGaN FET ZVS class D amplifier has been tested to both the A4WP class 2 (at 6.78 MHz) and Qi-A29 (at 130 kHz) standards independently. The A4WP system used the NuCurrent class 2 coil that was paired with a category 3 device and powered by an EPC9510 amplifier. The Qi system used a Würth coil set powered by a modified EPC9509 amplifier.

Tests show the A4WP test platform fully complies with the A4WP class 2 standard. The experimental evaluation used two different amplifier boards. To keep costs down, a single-ended amplifier was used for the highly resonant case.

For the inductive system, the WPC (Qi) standard required a full bridge amplifier. Ultimately, a single-ended half-bridge configuration would be adopted for the final multi-mode amplifier as the coil design and tuning would be optimized for both highand low-frequency operation.

EPC9114 A4WP class 2 wireless power system (left) and EPC9509 amplifier used to drive an A29 Qi wireless power coil with Qi receiver coil (below).

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MULTIPLE CHARGING MODES

DC load current [mA] System level efficiency comparison between the A4WP class 2 system and the A29 Q1 system. The system-level dc input to dc output efficiency results are shown and include the gate driver operating power.

REFERENCES For more on inductive coupling: “System Description Wireless Power Transfer,” Vol. I: Low Power. Part 1: Interface Definition, Version 1.2, June 2015.

Power Matters Alliance. [Online] Available: powermatters.org For more on highly resonant charging: A4WP Wireless Power Transfer System Baseline System Specification (BSS), A4WP-S-0001 v1.3.1, February 25, 2015.

For more on coil matching circuits: V. Muratov, “Multi-Mode Wireless Power Systems can be a Bridge to the Promised Land of Universal Contactless Charging,” Wireless Power Summit, Berkeley CA, U.S.A., November 2014.

For more on ZVS class D amplifiers: M. A. de Rooij, “Performance Comparison for A4WP Class-3 Wireless Power Compliance between eGaN FET and MOSFET in a ZVS Class D Amplifier,” International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management (PCIM - Europe), May 2015.

M. A. de Rooij, “Wireless Power Handbook,” Second Edition, El Segundo, October 2015, ISBN 978-0-9966492-1-6.

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A. Lidow, J. Strydom, M. de Rooij, D. Reusch, “GaN Transistors for Efficient Power Conversion,” Second Edition, Wiley, ISBN 9781-118-84476-2.

For more on GaN transistors and the EPC2036 in particular: D. Reusch, J. Strydom, and A. Lidow, “Highly Efficient Gallium Nitride Transistors Designed for High Power Density and High Output Current DC-DC Converters,” IEEE International Power Electronics and Application Conference (PEAC), pp.456-461, 2014.

Efficient Power Conversion, “EPC2036—Enhancement Mode Power Transistor,” EPC2036 data sheet, April 2015, [Online] Available: epc-co.com/epc/Products/eGaNFETs/EPC2036.aspx For more information on charging coils: NuCurrent. coil part number PNC21-T28L04E-152991R40, nucurrent.com Würth Elektronik “WE-WPCC Wireless Power Charging Transmitter Coil,” 760308141 data sheet [Online] Available: katalog.we-online.com/pbs/datasheet/760308141.pdf Würth Elektronik “WE-WPCC Wireless Power Charging Receiver Coil,” 760308102210 data sheet [Online] Available: katalog.we-online.com/pbs/datasheet/760308102210.pdf

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Power Electronics

Compensating for temperature in high-frequency rectifier diodes KOJI IKEDA

K.C. NISHIO

Sanken Electric Co.

Allegro Micro Systems

Over-temperature can be a problem in high-performance switching supplies. New power rectifier diodes build in

P

The FMKS series of diodes combine a 200-V ultra-fast recovery diode with a thermaldetect Schottky diode in a TO-220F package.

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ulse-width-modulated converter and amplifier designs tend to spend much of their time handling significant levels of electrical current. High currents tend to heat up the power semiconductors used in these circuits. Of course, temperature affects the operating parameters of these circuit devices. For example, the voltage across a forward-biased silicon diode drops by about 2 mV/°C rise in temperature. When a diode is reverse biased, the saturation current flowing through it is also a function of temperature, approximately doubling for each 10° C rise in temperature.

It can also be hard to predict temperature effects. For example, a physical diode that is reverse biased will have a current variation with temperature less than the values predicted by simple device models because there is a component of reverse-bias current, called a surface leakage current, that flows around the junction rather than through it. It varies with temperature at a slower rate than the reversebias current through the junction. A rule of thumb for discrete silicon diodes is that reversebias current approximately doubles for each 10° C rise in temperature.

In high-performance switching designs, it is customary to compensate for possible temperature rise and factors affected by

2016

Resistance (Ω)

safeguards to head off heat build-up.

High

Low Low

High

Temperature (ºC) As the temperature of an NTC thermistor rises, its resistance drops.

it, such as output-voltage error rate. The usual way of adjusting switching circuits for temperature is to add circuitry that reduces current through the diode as temperature rises above a certain point. The typical means of sensing temperature is a thermistor, which is usually situated in the detection circuit. The detection circuit reduces diode current as diode temperature rises above critical levels.

Of course, this kind of compensation works best if the temperature sensor is close to the diode. That is the idea behind new rectifier diodes that feature a Schottky barrier diode formed on the same die as the

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Power Electronics

NTC Thermistor

fast-recovery diode that is used as the secondary-side rectifier diode, making temperature-change detection in real time possible. This technique also reduces part count and design time.

Switched mode power supplies in applications such as audio systems and adapters generally detect an overload in rectifier diodes by monitoring the rectifier diode at the secondary side of the switched mode power supply. In a typical application circuit using an NTC thermistor, the NTC thermistor resistance drops when the temperature of the diode to which it is thermally connected goes up.

Because this temperature sensing circuit resides in the secondary of the power supply, it usually reduces current in the primary side through some kind of isolating element, generally an optocoupler, to avoid any possibility of a primary-secondary short circuit or inadvertent feedback. When the voltage at the REF pin of the shunt regulator

Rectifier diode

Detection Circuit A typical temperature compensation technique for switching supplies is to use a thermistor to sense the temperature rise in a power diode that lies in the secondary of the switching circuit. The thermistor adjusts the detection voltage of the detection circuit in a way that turns on an optocoupler when the power diode temperature hits a critical point. The optocoupler turns on a circuit in the supply primary that reduces the diode current.

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R

P

E

ES

HIGH-FREQUENCY RECTIFIER DIODES reaches the reference voltage, current flows through the optocoupler. The signal sent back to the primary side through the optocoupler is used to limit the supply of electric power. This eliminates the possibility of power supply destruction because of an overload.

When the intent is to put a temperature-sensing element on the same die as the power diode, there are advantages to using a Schottky barrier diode instead of a thermistor. Schottky barrier diodes have a leakage current (IR) that increases when temperature rises.

When the temperature of the power diode rises, the leakage current from the Schottky barrier diode (which is thermally connected to it) will increase. The increase of this leakage current boosts the voltage at the REF pin of the shunt regulator.

Thus, in the same way as when using a thermistor, the current flows through an optocoupler. The signal sent back to the primary side through the optocoupler is used to limit the supply of electric power.

Rectifier diode

Schottky diode

IIRR

A Schottky barrier diode can serve as a temperature-sensing element instead of a thermistor. This approach has the advantage that the Schottky diode can be fabricated on the same die as the power diode, thus assuring a more intimate thermal connection between the two.

Detection circuit

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HIGH-FREQUENCY RECTIFIER DIODES In the ideal case, the temperature-detecting device is formed on the same die as the device of which temperature is detected as a means of forming a more intimate thermal connection. An example of the approach is the FMKS series diode, where a Schottky barrier diode is formed on the same die as the fast-recovery diode that is used as the secondary side rectifier diode. Thus, temperature change detection in real time is made possible, with ancillary benefits of lower part count and shorter design time.

REFERENCES Allegro MicroSystems, allegromicro. com FMKS diode info, http://tinyurl.com/ z8jy57r

The leakage current (IR) of a Schottky barrier diode rises with junction temperature, a quality that lets these diodes serve as temperature sensing elements.

Sanken Electric Co. diode info http://tinyurl.com/zxdj31b

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Power Electronics

MAJEED AHMAD

How and when

MOSFETs blow up High temperatures and operating conditions outside the safe operating area can sabotage MOSFETs used in switching circuits.

THE MOSFET

(metal-oxide-semiconductor field-effect transistor) is a primary component in power conversion and switching circuits for such applications as motor drives and switchmode power supplies (SMPSs). MOSFETs boast a high input gate resistance while the current flowing through the channel between the source and drain is controlled by the gate voltage. However, if not appropriately handled and protected, the high input impedance and gain can also lead to MOSFET damage caused by over voltage or too-high current.

First a few basics about avoiding MOSFET damage.

Obviously, Vgs and Vds must both be within limits. The same for current, Id. There is also a power limit given by

New generations of MOSFETs incorporate features that include a low RDS(on) to minimize conduction losses and improve operational efficiency. Examples include NTMFS5C404NLT, NTMFS5C410NLT and NTMFS5C442NLT MOSFETs from ON Semiconductor, which have maximum RDS(on) values of 0.74, 0.9 and 2.8 mΩ respectively. These are complemented by NTMFS5C604NL, NTMFS5C612NL and NTMFS5C646NL models, which have breakdown voltage ratings of 60 V. Both 40- and 60-V devices are rated to operate at junction temperatures up to 175° C to facilitate greater thermal headroom for designs.

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the maximum junction temperature.

Basic values for the upper maximum on these parameters are given in the safe operating area (SOA) graph in the MOSFET datasheet. But it turns out, other thermal limits can apply. The SOA graph, for example, generally assumes an ambient temperature of 25° C with a specific junction temperature, usually below 150° C. But there are a variety of conditions that may cause high thermal gradients that may lead to expansion and cracking of the MOSFET die.

One factor to consider in this regard is that MOSFET thermal resistance is an average; it applies if the whole die is at a similar temperature.

But MOSFETs designed for switchmode power supplies can experience a wide temperature variation over different areas of their die. Optimized for on/off switching, they typically don’t work well in their linear region.

A typical failure mode for a MOSFET is a short between source and drain. In this case, only the source impedance of the power source limits the peak current. A common outcome

ONE WAY OF AVOIDING CURRENTS THAT ARE TOO HIGH IS TO PARALLEL MULTIPLE MOSFETS SO THEY SHARE LOAD CURRENT.

of a direct short is a melting of the die and metal, eventually opening the circuit. For example, a suitably high voltage applied between the gate and source (VGS) will break down the MOSFET gate oxide. Gates rated at 12 V will likely succumb at about 15 V or so; gates having a 20-V rating typically fail at around 25 V. All in all, exceeding the MOSFET voltage rating for just a few nanoseconds can destroy it. Device

MOSFET power versus temperature graphs typically make assumptions about heat sinking and mounting, as is the case with this graph for an ON Semiconductor CPH3348 device.

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MOSFETs

A typical MOSFET safe-operating area graph, this one is for a CPH3348 MOSFET from ON Semiconductor. The SOA graph generally assumes an ambient temperature of 25° C, with a junction temperature below 150° C.

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The duration of MOSFET on time can greatly impact thermal resistance. This particular example graph is for a CPH3348 MOSFET from ON Semiconductor.

manufacturers recommend selecting MOSFET devices conservatively for expected voltage levels and further suggest suppressing any voltage spikes or ringing.

TOO LITTLE GATE DRIVE

MOSFET devices are designed to dissipate minimal power when turned on. And the MOSFET must be turned on hard to minimize dissipation during conduction, otherwise it will have a high resistance during conduction and will dissipate considerable power as heat.

Generally speaking, a MOSFET passing high current will heat up. Poor heat sinking can destroy the MOSFET from excessive temperature. One way of avoiding too-high current is to parallel multiple MOSFETs so they share load current.

Many P- and N-channel MOSFETs are used in topologies involving an H- or L-bridge configuration between voltage rails. Here, if the control signals to the MOSFETs overlap, the transistors will effectively short-circuit the supply.

This is known as a shoot-through condition. When it arises, any supply decoupling capacitors discharge rapidly through both MOSFETs during every switching transition, causing short but large current pulses.

The way to avoid this condition is to provide a dead time between switching transitions, during which neither MOSFET is on.

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Over-currents even for a short duration can cause progressive damage to a MOSFET, often with little noticeable temperature rise before failure. MOSFETs often carry a high peak-current rating, but these typically assume peak currents only lasting 300 µsec or so. It is particularly important to over-rate MOSFETs for peak current when they switch inductive loads.

When switching inductive loads there must be a path for back EMF to freewheel when the MOSFET switches off. Freewheeling is the sudden voltage spike seen across an inductive load when its supply voltage is suddenly interrupted. Enhancement mode MOSFETs incorporate a diode that provides this protection.

High-Q resonant circuits can store considerable energy in their inductance and capacitance. Under certain conditions, this high energy causes the current to freewheel through the internal body diodes of the MOSFETs as one MOSFET turns off and the other turns on. (An intrinsic body diode is formed in the body-drain p-n junction connected between the drain and source. In N-channel devices, the body diode anode connects to the drain.

The polarity is reversed in P-channel MOSFETs.) A problem can arise because of the slow turn-off (or reverse recovery) of the internal body diode when the opposing MOSFET tries to turn on. powerelectronictips.com | designworldonline.com

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MOSFET body diodes generally have a long reverse recovery time compared to the performance of the MOSFETs themselves. If the body diode of one MOSFET conducts when the opposing device is on, a short circuit arises resembling the shoot-through condition. The solution to this problem involves a Schottky diode and a fast-recovery diode. The Schottky diode connects in series with the MOSFET source and prevents the MOSFET body diode from ever being forward biased by the freewheeling current. The high-speed (fast recovery) diode connects in parallel with the MOSFET/Schottky pair. It lets the freewheeling current bypass the MOSFET and Schottky completely. This ensures the MOSFET body diode is never driven into conduction.

TRANSITIONS

A MOSFET dissipates little energy during its steady on and off states, but it dissipates considerable energy during times of a transition. Thus, it is desirable to switch as quickly as possible to minimize power dissipated.

Because the MOSFET gate is basically capacitive, it requires appreciable current pulses to charge and discharge

MOSFETs

the gate in a few tens of nanoseconds.

Peak gate currents can be as high as an ampere.

The high impedance of MOSFET inputs can lead to stability problems.

Under certain conditions, highvoltage MOSFETs can oscillate at high frequencies because of stray inductance and capacitance in the surrounding circuit (frequencies usually in the low megahertz range). Device manufacturers recommend that a lowimpedance gate-drive circuit be used to prevent stray signals from coupling to the MOSFET gate.

REFERENCES

ON Semiconductor onsemi.com

WHAT DO YOU THINK?

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Power Electronics

Measuring wireless charging efficiency in the real world JOHN PERZOW Wireless Power Consortium

When it comes to energy efficiency, there are significant differences in competing wireless charging methods.

T

here are a lot of claims made about the energy efficiency of wireless charging schemes. Engineers are understandably skeptical. After all, it is hard to envision how two induction coils sitting some distance away from each other could engage in energy efficient charging.

Fortunately, there is meaningful data available about wireless charging efficiency. It serves important purposes by helping decision makers assess different standards, and it enables informed choices regarding the deployment of a given standard. Additionally, efficiency data helps engineers and product designers determine which user benefits are worth the “cost” in terms of efficiency.

That said, it is true that there’s limited public data comparing the real-world power-transfer efficiency of different wireless power standards.

Wireless chargers are essentially power supplies, and power supply engineers generally assess the quality of a power supply by its efficiency over a load range. Consequently, wireless charging systems are often characterized by their efficiency at a given load current. This industry convention results in misleading and inaccurate characterizations of the performance of a power

supply that is designed specifically as a wireless charging system.

It is possible, however, to specify the efficiency of a wireless charger more accurately by comparing the total energy used by the battery over a complete charge cycle, to the energy into the wireless power transmitter over the same charge cycle.

Wireless charging for mobile consumer electronics has reached mainstream adoption, and a host of approaches in various stages of development and deployment have emerged that offer a range of benefits. Unfortunately, none of the various approaches are compatible nor are they interoperable. As designers consider incorporating wireless charging technology into their products, they must assess the benefits and tradeoffs of the available or emerging standards. The key tradeoff is efficiency versus a purported benefit. Without an industry consensus on how to measure efficiency, a basic design tradeoff cannot be assessed.

WHY DIFFERENT APPROACHES Closely-coupled configurations make up the lion’s share of the demand for wireless chargers. The classic example of this approach is that of a smartphone sitting in its wireless

Here are the tradeoffs of the various magnetic induction-based wireless charging approaches.

As of the writing of this article, there were no Rezence systems available in the market.

Claims of Rezence benefits are derived from publically-available marketing materials.

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Power Electronics

!

!

Measuring efficiency into a dc load at the output of the rectified receiver (dc input to dc out A in this figure) can also be high (>85% in the closely-coupled system and 75% in the loosely-coupled system). But this should not be construed as a predictor of overall system efficiency. Measurements at “dc out B” can be good proxies for realworld efficiency measurements, but output voltages and resistors need to be selected carefully to mimic the battery-charge cycle.

charging stand on a desktop. This mode results in maximum power transfer efficiency, lowest EMI/RFI/ EMF and lowest cost.

Loosely-coupled configurations are those characterized by a power transmitter mounting under, say, the surface of a desk, countertop or other furniture. The device-to-be-charged sits somewhere on the table surface.

Loose coupling approaches are useful in after-market installations of existing furniture and represent about 5 to 10% of the volume demand for wireless chargers. Of course, a loosely-coupled system has a greater charging distance. The cost of the approach is lower efficiency and a higher bill of materials. It is also more difficult to contain the EMI/RFI/EMF in a loosely-coupled system that is operating at high frequency.

With these two charging approaches in mind, consider the problem of useable efficiency data.

One difficulty is the lack of an agreed measurement method. We have

seen claims of coil-to-coil or “dc-in” to “dc-out” efficiency numbers, but these do not predict overall system performance.

For example, both closelycoupled (not operating in resonance) and loosely-coupled (operating in resonance) systems can hit coil-to-coil efficiencies in excess of 90%. This does not imply that the overall system efficiency is 90%, however, so this data point can be misleading.

Measuring efficiency into a dc load at the output of the rectified receiver can also result in a high reading (greater than 85% in the closely-coupled system and 75% in the loosely-coupled system). But again, this should not be construed as a predictor of overall system efficiency.

Measurements taken at the output of the power supply regulator can be a good proxy for real-world efficiency measurements, but output voltages and resistors used to simulate a real load must be selected to mimic the battery-charge cycle.

Researchers at Colorado State University used this topology in measuring the total energy efficiency of loosely- and closely-coupled wireless charging systems. The dc-to-dc post-regulator and the battery charger used were both switching topologies and selected for their best-in-class efficiency of 90% or better. A 2,100-mAh battery model was developed, which determined the load profile as depicted at right.

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!

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WIRELESS CHARGING

Researchers at Colorado State University mapped a 3D spatial dependence of the transfer efficiency for both loosely (right) and closely (left) coupled wireless charging systems. For ease of viewing, only half of the charging area is depicted in the map of tightly coupled efficiencies.

The Wireless Power Consortium, the organization behind the primary wireless charging standard called Qi (pronounced “chee”), commissioned a study at Colorado State University that examined the total energy efficiency between two types of wireless chargers: a loosely-coupled system with coils operating in mutual resonance at

6.78 MHz, and a closely-coupled system operating out of resonance at a switching frequency of 110 to 205 kHz. Both cases used a typical cellphone battery-charging configuration. The dc-to-dc post-regulator and the battery charger used were both switching topologies and selected for their best-in-class efficiency of 90% or better. A

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2,100-mAh battery model was developed, which determined the load profile.

As wireless charging systems let the user randomly place the receiver (phone) on the charging surface, the test also mapped a 3D spatial dependence of the transfer efficiency for each system. In both cases, the receiver was placed at

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A plot of the energy used by the battery and energy consumed by the two different wireless charging transmitters provides a feel for relative amounts of energy lost in looselyand closely-coupled charging systems. The closely-coupled system consumed 50% less energy than the looselycoupled system over the course of a 2,100-mAh battery charge.

taken in 2-mm increments over the load profile. If appropriate output impedances and voltages are used, it is easy to calculate the total energy for a chargecycle for each spatial cell.

Finally, the tests indicate it’s best to calculate total energy over a batterycharge cycle. The battery load profile describes the time-dependent battery voltage and current during a charge cycle, VB(t) and IB(t) and calculation of energy into the battery, EB, is as follows: At any time t in the charge-cycle, the battery receives an increment of energy from power P in time dt:

dEB (t) = P(t) dt = VB (t) IB (t) dt n

the optimal X-Y position and at a 5-mm coil-to-coil Z-distance. The efficiency measurements were then taken over a typical charge cycle (5 to 95%) of the battery. The results of the study went into a proposal for a technique to accurately assess the power transferefficiency of a wireless charging system.

The first proposal to come out of this work is that efficiency should be calculated as total energy into the battery divided by total energy into the transmitter over the battery charge cycle.

When a wireless power receiver directly drives a resistive load, the power transfer from the input of the transmitter to the resistive load is quite efficient, in some cases exceeding 90% for low-frequency systems.

However, tests show the total system efficiency can severely degrade when the receiver is configured for a typical battery-charging application. This is particularly true for high-frequency systems.

We attribute this power-transfer degradation to two primary mechanisms: (a) The high-frequency

system requires a relatively high receiver antenna impedance. And the range of receiver output voltages forces the (time-averaged) input impedance of the dc regulator into a point where the wireless transfer process is less efficient. (b) Switching losses in the high-frequency transmitter output transistors. Integrating the energy delivered to the battery and energy put into the transmitter over the time of a charge-cycle enables a realworld assessment of system efficiency.

The second proposal is that powertransfer efficiency measurements should be taken as a spatial average. Given the flux map characteristics of a given transmitter, the system efficiency can vary significantly over the charging area or charging volume. To mimic real-world use, efficiency measurements should be

n

Therefore, calculation of the energy delivered to the battery over a cycle is the integral of power, which for a discrete-time calculation, becomes a simple sum:

EB (t) = ∫ dEB (t) = cycle

∫ VB (t) IB (t) dt = n

cycle

∑ VB (tn) n

n

IB (tn) Δt

where Δt is the incremental step and tn ranges over the duration of the charge cycle. In our calculations, Δt is one minute and tn ranges from 1 to 150 (the programmed charge time). In a similar manner we can use efficiency versus load (battery) current, η (IB), to calculate the incremental energy source input dES that provides battery energy dEB as a function of current draw by the battery:

dEB (t)

VB (t) IB (t) dt = η (IB (t)) η (IB (t))

dES (t) =

As you might expect, closelycoupled charging systems have a higher power transfer efficiency than looselycoupled versions.

n

Thus charge cycle efficiency is obtained from: EB

η cycle =

ES

=

∑n VB (tn) IB (tn) Δt n

n

∑n [VB (tn) IB (tn)/η (IB (tn))] Δt n

n

EFFICIENCY COMPARISONS The point of this study is to make public the tradeoffs between different wireless charging approaches. The closely-coupled Qi system was designed from the start to be as efficient and inexpensive as possible. This approach 56

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WIRELESS CHARGING excels in most consumer applications where the transmitter and receiver lie in close proximity. Examples include charging stands for bedside tables, desktop charging pads, and through-hole chargers in public locations.

There are examples where extended distance between the receiver and transmitter is necessary, and it may be appropriate to sacrifice some efficiency in these applications. After-market furniture installations are the typical example.

The WPC approach has always been to give OEMs the ability to use whichever approach is most appropriate while maintaining full interoperability between Qi devices.

When using the charge-cycle efficiency calculation described above, it is possible to plot total energy versus time over the battery-charge cycle for each spatial cell in the charging area or charging volume. The closely-coupled system consumed 50% less energy than the loosely-coupled system over the course of a 2,100-mAh battery charge.

The high-frequency, loosely-coupled and the low-frequency, closely-coupled systems have different loss profiles.

Although the loosely-coupled system we tested uses gallium-nitride output transistors and zero-voltage switching, the high operating frequency of the architecture results in significant transmitter switching loss (greater than 800 mW). The value of operating in resonance, however, becomes evident where even at 20 mm, the loosely-coupled system shows relatively little coupling loss.

Another observed loss factor would best be described as a maximum powerpoint transfer (MPPT) problem. The characteristic impedance of the looselycoupled receiver antenna (about 24 Ω) is not well-matched to the load impedance (3.5 to 32 Ω) of the battery. Most systems will optimize this power-point for the maximum load condition (4.2 V, 1. 2 A, 3.5 Ω), but the total energy used is impacted by the significant time spent in lower load, higher impedance output conditions.

Armed with real data, it’s easy to see that it does not make sense to use a less efficient, high-frequency, loosely-coupled system when a closely-coupled approach powerelectronictips.com | designworldonline.com DESIGN WORLD — EE Network 57

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will do the job. Conversely, it is appropriate REFERENCES at times to sacrifice some efficiency when a larger Z-distance is needed. That is why Wireless Power Consortium a wireless power specification that meets wirelesspowerconsortium.com all market requirements must support both closelyand loosely-coupled approaches.

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Power Electronics

WHITE PAPER Digital Inrush Current Controller Reference Design

T

he Digital Inrush Current Controller reference design combines IXYS’ Digital Power Control technology with the capabilities of Zilog’s 8-bit Z8F3281 microcontroller, a member of the Z8 Encore! XP F6482 series of MCUs. It employs a unique approach to control inrush current in ac-to-dc rectifiers or ac-to-dc converters.

The objective of this reference design is twofold: to highlight the advantages of digital control that overcomes many of the shortcomings of current technology, and to enhance interest in digital control of high power converters, potentially stimulating the development of next generation converters. Digital control allows for distinctive solutions to control inrush current in a typical ac-to-dc rectifier with capacitive load by limiting the capacitor pre-charge current to a predetermined value at each half sine wave cycle. This capacitor charge is spread over a number of cycles until the capacitor is charged to a peak value of ac voltage source. The capacitor is charged according to a time-dependent pulse train.

Pulses are designed to provide substantially equal voltage increments applied to the capacitor to maintain peak charging current at approximately

the same value at each cycle. The number of cycles depends on capacitor value and charge current. For a given capacitor value, which is selected based on the desired amplitude of ripples, the charge current is a function of the number of pulses and their timing position with respect to the rectified sine wave.

This reference design features programmable overload protection and the Power Good status signal. It is not sensitive to power outages, brownouts and ambient temperature variations. This reference design has the ability to operate within an input voltage range of 80 to 240 Vac and load current up to 3 A. The entire operating process and essential values are fully programmable. The controller may be programmed to 50 or 60 Hz, or any other line input frequency operation.

This Digital Inrush Current Controller reference design is valuable for high-power loads with tens of amps of current in normal mode of operation. It allows users to optimize performance, maximize efficiency across the load range, and reduce the design time to market. IXYS power components handle the precharge of load capacitors at these values while limiting inrush current to controlled values.

Figure 1. Functional block diagram of the digital inrush controller

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WHITE PAPER

Figure 2. Digital inrush control timing

A basic example of the Digital Inrush Current Controller comprises components that include typical power components of an ac-to-dc rectifier (diode bridge, inductor and bulk capacitor), a switch to commutate capacitor pre-charging current, another switch to connect and disconnect the load, and a digital control module based on Zilog’s Z8F3281 MCU. THEORY OF OPERATION The Digital Inrush Control approach aims to provide charge to a bulk capacitor in substantially equal increments. This is accomplished by providing control pulses to Sw1, as shown in Figure 1, resulting in equal increments of a voltage applied to the bulk capacitor. It is possible to apply this charge on a cycle-by-cycle basis considering a cycle is half of a line voltage sine wave. For example, we can assign N cycles for the inrush control operation and then split the normalized amplitude of the sine wave cycle to N segments with increment of 1/N, as shown in Figure 2.

During Cycle 1, Sw1 is in the on state (conducting) from time t1 to T, as shown in Figure 2. The voltage across the capacitor increases to a voltage proportional to the normalized value 1/N. During this period, the charging current rise follows the LC resonant behavior, as shown in Figure 3 (green line). The current rises until the capacitor voltage reaches the input voltage, excluding voltage dropouts. The current continues its resonant behavior as long as Sw1 is on. No further oscillation occurs because the input voltage drops below the voltage on the capacitor, switching Sw1 to the off position (not conducting). The capacitor remains pre-charged to the voltage proportional to 1/N.

In Cycle 2, capacitor C is pre-charged by another voltage increment 1/N, in a process similar to Cycle 1.

Capacitor C is charged during N cycles to a voltage value proportional to the peak voltage value of the input power line.

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COMPOSING TIMING FOR DIGITAL INRUSH CONTROL A simplified timing diagram for inrush control is shown in Figure 2, in which the voltage increment for each cycle is defined by the number of cycles (N).

The capacitor’s charging current is proportional to the voltage increment, 1/N. Therefore, the number of cycles (N) is the variable used to control peak inrush current.

Another variable to control inrush current is the LC time constant. The value of capacitor C depends on the desired ripple value. After selecting the value of capacitor C, the designer can reduce peak inrush current by increasing inductance L. If there are physical limits to the L value, the number of cycles (N) should be used to set the required peak current.

Turn-on time for switch Sw1 should be defined for each active cycle. Assuming that delay from zero crossing (point 0 in Figure 2) to the beginning of turning Sw1 on, t4, is T_off, an active time to keep Sw1 on is T_on, and cycle duration is T. T_on for each occurrence i is defined as geometrical transform:

T_on(i)

=

T π/2

asin (i/N), where i = 1 ... N

(1)

where i = 1… N. The period (T) is measured by the MCU at initialization. Values for T_on are determined by (1) and stored in memory. Values for T_off are derived by firmware according to:

T_off = T – T_on

(2)

Figure 4 illustrates how T_on values are defined for 16 cycles used in this reference design for 120 V at 60 Hz. In Figure 4, the blue line (rectified power line voltage) is shown for reference. The magenta line represents actual T_on time value in microseconds for each cycle, and the yellow line indicates T_on pulse positioned relatively to rectified power line voltage.

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WHITE PAPER Figure 3. Capacitor C pre-charging during first two cycles

Figure 4. T_on timing generation: Blue—rectified power line voltage; Red—full cycle period timing counter; Yellow—driver to Sw1; Green—time off to Sw1; Magenta—time on to Sw1; White—period T

Figure 5. Capacitor C pre-charging: Blue—rectified power line voltage; Red—voltage on capacitor C with respect to common ground; Yellow— driver to Sw1; Green—capacitor current

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Figure 4 conceptually illustrates the algorithm functionality as executed by the Z8F3281 MCU. The timing counter (red line) corresponds to time at any given moment of discrete time base provided by the internal clock. The counter first counts until the T_off value, represented by the green line. When the counter reaches T_ off value, it initiates the T_on pulse (yellow line) which continues until the counter reaches T_on value (magenta line).

Figure 5 displays the timing position and amplitude of the capacitor current (green line) with respect to T_on pulses.

A single current pulse is produced by the inrush controller during a cycle because the input voltage drops below the capacitor voltage and the input power line is isolated from the rest of the circuitry through the diode bridge after the capacitor charge is completed. The inductor discharges into the capacitor, and Sw1 switch is turned off (not conducting) at the end of the cycle.

This reference design also includes a load on/off switch, Sw2, overload protection, and power-good status output to display the capability of IXYS power components. Sw2 activation is programmable and is enabled after the capacitor C pre-charge completes. The Sw2 switch activates at zero crossing on the next cycle after the capacitor is precharged.

In the simulation shown in Figure 5, the Sw2 switch is activated at time stamp 0.066 msec, when the capacitor current shows up as negative, because the current

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WHITE PAPER

WHITE PAPER

Figure 6: (Left) MCU module (Right) Main power board with MCU module

is sourced from the capacitor. Sw2 switch activation can be programmed to any time stamp point, depending on customer requirements.

The overload protection feature protects a device from damage in case of current overload. The overload threshold is programmable and is set to 3.5 A in this reference design. If overload is detected by a comparator, the MCU disconnects the load by turning the Sw2 and Sw1 switches off, preventing extra current from going into the load

Overload protection can be programmed either to immediately shut down the device and wait for user input, or to allow the device to restart after the short circuit is removed. In this case, the device is allowed to restart for a predetermined number of short circuit occurrences if the short circuit occurrences repeat.

In this mode of operation, the delay between restarts and the number of restarts is programmable. This reference design sets the delay time to 1.5 sec and the number of restarts to four.

Power-good status activation is also programmable. This reference design delays activation by two cycles after the capacitor’s pre-charge completes. The power-good status is not set if an overload is detected.

The Digital Inrush Current Controller implements the MCU module as an add-on device. The module consists of a connector for programming the microcontroller.

The MCU module is powered by an auxiliary power supply of 3.3 V for the MCU and 12 V for the gate driver applied to the J4 connector on the

main power board.

The main power board is a two-layer surface-mount device that provides easy access to test points.

Diode bridge BR1 and MOSFETs Q1 and Q2 mount on small heat sinks.

Power dissipated on these heat sinks is less than 5 W at a 375-W power output. This board may be powered from a 50- or 60-Hz ac source.

TESTING THE REFERENCE DESIGN For purposes of testing the design, the ac line input is fed through 0.5-kW isolation transformers. The load is designed to consume 2.5 A during normal operation. To test overload conditions, an additional load was used to provide 3.5 A. An instantaneous connection of additional load was enough to trigger overload protection. Continuous overload results in multiple attempts to restart the device with immediate interruption.

Auxiliary power supply should be turned on only after the ac power is

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on. Following a power-on reset and initialization, the MCU analyzes the power line, sets an appropriate timing, and begins pre-charging the bulk capacitor. Actual waveforms taken from a scope at normal operation are in Figure 8.

The inrush current (top blue line) is limited to 10 A. The yellow line shows the signal at the Sw1 gate. After the inrush procedure is completed, the gate is set to a high level to allow Sw1 to continue conducting. One cycle later, the load is connected and load voltage rises from zero to the level on the precharged capacitor.

After the load is connected, a slight drop in the rectified voltage occurs due to the limited power capability of the isolation transformer.

Tests were run to highlight the performance of increasing number of inrush control cycles at the same power conditions, Here, inrush current measurements were taken with the controller reprogrammed to 16 cycles

Figure 7. Digital inrush controller setup

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Figure 8. Scope snapshot of digital inrush current control: Blue—power line current (10 A/div); Red—load voltage (50 V/div); Green—rectified input voltage (50 V/div); Yellow—Sw1 commutation signal

Figure 9. Scope snapshot of inrush pulses with N increased to 16: Blue—power line current (10 A/div); Red—load voltage (50 V/div); Green—rectified input voltage (50 V/div); Yellow—driver to Sw1

instead of the original 8 cycles. As a result, the inrush current dropped two times, as shown in Figure 9.

Normal operation starts with precharging the bulk capacitor. A scope snapshot of the startup is shown in Figure 10 with a horizontal scale of one second.

The yellow line indicates that the gate driver state is wide because of the low graphic resolution for 12 cycles of precharge. After the inrush control sequence completes, the load is connected, indicated by the red line going up. The power-good status (blue line) goes up as well.

Continuous overload is applied at 2.3 sec. The load is disconnected and the power-good status goes low. An attempt

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Figure 10. Scope snapshot to show performance during overload and restart: Blue—power-good status; Red—load voltage (50 V/div); Yellow—driver to Sw1

to restart the device is initiated in 1.5-sec intervals. The inrush sequence takes place again, and the load is connected. However, the overload is sensed right away, the load is disconnected, and the power-good status continues to stay low. Another attempt to restart takes place after 1.5 sec and the load stays connected for about one second while there is no overload condition.

The efficiency of the Digital Inrush Controller is estimated starting after the

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diode rectifier to the load. At a load power of 375 W, the power loss is 2.1 W, which equates to an efficiency of 99.47%.

This reference design can be configured for different parameters, such as input voltage and frequency range; overload threshold; overload recovery time; number of overload events before shutdown; time position for power-good status; and time position to turn on the load. The firmware that controls the operations of this reference design was developed using Zilog’s development studio II

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Figure 11. Schematic diagram of digital inrush controller main board

(ZDS II – Z8 Encore! version 5.2.0).

Testing of this design confirmed that the inrush current is limited to a predefined value and the performance of the limiter is quite close to the simulation results. The measured efficiency of the inrush control path is 99.5%. This device is capable of working with a range of input voltages from 80 to 240 V. The tested power line frequency range was 50 to 60 Hz. A dedicated control pulse train was developed for each power line frequency.

To work with higher power line voltage, a longer control pulse train needs to be programmed. For instance, raising line voltage from 110 to 220 V required twice as much pre-charging time to have the same peak inrush current.

Overload protection is based on continuous monitoring of dynamic current from the bulk capacitor. In case of overload, the current drawn from the capacitor instantly increases and triples the comparator, thereby initiating system overload mode. The overload current threshold, number of overload instances, and period between overload events are all programmable. The option to turn the load on/off aids the overload mode of operation by disconnecting the load. Power-good status is not available in overload conditions.

The overload protection device is not sensitive to power interruptions, brownouts and temperature variations.

All in all, an innovative current measurement algorithm lets this controller

use common input and load grounds.

Users can optimize the device for a wide range of input voltages and frequencies.

The Digital Inrush Controller can be used as part of an ac-to-dc rectifier or can be expanded to higher-level devices such as a PFC converter. Digital control can be used to build a user interface that would allow users to change device parameters, gather statistics, add a communication interface, remotely monitor performance, or change parameters. EE

REFERENCES The source code file associated with this reference design, IXRD1001-SC01.zip, is available free for download from the IXYS Power and Zilog websites. This source code is tested with ZDS II – Z8 Encore! version 5.2.0.

Subsequent releases of ZDS II may require you to modify the code supplied with this reference design: ixyspower.com zilog.com

Figure 12. Schematic diagram of digital control module

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Documents associated with this reference design can be obtained from the IXYS or Zilog websites: Digital Inrush Controller Reference Design document, http://tinyurl.com/jxc4qox F6482 Series General-Purpose Flash Microcontroller Product Specification, http://tinyurl.com/oauvfvc F6482 Series Development Kit User Manual, http://tinyurl.com/jsrjkdn F6482 Series API Programmer’s Reference Manual, http://tinyurl.com/nqj7akg

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