p. 5 Editor’s Foreword MOSA Summit Review
@VitaTechnology
p. 6
VITA Standards Update
FALL 2023 | VOLUME 41 | NUMBER 2
2024 APPLICATION GUIDE p. 20
PG NUMBER
VSO: KEY PROJECTS
p. 8
WHY ARCHITECTURES MATTER
p. 12
ANNAPOLIS MICRO SYSTEMS
3U VPX HD Switch Doubles Backplane Density p. 20
ELECTRONIC SERVICE REQUESTED
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Advertiser Index Pg
Advertiser
1
Annapolis Micro Systems – 3U VPX HD Switch Doubles Backplane Density
3
Behlman Electronics, Inc. – When it comes to VPX, one company has the most flavors
24
Behlman Electronics, Inc. – 3 Phase. 3U. 1 Choice.
11
Elma Electronic – Ready to report for MOSA & CMOSS duty
VITA EDITORIAL DIRECTOR Jerry Gipper jerry.gipper@opensysmedia.com GROUP EDITORIAL DIRECTOR John McHale john.mchale@opensysmedia.com ASSISTANT MANAGING EDITOR Lisa Daigle lisa.daigle@opensysmedia.com TECHNOLOGY EDITOR – WASHINGTON BUREAU Dan Taylor dan.taylor@opensysmedia.com CREATIVE DIRECTOR Stephanie Sweet stephanie.sweet@opensysmedia.com WEB DEVELOPER Paul Nelson paul.nelson@opensysmedia.com EMAIL MARKETING SPECIALIST Drew Kaufman drew.kaufman@opensysmedia.com WEBCAST MANAGER Marvin Augustyn marvin.augustyn@opensysmedia.com
15
LCR Embedded Systems, Inc. – Develop. Demonstrate. Deploy.
17
Milpower Source – Your design partner for field-proven MIL-grade power & networking solutions
SALES/MARKETING DIRECTOR OF SALES Tom Varcie tom.varcie@opensysmedia.com (734) 748-9660 STRATEGIC ACCOUNT MANAGER Rebecca Barker rebecca.barker@opensysmedia.com (281) 724-8021 STRATEGIC ACCOUNT MANAGER Bill Barron bill.barron@opensysmedia.com (516) 376-9838
Profile Index Advertiser
Page
COMMUNICATIONS Interface Concept
20
STRATEGIC ACCOUNT MANAGER Kathleen Wackowski kathleen.wackowski@opensysmedia.com (978) 888-7367 SOUTHERN CAL REGIONAL SALES MANAGER Len Pettek len.pettek@opensysmedia.com (805) 231-9582 DIRECTOR OF SALES ENABLEMENT Barbara Quinlan barbara.quinlan@opensysmedia.com AND PRODUCT MARKETING (480) 236-8818
RADAR/ELECTRONIC WARFARE Sponsored by Annapolis Micro Systems and TechwaY
INSIDE SALES Amy Russell amy.russell@opensysmedia.com
Annapolis Micro Systems
20
Interface Concept
20
TechwaY
21
RUGGED Curtiss-Wright
21
Concurrent Technologies UNMANNED SYSTEMS Dawn VME Products
STRATEGIC ACCOUNT MANAGER Lesley Harmoning lesley.harmoning@opensysmedia.com EUROPEAN ACCOUNT MANAGER Jill Thibert jill.thibert@opensysmedia.com TAIWAN SALES ACCOUNT MANAGER Patty Wu patty.wu@opensysmedia.com CHINA SALES ACCOUNT MANAGER Judy Wang judywang2000@vip.126.com
22 22
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PRESIDENT Patrick Hopper patrick.hopper@opensysmedia.com EXECUTIVE VICE PRESIDENT John McHale john.mchale@opensysmedia.com
EVENTS
EXECUTIVE VICE PRESIDENT AND ECD BRAND DIRECTOR Rich Nass rich.nass@opensysmedia.com
Embedded Tech Trends January 22-23, 2024 Fort Lauderdale, FL https://www.vita.com/event-5254913
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When it comes to VPX, one company has the most flavorS
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FALL 2023 | VOLUME 41 | NUMBER 2
@VitaTechnology
FEATURES
p. 8
Special Feature
8
VITA Standards Organization: Key projects
VITA Standards Organization high-profile projects By Jerry Gipper, VITA Editorial Director
Technology Feature
100G technology for VPX
12 100 Gbps processing: Why architectures matter By Aaron Frank, Curtiss-Wright Defense Solutions
VITA Standards Organization high-profile projects By Jerry Gipper, VITA Editorial Director p. 12
Technology Feature
18
OpenVPX and military computing
The importance of OpenVPX in military computing By Dan Taylor, MES Technology Editor
DEPARTMENTS
5 Editor’s Foreword
Jerry Gipper
6
VITA Standards Update
Jerry Gipper
20
VITA TECHNOLOGIES APPLICATION GUIDE
MOSA Summit review 100 Gbps processing: Why architectures matter By Aaron Frank, Curtiss-Wright Defense Solutions p. 18
VITA standards activity updates
On the cover The 2024 VITA Technologies Application Guide highlights technologies and products based on VITA standards. Featured on the cover: the rugged Annapolis Micro Systems 3U VPX HD switch.
The importance of OpenVPX in military computing By Dan Taylor, MES Technology Editor
To unsubscribe, email your name, address, and subscription number as it appears on the label to: subscriptions@opensysmedia.com
All registered brands and trademarks within VITA Technologies magazine are the property of their respective owners. ™VPX and its logo is a registered product/trademark of VITA. © 2023 OpenSystems Media © 2023 VITA Technologies enviroink.indd 1
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Editor’s Foreword
MOSA Summit review By Jerry Gipper The premiere Modular Open System Approach (MOSA) Summit and Expo was held in Atlanta on September 18 and 19, 2023. The agenda for this first-ever MOSA Summit was packed with keynote speakers and presentations on all aspects of the modular open systems approach. I attended many of the keynote sessions to get a feel for what others were saying about the industry. The keynote speakers solidly represented various defense departments and companies in the industry. From the tone of the event, it is clearly evident that MOSA is being embraced throughout the defense industry. While there continue to be pockets of resistance, the overall indicators show a very positive move to modular open systems approach. The exhibition area was filled with suppliers and developers showing their latest wares capable of meeting MOSA directives. Several live demonstrations showed attendees the benefit of designing with MOSA. I was impressed with the crowd on the exhibition floor, and bringing in a complimentary lunch certainly helped. I talked with many of the exhibitors, all of whom were pleasantly impressed with the quantity and quality of discussions they were having with attendees. Everyone at the Summit was on a mission to learn what they could about MOSA and the current state of affairs. This level of engagement further indicates that the industry is solid and heading in the right direction. The only negative feedback I heard pertained to the always-present dissatisfaction of how long it takes to get from concept to deployment. The critical embedded computing industry is certainly not for those in the race to riches, as it can take years to reap the rewards – as anyone that has been in this industry for any time realizes. The two-day agenda (events.techconnect.org/MOSA_ 2023/detail.html) was packed with topics ranging from acquisition to standards. The breadth of subjects covered was incredible and even overwhelming to the less initiated. Even I – a seasoned veteran of MOSA – found much to learn about the ecosystem and state of affairs. There was ample opportunity for attendees to meet with subject-matter experts on all aspects of MOSA. Representation from FACE and SOSA, both Open Group organizations, were present at the summit; both consortia held their regular meetings after the MOSA Summit. SOSA used the event to conduct its annual technical interchange meeting, hosting www.vita-technologies.com
demonstrations on the exhibition floor and technical paper presentations at the sessions. The work that these organizations have performed has directly impacted the positive shift to embracing a MOSA mentality. They have corralled existing technology and standards in a way that is starting to pay off for everyone. There is still much that needs to be done, but the ship is moving in the right direction and at a speed that might satisfy some of those in a hurry to garnish the riches.
@VitaTechnology
Jerry@Vita.com
FROM THE TONE OF THE EVENT, IT IS CLEARLY EVIDENT THAT MOSA IS BEING EMBRACED THROUGHOUT THE DEFENSE INDUSTRY. While most of the focus has been on U.S. domestic adoption of MOSA, interest is rising in other parts of the world as well. Defense contractors worldwide face rising cost and system complexity; they see MOSA as a way forward in their own programs. Several of the keynote speakers as well as summit attendees represented international efforts. I look forward to next year’s event for further updates and news on MOSA. In this issue of VITA Technologies, we will take a look at key working group efforts that will influence the VITA technology and standards roadmap. Several VITA working groups are deep into developing new standards that address the next wave of smaller and faster critical embedded computing solutions. The challenge ratchets up at every generation and these projects are no exception. Rock ‘n Gipp arrived in September! My wife and I have been learning all we can before we start our Great Loop adventure in December. Boats today come loaded with all sorts of electronics – chart plotter, radar, sonar, engine monitoring, communications, and entertainment systems, all networked together. We have battery, solar, and shore power options that must all work as one. Our phones are loaded with apps that help with weather, navigation, logistics, communications, and social media. My computing background is certainly going to come in handy! Fair Winds and Following Seas! VITA Technologies with Application Guide Fall 2023 | 5
VITA Standards Update
VITA standards activity updates By Jerry Gipper, Editorial Director Note: This update is based on the results of the November 2023 VITA Standards Organization (VSO) meeting, held in West Palm Beach, Florida, and hosted by Amphenol SV Microwave. Contact VITA if you are interested in participating in any of these working groups. The full reports can be accessed at www.vita.com/ StandardsUpdates. Visit the VITA website (www.vita.com) for details on upcoming VITA meetings.
ANSI accreditation
Accredited as an American National Standards Institute (ANSI) developer, VITA provides its members with the ability to develop and promote open technology standards. The following standards have recently been ANSIand VITA-approved via public VITA consensus ballot: › ANSI/VITA 46.0-2023, VPX Baseline Standard (revision) › ANSI/VITA 48.7-2023, Mechanical Standard for VPX REDI Air Flow-By™ Cooling (revision) All published standards are available for download by VITA members and are posted at the online VITA Store for purchase by nonmembers.
VSO study and working group activities
the VITA online store. The plan is to c omplete the ANSI process and release once further connector qualification testing is completed.
Draft/VITA 47.1-202x: Common Requirements for Environments, Design and Construction, Safety, and Quality Standard
Abstract: The VITA 47 group of standards defines environmental, design and construction, safety, and quality requirements for commercial off-theshelf (COTS) Plug-In Modules intended for ground and aerospace applications. VITA 47.1 addresses requirements common across the VITA 47 group of standards. This revision updates the operating and non-operating temperature requirements, adds cold wall requirements for VITA 48.2 conduction-cooled Plug-In Modules, and adds additional temperature cycling and cold start requirements. Status: The working group is making updates to the family of standards to add new requirements.
Standards within VITA may be initiated through the formation of a study group and developed by a working group. A study group requires the sponsorship of one VITA member, while a working group requires sponsorship of at least three VITA members.
Draft/VITA 48.x-202x: VPX REDI: Cooling
Several working groups have current projects underway. Here’s a roundup of these projects:
Status: Several of the standards in this series are being updated to allow for a 100-mm-deep, 1.2-inchpitch VPX module, or other updates.
Draft/VITA 46.31: Higher Data Rate VPX – Solder Tail in Blind Via
Abstract: This document defines a standard for a VPX connector that supports higher data rates, to at least 25 Gbaud – for protocols such as 100GBASE KR4 Ethernet and PCIe Gen 4. The connectors feature a short solder tail intended to be soldered into a blind via. The higher-data-rate connectors compliant to VITA 46.31 are intermateable to legacy VITA 46.0 connectors and follow the same form factor. Status: VITA 46.31 is approved for VITA Standard Draft Trial Use available to VITA members and is available at
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Abstract: The VITA 48 standards provide an overview of the associated plug-in units for air cooling, conduction cooling, and liquid-flow-thru (LFT) and spraycooling applications.
VITA 51.4: Reliability Component Derating
Abstract: The goal of this working group is to develop a new component derating standard. Status: This working group has joined forces with the IEEE to jointly develop this standard under IEEE-2818. The working group is in public consensus ballot.
VITA 65.x: OpenVPX System Standard
Abstract: The OpenVPX standard uses plug-in module mechanical, connectors, thermal, communications protocols, utility, and power definitions provided www.vita-technologies.com
by specific VITA standards to define a series of slot, backplane, module, and standard development chassis profiles.
options for 12 or 24 fibers per MT and for physical contact or lensed MT.
Status: The working group is adding additional profiles to this standard.
Status: The working group is reviewing a draft document.
ANSI/VITA 67.3-2020: VPX: Coaxial Interconnect on VPX, Spring-Loaded Contact on Backplane
Abstract: The VITA 89 MT circular connector standard defines a standard for circular connectors with optical MT. Circular connector shells are compliant to MIL-STD-38999. MT offers options for 48 fibers per MT and for physical contact or lensed MT.
Abstract: The VITA 67.3 standard defines an open standard for configuration and interconnect (within the structure of VITA 67.0) enabling an interface compatible with VITA 46 containing multiposition blind-mate analog connectors with coaxial contacts, having fixed contacts on the plug-in module and spring action on the backplane. Status: The standard is in public consensus ballot.
VITA 68.x: Reference SI Model Standard for Gen 4 and Higher Speeds
Draft/VITA 89: MT Circular Connectors – Type 2
Status: The working group is reviewing a draft document.
Draft/VITA 90.x: VNX+
Abstract: The VITA 90.x (VNX+) family of standards builds on the foundation established by VITA 74 VNX. VNX+ significantly increases performance and system versatility beyond VITA 74, while following its mechanical framework.
Abstract: This family of standards documents a reference model approach for OpenVPX Signal Integrity compliance at baud rates above 10.3125 Gbaud. It defines reference OpenVPX Plug-In Module and backplane s-parameter models that can be used to create end-end OpenVPX reference channels in conjunction with reference VPX connector and device s-parameter models.
Status: Working groups developing drafts for each level of VNX+.
Status: The working group is addressing signal integrity compliance for Gen4 and higher speeds for VPX and making general updates to remove errata from previous releases.
Status: The working group is reviewing a draft document.
Draft/VITA 78.0-2022 Revision: SpaceVPX System
Abstract: This document describes an open standard for creating high-performance fault-tolerant interoperable backplanes and modules to assemble electronic systems for spacecraft and other high-availability applications. Such systems support a wide variety of use cases across the aerospace community. This standard leverages the OpenVPX standards family and the commercial infrastructure that supports these standards. Status: The working group is evaluating options to support for SpaceFibre, updates for PCIe and system management, and aligning with requirements from the Space Power Consortium.
Draft/VITA 91: Connector for Higher Density VITA 46 Applications
Abstract: This standard defines a connector system that provides higher pin density to the backplane for VITA 46 3U and 6U VPX applications.
Draft/VITA 92: High Performance Cable – Ruggedized 10 Gbaud Bulkhead High Speed, D-Sub, Rectangular Connector for Copper Cables
Abstract: This standard defines a rugged standardized 10 Gbaud interconnect system with a high pin count and high- density, lightweight, rectangular connector (meets MIL-DTL24308 physical envelope) for I/O. It can support multiple high- bandwidth protocols and power while optimizing SWaP [size, weight, and power] benefits in smaller systems with limited panel space availability. Status: The working group is reviewing a draft document.
Draft/VITA 93.x: QMC – Small Form Factor Mezzanine
Status: The working group was launched in March and is developing a draft document.
Abstract: This standard defines a Small Form Factor mezzanine (SFFm) that is significantly smaller than XMC with host and I/O interface connectors. The host interface supports modern high-speed serial fabrics. The I/O interface supports either front-panel or backplane I/O. Multiple SFFm modules can be installed on various carrier-card form factors including 3U/6U Eurocards (VPX, cPCI, VME, etc.), VNX+, PCIe expansion cards, and others. It is suitable for deployment in commercial, industrial, space, or military-grade rugged environments with air-cooled or conduction-cooled formats.
Draft/VITA 87: MT Circular Connectors – Type 1
Status: The working group is developing draft documents.
Draft/VITA 86-2019 Revision: High Voltage Input Sealed Connector Power Supply
Abstract: This standard defines an environmentally sealed connector pair which is compatible with the backplane footprint as defined in VITA 62.0 for 3U power supplies operating in harsh environments operating off of a high-voltage input.
Abstract: The VITA 87 MT circular connector standard defines a standard for circular connectors with optical MT. Circular connector shells are compliant to MIL-STD-38999. MT offers www.vita-technologies.com
For a complete list of VITA standards available for purchase and their status, go to www.vita.com/Standards. VITA Technologies with Application Guide Fall 2023 | 7
SPECIAL FEATURE
VITA Standards Organization: Key projects
VITA Standards Organization high-profile projects By Jerry Gipper, VITA Editorial Director
The work that VITA member company technologists are putting into new standards development projects is immeasurable. It takes special attention to detail and knowledge of the technology and industry to develop the level of standards necessary for this industry. This article is going to dive into behind-the-scenes details on three key projects, highlighting just how difficult it is to develop these standards.
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Going into the November VITA Standards Organization (VSO) meeting, more than 30 active study and working groups were busy defining new standards or making significant revisions to existing VITA standards. While this is a slightly higher number of active groups than normal, it is certainly not out of the typical workload. What is significant, however, is that several working groups are involved in high-profile projects that have the potential to make a major impact on the critical and intelligent embedded computing industry in the coming years. High-profile projects are much more challenging to shepherd through the standards development process required by VITA. Considering that most, if not all, of the contributors do this work in their spare time, it is amazing that the projects move to completion as fast as they do. The current list of active projects includes efforts focused on refining and defining standards for the following: › Improved definition of operating environments and reliability requirements for critical embedded computing systems. › New connector standards for: 1. Power-supply connections 2. Optical connectors 3. Higher performance and density connectors for existing standards › Signal integrity. › Space applications. The status for these projects is included in the “VITA standards activity updates” column on page 6.
High-profile projects
Three of the active projects are much larger than the rest. Two are next-generation efforts from existing standards. VITA 90 (VNX+) leverages VITA 74 (VNX) to develop a higher-performance version of VNX. VPX Expanded is a study group that is determining what the next generation of the popular VPX standard should look like. The third is an entirely new standard family for a rugged small mezzanine card. Each requires a considerable amount of time and effort to be developed and finalized as an approved VITA standard.
VITA 90 (VNX+)
VITA 74 VNX has been around since 2010 when it was first proposed by Themis Computers (now part of Mercury Systems) as an enhanced small-form-factor system to meet the growing needs of improving size, weight, and power (SWaP) in a rugged, low-cost, fast serial fabric interconnect-based plug-in module. It has gained limited traction in rugged computing applications, providing an attractive solution for platforms needing smaller than 3U solutions. It was limited in performance headroom and other key areas, so the VNX community opened up the standard to take it to the next level. Thus was born VNX+. While VITA 90 VNX+ is a small form factor, it is extremely complex with a wide range of capabilities unique to this form factor. The goal of the VITA 90 VNX+ family of standards is to build on the foundation established by VITA 74 VNX. The working group has been improving performance capability while at the same time filling in gaps in the family of standards that were not addressed or completed in the original VNX release. VNX+ significantly increases performance and system versatility beyond VITA 74, while following its smaller mechanical framework. In the early days of the original VNX working group, the participation consisted of a small number of small companies that could move fairly quickly in making decisions pertaining to the standard. Under the new VNX+, the interest level has dramatically increased, along with the drama of completing the standards. The working group has benefited from the increased pool of subject-matter experts participating in www.vita-technologies.com
the development efforts; at the same time, the discussions are more complex and it is much more difficult to reach consensus! To add to the challenge, companies developing products around the future VNX+ standard are anxious to see a completed set of documents stamped with the VITA approval. Multiple working groups have been established to develop standards for the various aspects of VNX+. Originally one editor was assigned to the entire suite of dot-standards. Recently the decision was made to assign more editors and giving each of them specific dot-standards to draft. The work as an editor for projects of this size is extremely challenging, requiring a large amount of time to gather inputs, resolve issues, and document the results. These recent changes should enable the working groups to keep moving quickly towards their desired time goals. The small form factor and system-level focus of VNX+ makes it a very appealing solution for a broad range of industries dependent on critical embedded computing. Companies supporting transportation, defense, and space applications are contributing to the development of these standards.
VITA 93
Mezzanine standards have been around for decades, designed to augment board products that need the ability to add or exchange features. VITA has several mezzanine standards in its repertoire: IP Modules, M-Modules, PMC, XMC, and FMC. VITA 93 is extending to an even smaller size by taking advantage of today’s smaller electronics and is developing a mezzanine form factor that has only recently been possible for the critical embedded computing industry. VITA 93 defines a small-form-factor mezzanine that is significantly smaller than XMC, with both host and I/O interface connectors. The host interface supports modern high-speed serial fabrics for connectivity. Multiple modules can be installed on various carrier card form factors, including 3U/6U Eurocards (VPX, CompactPCI, VME), VNX+, PCIe expansion cards, and many others. It is suitable
VITA Technologies with Application Guide Fall 2023 | 9
SPECIAL FEATURE
for deployment in commercial, industrial, space, or military-grade rugged environments with air-cooled or conduction-cooled formats. This working group originally started out in 2022 as the VITA 85.109 study group formed to gather requirements from invested participants in the mezzanine supply chain. The study group was chartered to study and document the concept of a new Small Form Factor Mezzanine (SFFm) with certain characteristics not currently addressed by existing mezzanine standards. This was driven by a market need for a mezzanine with the following basic characteristics: › Significantly smaller than XMC (specifically to be accommodated on the VITA 90 VNX+ form factor which was too small to accommodate any of modern VITA mezzanines). › Providing two interfaces: 1. A host/primary interface, supporting PCIe speeds beyond Gen2. 2. An I/O/secondary interface, to support either front-panel or backplane I/O. › Able to be hosted on a range of carrier cards. › Able to be deployed in either commercial, industrial, or military-grade rugged environments. It was also desirable to make this new standard as broadly appealing as possible to multiple markets in order to drive up adoption, thus driving down costs and ultimately end-user prices. The study group met frequently to gather data and discuss options before finally releasing a 56-page report to the VSO that documented the requirements that the
VITA Standards Organization: Key projects
new standard must meet, trade study details, and their recommendations for the new standard. Early in 2023, the study group moved to working group status to begin putting pen to paper to create a draft standard. The working group has since been moving quickly to create a draft document as they sort through the many views on how to solve the challenges needed to be overcome to meet the agreed set of requirements put together by the study group. The level of collaboration in the working group has really had a positive impact on progress. The resulting standard is bound to open new opportunities for mezzanines to improve the capabilities of board-level products in the coming years.
VPX Expanded
Following up on defining what is next for VPX is perhaps the biggest challenge for VITA members participating in
SOSA and CMOSS: Driving interoperability Sponsored by Curtiss-Wright and New Wave Design and Verification Processor-intensive applications require a great deal of computing horsepower and I/O bandwidth. The VPX standard from VITA is a ruggedized approach to embedded computing that aims to satisfy these high-speed processing needs in harsh environments such as flight, ground defense, and other military applications as well as similar processing-intensive applications in rail and commercial transportation, imaging, security, and space. In this webcast, VPX experts will detail how the VPX standard and ecosystem enables high-performance computing in mission-critical applications. (This is an archived event.) Watch the webcast: https://tinyurl.com/2te7j77t
WATCH MORE WEBCASTS:
https://militaryembedded.com/webcasts/ 10 | VITA Technologies with Application Guide Fall 2023
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the VPX ecosystem. VPX has now been around since 2004 and is widely used in the defense industry. It is a complex and expensive technology, but has capabilities found nowhere else in the critical embedded computing industry. VPX in its current form is bound to be with us for decades, but even so a roadmap for performance and capability improvements is necessary. A study group was formed in 2022 to begin defining the steps and requirements for VPX Expanded. Besides incorporating new technologies, the study group is taking lessons learned from VPX and mapping those against future requirements to determine the best course of action.
meeting all the essential requirements defined by the study group. It is anticipated that this study group will be moving to working groups status in the very near future. The working group is about to lock down the documented requirements so it can complete a study report. The next step will be to form a working group to begin a draft document.
Summary
These projects require a lot of time from the working group participants. Constructive collaboration is a common element of each working group: Each working group chairperson is challenged with keeping all contributors in unison. Hearing out all inputs, discussion, and comments, and then making a decision takes a lot of diplomacy and patience. All of them are under a lot of pressure to produce a document that can be used to start making prototypes critical to proving out the draft standards, making the job even more difficult. They should all be commended for their dedication to the standards working group efforts.
The goals set by this study group are to define a solution to expand VPX: › Double the pin density over the current VPX connectors while keeping the connector length the same. › Support 100G x 4 at 400 G-baud for the switched serial fabric protocols utilized. › Improve the P0 connector power capacity to 500 watts and more. The group desires to leverage existing designs as much as possible. VMEbus was able to maintain a high degree of backwards compatibility over the evolution of the standard. VPX is not going to have that luxury and will require more significant upgrades. There will likely be certain design aspects that can be rolled over to the next generation of products, but new board layouts and backplanes are certainly going to be needed. The popularity of VPX has attracted many more players to the ecosystem, thus making the next generation even harder to define quickly. Other consortia and standards bodies using VPX are closely monitoring the group’s progress, providing early feedback that should help guide many of the most challenging decisions, especially those related to performance and I/O capability. As is typical for efforts of this type, most of the discussion at this stage is focused on connector options. The right connector for the backplane interface is critical to www.vita-technologies.com
Ready to report for MOSA & CMOSS Duty
From development to deployment: backplane includes slot profiles aligned to SOSATM 1.0 and CMOSS, and you get the latest in VITA 46.11 chassis management, air or conduction cooled guides, integration of wide range of ecosystem plug-in cards, and so much more from your reliable solution partner.
With you at every stage! Elma Electronic Inc.
elma.com
VITA Technologies with Application Guide Fall 2023 | 11
100G technology for VPX
TECHNOLOGY FEATURE
100 GBPS PROCESSING: Why architectures matter By Aaron Frank
High-performance embedded module and system designers must understand the technical considerations required to fully realize the true benefits of 100G technology. In the context of 100 Gbps technology for the VPX ecosystem, simply stating that a module or system supports 100 Gbps is, by itself, insufficient for ensuring the full benefits of the claim. If a vendor’s datasheet for a VPX plug-in card (PIC) or system states 100 Gbps support but is unable to fully utilize the potential of this high-speed connectivity, that claim – while while perhaps technically accurate – overstates the product’s ability to deliver the full benefits that 100 Gbps promises. At face value, a vendor’s claim to support 100 Gbps technology implies 2.5 times faster <something> compared to 40 Gbps technology, and 10 times faster
<something> compared to 10 Gbps technology. In an ideal world, the mathematical relationship between 100 and 40 will result in 2.5 times better performance. Likewise, 100 to 10 should yield a 10-time performance increase. Unfortunately, the real world does not work like that. A 16-core laptop processor does not allow a person to work 4 times faster when editing documents compared to their previous 4-core laptop.
Applications matter most
What that faster <something> is, as referred to above, will depend on what an application is trying to do. When referring to a specific Ethernet interconnect technology, the <something> might be, for example, data-carrying speed. But data-carrying speed does not translate directly into what the new higher-speed technology truly offers the end user. We could substitute the term “performance” for <something>, but again, performance is meaningless without context to its application and end purpose. In the context of embedded computing for the defense and aerospace industry, the never-satisfied quest for higher performance tends to focus on three main areas of improvement:
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TECHNOLOGY FEATURE
1. Faster time to solution: This means answers are derived faster. For example, if a targeting system can pinpoint and identify a target quicker, it may be able to implement countermeasures quicker. And in an environment where seconds or even milliseconds matter and lives are at stake, faster time to solution has significant and measurable benefits. 2. Higher-fidelity information: In imaging systems such as radar and visual/camera systems, higher fidelity may mean higher resolution (such as 4K or 8K images instead of HD), or it may mean real-time motion video (such as 120 fps for smooth lower-latency real-time motion, instead of 15 fps). Enhanced fidelity enables personnel or automated vision systems to see farther with more clarity, which ultimately leads to earlier and more informed decision-making. 3. Higher levels of integration: In today’s connected battlespace, information sharing and data integration are some of the most important pillars of growth. Within a platform and between platforms, data integration allows a diverse range of sensors and processing
systems to share situational information, coordinate tactical actions, and achieve more desirable outcomes. In the context of the connected battlefield, information integration is paramount for mission success. For each of these three areas of potential system improvement, an Ethernet connection forms only part of the overall system operation, so a faster Ethernet connection can only provide part of the overall improvement equation. For sensor processing systems, faster sensor connections may bring more sensor data to the sensor processor, but that does not ensure the sensor processor can fully process all the captured data. While the information highway may be able to carry more information traffic for interconnected systems, it does not ensure that connected systems can use all of the potential flood of available information. Figure 1 is a simplified example showing where Ethernet can be used both to connect sensors to processing systems and to interconnect multiple processing systems together to share information. While all these Ethernet connections are candidates for increased 100 Gbps data rates, we must consider the characteristics of the data each of these connections carries and how any increase in Ethernet speed can benefit a particular application, a subsystem, or the entire system of systems.
SOSA understands TCP vs. UDP
The Open Group Sensor Open Systems Architecture (SOSA) has gained considerable industry acceptance as the go-to for system architectures. Within the SOSA Technical Standard there are observations and recommendations reinforcing the notion that TCP [transmission control protocol] incurs considerably more overhead than UDP [user datagram protocol] for high-bandwidth data-moving applications. The SOSA Technical Standard defines Support Level Ethernet 1 (SLE1) as optimized for control applications and mandates a full TCP Ethernet stack, whereas Support Level Ethernet 2 (SLE2) is optimized for high-bandwidth data applications and recommends using the UDP protocol and jumbo packets. It also observes that SLE2 (using UDP) may be required for low-latency message use.
Figure 1 | System of systems showing Ethernet connections www.vita-technologies.com
VITA Technologies with Application Guide Fall 2023 | 13
TECHNOLOGY FEATURE
Takeaway: Real-time sensor data is best suited for UDP protocol for reduced latency, while control functions require TCP for reliability. Specialized processors, such as FPGAs, and derivatives, such as AMD’s MPSoC and adaptive SoC devices, excel at streaming and processing the extremely high-throughput signals generated by modern radar, video, signals intelligence, and similar sensors. By tightly coupling programmable logic (PL) to one or more Ethernet interfaces, it is possible to operate at close to theoretical throughput limits if so desired. However, complex protocols, including TCP/IP, are not readily or efficiently implemented in PL logic, which is a major reason why SOSA’s UDP-based SLE2 is preferred for streaming.
Data-buffer management and RDMA
Consider an application example where we want to send a large amount of data across the network. In this example, we’ll move 100 MB of data across a 100 Gbps Ethernet connection. Using quick math, one might expect to transfer this data in 8 milliseconds (ms). How realistic is this? First, we cannot send the full 100 MB of data in a single Ethernet packet. Ethernet packets range in size from 46 up to 1,500 payload bytes for standard packets or 9,000 payload bytes if jumbo packets are configured. Our 100 MB of data will be broken down into 68,267 standard packets or 11,378 jumbo packets, each of which must be individually packaged and sent. The network stack will take several sequential steps to package the data and eventually pass the data to the Ethernet kernel driver, which will send it packet-by-packet to the Ethernet NIC [network interface controller] for transmission. The bottom four layers of the OSI stack alone typically perform at least two data-buffer copy operations, each of which will take time and consume CPU cycles. Overall, between three and six data-buffer copy operations will be performed, with some implementations being better than others. The final step of transferring the packet from the kernel driver to the Ethernet NIC is often performed using DMA operations, which simply frees up CPU cycles from the task. In a TCP/IP network operating over an unreliable Ethernet link, each layer serves a particular purpose and should not be bypassed. However, in a well-controlled reliable network, bypassing some of these layers to eliminate unnecessary overhead and increase efficiency may be desirable. Remote DMA (RDMA) is a technology that does this; it bypasses several of the OSI layers and performs the DMA transfer directly between the application data structures and the Ethernet NIC device. RDMA is often referred to as having “zero-copy” data transfers. Figure 2 illustrates the data-handling
100G technology for VPX operations for a standard TCP/IP network stack on the left and an RDMA network stack on the right. With its reduced overhead for data copying and packet processing, the main benefits of RDMA network stacks are their ability to free up valuable CPU cycles for other tasks while reducing latency and improving overall network performance. RDMA is best suited for applications that send large chunks of data from node to node in reliable networks. For this reason, it has gained mainstream acceptance in data centers and storage area networks. For applications that need to process the content of packets on a more granular level or when operating in a potentially unreliable network, non-RDMA TCP/IP stacks remain the more appropriate choice. It is worth noting that RDMA operations take overhead time to set up. For large data transfers, this overhead is a small price to pay for the time savings spread across the entire large data transfer. However, for small messages, the overhead time needed to set up RDMA operations can easily exceed the nonRDMA data buffer processing times. RDMA operations are thus rarely used for small latency-sensitive messages. Takeaway: Choosing the right network protocol can have a significant effect on message latency and CPU utilization.
Processing 100 Gbps streams of Big Data
Figure 2 | Simplified view of data passing in a Linux operating system for TCP/IP vs. RDMA operations.
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Very few applications generate or consume 100 Gbps of data. Mathematically, 100 Gbps equates to roughly 10 GBytes (GB) of data per second. In context, a modern processor with a 64-bit DDR4 memory subsystem operating at 2,400 MT/sec can only transfer data to or from its high-speed DRAM memory at a theoretical maximum of 19 Gbps, meaning just reading or writing a 100 Gbps data stream will consume over half of a 64-bit modern memory channel’s bandwidth under ideal conditions. Under real-world conditions, the 10 GBps data stream will consume closer to 60% to 70% of the available memory bandwidth. So how www.vita-technologies.com
can a modern processor provide or consume data at these incredibly high rates?
Memory architectures matter
Many modern processors have more than one DRAM memory channel. In the Intel processor family, the mainstream “Core” processor families, such as Core i7 or Xeon E/W/H families, have two independent 64-bit memory channels. This means they can provide double the memory throughput compared to a single memory channel processor and simultaneously process two independent memory access streams. For a 2-channel DDR4 @ 2,400 MT/s memory subsystem, supporting a fully utilized 100 Gbps data stream will consume less than 35% of the real-world memory bandwidth. For newer dual-channel DDR5 @ 4,800 MT/s processors such as the 13th-gen Raptor Lake H family, a sustained 100 Gbps data stream will consume less than 18% of the memory bandwidth. The Intel Xeon D family of processors are server-class devices with more processing cores and additional memory channels. The Ice Lake D processor family offers up to four memory channels to support up to 20 processor cores. Even a processor implementation with three memory channels will provide 50% more memory bandwidth compared to a same-speed 2-channel system.
Processing cores matter
Not all applications can use the RDMA network protocol, and many must support standard TCP/IP traffic streams. While most modern Ethernet NICs will perform some packet processing tasks, such as cyclic redundancy check (CRC) calculations, in hardware, the TCP/IP software stack will still be traversed with considerable network traffic and will be tasked with processing this data, packet by packet, at network line rates. If the CPU cannot keep up with the torrent of packets, packets will be discarded, and recovery mechanisms will adversely affect performance. A 100 Gbps network stream is transmitted as 68,267 separate 1,500-byte packets, all within one second. That means each packet must be processed in under 14 µS. www.vita-technologies.com
If the packet processing stack takes (for arguments’ sake) 7 µS to process the packet, the network stream will consume 50% of the processor’s available bandwidth. This assumes there is only one CPU core doing the work. A typical Linux operating system, even when seemingly idle, has hundreds of separate processes running that perform tasks ranging from basic housekeeping to managing complex real-time network stacks. Modern processors are multicore devices that can execute multiple threads or tasks in parallel. The more processing cores a CPU has, the more parallel threads it can perform. The Linux TCP/IP stack supports multicore processors, allowing most modern multicore processors to spread network stack processing across multiple cores and threads to support full-bandwidth 100 Gbps TCP/ IP network traffic while simultaneously providing significant CPU cycles to other tasks and application needs.
Develop. Demonstrate. Deploy. STREAMLINING THE JOURNEY VPX System Design Solutions from Start to Finish
Deployment system realization is the culmination of 3 top level activities: • Lab development and integration • Field test and demonstration • Create deployable solution LCR has the products and experience to ensure success every step of the way.
lcrembeddedsystems.com | (800) 747-5972 SERVING CRITICAL DEFENSE PROGRAMS FOR OVER 30 YEARS
VITA Technologies with Application Guide Fall 2023 | 15
TECHNOLOGY FEATURE
By contrast, FPGA-based processing systems are highly parallel in nature and operate optimally with streaming data flows. As an example, a 100 Gbps or 10 Gbps data stream could represent 16-bit wideband RF signals at 5 gigasamples per second (GSPS), capturing in excess of 2.2 GHz RF bandwidth. A single conventional scalar processor would be highly challenged to do useful processing at this high rate, so implementing a system solution where an FPGA distributes signal packets across multiple processors is one viable approach.
Using 100G for low-latency messaging
The previous example explored a processing architecture to support high-throughput 100 Gbps network traffic. But what if we want to optimize for the lowest possible message latency? An Ethernet hardware switch typically adds a fixed ~1 µS to a packet’s transit time from sender to receiver. Electrical or optical transmission times are orders of magnitude smaller than this and are small enough to be ignored. The largest offender in a TCP/IP packet’s end-to-end latency journey is usually the network software stack processing time, along with the time a packet spends in buffers and queues waiting to be processed. As most of the TCP/IP packet processing time is CPU-bound, reducing the TCP/IP network stack processing time will directly reduce message latency. The Intel Ice Lake Xeon D processor is a modern multicore processor with up to 20 hyperthreading cores. It excels with applications that scale well with parallelism and can use all 20 cores and 40 threads. It also excels for large data-management applications, with many cores/threads available to support complex data processing tasks. These same processing cores must also manage network packet processing.
100G technology for VPX It’s important to consider the processor’s core clock speed for low-latency messages. The Ice Lake Xeon D processor operates with a core clock of 2.0 GHz. In contrast, Intel’s Xeon E/W/H series processors provide fewer cores operating at higher clock speeds. For example, the 9th-gen Coffee Lake Xeon E operates at 2.8 GHz, providing approximately 40% higher per-thread performance, and in the context of faster network software processing times will yield lower overall Ethernet latency results compared to the Ice Lake D processor. Lastly, we must mention an important system-level characteristic of Intel processors: Intel processors have safety mechanisms to ensure the processor does not overheat, called “throttling.” If the processor becomes too hot (thermal throttling) or consumes too much power (TDP throttling), it will self-throttle and reduce its clock speeds and performance to reduce power consumption and generate less heat. While a 100 Gbps
OpenSystems Media works with industry leaders to develop and publish content that educates our readers. A Holistic Approach to Energy-Efficient System-on-Chip (SoC) Design By Synopsys It takes a great deal of energy to power the modern world, and demand grows every day. This is especially true for electronics, in which ever-increasing automation and more intelligent devices incessantly demand more power. Many applications that use chips face a variety of pressures for reduced power consumption and better energy efficiency. In response, the semiconductor and electronic design automation (EDA) industries have developed a wide range of techniques to meet these requirements. This white paper describes some of the available technologies to help solve the problem and presents a holistic solution for energy efficiency through the system-on-chip (SoC) design flow, from architecture to signoff. Read this paper at https://tinyurl.com/2v3yrdv3
16 | VITA Technologies with Application Guide Fall 2023
Check out our white papers at http://vita.mil-embedded.com/ white-papers/ www.vita-technologies.com
network connection maintains the same bit-rate speed across the physical medium, if the packet-processing processors at an endpoint are throttled, its performance may be reduced to the point where it can no longer process packets quickly enough to sustain a 100 Gbps network data throughput.
the benefits that 100G systems can offer, system architectures must also adapt in order to support the faster data and reduced latencies that 100G technologies promise. It is not sufficient to just support 100G-capable Ethernet ports.
With today’s high-power processing modules, standard thermal-cooling solutions such as conduction cooling may not be sufficient to keep processors operating at their full performance potential. Higher-performance cooling solutions will yield more favorable results at high operating temperatures.
Curtiss-Wright’s Fabric100 family delivers a complete end-to-end solution for architecting 100Gbit SOSA aligned rugged systems. Fabric100 brings 100Gbit Ethernet and high-performance PCIe Gen4 interconnect speeds to tomorrow’s new generation of rugged deployable computing architectures. It is not enough to simply provide 100G connections between a system’s modules yet fail to support the ability to process all this data within the modules themselves.
Going forward with 100G
Data processing and sharing for defense and aerospace applications is rapidly becoming more complex. To deliver the faster processing and massive informationsharing benefits that modern systems require, system designers are turning to 100G technologies. But to fully realize all
As these new high-speed interconnect technologies are adopted, they will move from hype and promise to mainstream and proven, delivering a massive performance boost to the connected battlefield, where critical decisions are made at the speed of relevance.
Recognizing that, Curtiss-Wright’s Fabric100 board architectures are designed to deliver full 100G performance through the entire processing chain, eliminating data bottlenecks that might otherwise compromise system performance. Aaron Frank is Senior Product Manager at Curtiss-Wright Defense Solutions. Curtiss-Wright Defense Solutions https://www.curtisswrightds.com/
Leveraging VPX for Processing-Intensive Applications Sponsored by Concurrent Technologies & New Wave Design and Verification The VPX standard from VITA is a ruggedized approach to embedded computing that aims to satisfy high-speed processing needs in harsh environments such as flight, ground defense, and other military applications plus similar processingintensive applications in rail and commercial transportation, imaging, security, and space.
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This webcast of VPX experts discusses how the VPX standard and ecosystem enables high-performance computing in missioncritical applications. (This is an archived event.) Watch the webcast: https://tinyurl.com/mr2b6wha
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VITA Technologies with Application Guide Fall 2023 | 17
TECHNOLOGY FEATURE
OpenVPX and military computing
The importance of OpenVPX in military computing By Dan Taylor, MES Technology Editor
In the unique and demanding world of military computing, OpenVPX has emerged as a pivotal technology. Its origins lie in VPX (VITA 46), a groundbreaking open architecture computer standard designed to accelerate the flow of data in embedded systems. As the evolution of VPX, OpenVPX (VITA 65) takes this technology to the next level, providing a platform for robust, scalable, and interoperable computing systems. This article delves into the heart of OpenVPX, exploring its development and the essential role it plays in today’s military computing landscape. To fully grasp the significance of OpenVPX, it’s essential to understand its evolutionary journey. The story begins with the VPX standard, also known as VITA 46. This standard was revolutionary, setting the stage for an entirely new breed of high-performance computing systems specifically designed to meet the demanding requirements of military environments. However, as technology advanced and the need for more interoperable systems grew, the limitations of the initial VPX standard became evident. Systems often relied on a single source for components, creating vendor lock-in and stifling the potential for innovation and flexibility. To address these challenges, the OpenVPX standard, or VITA 65, was developed. This was not a departure from VPX, but rather a significant enhancement. Built on the foundational VITA 46 architecture, OpenVPX brought much-needed openness to the VPX ecosystem, supporting a broad array of vendor components and facilitating interoperability.
The core benefits of OpenVPX in military computing
OpenVPX offers a number of vital benefits to military computing, making it an invaluable asset in modern defense technology.
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High-performance computing capabilities: OpenVPX leverages cutting-edge fabric technologies such as Ethernet, RapidIO, and Infiniband to deliver exceptional data transfer rates. This high-performance computing power is crucial in military applications, where data processing speed can make the difference in mission-critical operations. Robustness and reliability in harsh environments: Military systems must operate in some of the world’s most challenging environments. From the heat and dust of desert terrains to the cold and vibration of airborne deployments, these systems must consistently perform under extreme conditions. OpenVPX’s rugged design and robustness make it well-suited to these demanding settings, ensuring reliable performance regardless of environmental challenges. www.vita-technologies.com
TECHNOLOGY FEATURE
Scalability and flexibility: OpenVPX’s open architecture allows for tremendous scalability and flexibility. This means that as military computing requirements evolve, systems can be upgraded or modified without having to be completely replaced. This not only saves time and resources, but it also ensures that military systems can remain at the forefront of technology.
host of advantages over custom-made solutions, including reduced cost, shorter lead times, and access to advanced technology. OpenVPX has played a crucial role in promoting the use of COTS products in military settings.
The combination of these benefits makes OpenVPX a compelling solution for the increasingly complex and challenging world of military computing. In the following sections, we will explore in more detail how OpenVPX enables interoperability, facilitates the emergence of commercial off-the-shelf products, aligns with defense industry standards, and supports a broad array of military applications.
OpenVPX’s alignment with defense industry standards
The role of OpenVPX in interoperability
Interoperability – the ability for different systems and devices to communicate and work seamlessly with one another – is an essential feature in military computing. In a field that relies heavily on rapid and effective information exchange, it’s crucial that components from different vendors can be integrated without compatibility issues. This is where OpenVPX shines. OpenVPX’s open architecture provides standardized mechanical and electrical interfaces that enable different components to interact smoothly. Because of this, military computing systems can now include best-of-breed components from a variety of vendors, rather than being restricted to a single-source supplier. This approach not only fosters competition and innovation but also ensures that the most suitable and effective components can be used for each specific application.
OpenVPX and the emergence of COTS products
Commercial off-the-shelf (COTS) products have brought about a paradigm shift in the military computing world. These products, which are readily available and can be used “as is,” offer a www.vita-technologies.com
By establishing an open standard that encourages vendor diversity and interoperability, OpenVPX has paved the way for a wider adoption of COTS products. Military developers can now choose from a larger pool of suppliers, picking out components that best fit their requirements without worrying about compatibility issues. The result is a more efficient, flexible, and cost-effective approach to designing and upgrading military computing systems. The U.S. Department of Defense (DoD) has long emphasized the need for a modular open systems approach (MOSA) in military systems, a way of designing and specifying that enables components to be swapped out and upgraded as needed, rather than replacing entire systems when technology advancements occur. OpenVPX aligns perfectly with this approach, providing the framework for creating highly modular and scalable systems. Furthermore, OpenVPX is a key part of the Sensor Open Systems Architecture (SOSA) standard. SOSA is an initiative that aims to develop open system architecture standards for military sensor systems. By aligning with the SOSA Technical Standard, OpenVPX enables greater compatibility, reusability, and interoperability within these systems, reinforcing its vital role in the future of military computing.
OpenVPX applications in military computing
The flexibility, high-performance computing capabilities, and robustness of OpenVPX have made it a go-to choice for a multitude of military applications. These applications extend across the defense spectrum, from command, control, communications, computers, intelligence, surveillance, and reconnaissance (C4ISR) systems to electronic warfare (EW) and signals intelligence (SIGINT). Notably, OpenVPX finds significant use in single-board computers, switches, backplanes, and chassis, where its advantages can be fully leveraged. Moreover, it plays a pivotal role in crafting compact and efficient I/O [input/output] boards and graphics modules, which can pack enhanced capabilities within a smaller footprint. This aspect is particularly valuable in the development of space-limited airborne and ground vehicle systems.
The future of OpenVPX
OpenVPX is not a static standard; instead, it’s a dynamic, evolving platform that continuously adapts to the changing needs and advancements in the defense industry. As military demands and technology continue to evolve, so too will OpenVPX, ensuring it remains a relevant and powerful force in military computing. The future may see the development of new profiles or the evolution of existing ones to accommodate emerging technologies, such as artificial intelligence/machine learning (AI/ML) and advanced data processing. Furthermore, OpenVPX is likely to remain central to the ongoing push toward more modular and interoperable defense systems. OpenVPX’s role in fostering interoperability, promoting the use of COTS products, and aligning with defense industry standards has revolutionized the way military computing systems are designed and implemented. With its firm role in the present and its look toward the future, OpenVPX will undoubtedly continue to play a significant role in shaping the trajectory of military computing. VITA Technologies with Application Guide Fall 2023 | 19
VITA Technologiess Application Guide
Radar/Electronic Warfare Sponsored By:
Communications
Interface Concept ComEth4082e – 3U VPX 1/10/40 Gigabit Ethernet Switch
The ComEth4082e is a cuttingedge 3U VPX Layer 2/3 Ethernet switch for hybrid copperoptical backplanes supporting legacy 10/100/1000BASE-T Ethernet over twisted pair, 1/10/40GbE over copper backplane as well as 1/10/40GbE over optical backplane.
3U VPX HD Switch Doubles Backplane Density
It offers a high density of 1, 10 and 40GbE ports on a small 3U footprint, and a highly flexible switch configuration capability. The ComEth4082e is powered by a Marvell multi-layer Ethernet switch device and a dual-core ARM7 CPU controlled by Interface Concept’s field-proven network management software called "Switchware". https://www.interfaceconcept.com
Radar/Electronic Warfare
Annapolis Micro Systems The rugged WILDSTAR 100GbE 3E20 Switch is the next-gen version of Annapolis’ best-selling 3E10 Switch. Both provide switching between backplane slots of multiple channels of 100Gb Ethernet, front panel I/O, and separate data and control plane switches and two Zynq UltraScale+ processors that support encrypted secure communication. The WP3E20 also has high density VITA 91 connectors, which deliver dramatic increases in bandwidth and reductions in latency. It features up to fourteen 40/100Gb and twenty-four 1/10/25Gb or six 40/100Gb Ethernet ports. Coming soon are two additional HD 3U VPX switches: • WILDSTAR 3P20 PCIe/LVDS Switch – Up to 128 LVDS or eight 8x PCIe interfaces • WILDSTAR 3H20 Combo Switch – Combines 40/100GbE, Gen4 PCIe, and/or LVDS HD Chassis also available: The high density WILD100 13-Slot 3U VPX Chassis (WC31DH) supports either 8x Gen4 PCIe, 4x Gen4 PCIe plus eight LVDS, or 16 LVDS to each payload slot. 3E20 SWITCH FEATURES • 6.4 Tb/s 40/100GbE Data Plane Mellanox Spectrum Switch • 1/10/25/40/100GbE Control Plane Marvell Prestera-DX Switch • Separate data and control plane switches & processors • Up to fourteen 40/100Gb and twenty-four 1/10/25Gb or six 40/100Gb Ethernet ports • Supports encrypted secure communication utilizing two Zynq UltraScale+ processors • High density VITA 91 backplane connectors for up to 128 diff pairs • Air, Conduction, or Air-Flow-Through cooled www.annapmicro.com/products/wildstar-3e20-3u-openvpx-switch/
20 | VITA Technologies with Application Guide Fall 2023
64 GS/s Direct RF in 3 Form Factors With Direct RF, directly digitize and process wideband signals, simplifying system architecture and enabling new EW, SIGINT, and Radar processing capabilities. Part #
Form Factor
WSSAF1
Small: 24x40x102mm
WWDME1 WB3AE1
WFMC+ 3U VPX
ADC/DAC Channels 4/4
Max Sample Rate (GSps) 64/64
2/2 8/8
64/64 64/64
Resolution 10/10 10/10 10/10
• BSP: VHDL or GUI-based • Standards: VITA 65 & SOSA 1.0 • Availability: Commercial off-the-shelf www.annapmicro.com/direct-rf-products/
Radar/Electronic Warfare
Interface Concept IC-INT-VPX3l – SOSA™ 3U VPX Intel® Xeon® W SBC
Ideally suited for mil-aero and edge applications, the IC-INT-VPX3l is a high-performance 3U VPX Single Board Computer based on the Intel® Xeon® W (code name Tiger Lake-H) processor and aligned with the SOSA™ Technical Standard. The on-board 8-core processor, the advanced Intel® Xe graphics engine, the large number of Ethernet ports and the DDR4 memory are some of the board’s characteristics that deliver a high-processing solution to 3U VPX system integrators. The IC-INT-VPX3l SBC is available in air-cooled and conduction cooled versions (-40°C to +85°C). https://www.interfaceconcept.com
www.vita-technologies.com
Radar/Electronic Warfare Sponsored By:
Curtiss-Wright VPX3-6826 100G Dual CP/DP Ethernet Switch
The versatile, SOSA aligned VPX3-6826 Ethernet switch provides rugged Ethernet switching for the next generation of 3U VPX systems. Supporting switching and routing features on independent Data Plane and Control Plane switching fabrics, the VPX36826 complements backplane copper ports with rugged optical connectivity to simplify systems integration.
sFPDP [VITA 17.3] PCIe platfom – 4 links @10 Gbps
The Data Plane supports any mix of 1G, 10G, 25G, 40G, 50G, and 100G ports. Control Plane adds Time Sensitive Networking (TSN) features for deterministic Ethernet.
www.curtisswrightds.com
Rugged
Curtiss-Wright VPX3-1262 Intel 13th Gen 14-core Hybrid Processor ®
The Fabric100™ enabled VPX3-1262 with Intel® 13th Gen 14-core hybrid processor with Time Sensitive Networking (TSN) capabilities delivers the highest and most efficient processing performance available in a VPX card. Developed in alignment with the SOSA™ Technical Standard with variants meeting both the 3U I/O Intensive and Payload profiles, the VPX3-1262 delivers scalable and deterministic processing power for the most SWaP-constrained and mission-critical systems.
www.curtisswrightds.com
RAVEN-3_2: Our all-new sFPDP PCIe board implements 4 sFPDP channels @ 10Gbps with receive and transmit engine for high-performance communications and data-processing: • VITA 17.3 sFPDP protocol • 4 links up to 10 Gbps data rate per link • Functionalities: Flow Control, CRC, Framed/Unframed, Copy/Loop Mode • SFP+ interface: compliant with copper or fiber The user-friendly API (Application Programming Interface) software, written in C++, allows to get/send data, monitoring, configure, upgrade, and more. For recording application, we offer sFPDP recorders on specifications: form factor, channels, rate, memory. This sFPDP applicative solution is based on our new “open-to-develop” Kintex UltraScale+ PCIe board with FMC+ connector, called PFP-IV. The PFP-IV is dedicated for extreme high-speed applications such as 100 GbEth communications, 4/6 GHz ADC/DAC, ARINC 818, AURORA, JESD, ODI ... and sFPDP. PFP-IV are highly versatile thanks to their perfect technology mix: • Kintex UltraScale+ FPGA for 28 Gbps application • PCIe Gen 3 x16 • FMC+ site with up to x20 HSS links @ 28 Gbps • 2x DDR4 4GB memory banks • SoM option based on Zynq UltraScale+ MPSoC for management system or stand-alone use
WATCH MORE WEBCASTS:
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All PFP boards are delivered with a complete Development Kit (DK) with Windows and Linux drivers to reduce time and costs of integration. The DK remains a decisive element allowing to focus the effort on the application developments rather than on the low-level layers (FPGA/CPU communication, PCIe driver, Memory controller, etc.). www.techway.com
www.vita-technologies.com
VITA Technologies with Application Guide Fall 2023 | 21
VITA Technologiess Application Guide
Rugged
VITA Technologiess Application Guide
Rugged
Concurrent Technologies TR MAx/6sd-RCx – Rugged 3U VPX Plug In Card
Mastering Precision: Real-time and Determinism Essentials
TR MAx/6sd-RCx is a Compute Intensive rugged 3U VPX Plug In Card, developed in alignment with the SOSA™ Technical Standard. Designed for workload consolidation and server grade applications in challenging environments, TR MAx/6sd-RCx features a 10-core Intel® Xeon® D-1746TER processor, up to 128 Gbytes DDR4 memory and 2TB direct attached storage. For higher bandwidth communications, TR MAx/6sd-RCx supports up to 100 Gigabit Ethernet connectivity on the Data Plane and PCI Express (PCIe) Gen 4 on the Expansion Plane.
Sponsored by Wind River www.gocct.com/product/tr-max-6sd-rcx-rugged-3u-vpx-plug-in-card/
The ever-increasing demands for more autonomous
Unmanned Systems
action and artificial intelligence pile more stringent
Dawn VME Products
requirements on the intelligent edge.
Dawn ATR-5700 6-slot 3U VPX Air Cooled
Safety and security combine with real-time determinism to demand the highest reliability and performance for mission-critical systems. This webcast will delve deep into the fundamental concepts and practical strategies that underpin the development of highly deterministic systems.
Air Cooled Enclosure for deployed UAV or flight applications using VPX 3U Air Cooled Modules. OpenVPX Ready. Designed to MIL-STD-810E, DO-160E and MIL-STD-461E. For all rugged environments; Air, Land, and Sea. 6-Slots of 3U VPX with integral 600W 6-channel intelligent power supply. The ATR-5700 Series of Flight Deployable Enclosures offer a rugged solution, typically found in expensive conduction cooled platforms, with the benefit of using inexpensive aircooled boards.
Learn: the five characteristics of a high-performance
This is made possible by Dawn’s revolutionary Thermal Exchanged Flow™ (TEF) Cooling System.
RTOS; how to fine-tune performance for application
www.dawnvme.com/shop/vpx-enclosures/atr-5700/
requirements; strategies and technologies to minimize
Unmanned Systems
jitter and latency; and the effect of modern development
Dawn VME Products
technologies like containers on real-time performance.
PSD-6362 3U VITA 62 Single Slot Power Backplane
(This is an archived event.) Watch the webcast: https://tinyurl.com/4cvehyn8
WATCH MORE WEBCASTS:
https://militaryembedded.com/webcasts/
Dawn VITA 62 Compliant 3U 500 Watt 6-Channel Plug-in Power Supply Docking Board/Backplane for VPX Systems. Designed for quick addition of power to VPX platforms. VITA 62 power connector. Guide Pin Keys, Sense/Share connector, Monitor connector, Power Studs for high current output. • VITA 62 Compliant 3U VPX power supply docking board. • 500W power output capability per unit. • Up to 4 units may be paralleled into a single system. • Power connector and studs provided for connecting power to the backplane. • 3U 1" form factor. • True 6-Channel design provides full OpenVPX support. www.dawnvme.com/shop/power-supplies/3u-vita-62-power-backplane/
22 | VITA Technologies with Application Guide Fall 2023
www.vita-technologies.com
THE LATEST, MOST INNOVATIVE PRODUCTS AND TECHNOLOGY
THE RESOURCE GUIDE PROVIDES INSIGHT ON EMBEDDED TOOLS AND STRATEGIES FOR TECHNICAL SUBJECTS AND OPEN STANDARDS The Spring VITA Technologies Resource Guide provides the latest technical information and updates on VPX, OpenVPX, SOSA, SpaceVPX, and other standards to engineers, managers, and decision-makers in the United States and internationally. The Resource Guide will also highlight such key electronics-buying categories as FMC, OpenVPX, Operating Systems & Tools, PMC/XMC, Uncrewed Systems, Radar/EW, and Rugged Computing. Don’t miss this issue!
Developed in Alignment with the VITA and SOSA™ Technical Standards
3 phase. 3U.1 choice. THE MILITARY FLIES HIGH WITH VPXtra 704™ When the mission calls for a 3-phase 3U power supply that can stand up to the most rugged environments, the military chooses VPXtra 704™ from Behlman – the only VPX solution of its kind built to operate seamlessly from MIL-STD-704F power for mission-critical airborne, shipboard, ground and mobile applications. > 3-phase AC or 270V DC input; high-power DC output > Available holdup cards store 700W of DC power for up to 80 msec > Overvoltage, short circuit, over-current and thermal protection > Provides full output performance during both normal and abnormal transients
The Power Solutions Provider : 631-435-0410
: sales@behlman.com
: www.behlman.com