SOSA Special Edition 2024

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Navy MH-60R Seahawk flies over the Atlantic Ocean during a live-fire integrated air and missile defense exercise. Lockheed Martin will develop a low size, weight, and power (SWaP), Sensor Open Systems Architecture (SOSA) aligned airborne electronic defense system, leveraging the Altera Multi-Chip Package (MCP2) for expected use on the U.S. Navy’s MH-60R multi-mission helicopter.

Navy Petty Officer 2nd Class Nathan

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Gold Sponsors

3 Annapolis Micro Systems –The only full ecosystem of 3U & 6U 100GbE products aligned with SOSA

50 Annapolis Micro Systems –Executive Speakout

19 Elma Electronic – Leaders in modular open standards that enable the modern warfighter VPX

50 Elma Electronic –Executive Speakout

72 GMS – X9 Spider –the world’s most powerful full-featured wearable AI computer

51 GMS – Executive Speakout

5 Kontron – Powering defense innovation with advanced embedded technology

51 Kontron – Executive Speakout

7 Mercury Systems, Inc. – Direct RF –ready today for tomorrow’s needs

52 Mercury Systems, Inc. –Executive Speakout

2 Wolf Advanced Technology –Winning at the edge

54 Wolf Advanced Technology –Executive Speakout

Advertiser Index

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42 Abaco Systems – Discover Abaco

49 Atrenne – Failure is not an option from design to development to deployment

43 Behlman Electronics, Inc. –3 Phase. 3U. 1 Choice.

8 Eizo – Elevate your mission with AI accelerated embedded computing

55 LCR Embedded Systems, Inc. –Mission possible: VPX and SOSA aligned solutions for any mission

52 LCR Embedded Systems, Inc. –Executive Speakout

53 Milpower Source –Executive Speakout

39 New Wave Design –We create precise, SOSA aligned VPX and XMC solutions for mission critical applications

53 New Wave Design –Executive Speakout

27 North Atlantic Industries –Unmatched modularity. Unbeatable performance

29 Omnetics Connector Corp. –Connector & cable harness solutions

38 Pixus Technologies –SOSA aligned products in the slot profile configuration you need

33 Rantec Power Systems Inc. –Global leader in power supplies designed in alignment with the SOSA Technical Standard

54 Rantec Power Systems Inc. –Executive Speakout

32 Sealevel Systems, Inc. –Intentionally and openly engineered

13 The Open Group –The Open Group SOSA Consortium PG SPONSOR

GROUP EDITORIAL DIRECTOR John McHale john.mchale@opensysmedia.com

ASSISTANT MANAGING EDITOR Lisa Daigle lisa.daigle@opensysmedia.com

TECHNOLOGY EDITOR Dan Taylor dan.taylor@opensysmedia.com

CREATIVE DIRECTOR Stephanie Sweet stephanie.sweet@opensysmedia.com

WEB DEVELOPER Paul Nelson paul.nelson@opensysmedia.com

EMAIL MARKETING SPECIALIST Drew Kaufman drew.kaufman@opensysmedia.com

WEBCAST MANAGER Marvin Augustyn marvin.augustyn@opensysmedia.com

VITA EDITORIAL DIRECTOR Jerry Gipper jerry.gipper@opensysmedia.com

SALES/MARKETING

DIRECTOR OF SALES Tom Varcie tom.varcie@opensysmedia.com (734) 748-9660

STRATEGIC ACCOUNT MANAGER Rebecca Barker rebecca.barker@opensysmedia.com (281) 724-8021

STRATEGIC ACCOUNT MANAGER Bill Barron bill.barron@opensysmedia.com (516) 376-9838

STRATEGIC ACCOUNT MANAGER Kathleen Wackowski kathleen.wackowski@opensysmedia.com (978) 888-7367

SOUTHERN CAL REGIONAL SALES MANAGER Len Pettek len.pettek@opensysmedia.com (805) 231-9582

DIRECTOR OF SALES ENABLEMENT Barbara Quinlan barbara.quinlan@opensysmedia.com AND PRODUCT MARKETING (480) 236-8818

INSIDE SALES Amy Russell amy.russell@opensysmedia.com

STRATEGIC ACCOUNT MANAGER Lesley Harmoning lesley.harmoning@opensysmedia.com

EUROPEAN ACCOUNT MANAGER Jill Thibert jill.thibert@opensysmedia.com

TAIWAN SALES ACCOUNT MANAGER Patty Wu patty.wu@opensysmedia.com

CHINA SALES ACCOUNT MANAGER Judy Wang judywang2000@vip.126.com

PRESIDENT Patrick Hopper patrick.hopper@opensysmedia.com

EXECUTIVE VICE PRESIDENT John McHale john.mchale@opensysmedia.com

EXECUTIVE VICE PRESIDENT AND ECD BRAND DIRECTOR Rich Nass rich.nass@opensysmedia.com

DIRECTOR OF OPERATIONS AND CUSTOMER SUCCESS Gina Peter gina.peter@opensysmedia.com

GRAPHIC DESIGNER Kaitlyn Bellerson kaitlyn.bellerson@opensysmedia.com

FINANCIAL ASSISTANT Emily Verhoeks emily.verhoeks@opensysmedia.com SUBSCRIPTION MANAGER subscriptions@opensysmedia.com

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Editor’s Perspective

By John McHale, Editorial Director

SOSA spurs MOSA momentum

Welcome to the SOSA Special Edition 2024, our fourth offering of what is an annual issue highlighting editorial content on The Open Group’s Sensor Open Systems Architecture (SOSA) Technical Standard from the pages and website of Military Embedded Systems magazine, as well as the products aligned to the Technical Standard – all put together exclusively by our staff. SOSA continues to be a key part of the U.S. Department of Defense’s (DoD’s) push imperative to leverage a modular open systems approach (MOSA) in all new programs and upgrades.

In many ways, the SOSA Technical Standard has become the tip of the MOSA spear even though it is not the most veteran of MOSA initiatives, with revision 1.0 having been ratified only in 2021. The enthusiasm of the volunteers working to develop the standard and growing number of programs calling for SOSA aligned products in their requirements is evidence of its momentum.

Take for example, Lockheed Martin’s announcement, made in March, that it will develop a low size, weight, and power (SWaP), SOSA aligned airborne electronic defense system, leveraging Multi-Chip Package (MCP2) from Altera, an Intel company, for expected use on the U.S. Navy’s MH-60R multi-mission helicopter.

This is a big move forward for the standard. I asked Kevin Mahoney, Director, Airborne Electronic Warfare, Spectrum Convergence, Lockheed Martin Rotary & Mission Systems, what benefits SOSA brings to their system design. “A SOSA aligned solution enables simplified integration of components, enabling us to use the best that industry has to offer and for our solutions to stay ahead of ready as technology evolves. It also gives our customers an open platform that can evolve with their mission needs over time,” he says.

For the work referenced in the March announcement, Mahoney notes that “Lockheed Martin will be integrating the Altera technology developed through the SHIP [Stateof-the-Art Heterogeneous Integration Packaging] program into a solution that is aligned to open standards such as SOSA.”

It should also be noted that while Lockheed Martin is collaborating with the Stimulating Transition for Advanced Microelectronics Packaging (STAMP) program, it is not intended to be used to create a product for the MH-60R as the company is not currently under contract with the Navy for a specific product. While this contract is currently targeted for MH-60, the product solution is being built considering the needs of all airborne platforms to enable transition of the technology to multiple applications.

The use of SOSA standards and open concepts enables the solution to have reduced transition cost/schedule across platforms, according to Lockheed Martin.

“We are embracing the use of open standards throughout all of our designs moving forward, including SOSA,” Mahoney says. “The use of open standards enables us to offer our customers the best value, providing upgradeable and customizable solutions while minimizing the time and cost associated with system development.”

The bottom line: MOSA strategies like SOSA and the Future Airborne Capability Environment (FACE) enable long-term schedule and cost savings for the DoD. They

are also changing the way industry does business with the DoD, enabling more commercial technology providers to get involved. See our roundtable of SOSA members on page 20 of this issue to learn more.

The SOSA Technical Standard is thriving, and one of the major factors is the enthusiasm of its membership and their involvement in its development, says Nick Borton, chair of the SOSA Consortium’s Business Working Group in his Q&A with the SOSA Consortium on page 16.

“I don’t think it’s obvious to nonmembers how easily they can make an impact on SOSA and the content in the standard if they were to join,” Borton elaborates. “I’m a great example: I was a total outsider, but soon after I joined, I was participating and working hard to explain my viewpoints and was able to share how I saw things moving and dovetailing together. It is kind of amazing how open and welcoming the people that work on SOSA are. One of the things that drives me to keep going on SOSA is the fact that we have a lot of very passionate people involved, who are willing to work with whomever to make SOSA the best that it can possibly be. It is a unique space to operate in and the fact that SOSA is a consensus-based consortium within the Open Group sets the stage for enabling this kind of environment.”

Speaking of passionate people, neither this edition, nor the prior three, get published without the assistance, work, and cooperation of Reggie Hammond and her colleagues at The Open Group, the SOSA Outreach Committee co-chairs –Valerie Andrew of Elma Electronic and Gina Peter of OpenSystems Media – as well as my editorial production team of Lisa Daigle and Steph Sweet. Many thanks for everyone’s help on this fourth iteration of the SOSA Special Edition.

About the SOSA TM Consortium

www.opengroup.org/sosa

The Open Group Sensor Open Systems Architecture™ (SOSA) Consortium enables government and industry to collaboratively develop open standards and best practices to enable, enhance, and accelerate the deployment of affordable, capable, interoperable sensor systems. The SOSA™ Consortium is creating open system reference architectures applicable to military and commercial sensor systems and a business model that balances stakeholder interests. The architectures employ modular design and use widely supported, consensus-based, nonproprietary standards for key interfaces.

For additional information please visit https://www.opengroup.org/sosa.

SOSA SPONSOR

Air Combat Command

https://www.acc.af.mil/

Air Force Life Cycle Management Center https://www.aflcmc.af.mil/

Collins Aerospace https://www.collinsaerospace.com/

Joint Tactical Networking Center https://www.jtnc.mil/

Lockheed Martin https://www.lockheedmartin.com/

NAVAIR

https://www.navair.navy.mil/

NIWC Atlantic

https://www.niwcatlantic.navy.mil/

U.S. Army CCDC C5ISR https://c5isr.ccdc.army.mil/

U.S. Army PEO Aviation

https://asc.army.mil/web/tag/peo-aviation/

U.S. PEO C3T https://asc.army.mil/web/peos/

U.S. Army PM PNT https://pm-pnt.army.mil/home

US Army Project Manager

Electronic Warfare and Cyber https://peoiews.army.mil/

SOSA PRINCIPAL

Advanced Micro Devices, Inc. https://www.amd.com/en.html

BAE Systems Inc

https://www.baesystems.com/en/home

CACI International, Inc. https://www.caci.com

Cisco Systems https://www.cisco.com/

Cubic Corporation https://www.cubic.com/

Curtiss-Wright Defense Solutions https://www.curtisswrightds.com/

Elbit Systems of America https://www.elbitsystems-us.com/

FLIR Systems https://www.flir.com/

GE Aviation Systems https://www.geaviation.com/

General Dynamics https://www.gd.com/

Huber+Suhner Astrolab https://www.hubersuhner.com/en

Intel Corporation https://www.intel.com/content/www/us/en/ homepage.html

L3Harris https://www.l3harris.com/

Leonardo DRS https://www.leonardodrs.com/

Mercury Systems https://www.mrcy.com/

NASA

https://www.nasa.gov/

Northrop Grumman Corporation https://www.northropgrumman.com/

Owl Cyber Defense https://owlcyberdefense.com/

Palantir https://www.palantir.com/

Raytheon https://www.rtx.com/

Sierra Nevada Corporation https://www.sncorp.com/

SR Technologies https://www.srtrl.com/

SRC, Inc. https://www.srcinc.com/

SOSA ASSOCIATE

Teledyne FLIR https://www.flir.com/

Ultra Intelligence & Communications https://www.ultra-ic.com/ VadaTech https://www.vadatech.com/ Abaco Systems https://www.abaco.com/

Acromag, Inc. https://www.acromag.com/

Aegis Power Systems https://aegispower.com/

AirBorn, Inc. https://www.airborn.com/ Aitech https://aitechsystems.com/ Amphenol https://amphenol.com/

Ampro ADLINK Technology, Inc https://www.adlinktech.com/en/Index Anduril Industries https://www.anduril.com/

ANELLO Photonics

https://www.anellophotonics.com/

Annapolis Micro Systems Inc.

https://www.annapmicro.com/

Apogee Semiconductor

https://apogeesemi.com/

Arc Compute US

https://www.arccompute.io/

Atrenne

https://www.atrenne.com/

Ball Aerospace

https://www.baesystems.com/en-us/ our-company/inc-businesses/ space-and-mission-systems

Behlman Electronics

https://www.behlman.com/

Bevilacqua Research Corporation https://brc2.com/

CAES

https://caes.com/

Chameleon Consulting Group https://chameleoncg.com/

CodeMettle

https://www.codemettle.com/

Comtel Electronics

https://comtel-online.com/

Concurrent Technologies

https://www.gocct.com/

Cornet Technology

https://cornet.com/

COTSWORKS, LLC https://cotsworks.com/

CRFS

https://www.crfs.com/

Critical Frequency Design http://www.criticalfrequency.com/

Crossfield Technology

https://www.crossfieldtech.com/

Crystal Group

https://www.crystalrugged.com/

Dawn VME Products

https://www.dawnvme.com/

Delta Information Systems

https://www.delta-info.com/

DornerWorks

https://dornerworks.com/

DRS Signal Solutions

https://www.leonardodrs.com/

DRTI

https://drti.com/

Echodyne

https://www.echodyne.com/

EIZO Rugged Solutions

https://www.eizorugged.com/

Elma Electronic

https://www.elma.com/en

ENSCO Avionics

https://www.ensco.com/

Epiq Solutions

https://epiqsolutions.com/

Epirus

https://www.epirusinc.com/

Everfox

https://www.everfox.com/

Expeditionary Engineering, Inc.

https://www.xp-eng.com/

FiberQA

https://www.fiberqa.com/

Freedom Power Systems

https://www.vicorpower.com/all-products/ vicor-power-systems

Frontgrade Technologies https://frontgrade.com/

GALT Aerospace

https://www.galt.aero/

General Atomics

https://www.ga-asi.com/

General Micro Systems, Inc. https://www.gms4sbc.com

Georgia Tech Research Institute https://gtri.gatech.edu/ Glenair

https://www.glenair.com/

GORE https://www.gore.com/

Great River Technology https://www.greatrivertech.com/

Herley Industries, Inc.

https://www.ultra.group/us/

Herrick Technology Laboratories, Inc. https://www.herricktechlabs.com/

HII Mission Technologies

https://hii.com/what-we-do/divisions/ mission-technologies/

Hiller Measurements

https://hillermeas.com/

Hughes Network Systems https://www.hughes.com/

IDEAS Engineering & Technology https://www.ideas-tek.com/

II-VI Aerospace & Defense https://www.iiviad.com/

InertialWave, Inc. https://www.inertialwave.com/ Innoflight, LLC https://www.innoflight.com/

Insulated Wire Inc. https://insulatedwire.com/ Interface Concept https://www.interfaceconcept.com/ Integrated Solutions for Systems, Inc. (IS4S) https://is4s.com/

Intellisense Systems Inc. https://www.intellisenseinc.com/

iRF Solutions http://irf-solutions.com/

ITT Cannon LLC https://ittcannon.com/

ITZ, LLC https://itz.org/ Jacobs https://www.jacobs.com/

Jovian Software Consulting https://www.joviansc.com/ Kontron America https://www.kontron.com/en

LCR Embedded Systems, Inc. https://www.lcrembeddedsystems.com/ Leidos https://www.leidos.com/ Lynx Software Technologies https://www.lynx.com/

Mathtec, Inc. https://mathtechinc.com/ Meritec https://meritec.com/

SOSA

ASSOCIATE (continued)

Metrea Algorithmics

https://metrea.aero/metrea-algorithmics/

Micro Focus (USA) Inc.

https://www.microfocus.com/en-us/home

Microchip Technology Inc.

https://www.microchip.com/ Micropac

https://www.micropac.com/

Milpower Source https://milpower.com/ Moog Inc. https://www.moog.com/

Motorola Solutions Inc.

https://www.motorolasolutions.com/ en_us.html

New Wave Design https://newwavedesign.com/

North Atlantic Industries, Inc https://www.naii.com/ NVIDIA

https://www.nvidia.com/en-us/

Omnetics Connector Corp. https://www.omnetics.com/

One Stop Systems

https://onestopsystems.com/

OnTime Networks

https://ontimenet.com/

Orion Technologies, LLC

http://www.oriontechnologies.com/ Pacific Defense https://www.pacific-defense.com/

Parry Labs, LLC https://parrylabs.com/

People Tec https://www.peopletec.com/ Peraton Labs

https://www.peratonlabs.com/

Phoenix International

https://www.phenxint.com/ PIC Wire & Cable https://picwire.com/home

Pixus Technologies USA

https://pixustechnologies.com/

QRC Technologies

https://www.qrctech.com/

RADA Technologies LLC (RADA USA) https://radausa.com/

Rantec Power Systems https://rantec.com/

Real-Time Innovations, Inc. https://www.rti.com/en/

REDCOM Laboratories https://www.redcom.com/

Red Hat

https://www.redhat.com/en

Red Rock Technologies https://www.redrocktech.com/

Roke USA

https://www.chemring.com/about-us/ our-business/roke-usa

RTD Embedded Technologies, Inc. https://www.rtd.com/

Samtec, Inc.

https://www.samtec.com/

Safran Federal Systems

https://www.safranfederalsystems.com/

Sciens Innovations

https://www.sciensinnovations.com/

ScioTeq

https://www.scioteq.com/en

Sealevel Systems https://www.sealevel.com/

Selex Galileo https://www.leonardo.us/

SI2 Technologies https://www.si2technologies.com/

Skayl LLC https://www.skayl.com/

Smiths Interconnect Americas https://www.smithsinterconnect.com/

Southwest Research Institute https://www.swri.org/

Spectra Aerospace and Defense https://spectra-aerodef.com/

Spectrum Control https://www.spectrumcontrol.com/

StreamDSP, LLC

https://streamdsp.com/

Systel, Inc.

https://www.systelusa.com/

TE Connectivity

https://www.te.com/usa-en/home.html

Teledyne Storm Microwave https://www.teledynedefenseelectronics.com/ stormmicrowave/Pages/default.aspx

Tercero Technologies https://www.tercero.ai/ Tektronix https://www.tek.com/

Telephonics https://www.telephonics.com/

The MITRE Corporation https://www.mitre.org/

Tomahawk Robotics https://www.tomahawkrobotics.com/

TrellisWare Technologies https://www.trellisware.com/

Trillium Engineering https://www.trilliumeng.com/

TTM Technologies https://www.ttm.com/

Tucson Embedded Systems, Inc. https://www.tucsonembedded.com/

University of Dayton Research Institute https://udayton.edu/udri/ Variable Software https://www.variablesw.com/

ViaSat, Inc. https://www.viasat.com/ VIStology https://vistology.com/ VITA https://www.vita.com/

Wakefield Thermal https://wakefieldthermal.com/

W-IE-NE-R Power Electronics Corp. http://wiener-us.com/

Wolf Advanced Technology https://wolfadvancedtechnology.com/

Note: List current as of 3/29/2024

An integrative and inclusive standard to accelerate the development of affordable, agile, and composable sensor systems

The Open Group SOSA™ Consortium empowers government and industry to collaboratively develop open standards and best practices.

The SOSA Technical Standard leverages and complements open standards in government open interfaces, enabling the development of capabilities made up of common components. The components and hardware elements, as well as electrical and mechanical interfaces composing the SOSA sensor element.

For more information and to obtain the SOSA Technical Standard email: ogsosa-admin@opengroup.us Join the SOSA Consortium Today

We support the warfighters and soldiers in the field and strive to arm them with the electronic tools they need for mission success. Industry, government, and suppliers are successfully joining their unique perspectives to leverage technology and standards in support of the warfighters and soldiers in the field.

https://www.opengroup.org/sosa/join The Open Group: Leading the development of open,

The Open Group is a global consortium that enables the achievement of business objectives through technology standards. Our diverse membership of more than 900 organizations includes customers, systems and solutions suppliers, tool vendors, integrators, academics, and consultants across multiple industries.

SOSA TM Consortium Information

As sensor systems increase in number, applications, cost and complexity, users need to address issues such as affordability, versatility and capabilities. Sensor systems should be rapidly reconfigurable and reusable by a greater number of stakeholders.

The Open Group’s SOSA Consortium enables government and industry to collaboratively develop open standards and best practices to enable, enhance, and accelerate the deployment of affordable, capable, interoperable sensor systems.

The SOSA Consortium is creating open system reference architectures applicable to military and commercial sensor systems and a business model that balances stakeholder interests. The architectures employ modular design and use widely supported, consensus-based, nonproprietary standards for key interfaces that are expected to:

Email The Open Group ogsosa-admin@opengroup.us.

For more information, visit www.opengroup.org/sosa

LinkedIn: www.linkedin.com/company/the-open-group/

Twitter:

https://twitter.com/theopengroup

You Tube Channel:

https://www.youtube.com/user/theopengroup/video

• Reduce development cycle time and cost

• Reduce systems integration cost and risk

• Increase commonality and reuse

• Reduce sustainment and modernization cost

• Support capability evolution and mitigate obsolescence

• Enable technology transition

• Facilitate interoperability

• Isolate the effects of change

SOSA TM Consortium Information

JOIN THE SOSA CONSORTIUM

Get involved and gain influence in defining open standards and certifications.

Being a member of The Open Group gives organizations early access to the latest information and developments regarding open standards and best practices, and enables them to participate in The Open Group’s highly influential Forums and Work Groups. We provide a collaborative, vendor-neutral environment where member representatives can:

• Network with a world-class community of peers, experts, and industry leaders

• Have early access to information on industry developments

• Gain insight for future decisions from both major customers and suppliers of IT

• Influence outcomes that benefit their organizations

• Grow professionally, and enhance their credibility in the industry

• Learn best practices

The SOSA Consortium provides a vendor-neutral forum for industry and government to work together to develop capabilities and support for modular, open sensor systems.

The SOSA approach provides an agile and platform-agnostic open systems architecture for multi-intelligence C5ISR systems. The architecture incorporates both hardware and software components to handle demanding processing and data requirements, ease system upgrades, reduce total cost of ownership, and promote competitive acquisition with minimal system reworks.

Contact The Open Group if your organization is interested in joining. One of our membership representatives will get in touch to provide you with the rules of engagement and membership information.

Email The Open Group ogsosa-admin@opengroup.us.

THE OPEN GROUP: MAKING STANDARDS WORK

The Open Group works with customers and suppliers of technology products and services, and with consortia and other standards organizations, to capture, clarify, and integrate current and emerging requirements, establish standards and policies, and share best practices. Our standards ensure openness, interoperability, and consensus.

The Open Group is a global consortium that enables the achievement of business objectives through technology standards. With more than 900 member organizations, we have a diverse membership that spans all sectors of the technology community –customers, systems, and solutions suppliers, tool vendors, integrators, and consultants, as well as academics and researchers.

SOSA interview with Nick Borton

Below is the excerpted transcript of an interview recently conducted by the SOSA Consortium with Nick Borton, the Vice Chair of the consortium’s Steering Committee.

How did you become involved in SOSA [Sensor Open Systems Architecture]? What was the path that led you to become involved? Were you involved in other open standards bodies before?

BORTON: Around 2018 and 2019, SRC [Inc.] was funded to build a new ground EW [electronic warfare] system for one of our programs. I was the head hardware developer/lead on that effort. Historically, at SRC, I had done a lot of digital hardware development. We looked at using a lot of COTS [commercial off-the-shelf] boards, but we always ran into the problem of OpenVPX being this nonstandard standard, with too many user-definable pins or too many varying slot profiles.

So even if OpenVPX didn’t leave a slot/module profile totally open, there would still be issues, we might have PCI Express over on this corner on one board and then be over on that corner on the other board. I’d always do a survey, as justification as to why we’d be developing our own hardware, and I’d need some amount of PCIe, some amount of Ethernet, and some amount of 422 [serial communication method] or LVDS [low-voltage differential signaling] or what have you. I’d end up with boards from XYZ manufacturers and none of the I/O would line up.

Typically, we’ve got to maintain this hardware for 10 to 15 years or more. If the board is underneath our control as our design, then that 10-to-15-year maintenance period will be easier for us to manage.

That gives you a very interesting perspective because, while you were open-minded to the open architecture approach and saw its potential benefits, you were really coming from the “we’ll build it ourselves” camp.

BORTON: From the program-management side, there’s always the hope of development cost savings or timeto-market benefits that could come from going with a COTS board. But then there would be other trade-offs to manage, not only with the backplane I/O, but how much DRAM is available, whether or not your FPGA [fieldprogrammable gate array] has RLD RAM [reduced-latency dynamic random-access memory] versus DDR2 or DDR3. The way we tend to do things at SRC, with our unique high-performance and low-SWaP [size, weight, and power] implementations, having the explicit enabling features on the board was of great importance as well.

So what changed – what led you into SOSA – was there a precursor to being involved?

Nick Borton

BORTON: Going back to that program in 2018-2019, we’re going down our standard path, and I was putting together all these custom board designs. What FPGA is going to go here? How much memory? What processor, and so forth. I’ll say relatively early on in the design, there was a dictate, for lack of a better word, that this particular design was going to be SOSA. At the time, I’ll say none of the reasons for SOSA they provided swayed me, to say the least.

Were you aware of SOSA at that time?

BORTON: No, that was really my first introduction to SOSA. And the mandate wasn’t even coming from the customer. It was an internal SRC decision at that moment. So, I had to find out, what am I getting by going down this road? I started looking at what hardware was out on the market and there wasn’t anything that really fit our needs. All I saw was a bunch of constraints preventing me from building the system that I thought was needed. Unbeknownst to me, SRC was a member of SOSA already, but we weren’t really participating at that point.

So I started going to the consortium meetings to learn more.

The September 2019 meeting in Dayton was my first time attending a SOSA face-toface meeting [Technical Interchange Meeting], and it was, for lack of a better term, where I had my conversion to SOSA.

Going in, I was ignorant of what SOSA’s true goals were in terms of bringing industry, academia, and government together. Previously, I just saw SOSA as this standard that I had zero control over, that I had to live with for better or worse. But once I learned more about the state of SOSA, how it was truly run as a consensus-based organization, and that it was about more than just hardware, I started to understand the opportunity. I also could wrap my head around how an engineer with my experience level could make a contribution to make the standard better. Understanding more about SOSA showed me how there is room for SRC to [show] our style of capabilities within the standard.

I found that that contributions to the standard were needed and welcomed by the group. It was really a big game-changer for me. The overall energy of the people in SOSA is really something special and it made a huge impact on me.

Did you already know a lot of those people from your day job or were most of them newly made acquaintances?

BORTON: There were only about two or three familiar faces, but the vast majority were all new to me.

What roles have you had since? How did your involvement progress?

BORTON: I started off focusing my efforts on the Hardware Subcommittee and the Low Latency Subcommittee, since a lot of the EW things that I was up to at SRC at that time really needed very low latencies. And over time, as I would learn more about SOSA and the different subcommittees, I started attending different group’s meetings. Then I began speaking up where I thought I had something to contribute. Slowly, I started getting more and more involved in different areas.

SRC was very supportive of my participation in SOSA. And we upped our membership from Associate to Principal so we could join the steering committee.

At the time, I had no interest in taking on a leadership role. I was more interested in being able to help drive the direction regarding standards development.

Does coming from SRC, which is a nonprofit research and development organization that came out of Syracuse University, give you a different perspective in SOSA, since SRC is not a prime, or a COTS vendor, or a government agency?

BORTON: My entire post-college career has been with SRC, so I don’t really have a lot of comparison points. I guess what I’ve gleaned from listening to others is that for a lot of my career I’ve had a bit more independence, an ability to influence some of the technical directions of key areas within SRC, opportunities that maybe wouldn’t be as available to lowerlevel engineers in larger companies. But I don’t really know.

SRC builds systems for customers but doesn’t have the same profit motive of a traditional system integrator since it’s nonprofit. Does that allow you to be more open and independent, maybe even agnostic, in terms of your contributions to SOSA?

BORTON: I’ll say, it certainly gives me freedom to be able to do what I think is best for SOSA. I really don’t feel like I have pressure from SRC that I need to do XYZ in SOSA in order for SRC to meet its initiatives. If something makes sense for SRC to standardize, I’ll only push that in SOSA if I really think it’s best for the standard and the community as a whole.

You [can] be altruistic in regard to the benefit of SOSA because you don’t have to advocate for [a] particular design approach or architecture philosophy.

BORTON: [Yes], I think that’s fair.

So, before your current role, did you have a number of different leadership positions?

BORTON: No, I pretty much ended up jumping straight to Vice Chair at SOSA. I had certainly been very vocal on a lot of change proposal materials and a lot of various pieces of content that had made their way into the standard and previous snapshots.

I think it’s really the work that I did on that material that paved the way towards my becoming Steering Vice Chair.

And up until recently your title has been Acting Chair.

BORTON: I always said I was just the Steering Vice Chair since that is what I was formally elected as. I was only acting chair until the following round of elections when Ilya [Dr. Ilya Lipkin, SOSA Steering Committee Chair] came back.

In your current role, what do you see as the most exciting developments at SOSA and what do you see as the greatest challenges? What do you look forward to talking about when you go to the meetings?

BORTON: My big push right now in SOSA is to get all of the various pieces a bit more coherent with one another. SOSA is very broad in terms of the subject matter it covers – everything from hardware inside of a chassis with plug-in cards, to outside the chassis with cables and electrical and mechanical connectors and mounting structures. How these different things talk together through various communications mediums, and the actual functionality contained in the SOSA modules through which the capabilities are provided. What really excites me is getting all these things together in a consistent fashion that makes it usable and understandable by people who are not participating in SOSA day in and day out. I can see how all these different pieces work together to enable a lot of SOSA’s goals, such as reducing integration time and allowing the selection of bestin-breed capabilities. Conveying all of that in a standard and showing it in an architecture is pretty difficult with something so broad.

To communicate the “unified theory” of SOSA in a cogent, coherent way.

BORTON: If we take the hardware, the OpenVPX portions that SOSA is standardized on, the clarity and consistency with how that’s been specified has made a huge impact on the market and how people are building their systems today. What I want to do is bring that level of goodness that SOSA has brought on the plug-in card side to the rest of the areas that we’re working on. I think the proof of the success is there, SOSA just needs to develop the material and get it out so that similar successes can be had on the other portions that SOSA covers.

Are you hopeful about 2024 being the year of conformance?

BORTON: Yes, I am pretty hopeful that 2024 will be when our first conformance segments come online. From all indications that I’ve seen so far, that should hold true.

Is there any message for people outside of the Consortium to better understand SOSA that you find yourself needing to repeatedly explain or clarify?

BORTON: Yes, I think there are two big messages. The first is that SOSA is more than just a hardware standard, even though that’s the most mature portion of the spec right now. Once we get the parts of SOSA beyond the hardware to greater maturity, we’ll really start to see the true power that SOSA can bring to the marketplace.

The second message: I don’t think it’s obvious to nonmembers how easily they can make an impact on SOSA and the content in the standard if they were to join. I’m a great example: I was a total outsider, but soon after I joined, I was participating and working hard to explain my viewpoints and was able to share how I saw things moving and dovetailing together. It is kind of amazing how open and welcoming the people that work on SOSA are. One of the things that drives me to keep going on SOSA is the fact that we have a lot of very passionate people involved, who are willing to work with whomever to make SOSA the best that it can possibly be. It is a unique space to operate in and the fact that SOSA is a consensus-based consortium within the Open Group sets the stage for enabling this kind of environment. ■

Nicholas “Nick” Borton is a machine intelligence hardware architect at SRC, Inc. and Vice Chair of the SOSA Steering Committee. Borton has worked at SRC for more than 17 years and is currently conducting research in edge-machine learning to maximize the use of size, weight, power, and cost, in addition to furthering open standards adoption at SRC. Borton earned his bachelor’s degrees in both computer engineering and electrical engineering from Clarkson University.

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ROUNDTABLE: SOSA having an impact on military program requirements, business practices

By John McHale, Editorial Director

It’s been nearly three years since ratification of the Sensor Open Systems Architecture (SOSA) Technical Standard 1.0 and its impact is being felt across the services as requests for SOSA aligned products are finding their way into program requirements. SOSA, an example of the modular open systems approach (MOSA) mandated by the U.S. Department of Defense (DoD), is also changing the way government leverages commercial technology and existing open standards like VPX. To learn more, I gathered a roundtable of SOSA Consortium members to discuss SOSA’s impact on the community, business practices, common misconceptions, and the future of what SOSA may look like five or 10 years down the road.

Our panelists are: Ken Grob, Director of Embedded Computing Architecture, Elma Electronic; John Sturm, Chief Technology Officer, Vicor; Noah Donaldson, Chief Technical Officer, Annapolis Micro Systems; Emil Kheyfets, Director of Engineering/Director, Military & Aerospace Product Line, Aitech Systems; Christopher Fadeley, Chief Technology Officer, EIZO Rugged Solutions; Dave Walsh, Senior Vice President and Chief Technology Officer, Parry Labs; and Marc Couture, Vice President, Hardware Products & Programs, Parry Labs.

MCHALE: The first release of the SOSA standard is nearing three years old. What has its impact been on radar and electronic warfare?

GROB: With the release of the Technical Standard 1.0 and subsequent snapshots, new designs are encouraged to make use of OpenVPX and the standardized profiles to realize modular systems, where 3U VPX and 6U VPX form factors are appropriate. With the COTS [commercial off-the-shelf] ecosystem now making many standard offthe-shelf cards, backplanes, and power supplies, building blocks are readily available to allow system integrators a choice of SBCs [single-board computers], transceivers, and switches to use as building blocks for radar and electronic warfare (EW) systems.

The standard provides guidance on how to implement custom VPX modules that may be required if off-the-shelf products are not available. In adopting SOSA, new radar and electronic warfare systems can gain the benefits of applying MOSA principles through the use of open standards.

STURM: From a design standpoint, as programs get upgraded we are starting to see designers take a closer look at SOSA aligned architectures. From a power perspective,

MARC COUTURE

Vice President, Hardware Products & Programs, Parry Labs

NOAH DONALDSON

Chief Technical Officer, Annapolis Micro Systems

CHRISTOPHER FADELEY

Chief Technology Officer, EIZO Rugged Solution

we are also starting to see new statements of work (SOW) that are heavily skewed toward using SOSA aligned products. A key driver is in EW and radar systems, where the threat level on the sensor is evolving rapidly pushing faster time-to-market solutions that support the MOSA/SOSA design methodology.

KHEYFETS: The SOSA standard has a big impact on the radar, EW, and C5ISR [command, control, computers, communications, cyber, intelligence, surveillance, and reconnaissance] designs. All new designs include SOSA aligned cards and systems, and SOSA aligned modules are available from multiple vendors in the industry.

FADELEY: SOSA has been a welcome force in the past few years. I believe it has radically helped with the adoption of newer technology paradigms. It forced integrators to not immediately leverage existing hardware and solutions. And, with accepting that, integrators have used it as an opportunity to re-audit their solution from a clearer perspective.

The use of GPUs for processing of signal data has always been experimented with, but this SOSA induced reset has allowed everyone to consider alternate approaches to solutions like GPUs. In doing so, it has allowed for more software-defined approaches to solutions which, in turn, is going to allow much more rapid adoption of upgrades.

WALSH & COUTURE: The widespread implementation of blind-mate interconnect in SOSA via VITA 67.3 RF coax and VITA 66 fiber for wideband, high-density RF [radio-frequency] and IF [intermediate-frequency] signal transport has enabled wider bandwidth, deeper dynamic range, and higher channel count relating to EW and ISR applications. The additional benefit has been improved 2LM [two-level maintenance] logistical support with the removal of front-panel cable chaos.

MCHALE: How has SOSA, and the MOSA mandate for that matter, changed how business is done with the DoD?

GROB: The mandate drives integrators and primes to use components for their system that follow MOSA principles, encouraging builders to use the SOSA Technical Standard to implement new system designs. From the hardware perspective, off-theshelf building blocks that are aligned to the SOSA standard must now be considered.

By mandating adherence to the SOSA standard, where practical, designers must consider hardware building blocks that follow standardized interfaces and make use of hardware form factors that adhere to open standards. In so doing, this promotes interoperability, and where standard hardware is available off the shelf, it can reduce overall development time by focusing on new system capability.

STURM: Relative to new SOW, more and more hardware designs in EW, radars, and C5ISR are moving toward SOSA aligned solutions. It’s not clear if the MOSA movement has yet to change or impact the DoD. However, we believe the goal is to make design requirements and sourcing more compatible and less custom, making systems more interchangeable to help simplify logistics and drive lower cost of operation. This should enable the DoD to react and pivot much quicker as new requirements are identified and flowed down to the defense primes.

KHEYFETS: All new RFIs/RFPs for DoD programs have SOSA/MOSA requirements. An RFI/RFP response is not even considered if the proposed solution is not based on a SOSA/MOSA implementation.

FADELEY: The DoD has always put emphasis on trying to procure COTS material, but how to convert that emphasis over to logistical implementation has been difficult. MOSA – specifically with SOSA as an implementation – has better directed a path forward for how to be successful.

KEN GROB Director of Embedded Computing Architecture, Elma Electronic

EMIL KHEYFETS Director of Engineering/Director, Military & Aerospace Product Line, Aitech Systems

JOHN STURM Chief Technology Officer, Vicor

DAVE WALSH Vice President and Chief Technology Officer, Parry Labs

There are, and will always be, competing factors and nuance for corner cases. I believe the key change recently is acknowledgement and acceptance of this complexity, but not accepting it as a system-wide excuse. MOSA isn’t just a blanket “all or none,” but can be iteratively applied, and the realization and acceptance of this from the DoD and vendors has been welcome.

WALSH & COUTURE: As government customers have begun to describe their desires and requirements relative to MOSA, and specifically SOSA, it is enabling industry to more consistently invest. As the government begins to consistently leverage standards like SOSA and consistently communicate their lower-level desires, it enables industry to lean forward and make investments in products that meet those requirements. This reduces the amount of guessing industry has to do relative to investments and makes it much easier to convince company leadership that the investment is a wise one.

With clear and transparent requirements being used across multiple programs, this further makes it easier to lean forward with investments and increases the amount of competition and the quality of the competition for the government PMs. If 10 companies are guessing on what the requirements will be, then when the requirements come out, it is likely that only three or four guessed well enough that they have a very competitive product.

MCHALE: In what areas are you seeing requirements for SOSA aligned solutions?

GROB: Elma is seeing requirements for SOSA aligned solutions in systems from all three service branches. There is demand for plug-in card (PIC) products, like switches,

SBCs, and other payload functions, and development chassis required to set up labs, as well as [demand for] new rugged deployable hardware.

STURM: Since power is ubiquitous for any system, new SOSA aligned power solutions have the real potential to benefit a variety of defense platforms including EW, advanced radar, C5ISR, and directed-energy applications, just to mention a few. The ability to use interchangeable power supplies over a range of independent systems would yield significant advantages in design, routine maintenance, field repair, and supplychain management.

DONALDSON: Mostly in Air Force systems, for airborne EW and other highperformance rugged applications. That’s a big part of our business, though, so maybe that’s sample bias. There might be similar levels of adoption in other [service] branches and applications. As we move forward, we expect procurement

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Powered by Military Embedded Systems, the MOSA Virtual Summit event aimed to drive awareness and thought leadership around MOSA initiatives like the Sensor Open Systems Architecture (SOSA), the C5ISR/EW Modular Open Suite of Standards (CMOSS), and the Future Airborne Capability Environment (FACE).

Covered subjects include the ways in which these initiatives impact signal-processing, software, hardware, AI, and RF designs. (This is an archived event.)

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will specify SOSA even more often. After a conformance program is established and the DoD develops confidence in it, look for SOSA requirements in more contract opportunities.

KHEYFETS: We see requirements for SOSA aligned solutions for mission computers, I/O concentrators, radars, networking/communication systems, AI [artificial intelligence] systems, flight-control systems, etc.

FADELEY: Next-generation vehicles that are started from the ground up with a SOSA approach are the solutions getting headlines, but it’s been refreshing to see the penetration to legacy refresh. It isn’t possible in every situation, but we are seeing SOSA alignment – especially with slot-profile selection – being requested almost across the board.

WALSH & COUTURE: We are seeing SOSA requirements making their way through all of the services.

MCHALE: What is the biggest misconception about SOSA within the military community?

GROB: SOSA provides a framework for how to build systems. It does not define a system design, but rather provides guidance on how to build systems using a modular approach. It is up to the prime or systems integrator to implement the hardware and software designs to realize a new type of system.

STURM: In the beginning SOSA was met with cautious optimism. The open standard approach has been a welcomed change, helping to streamline design processes while enabling companies to retain their IP internally and add value. For example, if power density needs to increase, those vendors that can scale in the same form factor (3U or 6U) will have a distinct advantage as the need for bandwidth or latency increases on the sensor.

DONALDSON: The biggest misconception about SOSA is that it throttles innovation. Our experience has been the opposite. We no longer spend thousands

of hours on myriad PIC backplane profiles or custom system user IO. Instead, we have more time to focus on high performance advancements – like Direct RF – within the module, which is somewhere that SOSA encourages innovation.

KHEYFETS: While the SOSA standard is good in limiting the number and options of major modules in the SOSA aligned system, it may not be the best solution for all electronics in a specific platform. Some custom electronics, which are not SOSA/ MOSA aligned, will still be needed to support smaller/custom size constraints and custom sensors interfaces.

FADELEY: That SOSA as a full specification is an “all or nothing” requirement. SOSA is a complex beast of many different modalities and elements. It would be unrealistic to assume every element of SOSA is at the same maturity level. There is a lot of work still to be done in many areas, and that work will continue for many years. But many parts (especially hardware and its slot profiles) are mature and are readily being adopted. I think it’s important to keep the perspective that everything is an iterative approach and vendors and integrators should continue to lean forward as other elements reach maturity.

MCHALE: Predict the future: Where do you see SOSA and MOSA impacting DoD procurement five years from now?

GROB: As the SOSA standard and MOSA mature, new systems should benefit from the ecosystem offering products, including hardware and software, that enable more rapid development of system capabilities required by the services. This should help the DoD get capability to the warfighter faster and in a more cost-effective way, and be in a position to affect upgrades using new building blocks that are aligned to the modular open systems approach.

STURM: We anticipate the open standard approach will continue to gain momentum over time as the benefits of quicker design times and lower program costs are realized. As the adoption rate of the open standard increases throughout the industry, it will enable the DoD to have more options regarding supplier selection. Ultimately it will provide more opportunities for vendors to align with solutions and form factors that will help increase their customer base, while also retaining their IP and value to the defense community.

KHEYFETS: Aitech strongly believes that five years from now the majority of electronic systems on DoD platforms will be SOSA/MOSA compliant. SOSA/MOSA requirements will be included in most of the RFIs/RFPs for DoD programs.

FADELEY: In five years, I expect a lot of the “MOSA from the ground up” implementations to be more settled and being used as clear proof of work of using MOSA. I also expect many of the legacy refreshes having implemented MOSA over the past couple years will hit a refresh cycle. I am especially excited for that as it will show true proof of concept of upgradability ease.

Lastly, I expect the SOSA specification to be even more mature and the procurement to be further armed with knowledge on how to use SOSA in requirements specification.

WALSH & COUTURE: This is super dependent on the government. Congress has provided clear expectations relative to MOSA. If the government takes the time to define major system components and major system interfaces, and communicate which standards are important to them, then the government has the ability to bring substantial and healthy competition to the DoD marketplace to include small businesses that are the true heartbeat and innovation arm of the U.S. ■

Can SOSA bring back interoperability?

By Jim Tierney

The SOSA [Sensor Open Systems Architecture] Technical Standard – aimed at creating a common framework for transitioning military electronics sensor systems to an open systems architecture – is positioned to bring back interoperability by keeping the OpenVPX high-performance architecture while replacing the myriad of design options with a limited set of industry-agreed choices.

Military C4ISR [command, control, communications, computers, intelligence, surveillance, and reconnaissance] programs moving to the newest computing technologies face “forklift upgrades” or major overhauls because interoperability is long gone. Back in the days of VME, systems were built using components from many vendors; the standard enforced a plug-and-play commonality in designs. Today’s OpenVPX standard supports orders of magnitude increases in performance, but its wide-open flexibility means every system design is unique, driving up life cycle costs and stretching out upgrade timeframes.

Longstanding issues continue to plague DoD programs

Most defense electronics programs struggle with long technology upgrade cycles that involve replacing complete systems, which could include a new chassis populated with updated computing modules and supported by more recent power and communications cabling. These complex upgrades take years to design and implement, driving up program life cycle costs. Long

upgrade timeframes also mean that deployed processors, analog-to-digital (A/D) converters, and memory chips fall behind state-of-the-art commercial components, often by several generations.

The underlying cause is a lack of technology interoperability. Customizations in hardware and unique supporting software make upgrading individual modules or specific components impossible. Interoperability, a stated goal in many programs, has rarely been achieved in any practical sense, at least not recently.

Interoperability and a look back at VME

In any technology, consistent component interoperability is based on adherence to a rigorous design standard. Embedded electronics once had such a standard – VME. For 25 years, the VME architecture defined commercial off-the-shelf (COTS) systems, while VME bandwidth increased from 40 Mbytes/sec on the original VMEbus to 80 Mbytes/ sec, then 160 Mbytes/sec and finally 320 Mbytes/sec on 2eSST. These bandwidths seem small to us today, but they were able to keep up with the contemporary processing components.

A great strength of the VME ecosystem was true interoperability, supporting systems that combined components from many contributors into effective solutions. This was possible because VME was a mature and unambiguous standard. But eventually, after an incredibly long run, the VME connector eventually ran out of gas. (Figure 1.)

OpenVPX: Fast and (too) flexible

VME’s successor was VPX, a standard created to deliver very high bandwidth communications using a new high-speed connector concept. VPX, which morphed into OpenVPX, also uses the concepts of pipes, planes, and profiles to define an architecture capable of supporting multiple data transfer protocols, including Ethernet (in all its flavors), Serial RapidIO, and PCIe.

While clearly able to meet the data movement demands of today’s most advanced C4ISR programs, OpenVPX is also very much “open,” so wide-open that interoperability is not a real possibility. There are literally dozens of profile options, further complicated by many user-defined connector pins.

“We’ve designed and manufactured several hundred OpenVPX backplanes.” said my colleague and Atrenne Director of Engineering Keith Vieira. “No two of them are the same; the level of flexibility allowed by the standard still surprises me. Moving a board from one backplane to another is pretty much impossible without significant redesign.”

Design costs go up when every program uses a unique, essentially custom backplane, upgrade cycles are stretched out, and component reuse can’t happen.

SOSA’s goal: Bring back interoperability

The Sensor Open Systems Architecture (SOSA) Technical Standard is a comprehensive standard addressing long upgrade timeframes and life cycle cost issues. Driven by the U.S. Department of Defense (DoD) with industry support, SOSA’s goals are to:

› Enable upgrades of system elements without redesigns

› Drive more competitive, costeffective acquisitions

› Lower system life cycle costs

› Encourage commonality and reuse of components

› Enable interoperability between systems

SOSA is leveraging other, alreadyexisting standards efforts: Starting at

a high level, it is aligned with the DoD’s modular open systems approach (MOSA), focusing on using standardized hardware and software. SOSA also brings together elements from standards developed by each of the three military services, specifically the Army’s CMOSS (C4ISR Modular Open Suite of Standards), the Navy’s HOST (Hardware Open Systems Technology), and the Air Force’s SOA (Service Oriented Architecture) and UCI (Universal Command and Control Interface). The SOSA standard includes both business architecture and technical architecture; our focus here is on the technical side.

At a technical level, the SOSA standard adopted concepts and definitions from the OpenVPX standard, including a taxonomy of planes, pipes, and profiles. However, SOSA accepted only a small subset of the OpenVPX profile options. OpenVPX has quite a few plug-in card profiles (PICPs) that are, in many cases, largely redundant. To simplify that situation, SOSA employs the concept of a pinout “overlay” to define the functionality of previously undefined pins.

SOSA also reduces the number of protocol implementations defined within OpenVPX. However, the new standard does expand on the OpenVPX “Alternate Profile Module Scheme” with specific fields for RF pinouts, XMC overlay, and switch front panel fiber I/O.

The result is that SOSA systems will look like OpenVPX systems, but with a huge reduction in variability. A much more tightly defined technical specification means that cards will be interoperable between systems, and backplanes will be pin-compatible with a wide range of cards from a whole ecosystem of vendors. (Figure 2.)

Moving forward with SOSA

Today’s troops face a global adversary that is technically agile and future-focused. If DoD programs cannot respond competitively, warfighters will lose the powerful technology advantage they now wield. Key to maintaining that advantage is the ability to rapidly insert new, more powerful technology into deployed sensor-enabled systems for radar, EO/IR [electro-optic/infrared], SIGINT [signals intelligence], EW [electronic warfare], and communications. ■

Jim Tierney is Vice President of Aerospace and Defense Systems at Atrenne Computing Solutions. He has been with the company for nearly 15 years.

Atrenne Computing Solutions https://www.atrenne.com/

FIGURE 1 | Slot count was the only variable in 6U VME backplanes.

FIGURE 2 | True interoperability will allow tech reuse and faster upgrades. 6U SBC photo courtesy Abaco/Ametek.

SOSA’s impact on electronic warfare designs

By John McHale

Open architecture approaches like the Sensor Open Systems Architecture (SOSA) Technical Standard are changing the way defense electronics designers build tomorrow’s military platforms. SOSA’s impact is felt within the electronic warfare (EW) community as requirements for the products based on the standard become more prevalent, riding the modular open systems approach (MOSA) wave within the DoD.

Several years ago, the Sensor Open Systems Architecture (SOSA) Technical Standard revision 1.0 was ratified. Yet its impact on electronic warfare (EW) designs began before that, even before they came up with the official acronym.

EW systems were in large part based on closed architectures rather than open, partially due to the nature of the operational purposes, but also due to the business model of the integrators and prime contractors. While past EW systems leveraged commercial off-the-shelf (COTS) products based on open standards like OpenVPX, they were not what could be described as interoperable.

But a push began to embrace more open architecture designs in other military applications, and the results – faster deployment of technology and lower life

cycle costs – were found quite attractive by the end user: the U.S. Department of Defense (DoD). This sparked enthusiasm within DoD circles that led to the formation of the SOSA Consortium and eventually to the modular open systems approach (MOSA) mandate from DoD leadership to use open architectures in all new programs and upgrades. The primes and integrators followed suit, as their customers were then pushing for MOSA.

Makers of those systems that were to be aligned with and conformant to the SOSA Technical Standard moved quickly within the consortia to craft specifications – largely adopting existing standards like OpenVPX – to get to the release of SOSA 1.0 and see SOSA alignment end up in EW system requirements from the DoD. Benefits of that push are today being realized in those designs.

“EW is one of the primary sensor modalities of SOSA,” says Mark Littlefield, Sr. Manager, Embedded Computing Solutions, Elma Electronic (Fremont, California). “As a result, it has been a part of the decision-making for the SOSA Technical Standard since day one. Many of the port and signal definitions of both the VPX and VNX+ slot profiles were chosen to address the needs of EW, as has the SOSA module architecture.

“We are already well into the era of multimode sensors, where a sensor may be called upon to do different types of radar, act as a communications device, or to perform

electronic warfare or SIGINT [signals-intelligence] functions. Having a common architecture that supports all of these functions means that integration of different functions is much easier, and common functional modules can be shared among the functions.”

Size is an important factor within EW designs, though in the past it was often cited as a reason not to use open architectures. That may not be as much of an issue anymore.

“EW systems are often physically smaller than other types of sensor systems and must be tucked away in awkward and sometimes space-constrained physical locations; this is especially true of aircraft,” Littlefield adds. “SOSA’s inclusion of VNX+ as a fully SOSA aligned small-form-factor plug-in card means that integrators have a COTS option even when the system is physically too small for even 3U VPX.”

Commonality from the cards and modules as well as separation of elements in the system are additional benefits.

“The common Plug-In Card Profiles allow for rapid insertion of new capabilities into existing processing infrastructure as they become available. This [enables] the system to maintain the pace of innovation at the silicon level, ultimately resulting in outpacing adversaries,” says Jake Braegelmann, Vice President of Business Development at New Wave Design and Verification (New Wave DV – Minneapolis, Minnesota). “Another benefit of the standardization brought by the SOSA Technical Standard is the separation of front-end system elements from processing elements, and pro cessing elements separated from algorithms.

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“There will certainly still be companies that do all three elements well: RF front ends, digital processing hardware, and algorithms,” he continues. “However, the SOSA Technical Standard, along with other MOSA elements, allow for innovation in one area by a market participant without that innovator also being required to provide the other elements. This is beneficial for the whole ecosystem and ultimately the warfighter.”

NAI’s Configurable Open Systems Architecture (COSA®) solutions are designed to deliver faster, more modular, COTS-based systems without NRE. Our 3U OpenVPX SOSA-aligned processing, I/O, communication, measurement, and simulation systems provide unparalleled configurability and adaptability, expanding the reach of COTS hardware to meet the requirements of flight, mission, avionics or digital backbone systems.

FIGURE 1 | Slot count was the only variable in 6U VME backplanes.

The technical commonality enables MOSA strategies like SOSA to succeed. One of the success metrics lies in how quickly technology can be delivered to the warfighter.

“The primary benefit is it accelerates new technology insertion in response to rapidly evolving threats over time and next-generation silicon that offers higher performance, higher integration, and power optimization,” says Dinesh Jain, FPGA Product Manager for Abaco Systems (Huntsville, Alabama). “The modular system design approach enables different parts of the sensor processing chain to be upgraded without having to redesign the entire system, [thereby] accelerating field deployment.”

Jain says other advantages include:

› Quicker time-to-market as suppliers are able to invest in new technology development without waiting for program requirements because slot profiles are well-defined, which reduces the lead time for integrators to implement technology upgrades using latest-generation products.

› New functionality that was previously unavailable, such as AI/ML [artificial intelligence/machine learning] at the edge.

› Longer EW program life cycle because a common chassis and standards-based pin-compatibility simplifies future technology upgrades.

› Supplier independence: Integrators have more choices and can select the best fit for the application, since everyone is building to the same standards.

SOSA also creates sensor fusion through its sensor processing chain.

“The SOSA Technical Standard provides the ability to create a high-performance heterogeneous sensor processing system that provisions for many sources of data input/output and mediums of data – optical, RF, electrical, networked/point-to-point –in standard profiles,” Braegelmann says. “This creates an ideal sensor fusion processor with the ability to upgrade processing capability rapidly over time and leverage standards-based interfaces to the various data sources/syncs, providing for innovation at the different system elements independently.”

Requiring SOSA

A clear sign that SOSA momentum is increasing is when SOSA becomes common in requirements for new DoD EW programs and upgrades.

“We see SOSA aligned products requirements in the specifications for most of the new programs,” says Emil Kheyfets, Director, Mil-Aero Business Development, Aitech Systems (Chatsworth, California). “For many programs, SOSA requirements are no longer a ‘good to have’ option, but rather a required element.” (Figure 2.)

The leap in requirements is prevalent in EW applications.

“We are actually seeing a jump in overall demand within the EW space,” Elma’s Littlefield says. “EW is often a more dynamic sensor environment than other sensors because integrators are having to adapt to evolving threats. SOSA is making that job much easier. As a result, the demands for SOSA based products is growing.”

The demand for SOSA is not limited to a single product, either: “We are seeing demand for development hardware, chassis and backplanes, switches, deployment backplanes, and single-board computers,” says Ken Grob, Director of Embedded Computing Architectures, Elma Electronic. (Figure 3.)

At Abaco “[we see requirements] for most new programs of record where 3U and 6U systems are specified,” Jain says. He notes, however, that he is not seeing requirements

FIGURE 2 | Aitech provides the SOSA aligned U-C8500 Tiger Lake-based 3U VPX single-board computer.

FIGURE 3 | Elma’s ATR-3600S is an offthe-shelf half-ATR specifically designed for deployable applications requiring alignment with the SOSA Technical Standard.

for “existing programs that are upgrading their pre-SOSA platforms, or for non3U/6U VPX designs such as small form factor (SFF) where a SOSA specification has not yet been ratified.”

Misconceptions dispelled

While SOSA content is becoming more prevalent in EW program requirements, there remain misconceptions about what SOSA is and how it will affect designs and the pace of business.

“The biggest misconception about SOSA within [EW] design cycles is the applicability of the various section of the SOSA standard to a specific system design,” Kheyfets says. “For example, if SOSA standardized systems are an overkill for the target design, SOSA aligned modules can still be used in the smaller application-specific system to reduce cost and complexity, while providing other MOSA/SOSA benefits.”

Littlefield says the biggest misconceptions in the EW community are, for the most part, the same as in all sensor communities, such as:

› Industry standards are too bulky and laden with overheads to be useful › They don’t contribute much to better time-to-deployment

› SOSA is a U.S.-only thing, and of no value to organizations or programs outside of the U.S.

“All of these we are repeatedly showing as not being the case, and communitywide it’s becoming clear that SOSA works,” he notes. “EW does have the added challenges of extremely low latencies in the tasks that an EW system must perform. SOSA has had to go to some lengths to address this, [and] in fact, still has some work to do. However, those lingering issues will be addressed in time.”

Despite its openness, some industry folks believe that SOSA constrains designs.

A common misunderstanding about SOSA is that it “constrains optimal designs – [that] standardization could be seen as limiting when architecting an optimal EW platform,” says Michael Wurts, FPGA & GPU Product Specialist at Abaco Systems. This angle manifests itself in two ways: placing the SOSA platform as close to the sensor for lowlatency processing and by the standardization of slot profiles limiting available thin pipe/fat pipe I/O, which may not be enough to process and transmit large datasets for processing. These issues are being addressed, however.

“The SOSA consortium is working on small-form-factor standardization such as VNX for space-constrained requirements, including placement in proximity to the sensor for low-latency EW processing,” Wurts continues. “The first SOSA aligned design can be a bit challenging due to having to design to the standard, but the investment is worth the benefits for subsequent designs. Because of defined standards, suppliers are proactively implementing creative solutions for higher performance on SOSA platforms [instead of waiting] on a program opportunity.” (Figure 4.)

Where is the edge?

The phrase “edge” is often used to describe sensor designs, but opinions vary where the edge actually resides.

“I don’t know if I would say it is a misconception necessarily, but there is some debate within EW designs – and all new sensor designs in general – about where the ‘edge’ is located,” Braegelmann says. “Is the edge within a SOSA aligned processor box, or does the push to the edge necessitate moving processing all the way into the sensor aperture itself when possible?

“If the edge is in the aperture itself, can the solution still be SOSA aligned?” he asks. “And if you move all the way to the aperture, can you still accomplish sensor fusion by aggregating the other sources of intelligence such as radar and EO/IR? Or is meaningful data removed at the edge, and it is no longer available for sensor fusion?” ■

FIGURE 4 | One Abaco SOSA aligned VP461 can replace as many as five standard payload VPX cards.

Ukraine provides key lessons for missile defense radar on the battlefield

By Dan Taylor

Russia’s invasion of Ukraine in early 2022 kicked off a new era of modern warfare. Drone strikes, hypersonic missiles, and the use of a wide spectrum of other weapons introduced the world to new threats on the battlefield. Radar systems are stretching their limits to keep up.

The war in Ukraine gives the defense industry a glimpse into how it must adapt radar systems to meet modern threats such as hypersonic missiles. Industry experts are learning lessons that may fundamentally change the way they develop radar systems in the future.

For the defense industry, Ukraine is a case study in the application and evolution of battlefield radar in modern warfare. As warfare becomes increasingly complex with the advent of new technologies and tactics, the role of radar systems in providing situational awareness and threat detection is more critical than ever.

The Ukraine war demonstrates the challenges of modern-day warfare that companies must design radar to solve, notes a Raytheon (Arlington, Virginia) spokesperson. “Airspace is congested and contested, with multiple, highly maneuverable threats traveling at various speeds and coming from all directions. For air defenders, situational awareness is critical and must be more responsive than ever.”

Raytheon’s Lower Tier Air and Missile Defense Sensor (LTAMDS) for the U.S. Army is designed to detect and counter advanced threats – like hypersonic weapons – and it is equipped with three antenna arrays for 360-degree coverage in order to identify and engage multiple threats simultaneously. It is part of the company’s GhostEye family of radars.

Lothar Belz, head of public relations for Hensoldt (Taufkirchen, Germany), which supplies radars used in air defense systems sent to Ukraine, says his company has received “excellent operational feedback from Ukrainian stakeholders” that indicates they value mobility, extremely short reaction times, and resilience against electronic countermeasures (ECM).

The Raytheon Lower Tier Air and Missile Defense Sensor (LTAMDS), an air defense radar designed to counter advanced threats. Image courtesy Raytheon.

Electronic warfare (EW) and battlefield radar have been critical in neutralizing diverse threats, says Dinesh Jain, product manager at Abaco Systems (Huntsville, Alabama). The conflict in Ukraine demonstrates how important it is to effectively differentiate between friend and foe, evolve strategies, and respond effectively to sensor inputs, he adds.

“A deeper dive into numerous public reports of attacks, defenses, and counter-

offenses points to the immense importance that electronic warfare and battlefield radar plays in neutralizing threats to protect civilians, resources, and infrastructure,” Jain states. (Figure 1.)

Sensor fusion, the integration of data from various sources, and the networking of different radar systems are crucial components in modern warfare because they improve situational awareness and enable troops to respond more effectively, Jain asserts.

The networking of radar systems, as observed in Ukraine, enables distributed sensing over a broader area, Jain continues: “Networking allows radar systems to be spread out in different areas as opposed to concentrated in a smaller area, reducing the risk of a targeted strike that completely neutralizes a defense asset.”

Missile threats expanding

Ground troops face a growing array of missile threats that must be countered by today’s defense systems. The evolution of missile technology presents new risks on the battlefield – and radar must keep up in order to protect those troops.

Troops have to worry about all the traditional threats, such as anti-tank guided missiles (ATGMs), rocket-propelled grenades (RPGs), and air-to-surface missiles, but they also now have to contend with guided ammunition, armed drones, and hypersonic missiles, Belz says.

“Of course, the ‘non-missile’ threats [such as] small arms, artillery, mines which pose specific challenges to early warning and detection have not disappeared,” he adds.

There’s growing concern about the dynamic trajectory of hypersonic missiles, Jain says. These weapons operate at high speeds and are highly maneuverable, making it a challenge for current defense systems to engage them – or even for traditional radar to be able to spot them.

“There is some debate about how sophisticated this specific missile really is, but it made clear that there is a gap in being able to defend against these types of threats as nations continue to invest in advanced missile technology designed to evade battlefield radar,” he says.

Advancements in radar technology

To match these threats, the defense industry is making big investments in radar technology, focusing on enhancing threat detection, tracking capabilities, and overall battlefield awareness.

Raytheon’s LTAMDS system is aimed at improving the range and sensitivity of U.S. Army radars so it can better counter advanced threats – such as drones, cruise missiles, and ballistic missiles. It uses three antenna arrays, with the primary in the front and two secondaries in the back.

“Working together, they can detect and engage multiple threats from any direction simultaneously,” the Raytheon spokesperson says. “Raytheon uses active electronically scanned array, or AESA, technology and military-grade gallium nitride, or GaN, made at its foundry in Andover, Massachusetts, to strengthen the LTAMDS radar signal and enhance its sensitivity for longer range, higher resolution, and more capacity.”

FIGURE 1 | Abaco Systems’ VP461: 6U VPX with dual RFSoC and DSP processing with 16 x 16 wideband RF channel synchronization.

The high-performance signal processing subsystems for the LTAMDS are provided by Mercury Systems, Inc. (Andover, Massachusetts). The company recently signed a three-year subcontract to deliver hardware to Raytheon for the next nine LTAMDS radars to support the U.S. Army and Poland, the first international LTAMDS customer, according to a Mercury Systems release.

Belz says Hensoldt is focused on increasing the versatility in radar systems to counter a wider range of targets. He points out that modern radars must reduce exposure to enemy detection and ensure interoperability with various legacy systems, which they can achieve through the digitization of radar functionalities, the integration of passive sensors, and the use of open architectures.

“Together with other improvements, the trend goes to multifunctional systems offering detection, electronic warfare, and networking capabilities in one system,” Belz says. (Figure 2.)

Artificial intelligence (AI) and machine learning (ML) could also be gamechangers, Jain says, using the U.S. Department of Defense (DoD) Missile Defense Agency’s Glide Phase Interceptor (GPI) program as an example. The GPI program aims to develop a missile-defense system capable of destroying hypersonic projectiles during their challenging pre-impact phase, and it is thought that AI could be useful for improving tracking and decision-making.

“In addition to the general progression of high-speed, wideband data converters, sensor fusion, higher-speed data buses, and higher-density processing through advanced silicon packaging techniques, AI/ML at the edge is a new tool that is being leveraged to build more sophisticated radar systems,” he says.

The role of open architecture

Designing sophisticated radars and upgrading current systems will be enabled by open architectures and open standards like the Sensor Open Systems Architecture (SOSA). A modular open systems approach (MOSA) marks a paradigm shift from traditional, closedsystem developments to more flexible, modular, and adaptable frameworks. Open architectures enable faster integration of commercial innovation reducing long-term life cycle costs.

Open systems make it easier for the defense industry “rapidly upgrade capabilities to counter emerging future threats,” the Raytheon spokesperson says.

Belz notes that ease of integration is key to continually improving radar systems, which is where open standards can make a big difference. “Open architectures are essential to build up distributed defense systems with all the elements – sensors, comms devices, weapons – feeding (and using) actionable intelligence from the whole network,” he adds.

The move toward open systems represents not just a technological shift but also a strategic one. It enables a more collaborative approach to defense technology development in which different vendors can contribute components that seamlessly integrate into a larger system. This means that the military can take advantage of advancements in the commercial arena, Jain says.

“One of the other lessons learned from [Ukraine] is the importance of advanced computer processing to run complex software and firmware to manage the sheer amount of data being generated by radar sensors and extract relevant intelligence,” he says. “Leveraging the economies of scale provided by commercial silicon vendors and adapting it into standards-based form-factors [can help with] implementing increasingly complex threat-detection algorithms using AI/ML, rapid system upgrades, and time to deployment.” ■

FIGURE 2 | Hensoldt’s TRML-4D is a multifunctional air surveillance and target acquisition radar system used in Ukraine.

MOSA Power Products : 3U

Direct RF: The transformation of critical defense systems

By Rodger Hosking

Widespread exploitation of the radio frequency (RF) spectrum profoundly impacts all consumer, commercial, industrial, government, and military markets across the globe. Since defense system counterparts often need hundreds or thousands of antenna elements, they can benefit from the technology and components developed for 5G commercial markets. Because the most critical imperative for government defense organizations is continuous enhancement of electromagnetic spectrum domination, an area of improvement must be enhancing how radio frequency signals of interest are acquired, analyzed, and then exploited through sophisticated signal-processing techniques to deliver an effective response. Such a mandate inspires new defense and electronic warfare (EW) technologies and architectures that boost performance levels across each system.

Judiciously coupling new wideband direct radio frequency (RF) signal data converters with the latest FPGA [fieldprogrammable gate array] devices affords significant critical system performance advantages over previous architectures [for applications such as electronic warfare (EW), radar, and military communications]. Using advanced silicon processes and packaging technologies, device offerings include both discrete monolithic designs and multichip modules. Even so, the fire hose of

digitized data samples from these data converters can overwhelm the signal processing resources of even the most powerful FPGAs. To address this issue, key DSP [digital signal processor] resources like digital downconverters are usually incorporated within the direct RF converters. What are some of the new open architecture solutions that incorporate the newer signal acquisition and signal processing  resources?

Direct RF for software radio

When the concept of software radio first emerged about 50 years ago, radio engineers immediately recognized its possibilities, even though the performance of existing hardware was limited by two essential elements: the data converter (sampling rate, analog signal bandwidth, and sample accuracy), and the attached DSP system (computational speed, complexity, and accuracy).

DIRECT RF GREATLY IMPROVES THE PRECISE CHANNEL SYNCHRONIZATION BETWEEN ANTENNA ELEMENTS BY ELIMINATING MOST DISCRETE ANALOG RF TUNER SIGNAL COMPONENTS, ALL SUBJECT TO COMPONENT TOLERANCES, AGING, TEMPERATURE DRIFT, RELIABILITY, AND PERIODIC MAINTENANCE.

With ADCs fast enough to digitize RF signal frequencies directly, the RF tuner section shown can be eliminated, resulting in the direct RF receiver shown at the bottom. Without the mixer, local oscillator, intermediate frequency filters, amplifier, and numerous discrete analog components, the RF signal chain is far less complex, bulky, and expensive. Driven by these many benefits for commercial, industrial, and defense markets, performance levels of discrete monolithic direct RF ADCs and digital-toanalog converters (DACs) have steadily advanced, as illustrated in Figure 2.

Because maximum RF signal bandwidths are limited to half the sample rate, the 64 GS/sec ADC shown at the right in the figure can digitize signal bandwidths approaching 32 GHz, covering a vast range of vital military radio applications.

Benefits of direct RF architectures

FIGURE 1 | Heterodyne receiver (top) requires a complex, bulky RF tuner stage with mixer, local oscillator, IF filters, and IF amp, all eliminated in the direct RF sampling receiver shown below to reduce size, weight, and power (SWaP) and cost per channel, while improving synchronization and system reliability.

Because most RF input signal frequencies far exceeded the capabilities of early analog-to-digital converters (ADCs), such software radios required an RF tuner stage to translate RF signals to lower IF frequencies before they could be digitized. This was often implemented as a traditional heterodyne receiver stage like the one shown at the top of Figure 1.

Phased-array radio systems utilize antennas consisting of multiple elements arranged in linear or planar arrays. Directionality of transmit and receive signal beams is achieved by precisely shifting the relative phase of signals using a dedicated signal processing channel for each element. This setup – which enables a single antenna array to simultaneously track multiple targets in different locations using the same frequency for far more efficient coverage – is widely exploited in defense applications as well as commercial mobile phone systems.

The enormous general market for 5G wireless networks means widespread installation of local, massive-MIMO [multiple-input/multiple-output] phased-array antennas, each typically needing 64 transmit/receive elements. Since defense system counterparts often need hundreds or thousands of antenna elements, they can benefit from the technology and components developed for 5G commercial markets.

Because each element needs its own unique transmit and receive signal, direct RF ADCs and DACs significantly reduce SWaP and system cost of phased-array systems by eliminating the RF frequency translation stages in each signal channel. This dramatically shrinks the size of the electronics housing so it can often fit directly behind the antenna, a major trend in new system architectures.

Direct RF greatly improves the precise channel synchronization between antenna elements by eliminating most discrete analog RF tuner signal components, all subject to component tolerances, aging, temperature drift, reliability, and periodic maintenance.

Direct RF data converters

Most advanced direct RF data converters with sampling rates above 10 GS/sec are available as discrete packaged devices or as silicon die known as “chiplets,” suitable for attaching directly to other die in a multichip module.

In June 2023, Analog Devices announced its Apollo MxFE [mixed-signal front end] family of direct RF ADCs and DACs. A member of this series is the AD9084 featuring

four 20 GS/sec 12-bit ADCs and four 28 GS/sec 16-bit DACs using monolithic 16 nm CMOS technology.

With direct RF signal sampling capable of handling signal frequencies up to 18 GHz, the Apollo series now opens up new architectures for many critical Ku band aerospace and defense applications including radar, EW, and communications. Apollo’s on-chip DSP functions include configurable two-stage digital upconverters (DUCs) and digital downconverters (DDCs) for adapting to a wide range of arbitrary RF target bandwidths during deployment. These functions not only reduce data streaming rates to the FPGA, but also eases DSP task loading. Fully synchronous channel operation across multiple Apollo devices supports the growing trend towards large phased-array systems.

Another vendor, Jariet Technologies, has an Electra-MA direct RF data converter chip with two 64 GS/sec 10-bit ADCs and two 64 GS/sec 10-bit DACs. The device also includes on-board DUCs and DDCs, as well as programmable sub-band channelizers for efficiently handling narrowband signals. With a usable analog bandwidth up to 32 GHz for both transceiver channels, the Electra-MA supports Ka-band applications that are becoming increasingly critical for defense systems.

FPGAs for direct RF

AMD’s Versal ACAP [Adaptive Compute Acceleration Platform)] devices based on its 7-nm silicon process consists of a series of six SoC [system-on-chip] architectures, each with specific blends of different processing engines, high bandwidth memory, and powerful peripherals. (Figure 3.)

The scalar engines include the dual core Arm Cortex-A72 application processor and the dual-core Arm Cortex-R5 real time processor. Unlike most scalar processors that implement single instruction, single data structures, these ARM processors provide single instruction, multiple data (SIMD) operations.

The adaptable engines use programmable logic FPGA fabric plus various

FIGURE 3 | Two members of the AMD Xilinx Versal ACAP system-on-chip FPGAs are the AI [artificial intelligence] core (left) and high bandwidth memory (right) devices. Courtesy Xilinx.

FIGURE 2 | Maximum ADC sample rates have doubled approximately every 21 months during the last 15 years.

types of memory, including block RAM, UltraRAM, and accelerator RAM. Configurable logic in FPGAs is the right platform for real-time state machines, control logic, complex timing, Ethernet packet processing, and synchronization, all essential functions for many embedded defense systems.

Versal offers two types of intelligent engines: The DSP engines are specialized, highly efficient real-time signal processing blocks that include fixed- and floating-point multipliers, accumulators, arithmetic units, data multiplexers, and barrel shifters for both scalar and vector data types. With more than 14,000 DSP engines in the largest Versal devices, highly parallelized processing architectures can process real-time data streams from high-rate direct RF data converters. As a result, DSPs deliver the lowest latency of all processing classes.

The second class of intelligent engines is actually two types of AI [artificial intelligence] engines. The general AI engines are balanced to support both machine learning (ML) applications and advanced signal processing for beamforming, radar, FFTs [fast Fourier transforms], filters, video enhancement, and image processing. The AI/ML engines are optimized for ML tasks including image and speech recognition, medical diagnosis, statistical arbitrage, and predictive analytics, and they also offer extended support for ML data types. For ML applications, they are eight times more efficient in silicon area for than DSP engines, reducing power by about 40%.

On-board, flexible high-bandwidth memory (HBM) offer data transfer bandwidths up to 820 GB/sec, representing an 8-time increase in bandwidth compared to traditional DDR5. The upcoming Versal ACAP AI RF series has on-board direct RF ADCs and DACs, following the highly successful theme introduced by RFSoC.

To interconnect all of these diverse resources, ACAP includes an extremely wideband configurable network-on-chip that offers a uniform interface and protocol to simplify system integration. This

FIGURE 4 | Intel direct RF FPGA offerings include Stratix10 AX devices (left) using 14 nm silicon and Agilex 9 devices using 7 nm silicon. All use EMIB [embedded multi-die interconnect bridge] connections between the FPGA fabric and Jariet Electra-MA direct RF ADC and DAC chiplets.

FIGURE 5 | Four AMD Versal ACAP direct RF products from Mercury (l-r): RFS1140 RF systemin-package with a single AI core and 4-ch 64 GS/sec ADCs and DACs, SCFE6933 6U VITA 78 SpaceVPX with AI Core FPGA and optical I/O, and 5560 SOSA aligned 6U OpenVPX card with two AI Core FPGAs and optical I/O, and 5560 SOSA aligned 3U OpenVPX card with Versal HBM FPGA and direct RF mezzanine ready for ADI Apollo AD9084 ADCs and DACs.

heterogeneous mix of ACAP resources enables the designer to assign compute power to the processing engine most suitable to the task at hand and the ability to adaptively reassign resources as required. This flexibility of ACAP delivers as much as ten times the performance compared to dedicated processor types alone.

Intel offers two families of direct RF FPGAs, the Stratix 10AX and the new Agilex 9, shown in Figure 4. These multichip modules take advantage of Intel’s chiplet fabrication capabilities to attach various combinations of chiplets to the main FPGA chip using EMIB [embedded multi-die interconnect bridge] and 2.5D packaging processes. The Intel direct RF devices use the Jariet Electra-MA 64 GS/sec 10-bit chiplet data converters for all three of the devices shown. (Figure 4.)

The Stratix 10 AX device uses 14 nm silicon geometry and the FPGA fabric sports 2,753 logic elements, over 11k multipliers, 244 Mbits of on-board RAM, and PCIe Gen3 interfaces. The Agilex 9 devices use Intel’s latest 7 nm process, with 2,693 logic elements, over 17k multipliers, 287 Mbits of RAM, and PCIe Gen4 interfaces. To support high-speed streaming data transport, all devices use 56G PAM-4 and 28G NRZ gigabit serial interfaces.

Direct RF converters/FPGAs

Although the Versal ACAP AI IF series with the integrated direct RF data converters is not yet available, several parts combining the Versal ACAP and interfaces for direct RF data converters are available: the Mercury RFS1140 RF System-in-Package (RFSiP), a multi-chip module combining the AMD VC1902 Versal AI Core FPGA with four 64 GS/sec 10-bit ADCs and DACs using Jariet Electra-MA data converters; the SCFE6933, a space-qualified 6U VITA 78 SpaceVPX card featuring the VC1902 Versal AI Core FPGA and optical I/O, designed for operation in LEO, MEO, GEO, and HEO [low-Earth orbit, medium Earth orbit, geosynchronous Earth orbit, and highly elliptical orbit] satellites and deep-space missions; the SCFE6931 SOSA aligned 6U VPX card with two VC1902 Versal AI core FPGAs with optical wideband optical interfaces to direct RF data converters; and the 5560 SOSA aligned 3U VPX card with the VH1542 Versal HBM ACAP FPGA and mezzanine card site for direct RF data converters. (Figure 5.)

Mercury’s direct RF roadmap extends the 5560 Versal FPGA SOSA architecture with new products that incorporate the new 20 GS/sec ADI Apollo data converters at the front end.

The industry’s first open architecture board using an Intel direct RF FPGA, the early 2023-released Mercury DRF3182, is a 3U Open VPX card featuring the Stratix10 AX device. It has four transceiver channels of direct RF digitization and generation at 51.2 GS/sec covering a frequency band of 2 to 18 GHz to support numerous EW applications. Eight PCIe Gen3 x4 data plane ports deliver 64 GB/sec of data across the backplane to other cards. (Figure 6.)

Mercury is currently developing several roadmap products based on Intel Agilex 9 devices to speed adoption of this new technology for open architecture embedded computing boards for deployed systems.

Direct RF for defense applications

Direct RF architectures boost performance of embedded systems for defense applications in many ways by eliminating the analog RF frequency translation stage, reducing latency, minimizing analog phase and amplitude uncertainties, and simplifying channel synchronization. Virtually all direct RF data converters contain dedicated digital frequency translators (both DDCs and DUCs) to provide much faster tuning across a very wide frequency span to support complex sweeping and hopping patterns, a critical advantage for many advanced countermeasure and EW algorithms.

The powerful heterogeneous processing resources of the latest classes of FPGAs discussed above provide a flexible choice of processing engines best suited to the wide

DIRECT RF ARCHITECTURES BOOST PERFORMANCE OF EMBEDDED SYSTEMS FOR DEFENSE APPLICATIONS IN MANY WAYS BY ELIMINATING THE ANALOG RF FREQUENCY TRANSLATION STAGE, REDUCING LATENCY, MINIMIZING ANALOG PHASE AND AMPLITUDE UNCERTAINTIES, AND SIMPLIFYING CHANNEL SYNCHRONIZATION.

range of required tasks including AI, ML, decoding, demodulation, decryption, signal classification, image processing, sensor fusion, target recognition, trajectory calculations, fire control, countermeasures, attack plan development, and many more. These processor task assignments are adaptable during a mission to optimize performance.

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6 | Mercury DRF3182 3U VPX direct RF Stratix10 FPGA with four 51.2 GS/sec 10-bt ADCs and DACs.

Because legacy scanning receivers sequentially sweep across a span using slower analog RF tuners, they can easily miss transients outside of the current scan window. Direct RF receivers can not only stare across a much wider scan window, but can also instantaneously step to a new window, thus missing far fewer transients. When signals of interest are detected, a bank of narrowband DDCs can zoom in on them for further exploitation.

Direct RF phased-array countermeasure systems can take advantage of this

flexible wideband/narrowband capability to operate multiple narrowband DDCs in parallel, each tuned to specific target frequencies located anywhere across the entire frequency span, and beamformed to specific target directions.

As discussed earlier, direct RF data converters and FPGAs must be tightly coupled for best overall performance. As a better alternative to JESD (standard) serial interfaces, the latest chiplet bonding techniques can stream data across wide high-speed parallel buses within a single multichip module.

Flexible chiplet packaging affords much shorter development cycles of new system-inpackage offerings containing FPGAs, direct RF data converters, and other specialized peripherals tailored to specific applications and platforms. Such varied offerings of advanced silicon and packaging technologies ensures a growing wealth of deployable capabilities clearly transformative to defense systems. ■

Rodger Hosking is vice president, Mercury Systems Mixed Signal. Rodger has more than 30 years in the electronics industry and is one of the co-founders of Pentek; he has authored hundreds of articles about software radio and digital signal processing. Prior to Pentek, he served as engineering manager at Wavetek/Rockland, and he holds patents in frequency synthesis and spectrum-analysis techniques. He holds a BS degree in physics from Allegheny College in Pennsylvania and BSEE and MSEE degrees from Columbia University in New York.

Mercury • https://www.mrcy.com/

FIGURE

Managing today’s military supply chain

By Shan Morgan

The pace at which technology is ramping up, including in the military electronics and implements arena, is forcing the defense and aerospace industry to increase its adoption of new tech and parts. Such advances in pace and adoption does expose companies to more risk, but the military supply chain is not alone in this dilemma.

The past several years – both during and after the height of the pandemic – have taught those in industry a lot about how to be flexible in day-to-day work environments, but it has also spotlighted how global businesses operate. If you trace supply-chain disruption down to what happens on the floor of a manufacturing shop, one can easily see how a single breakdown along the line can mean trouble across the continuum, from end-to-end.

Recent disruptions to intricate global supply chains have put significant strain on almost all aspects and resources, not just in the realm of technology. At the same time, defense contractors are looking at multidomain operations and shared technology initiatives, like the Joint All-Domain Command and Control (JADC2) initiative and the modular open

systems approach (MOSA) to provide better intelligence and networking capabilities as well as streamlined, cost-efficient system development paths to better enable the military warfighter.

Managing supply-chain breakdowns

For those of us in the military and defense industry, a stable supply chain is critical for both national security and economic strength. And just like a surfer trying to paddle past the break, but who keeps getting rolled back to the shore, managing the complexity of supply-chain solutions needed in today’s defense industry can feel a bit like this same frustrating push-and-pull. (Figure 1.)

In order to adequately mitigate critical defense supply-chain risks, there needs to be enhanced resilience to breakdowns within the process. In a February 2022 report on “Securing Defense-Critical Supply Chains,” issued by the U.S. Department of Defense (DoD), four strategic enablers were identified to help strengthen the global supply chain and avoid similar interruptions in the future. This diverse set of focus areas addresses several factors of the supply chain rather than a single area:

› Workforce: trade skills through doctoral-level engineering skills

› Cyber posture: industrial security, counterintelligence, and cybersecurity

› Manufacturing: current manufacturing practices, as well as advanced technology like additive manufacturing

Supply-chain disruption has impacted many facets of the military supply chain and business environment.

› Small business: the role of key members of DoD supply chains

Supply-chain resilience and modernization are top of mind for many across all sectors of the defense industry. How does this awareness translate to the actual day-to-day processes the military technology industry need to manage?

Impact of cost-down initiatives on military electronics

One common trend is cost pressures from the DoD being pushed down to the prime contractors, bringing about a new wave of technology, where more is invested in research and development. Advances in high-performance computing and initiatives, like the SOSA [Sensor Open Systems Architecture] Technical Standard, to standardize commercial off-the-shelf (COTS) equipment are all driving the pace of technology, pulling more components in from the commercial market to keep pace with the speeds designers are clamoring for.

Several consequences of this standardization push include:

› Outsourcing by the primes: looking for ways to either minimize volume or technology problems within the supply chain.

› Technology pulled in by system platform providers: examples include putting together chassis, backplanes, and active cards – and possibly operating systems – as well as solving IPMI issues. (IPMI [Intelligent Platform Management Interface] is a standard system-monitoring interface employed by many board-level standards.

› Shift in role of traditional suppliers: companies providing “building blocks” – only a backplane, chassis, or power supply, for example – tasked with finding a place to play in the military market.

› Infusion of commercial suppliers: the rapid pace of technology change means more potential entry points of commercial solutions into the marketplace.

Increased pressures with advancing technologies

The pace at which technology is ramping up is forcing the industry to keep in step, exposing companies to more risk.

In the pre-industrial age, cost versus volume was pretty much linear. To make another widget, you added another person – another widget, another person, and so on. In the industrial age, fixed costs dominated, so volume increases meant a better cost curve with the goal being to pump out a lot of widgets using the existing infrastructure.

This current “post-industrial” age is not dominated by volume, but rather by complexity, and the major focus is to manage complexity’s impact on costs. Unmanaged cost increases not only hurt an individual company, but can also harm the entire industry in how companies are perceived by their customers. (Figure 2.)

Assessing production in the current economy

Although previous production models may have focused on a company spending as little time as possible to get a widget out the door, that’s not today’s business. Success in the military technology industry requires a longer cycle, with a typical project starting about 18 months before a prototype is even developed, with production starting as much as three or four years after that. With other recent pivots in the global supply chain, such extended development and implementation times become even more impactful to delivery of the final product.

The complexity of this cycle not only relates to technology, but affects all aspects of a business, from sales, program management, and compliance to change management, customer approvals, and design reviews. No longer is it only the rate of technological change putting tremendous demands on the engineering teams; the recent spate of supply-chain hiccups also then enters the equation as a critical factor.

FIGURE 1 | Overcoming the challenges across the supply chain is leading to increased resilience and stability.

FIGURE 2 | Increases in supply-chain complexity can mean misaligned production costs.

Some good news: Although delays and disruptions have impacted the supply chain, other factors such as open standards – which help mitigate risks since designs don’t need to start from scratch – are actually helping to form a forward-thinking environment. Many standards groups include key suppliers who commit to support solutions based on the standards themselves. Their membership, awareness, and participation give these companies a different perspective of supply-chain requirements. This situation is creating new opportunities to regionalize manufacturing and inventories, thereby reducing the reliance on singlesource suppliers. The availability of key components based on modular open standards that can be used across multiple platforms will encourage further acceleration and adoption of new technologies.

Meeting customer expectations

As flow-down continues to occur, manufacturers need to consider a number of factors. When sourcing components, manufacturers must ensure that their vendors are in compliance with the DoD requirements as well. With the strain of constant price increases – sometimes upwards of 20% or 30% for obsoleting technology – affordable traceability is a big challenge. Supply-chain-side operations also must make room for new tooling, new equipment, more personnel, and added training to help ensure that the yield and quality coming out of the manufacturing group stays high and that customers’ delivery expectations are being met.

The key to managing this complex business environment: Companies in the military arena must stay current with the technology as well as the process and must become skilled at balancing resources to increase project risk properly. These moves need to

occur across multiple departments and all partner relationships, so as to deliver quality solutions that meet customer expectations at a fair price point. The ability to balance all of these supplychain issues affect companies’ ability to grow and the health of the industry as a whole. ■

Shan Morgan is the vice president of sales for Elma. He was previously the senior vice president of sales and marketing for the systems group and also served as general manager of Optima Stantron, the cabinet enclosure unit of Elma. Shan received a bachelor’s degree in aerospace, aeronautical, and astronautical engineering from the University of Arizona.

Elma Electronic https://www.elma.com/en

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100 Gbps processing: Why architectures matter

By Aaron Frank

High-performance embedded module and system designers must understand the technical considerations required to fully realize the true benefits of 100G technology.

In the context of 100 Gbps technology for the VPX ecosystem, simply stating that a module or system supports 100 Gbps is, by itself, insufficient for ensuring the full benefits of the claim. If a vendor’s datasheet for a VPX plug-in card (PIC) or system states 100 Gbps support but is unable to fully utilize the potential of this high-speed connectivity, that claim – while while perhaps technically accurate – overstates the product’s ability to deliver the full benefits that 100 Gbps promises.

At face value, a vendor’s claim to support 100 Gbps technology implies 2.5 times faster <something> compared to 40 Gbps technology, and 10 times faster <something> compared to 10 Gbps technology. In an ideal world, the mathematical relationship between 100 and 40 will result in 2.5 times better performance. Likewise, 100 to 10 should yield a 10-time performance increase. Unfortunately, the real world does not work like that. A 16-core laptop processor does not allow a person to work 4 times faster when editing documents compared to their previous 4-core laptop.

Applications matter most

What that faster <something> is, as referred to above, will depend on what an application is trying to do. When referring to a specific Ethernet interconnect technology, the <something> might be, for example, data-carrying speed. But data-carrying speed does not translate directly into what the new higher-speed technology truly offers the end user. We could substitute the term “performance” for <something>, but again, performance is meaningless without context to its application and end purpose.

In the context of embedded computing for the defense and aerospace industry, the never-satisfied quest for higher performance tends to focus on three main areas of improvement:

1. Faster time to solution: This means answers are derived faster. For example, if a targeting system can pinpoint and identify a target quicker, it may be able to implement countermeasures quicker. And in an environment where seconds or even milliseconds matter and lives are at stake, faster time to solution has significant and measurable benefits.

2. Higher-fidelity information: In imaging systems such as radar and visual/camera systems, higher fidelity may mean higher resolution (such as 4K or 8K images instead of HD), or it may mean real-time motion video (such as 120 fps for smooth lower-latency real-time motion, instead of 15 fps). Enhanced fidelity enables personnel or automated vision systems to see farther with more clarity, which ultimately leads to earlier and more informed decision-making.

3. Higher levels of integration: In today’s connected battlespace, information sharing and data integration are some of the most important pillars of growth. Within a platform and between platforms, data integration allows a diverse range of sensors and processing systems to share situational information, coordinate tactical actions, and achieve more desirable outcomes. In the context of the connected battlefield, information integration is paramount for mission success.

For each of these three areas of potential system improvement, an Ethernet connection forms only part of the overall system operation, so a faster Ethernet connection can only provide part of the overall improvement equation. For sensor processing systems, faster sensor connections may bring more sensor data to the sensor processor, but that does not ensure the sensor processor can fully process all the captured data. While the information highway may be able to carry more information traffic for interconnected systems, it does not ensure that connected systems can use all of the potential flood of available information.

Figure 1 is a simplified example showing where Ethernet can be used both to connect sensors to processing systems and to interconnect multiple processing systems together to share information.

While all these Ethernet connections are candidates for increased 100 Gbps data rates, we must consider the characteristics of the data each of these connections carries and how any increase in Ethernet speed can benefit a particular application, a subsystem, or the entire system of systems.

SOSA understands TCP vs. UDP

The Open Group Sensor Open Systems Architecture (SOSA) has gained considerable industry acceptance as the go-to for system architectures. Within the SOSA Technical Standard there are observations and recommendations reinforcing the notion that TCP [transmission control protocol] incurs considerably more overhead than UDP [user

datagram protocol] for high-bandwidth data-moving applications. The SOSA Technical Standard defines Support Level Ethernet 1 (SLE1) as optimized for control applications and mandates a full TCP Ethernet stack, whereas Support Level Ethernet 2 (SLE2) is optimized for high-bandwidth data applications and recommends using the UDP protocol and jumbo packets. It also observes that SLE2 (using UDP) may be required for low-latency message use.

Takeaway: Real-time sensor data is best suited for UDP protocol for reduced latency, while control functions require TCP for reliability.

Specialized processors, such as FPGAs, and derivatives, such as AMD’s MPSoC and adaptive SoC devices, excel at streaming and processing the extremely highthroughput signals generated by modern radar, video, signals intelligence, and similar sensors. By tightly coupling programmable logic (PL) to one or more Ethernet interfaces, it is possible to operate at close to theoretical throughput limits if so desired. However, complex protocols, including TCP/IP, are not readily or efficiently implemented in PL logic, which is a major reason why SOSA’s UDP-based SLE2 is preferred for streaming.

Data-buffer management and RDMA

Consider an application example where we want to send a large amount of data across the network. In this example, we’ll move 100 MB of data across a 100 Gbps Ethernet connection. Using quick math, one might expect to transfer this data in 8 milliseconds (ms). How realistic is this?

First, we cannot send the full 100 MB of data in a single Ethernet packet. Ethernet packets range in size from 46 up to 1,500 payload bytes for standard packets or 9,000 payload bytes if jumbo packets are configured. Our 100 MB of data will be broken down into 68,267 standard packets or 11,378 jumbo packets, each of which must be individually packaged and sent. The network stack will take several sequential steps to package the data and eventually pass the data to the Ethernet kernel driver, which will send it packet-by-packet to the Ethernet NIC [network interface controller] for transmission. The bottom four layers of the OSI stack alone typically perform at least two data-buffer copy operations, each of which will take time and consume CPU cycles. Overall, between three and six data-buffer copy operations will be performed, with some implementations being better than others. The final step of transferring the packet from the kernel driver to the Ethernet NIC is often performed using DMA operations, which simply frees up CPU cycles from the task.

In a TCP/IP network operating over an unreliable Ethernet link, each layer serves a particular purpose and should not be bypassed. However, in a well-controlled reliable network, bypassing some of these layers to eliminate unnecessary overhead and increase efficiency may be desirable. Remote DMA (RDMA) is a technology that does

FIGURE 1 | System of systems showing Ethernet connections.

this; it bypasses several of the OSI layers and performs the DMA transfer directly between the application data structures and the Ethernet NIC device. RDMA is often referred to as having “zero-copy” data transfers. Figure 2 illustrates the data-handling operations for a standard TCP/IP network stack on the left and an RDMA network stack on the right.

With its reduced overhead for data copying and packet processing, the main benefits of RDMA network stacks are their ability to free up valuable CPU cycles for other tasks while reducing latency and improving overall network performance. RDMA is best suited for applications that send large chunks of data from node to node in reliable networks. For this reason, it has gained mainstream acceptance in data centers and storage area networks. For applications that need to process the content of packets on a more granular level or when operating in a potentially unreliable network, non-RDMA TCP/IP stacks remain the more appropriate choice.

It is worth noting that RDMA operations take overhead time to set up. For large data transfers, this overhead is a small price to pay for the time savings spread across the entire large data transfer. However, for small messages, the overhead time needed to set up RDMA operations can easily exceed the nonRDMA data buffer processing times. RDMA operations are thus rarely used for small latency-sensitive messages.

Takeaway: Choosing the right network protocol can have a significant effect on message latency and CPU utilization.

Processing 100 Gbps streams of Big Data

Very few applications generate or consume 100 Gbps of data. Mathematically, 100 Gbps equates to roughly 10 GBytes (GB) of data per second. In context, a modern processor with a 64-bit DDR4 memory subsystem operating at 2,400 MT/sec can only transfer data to or from its high-speed DRAM memory at a theoretical maximum of 19 Gbps, meaning just reading or writing a 100 Gbps data

stream will consume over half of a 64-bit modern memory channel’s bandwidth under ideal conditions. Under real-world conditions, the 10 GBps data stream will consume closer to 60% to 70% of the available memory bandwidth. So how can a modern processor provide or consume data at these incredibly high rates?

Memory architectures matter

Many modern processors have more than one DRAM memory channel. In the Intel processor family, the mainstream “Core” processor families, such as Core i7 or Xeon E/W/H families, have two independent 64-bit memory channels. This means they can provide double the memory throughput compared to a single memory channel processor and simultaneously process two independent memory access streams. For a 2-channel DDR4 @ 2,400 MT/s memory subsystem, supporting a fully utilized 100 Gbps data stream will consume less than 35% of the real-world memory bandwidth. For newer dual-channel DDR5 @ 4,800 MT/s processors such as the 13th-gen Raptor Lake H family, a sustained 100 Gbps data stream will consume less than 18% of the memory bandwidth.

The Intel Xeon D family of processors are server-class devices with more processing cores and additional memory channels. The Ice Lake D processor family offers up to four memory channels to support up to 20 processor cores. Even a processor implementation with three memory channels will provide 50% more memory bandwidth compared to a same-speed 2-channel system.

Processing cores matter

Not all applications can use the RDMA network protocol, and many must support standard TCP/IP traffic streams. While most modern Ethernet NICs will perform some packet processing tasks, such as cyclic redundancy check (CRC) calculations, in hardware, the TCP/IP software stack will still be traversed with considerable network traffic and will be tasked with processing this data, packet by packet, at network line rates. If the CPU cannot keep up with the torrent of packets, packets will be discarded, and recovery mechanisms will adversely affect performance.

A 100 Gbps network stream is transmitted as 68,267 separate 1,500-byte packets, all within one second. That means each packet must be processed in under 14 µS. If the packet processing stack takes (for arguments’ sake) 7 µS to process the packet, the network stream will consume 50% of the processor’s available bandwidth. This assumes there is only one CPU core doing the work.

FIGURE 2 | Simplified view of data passing in a Linux operating system for TCP/IP vs. RDMA operations.

A typical Linux operating system, even when seemingly idle, has hundreds of separate processes running that perform tasks ranging from basic housekeeping to managing complex real-time network stacks. Modern processors are multicore devices that can execute multiple threads or tasks in parallel. The more processing cores a CPU has, the more parallel threads it can perform. The Linux TCP/ IP stack supports multicore processors, allowing most modern multicore processors to spread network stack processing across multiple cores and threads to support full-bandwidth 100 Gbps TCP/ IP network traffic while simultaneously providing significant CPU cycles to other tasks and application needs.

By contrast, FPGA-based processing systems are highly parallel in nature and operate optimally with streaming data flows. As an example, a 100 Gbps or 10 Gbps data stream could represent 16-bit wideband RF signals at 5 gigasamples per second (GSPS), capturing in excess of 2.2 GHz RF bandwidth. A single conventional scalar processor would be highly challenged to do useful processing at this high rate, so implementing a system solution where an FPGA distributes signal packets across multiple processors is one viable approach.

Using 100G for low-latency messaging

The previous example explored a processing architecture to support highthroughput 100 Gbps network traffic. But what if we want to optimize for the lowest possible message latency?

An Ethernet hardware switch typically adds a fixed ~1 µS to a packet’s transit time from sender to receiver. Electrical or optical transmission times are orders of magnitude smaller than this and are small enough to be ignored. The largest offender in a TCP/IP packet’s end-to-end latency journey is usually the network software stack processing time, along with the time a packet spends in buffers and queues waiting to be processed. As most of the TCP/IP packet processing time is CPU-bound, reducing the TCP/ IP network stack processing time will directly reduce message latency.

The Intel Ice Lake Xeon D processor is a modern multicore processor with up to

20 hyperthreading cores. It excels with applications that scale well with parallelism and can use all 20 cores and 40 threads. It also excels for large data-management applications, with many cores/threads available to support complex data processing tasks. These same processing cores must also manage network packet processing.

It’s important to consider the processor’s core clock speed for low-latency messages. The Ice Lake Xeon D processor operates with a core clock of 2.0 GHz. In contrast, Intel’s Xeon E/W/H series processors provide fewer cores operating at higher clock speeds. For example, the 9th-gen Coffee Lake Xeon E operates at 2.8 GHz, providing approximately 40% higher per-thread performance, and in the context of faster network software processing times will yield lower overall Ethernet latency results compared to the Ice Lake D processor.

Lastly, we must mention an important system-level characteristic of Intel processors: Intel processors have safety mechanisms to ensure the processor does not overheat, called “throttling.” If the processor becomes too hot (thermal throttling) or consumes too much power (TDP throttling), it will self-throttle and reduce its clock speeds and performance to reduce power consumption and generate less heat. While a 100 Gbps network connection maintains the same bit-rate speed across the physical medium, if the packet-processing processors at an endpoint are throttled, its performance may be reduced to the point where it can no longer process packets quickly enough to sustain a 100 Gbps network data throughput.

With today’s high-power processing modules, standard thermal-cooling solutions such as conduction cooling may not be sufficient to keep processors operating at their full performance potential. Higher-performance cooling solutions will yield more favorable results at high operating temperatures.

Going forward with 100G

Data processing and sharing for defense and aerospace applications is rapidly becoming more complex. To deliver the faster processing and massive informationsharing benefits that modern systems require, system designers are turning to 100G technologies. But to fully realize all the benefits that 100G systems can offer, system architectures must also adapt in order to support the faster data and reduced latencies that 100G technologies promise. It is not sufficient to just support 100G-capable Ethernet ports.

As these new high-speed interconnect technologies are adopted, they will move from hype and promise to mainstream and proven, delivering a massive performance boost to the connected battlefield, where critical decisions are made at the speed of relevance.

Curtiss-Wright’s Fabric100 family delivers a complete end-to-end solution for architecting 100Gbit SOSA aligned rugged systems. Fabric100 brings 100Gbit Ethernet and high-performance PCIe Gen4 interconnect speeds to tomorrow’s new generation of rugged deployable computing architectures. It is not enough to simply provide 100G connections between a system’s modules yet fail to support the ability to process all this data within the modules themselves.

Recognizing that, Curtiss-Wright’s Fabric100 board architectures are designed to deliver full 100G performance through the entire processing chain, eliminating data bottlenecks that might otherwise compromise system performance. ■

Aaron Frank is Senior Product Manager at Curtiss-Wright Defense Solutions.

Curtiss-Wright Defense Solutions https://www.curtisswrightds.com/

Common MOSA, SOSA 2.0 Snapshot 2

By John McHale, Editorial Director

While it was officially released in the famous Department of Defense (DoD) Tri-Service Memo five years ago, the concept of a modular open systems approach (MOSA) has been around for some time and is not a new concept, said Jason Dirner, in his keynote address at the MOSA [Modular Open Systems Approach] Virtual Summit held February 22 and hosted by myself and Military Embedded Systems. What is new, however, Dirner said, is “common MOSA, [where] you have multiple programs and services conforming to the same standard,” which enables a greater level of reuse and portability across the community, he added.

MOSA has been used within a single program, where the modular architecture, key interfaces, etc. are defined, but the resulting solutions are specific to that program and have limited reuse across community, he explained.

Common MOSA strategies like the Sensor Open Systems Architecture (SOSA) Technical Standard, CMOSS [C5ISR/EW Modular Open Suite of Standards], and HOST [Hardware Open Systems Technologies], are actually more similar than they are different, Dirner said. They all want to increase competition, improve upgradeability and while they are separate efforts, “we are working together.”

Dirner noted this is especially true with SOSA, which has become a “standard melting pot, quickly becoming the de facto form to adopt and align government and industry standards to create a common DoD-wide open system architecture.” SOSA enables reuse across services, agencies, and programs; maximizes government investments; and capitalizes on collective expertise of over 160 member organizations, he added.

The services have been collaborating for the better part of a decade on these standards, Dirner noted.

“If the Air Force procures a capability and matches what the Army needs, why shouldn’t the Army be able to take it and integrate it,” he said. “On the flip side, if a vendor gets a plug-in card included in program X now, they can get it included in program Y and Z as well. [This creates] new opportunities and new reuse that wasn’t possible before.”

SOSA ENABLES REUSE ACROSS SERVICES, AGENCIES, AND PROGRAMS; MAXIMIZES GOVERNMENT INVESTMENTS; AND CAPITALIZES ON COLLECTIVE EXPERTISE OF OVER 160 MEMBER ORGANIZATIONS, [DIRNER] ADDED.

In his presentation, Dirner referenced that the Technical Standard for SOSA Reference Architecture, Edition 2.0 (Snapshot 2) would be released any day; in fact, it was released the very next day.

Describing the latest release, Dirner noted some highlights:

› More support for EO/IR wide area search/surveillance

› Nav Data Service adoption of VICTORY

› Security Services definition (providing authentication and authorization infrastructure for the sensor)

› Data model updates for EA, SIGINT, SAR, and EO/IR

› MORA V2.5 and VICTORY V1.10

“The data model underpins everything we do in SOSA,” Dirner noted.

For more from Dirner on Snapshot 2 and a preview of what will be in Snapshot 3, check out the MOSA Virtual Summit at https://resources.embeddedcomputing.com/series/ mosa-2024/landing_page?utm_bmcr_source=cal. To learn about Snapshot 2, visit The Open Group at https://publications.opengroup.org/s241.

As we ended the Summit’s keynote session, I asked Dirner if he could share MOSA success stories and he replied with two.

The first told how Army PM EW&C (Program Manager Electronic Warfare and Cyber) were early adopters of CMOSS. “I saw where they were able to pivot and change cards and share cards across programs, all of which would not have been possible if they had not used a common architecture,” he said.

In the second story, he mentioned CMFF [Common Mounted Form factor), which was born out of CMOSS. Dirner noted that “CMFF will replace mission-command comms, PNT [position, navigation, and timing], and EA [electronic attack] solutions on ground and airborne platforms with a common chassis and has a potential huge impact on how we field these systems in terms of competition and upgradeability. Those are two great success stories to reference.”

SOSA™ Technical Standard Enables High Performance for EW & SIGINT, Including 64 GS/s Direct RF Capability

By Noah Donaldson, CTO of Annapolis Micro Systems

We’ve seen the most interest in SOSA™ products aligned with the SOSA™ Technical Standard airborne Electronic Warfare (EW) and SIGINT applications. Late last year, we received two orders for a combined $61.6M for RFSoC & Versal™-Based Solutions for airborne 3U OpenVPX. The orders include SOSA aligned FPGA Boards, Mezzanine Cards, Switches, and Chassis/Backplanes.

The SOSA Technical Standard enables the high performance that is vitally important for airborne applications, where every nanosecond is crucial. SOSA Edition 2.0, Version 2, includes high-density backplane switch connectivity. Our WP3E20, WP3P20, and WP3H20 Switches feature VITA 91 backplane connectors that double the available bandwidth of a 3U VPX switch slot. Two HD switch slots in our WC31DH Chassis enable it to handle all Data and Control Plane Ethernet via one slot, with the second switch slot dedicated to the expansion plane –100Gb Ethernet, Gen4 PCIe, or LVDS. This makes it ideal for low latency jamming or radar applications.

EXECUTIVE SPEAKOUT

(Snapshot 2)?

The SOSA Technical Standard also supports high-performance innovation by not limiting capability within a module. This has allowed us to partner with Intel Altera and Jariet Technologies to offer 64GSps Direct RF capability in three SOSA aligned form factors. These are targeted at demanding C5ISR applications requiring direct sampling frequency coverage anywhere from 0.1 to 36 GHz, and/or wide instantaneous bandwidths.

Snapshot 2 Helps Elma Deliver More Capabilities to Accelerate Customer Development & Deployment

By Ram Rajan, Senior Vice President of Engineering, Elma Electronic Inc.

Right from the beginning, Elma has consistently supported the SOSA™ Technical Standard by designing and developing a wide range of backplanes, chassis, and chassis managers that are aligned to the Technical Standard. Elma has been tracking with the major releases as well as the snapshots with our product strategy.

With the release of the SOSA Technical Standard, Edition 2.0 Snapshot 2, Elma has begun to support the RF Signal Layer described by the standard. Specifically, we are addressing the implementation of MORA as applied to the Signal Layer Modules 2.3 and 2.4.

To add value to our CompacFrame Development products, Elma is including a Tool Chain to support use and integration of Modular Open RF Architecture (MORA) 2.5/3.0 into Sensor Systems. For example, Elma has teamed with Sciens Innovations to offer integrated MORA development tools that support the use of MORA in Sensor Systems aligned to the SOSA Technical Standard.

With added definition, Elma has also aligned our Chassis Management product line to the latest SOSA Snapshot. Recent adjustments include redesign and improvement of our fixed mount and plug­in

versions of our Chassis Managers now aligned to VITA 46.11 Tier 2 and Tier 3. Elma is also committed to development and support of System Management Services defined by the SOSA Technical Standard. Elma will be working to include additional software to provide higher level support of In Band and Out of Band Chassis and System manager services, which will become available with our development environments.

Our goal is to enable our customers with development tools, and further software support to design and build products that are aligned with both MOSA and the SOSA Technical Standard. By addressing MORA for RF applications and chassis / system management, Elma aims to provide additional capabilities in our product line that will accelerate development efforts for our customers in 2024 and beyond.

QUESTION: How are you exploiting Sensor Open Systems Architecture™ (SOSA) Technical Standard, Reference Architecture, Edition 2.0

SOSA™ Leaves Room for Alternative Form Factors

By Chris A. Ciufo, Chief Technology Officer/Chief Commercial Officer

The promise of the SOSA™ Technical Standard is real and GMS is witnessing the DoD initiated trickle-down of many programs that might’ve chosen other form factors move from a MOSA wish list to a more forceful SOSA mandate. When moving from VME or other legacy for an upgrade, more often than not alignment to the SOSA Technical Standard is a requirement. For now, generally the slotcards such as the SBC require SOSA alignment, but with the 2nd edition of the Technical Standard, chassis requirements are forthcoming. This is a good thing. While VME required interoperability testing, VPX and later OpenVPX contained too much ambiguity and the true promise of open standards wasn’t realized. The Army is the organization most aggressive in mandating SOSA alignment, and both ground vehicles and future airborne will benefit from a cadre of vendors such as General Micro Systems (GMS) offering interoperable, SOSA aligned (and soon certified) OpenVPX cards and chassis.

GMS is one of the industry’s largest suppliers of OpenVPX boards, except they are private labeled to select customers. Surprised?

Despite our broad product line of X9 Venom SOSA aligned boards and chassis, our bread-and-butter business remains efficient small form factor modules and systems like X9 Spider. Surprisingly – perhaps to SOSA proponents – there are ample systems that don’t require the cost and overhead of an OpenVPX chassis. When a two-slot “clamshell” VPX chassis appears the best solution, then likely a small form factor system (SFF) is better. As the SOSA market evolves, we are finding countless customers wanting their upgrades done by a SFF system just to avoid changing their VME or OpenVPX chassis, never mind upgrading to a full SOSA aligned system.

SOSA™ Ensures the Sky is NOT the Limit

By Zack McGrath, Defense Product Portfolio Manager

Since its draft phase, the use of 3U SOSA™ Technical Standard aligned VPX has skyrocketed in airborne applications. However, the scope of SOSA™ has expanded beyond aerial use. Now, products compliant with the SOSA™ Technical Standard are being deployed across a comprehensive range of physical domains, including space, air, ground, naval surface, and subsurface. This deployment encompasses a variety of systems, such as communications, EO/IR, SIGINT, EW, and radar.

Another interesting trend we see at Kontron is the use of rugged server-class processors to bring data centers closer to theaters of operation. Rugged mobile data centers allow joint force troops and vehicles across multiple domains to function as a single autonomous unit, reducing reliance on communications and coordination from distant fixed-location data centers.

We also see SOSA™ aligned systems incorporating more artificial intelligence in other trending applications. Man-wearable and invehicle SOSA™ aligned systems perform signal intelligence to locate and neutralize unmanned vehicle threats in the field. SOSA™ aligned

360° situational awareness systems scan, assess, and process threats with less need for user oversight than ever before. Unmanned autonomous vehicles in all domains are made smaller, faster, and more cost-efficient using SOSA™ aligned PICs and Computer-on-modules, reducing the need to place troops in dangerous situations. In all three of these scenarios AI is increasing the capability, responsiveness, and autonomy of the platform.

At Kontron, we’re thrilled to contribute to these revolutionary systems! Our 3U SOSA™ aligned Compute-Intensive VX307H PIC, boasting up to 20 processing cores, places us at the forefront of the rugged mobile data center trend. Additionally, our support for XMC/MXM-based accelerator cards on both our 3U and 6U Payload PICs enables us to integrate AI capabilities into nearly any SOSA™ aligned application.

QUESTION: Where are products aligned to the Sensor Open Systems Architecture™ (SOSA) Technical Standard being deployed? What applications?

Turning the Promise of SOSA™ and the MOSA Initiative into Reality for our Modern Military

By Sean Campbell, President & General Manager, LCR Embedded Systems

If the rate of adoption of the SOSA™ architecture in defense electronics maintains its current trajectory, the standard and its close cousin VPX will achieve near universal usage in new and emerging applications across all branches of the U.S. DoD.

A major benefit of the SOSA Technical Standard lay in the modularization in electrical, mechanical and software components. Modularization and standardization enable fast mission re-purposing, system updates and multi-mission functionality. Widespread adoption creates a community of design experts that spans technology providers across the defense electronic systems industry and it avoids proprietary designs that constrain flexibility and lengthen time to deployment.

This modular approach allows embedded system designers like LCR to quickly apply new off-the-shelf SOSA aligned plug in cards for processing, switching, I/O and digitization for use in equipment targeted for electronic warfare, C5ISR and SIGINT applications.

Rugged embedded systems, chassis and high speed backplanes from LCR are designed to put forward the best aspects of the SOSA

EXECUTIVE SPEAKOUT

Technical Standard for the benefit of the modern warfighter. Our team of backplane engineers are signal integrity experts. They have the skills to determine optimal backplane profiles for any application supporting SOSA aligned card payloads and data flow requirements.

The SOSA Technical Standard also addresses commonality in external I/O connectors and pin assignments. RF signal processing in multi-INT and EW applications pass massive amounts of data through custom I/O panels in LCR chassis that include the latest SOSA aligned connectors and pinouts. LCR engineers work to ensure the highest levels of signal integrity from input to output in these critical applications.

In continuing our 35 years of support for national defense initiatives LCR is committed to creating leading edge products and solutions using modular open system approach (MOSA) principles as reflected in the SOSA Technical Standard.

SOSA™ Enables Faster Technology Adoption for Spectrum Dominance

By Rodger Hosking, Director of Sales, Mercury

A major imperative for today’s defense organizations is quickly harnessing new technologies to boost warfighting capabilities across the RF and electro-optical spectrum. Traditional approaches to address new requirements involved developing complete systems from the ground up that replaced existing systems. By contrast, SOSA™ architectures mandate modularity and open standards, enabling easier insertion of new technology and upgrades by replacing system modules, not the whole system. This dramatically reduces the time and costs to deliver deployable systems that counter new threats and exploit advanced targets.

The SOSA Technical Standard, maintained by the The Open Group, defines hardware and software for the system chassis by leveraging select subsets of other standards such as OpenVPX. This significantly narrows the number of different profiles for plug-in cards and backplanes to simplify upgrades, extend lifecycles, and improve interoperability of cards from multiple vendors. Mercury actively participates in the SOSA Consortium in leadership roles

of chair and member of the Advisory Group, and two co-leads of the Hardware and System Management Subcommittees of the Technical Working Group.

As part of our commitment to supporting the SOSA initiative, Mercury offers several edge-ready SOSA aligned product families to support advanced radar, electronic warfare, phased arrays, signal and image processing, high-performance computing, data collection, countermeasures, and signal exploitation applications. These products include RF tuners and transceivers covering frequency bands up to 18 GHz, 8-channel AMD RFSoC products handling RF signals up to 6 GHz, AMD Virtex UltraScale+ and Versal FPGA processors, and more, many with security features.

QUESTION: Where are products aligned to the Sensor Open Systems Architecture™ (SOSA) Technical Standard being deployed? What applications?

Unlocking the Power of SOSA™: Transforming Military Applications with Advanced VPX Solutions

By Udi Palgi, Milpower Source GM and CTO

The promise around the SOSA™ Technical Standard is that the open standard can provide full interoperability by different vendors and provide plug-and-play system-level solutions. But being open standard still provides many other features that make the difference.

One of the most noteworthy characteristics is the physical segregation between the Control plane and the Data plane: The segregation of the Control and Data planes in the SOSA VPX standard is a key feature that enhances security, Cyber, and performance. It keeps the management data separated from the tactical data. Segregation can be achieved through software configurations, such as the implementation of VLANs, or by using entirely separate Integrated Circuits (ICs) at the hardware level. In critical mission applications, you would verify that hardware separation exists.

Another critical feature is the full support of the IPMI Tier II protocol. Being able to support the full stack of the IPMI protocol is a key differentiator. Our FPGA team is already working on the full

implementation of the IPMI Tier III draft to lead the market trends and requirements.

Last but not least is the recent demand for high bandwidth – 100G interfaces for both the backplane and the front panel of each payload. Today’s 100G Ethernet switches provide high bandwidth to the backplane (as defined by the SOSA slot profiles), but lack the front panel option for high speed. Providing multiple 100G interfaces on the front panel gives a huge advantage at the system level, by both simplification of the solution and performance.

Milpower Source’s new series of VPX solutions provides all the above-mentioned technical standards and beyond, truly setting us apart from the competition.

Enhancing Defense Systems with SOSA™: Leveraging Open Standards for Interoperability and Innovation

By Ryan Jansen, Chief Technology Officer

The Sensor Open Systems Architecture™ (SOSA) Technical Standard exemplifies the strategic use of open standards to foster interoperability, portability, technological innovation, cost-efficiency, and scalability in defense systems. Instead of starting from scratch, the SOSA Technical Standard prudently incorporates existing standards that align with its objectives. This approach not only accelerates the standard’s development and adoption but also leverages the maturity and stability of established standards.

OpenVPX serves as a prime example of this methodology. The SOSA Technical Standard capitalizes on the robust foundation provided by OpenVPX, an already prevalent standard for plug-in cards with a well-established market. By integrating OpenVPX, the SOSA Technical Standard adopts a tried-and-tested framework that reduces the learning curve for system developers and manufacturers.

However, the SOSA Technical Standard goes beyond mere adoption. It refines OpenVPX by specifying which aspects are applicable within the SOSA Technical Standard ecosystem, particularly concerning slot profiles and communication protocols used between

modules. Such precision enhances hardware interoperability and minimizes configurations. Manufacturers can thus focus on fewer, more versatile plug-in modules, driving down costs and fostering innovation by redirecting resources towards new technologies and capabilities.

The SOSA approach of selectively incorporating and tailoring elements of existing standards like OpenVPX illustrates its broader strategy. By harmonizing these standards under a unified framework, the SOSA Technical Standard establishes a common methodology for leveraging existing best-in-class standards. This enhances efficiency during standard development and maintains agility by allowing future standards to be incorporated when they further the needs and goals of the SOSA Technical Standard.

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard build on open standards? Pick one and explain: OpenVPX, HOST, FACE, CMOSS, RedHawk, other.

Synergizing Standards: How Rantec Elevates SOSA with OpenVPX Innovations

By Vinay Clauson, Executive Vice President, Rantec Power Systems Inc.

The Sensor Open Systems Architecture™ (SOSA) Technical Standard represents a collaborative effort to promote interoperability and modularity across defense systems. At Rantec, we’re committed to driving innovation in military power solutions with SOSA, which is enabled by standardized VITA specifications.

OpenVPX (VITA 65) lays a robust foundation for the SOSA Technical Standard by defining key specifications for system interoperability and modularity. It addresses physical dimensions, cooling methods, and signal definitions – critical components for creating flexible, scalable defense systems. The SOSA Technical Standard builds upon OpenVPX’s framework by integrating these specifications into an architecture designed for sensor systems. This integration facilitates the development of interchangeable components and systems that are not only platform-agnostic but also optimized for advanced defense applications.

By adhering to the VITA Standards for Power Supplies, Rantec ensures that our power supply solutions seamlessly integrate into OpenVPX and SOSA aligned systems. This alignment enables system designers to leverage standardized voltage levels and communication protocols, enhancing system compatibility and performance.

Our leadership in developing the VITA 86 standard for ruggedized high voltage power supply connectors further demonstrates our influence in shaping the future of defense technology. Rantec’s SOSA aligned 1200W 3U power supply, leading the industry in SWaP performance, exemplifies our dedication to innovation within the SOSA and OpenVPX frameworks.

Conclusion:

Rantec’s integration of the SOSA Technical Standard and OpenVPX standards represent our commitment to advancing defense technologies that are modular, interoperable, and capable of meeting the complex demands of modern warfare. By fostering a standardized approach, we not only enhance the adaptability and efficiency of defense systems but also contribute to a future where technology seamlessly integrates to support mission-critical operations.

www.rantec.com

Future-Ready Defense: Your Unfair SOSA™ Aligned Advantage

By Greg Maynard, Chief Technology Officer

The rapid deployment of new technologies is key to staying ahead in modern warfare. As WOLF’s CTO, I bridge the gap between industry-wide shifts and our advancements that improve Electronic Warfare and C5ISR applications. The SOSA™ Technical Standard Edition 2.0 is revolutionizing our approach to tech development and deployment, moving beyond standard compliance to actively meet the demands of fast-paced innovation and complex defense challenges.

Our integration of top-tier NVIDIA® GPUs and Xilinx™ FPGAs into SOSA aligned solutions delivers a 150-200% SWaP improvement every two years, bolstering our capabilities in thermals, I/O, high-speed networking (100 to 400G), PCI Express Gen4/5, and AI compute. These translate to key operational advantages in swiftly changing combat situations, laying a strong foundation for both current and future editions of the SOSA Technical Standard.

The aerospace and defense sectors are undergoing a transformation. Open architectures like the SOSA Technical Standard

fosters a fertile ground for innovation and collaboration, essential in areas where technological supremacy is crucial. At WOLF, we’re committed to leading this shift towards more adaptable, resilient technologies, addressing immediate client needs while pushing the conversation forward on arming our forces for future battles.

As we look to the future, it’s clear that success in warfare hinges on not just possessing advanced technology, but on the swift deployment, integration, and enhancement of these systems. The SOSA Technical Standard is instrumental in enabling these capabilities, guiding our focus on innovation and adaptability to prepare our forces for the challenges of today and the uncertainties of tomorrow.

QUESTION: How are you exploiting Sensor Open Systems Architecture™ (SOSA) Technical Standard, Reference Architecture, Edition 2.0 (Snapshot 2)?

Mission impossible

VPX AND SOSA ALIGNED SOLUTIONS FOR ANY MISSION

LCR products enable the fullest capabilities of the best aspects of VPX and SOSA aligned system architectures. Integrated systems, chassis, backplanes and development platforms that help streamline the journey from early development to deployment.

L ook to LCR to realize what’s possible in demanding environments across a wide range of defense applications.

2024 PROFILES

X9

VENOM VPX3XW Mission

Computer: Box-level

The X9 VENOM 3U VPX3XW family starts with Intel’s latest generation Core i7 CPU Tiger Lake-H processor mounted on a GMS “engine” module. GMS OpenVPX boards using this engine are available in 3U 1-in and 2-in pitch size featuring IEEE 1101.2 conduction cooling and all offer a massive amount of superspeed I/O never before seen on 3U OpenVPX.

The X9 VENOM VPX3XW is available in two versions, each of which offers more I/O, processing, and add-on co-processing than is found on two 6U-sized boards (VME or OpenVPX). The 2-slot X9 VENOM Dual Slot VPX3XW version uses dual 1-inch pitch slots for I/O, power and conduction cooling, and has over 455 Gbps of external bandwidth across at least 24 ports. The 1-slot (1-inch pitch) conduction-cooled X9 VENOM Single Slot VPX3XW also offers at least 24 ports and 255 Gbps of I/O bandwidth. Each version represents a complete computer system, replacing two or more 6U modules. This is unheard of for 3U OpenVPX, which is complimented for its small size but then criticized for the lack of user I/O to the backplane. GMS has solved this 3U OpenVPX I/O problem, freeing users to take advantage of 3U’s size, weight and power (SWaP) advantages without the limitations of P1/P2 I/O.

Unique to both GMS VENOM boards is the incredible density of the feature set, backed by all of the high-speed I/O. Front panel ports supplement the backplane, giving users unparalleled flexibility at data processing and inter-system connectivity. Thunderbolt™ 4 on both versions and RMC add-in cards (in the dual slot) provide co-processing and full system connectivity in only 1 or 2 slots. Versions fully aligned with the Sensor Open Systems Architecture™ (SOSA) Technical Standard are available with no front panel I/O and slot profile: SLT3-PAY-1F1F2U1TU1T1U1T-14.2.16.

The X9 VENOM Dual Slot VPX3XW and X9 VENOM Single Slot VPX3XW air- and conduction-cooled single board systems are the fastest, most dense, highest performance compute and I/O processors anywhere in the world. They are developed in alignment with the SOSA Technical Standard, follow VITA 65 3U OpenVPX and IEEE 1102.2, and scale up performance and I/O bandwidth, or scale out to other modules and chassis via quad 40Gbps Thunderbolt™ 4 ports, dual 100GigE, or PCIe Gen4 (16Gbps). As a modular stack, each brings upgradeability, backplane profile

3U Plug In Cards (PICs): Payload Profiles –Compute-Intensive (SBC, FPGA, etc.)

Systems in Only 3U

independence, and each offers between 255-455Gbps of interconnectivity to the very highest performing systems. Uniquely, the X9 architecture frees designers from the limitations of the OpenVPX backplane while maintaining interoperability with DoD MOSA requirements.

FEATURES

Ą Intel® Tiger Lake-H up to 8 cores (2.6GHz, 4.6GHz Turbo Boost)

Ą 128GB DDR4 ECC DRAM via upgradeable SO DIMMs

Ą Up to massive 455 Gbits/s bandwidth to external I/O

Ą x16 and x8 PCIe Gen 4 onboard/off-board interconnect OpenVPX profiler conveniently remaps signals to backplane

Ą Full size MXM for GPGPU, FPGA, or bus extension

Ą 4x Thunderbolt™ 4 ports (40Gbps each) USB-C w/ optional fiber (50m) and 100W+ Power Delivery (each)

Ą Dual 100GKR4 and Dual 1GigE to VPX P1

Ą Dual 100GigE

Ą RAID-capable, dual M.2 sites for storage or I/O

Ą 1x GigE, 4x GPIO, 2x COM, 2x USB, 2x USB to VPX (P2) to VPX (P2)

Ą Dual 50W/100W RMC sites for co-processors for co-processors or additional high-speed I/O; to panel or backplane (dual slot only)

Ą Dual SAM™ I/O add-in modules for MIL-1553, ARINC-429, NTDS, GPS, or legacy I/O

Ą SOSA Technical Standard aligned

https://www.gms4sbc.com/x9venom

X9 VENOM Xeon D with network I/O

3U Plug In Cards (PICs): Payload Profiles –Compute-Intensive (SBC, FPGA, etc.)

EW, radar, and SIGINT applications demand the low-latency, realtime processing that only direct RF solutions deliver. The edgeready, SOSA™ aligned, 3U Open VPX DRF5580 board, developed using digital signal processing technology from the Mercury Processing Platform, enables wide spectrum direct RF digitization and processing of broadband signals to accelerate the critical timeline from data to decision.

Powered by the Intel® Agilex® 9 SoC FPGA, the DRF5580 delivers up to 32 GHz of signal bandwidth, four 64 GSPS A/D and D/A converters, a sophisticated clocking section for multichannel and multi-board synchronization, a modular front end for RF input and output, 16 GB of DDR4, 10/40 GbE interfaces, support for dual 100 GbE connections, and general-purpose serial and parallel signal paths to the FPGA.

IP and software functions provide data capture, waveform generation, and interface solutions. The customizable BSP and FDK allow for modifying or replacing the supplied IP functions.

FEATURES

Ą SWaP-optimized SOSA aligned 3U Open VPX

Ą 16 GB DDR4 SDRAM

Ą Four 64 GSPS A/D and D/A converters

Ą Communication receiver and transmitter

Ą Electronic warfare transponder

Ą Analog I/O for digital recording and playback

Ą Navigator® BSP and FPGA Design Kit for software and custom IP development

https://www.mrcy.com/DRF2580

DRF5580 3U SOSA™ aligned Direct RF FPGA Board

VX307H: SOSA™ Aligned 3U VPX PIC

Introducing the Kontron VX307H Computing Node, the ultimate SOSA™ Architecture Booster: Offering best-in-class performance and XMC support on VITA 48.8 Air Flow Through (AFT) models, this rugged 3U embedded server card redefines the SWaP-C limits and enhances the capabilities of your HPEC architectures.

Powered by the Intel® Xeon® D-2700 Platform, the VX307H is offered with a 12, 16, or 20-core processor with features like 100Gb Ethernet, PCIe gen4, and an on-chip DMA engine. AVX-512 VNNI support is engineered for AI, signal processing, and cryptography, offering double the performance over previous generations for critical applications like computer vision and media processing.

The VX307H is available in VITA48.8 AFT and conduction-cooled versions, operating in extended temperature ranges and aligned with industry standards. Unleash the potential of your engineering projects with the SOSA™ Architecture Booster – Kontron VX307H Computing Node. Contact us to learn more.

Kontron www.kontron.com

Plug In Cards (PICs): Payload Profiles –Compute-Intensive (SBC, FPGA, etc.)

FEATURES

Ą Intel® Xeon® D-2700 HCC processor with 100Gb Integrated Ethernet

Ą From 12 to 20 processing cores to be adapted to SWaP-C applications

Ą Enhanced instructions for Artificial Intelligence and Signal processing (Intel AVX-512, VNNI)

Ą Up to 64GB DDR4 memory with ECC

Ą New VITA48.8 AFT (Air Flow Through) and VITA47 CC3 (Conduction-Cooled) support

Ą XMC support on VITA48.8 AFT versions

Ą Long term availability with 10-years of typical lifecycle

https://www.kontron.com/en/products/vx307h/p171195

sales@us.kontron.com

www.linkedin.com/company/kontron-north-america/

The V6061 is a next-gen, high-performance embedded computing 3U VPX module featuring the Xilinx® Versal® ASoC, NVIDIA® Mellanox® ConnectX®-5 network interface device, rugged optical and electrical I/O, and Sensor Open Systems Architecture™ (SOSA) Technical Standard aligned profile options. The V6061 is designed for applications requiring a combination of high-speed data interfaces, network protocol offloads, onboard processing, and data distribution to adjacent processing resources. With its proven performance in 10/25/40/50/100Gbs Ethernet applications, the V6061 benefits sensor interfacing, data processing and distribution, and FPGA co-processing in systems such as radar, signals intelligence, electronic warfare, video, storage, medical imaging, and embedded communication systems. The V6061 includes hardware offloads for UDP, TCP, RoCE v2, DPDK, GPUDirect, NVMEoF, among other protocol stacks. The V6061 is a standout sensor interface and heterogeneous computing solution whether used standalone or adjacent to other processing elements.

3U Plug In Cards (PICs): Payload Profiles –Compute-Intensive (SBC, FPGA, etc.)

FEATURES

Ą Xilinx® Versal® ASoC (FPGA): VM1502/VM1802/VC1902

Ą NVIDIA® Mellanox® ConnectX®-5 Network Interface Device Hard-ware offloads for UDP, TCP, RoCE v2, DPDK, GPUDirect, NVMEoF, +more

Ą Up to eight (8) 1G to 25G optical ports via MPO front panel I/O or VI-TA 66 optical backplane I/O

Ą 2 banks of 4GB up to 1866MHz LPDDR4 SDRAM

Ą PCIe Gen3/Gen4 support

Ą Onboard embedded PCIe Switch device Advanced APIs that support multi-core and multi-processor architectures

Ą 14.6.11 and 14.6.13 compute intensive profiles available

https://newwavedv.com/products/fpga-interface-cards/vpx-cards/v6061-3u-vpx-versal-asoc-fpga-ethernet-offload-optical-io-module/

New Wave Design www.newwavedesign.com

info@newwavedesign.com

www.linkedin.com/company/new-wave-design

952-224-9201

V6061 3U VPX Versal® ASoC FPGA + Ethernet Offload

The V6063 is a next generation heterogeneous embedded computing 3U VPX module featuring the Xilinx® Versal® Adaptive System-on-Chip (ASoC), rugged optical and electrical high-speed IO, and profile options aligned to the Sensor Open Systems Architecture™ (SOSA) Technical Standard. The V6063 provides options for Versal® Prime or Versal® AI Core part selection. In a single 3U VPX card, the V6063 provides three 100G optical interfaces (300Gbps aggregate), large FPGA fabric, ARM processor cores, and optional AI engines. The V6063 excels at high-bandwidth interface applications where data is processed or pre-processed locally and then distributed across the VPX backplane or optical interfaces. Use cases include sensor interface, data processing, data distribution, and FPGA co-processing applications. Radar, signals intelligence, electronic warfare, video, storage, medical imaging, and embedded communications systems all can benefit from the V6063 module.

FEATURES

Ą Xilinx® Versal® ASoC (FPGA): VM1502/VM1802/VC1902

Ą Up to twelve (12) 1G to 25G optical ports via MPO front panel I/O or VITA 66 optical backplane I/O

Ą 2 banks of 4GB up to 1866MHz LPDDR4 SDRAM

Ą PCIe Gen3/Gen4 support

Ą Thermal sensors for monitoring card temperature

Ą Robust FPGA development framework

Ą 14.6.11 and 14.6.13 compute intensive profiles available

https://newwavedv.com/products/fpga-interface-cards/vpx-cards/v6063-3u-vpx-versal-asoc-fpga-optical-io-module/

Applying a MOSA Strategy for Unmanned Systems (archived webcast)

Sponsored by Elma and Mercury

In 2019, Air Force, Army, and Navy leadership mandated that the U.S. military use a Modular Open Systems Approach (MOSA) for new program designs and refreshes, calling MOSA a “warfighting imperative.” MOSA strategies are now being applied across multiple domains – air, sea, land, space, and electromagnetic spectrum – with unmanned systems a key component in each of those areas. MOSA open architecture initiatives such as The Open Group’s Sensor Open Systems Architecture (SOSA), the Future Airborne Capability Environment (FACE), C5ISR/EW Modular Open Suite of Standards (CMOSS), and others are affecting the hardware and software designs of platforms’ flight controls, ISR payloads, communications, and more.

In this webcast, learn how the military is applying MOSA initiatives and strategies to embedded electronics designs in unmanned platforms.

V6063

3U Plug In Cards (PICs): Payload Profiles – I/O-Intensive (SBC, GPGPU, etc.)

Fabric100™

Designed for high-performance, massive throughput processing required by modern aerospace and defense architectures, Fabric100™ assures higher processing speeds, lower latency, greater bandwidth, and enhanced interoperability between systems. It is the only ecosystem that delivers uncompromised, full 100 Gb Ethernet performance across a range of secure SOSA™ aligned VPX plug-in cards (PICs) and systems. Fabric100 technology supports the Modular Open Systems Approach (MOSA) enhancing interoperability between platforms and form factors.

A complete ecosystem of 100 GbE VPX building blocks Curtiss-Wright offers its new Fabric100 family of extremely highperformance SOSA aligned processing and switching engines engineered to exacting standards to ensure reliable 100 GbE and PCIe Gen4 communication in rugged environments. The Fabric100 Suite of 3U and 6U OpenVPX™ cards provides system designers with a complete end-to-end ecosystem of high-speed 100G products.

FEATURES

Ą The Fabric100 product family supports 100 GbE Data Plane and PCIe Gen4 Expansion Plane for high-speed connectivity

Ą Designed for high-performance, low latency processing required by modern sensor processing architectures

Ą Provides higher bandwidth connectivity between systems allowing more data to be shared efficiently

Ą SOSA aligned to ensure increased interoperability between sensors and systems for easier system integration

Ą The 3U VPX3-1262 14-core Intel Raptor Lake Hybrid Processor SBC is available in both SOSA I/O Intensive and Payload profiles

Ą The 3U VPX3-6816 Ethernet switch and router offers 100G line-rate performance on Data Plane and 25 G performance on Control Plane ports

Ą Offering low power consumption and port flexibility, the Ethernet switch provides configurable 50G, 40G, 25G, 10G, and 1G connectivity

Ą The 6U CHAMP-XD4 with dual Intel® Xeon® D-2700 HPEC and Cognitive DSP Processor provides up to 40 high-performance cores with over 2 TFLOPS of AVX512 acceleration

Ą The 6U FPGA-based CHAMP-FX7 with dual AMD Versal™ Adaptive SoC engine provides up to 64 lanes of backplane fiber optic I/O for terabit class optical interfacing

https://www.curtisswrightds.com/fabric100

3U Plug In Cards (PICs): Payload Profiles – I/O-Intensive (SBC, GPGPU, etc.)

VPX3U-AD5000E-CX7 (WOLF-153L)

WOLF’s VPX3U-AD5000E-CX7 is a high-performance embedded computing (HPEC) and artificial intelligence (AI) processing module, ideal for high-speed, data-heavy tasks such as sensor data processing and other C5ISR tasks. The module includes an NVIDIA RTX™ 5000 Ada embedded GPU for advanced data processing and an NVIDIA® ConnectX®-7 which provides the Ethernet and PCIe connectivity needed to move large datasets efficiently.

The NVIDIA Ada architecture includes CUDA cores for HPEC, 4th generation Tensor cores for AI and data science computations, and 3rd generation Ray Tracing (RT) cores for visually accurate rendering. The Ada GPU uses a new TSMC 4N NVIDIA Custom Manufacturing Process which provides increased efficiency. The denser Ada GPUs have more CUDA and Tensor cores operating at higher clock frequencies at the same power, delivering significantly more performance per watt compared to WOLF’s previous generation product.

The NVIDIA® ConnectX®-7 provides up to 100G data transfer, PCIe Gen4 speeds, and includes numerous security features to protect data. The ConnectX-7 also provides support for RDMA over Converged Ethernet (RoCE), enabling the fastest method for transferring data across the network directly to the GPU.

FEATURES

Ą NVIDIA RTX™ 5000 (AD103) GPU with 9728 CUDA Cores, 304 Tensor Cores, 76 RT Cores

Ą NVIDIA® ConnectX®-7 provides the module with up to 100G Ethernet and a configurable PCIe Gen5 switch

Ą 16 GB GDDR6 256-bit memory with up to 576 GB/s

Ą On-board IPMI controller for system management

Ą Support for 40/100GBASE-KR4 protocols

Ą 10GBASE-KR Data and Control planes

Ą NVIDIA GPUDirect RDMA and RoCE support

Ą Rugged conduction cooled, 1" pitch

Ą SOSA™ Aligned with support for 14.6.11 or 14.6.13 payload profile

For more information see: https://wolf.ca/products/3u-vpx/vpx3u-ad5000e-cx7

About WOLF:

WOLF designs and manufactures rugged high-performance computing, AI, and video I/O boards, modules and systems using the high-speed processing available from advanced NVIDIA GPUs and APUs and Xilinx FPGAs.

https://wolf.ca/products/3u-vpx/vpx3u-ad5000e-cx7

Kontron VPX power supplies are commercial off-the-shelf (COTS), rugged, conduction cooled, single stage converters according to the ANSI/ VITA 62.0 specification. Perfectly designed to power a VPX chassis, these units seamlessly fit within the VITA 48.0 specification envelope.

Using state-of-the-art switching power technology combined with sophisticated multi-stage input filtering, they offer a wide input voltage range and superior efficiency for challenging environments.

The new 600W VPX360 series is compliant with MIL-STD-461, 704 and 1275 as per VITA 62. Featuring an embedded microprocessor, it supports monitoring and control capabilities with I2C bus (IPMI) and USB interfaces. The VPX power supply mechanical dimensions are 3U x 5HP (1" slot) and includes connectors, keying and alignment mechanisms as per VITA 62.

The VPX360DMS version provides 12V/80A and 3.3V/20A and IPMC for system management integration.

Discover our cutting-edge VPX power supplies today. SOSA™ Aligned VPX360DMS

Kontron www.kontron.com

FEATURES

Ą Outputs: 12V main / 2 x 40A, 3.3Vaux / 20A

Ą High efficiency, 12V-peak > 90%

Ą Wide input voltage range: 11 V … 70 V DC (nominal 28V or 48V), reverse polarity protection

Ą Voltage sense controlled, Over Voltage, Under Voltage, Over Current, Over Temperature protection

Ą Microprocessor controlled, with I2C bus / IPMB for VITA48.11 system management, USB port

Ą MIL-STD-461, MIL-STD-704, MIL-STD-1275 compliance as per VITA 62, ruggedized to MIL-STD-810

Ą No liquid / wet / aluminum electrolytic capacitors

https://www.wiener-d.com/product/vpx360-high-power-vpx-power-supply/

sales@us.kontron.com

www.linkedin.com/company/kontron-north-america/ 3U Plug In Cards (PICs): Power Supplies

888-294-4558

Rantec’s family of 3U VPX power supplies are designed to meet the rigorous demands of modern defense applications for airborne, land, and sea environments. Our family of 3U VPX power supplies offers versatile, reliable, and high-performance solutions for demanding defense applications. With strict adherence to industry standards, certifications, and a commitment to quality, these power supplies are a valuable choice for meeting the stringent requirements of the defense sector.

Our VITA compliant power supplies designed in alignment with the SOSA™ Technical Standard are designed with input voltages of either 28VDC or 270VDC and output power capabilities of up to 1200W. Rantec’s conformance to VITA 62.0, VITA 86.0, and the SOSA Technical Standard ensure seamless integration into MOSAaligned defense systems, make these power supplies invaluable assets in mission critical systems. Manufactured in the USA in an AS9100 and ISO9001 certified facility, Rantec power supplies ensure the highest quality and reliability.

FEATURES

Ą Products designed in alignment with the SOSA™ Technical Standard conform to VITA 62.0 and VITA 86.0 standards

Ą Input voltages of 28VDC or 270VDC

Ą Output power up to 1200W

Ą Designed and tested to meet MIL-STD-461, MIL-STD-704 or MIL-STD-1275, and MIL-STD 810

Ą Designed using NAVSO P-3641A derating guidelines

Ą MTBF: 50,000 hours per MIL-HDBK-217

Ą IPMI Communication Bus per VITA 46.11

Ą Input/Output/Temperature protection

Ą Custom capabilities such as hold-up, nuclear event detection, lightning protection, inrush suppression, and more

https://rantec.com/our-products/3u-vpx-mosa-power-supplies/

3U VPX Product Family

3U Plug In Cards (PICs): Power Supplies

Introducing the M2192: A cutting-edge 3U VPX DC to DC power supply aligned with the SOSA™ Technical Standard. Designed to meet the demanding requirements of military applications, this power supply is compliant with the VITA 62 mechanical standard, ensuring seamless integration and optimal performance.

The M2192 offers an impressive steady-state power output of 600W and is capable of handling a wide input range from 18 to 48VDC. Whether it’s air or ground-based operations, this power supply is fully compliant with the relevant industry standards, guaranteeing reliability and performance in any environment: MIL-STD-704 for aircraft power and MIL-STD-1275 for ground vehicle power. It also complies with environmental specifications outlined in MIL-STD-810 and maintains EMI compliance as per MIL-STD-461G.

With support for 1275E 12V and 100V surges, it’s prepared to withstand power fluctuations and surges that may occur in demanding military applications. For an extra layer of security to your mission-critical systems, the M2192 comes equipped with built-in NED (Nuclear Event Detection), providing enhanced safety and protection by detecting and responding to nuclear events or radiation levels.

To ensure efficient cooling in rugged environments, the M2192 is designed for conduction cooling, enabling optimal thermal management and reliable operation in harsh conditions. Milpower Source offers the industry’s most complete line of 3U and 6U tailorable VPX product supplies, including DC-DC, AC-DC, and dual input solutions in VITA, SOSA™ aligned, and customizable configurations.

FEATURES

Ą Wide range input

Ą Up to 600W output steady state power

Ą VITA 46.11 defined system management: output voltage and currents, temperature, card system status

Ą Supports MIL-STD-1275E

Ą NED (Nuclear Event Detection)

Ą Remote sense

Ą Fixed switching frequency (220 kHz)

Ą Indefinite short circuit protection

Ą Reverse battery protection

Ą Over-temperature shutdown with auto-recovery

Ą Included EMI filters

M2192 Series DC-DC Power Supply

GEN-4/5 SOSA™ / OpenVPX Backplane

Atrenne, a Celestica company, offers a wide range of highperformance backplanes, with 3U, 6U and hybrid 3U/6U models available. Our Gen-4/5 SOSA™ aligned / OpenVPX backplanes are part of an innovative product family that enables end-to-end solutions for 64/100 Gigabit systems. Designed to the demanding signal integrity requirements of PCIe Gen4 and 100GbE (100GBASE-KR4), these highperformance Gen-4/5 backplanes offer the highest signal integrity in the industry and are commonly integrated into our rugged line of ATR enclosures as well as our extensive line of development systems. Atrenne can also design application-specific configurations to meet your individual requirements.

FEATURES

Ą VITA 46/VITA 48 VPX REDI™-compliant with VITA 46.30 compliant RT3 connectors

Ą VITA 46.10 RTM connectors

Ą Multiple backplane profiles available, including backplanes with routed fabric connections, as well as both 3U and 6U pass-thru backplane versions which can be used with high-speed RTM cables

Ą Provisions for mechanical stops to prevent misinsertion of payload cards

Ą Keying and alignment per VITA 65 and VITA 46

Ą Durability: mating and unmating for 200 cycles

Ą Non-Volatile Memory Read Only (NVMRO) signal (jumper selectable)

https://www.atrenne.com/products/gen-45-openvpx-backplanes/

Atrenne, A Celestica Company www.atrenne-cs.com

sales@atrenne-cs.com

508-588-6110

www.linkedin.com/company/atrenne-integrated-solutions

SOSA™ Aligned BACKPLANE

Kontron’s SOSA™ Aligned BACKPLANE embodies exceptional high-speed performance and unparalleled flexibility. As a central connection element, the backplane is crucial for the performance of the overall system. Kontron has equipped this backplane, tailored for compute-demanding tasks, with significant capabilities, including lightning fast 100 Gigabit Ethernet transmission.

Its remarkable 100 Gbit/s speed performance has been validated through rigorous independent tests. The backplane’s seven-slot architecture allows for extensive functional integration. Drawing from extensive customer feedback, comprehensive expertise, and analytical insights, Kontron has incorporated a specific configuration for this backplane. Yet, it retains a flexible design ecosystem, welcoming custom adjustments to meet customer-specific requirements at any time.

Ready to experience Kontron’s high-performance solution? Contact us today to learn how our SOSA™ Aligned BACKPLANE can transform your operations.

FEATURES

Ą High speed design for 100 Gbit/s Ethernet (100GBase-KR4)

Ą 7 Slots VPX, 1 SBC, 1 Switch, 1 Clock, 4 Payload Slots

Ą Payload and clock slots can optionally be equipped with coaxial modules as per VITA 67.3C

Ą Featuring MULTIGIG RT 3 connectors

Ą Max. Input current per backplane VS1:VS2:VS3 = 120A : 90A : 90A

Ą Flexible keying and alignment mechanism

Ą Custom assembly or modification on request

Backplanes (3U & 6U) https://www.hartmann-electronic.com/product/3u-6u-sosa-aligned-vpx-backplanes/

D38999 Pin and Socket Contacts

Amphenol SV Microwave’s line of D38999 pin and socket contacts are aligned to the latest specification set forth by The Open Group Sensor Open Systems Architecture™ (SOSA) Consortium. These coaxial contacts fit series III housings of SOSA™ Technical Standard aligned J8 and J9 D38999 Connectors and are offered in BMB size 8 and SMPM size 12.

Building your SOSA aligned RF cable assemblies has never been easier with SV Microwave offering ITAR restricted capabilities and cables customized to optimize any solution. We can build your custom length harnesses with VITA 67.3 NanoRF, SMPM, or SMPS connectors.

Amphenol SV Microwave is an associate member of the SOSA Consortium and an active participant. Contact SV Microwave for your custom cable builds. In stock through distribution.

https://bit.ly/435RyV9

SV Microwave www.svmicrowave.com

Connectors & Cabling: Chassis Level Connectors (38999 and others)

FEATURES

Ą SOSA™ Aligned high frequency RF contacts for D38999

Ą Industry-trusted, standardized interfaces per MIL-STD-348

Ą Size 8 contacts fit larger cable, when loss matters most

Ą Size 12 contacts rated to higher frequency, when frequency and density matter

Ą Size 8 BMB - 22 GHz, Size 12 SMPM – 65 GHz

Ą Low solder wicking and high flexibility allows for tight bends behind the cable ferrule

Ą Ideal for chassis and out-of-the-box applications

 sales@svmicro.com @SVMicrowave  www.linkedin.com/company/sv-microwave/  561-840-1800

This rugged enclosure is designed for testing systems to meet the CMOSS Mounted Form Factor (CMFF) for use in multi-mission vehicles. Available with a 7-slot backplane aligned to the Sensor Open Systems Architecture™ (SOSA) Technical Standard, it supports CMOSS, VICTORY & MORA architectures.

Many fielded plug-in cards are available and proven in this chassis configuration. Ask for details on the right payload for your system.

Enclosures: Deployable https://products.elma.com/products/rugged-cmoss-atr-deployable-field-test-system

CMFF Deployable Test Platform Elma Electronic www.elma.com

FEATURES

Ą Enclosure designed to CMOSS vehicle mounted form factor with standard A-Kit (SAVE) mounting tray

Ą 3U 7-slot VPX 25Gb dual domain backplane (9-slot version also available)

Ą Conduction-convection cooled with conduction cooled slots

Ą VITA 46.11 Tier 3 out of band (OoB) chassis manager

Ą Single or redundant VITA 62 28V DC power supplies

Ą Rugged front panel I/O connectors & EMI filter

Ą Environmental: MIL-STD-810G, MIL-STD-461E, MIL-STD-1275E

sales@elma.com

www.linkedin.com/company/elma-electronic

SOSA™ Aligned Enclosures, Backplanes, & Chassis Managers

Pixus offers various MIL rugged and COTS enclosure solutions for 3U or 6U OpenVPX boards. There are several SOSA™ aligned slot profiles to choose from, with backplane designs to PCIe Gen4 and 100GbE. The company also has quick-turn SOSA aligned and VITA 66/67 development chassis and backplanes for rapid prototyping.

The MIL rugged ATRs utilize a modular design tailored to a customer’s specific application based on proven standard base platforms. Our ATRs come in conduction-cooled, airflow over fins in sidewalls, and liquid through sidewall configurations. Contact Pixus for Air Flow Through (AFT) and Air Flow By (AFB) designs. All Pixus chassis come with the option of our SOSA aligned Tier 3+ chassis hardware manager in a SlotSaver mezzanine format that fits behind the backplane.

Pixus Technologies www.pixustechnologies.com

524 Series SOSA™ Aligned Development Systems

The 524 Open Series development system from Atrenne Computing Solutions offers a feature-rich design that combines functionality and flexibility with aesthetic detail. Designed with the engineering developer in mind, the 524 Open Series development system incorporates a 9 slot OpenVPX Backplane (9 payloads + 2 power slots) with profiles aligned to the Sensor Open Systems Architecture™ (SOSA) Technical Standard and C4ISR/EW Modular Open Suite of Standards (CMOSS) initiatives. Unobstructed accessibility to cards under test is enabled for probe access with intelligent system monitoring capabilities. The front of the 524 Open Series development system chassis is configured with LEDs for each voltage and a corresponding test jack for ease of monitoring DC voltages and probing. An AC on/off switch and a system reset switch are also accessible via the front panel.

FEATURES

Ą Pixus offers various MIL rugged COTS enclosure solutions for 3U and 6U OpenVPX / SOSA boards

Ą Backplane design expertise up to and above 100GbE speeds, vast array of SOSA slot profile options

Ą SlotSaver mezzanine-based SOSA aligned chassis hardware manager, Tier 3+, 100% USA software/firmware

Ą Conduction-cooled, airflow through sidewalls, and liquid cooled through sidewall configurations

Ą Quick-turn prototyping and accelerated project development options

Ą Pixus USA is a proud member of the SOSA Consortium

Enclosures: Deployable https://pixustechnologies.com/products/category/openvpx

sales@pixustechnologies.com

916-297-0020

FEATURES

Enclosures: Development/Test

Ą Open frame for easy card access.

Ą Maximum unrestricted airflow and cooling for high-powered cards.

Ą 3U/6U 9 slot payload + 2 power slots OpenVPX backplane with slot profiles aligned to the SOSA™ Technical Standard.

Ą Available for 3U or 6U x 160mm modules.

Ą Supports air-cooled modules using IEEE 1101.10 card guides.

Ą Supports conduction-cooled modules using VITA 48.2 aluminum slot guides.

Ą DC voltage test jacks for SOSA Aligned 12V and 3.3 Aux. DC Voltages.

https://www.atrenne.com/products/524-series-development-chassis/

Atrenne, A Celestica Company www.atrenne-cs.com

sales@atrenne-cs.com

www.linkedin.com/company/atrenne-integrated-solutions

Enclosures: Development/Test

100GbE SOSA™ Aligned Development Kit Includes Versal™ and 64 GS/s Direct RF Options

This next-generation 3U OpenVPX Benchtop Development Platform (WS3A01-Sx) is both SOSA™ aligned and 100Gb Ethernet capable, and is designed from the ground up to economically speed development of 100GbE applications that are aligned with the SOSA™ Technical Standard. .

The stock Kit includes a 3U Chassis, Backplane, Chassis Manager, FPGA Board, I/O Card, 100GbE Switch, SBC, VITA blocks, and MIL-DTL-38999 cable.

OVERALL SYSTEM FEATURES

• Front-loading, air-cooled system with conduction-cooled boards

• Seven 3U OpenVPX slots with SOSA™ aligned backplane profiles

– One 14.6.11 Payload

– Three 14.6.11 Empty Payload (for expansion)

– One 14.2.16 I/O-intensive SBC

– One 14.4.14 100GbE Switch

– One VITA 62 Power Supply – 12V-Heavy

• 25 Gbps Line Rates on Data and Expansion Planes

– 25/40/100Gb Ethernet

– SDR/DDR/QDR/EDR InfiniBand

– Gen 3/4 PCI Express

– Custom protocols up to 25Gbps per lane

• VITA 66.5C and VITA 67.3C for payload slots

• Four MIL-DTL-38999 SOSA™ aligned circular connectors with 19 RF connections, and one MIL-DTL-38999 Cable

• Multiple levels of hardware and software security CHASSIS MANAGER

• VITA 46.11 compliant

• Enables control, maintenance, and security functions

• One Xilinx Zynq® UltraScale+™ MPSoC (XCZU5EG)

• Supports MIL-STD-1553

100Gb ETHERNET SWITCH

• 40/100Gb Ethernet Data Plane Switch – 6.4Tb/s switching capacity – Industry-leading, true cut through latency

• 1/10/25/40/100Gb Ethernet Control Plane Switch

• Two Xilinx Zynq UltraScale+ MPSoCs (XCZU5EG)

FPGA PROCESSOR

• Processing Option #1: Virtex™ UltraScale+ FPGA

• Processing Option #2: Versal™ Premium FPGA

• Processing Option #3: Agilex™ 9 Direct RF-Series FPGA

I/O CARD

• ADC/DAC Option #1: Xilinx Zynq UltraScale+ Gen3 RFSoC

– ADC: 4 Channel, 5.0+GSps Sample Rate, 14 bit Resolution

– DAC: 4 Channel, 10.0+GSps Sample Rate, 14 bit Resolution

• ADC/DAC Option #2: Jariet Technologies Electra-MA

– ADC: 2 Channel, 64.0GSps Sample Rate, 10 bit Resolution

– DAC: 2 Channel, 64.0GSps Sample Rate, 10 bit Resolution

SINGLE BOARD COMPUTER (SBC)

• Intel® Xeon® E-2176M

• Up to 32 GB DDR4 at 2,400 MT/s with ECC

• Up to 256 GB high-performance NVMe onboard storage APPLICATION DEVELOPMENT

• Standard support delivered with all systems

• Optional full Board Support Package

– Enables customization of Zynq PS, PL for security – Provides fast and robust HDL-based environment

For a virtual or in-person Demo, contact us.

MORA-Ready Development Platform

The MORA-Ready Development Platform simplifies the process of creating RF signal processing capabilities and accelerates integration of existing applications. Using the hardware-agnostic helux Core, a combination of software libraries and firmware modules, the MORA-Ready Development Platform is aligned to the Sensor Open Systems Architecture™ (SOSA) Technical Standard, integrating highperforming RF payload plug-in cards (PICs) to provide interfaces aligned to MORA for the VICTORY Data Bus (VDB) and MORA Low Latency Bus (ML2B). The MORA software can be modified to support the UK Generic Vehicle Architecture (GVA). Available integrated with a choice of payload cards, Ethernet switch, power supply, and I/O PICs from a broad ecosystem of hardware suppliers.

https://products.elma.com/collections/test-development-computing

Elma Electronic www.elma.com

FEATURES

Enclosures: Development/Test

Ą 6- or 8-slot 25Gb high performance backplane in CompacFrame test platform

Ą Profiles aligned to the SOSA Technical Standard for RF signal creation to the MORA standard (VITA 49)

Ą Choose from a list of proven partner plug-in cards (PICs): CPU, Ethernet switch, RF payload, tuner, PNT, and others

Ą Sciens helux tool suite includes MORA Explorer and MSRP Generator

Ą Built-in VITA 46.11 Tier 3 Out of Band chassis manager

Ą Internal power supply and 12 VDC front and rear fans

Ą Payload is transferable to a range of rugged deployable enclosures – CMFF, ATR, small form factor, etc.

sales@elma.com

510-656-3400 @elma_electronic

www.linkedin.com/company/elma-electronic

100Gb VPX Development for SOSA™ Aligned Systems

The DK3HS is a flexible bench top platform providing the scalability to support rapid development, demonstration and evaluation of 3U VPX and SOSA™ aligned systems requiring 100Gb capability. It enables shortened design cycles for faster time to deployment in critical applications and allows fast conversion between air and conduction cooled slot inserts for VITA 48.2 modules.

The DK3HS is available with custom backplanes with profiles that support VPX and SOSA aligned plug in cards as well as a standard with an 8 slot, 1.2" pitch power and ground 100Gb backplane to support your development efforts using Meritec slot to slot cabling systems. The chassis has a 12V centric power supply to support current and emerging VPX and SOSA aligned module power requirements.

The DK3HS is part of the LCR family of development solutions supporting VPX system development and the hardware convergence and interoperability initiatives of the US Department of Defense.

FEATURES

Ą Multiple 8 slot backplane options for VPX and SOSA aligned slot profiles

Ą Standard power and ground 100Gb backplanes

Ą VITA 66 and 67 apertures for optical and RF I/O

Ą Supports PCIe Gen 4 and Gen 5 protocols

Ą Supports 1000BASE-KX, 10GBASE-KX4, 100GBASE-KR4 backplane conectivity

Ą Adjustable speed high cfm fans

Ą Integrated AC / DC power supply

Enclosures: Development/Test https://www.lcrembeddedsystems.com/100-gb-vpx-system-development/

DornerWorks 1G TSN PCIe–to-TSN Endpoint IP

Time sensitive networking (TSN) solutions from DornerWorks ensure messages arrive on time and as scheduled on missioncritical COTS hardware. Accurately synchronize time among devices, send time-critical messages with guaranteed lowest latency, and guarantee bandwidth for certain devices across your network. Rely on DornerWorks as your trusted partner for TSN and accelerate time to mission.

FEATURES

Ą IEEE Standards Based

Ą High Accuracy

Ą Versatile Interfaces

Ą Certifiable

DornerWorks www.DornerWorks.com

616-245-8369

www.linkedin.com/company/211258/admin/feed/posts/

Run-Time Environment Software: Hypervisor

DornerWorks seL4™ Hypervisor

Staying ahead of cyber threats is a never-ending cycle. The DornerWorks Hypervisor uses provable secure seL4 software to break that cycle. With simple modeling tools and multiple support options, DornerWorks Hypervisor solutions bring security and high assurance out of the lab to accelerate time to mission.

FEATURES

Ą Deos™ & Other RTOS Compatible

Ą Formal Methods Proof

Ą MOSA/SOSA™ Aligned

Ą 100% U.S. Based Design & Support

Ą High Bandwidth Communication

Ą Secure Boot Functionality

Ą Available on COTS Hardware

DornerWorks www.DornerWorks.com  616-245-8369

www.linkedin.com/company/211258/admin/feed/posts/

RTI Connext: Open, Interoperable Connectivity Framework

RTI Connext® is a Sensor Open Systems Architecture™ (SOSA) aligned data connectivity framework that is fast, scalable, reliable, and secure. It rapidly transfers data within the network and between land, sea, air, and space-based systems. With its interoperability, portability, loose-coupling and real-time Quality of Service (QoS), Connext is the leading middleware for mission-critical aerospace and defense systems.

Based on the OMG® Data Distribution Service (DDS™) standard, Connext advances the Modular Open Systems Approach (MOSA) and accelerates system development by rapidly integrating both new and legacy system assets. Its data-centric architecture rapidly delivers data-in-motion information from multiple operational sources across the room and across the world.

https://www.rti.com/a+d

FEATURES

Ą Secure: Offers comprehensive security features to safeguard sensitive data and prevent unauthorized access including encryption, access control, authentication, and data integrity mechanisms.

Ą Reliable: Incorporates fail-safe, robust mechanisms for ensuring data reliability and fault tolerance. Connext employs techniques such as data replication, automatic reconnection, and fault recovery to maintain system integrity in challenging operational environments.

Ą Scalable: Accommodates large-scale, distributed systems for reliable communication to hundreds of thousands of endpoints across complex architectures.

Ą Interoperable: Adheres to the SOSA Technical Standard, MOSA, and other industry standards. Connext supports the programming languages and operating systems commonly used in missioncritical systems, allowing for seamless integration with existing systems and interoperability between different components and vendors.

The V1163 is a powerful heterogeneous computing XMC with high bandwidth IO featuring the Xilinx® Versal® ASoC and rugged optical and electrical IO. The V1163 provides options for Versal Prime or AI Core part selection. In a single mezzanine card, the V1163 provides 100G optical interfaces, FPGA fabric, ARM processor cores, and optional AI engines. The V1163 is designed for applications requiring any combination of the following: high speed optical/electrical interfaces, FPGA processing resources, ARM processing cores, and AI engines. Use cases include sensor interface design, digital signal processing, video processing, application co-processing, and multi-level secure networking. Radar, SIGINT, video, storage, medical imaging, and embedded communications systems all have the ability to benefit from the V1163 module. The XMC form factor and rugged design of the V1163 can turn a VPX-based single board computer into a single-slot sensor interface and heterogeneous computing solution.

FEATURES

Ą Xilinx® Versal® ASoC (FPGA) with AI Engines (optional)

Ą Up to twelve (12) 1G to 25G optical ports via MPO front panel I/O or VITA 66 optical backplane I/O. Electrical I/O via Pn6 also available

Ą Supports PCIe Gen4/Gen3 x8/x16

Ą 2 banks of 4GB up to 1866MHz LPDDR4 SDRAM

Ą Thermal sensors for monitoring card temperature

Ą Robust FPGA development framework

https://newwavedv.com/products/fpga-interface-cards/pmc-xmc/v1163-12-port-rugged-xmc-asoc-card/

V1163 12-Port Rugged XMC ASoC Card

XMC Mezzanine Cards