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Systematic

Design of Analog CMOS Circuits Using Pre Computed Lookup Tables Paul Jespers

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SYSTEMATIC DESIGN OF ANALOG CMOS CIRCUITS

UsingPre-ComputedLookupTables

Discover a fresh approach to efficient and insight-driven analog integrated circuit design in nanoscale-CMOSwiththishands-onguide

ExpertauthorspresentasizingmethodologythatemploysSPICE-generatedlookup tables,enablingcloseagreementbetweenhandanalysisandsimulation.

Illustratestheexplorationofanalogcircuittradeoffsusingthegm/ID ratioasacentral variableinscript-baseddesignflows,capturedindownloadableMatlabcode. Includesoverfortydetailedworkedexamples,includingthedesignoflow-noiseand low-distortiongainstages,andoperationaltransconductanceamplifiers

Whether you are a professional analog circuit designer, a researcher, or a graduate student, this book will provide you with the theoretical know-how and practical tools you need to acquire a systematic and re-use oriented design style for analog integrated circuits in modern CMOS.

Paul G. A. Jespers is a Professor Emeritus of the Université Catholique de Louvain and a LifeFellowoftheIEEE.

BorisMurmannisaProfessorofElectricalEngineeringatStanfordUniversity,andaFellow oftheIEEE.

“Analogdesigngeneratesinsight,butrequiresexpertise.Tobuildupsuchexpertise,analytic modelsareusedtocreatedesignprocedures.Indeed,analyticmodelseasilyallowdevicesizing fromspecifications Theylackaccuracy,however Themodelsofpresent-daynanometer MOStransistorshavebecomerathercomplicated.OntheotherhandSPICEsimulationsdo providetherequiredaccuracybutdon’tgenerateasmuchinsight.TheuseofSPICEgeneratedlookuptables,asdescribedinthisbook,providesanexcellentcompromise The accuracyisderivedfromSPICEandthedesignprocedureitselfismadethroughMATLAB employingparameterslikegm/ID Asaresultaconsiderableamountofintuitioncanbebuilt up.Suchdesignprocedureishighlyrecommendedtowhoeverwantstogaininsightbydoing analogdesign,withoutlosingtheaccuracyofrealSPICEsimulations.”

WillySansen,KULeuven

“Withtheadventofsub-micronMOStransistorsmorethantwodecadesago,traditional designbasedonthesquare-lawmodelisnolongeradequate Alternativessuchas‘tweaking’ withSPICEorrelyingonmoresophisticateddevicemodelsdonotprovidethecircuitinsight necessaryforoptimizeddesignoraretoomathematicallycomplex

Thedesignmethodologypresentedinthisbookovercomestheseshortcomings.Afocus onfundamentaldesignparameters–dynamicrange,bandwidth,powerdissipation–naturally leadstooptimizedsolutions,whilerelyingontransistordataextractedwiththesimulator ensuresagreementbetweendesignandverification.Comprehensivedesignexamplesof commonblockssuchasOTAsshowhowtoreadilyapplytheseconceptsinpractice

Thisbookfixeswhathasbeenbrokenwithanalogdesignformorethantwentyyears.I recommendittoexpertsandnovicesalike.”

“TheauthorspresentacleversolutiontocapturetheprecisionofthebestMOSFETmodels, currentorfuture,inacomprehensiveandefficientdesignflowcompatiblewithnanometric CMOSprocesses.Inthisbook,youwillalsoenjoyawealthofinvaluableinformationto deepenyouranalogdesignskills”

YvesLeduc,PolytechNiceSophia

SYSTEMATIC DESIGN OF ANALOG CMOS CIRCUITS

Using Pre-Computed Lookup Tables

UniversitéCatholiquedeLouvain,Belgium

StanfordUniversity

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BM

Contents

SymbolsandAcronyms

1Introduction

1.1Motivation

1.2TheAnalogCircuitSizingProblemandtheProposedApproach

1.2.1Square-LawPerspective

1.2.2CapturingtheTradeoffsUsingLookupTables 123Generalization

1.2.4VGS-agnosticdesign

1.2.5DesigninWeakInversion

1.3ContentOverview

1.4Prerequisites

1.5Notation

16References

2BasicTransistorModeling

2.1TheChargeSheetModel(CSM)

2.1.1TheCSMDrainCurrentEquation

Example2.1SurfacePotentialCalculation

2.1.2TheDependenceoftheDrainCurrentontheDrainVoltage

2.1.3TheTransconductanceEfficiencygm/ID

2.2TheBasicEKVModel

2.2.1TheBasicEKVEquations

2.2.2TheBasicEKVModelforaGrounded-SourceMOSTransistor

2.2.3StrongandWeakInversionApproximationsoftheEKVModel

2.2.4BasicEKVModelExpressionsforgm andgm/ID

2.2.5EKVParameterExtraction

Example2.2EKVParameterExtractionfortheCSMDevice

2.3RealTransistors

2.3.1RealDrainCurrentCharacteristicsID(VGS)andgm/ID

Example2.3EKVParameterExtractionforRealTransistors

2.3.2TheDrainSaturationVoltageVDsat ofRealTransistors

2.3.3ImpactofBiasConditionsonEKVParameters

2.3.4TheDrainCurrentCharacteristicID(VDS)

2.3.5TheOutputConductancegds

2.3.6Thegds/ID Ratio

2.3.7TheIntrinsicGain

2.3.8MOSFETCapacitancesandtheTransitFrequencyfT

2.4Summary

2.5References

3BasicSizingUsingthegm/ID Methodology

3.1SizinganIntrinsicGainStage(IGS)

3.1.1CircuitAnalysis

3.1.2SizingConsiderations

3.1.3SizingforGivenLandgm/ID

Example3.1ABasicSizingExample

3.1.4BasicTradeoffExploration

Example3.2SizingatConstantgm/ID

Example3.3SizingatConstantfT

Example3.4SizingatConstant|Av0|

3.1.5SizinginWeakInversion

Example35SizinginWeakInversionGivenaWidthConstraint

3.1.6SizingUsingtheDrainCurrentDensity

Example3.6SizingUsingContoursintheJD andLPlane

3.1.7InclusionofExtrinsicCapacitances

Example3.7IterativeSizingtoAccountforSelf-Loading

3.2PracticalCommon-SourceStages

321ActiveLoad

Example3.8SizingaCSStagewithActiveLoad

Example3.9Large-SignalCharacteristicofaCSStagewithActiveLoad

3.2.2ResistiveLoad

Example3.10SizingaCSStagewithResistiveLoad

3.3DifferentialAmplifierStages

Example3.11SizingaDifferentialPairwithIdealCurrentSourceLoads

Example3.12SizingaDifferentialAmplifierwithCurrent-MirrorLoad

Example3.13SizingaDifferentialAmplifierwithResistiveInputDriverand ResistiveLoads

3.4Summary

3.5References

4Noise,DistortionandMismatch

4.1ElectronicNoise

4.1.1ThermalNoiseModeling

4.1.2TradeoffbetweenThermalNoise,GBWandSupplyCurrent

Example4.1SizingofaLow-NoiseIGS

4.1.3ThermalNoisefromActiveLoads

Example4.2Choosinggm/ID ofap-ChannelLoadforMaximumDynamic Range

4.1.4FlickerNoise(1/fNoise)

Example4.3EstimationoftheFlickerNoiseCornerFrequency

4.2NonlinearDistortion

4.2.1NonlinearityoftheMOSTransconductance

4.2.2NonlinearityoftheMOSDifferentialPair

Example4.4SizingaDifferentialAmplifierBasedonDistortionSpecs

4.2.3InclusionoftheOutputConductance

Example4.5SizingofaResistivelyLoadedCSStagewithLowHD2

Example4.6SizingofaResistivelyLoadedCSStagewithLowHD2 andVDD =1.2V

4.3RandomMismatch

4.3.1ModelingofRandomMismatch

4.3.2EffectofMismatchinaCurrentMirror

Example4.7RandomMismatchEstimationinaCurrentMirror

4.3.3EffectofMismatchinaDifferentialAmplifier

Example4.8OffsetDriftEstimation

4.4Summary

45References

5PracticalCircuitExamplesI

5.1ConstantTransconductanceBiasCircuit

Example5.1SizingofaConstantTransconductanceBiasCircuit

5.2High-SwingCascodedCurrentMirror

5.2.1SizingtheCurrentMirrorDevices

5.2.2SizingtheCascodeBiasCircuit

5.3Low-DropoutVoltageRegulator

5.3.1Low-FrequencyAnalysis

Example5.2BasicSizingofanLDO

5.3.2High-FrequencyAnalysis

Example5.3SizingtheLDO’sLoadCapacitance

5.4RFLow-NoiseAmplifier

5.4.1SizingforLow-NoiseFigure

Example5.4SizingtheLNAforaGivenNoiseFigure

5.4.2SizingforLow-NoiseFigureandLowDistortion

Example5.5SizingtheLNAforMinimumHD2

5.5ChargeAmplifier

5.5.1CircuitAnalysis

5.5.2OptimizationAssumingConstantTransitFrequency

5.5.3OptimizationAssumingConstantDrainCurrent

Example5.6ChargeAmplifierOptimization(ConstantID)

5.5.4OptimizationAssumingConstantNoiseandBandwidth

Example5.7ChargeAmplifierOptimization(ConstantNoiseandBandwidth)

Example5.8ChargeAmplifierSizing

Example5.9ChargeAmplifierRe-sizingforSmallerArea

5.6DesigningforProcessCorners

5.6.1BiasingConsiderations

5.6.2TechnologyEvaluationoverProcessandTemperature

Example5.10ConstantTransconductanceBiasCircuitPerformanceacross ProcessCorners

5.6.3PossibleDesignFlows

Example5.11DesignofaChargeAmplifierwithCornerAwareness

5.7Summary

5.8References

6PracticalCircuitExamplesII

6.1BasicOTAforSwitched-CapacitorCircuits

6.1.1Small-SignalCircuitAnalysis

6.1.2OptimizationAssumingConstantNoiseandBandwidth

Example6.1OptimizationoftheBasicOTA

Example6.2SizingoftheBasicOTA

6.1.3OptimizationinPresenceofSlewing

Example6.3SizingoftheBasicOTACircuitinPresenceofSlewing

6.2Folded-CascodeOTAforSwitched-CapacitorCircuits

6.2.1DesignEquations

622OptimizationProcedure

Example6.4SizingoftheFolded-CascodeOutputBranch

Example6.5OptimizationoftheFolded-CascodeOTA

Example6.6SizingtheFolded-CascodeOTA

6.2.3OptimizationinPresenceofSlewing

6.3Two-StageOTAforSwitched-CapacitorCircuits

6.3.1DesignEquations

6.3.2OptimizationProcedure

Example6.7OptimizationoftheTwo-StageOTA

Example6.8SizingtheTwo-StageOTA

6.3.3OptimizationinPresenceofSlewing

6.4SimplifiedDesignFlows

6.4.1Folded-CascodeOTA

6.4.2Two-StageOTA

6.5SizingSwitches

Example6.9SizingaTransmissionGateSwitch

6.6Summary

6.7References

Appendix1TheEKVParameterExtractionAlgorithm

A.1.1ReviewofEquations

A.1.2ParameterExtractionAlgorithm

A.1.3MatlabFunctionXTRACTm

A.1.4ParameterExtractionExample

A15MatlabFunctionXTRACT2m

A16CornerParameterExtraction

A.1.7Conclusion

A.1.8References

Appendix2LookupTableGenerationandUsage

A.2.1LookupTableGeneration

A.2.1.1ConfigurationFile

A.2.1.2GeneratingLookupTablesforaNewTechnology

A.2.2MatlabFunctionlookupm

A.2.3MatlabFunctionlookupVGSm

A24LookupofRatioswithNon-monotonicVectors

A25LookupVGSwithNon-monotonicgm/ID Vector

A.2.6PassingDesignVariablestotheSimulator

A.2.7References

Appendix3LayoutDependence

A.3.1IntroductiontoLayoutDependentEffects(LDE)

A.3.2TransistorFingerPartitioning

A.3.3WidthDependenceofParameterRatios

A.3.4References Index

Symbols and Acronyms

Av

Small-signalvoltagegain

Av0

Lowfrequencysmall-signalvoltagegain

Aintr

Intrinsicgain

AVT

Pelgromcoefficientforthresholdvoltagemismatch

Pelgromcoefficientforcurrentfactormismatch

ACM

AdvancedCompactModel

CLM

ChannelLengthModulation

CSM

ChargeSheetModel

C Capacitorvalue

Cox

Oxidecapacitanceperunitarea

Cgb

Gate-to-bulkcapacitance

Cgd

Gate-to-draincapacitance

Cgs

Gate-to-sourcecapacitance

Cj Junctioncapacitance

CC Compensationcapacitance

CMOS

ComplementaryMetalOxideSemiconductor

Cself

Self-loadingcapacitanceofanamplifier

D

Diffusionconstant

DIBL

Drain-InducedBarrierLowering

EKV

Enz,KrumenacherandVittozcompactmodel

FO

Fan-out(ratiobetweenloadandinputcapacitancesofacircuit)

f FrequencyinHz

fc Cutofffrequency( 3dBfrequency)

fT

Transitfrequency

fu

Unitygainfrequency(where|Av|=1)

gds

Outputconductance

gm

Gatetransconductance

gmk

kth derivativeofID withrespecttoVGS

gmb

Bulktransconductance

gms

Sourcetransconductance

HD2,HD3

Fractionalharmonicdistortionoforder2,3,…

i

Normalizeddraincurrent

IGS

IntrinsicGainStage

ID

DCdraincurrent

IS

Specificcurrent

ISsq

Squarespecificcurrent(W=L)

ISu

Unaryspecificcurrent(W=1μm)

JD

Draincurrentdensity(ID/W)

L Gatelength

N

Impurityconcentration

n

Subthresholdslopefactor

q

Normalizedmobilechargedensity

qS,qD

Normalizedmobilechargedensityatthesourceanddrain

Qi

Mobilechargedensity

RHP RightHalfPlane

SVT0

ThresholdvoltagesensitivityfactorwithrespecttoVDS

SIS

SpecificcurrentsensitivityfactorwithrespecttoVDS

UT

ThermalvoltagekT/q

VX

DCvoltagecomponentatnodex

vx

ACvoltagecomponentatnodex

vX

Totalvoltageatnodex,vX =VX +vx

VEA

Earlyvoltage

VI

DCcomponentofinputvoltage

vi

ACcomponentofinputvoltage

vI

TotalinputvoltagevI =VI +vi

vid

Differentialinputvoltage,ACcomponent

VS,VG,VD

Source,gateanddrainvoltagewithrespecttobulk(DC)

VGS,VDS

Gateanddrainvoltagewithrespecttothesource(DC)

vgs,vds

Incrementalgateanddrainvoltagewithrespecttothesource

vgs,pk,vds,pk

Incrementalgateanddrainvoltageamplitude(sinusoid)

VP

Pinch-offvoltagewithrespecttothebulk

VDsat

Drainsaturationvoltage

vsat

Saturationvelocityofmobilecarriers

VT

Thresholdvoltage

VOV

Gateoverdrivevoltage,VGS –VT

W

Transistorwidth

WI,MI,SI

Weak,moderateandstrong-inversion

β

Currentfactor1 (μCoxW/L)

γ

Backgateeffectparameter

γn,γp

Thermalnoisefactorforn-channelandp-channeldevices2

μ Mobility

μo

Low-fieldmobility

ρ Normalizedtransconductanceefficiency

ψS Surfacepotential

ω

Angularfrequency(2πf)

ωc

Angularcutofffrequency(2πfc)

ωT

Angulartransitfrequency(2πfT)

ωTi

AngulartransitfrequencyconsideringonlyCgs (insteadofCgg)

1Thesymbolβisalsousedtodenotethefeedbackfactorinamplifiercircuits.The distinctionisusuallyclearfromthecontext.

2Thedistinctionfromthebackgateeffectparameterγisusuallyclearfromthecontext.

1 Introduction ◈

1.1 Motivation

Since the 1960s, the square-law model for complementary metal-oxide-semiconductor (CMOS) transistors has been used extensively to analyze and design analog and digital integrated circuits. An advantage of the square-law equations is that they are easy to derive frombasicsolid-statephysics,algebraicallysimpleandyetusefulforgaininginsightintobasic CMOS circuit behavior As a result, the square-law model remains useful as a “ warm-up tool” for students in circuit design, and it is featured in all popular analog integrated circuit textbooks(examplesinclude[1],[2]).

On the other hand, it is well known that the square-law MOS model is plagued by severallimitations,especiallywhenitcomestoshort-channeltransistors:

The above-stated issuesare clearly visible in Figure11, which shows the current density plot ofarealistic65-nmtransistor,togetherwithexponentialandsquare-lawapproximations.The exponential provides a reasonably good fit for very low VGS (weak inversion) and the quadratic approximation begins to make sense a few hundred millivolts above the device’s threshold voltage (vertical dashed line). The transition from weak to strong inversion should ideally be smooth and continuous, but finding a physical relationship that bridges the exponential and square-law approximations turns out to be non-trivial In addition, at very ModernMOSFETsareimpairedbynumerousmobilitydegradationeffects,related totheirshortchannellength,thingateoxideandtheirgenerallymorecomplex structureanddopingprofiles Instronginversion,withgateoverdrivevoltages(VGS –VT)ofseveralhundredmillivolts,theerrorinthetransconductancepredictedby square-lawmodelswithconstantparametersisoftheorderof20–60%.

Inmoderateinversion,withgateoverdrivevoltagesbelow150mV,thesquare-law modelbreaksdownaltogetheranditmaybeinerrorbyafactoroftwoorevenmore. ThisdeficiencyappliestoallMOSFETs,regardlessofchannellength However,the issuehasbecomemorepronouncedwithshortchanneldevices,sincemoderate inversionrepresentsadesign“sweetspot”foravarietyofcircuitsinthesetechnologies [3]–[5].

Inweakinversion(subthresholdoperation),thecurrentflowsbydiffusion(likeina BJT)andthesquare-lawmodelmustbereplacedwithanexponentialI–V relationship

largeVGS, the current density of the real device and the quadratic model diverge again due to thementionedmobilitydegradationeffects

Figure1.1Currentdensityofaminimum-lengthn-channeldevicein65-nmCMOS technologyversusVGS Thedottedverticallinecorrespondstothedevice’sthreshold voltage(seeChapter2forfurtherdetails).

The above-stated modeling limitations are a great nuisance when it comes to design, since the square-law hand calculations described in textbooks typically won’t match simulations for a classical flow (see Figure 1.2). Modern circuit simulation relies on complex devicemodelssuchasBSIM6[6]orPSP1 [7], which are carefully crafted to reflect the “real” device characteristic in Figure 11 The result is a significant disconnect between hand analysis and simulation results, and consequently, designers tend to shy away from handcalculations and resort to a design style built on iterative and time-consuming SPICE-based “tweaking.”

Figure1.2Typicalanalogcircuitdesignflowbasedonsquare-lawhandcalculations SPICEsimulationusingadvancedmodels

Thereareseveralissueswiththeiterativesimulation-baseddesignofanalogcircuits.The problem is that the designer loses insight about the tradeoffs as well as the ability to sanitycheck the results While an equation-based design can reveal fundamental issues with a topology and help the designer advance his or her circuit architecture, it is difficult to gain knowledge about the fundamental limits of a circuit via repetitive sizing and simulation. What used to be design now resembles reverse engineering, which is highly undesirable for anyonewhoisinterestedinleading-edgeinnovation.

The second issue is that highly iterative design based on SPICE “tweaking” is typically incompatible with the time-to-market pressure seen in today’s IC developments As a response to this problem, universities and EDA vendors have created solutions that look to automate the iterative process, leveraging the vast amount of computing power available today. The work of [8] provides an extensive reference list of such programs and categorizes themasfulldesignautomation(FDA)tools WhileanFDAapproachcanhelpovercomethe design time issue, it comes with the same problem as manual tweaking: It is even more difficult for the designer to gain analytical insight and intuition, which is an important ingredientfortopologyselectionandinnovation.

Taking a step back, we note that the key problem is not the equation set that describes the circuit, which tends to be either amenable to manual derivation or available in standard textbooks and publications The main issue lies in linking the device sizing parameters (geometriesandbiascurrents)tothetransistor’s representation within the circuit, typically in formofasmall-signalmodel.Therefore,whileusingFDAcanbeappropriateandjustifiedin somecases,itgoesonestepfurtherthanrequired,providingfullautomationattheexpenseof analyticalinsight

The design approach described in this book falls under the category of full design handcrafting (FDH) [8]. It builds on classical hand analysis methods and eliminates the gap betweenhandanalysisandcomplextransistorbehaviorusingSPICE-generatedlookuptables (see Figure 1.3). The tables contain the transistor’s equivalent small-signal parameters (gm, gds, etc) across a multi-dimensional sweep of the MOSFET’s terminal voltages Since using the lookup table data closely captures the behavior of the SPICE model, the approximation issues of Figure 1.2 are eliminated and it is possible to achieve close agreement between the desired specs and the simulated performance without iterative tweaking. Though in some cases the calculations can literally be done by hand, it is usually more efficient to implement the design flow through a computer script. In this book, we chose the popular Matlab® environmentfordesigningsuchscripts

Figure1.3Analogcircuitdesignflowusedinthisbook

Itisworthnotingthattheoutlinedapproachdoesnotresemblethe“SPICEintheloop” approach [9], [10] advocated in the 1980s The main differences are: (1) The lookup tables arecreatedonceandstoredpermanently;theydonotgetupdatedwitheachcircuitsimulation run. (2) The design scripts tend to use abstract and simplified circuit models. This often means that the designer does not need to worry about auxiliary circuits that may be required to get a SPICE simulation to work. For example, it is possible to create a design script that evaluates the small-signal performance of an amplifier under the assumption that the bias point is perfectly set How exactly that bias point is established can be determined later, after studyingthefirst-orderperformancetradeoffs.

ToimplementthedesignflowofFigure1.3,weneedthefollowingingredients:

Aconvenientwaytogenerateandaccessthelookuptabledata.Thegenerationofthe proposedlookuptableformatisdescribedinAppendix2.Examplesonhowtoaccess andusethestoreddataaregiventhroughoutthisbook(includinganintroductory exampleinSection122)

Asuitablewaytotranslatethedesignproblemintoascriptthathelpsusstudythekey tradeoffsandultimatelycomputesthefinaldevicesizes.Mostofthisbookis dedicatedtothispartoftheflow.Bymeansofexamples,westudydesignproblemsof varyingcomplexityandthederivedscriptscanformthebasisforfuturedesign problemsthatthereaderwillencounter

A key aspect of the proposed methodology is that we interpret and organize the lookup table databasedonthetransistor’sinversionlevel,employingthetransconductanceefficiency gm/ID as a proxy, and key parameter for design. This metric captures a device’s efficiency in translating bias current to transconductance and spans nearly the same range in all modern CMOSprocesses(~3…30S/A). Whencombinedwithotherfiguresofmerit(gm/Cgg,gm/gds, etc), thinking in terms of gm/ID allows us to study the tradeoffs between bandwidth, noise, distortion and power dissipation in a normalized space The final bias currents and device

sizes follow from a straightforward de-normalization step using the current density (ID/W). WewilltakeafirstlookatthisnormalizeddesignapproachinSection122

The idea of gm/ID-based design was first articulated by Silveira, Jespers et al in 1996 [11]. Since then, the approach has been continuously refined through academic research (see e.g. [12]–[17]) and is being taught at various universities. Several companies known to the authors have integrated lookup table based design into their design environments. These efforts were driven by the first set of graduates being exposed to the methodology in school. Despitethisgrowingpopularity,muchneedstobedonetomaketheapproachaccessibletoa broadercommunityandspecificallythoseengineerswhohavenotacquiredthematerialatthe university. The goal of this book is to provide a comprehensive resource that will accomplish this.

It is important to note that several other authors have made contributions toward a design methodology that follows the spirit of full design handcrafting with bridges between hand analysis and simulation Among them are the inversion coefficient (IC) based flows by Binkley [18], Enz [19], and Sansen [20] as well as the 2010 gm/ID-centric book by Jespers [21]. The main difference between these works and the present book is that they are still based on analytical device models. Instead of working with purely numerical lookup table data, these methodologies assume that the transistor characteristics can be fit to model equations(typicallyEKV[22])thataremorecomplexthanthesquare-lawmodel,butnottoo complex to be included in a design script environment. This approach is certainly workable for today’s mainstream technologies, but we decided to go with a sizing approach that is agnostic to the increasingly complex physical behavior of nanoscale transistors. Despite this goal, we still make use of the EKV model to build intuition, but won’t use it to compute the ultimatedevicesizes ThisapproachismadetransparentinChapters2–4

1.2 The Analog Circuit Sizing Problem and the Proposed Approach

Before outlining the remainder of this book, we feel that it is important to provide a short (and simplified) walk-through of the proposed design methodology. For this purpose, we assume that the reader is familiar with CMOS square-law design and we use the shortcomingsofthesquarelawtomotivateourapproach

Generally, the types of analog circuits that we consider in this book fall into the class-A category, which means that they are operated with constant bias current. A basic example is the differential pair shown in Figure 1.4, which is usually part of a larger circuit (not shown for simplicity). Sizing the circuit in Figure 1.4 means that the designer must find suitable valuesfor

thebiascurrentID; thedevicewidthW; thechannellengthL

For this introduction, we will assume that through some design process, we determined that the differential pair should implement a certain transconductance (gm). How does this requirement translate into values for ID, W and L? We will initially approach this question using simple square-law expressions and then refine our treatment to arrive at the proposed methodology

Figure1.4Differentialpair.

1.2.1Square-LawPerspective

Ideally, we would like to have an equation that relates all relevant parameters of the above example with one another. The square-law model used in standard textbooks provides such anexpression[1]:

Even though this formula is inaccurate for modern devices, it clarifies a basic, and generally important, point: there are an infinite number of choices for W,L and ID that all lead to the designgoalofrealizingacertainvalueofgm.Tocontinue,weneedafeelforthetradeoffthat wearemakingbypickingoneofthesemanysolutions

To make progress, let us articulate what we would ideally like to achieve: We want to meet the design goal using the lowest possible current and the smallest possible transistor size.Inabsenceofanyotherconstraints(tobeconsideredinlaterchapters),thisimmediately impliesthatweshouldusethesmallestavailablechannellengthL(forexample,Lmin =60nm forthetechnologyusedinthisbook)

Theremainingquestioniswhetherweshouldminimizethecurrentorthedevicewidth

Note that achieving both simultaneously is not possible, since the product W×ID is fixed. To think about this tradeoff systematically, we introduce two figures of merit that relate the designobjective(gm)tothevariablesthatwewanttominimize:

Using the standard textbook square-law expressions [1], we can write these figures of merit as:

Here, is the quiescent point gate overdrive voltage of the transistor. Physically, large VOV means that the channel is more strongly inverted, ie more inversion chargeispresentunderneaththegate

The key observation from the above equations is that the gate overdrive controls how efficiently we employ current (ID) or device width (W) to generate the desired

transconductance. The designer can pick a large VOV to arrive at a small device width or a small VOV to minimize the current Thus, the gate overdrive voltage can be viewed as a “knob” (see Figure 15) that fully defines the sizing tradeoff Also, note that once VOV has been chosen, the required device current (for a given gm) follows directly from (1.3); no technology-specificparametersareneeded(assumingthesquarelawholds).

Figure1.5ThegateoverdrivevoltageVOV isa“knob”thatletsuscontrolthetradeoff betweengm/ID andgm/W.

In addition, the choice of VOV sets the minimum VDS for which the transistor remains saturated (VDsat = VOV for a square-law device) and it also determines the circuit’s linearity [23]. It is therefore not surprising that the gate overdrive is among the most important parametersusedinsquare-lawcentriccircuitoptimization.Forexample,theseminalworkby Shaeffer and Lee [24] studied the relationship between the gate overdrive voltage and the bandwidth,noiseandlinearityofalow-noiseamplifier(LNA).Itwasfoundthatthetradeoff betweentheseperformancemetricsisfixedonceacertainVOV ischosen.

Unfortunately,andasalreadydiscussedinSection1.1,thesquare-lawmodelhasbecome obsolete for design with modern MOS transistors. To see this, consider Figure 1.6, which plots the figures of merit of (12) for a minimum-length n-channel device in 65-nm CMOS For reasons discussed in Chapter 2, the square-law expressions fit reasonably well only for a narrow range of gate overdrives in strong inversion (say VOV = 0.2…0.4 V). Thus, (1.3) and (1.4) do not accurately link VOV with gm/ID and gm/W and the expressions are consequently unsuitablefordesigninthegiven65-nmtechnology.

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money long since due.’ This was in 1658, but in March of the following year they wrote bitterly to the Council that, while such large debts were contracted and they were struggling with difficulties, it made them ‘exceeding unhappy’ to see that even their assignments on the customs were not handed over to them in full.[1482] In May 1659, among other items, £330,000 was owing for seamen’s and £43,000 for dockyard wages, and the £735 a week paid by the Navy Treasurer to the Savoy and Ely House hospitals was six months over-due.[1483] In September the army commissioners were directed to hand over £60,000 for naval purposes, although the soldiers’ pay was months in arrear When the Commonwealth accounts close on 7th July 1660 the debt was £1,056,000.[1484] For this large sum every year from 1640 furnished its quota, thus detailed:—1640-9, £10,200; 1650, £71,000; 1651, £25,000;1652, £16,000; 1653, £11,000; 1654, £5000; 1655, £50,000; 1656, £229,000; 1657, £218,000; 1660, £421,000. That the earlier amounts were not merely book debts carried forward for want of claimants is shown by the existence of a petition, of April 1658, begging for the settlement of a bill for freight incurred between 1643 and 1651.[1485] These liabilities, belonging to only one branch of the public service, help to explain why many classes of society, not actively royalist, may have welcomed a restorationwhichpromisedasettlementof debtsand a morestable financialsystem.

When the St George’s cross was made the national flag in February 1648-9, it was also ordered that an escutcheon should be carried on the stern of each man-of-war, containing a red cross in one compartment and a harp in another In 1653 the three Generals at sea used, besides their standards, a pendant of red, white, or blue, at the main, and their vice- and rear-admirals their respective colours at the fore and mizen. From 18th May 1658 the standard of the General of the fleet was to bear the arms of England, Scotland, and Ireland, ‘with his Highnes’ escutcheon of pretence according to the great seal of England.’ The jack flag for admirals was to consist of the arms of England and Scotland united, ‘according to the ancient form,’ with the harp added, ‘accordingtoamodelnowshown.’[1486] All saluting, whether from ships or forts, was strictly forbidden in 1652, except in honour of ambassadors; but the salute to the flag from foreigners was firmly upheld under all circumstances. By the treaty of 5th April 1654, the Dutch formally acknowledged the English right to the salute in the ‘British seas.’ In 1657 Opdam, with thirty Dutch sail, passing Dover struck his flag and saluted the castle; shortly afterwards he met the Dragon and the Colchester, whose captains ordered him again to strike. He refused, saying that he was not expected to pay this mark of respect to every ship he met, whereupon they replied that if he did not they would engage him till they sank alongside. Then ‘he struck in a great rage,’ and kept his flag down till out of sight of the Englishmen. Man-of-war captains sometimes displayed the same feeling of pride in their position at the expense of English ships. In 1654 a Virginiaman was run down and sunk in the Channel by the Ruby In the subsequent inquiry the master of the merchantman held that the Ruby should have gone astern of his vessel, to which her captain retorted by asking, ‘How many men-of-war have you known go under a merchantman’sstern?’

The prices of naval stores varied greatly, according to the confidence felt in the treasury and conditions of peace or war; the following are the rates for someoftheprincipalarticles:—

IO 1650,£20a ton 1653,£26 ”

C

Noyals,1652,£15to£17a bale[1487]

Noyals,1654,£19, 7sabale

Vitery,1654,1s ayard

Vitery,1655,1s 4dan ell Ipswich, 1654,£1,12sa bolt Ipswich, 1655,£1,7s9d abolt

H

1653,£32a ton(English) 1655,£38, 10saton(Riga) 1657,£44a ton(Riga)

Flags andTheSalute. Prices.

1658,£46a ton(Riga)

1658,£33a ton(English) 1658,£38a ton(Russia)

A 1656,£34a ton

” £37 ”

P

1650,£3,16sabarrel

1652,£4 ”

1653,£4,10s ”

P

1653,£2,18saload

1655,£3,7s ”

1657,£3,5s ” (oak) 1659,£3,15s ” ”

SA

Snaphaunces, 1658,11s6deach

Matchlocks,1658,10s6deach

Carbines, 1658,11seach

Pistols,1658, 14sapair

BR 1655,£10, 10saton 1657,£10a ton(Mar.)

1657,£9,5s ” (Aug.)

CT 1656,£2,5saload

1658,£3 ”

C

1649,£30a ton

1656,£44 ” 1657,£48 ” 1658,£44 ”

S

1652,£11, 10sa ton 1653,£14a ton

T

1654,£1,15sabarrel

1655,£10, 12salast 1656,£12a last 1657,£12, 10salast 1658,£13a last

P

1654,£1,16sabarrel 1655,£15, 5salast

B

1654,£1,15satun 1659,£2,5s ”

S[1488] D 1656,12s6d each 1659,14s ”

OD 1657,£4,3sper 100of six score

W O 1659,£26, 15saton

ET 1658,£2,3sper cwt.

LV for blocks 1656,£6,15saton

Examples of that incongruity of expression usually associated with Puritan fervour are not frequent among the Navy papers, but they do occasionally occur On one occasion Lawson writes, ‘All that look towards Zion should hold Christian communion—we have all the guns aboard.’ Major Robert Sedgwick, starting for the West Indies, asks the Navy Commissioners, after official details, for ‘your prayers that we may be sent out with a blessing and be a blessing where we go.’ Major Sedgwick’s duties were to kill Spaniards, plunder their property, and annex their territory These men were too grimly earnest in the work they set their hands to do to trouble themselves about fine phrases. They lacked humour, and the court of Charles II was, we are taught, very witty; but when, in 1667, the roar of foreign guns was, for the only time in English history, heard in London, even that majority which always loves a royal jest must havebeguntoappreciatethedistinctionunderlyingStewartwit and Puritan dulness.

APPENDIX A

CHAPTER HOUSE BOOK V. XIII

Here ensuyth An Inventorie or boke of All such Stuff, tacle, apparell, Ordynaunce, Artillarie and habillamentes for the warre as Remayned in our soveraigne lord the kynges shippes the xxvij day of July the vjᵗʰ yere[1489] of his reign, By a vewe taken by Sir Henry Wyat, Sir Andrewe Wyndsore, knightes, George Dalyson, and Thomas Tamworth, commissioners in that behalf appoynted, Whuch Stuff, tacle, apparell, Ordynaunce, Artillaries, and habillamentes for the warre Was delyvered into the charge and kepyng of severall persons hereaftyr particlerly named to our seid soveraigne lord the kynges use by Indentures thereof made and also billes signed with the handes of the seid commissioners in the custodie of the seid persones remaynyng, That is to Sey

The kynges Shippe called the Henry Grace de Dewe:—Stuff, Tacle, and apparell of the seid shippe delyvered by the seid Commissioners into the charge of John Hopton by Indenture, that is to sey

ffyrst the foremast of the seid shippe j Shrowdes to the same xvj

Dedemens hyes[1490] to the same xvj

Tacles to the foremast iiij

Doble polles[1491] with Shyvers[1492] of Brasse iiij

Single polles with Shyvers of Brasse iij

Single polles with a colk[1493] of Brasse j

Swyfters to the foremast vj Doble polles with colkes of Brasse iij polles whuth Shyvers of wode iij polles with v colkes of Brasse and oone of wode vj

Garnettes to the foremast with iiij poles[1494] ij

Garnet with ij polles and shyvers of Brasse j

Garnet with a shever of Brasse and another of tymbre j

Trusses to the foremast ij

Drynges[1495] to the same j

Doble polles for the trusses with colkes of brasse ij

Single poles of tymbre ij

Drynges with a doble pole with a colk of brasse and oone single pole of wode j halyers to the foremast ij

Shyvers of Brasse to the brest[1496] of the forecastell iij

Ramehedes with ij shevers of Brasse j

Shetes to the foresayle ij

pollies with shevers of Brasse to the same ij lyftes to the foresayle ij

Doble polies with shyvers of Brasse to the same ij

Single polies with colkes of Brasse ij

Shetes to the toppe Sayle ij

Single polies with woden pynnes to the same ij

Tackes to the foresayle ij

Stodynges[1497] to the foreyerd ij pollies to the same with woden pynnes ij cranelynnes to the foremast j

Single poles with shyver of Brasse j

Bowelynnes to the foreyerd with the poleis and dedemanes hies and oone doble pole with a shever of brasse j

Stayes to the foreyerd with iiij dedemens heies ij

Sprete sayle yerdes ij halyers to the same ij

Single poleis with shyvers of Brasse to the same ij lyftes to the Sprete Sayle with iij single polies and woden pynnes j

Grapilles[1498] with the cheyne hangyng apon the bowspret with a pole havyng a colk of brasse j

knyghtes[1499] longyng to the lyftes of the foresayle with ij shevers of brasse ij

The fore topmast j

Shrowdes to the same xij

halyers with a doble polie and a colk of brasse ij single poleis with woden pynnes ij

Bowlynes to the foretop Sayle yerd with pawes[1500] and dedemens hyes to the same ij

Brasses[1501] for the foretop sayle yerd ij Single poles with pynnes of wode ij

lyftes to the foretopsayle yerd with iiij poleis with wooden pynnes ij

Shetes to the foretopsayle with ij woden poles ij

Steyes to the foretopmast j

Sayle yerdes to the foretop j

Toppe Galant apon the foretopmast j mastes to the same j

Shrowdes to the same viij

halyers with ij single poles with woden pynnes ij

Brasses to the same with ij single poleis and wodepynnes and dedemens hyes to the same ij

Bowlynes to the topgalant yerd the power and dedemens hies to the same ij lyftes to the foretopgalant yerd with iiij single polies with woden pynnes ij

Shetes with ij single poles with woden pynnes ij

Stayes to the foretopgalant mast j

Shevers of Brasse for the cattes in the forecastell iiij

Davettes[1502] with iiij shevers of Brasse ij

Smale davettes with oone shever of Brasse j

The mayne mast[1503] j

Shrowdes with cheynes of yron and dedemenes hies to the same xl

Bote tacles of sterebord syde with iiij doble poles and viii single poleis with xvj shyvers of Brasse[1504] iiij

Swifters on the same syde with vij doble poleis and vii single polees with colkes of Brasse and ij poles of tymbes[1505] pynnes viij

Garnettes with ij single poles with shivers of Brasse j

Garnettes with ij single polies with colkes of Brasse j

Garnettes with oone single pole with a shever of Brasse and an other pole with a colk of Brasse j

Stodynges with a single polie with a Shever of Brasse j

Bote tacles oon ladbord syde with iiij doble polies and viij single polies with xvj Shevers of Brasse iiij

Bretayn tacles[1506] with ij single polies and Shevers of Brasse to the same j

Swyfters with vij doble polies with colkes of Brasse and viij single poles with colkes of Brasse viij

Garnettes whereof oone with ij single polies and ij shevers of Brasse an other with ij single poleis with ij colkes of Brasse and an other with a shever of Brasse iij

Stodynges with a shever of Brasse j

tymber polies for the Shuts[1507] ij

The mayne yerde with the mayne parell j

Single poleis with a shever of Brasse to wynde up the mayne parell j

Trusses with iiij doble polleis and iiij single polies with xij shevers of Brasse iij

Drynges with ij doble polies and iiij shevers of Brasse ij

Single poleis of tymbre to the same ij

Tyes j payer

Whele Ropes[1508] j

Geers with vj single poleis whereof iiij with shevers of Brasse and ij of tymbre iij

knyghtes belonging to the same with iij Shevers of Brasse iij

Single poles for the topsayle iiij

Shutes with iiij shevers of Brasse ij

knyghtes with ij shevers of Brasse ij

The mayne yerd j

lyftes with ij doble poleis and ij single with vj

Shevers of Brasse to the same ij

Knyghtes with ij Shevers of Brasse ij

Shutes ij

Tackes ij

bowlynes with Brydelles and Dedemens hies ij

poleis to the mayne Bowlyne with ij Shevers of Brasse j

mayne Stayes with viij dedemens hies iiij

Brasses with ij single poles and colkes of Brasse ij

The mayne top j

The mayne top mast and a coler of yron j

Shrowdes to the same with dedemens hies xiiij

The mayne top Sayle yerd j

Tyes j

halyers with a doble and a single polie with ij shevers of Brasse j

Brases with iiij poles ij

lyftes with iiij polies and colkes of Brasse ij

Cranelynnes with a single pole and a colk of Brasse j

Steyes to the mayne top mast j

bowlynes with dedemens hies ij

The top Galant apon the mayne topmast j mastes for the same j

Rynges of yron for the same j

Shrowdes to the same with dedemens hies x

Sayle yerdes to the same j

Stayes to the same j

Bowlynes ij

Brases with ij poles to the same ij

Shutes ij

Grabulles with cheynes to the same ij

poleys apon the mayne yerd for the grabulles ij

Spare knyghtes standyng by the mast with ij shevers of Brasse ij

The mayne meson mast j

Shrowdes with xj doble poles and xj single poles, a doble and single polee with colkes of Brasse xij

Swyftyers with vj doble poles and vj single poles with colkes of Brasse vj

Tacles with ij doble poles of tymbre ij

Single poles oone of tymbre the other with a colk of Brasse ij

Steyes j

Shutes j

Single poles oon of tre[1509] the other with a colke of Brasse for the same Shutes ij

cranelynes with a single polie and a colk of Brasse j

Brases with ij single poles ij

Teyes[1510] ij

halyers ij

The Rame hede j

knyghtes with iij Shevers of Brasse j

The yerd to the meson Sayle j

lyftes with iij poles and dedemens hies j

Trusses with a double and a single polie with colkes of Brasse j

Toppe j

Topmast to the same j

Rynges of yron j

Shrowdes with dedemens hies x

The Sayle yerd j

Tyes j poles to the same ij

lyftes with iij poles and dedemens hies j

The top Galant of the mayne meson j

The mast to the same j

Shrowdes to the same vj

lyftes with iij poleis and dedemens hies j

The Sayle yerd j

Tyes to the same j halyers j

The boneaventure mast j

Shrowdes with x Doble poles and x syngle poleis x

Sayle yerdes j

Tyes j halyers with a doble pole ij knyghtes with iiij Shevers of Brasse j

Shutes with ij poleis to the same j

The boneaventure top j mastes to the same j

Sayle yerdes j

Shrowdes viij

Steyes j

In the storehouse of the Shipp viij single pendaunt polies with shevers of Brasse viij

Smale single garnet poleis with shevers of Brasse j

Doble lyft poleis with shevers of Brasse iiij

Doble poleanker[1511] poleis with shevers of Brasse iiii

Snach polleis with gret Shevers of Brasse iiij

Single poleis with Shevers of Wode xiiij

Doble poleis with Shevers of Wode ij

Doble poleis with a colk of Brasse j

Single poleis with a colk of Brasse j pottes called piche pottes j ketilles to melt in pyche j boyes for ankers x boy Ropes x

Shevers of Brasse without poleis iij leddern[1512] bokettes xij dossen love[1513] hokes iiij lynch[1514] hokes iij

Copper ketill not sett in furnes weying by estimacon ccc[1515] j xiij ynch compas j

xvij ynch compas ij

xv ynch compas ij

ix ynch compas j

viij ynch compas j vij

iiij ynch compas iiij

vj ynch compas iij

vj ynch di[1516] compas j

v ynch compas j

viij ynch compas j

iiij ynch compas j

iij ynch compas j

v ynch compas j

iiij ynch compas vij

iij ynch compas j

iij ynch di compas j xxij

Smale lyne ij peces

Bygger lyne for lanyers[1517] ij peces

Brayle Ropes with iij poles to the same j

Grete doble Blockes ether of them ij Shyvers of Brasse ij

Single blokes with ij Shevers of Brasse ij

long Ores for the Grete bote lx

Tarre ij barelles

Ores for the Cocke bote xxiij

Standart Staves[1518] lix

Stremers viij

lytle flagges c

Top Armours vii

Targettes xx dossen large fflagges lx

To the mayne Sayle Acorse[1519] and ij bonettes doble j mayne sayle mayne topsayles j

Topgalant Sayle j

The meson Sayle j

The boneaventure Sayle j

The foresayle Acorse and a bonet doble and bonet single an other corse and iij bonettes single in all ij foresayles

The fore topsayle j

The foretopgalant Sayle j

The Bowspret Seyle j

The mayne Sayle for the gret Bote, a corse and ij bonettes single j sayll

The foreseyle acorse and ij bonettes single j

Top Seyle j

The meson Seyle j

The boneaventure Sayle j

An old corse of a hulk Sayle j

Sterbord bowers ij ladbord bowers ij

Destrelles[1520] of Sterbord ij

Destrelles on ladbord ij

Shot[1521] ankers j

Caggers[1522] j

Spare ankers ix xix

Trene[1523] platters iiij dossen

Trene cuppes v dossen

Tankerdes iij dossen

lantrons[1524] vj grete lantrons j middellantrons ij

Copper ketilles in furnes iij lede in oone pece by estimacon [1525]

Grete belles in the seid Ship of Brasse j

The grete botes mayne mast j

Shrowdes to the same xiiij

polles to the same xxviij

Tacles oone with a doble pole and colkes of Brasse the other with a single pole and a Shever of tymbre ij

Single poles with a shever of Brasse j mayne yerdis and the parell j

Trusses with ij poleis and Shevers of tymbre j

Tyes j

halyers with a doble pole and Shever of Brasse j

Single poleis on of them with a Shever of brasse and other of tymbre ij

Shutes ij

Tackes ij

bowlynes with a pole and Shever of tymbre ij

lyftes with ij Single poleis ij

Topsayle Shotes with ij single poleis ij yerde Ropes ij

The meyne Stey with ij doble poleis j

The toppe j

The topmast j

Shrowdes to the same vj

Sayle yerdes j

Tyes j

parell to the sayle yerd j

Bowlynes ij

lyftes ij

Cranelynes j

Brases ij

The foremast j

Shrowdes to the same vj

The Sayle yerd j

The parell j

Teyes j

Syngle halyers with a polie to the same j

Shetes vj tackes j lyftes with ij poleys ij

Steyes j

bowlynes with a polie j

Single Trusses with a polie j

Bowspretes j mayne meson mast j

Shrowdes to the same vj

The Sayle yerd j the parell to the same j

The Tye j

Single halyers with a pole j

Trusses with ij poles j lyftes with iij poles j

Brases with ij poles ij

Steys with ij Smale poles j

The boneaventure mast j

Shrowdes to the same iiij

Tyes j

Single halyers with oone pole j

The sayle yerd j

The parell to the same j

Ankers for the said bote iij

Cablettes of v ynch compas ij

Cocke bote j mastes to the same j

Sayle yerdes j

Shevers of Brasse ij

Ores to the same xij

bote hokes j

The skyff otherwise called Jolywatt j mastes to the same j

Sayles j

Ores to the same vj

Shevers of Brasse j

Shevers of Brasse called a Wyndyng Shever for the j Rame hede j hawsers of v ynch compas j hawsers of vj ynch di compas di hawser[1526]

hawsers of v ynch compas iij

Cables of ix ynch compas j hawsers of vj ynch compas di hawser

Soundyng ledes vj

Ordynaunce Artillarie and habillamentes for warr delyvered to the charge and custodie of Thomas Spert, master, and William Bonython, purser of the seid shipp by Indenture as aforeseid, that is to sey

Serpentynes of yron with miches[1527] boltes and forelockes cxxij

Chambers to the same ccxliiij

Stone gonnes of yron Apon trotill wheles and all other Apparell iiij

Chambers to the same iiij

Serpentynes of Brasse apon wheles shod with yron iij

Serpentynes of Brasse apon wheles unshodd j

Grete peces of yron of oon makyng and bygnes xij

Chambers to the same xxiiij

Grete yron gonnes of oone sort that come owt of fflaunders with myches bolts and forelockes iiij Chambers to the same viij

Grete Spanysh peces of yron of oone sorte ij

Chambers to the same iiij

Stone gonnes apon Trotill wheles with miches boltes and forelockes to the same xviij Chambers to the same xxxiiij

Smale vice peces of Brasse apon shodd wheles of Symondes makyng j long vice peces of Brasse of the same makyng iij ffawcons of Brasse apon Trotill wheles vj a fayre pece of Brasse of Arragows makyng j A Slyng of yron Apon Trotill wheles j Chambers to the same with other apparell j grete Stone gonnes of yron ij chambers to the same iiij

Grete culverynes of Brasse apon unshodd wheles of Symondes makyng ij

Grete bumberdes of Brasse apon iiij trotill wheles of herberd[1528] makyng j

Grete curtalles of Brasse apon iiij wheles and of the same makyng[1529] j hakebusshes of yron hole clxxxxiij hakbusshes of yron broken vjj

Shott of yron of Dyverse Sortes clx shott

Stone Shott of Dyverse Sortes in the balist of the ship A grete nomber not told

In the Grete Bote of the seid ship Remaynyng fyrst

Serpentynes of yron with myches boltes and forelockes viij

Chambers to the same xxv

Serpentynes of Brasse apon shodd wheles j ffawcons of Brasse apon Shodd wheles ij

In the Storehouse of the shipp

Bowes of Ewe cxxiiij chestes for the same ij hole chestes of Arrowes iij

Billys cxliiij moryspykes lxxx

Backes and Brestes of Almyne Ryvettes of ether cc

Splentes[1530] clxxxxviii payer

Salettes[1531] cc

Standardes of mayle cc

chargyng ladylles for Gonnes with staves vj staves withowt ladelles viij

Spare miches for Gonnes xiiij

Spare boltes ij

Javelyns ix dossen

Dartes lvij dossen

hamers for Gonnes xiiij

Crowes of yron iiij

Stokepykes of yron xiiij

APPENDIX B

THE MUTINY OF THE GOLDEN LION

On the 19th April 1587, Drake with the Bonaventure, Lion, Dreadnought, Rainbow, and Spy, of the Queen’s, and some twenty armed merchantmen attacked Cadiz, with results disastrous to Spain. Borough was vice-admiral and in command of the Lion. The fleet left Cadiz harbour on 21st April, and on the 30th Borough addressed a long and vigorously worded letter to Drake[1532] protesting that the councils of war called were only nominal consultations where the admiral declared his will, or else merely entertained his visitors who departed ‘without any consultacyon or counsell holden.’ Drake’s answer was to supersede him. All we know further is that on 27th May the Lion’s company put their new captain, Marchant, on the Spy, and sailed away for England with Borough who afterwards declared that he was in daily fear of his life, and therefore had no great reason to try and stop their action. If Borough did not incite them to mutiny the men of the Lion must have been for some time full of discontent and ready to desert. The chase of the Bark of Lyme, which took them from under the guns of the rest of the fleet, gave them their opportunity. On 30th May, Drake constituted a court-martial on the Bonaventure, of himself and the other superior officers, at which most of the mutineers were condemned to death in their absence. The account of this inquiry gives a vivid picture of the modes of thought among the men, and their ideas of their rights and duties.

Although time has settled the historical perspective in which we view Drake and Borough, it must be said for the latter that, in 1587, the admiral was only to him, one of half-a-dozen great seamen with whom Borough, and doubtless his contemporaries, thought he could claim equality. He was an experienced commander and one of the four Principal Officers of the Navy; he was, here, second in

command to Drake, and it was contrary to all the traditions of the service that the admiral should undertake any enterprise without the advice and consent of his captains. In this matter Drake was one of the first expedition leaders to strike out a line of his own, and Borough, tenacious of custom and what he considered his rights, at once came into collision with him. It was long before Drake’s principle of accepting sole responsibility was generally followed. In a private note of farewell to Burghley in 1596, and perhaps with this incident in his mind, Howard, when leaving for the Cadiz voyage wrote,

‘I have no meaning to ronne any rash or unadvysed course nor to settell any thyng for Her Maiesties servyce upon my own jugment but to yeald to those that shall show best reson.’[1533]

After their return an inquiry was held at which the vice-admiral was charged with neglect of duty at Cadiz.[1534] No actual result followed, but Borough came off with the honours of war since he was not disgraced, and remained one of the chief Officers of the Navy. Burghley appears to have been on his side, and Borough wrote subsequently an effusive letter thanking him ardently for his support. [1535] From one passage in this letter in which he says that he had hoped that after the inquiry his innocence would be proclaimed, but that ‘I have suppressed my greefe in respect of the comandment and charge given me,’ it may be inferred that the finding was actually favourable to Borough but not made public, perhaps from a desire not to offend Drake. One other point is worth noticing: if the crew of the Lion voiced the general feeling among English seamen, Drake was certainly not loved by them.

ADD. MSS., 12,505, f., 241.[1536]

A generall courte holden for the service of her Maᵗⁱᵉ abourde the Elizabeth Bonaventure the xxxth day of Maye before Sir Ffrauncis Drake, knighte, generall of Her Maᵗⁱᵉˢ

fleete; Thomas Fennard, Vice-Admirall; Anthony Plotte, Leivetenant-generall; John Marchant, serjant-major, and the reste of the captaines and masters of the fleete as followeth,

The generall, att this courte, called in question and judiciallye demaunded of Captayne Merchaunt howe he colde discharge himselfe to answere the departure of Her Maᵗⁱᵉˢ shippe the Golden Lyon which he latelye gave him in charge?

Captayne Marchaunt protestinge, with all earnest affeccon, his innocencye alledged and declared,—That there was a great Mutynie growen amonge the Company of the Lyon the 27 of this month; as sone as we had given over the chase undertaken, understandinge that she was the Barke of Lyme, [1537] when I requyred the Master that we mighte lye close by the wynde to recover our generall, the Master answered, ‘Well, Captaine, we will.’ But presentely one of the quartermasters came and delivered me a lettere in the behalfe of the whole company as followeth:—

‘Captayne Marchaunt, Captayne of the Golden Lyon appoynted by Sir Ffrauncis Drake, generall of this fleete,— Wee, the Quenes, and yours at this tyme desyre that, as you are a man and beare the name of a captayne over us, so to weighe of us like men, and lett us not be spoyled for wante of foode, for our allowaunce is so smale we are not able to lyve any longer of it; for when as three or foure were wonte to take a charge in hande, nowe tenne at the leaste, by reason of our weake victuallinge and filthie drinck, is scarce able to discharge it, and yet growe rather weaker and weaker; which suerly if it be not loked into, will growe to greate dishonour on your parte, and to a lastinge shame on our sydes, by reason of the moste worthie and the moste honorable challendge of our generall at Caste Calleys[1538] in daringe the kinges deputie, or the kinge himselfe if he were in place, or the proudest champyon he had to come fourthe and chaunge a Bullett with him; but none durste once adventure to come

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