MEPTEC Report Fall 2022

A Quarterly Publication of The Microelectronics Packaging & Test Engineering Council

Volume 26, Number 3

The MEMS Industry Commercialization Report Card page 16

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Challenges for Achieving Automotive Grade 1/0 Reliability in FCBGA and fcCSP Packages page 12

INSIDE THIS ISSUE

4

CALL TO ACTION America cannot afford to lose control of her superiority in FPGA devices. The time for action is now.

7

SAYING GOODBYE After 25+ years, Bette Cooper will be leaving the ownership and operation of MEPTEC.

8

TRIBUTE RETROSPECTIVE The sensor community mourns the loss of one of its most favorite sons, Janusz Bryzek Ph.D., at the age of 74.

21

CATCHING UP WITH Abram Detofsky, Principal Engineer at Intel, joined the MEPTEC Advisory Board in 2020.

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MEPTECReport

UP FRONT The MEPTEC Report is a Publication of the Microelectronics Packaging & Test Engineering Council PO Box 1053, Los Altos, CA 94023 +1 (415) 287-3276 Email: rosina@meptec.org Publisher MEPTEC Editor Ira Feldman Art Director/Designer Gary Brown Sales Manager Gina Edwards

MEPTEC Executive Director Ira Feldman

MEPTEC Advisory Board Board Members Dave Armstrong Advantest Ivor Barber AMD Zoë Conroy Cisco Jeff Demmin Keysight Technologies Abram Detofsky Intel Neal Edwards AMD Jaspreet Gandhi Meta Roger Grace Roger Grace Associates Ravi Mahajan Intel Emeritus Advisors Seth Alavi Sunsil Anna Gualtieri Elle Technology Phil Marcoux PPM Associates Mary Olsson Herb Reiter eda 2 asic Consulting, Inc., Retired In Memoriam Joel Camarda Ron Jones

Contributors Better Cooper MEPCOM LLC Ira Feldman Feldman Engineering Corp.

Roger H. Grace Roger Grace Associates Martin Hart TopLine Corporation Mike Kelly Amkor Technology, Inc. JoonDong Kim Amkor Technology, Inc. Knowlton Olmstead Amkor Technology, Inc. Kurt Raab Amkor Technology, Inc.

MEPTEC Report Vol. 26, No. 3. Published quarterly by MEPTEC, PO Box 1053, Los Altos, CA 94023. Copyright 2022

by MEPTEC. All rights reserved. Materials may not be reproduced in whole or in part without written permission.

MEPTEC Report is sent without charge to members of MEPTEC. For non-members, yearly subscriptions are available for $75 in the United States, $80US in Canada and Mexico, and $95US elsewhere. For advertising rates and information contact Gina Edwards at 408-858-5493.

Farewell 2022 Ira Feldman Executive Director, MEPTEC

This year “zoomed” by in both the virtual and physical worlds for me. Several industry events remained virtual while others returned to in-person. Many organizations, including MEPTEC, continued or even added to their webinar programs. And those “work-from-home” days – be they just one- or two-a-week or full-time? Many organizations have booked their days solid with web conferencing. Add in some domestic and international travel for me, and perhaps yourself, made for a very busy year.

Looking back on this year, we continued the Road to Chiplets series with virtual events on Heterogeneous Integration Testability and Design Integration in March and May respectively. And in September we held the first “KGx” event. Even though true Known Good Die (KGD) remains elusive, today’s advanced packaging requires thinking beyond the die. We explored the need for and how to achieve Known Good Stacks, Chiplets, Modules, Packages, Subsystems, and Systems that is essential to achieve the highest possible end-product quality. If you missed any of these great events, you will find all the slides and videos on the events.meptec.org website.

Our next quarterly event will be Not Just Chips to be held on February 7 and 8, 2023. At this new virtual event, we will be taking a closer look at the design, packaging, and testing of devices that include more than traditional silicon dies. Then in the second quarter we will have the next installment in the Road to Chiplets series as an in-person event in Silicon Valley. Stayed tuned for more details about these exciting upcoming events.

As we bid farewell 2022, it is important to say goodbye and thank you to Bette Cooper who was deftly led and operated MEPTEC for over two decades.

I’ve enjoyed scores of events she has produced, and it has been a great pleasure working with her on MEPTEC and other projects. It is an honor to step into her shoes. I wish her well on her new adventures!

Lastly, a little end of the year business. MEPTEC is a member and corporate sponsor supported organization. If you have not already joined or renewed for the year, please do so now. And if your company is interested in sponsoring our programs, please let us know as corporate sponsorships allow us to provide the virtual events free of charge. For assistance with membership or sponsorships please contact Rosina Haberl (rosina@meptec.org).

I look forward to hearing your suggestions and feedback as to how MEPTEC can best serve you. Please don’t be shy!

Stay safe and healthy!

Ira Feldman Executive Director, MEPTEC ira@meptec.org +1 650-472-1192

FALL 2022 MEPTEC REPORT | 3

CALL TO ACTION

FPGA Makers Shrug off Action Martin Hart TopLine Corporation

PAINSTAKING INVESTIGATION typically follows the aftermath of major calamities, such as the collapse of a bridge or after a train wreck.

During discovery, it often becomes apparent that a number of people suspected that something was amiss.

A progression of warnings usually precedes the catastrophe.

In hindsight, a subject matter expert, whistle blower or leader within the knowledge base may have raised a red flag providing compelling evidence, or even presenting a paper to peers on the potential problem.

Whether through apathy, conflicting priorities or simply a lack of funding, action is not taken to correct a systemic problem, which ultimately results in a failure that affects government or society.

FPGA Makers Fail to Move the Needle During the past 3 years, 15 articles have been published by six different industry publications citing a potentially risky issue that involves defense grade Field Programmable Gate Array (FPGA) and Application Specific (ASIC) devices.

90% of companies involved in the manufacture of FPGA and ASIC devices all rely on a tiny sole-source subcontractor to attach solder columns as the last step in the manufacturing process to attach solder columns to chip packages.

A couple of proactive FPGA makers understand the danger of depending on a single-source supplier and have moved forward with qualifying a second source for solder columns.

However, most FPGA makers have not taken action to broaden their reliance on the current supply chain choke point to perform column attachment services.

Supply Chain Sustainability at Risk Defense-grade FPGA and ASIC devices with solder column interconnects 4 | MEPTEC REPORT

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are required to keep warfighters flying and rockets launching.

A halt in the production of defensegrade FPGA devices due to the demise of the current monopoly subcontractor will result in an unexpected pause or interruption in the Defense Industrial Base.

This is a potentially dangerous situation.

The defense establishment needs to be more involved in efforts to encourage the industrial base to expand their reliance beyond the single source subcontractor, one who provides 90% of America’s solder column attachment services.

The defense establishment would be incapable of providing black box systems to downstream customers due to the lack of FPGA and ASIC devices with solder columns.

A stoppage of production, caused by the demise of the single-source column attachment vendor, could trigger a catastrophic chain reaction in the US defense establishment and could adversely affect our allies who rely on a continuous source of defense-grade FPGA and ASIC devices.

This calamity could commence without a single shot being fired.

Market Ripple Effect Defense-grade FPGA and ASIC devices with solder column interconnects are critically important in a tiny market consisting of less than 100,000 devices per year.

However, the lack of these components would initiate a ripple that quickly grows into a tsunami affecting the multibillion dollar defense market.

To support the industry, the Department of Defense (DoD) can mitigate the risk by offering incentives to encourage the private sector to qualify alternative sources of solder columns.

The defense establishment needs to be more involved in efforts to encourage the industrial base to expand their reliance beyond the single source subcontractor, one who provides 90% of America’s solder column attachment services.

A Plan “B” safety-net is needed to protect the defense industry in the event of a loss of a key and critical supplier.

Even under the best circumstances, it will take 3 years to build up capability within the supply chain for qualification and certification of alternative manufacturers of solder columns.

Conclusion Production of defense-grade FPGA and ASIC devices with solder columns resides in a fragile market and ignoring the problem will not solve this issue.

America needs to broaden its supply base to include multiple suppliers who are capable of making and attaching solder columns for aerospace and defense grade FPGA components.

The clock is ticking.

The Space and Defense Industrial Base cannot afford to be unprepared.

America cannot afford to lose control of her superiority in these devices.

The time for action is now. ◆

meptec.org

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MEMBER NEWS

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Featuring a thixotropic paste consistency, this compound adheres well to a variety of substrates such as metals, composites, glass, ceramics, and many plastics. It is formulated for bonding, sealing and small encapsulating applications.

EP5TC-80 is electrically insulating, with a volume resistivity greater than 1014 ohm-cm. It features a low thermal resistance of 6-10 x 10-6 K•m2/W and can be

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EP5TC-80 exhibits good dimensional stability with a low shrinkage upon cure, a Shore D hardness of 90-100,

and an elongation of 0.5 to 1.5%. It is serviceable over the temperature range of -50°C to +150°C and has a glass transition temperature of 110-115°C. Packaging is available in 3 cc, 5 cc, 10 cc and 30 cc syringes and ships in dry ice.

For more information visit www.masterbond.com. ◆

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ASE TECHNOLOGY HOLDING ACHIEVES THE BEST OVERALL PERFORMANCE ON THE DOW JONES SUSTAINABILITY INDICES ASE TECHNOLOGY HOLDING CO., LTD. has announced that it has been included in the 2022 Dow Jones Sustainability Indices (DJSI) World and Emerging Markets. The DJSI are float-adjusted market capitalization weighted indices that measure the performance of companies selected using environmental, social and governance (ESG) criteria. ASE has also emerged as the only global enterprise to have successfully achieved the best overall performance on the DJSI – Semiconductors and Semiconductor Equipment Industry Group for seven consecutive years. www.aseglobal.com

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ASE Breaks Ground on New Chip Assembly and Testing Facility in Penang, Malaysia

ADVANCED SEMICONDUCTOR ENGINEERING, INC. hosted a groundbreaking ceremony on November 10th for the construction of a new semiconductor assembly and testing facility in Penang, Malaysia. The new facility at ASE Malaysia (ASEM) will comprise 2 buildings (Plants 4 and 5) with a built-up area of 982,000 square feet, located in the Bayan Lepas Free Industrial Zone. ASEM will be investing USD300 million over a period of 5 years to expand its production floor space, procure advanced equipment, and train and develop more meptec.org

engineering talent. The new facility announced November 10th is scheduled to be completed in 2025 and will create 2,700 additional job opportunities for the local market. Together with Plants 4 and 5, ASEM will have a total of 2 million square feet of floor space, representing a two-fold increase from the current floor space.

ASEM will also be actively recruiting in the new year and beyond to strengthen its manpower base and contribute to the growth of semiconductor talent in Penang. For more information visit www.aseglobal.com. ◆

NORDSON REPORTS STRONG FOURTH QUARTER AND RECORD FISCAL YEAR

NORDSON CORPORATION has reported results for the fiscal fourth quarter ended October 31, 2022. Sales were $684 million, a 14% increase compared to the prior year’s fourth quarter sales of $599 million. The increase in fourth quarter 2022 sales included 18% organic volume growth, a favorable 4% acquisition impact and unfavorable currency translation of 8%.

Organic sales growth was strong in virtually all end markets, and particularly robust for electronics and medical. Operating profit in the quarter was $178 million, or 26% of sales, a 17% increase compared to the prior year operating profit of $151 million. www.nordson.com

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FALL 2022 MEPTEC REPORT | 5

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MEMBER NEWS

Henkel Non-conductive Die Attach Film Offers Broad Wirebond Package Flexibility for High-reliability Applications

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INTEGRA ADDS INDUSTRY LEADER TO MANAGEMENT TEAM

INTEGRA TECHNOLOGIES is pleased to announce the hiring of Theodore (Ted) Tessier into the role of Chief Technical Officer – Advanced Packaging Technologies. Ted is a recognized industry technologist and executive level manager in Wafer Level Packaging, advanced package assembly and international OSAT management. He has led global engineering teams while at Motorola Semiconductors, MST-Biotronik, Amkor Technologies, Stats ChipPAC (now JCET), FlipChip International and Tian Shui Huatian Technology over more than 25 years in the industry. www.integra-tech.com

 NXP ANNOUNCES

COLLABORATION WITH DELTA ELECTRONICS TO DEVELOP NEXTGENERATION VEHICLE PLATFORMS

NXP SEMICONDUCTORS announced that it has signed a memorandum of understanding with Delta Electronics, Inc. to jointly develop traction inverter and power conversion platforms for next-generation electric vehicles. Delta will leverage NXP’s portfolio of automotive technologies and its longstanding expertise in functional safety and security to enable architectural innovation and platforms for vehicle electrification. NXP and Delta have also unveiled a joint laboratory focused on accelerating electrification offerings and the development of realtime applications based on NXP’s S32Z and S32E realtime processors. www.nxp.com

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6 | MEPTEC REPORT

HENKEL HAS ANNOUNCED THE COMMERCIALIZATION of a high-performance non-conductive die attach film (ncDAF) engineered to address the demands of contemporary packaging device designs. Loctite Ablestik ATB 125GR is a high-reliability ncDAF suitable for wirebond laminate and lead frame packages, compatible with small- to medium-sized die, and formulated to provide excellent workability and processability.

As 3D packaging miniaturization accelerates across the microelectronics market, smaller, thinner, high-density package structures are the norm. For these reasons, many packaging specialists opt for die attach film materials instead of pastes to enable more challenging dimensions. Compared to pastes, die attach films offer controlled thickness and flow, no resin bleed, consistent fillet formation and bond line stability before and after cure. Loctite Ablestik ATB

125GR provides these proven advantages in addition to high-reliability, Automotive Grade 0 performance for both laminate and lead frame designs, making it a good candidate for demanding applications across consumer, automotive and industrial. “Developing a material that is ubiquitous across varied types of metal lead frames and laminate substrates, with optimized bonding and curing performance for die sizes ranging from 0.5 mm x 0.5 mm to 3.0 mm x 3.0 mm is challenging,” said Henkel’s Ramachandran Trichur, Global Market Segment Head for Semiconductor Packaging Materials. “Loctite Ablestik ATB 125GR has bridged this gap, allowing supply chain simplification, while also delivering exceptional reliability with its ability to pass a demanding 1,000 cycles of thermal testing (-60°C to 150°C).”

For more information, visit www.henkeladhesives.com/electronics. ◆

NXP Foundation Commits $250,000 to Advance Engineering Education at Austin Community College District

The NXP Foundation, the nonprofit organization associated with NXP Semiconductors, has announced a $250,000 donation to the Austin Community College District (ACC) Foundation

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in support of the school’s Engineering Technology and Advanced Manufacturing Program. Representatives from the NXP Foundation presented a check to the ACC Board of Trustees at a reception on

Tuesday, November 29, 2022.

The donation, which includes scholarship funds and will also enable the creation of the NXP Advanced Manufacturing Lab, demonstrates NXP’s ongoing commitment to promote and improve science, technology, engineering and math (STEM) education in the local Austin community.

The NXP Advanced Manufacturing Lab will be co-located with the ACC High School Advanced Manufacturing IMPACT Academy at ACC Highland, where students can work toward college credits while they are still in high school. For more information, visit www.nxp.com. ◆ meptec.org

REFLECTIONS

Saying Goodbye Bette Cooper, President MEPTEC

AFTER 25+ YEARS, I will be leaving the ownership and operation of MEPTEC. In the early 90’s I started working as a contractor for a small “back-end” semiconductor organization called MEPPE (Microelectronics Packaging and Processing Engineers) Association. I oversaw events and membership, among many other things.

There have been many changes and transitions over the past decades for me, including moving from working for the people who started MEPPE, to owning and operating what became MEPTEC (Microelectronic Packaging and Test Engineering Council) about 20 years ago.

The most important thing to a nontechnical owner of a technical organization is a strong Advisory Board. I have been incredibly lucky to have had over 20 Advisory Board members over the years, and some are still with us today. Along the way many of our advisors went from being engineers to management positions, and as such they needed to lighten their load in terms of “extracurricular” activities, or sometimes they left for a while but came back. Luckily all of them were very loyal to MEPTEC, and those who left always offered up an employee from their department to fill their shoes. That practice continued over the years, and their legacy carried on to the next generation.

As I move on I’d like to thank my MEPTEC team. Interestingly, there were only three of us running the whole thing.

People often marveled at the professionalism and look of our conferences which rivaled the look of many other much larger events.

First is Gary Brown, our director of operations and basically someone who takes on everything that needs to be done. He is also the person who does all our graphics, including designing and producing this newsletter, the MEPTEC Report. He was also the “AV guy”, the person who ran all the presentations in the meeting rooms. He is the only person who watched every slide, of presentation, at every conference over the meptec.org

years, which numbers somewhere around 845 presentations!

You are currently reading Volume 26, Issue 3 of the MEPTEC Report. The volume number indicates our 26th year. With four issues a year, doing the math that’s 103 issues! The Report has gone through a couple of redesigns, and prior to the first year of the first iteration there were several different formats. The issues have been distributed to tens of thousands of people over the lifetime of the Report, including our members, as well as distributed to hundreds at other conferences, shows and expos.

Gina Edwards is our other very valuable team member. Gina worked for us for 14 years as our Sales Manager, and over the years brought in a great deal of revenue for us by selling many, many ads in the Report, as well as selling exhibits and sponsorships for our many events.

MEPTEC’s very first event in the late 90s focused on “Lead Free – Fantasy or Facts?” Over the years we’ve covered hundreds of topics including optoelectronics, wafer level packaging, thermal management, semiconductor roadmaps, heterogeneous integration, medical electronics, and many more. But our most popular and well attended were our MEMS events which we held for 15 years, from 2002 to 2017.

This brings me to another goodbye which I and many from MEPTEC are saddened by. If you attended a MEMS event over the 15 years you will remember Janusz Bryzek. Janusz was a force of nature. He was primarily responsible for developing the programs and identifying the speakers for these events. That man could pick up his phone and have an entire program of speakers confirmed in two days. Luckily, we kept in touch over the years.

I credit Janusz directly for my own career path and where I am today. In 2010, during the time that we held the MEMS events, Janusz asked if I would be interested in helping to organize the 25th anniversary of NovaSensor, a company which he co

founded which developed low-cost micromachined blood pressure sensors using bulk silicon micromachining technology. It only took us a few months to put together the “party” at Stanford University which drew over 200 people. In the months after that Janusz developed the T-Sensors (Trillion Sensors) movement. Again, he called me and asked if I wanted to help put together a T-Sensors conference. We ended up doing four years of those, drawing 200-250+. A couple of years after those ended, someone who had been involved with the T-Sensors group called and asked me if I wanted to put together a Machine Learning workshop, expecting 40 attendees to be held on the Google campus in Mountain View. In the end we had 160 attendees; in fact smaller offices needed to be reconfigured to accommodate all of us. The organizers of the conference then formed a group, the tinyML Foundation. I am currently the Events and Programs Manager for tinyML, and this will be my last career. I thank Janusz for everything he did for us and me personally.

He will be missed. (See page 8 for more about Janusz).

We also lost to illness a few other Advisory Board members, most recently Joel Camarda (see Summer 2022 issue) and Ron Jones a few years ago (see Winter 2020 issue).

I also thank all of you, our members and supporters, for continuing to support us over the years. And a special thank you to Ira Feldman, Principle Consultant of Feldman Engineering and Managing Director of the tinyML Foundation, and now Executive Director of MEPTEC. If it weren’t for Ira during the long pandemic shut down, I’m not sure if MEPTEC would have survived.

He kept it alive by holding several webinars a year which were attended by thousands of people collectively. I confidently leave MEPTEC in his capable hands.

FALL 2022 MEPTEC REPORT | 7

IN MEMORIAM

Janusz Bryzek Tribute Retrospective Roger H. Grace with Sandeep Akkaraju, Brian Birkumshaw, Joe Mallon, And Kurt Petersen

PROLOGUE The sensor community mourns the loss of one of its most favorite sons…

Janusz Bryzek Ph.D., who passed peacefully at his Oakland Hills, California home at the age of seventy-four on November 10, 2022 surrounded by his loving family. In discussions with Bette Cooper, past MEPTEC Executive Director, and Ira Feldman, MEPTEC Executive Director, who were also good friends and colleagues of Janusz, we concurred that a retrospective article as a tribute to Janusz would be a fitting and proper gesture to honor this great man. As a result of this, I took on the role as editorial coordinator to bring together a group of Janusz’s very closest friends and colleagues to create this article. Contributors were asked to submit their thoughts of their experience and relationship with Janusz…their comments have been reproduced in their entirety and without any editing. I provided additional contributions.

ROGER GRACE My comments, which come from both a business and personal perspective of Janusz, will begin with how we came to connect with each other at Foxboro ICT over four decades ago, and then transitioned into our many years together at NovaSensor and thereafter on many projects including the development of the IEEE 1451 Smart Sensor Interface Standard and the Trillion Sensors Initiative.

It is interesting to note that while our relationship started off as purely a business one, it quickly morphed into one of intense personal friendship between us and then to our families. And to this point, Janusz, and his lovely wife Barbara, asked me to be the godfather of their youngest son Paul.

Soon after his arrival in the US from his native Poland with his wife Barbara and two children, Michael and Agnes, 8 | MEPTEC REPORT

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and with only $600 in his pocket, Janusz joined the engineering team at Foxboro ICT in San Jose, California as a project engineer. Here he led the team to design, develop, and manufacture the industry’s first disposable blood pressure sensor, which application I discovered as the new marketing manager of the company.

Thanks to his laser focus, dedication, perseverance, passion, and creativity, this product went on to become the industry’s first large scale production MEMS (microelectromechanical systems) medical device, with over 30 million currently being sold annually. This product concept was later refined by IC Sensors and meptec.org

Janusz with Roger Grace.

NovaSensor, both startups being formed

by Janusz, and it continues to this day.

In his unbounded and insatiable quest to create bigger and better sensor companies, Janusz collaborated with Kurt Petersen and Joe Mallon to create NovaSensor in 1984 in Silicon Valley. Roger Grace Associates had pleasure of being invited by Janusz to join the team, and we did so as their marketing consultants for over 10 years. Barbara Bryzek also played a significant part in the finance area of this startup. The “true” Janusz came out emphatically at NovaSensor where he helped create a NovaSensor “family”, encouraging and supporting people to achieve their goals with himself as a great example and being a true mentor to many. NovaSensor was a truly successful startup going from obscurity to being a world-renowned MEMS company in a relatively short period of time due to the extraordinary creativity and perseverance of the co-founders Joe Mallon and Kurt Petersen and especially from the drive, perseverance, brilliance, vision, and energy of Janusz.

JOE MALLON I remember Janusz as he lived, vigorous and full of life. His well-known contributions to MEMS sensors arose from a passionate embrace of technology, and from living out his dreams birthed in Poland, and matured in Silicon Valley in meptec.org

an adopted country that he loved.

A MEMS and Sensors proselytizer extraordinaire, he had that special ability to communicate enthusiasm and inspire action. His work helped enormously to grow the technology. Knowing him changed my life, as it did for many.

He was visionary, creative, and always immersed in the moment, giving you his full attention as he called you to join together in creating the Biggest and Best.

He had a generous nature. Each collaboration was win-win, be it a new company, joyous song, elegant house, oil painting, polka dance, technology paper, conference, or patentable invention. Whatever, it didn’t matter.

An encounter with him was not to be taken lightly, and to engage was to ride the wind. Our cofounding of NovaSensor, an early Silicon Valley MEMS startup, was certainly that.

His physical presence ended too soon, but his spirit lives on in the MEMS products that pervade daily life, in his dearly loved family, and especially in the memories of his colleagues and friends.

I miss you dear friend, but you are in my thoughts and in the warm smile that your memory brings so readily to my face.

For sure, rest in peace does not apply. Your spirit only seeks the realm of dynamic growth, and bold, creative adventure.

KURT PETERSEN I feel incredibly fortunate that I have been able to call Janusz a GREAT friend for over 40 years. We met in 1980. Even then, Janusz was a larger-than-life forceof-nature. Janusz always did everything BIG. BIG ideas. BIG endeavors. BIG technology. BIG accomplishments. And, most importantly, a BIG heart. When we were putting NovaSensor together, our attorney and others told us that our business plan, written mostly by Janusz, of course, sounded more like a religion than a business, because Janusz was SOO incredibly passionate about MEMS. But, of course, Janusz was passionate about everything. Importantly, Janusz was also about people. I was always amazed that Janusz knew SOO much about all the employees at his companies – their spouse’s name, their children, birthdays, anniversaries, issues going on in their lives, etc.

We stayed in close touch after NovaSensor. I was always astounded by every one of his new business ventures. They were visionary. They were technically aggressive. They were all awe-inspiring.

Finally, Janusz was an unabashed, happy optimist. His enthusiasm and passion for the world of “Abundance” is a testament to Janusz’s optimistic spirit. Throughout his life, Janusz constantly influenced and added tremendous value and happiness to the lives of many hundreds, if not thousands, of people. We will all miss you, My Friend.

BRIAN BIRKUMSHAW Janusz Bryzek changed my life. I was preparing to take a job abroad in 2005 when Prof. Al Pisano, my Ph.D. supervisor, called me up: “Brian, I’d like you to meet a friend and hear what he has to say.” Within twenty-four hours Janusz had convinced me to meet his crew. Seventytwo hours later I had an offer to join LV Sensors, a start-up creating a TPMS (tire pressure monitoring system). I canceled my flight, accepted the job, and stayed in California. My life took a dramatic turn.

It was just another Wednesday for Janusz.

You see, Janusz was unique among visionaries. His passion was to innovate, and he invited all around him to join. He truly listened to you, fenced with your ideas, and would build upon them. Eventually, with persistence, you would earn Janusz’s hallmark boyish grin as together you settled upon a new breakthrough. He won your support and loyalty through his FALL 2022 MEPTEC REPORT | 9

IN MEMORIAM

Kurt Petersen, Roger Grace, Janusz, and Ashok Sridhar.

unbridled passion and inclusion. Janusz was a titan in the sensors industry and the bedrock of the MEMS community, and I was fortunate to call him a friend.

I continued sharing adventures with Janusz and his loving wife Barbara: from LV Sensors to Jyve to Fairchild and eventually to Exo Imaging today. In the past few years, Janusz and Barbara became more than mentors. They became family to myself, my wife, and our two young boys. My wife moved from Taiwan to the US in 2019 just before COVID. Imagine being new to a country with no friends and trapped inside all day with two children. Janusz and Barbara became the family we did not have in the area. When my 3-year-old son had to be rushed to the ER while I was abroad, my wife turned to Janusz and Barbara to take care of our nine-month old. Janusz was a technologist and an entrepreneur, but above all else he was welcoming.

SANDEEP AKKARAJU Janusz was my business partner for over fifteen years, instrumental in setting the north star for Exo's vision; he embodied generosity, warmth, and kindness to everyone around him.

Janusz was a man of prolific abundance. When we started our second company together, he showed up with over a dozen viable ideas on changing healthcare — we settled on Exo. He had a knack for creating something out of nothing — from creating a new life for his family as an emigree to creating close to a dozen 10 | MEPTEC REPORT

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startups or ideating technologies that have impacted the world.

But even more impressive was his generosity in helping others create something out of nothing. He allowed other entrepreneurs to overcome their fear of failure and instead look at the world through a lens of possibility.

icon of technical entrepreneurship. He was never too busy or too self-important not to provide assistance to people, and especially me. He touched the lives of many with his soft, benevolent smile and his kind demeanor. He was a tiger on the outside and a teddy bear within.

At this point, I would like to share some of the other comments provided to me from several individuals who knew Janusz, plus some of my own: Joyful, playful, larger than life, fortitude, kind, passionate, dogged persistence, of boundless energy, indefatigable, humble, limitless, generous, honest, a consummate entrepreneur, respected worldwide, an industry pioneer, a true visionary, and these qualities were all integral to both his business and personal lives.

Finally, I would like to conclude my comments with a popular quote – “Behind every great man there is an even greater woman.”… and that fits Barbara Bryzek to a tee. As a result of my many years as a “extended Bryzek family member”, I can say emphatically, and I trust that my sentiments are held by many others who knew them both, that Barbara is a quintessential partner,wife, and mother. Their three exceptional children are living proof of the love and dedication that both Janusz and Barbara have given over all these years.

And thank you Barbara for all the gracious kindness, support, dedication, and love that you have selflessly given to Janusz, your children, your grandchildren, and to me.

Janusz Bryzek…rest in peace. ◆ Contributors

Janusz and Barbara making a presentation.

EPILOGUE Janusz was so special in so many ways, and the one most extraordinary was his abundant human side, passionate about life in general and especially about music, tennis, his loving wife, 3 children, and 4 grandchildren. He was the consummate loving, caring, and generous man.

Janusz was a giant in the worldwide sensors and MEMS community. A true

Roger H. Grace, President, Roger Grace Associates, a marketing consultancy specializing in MEMS and Sensors, rgrace@rgrace. com, www.rgrace.com Sandeep Akkaraju, CEO, Exo Imaging, suppliers of point-of-care ultra-sound platforms for medical imaging applications, www.exo. inc Brian Birkumshaw, Ph.D., V.P. of Transducer Technology, Exo Imaging, suppliers of pointof-care ultra-sound platforms for medical imaging applications, www.exo.inc Joe Mallon, MEMS industry pioneer and former CEO of Measurement Specialties (now TE Connectivity), www.te.com Kurt Petersen, Ph.D.,”The Father of MEMS” and member of Silicon Valley Band of Angels Venture Capital Group, www.bandangels.com

meptec.org

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PACKAGING

Challenges for Achieving Automotive Grade 1/0 Reliability in FCBGA and fcCSP Packages Knowlton Olmstead, Mike Kelly, JoonDong Kim, Kurt Raab Amkor Technology, Inc.

Abstract Achieving the Automotive Electronics Council (AEC) Q-100 specification for Grade 1 and 0 reliability introduces unique challenges as thermal cycling (TC) and high temperature storage (HTS) requirements increase. New automotive packages require increased integration of device functionality for sensors, driver assistance systems, infotainment and in-vehicle networking which pushes demand for larger package sizes. This increase in package size and thermal cycling over a large temperature range (from -55 to 150°C) introduces high thermomechanical stress to the package.

Additionally, high operating temperatures and the need for 15-year reliability with zero-defect quality are driving qualifications that extend beyond the AEC Q-100 specification conditions. These factors present material challenges such as intermetallic compound (IMC) growth, degradation of organic materials and increased likelihood of wear-out failures from thermomechanical stresses.

This article provides an update on flip chip Chip Scale Packaging (fcCSP) and Flip Chip Ball Grid Array (FCBGA) material and package development to achieve Grade 1/0 reliability. Simulation of key mechanical properties such as the modulus of elasticity and the coefficient of thermal expansion (CTE) and material aging experiments have highlighted the need to identify substrate materials, underfills and epoxy molding compounds (EMCs) that can withstand harsh TC and HTS conditions up to 175°C. To reduce thermomechanical stress in TC, low CTE substrate materials are needed.

Results from prior experiments and current work have identified a robust bill of material (BOM) for a 35-mm body size FCBGA capable of achieving Grade 1 reliability and a Grade 0 capable 12-mm 12 | MEPTEC REPORT

FALL 2022

body fcCSP. The remaining challenges and potential solutions are discussed for selecting materials capable of reaching Grade 0 and extended qualifications.

This article provides an update on flip chip Chip Scale Packaging (fcCSP) and Flip Chip Ball Grid Array (FCBGA) material and package development to achieve Grade 1/0 reliability.

Keywords Automotive, advanced packaging, FCBGA, fcCSP, reliability I. Introduction As the quantity, complexity and functions of electronic devices in automobiles increase, understanding and characterizing package reliability is of significant concern and importance. The Automotive Electronics Council (AEC) Q-100 specification for Grade 1 and 0

reliability introduces unique challenges as thermal cycling (TC) and high temperature storage (HTS) requirements increase. Additionally, high operating temperatures and the need for 15-year reliability with zero-defect quality often require evaluating package reliability to as much as twice the conventional AEC Q-100 grade requirements. Meeting these challenges requires solutions in the areas of materials characterization, simulation and design of experiments that satisfy the needs for both having a comprehensive understanding of device reliability and a competitive development timeline.

Automotive packages increasingly require greater integration of device functionality for sensors, advanced driver-assistance systems (ADAS), infotainment, in-vehicle and between-vehicle networking. These requirements are driving demand for larger package sizes with advanced design rules not previously utilized in automotive packages.

Simultaneously, the mission profiles for automotive packages are expanding with the development of self-driving capabilities, electric charging and other technologies. This requires certain components to effectively be always on and operating for extended periods at high temperatures.

II. Automotive Reliability Requirements Table I lists the AEC Q-100 reliability requirements for grades 0-3 along with the device operating temperature range used as a guideline to determine the correct grade for a given device [1]. Both Grades 0 and 1 extend the temperature cycle range from -55 °C up to 150 °C. This large temperature range introduces high thermomechanical stresses, especially in large body size Flip Chip Ball Grid Array (FCBGA) packages. High meptec.org

AEC Grade

Operating Temperature Range

Temperature Cycling

High Temperature Storage (hrs)

0 -40 to 150°C

TCH: -55 to 150°C 2000 cycles

175°C: 1000 150°C: 2000

1 -40 to 125°C

TCH: -55 to 150°C 1000 cycles

175°C: 500 150°C: 1000

2 -40 to 105°C

TCB: -55 to 125°C 1000 cycles

150°C: 1000 125°C: 1000

3 -40 to 85°C

TCB: -55 to 125°C 1000 cycles

150°C: 1000 125°C: 1000

Table I. AEC Q-100 Temperature Cycle and High Temperature Storage Requirements.

temperature storage requirements up to 1000 hours at 175°C increase concerns over failure modes such as the growth of intermetallic compounds (IMC) in the die to substrate interconnects along with degradation of organic materials.

Figure 1. Stress sensitivity plot for metal pad stress.

III. FCBGA Evaluations Multiple simulations were performed modeling a range of properties for FCBGA materials and evaluating

Figure 2. Modulus measurements before and after temperature cycling.

meptec.org

the resulting stresses for several failure modes including metal pad stress, stress in the Low-k dielectric, the interfacial stress between the solder mask and underfill and room temperature warpage.

Sensitivity plots created from the simulation results indicate the relative impact of material property variations for each material on the stress for each failure location. Figure 1 shows the stress sensitivity plot for metal pad stress indicating that the buildup and underfill modulus and coefficient of thermal expansion (CTE2) of the underfill have the largest impact on this stress.

The results of the simulations indicated that the buildup, solder resist and underfill were critical materials that required characterization to understand how their material properties changed after aging during temperature cycling.

Samples were created for these materials and subjected to temperature cycling betting -55 and 150°C. Modulus, CTE and the glass transition temperature were measured before cycling and after 1000 and 2000 temperature cycles.

Figure 2 displays the results of modulus measurements from the temperature cycling property characterization. In this case, the solder resist showed a significant increase in modulus below the glass transition temperature relative to the other materials.

Based on the results of the simulation and aged material property measurements, a test vehicle was designed to evaluate selected substrate and underfill materials expected to be suitable for Grade 1 and 0 package reliability. The test vehicle included a 35x35-mm substrate and 15x15-mm die with 150-µm pitch copper (Cu) pillar. Figure 3 shows the results of 175°C HTS on the underfill fillet. The high temperature exposure leads to oxidation and cracking in the FALL 2022 MEPTEC REPORT | 13

PACKAGING

(a)

(b)

Figure 4. 175°C HTS results: (a) Substrate with Solder on Pad (SOP) finish and (b) Substrate with ENEPIG finish.

Figure 3. Underfill fillet after 1000 hours 175°C HTS.

underfill fillet. Figure 4 (a) shows that the high temperature exposure leads to IMC growth and solder voiding. Figure 4 (b) shows the results of HTS in a substrate with electroless nickel electroless palladium immersion gold (ENEPIG) surface finish which eliminates this issue.

Figure 5 shows the results from a previous test on a similar 35-mm substrate to Grade 0 conditions using the 150°C HTS condition. Neither of the failures observed for Grade 0 packages in 175°C were present at 150°C with no underfill cracking or solder voiding being detected [2]. This suggests that the 1000-hour exposure at 175°C is much harsher than the alternative Grade 0 requirement of 2000 hours at 150°C. IV. fcCSP Evaluations In flip chip Chip Scale Packaging (fcCSP) packages, the primarily problem encountered when testing to Grade 0 and 2xGrade0 conditions relates to the oxidation of the epoxy molding compound (EMC) molded underfill which can result in cracking after extended HTS. Figure 6 shows an example of this failure with a crack extending from the surface of the EMC down to the substrate after 2xG0 HTS at 150°C. To screen alternative EMC materials before requiring sample builds and reliability testing, samples of multiple materials were created and subjected to HTS at 150, 175 and 200°C. Aged properties were measured to identify which EMC materials had the highest likelihood of resisting cracking in HTS. Modulus, CTE, shrinkage, flexural strength and 14 | MEPTEC REPORT

FALL 2022

Figure 5. Results from 150°C HTS: (a) Underfill after HTS with no cracking and (b) FC bump after HTS with no voiding.

Figure 6. EMC cracking after 2xG0 HTS.

the thickness of the oxidized EMC layer were measured at intervals up to the 2x Grade 0 HTS requirement.

Results from the oxidation measurements are shown in Figure 7 indicating different EMC materials have different meptec.org

V. Conclusion Simulation and material characterization have been shown to be important steps in developing and evaluating new material sets for automotive packages.

This allows the identification of critical parameters and potential materials before building test samples for reliability testing. This process reduces the time required to solve problems that will arise for future automotive packages as they increase further in size and complexity.

Reliability testing has shown that the Grade 0 high temperature storage conditions of 1000 hours at 175°C and 150°C for 2000 hours are not equivalent for all failure modes, with the 175°C requirement being much harsher and resulting in material failures that do not occur at 150°C. For the FCBGA packages, a robust G1 BOM has been developed. The same BOM meets Grade 0 temperature cycling requirements but eliminating the underfill cracking that occurs at 175°C HTS remains a challenge. meptec.org

Oxidation after 2000 hrs HTS Oxidized

EMC B

150˚C

EMC A

175˚C

Reaction Layer

200˚C

oxidation rates and characteristics. In EMC A, there is a thick fully oxidized layer of EMC after 150°C HTS while EMC B shows a thick layer of fully oxidized material with a large reaction layer.

After 200° HTS, EMC B has a much thinner layer of fully oxidized material.

Modulus measurements taken from the aged EMC samples show that the transition from glassy to rubbery increases over a wider range of temperatures.

Dynamic mechanical analysis (DMA) modulus measurements from one EMC material are shown in Figure 8.

The large variation in modulus between the aged and non-aged EMC material at the Grade 0 HTS temperatures of 150°C and 175°C is a suspected contributor to the EMC cracking observed.

A 12x12-mm test vehicle was designed for testing multiple EMCs selected for Grade 0 based on the aged material property measurements. EMCs were selected for their low shrinkage and oxidation behavior along with one high glass transition temperature EMC. Three EMC candidates were successfully tested to 2x Grade 0 conditions at both 150°C and 175°C with no EMC cracking and no failures detected in temperature cycling.

Figure 7. Oxidation measurements after 2000 hours HTS.

Figure 8. Modulus measurements from aged EMC.

The fcCSP package has passed qualifications to 2xG0 with multiple EMC materials thanks to early material characterization used as a tool to identify suitable EMC candidates. ◆ References [1] AEC - Q100 Rev - H: Failure Mechanism Based Stress Test Qualification For Integrated Circuits (base document).

[2] R. Dias, M. Kelly, D. Balaraman, H. Shoji, T. Shiraiwa, K.S. Oh, J.Y. Park, “Challenges and approaches to developing automotive grade 1/0 FCBGA package capability,” 2019 IEEE 69th Electronic Components and Technology Conference (ECTC).

© 2021 Amkor Technology, Inc. All rights reserved.

FALL 2022 MEPTEC REPORT | 15

MEMS REPORT

How COVID and the Downturning Economy Uncertainty are Affecting the Successful Commercialization of MEMS and What to Do About It: The MEMS Industry Commercialization Report Card Roger H. Grace Roger Grace Associates

Introduction/History/Evolution The famous management guru, Peter Drucker, was said to have made the following remark: “what you cannot measure… you cannot manage”. And to his point rests the rationale for my creation of the MEMS (Microelectromechanical Systems) Industry Commercialization Report Card in 1998.

During the famous Hilton Head Conference (also formerly known as the Solid State Sensors Conference) that I was asked by the conference technical chair to create a panel to address the topic “why are there not more MEMS millionaires”. I invited several of my colleagues in attendance to be on my panel and to have them share their opinions on this subject. It was a truly informative and illuminating session. Following that, I, as a technical marketer, decided to investigate this topic in detail and set out to determine some possible answers. My in-depth research uncovered several general articles on the topic of “technology commercialization”. Technology commercialization is defined as the process by which a product or service translates from an idea to the market as shown in Figure 1. I used the content of these articles to establish a list of criteria that appeared to be integral to commercialization success, including several which addressed the original question of MEMS millionaires. I modified these general criteria to develop the nine, and then added five additional criteria by 2002 to support my list. Now that the critical success factors have been established, what to do next?

Why a “Report Card” and “Grades” Initially, I determined that there were nine critical success factors (CSFs) for MEMS commercialization, including several items reflecting on the original question of 16 | MEPTEC REPORT

FALL 2022

TECHNOLOGY COMMERCIALIZATION* PROCESS MODEL

* Def: Process or cycle of introducing a new product or production method to the market.

Roger Grace Associates supports its clients in front and back-end market analysis as well as in the product launch plan and execution.

Figure 1. The MEMS Commercialization Process illustrates the necessary steps to successfully bring MEMS-based products from concept to market. Market research is a critical part in the process appearing in the front-end to best define the product, competition and market needs and, in the back-end to optimize the communication strategy and plans in introducing the process/product to the market. (Courtesy: Roger Grace Associates)

financial success, and these were “Venture Capital Attraction”, “Profitability”, and “Creation of Wealth”. However, the question remained: what was the next step to make this information useful to the MEMS community? I decided that conducting a marketing study, using an initial email with a telephone follow-up would be the best approach. In creating the questionnaire, a format was selected which provided participants with the ability to grade the performance of these critical success factors in letter grades, from A to D. Additionally, it would ask participants to provide the rationale for their assigned grades and therefore create a research vehicle that were simultaneously qualitative and quantitative – a market researchers’ dream. We all know

that everyone loves grades – when we go to a restaurant, a hotel, when we select a physician, when we purchase something from Amazon – so why not with MEMS commercialization performance? What was needed was a unique and simplified approach to create a vehicle that could intimately and simply address the sentiments and attitudes of the MEMS community since none existed to this time, and since nature abhors a vacuum, the Report Card was born to address this deficiency and satisfy unmet needs of the MEMS community.

Motivation…Does Having a Report Card Matter?

My initial and ongoing intent has been to report to the MEMS community the stameptec.org

tus of the efforts to overcome the barriers, a.k.a. critical success factors, in the creation of a successful MEMS industry and to help guide participants with valuable inputs as to how to better succeed based on past performance. This is truly a “lessons learned” opportunity and in the words of the famous philosopher George Santayana [1], “those who forget the past are condemned to relive it”. It is noteworthy that MEMS were essentially discovered in the mid-1950s, along with semiconductors, both at Bell Labs.

In 1998, I felt that it was long overdue to provide the MEMS community a different and simultaneously quantitative and qualitative approach to reporting on the progress of MEMS commercialization activities as a valuable alternative to the standard purely quantitative approach of sales volume and growth rate being reported on by several organizations. According to Gartner [2], 2021 worldwide semiconductor revenue was US $595.0 billion. Conversely, and according to IC Insights [3], 2021 MEMS worldwide revenue was US $15.9 billion. Why is there a 37.4:1 discrepancy in the revenue numbers?

Looking to the semiconductor industry and its successful commercialisation is certainly a lessons-learned opportunity. After considerable research into the topic of technology commercialization, I concluded that the 14 Report Card subjects, a.k.a. critical success factors, were the best vehicles by which this can best be accomplished. The resulting reporting, and subsequent call to action recommendations, can be planned and executed to address subjects that appeared problematic.

Research Methodology From its inception, the Report Card Study research process has embraced a hybrid approach using two popular market research vehicle concepts: The Delphi Process [4] in addition to the Mass Observation Process (MOP) [5] which gained popularity prior to WWII in the UK. Both approaches use inputs for a limited number of participants as compared to the popular opinion research vehicles (e.g. Harris, Gallup, Nielson Polls) which use a large number of interviews in an attempt to forecast/project an outcome within a certain degree of accuracy akin to what is used to forecast election results.

For the 2021 Report Card 42 completed questionnaires were received from a select list of 111 MEMS industry professionals meptec.org

2021 MEMS INDUSTRY COMMERCIALIZATION REPORT CARD

Figure 2. The MEMS industry commercialization report card (Report Card) was created in 1998 and has been conducted annually. The 2021 aggregated grade was C+ which was a one grade decline from the previous six years of reporting. All but one of the 14 subjects experienced a decline of one grade with Infrastructure realizing a two-grade decline. The grade for Industry Roadmap remained at C. Standard deviation was 0.40. (Courtesy: Roger Grace Associates)

2021 MEMS COMMERCIALIZATION REPORT CARD

Figure 3. Since its inception in 1998, the MEMS Industry Commercialization Report Card consolidated grade has only received a grade lower than B- which occurred in 1998, 2008/2009 (as a result of the world economic recession, in its first year and in this year’s 2021 study.

(Courtesy: Roger Grace Associates)

in the Roger Grace Associates database, resulting in a 38% return rate. The emailed questionnaire required respondents to assign letter grades with pluses and minuses from

A to D to each of the 14 subjects as well as provide verbatim comments on subjects that they considered of unique importance.

Most noteworthy was my effort to have FALL 2022 MEPTEC REPORT | 17

MEMS REPORT respondents address the issue of COVID’s effects on their grades and what strategies that they were using to mitigate these effects.

The typical respondent had an average of 25 years of experience in the MEMS industry and, as such, the Report Card represents a total of over 1,000 person years of cumulative MEMS experience. It should be noted that achieving a response rate of over 5 percent for this type of market study is virtually unheard of in the market research community. I believe that the 38% return rate demonstrates the continues commitment of the individuals in the study to support the MEMS community. Thus, the Report Card research was able to successfully assess the health of the MEMS community commercialization by simultaneously using both quantitative and qualitative research approaches.

Results The results are in, and the grades for the 2021 microelectromechanical systems (MEMS) Industry Commercialization Report Card (Report Card) Study were tabulated. And, not surprisingly, the final grade declined from B- to C+, breaking a string of the previous six years (see Figure 2).

The C+ grade had previously occurred only once in the years 2008 and 2009, and as a direct result of the worldwide financial recession. A C+ grade was also given for the initial year of the Report Card in 1998 (see Figure3). More importantly, and as a result of a closer examination of the numerical results, the actual numerical, not grade score, in 2021 was the lowest in the history of the study.

Additionally, all but one of the 14 “subjects”, Industry Roadmap, declined one grade. Infrastructure declined two grades, and was certainly expected as a result of the severe detrimental effect of COVID on the supply chain. The apparent maturity of the MEMS industry to maintain its B- grade for the past six years, has been previously reported in Fierce Sensors [6], has been severely upended by economic and societal changes brought about dramatically by COVID in 2020, 2021 and now being projected into 2022 as a result of the Omicron and other variants.

And just briefly, a high-level sample of some of the more significant results:

Marketing – a major reduction in travel and attendance at industry events has torpedoed marketing and sales programs.

18 | MEPTEC REPORT

FALL 2022

SENSOR-BASED SYSTEM SOLUTIONS

Figure 4. MEMS are to be considered product/solution enablers and not a solution unto themselves. They typically exist in the front-end of a product/system and work in conjunction with other electronic functions including signal processing, power, communications. Interconnects and packaging are a key and integral part of the system solution. (Courtesy: Roger Grace Associates)

Infrastructure – the supply chain problems have been severe and organizations are attempting to develop local suppliers for critical parts.

R&D – the inability of researchers to collaborate in our labs and the travel bans have seriously kept graduate students at home has seriously derailed the progress on ongoing projects.

Selected Verbatims Over 125 verbatims were submitted as a rationale for the grades that the participants provided. Out of those, a small number of the most poignant were selected to appear here. I believe they truly capture the sentiments of the audience on the topic. For brevity, I have not addressed every topic here, nor included all of the verbatims for each of the subjects provided. A full list of the verbatims is provided in the Final Report [7].

General • People do not want to buy a MEMS. Customers want to buy a device that (does a specific function) like redirecting light. They want to know speed, wavelength dependence of the device, and how many resolvable spots (diffraction limit).

• The “novelty” of MEMS is gone. MEMS is part of a general system solution (Figure 4). Just as ICs are not just a tube replacement in many ways, MEMS is still suffering from a problem of perception.

R&D • R&D was tough indeed, effects of COVID linger on but are getting better.

• The impact of COVID in 2021 continued to plagued R&D and most companies were focused in manufacturing, operational efficiencies and supply chains. All three of these focus areas were impacted significantly from the COVID pandemic (from starting wafers to materials, chemicals, gases and equipment were all negatively impacted from disruptions in the global economy).

• Many companies reduced R&D budgets in preparation for ongoing uncertainty from the pandemic, shattered supply chains and declining economic conditions.

Marketing • Restrictions in travelling, more web-based communication, less visits in fairs and exhibitions and smaller marketing budgets.

As a result, we have successfully adopted new marketing communications strategies to replace those that were negatively affected by the effects of COVID – webinars, direct mail, websites, social media and YouTube have been cost effect. What we still need to do is determine their ROI (Return on Investment) • Dealing with COVID has been a mess.

Online conferences are not very efficient (as in-person ones).

• The return of face-to-face meetings has enabled showcasing R&D, marketing, marmeptec.org

ket research and new employment in the MEMS industry again.

Established Infrastructure • Like many other industries, the MEMS industry is currently plagued by supply chain problems and cost explosions in raw materials and logistics.

• Not surprisingly the biggest issue this year is supply. And MEMS appears to have taken this about the hardest among all componentry, including comm and SoC chips, hence my low grades.

• Supply chain problems, delivery from China is problematic. Problems with supply of exotic/special materials.

• One of the biggest negatives in the last year is the lack of MEMS production fab capacity, the difficulty in purchasing new fab tools. This has hit smaller foundry customers hard, driving up commercialization timelines.

Venture Capital Attraction • Our company, Exo Imaging, raised $220M in a Series C for our pMUT-based ultrasound imager. At least another 20 companies raised significant amounts for Series A, B, C and D Series. Most notable were wearables companies which is one of the most active sectors for investors.

• Interest increased partly because of increased medical interests, COVID, e-automotive and battery applications, slowly interest in agriculture and food processing applications.

• VC’s are very active given the shortage of supply and demand for future growth.

• There is a real uptick worldwide in startup funding where I would classify MEMS again as a “software startup enabler”.

Profitability • COVID reduced work force costs and marketing travels, and as such, increased profits.

• Profitability has been affected by COVID. Need to pay premium to get supply of raw materials, equipment parts, etc. Wages cost increasing with resources shortages.

• Disruption in supply chain along with increased lead times for most semiconductors are the primary reason for my lowering the profitability grade. However, unit prices meptec.org

have increased 8-10% for most semiconductors including commodity memory (just an example). However, it is unclear if profitability is increasing.

• It is difficult to determine if pricing increases are a result of the economic uncertainty, availability of wafers, chemicals, materials, equipment or the global supply chain disruptions that are affecting every industry.

Newly adopted business strategies employed to mitigate the effects of COVID should be critically assessed for deployment in 2022 and beyond.

What Can Be Done to Mitigate the Negative Effects?

I offer the following recommendations to help mitigate the negative effects:

Infrastructure/Supply Chain • Develop, wherever possible, alternative materials and systems resources capabilities within your supply chain.

• Prioritize purchasing from “local” sources.

Minimize purchasing from “non favorable” sources.

• Seek and qualify additional suppliers and include in supply chain.

• Develop “flexible” designs, where ever possible, and switch out components to mitigate impact of extended deliveries.

• Attempt to create in-house vertical integration strategy.

• Proactively partner with key suppliers.

Marketing • Conduct a thorough and critical assessment of ROI of all of the strategies and tactics embraced during the pandemic, knowing that things will never be back to pre-pandemic scenario – and adopt, “the new normal”.

• Continue to do what works…do not overreact or overcorrect.

• New social media approaches adopted have promise for the future: - Webinars - Social Media, e.g. Linkedin, Twitter, Facebook - YouTube - Enhanced websites - Direct mail, e.g. Constant Contact - Hybrid conferences • Many publications have ceased to exist in printed form creating opportunities for facilitating access for submitted editorial in electronics versions, thus a new opportunity – carpe diem.

• The pull-back of resources expected in entering the economic downturn will provide enhanced opportunities to “pull out all the stops” and NOT reduce spending on MARCOM, but rather increase it. Carpe diem.

• Plans need to be viewed as living, breathing and highly malleable vehicle that need to change in a timely fashion to accommodate quickly changing industry dynamics.

Prognostications It is interesting to note that while a great deal of the research which formed the basis of the Report Card was conducted in Q-1 and Q-2 2021, I believe that the verbatims contributed are especially still applicable after over 30 plus months of the pandemic, as are the recommendations.

With the ongoing presence of COVID throughout 2022, it is highly likely that the Report Card for 2022 could be similarly affected as it was for 2021 by these lingering effects. Exacerbating this is another possibly more daunting issue on the future 2022 Report Card grades… the resulting business uncertainty due to the effects of the quickly emerging global economic slowdown driven by increased interest rates, inflation and massive layoffs in the technology sector. I would expect that some of the same challenges posed by COVID in 2020 and 2021 will also exist for 2022. Newly adopted business strategies employed to mitigate the effects of COVID should be critically assessed for deployment in 2022 and beyond.

Summary/Conclusions The final grade for the 2021 Report Card declined to C+ with a standard FALL 2022 MEPTEC REPORT | 19

MEMS REPORT deviation from 1998 to 2021 of 0.40. All subjects declined in at least one grade with the exception of Industry Roadmap which remained the same. Infrastructure declined two grades and highly driven by the significantly negative and prolonged impact of supply chain disruptions resulting from COVID. This outcome was projected to occur in the last year’s Fierce Electronics coverage of the 2020 Report Card [6] and referenced in my Forecast 2022 articles [8] [9].

I am hopeful that the continued undertaking and subsequent publication of the results of this unique industry annual market study will continue to provide valuable guidance and actionable information to the MEMS (and other high tech) industry community to support its commercialization efforts. It should be used as a valuable tool in their efforts to successfully overcome the existing barriers to commercialization in addition to continue to act as a critical input to help formulate strategies and tactics for its accomplishment. Organizations should use this information to help them pivot in the market and to create and execute new strategies to become successful in the “new normal”, con-

&

The HIGHS

LOWS

of thermal management

sidering future health and economic uncertainties. And yes, to answer the above posed question, the Report Card matters!

Due to the limited space allocated to this article, the sharing of the more information including significant and critical “verbatims” and recommendations to overcome barriers was not possible. However, the extensive Report Card Final Report is available on the Roger Grace Associates website (www. rgrace.com) and provides a more detailed assessment. ◆ Acknowledgements The author wishes to thank all the individuals who participated in this research study for their kind, valuable and continued contribution to the betterment of the MEMS commercialization community.

References

[1] G. Santayana, The Life of Reason: Five Volumes in One, 1905-06 [2[ www.gartner.com [3] www.icinsights.com [4] A. Twin; Delphi Method; Investopedia; May 27, 2022; www.investopedia.com

[5] www.massobs.org.uk [6] R. Grace; MEMS Industry Commercialization Report Card 2020; Fierce Electronics; October 27, 2020; www.rgrace.com [7] R. Grace, Final Report: The MEMS Industry Commercialization Report Card Study for 2021, June 2022, www.rgrace.com [8] R. Grace; Industry Insiders Share Their Sensors/MEMS Industry Forecasts for 2022 Including the Impact of COVID; Fierce Electronics; January 18, 2022; www. rgrace.com [9] R. Grace; Forecast 2022 for Sensors/MEMS: Focus on the Impact of COVID 19 on the Commercialization Process Global Supply Chain; NASA Tech Briefs; June 2022; www.rgrace.com

Roger H. Grace is president of Roger Grace Associates (Naples, FL) which he founded in 1982 as a marketing consultancy serving the sensor, MEMS, IC, and capital equipment markets and offering a broad spectrum of services including market research, integrated marketing communications, and sales channel development. He can be reached at rgrace@ rgrace.com and www.rgrace.com.

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INTERVIEW

Catching Up with Abram Detofsky Principal Engineer Intel Corporation

Owing to a very diverse and accomplished association of MEPTEC members, there are many informative, instructional, and entertaining stories to be told. “Catching Up With…” will feature stories from and about our members.

Abram Detofsky (https://www.linkedin.com/in/abram-detofsky-1a59a26/) joined the MEPTEC Advisory Board in 2020. This interview was conducted via email and edited for clarity.

How did you get interested in Microelectronic Engineering which was your major for your Bachelor Science degree at Rochester Institute of Technology?

I’ve been interested in Science and Math ever since Mrs. DeRosa’s 3rd-grade science lab on Rocketry and Flight. She was instrumental in encouraging me down the science, technology, engineering, and mathematics (STEM) path and ever since then I’ve been a metaphorical “sponge” for all things technology. Microelectronic Engineering at RIT interested me because I saw it would give me a broad multi-disciplinary hands-on education in everything from Device Physics to Computer Science and Optics. Further encouragement from professors like Dr. Fuller, Dr. Hirschman, and Dr. Kurinec there encouraged me to think big as I approached my senior capstone project.

For this project, I ended up designing (with help from graduate student George Lungu), fabricating, and testing a 64x64 charge-coupled device (CCD) imaging sensor from scratch. The project was a very rewarding hands-on experience.

RIT has a great Microelectronics program! We were fortunate to have meptec.org

Professor Santosh Kurinec give us an overview of the program as part of the Semiconductor Industry Speaker Symposium (SISS) in March. Her enthusiasm is overflowing and infectious. Did you have her as a professor? Does she spark such passion in the students?

Yes and yes! As noted, Dr. Kurinec provided important encouragement on my senior capstone project and throughout the program.

What was the experience of working in the RIT fabrication facility like when you were there? Any particularly memorable activities? How did it compare versus what you’ve seen at Intel? Did your knowledge “scale up” adequately once you started learning about the fabs at Intel?

Working in a fully operational integrated circuit (IC) Design and Cleanroom environment and having hands-on access to all the functional toolsets was an amazing experience. Cleanroom activities and lab work were thoughtfully interwoven with the classwork every year of the 5-year program. For example, lessons on growing oxide layers on silicon wafers were rapidly followed by lab work where we personally grew our own films in a cleanroom oven and then verified oxide thickness with various visual and cleanroombased metrology equipment.

Although the fabrication facility wasn’t fully state-of-the-art and relied largely on industry-donated equipment, it was fully operational. What was great about the experience was that the students ran designing and executing experiments themselves and only relied on technicians to fix equipment which may have

broken-down or were behaving unusually. This taught us deep equipment and silicon process problem-solving skills in a highly collaborative environment that would be difficult to replicate elsewhere.

The i-line lithography “steppers” and the ion implanter equipment where both particularly temperamental at the time and required learning where to “kick” them to get them working properly, but we would help one another when we inevitably got stuck. This core collaborative technical problem solving and debug mindset was directly transferrable as I worked my way through Intel.

Although I have never set foot in an Intel silicon fab cleanroom, this mindset has served me well at Intel as I worked in and led many technical problem-solving task forces. Deep knowledge about transistor device design and process also helped me at Intel to better understand and articulate device electrical characteristics and IC failure mechanisms that we would see at Intel and would help focus our experiments on solving the right problems versus wasting time going down false paths.

With your Masters in Electrical and Computer Engineering at University of Arizona you were working on all optical methods for database processing.

Would you explain a bit more and the possible applications? Does this imply that with the right setup one would not need to move data from the optical domain (think fiber optic lines in a hyperscale data center) to the electrical domain back to the optical domain (once the answer is known)? Are we any closer to having systems like this?

After graduating RIT, I wanted to explore the intersection of Digital Electronics FALL 2022 MEPTEC REPORT | 21

INTERVIEW

and Photonics. To this end, I found a program with Dr. Louri which satisfied this curiosity and allowed me, with his help, to explore this vast untapped world of optical data processing. When most people think of adding optics to electronics, they think mostly about replacing, for example, the electrical USB cable from your PC to your mouse with an optical cable. The user experience largely would remain the same although the data bandwidth and reach could definitely be increased if using optics. In this way, optics largely replaces the functionality of electrical signaling. This is all well and good and a great place for the industry to start, but one must also remember that an electrically-charged massive electron behaves fundamentally differently than an electrically-neutral massless photon.

At the UofA, we were exploiting the unique properties of light to devise new optical data processors that would be impossible to create if using electrons. In our system, since photons don’t interact at all with one another, we were encoding multiple digital “words” in different wavelengths so they could be physically overlayed on top of one another. We would then manipulate the polarization states of each logical “bit” within the words in parallel to allow for a very different type of content-addressable parallel processor using only light as the parallel computation fabric. We successfully demonstrated the feasibility of this type of novel processor on an optical table. Ideas like these will fully unlock the true power of the fusion of optics and electronics beyond the mere transport of 1’s and 0’s.

We’re only scratching the surface of this potential today and this is one aspect that has me so excited about the field. We need more research in these non-linear optical computation models from industry and academia, though, as most everyone today is only focused on the digital transport problem.

How shocking was the change of moving from Rochester, New York to Tucson, Arizona? What do you think about the difference in weather not to mention the cultural differences?

Living in Tucson was the first time that I 22 | MEPTEC REPORT

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lived in a desert environment. The winter months were beautiful, but it was strange not ever having a white Christmas. I biked to school daily as I lived less than 10 miles from campus. Summers were a different story where the heat was quite unbearable and I had to be off the road between 7 am and 8 pm, else run the risk of heatstroke. The southwestern cuisine in Tucson was phenomenal and the people were warm and generous.

I think what most drove me towards Manufacturing Test engineering was the technical breadth of skillsets that it draws upon.

Did you trade in your Zamboni for a 4x4 desert Jeep? (Sorry an attempt at “Dad humor”.)

Ha! I kept my ’84 Buick Regal throughout. It wasn’t the most fuel-efficient, but it got me quickly where I needed to go no matter the weather.

How did you land in Hillsboro, Oregon? How would you compare that to Rochester or Tucson? Any major similarities or differences?

Since I had done three separate internships at different locations at Intel when I was still getting my degree at RIT, Intel was on my short-list of places that I wanted to work for when I completed my MS degree from the UofA. When I heard that Intel was hiring post-silicon design validation engineers for their new Pentium 4 line of processors, I jumped at the opportunity. It seemed like the best balance of my technical problem-solving skillset and silicon process background. Upon arriving in Hillsboro, Oregon, I immediately noticed a few things that were a

bit different from where I’ve lived in the past. First, people were super-friendly and smiled and said “hi” a lot more than I was used to elsewhere. Second, the air and the greenery in the Pacific Northwest was stunningly green and clean. It was nothing like I’ve seen in the past and this sparked my love of the outdoors. Lastly, which was also a bit jarring, I noticed that the Pacific Northwest in general is less ethnically diverse than past areas that I’ve lived and went to school. Diversity and inclusivity are things that I know that this region continues to struggle with improving.

Was there anything in particular that drove you towards test engineering after leaving school?

I think what most drove me towards Manufacturing Test engineering after leaving school was the technical breadth of skillsets that it draws upon. I’ve always gravitated towards problems and projects which require multidisciplinary skillsets to solve. For example, I love projects that require both hardware and software design execution to complete a project.

Communicating across these hardware, firmware and software technical “swim lanes” are what I enjoy and are also what I think give engineers with these combined skills an edge as they encounter big highly-complex interlocking problems to solve. This is what drew me to the Manufacturing Test world as it draws from all of these skills at the same time. It’s a place where I’ve never found myself to not have interesting and impactful problems to solve.

You started your career in at Intel in 1994 doing Pentium 4 Design Validation. Would you explain what DV is and the particular challenges for those who are not familiar? And how this compares to manufacturing test?

Post-silicon Design Validation (DV) is a component within Manufacturing Test that is focused in ensuring that the IC products’ parametric and digital performance matches what the design targets say they should be. For instance, a DV engineer will directly measure what an meptec.org

input-output (IO) receiver comparator voltage levels are on a CPU across process skew, input voltage and temperature, comparing these statistical measurements against the customer product datasheet, the design targets, and quality goals. This is usually an iterative process between the DV team, the silicon designers, and quality & reliability engineers to ensure our design has enough margin to meet customer specifications with sufficient margin. The DV team’s data will also be used to set the parametric “kill limits” in Manufacturing Test that would determine which IC’s would pass or fail the manufacturing test screen to ensure we achieve our quality goals.

Later at Intel you drove module, Test method, Software and prototyping development for Intel’s first internally designed manufacturing test systems to meet high-volume needs. What did you learn about being an automated test engineering (ATE) “supplier” versus being a “customer”? Does what you hear from ATE companies when they say “no”, make more sense now?

Being “on the other side of the fence” as an ATE supplier has been a fascinating learning experience for us all. Our internal ATE solution is now the basis of nearly everything we do in Manufacturing Test today and we’ve optimized our systems around this unit of test capability.

Harmonizing various elements of this across Sort, Burn-in, Class and System Level Test give us a strong competitive advantage in terms of scale, cost, and product team customer responsiveness, but hasn’t been without its challenges.

Over the years we’ve had to grow a lot in terms of what it means to be customerfocused and learning to deeply listen to what the customers are asking for. We’ve evolved over the years from an internal customer-supplier relationship to more of tight partnership between our tester business and the product groups which has successfully strengthened the relationship to allow for rapid problem solving and new feature introduction. Our product team customers are demanding, and we should expect no less, as we work together as equal partners to meptec.org

triage the lengthy list of requests against a finite amount of development resources.

This allows us to make reasoned databased calls together on what features get implemented now and what features get delayed until a later time. No finger pointing is allowed.

Lastly, I’d like to mention that just like many suppliers out there, COVID has added a good deal of stress to our complex supply chain causing us to respond successfully in creative ways to sustain our customer volume commits without compromising tester or customer product quality. Improving on supply chain resiliency is the key and this often requires new investment in surprising areas, both at the hardware and software levels in addition to the commercial ones.

What is your current position?

I’m currently a Principal Engineer. The role of Principal Engineer at Intel is a technical leadership role first and foremost and is really a superset role of the prior engineering role I still enjoy. It is part high-impact technical directionsetting; part integrated problem solving; and part mentoring, cheerleading, and consensus building. As I transitioned into this role, I noticed a marked uptick in the number of strategic engagements and responsibilities I was empowered to do both inside and outside the company.

This has helped me grow new skills and grow my professional network. My contributions to the MEPTEC Advisory Board have been an enjoyable part of this growth, for example.

In your current role, how much are you focused on the testing of multi-chip advanced packaging using “chiplets”?

How would you compare these test challenges to testing extremely large cutting-edge monolithic ICs - like Intel CPUs? What is similar and what is different?

In my current role, I am working with our team to grapple with the challenges of assembling, testing, and guaranteeing the reliability of chiplet-based logic products with co-packaged optics. Photonic ICs add a whole new layer of integration and

test challenges including thermal crosstalk, mechanical handling in manufacturing and in the field, and keeping the optical interfaces clean and defect-free.

Chiplet-based designs are an interesting animal when compared to monolithic designs. On one hand, chiplet-based designs offer extreme flexibility for the designer and the product team to be able to mix-and-match process nodes and designs to balance risk and cost on relatively short timescales. You are also able to exceed monolithic reticle limitations in a chiplet based design, so the aggregate number of transistors continues to scale along with more traditional process node density scaling. You pay a price though in a chiplet design in terms of a less-thanperfectly-optimized aggregate product versus monolithic. You also pay a large price in the way a chiplet-based product must be designed for test and yield upfront. Test access port availability, repair, redundancy, and potential access to thirdparty test content intellectual property (IP) all need to carefully planned up-front to ensure a testable product in Manufacturing Test, but also for Debug and Customer Return scenarios. More “cooks in the chiplet kitchen” where we have multiple third-party chiplet suppliers are a great idea, but this also complicates the integration and test challenge which adds to product risk. It’s a great aspirational goal but is one that will require improving on new interoperability standards including the new Universal Chiplet Interconnect Express (UCIe) specification to fully include Manufacturing Test needs.

As chair of the IEEE Electronics Packaging Society (EPS) Test technical committee, what do you see as the biggest challenge facing the industry for making heterogeneous integration (HI) a commercial success? And beyond the “Best Known Methods” document the TTC did an excellent job in organizing, what else might the test industry collaborate on that should make a difference with HI? Heterogenous integration, or chiplet-based designs, is one of the biggest mind-shifts that the industry will see in the coming years. We’re only beginning that journey today. Right now, many companies, FALL 2022 MEPTEC REPORT | 23

INTERVIEW

including Intel, are experimenting with and starting to deploy these kinds of designs into medium and high-volume.

But this is largely done under the condition that all chiplets, even though they may be on different process nodes, are all designed under the same integrator “roof”. This ensures that all the design IP including the inter-chiplet interconnect IP remain proprietary and under the control of one organization. However, this requires enormous resources to manage on large sprawling designs and limits the scale of the biggest designs to the very few companies that can afford the infrastructure to do so. Creating and evolving effective and comprehensive chiplet interoperability standards (including for Manufacturing Test!) such as UCIe is the biggest challenge to unlocking a true chiplet marketplace to be available to the masses. This must also include standardization of test access mechanisms and processes to

securely share both test data and test content between IP suppliers and IP consumers for a chiplet ecosystem to thrive.

You mentioned you do a lot of photography. What are your favorite subjects and any special stories about particular images? Do you get to combine this hobby with your passion for hiking? If so, any particular favorite locations?

Yes, amateur photography has been one of my passions outside of work for the past seven years. I particularly enjoy both landscape and Milky Way night photography and enjoy honing my skills whenever I can. I find it an enjoyable way to combine my love of technology with my more artistic side in creating pictures which resonate and tell a story. After living in the northwest for the past years, I’ve been able to combine this with my love of hiking and exploring the beautiful places we have around here. I do a lot of planning

before going out on a landscape photoshoot which often involves tracking the weather, sun and moon location, and how I imagine the landscape moves through a scene. One of my favorite spots has been Lower Lewis River Falls in southwest Washington State. Getting to my desired vantage point at the right time involved lots of early-morning scrambling in the mud along the riverbank while hoping that I didn’t soak all of my gear, but the results of the good planning, execution, and luck were all well worth the effort, resulting in a spot-on image in the end.

What is your favorite place to travel to for work or pleasure?

Oh, one of my favorite locations for travel must be the areas in and around Kona on the Big Island of Hawaii. The stunning sunsets, lush greenery and rocky coastline are a photographer’s dream. The food isn’t too shabby either! ◆

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