IRJET-Implementation of Advanced Encryption Standard Algorithm for Communication Security Using FPGA

International Research Journal of Engineering and Technology (IRJET) Volume: 03 Issue: 07 | July-2016

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Implementation of Advanced Encryption Standard Algorithm for Communication Security Using FPGA Madhuri B. Ghodke 1, Dr. Suresh N. Mali 2 1Student

M.E. (VLSI &Embedded system), Sinhgad Institute of Technology and Science, Narhe, Pune.

2Principal

of Sinhgad Institute of Technology and Science, Narhe, Pune.

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Abstract - Network security is one of the most important

factors in today’s world. It protects the information from unwanted access or editing of third party and intentional or accidental interference of third party users. Advanced Encryption Standard (AES), is a cryptographic algorithm that can be used for secured communication, it uses same key that is symmetric key for transmission as well as reception.

The AES algorithm is capable of using cryptographic keys of 128, 192, and 256 bits, this paper implements the 128 bit standard on a Field Programmable Gate Array (FPGA).

Figure 1: Cryptographic technique.

Encryption is the most effective technique for achieving data security. To read an encrypted message, one must have access to a secret key or password that performs decryption.

Decryption is the procedure of converting encrypted data back into the original format, so that it can be understood by the end user.

Key Words: Cryptography, FPGA, AES algorithm.

1.INTRODUCTION

2.LITERATURE REVIEW Cryptography provides great significance for secured communication. Use of cryptographic algorithms is done for the purpose of security in various applications like secured ATM, DVD content etc. Secured communication is one of the most important things in present day situation and its need is increasing rapidly[1]. Every individual wants their data to be secured and privacy must be maintained. This requirement can be fulfilled by the use of cryptography. So many systems are required to protect the shared data. The present work focuses on cryptography to secure the data while transmitting in the network [2]. This Advanced Encryption standard specifies the Rijndael algorithm [9].

AES algorithm have been standardized and it is considered as very secured as compared to other encryption algorithms[1].

The data which is to be transmitted from sender to the receiver must be encrypted using the encryption algorithm in cryptography. The three encryption techniques i.e. AES, DES, RSA algorithms are compared here.

Table 1: Comparison between AES, DES and RSA

1.1 Cryptography

Cryptography is a skill of protecting the information by transforming it into an unreadable format. The encrypted data is called as ciphertext. At the receiver end, only those who have a secret key be able to decipher the message into plain text for getting the original data. Sometimes encrypted messages can be broken down by cryptanalysis, which is known as codebreaking. Cryptography can be classified into two types symmetric-key systems and Asymmetric-key systems. In symmetric-key encryption systems sender and receiver of the message make use of the identical key, this unique key is used for encryption as well as decryption of the message.

In the second type which is asymmetric cryptography, a pair of keys is used for encryption as well as decryption of the message to provide security.

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Factors

AES

DES

RSA

Developed

2000

1977

1978

Algorithm

Symmetric Algorithm

Symmetric Algorithm

Asymmetric Algorithm

Encryption & Decryption

Faster

Moderate

Slower

Power Consumption

Low

Low

High

Security

Excellent Secured

Not Secure Enough

Least Secure

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International Research Journal of Engineering and Technology (IRJET) Volume: 03 Issue: 07 | July-2016

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1.Advanced Encryption Standard (AES) Algorithm: Advanced Encryption Standard (AES) algorithm not only for security but also for great speed [1].

2. Data Encryption Standard (DES) Algorithm : DES provide a standard method for protecting sensitive commercial. In this same key used for encryption and decryption process so it is known as symmetric algorithm.[2] 3. Rivest-Shamir-Adleman (RSA) algorithm : RSA algorithm is used to encrypt the data to provide security so that only the concerned user can access it [2].

4. AES ALGORITHM Advance Encryption standard specifies the Rijndael algorithm, this is symmetric block cipher that can process data blocks of 128 bits, using cipher keys with lengths of 128, 192, and 256 bits. The algorithm used with three different key lengths those are AES-128, AES-192 and AES-256. AES algorithm performs encryption and decryption which contains a series of well-defined steps that can be carried out as a procedure. Original information is called as plaintext and the encrypted form is known as cipher text. Cipher text message contains all the information of plaintext data, but it is not in the format readable by a human or computer without proper mechanism for decrypting it.

Figure 2: Flowchart of AES algorithm.

4. AddRoundKey Transformation In AddRoundKey transformation, a simple bitwise XOR operation is performed to add round key to the state.

1.SubBytes Transformation: This operation provides non-linearity in the cipher text. In this step each byte

All the above mentioned steps are repeated for i=1 to Nr-1, where Nr is no. of rounds. In the final step all other steps except AddRoundKey operation are carried out.

in the state matrix is replaced with a

SubByte , by making use of Rijndael S-Box (It is a substitution box serves as lookup table).

5. USE OF FPGA

2. ShiftRows Transformation

A field-programmable gate array i.e. FPGA is an integrated circuit designed to be configured by a customer or designer after manufacturing hence it is known as fieldprogrammable. The FPGA configuration is generally specified using HDL that is hardware description language.

Same as that used for an application-specific integrated circuit (ASIC). FPGA is study of computation using reconfigurable devices. It consist of large array of configurable logic primitives. Some of the properties of FPGA are its increased capacity, upgradability and high flexibility.

In ShiftRows transformation, the bytes from the last three rows in the State are cyclically shifted over different numbers of bytes. The first row, r = 0,which is not shifted.

3. MixColumns Transformation In MixColumns step, four bytes of each column of the state are united using an invertible linear transformation. The MixColumns function takes four bytes as input and gives four bytes output, where all the four output bytes will be affected by each input byte.

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6. EXPERIMENTAL SETUP

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7. EXPERIMENTAL RESULTS

Figure 5: ASCII input as plain text.

Figure 3: Overall System Diagram

Spartan3e device is used with xc2s250e part . Figure 3 covers the architecture of this implementation of the 128 bit AES, detailed in the FIPS197 that is Federal Information Processing Standard 197. The design was developed and testeded on a Xilinx , FPGA board. Figure 3 shows FPGA, Keyboard, LCD. Two human interface devices (HIDs), a regular PS2 keyboard and a 4x20 line LCD include the inputs and outputs to the system. The inputs to the system are the clock, clk, tested at 50 MHz & 100 MHz, resetn, and the PS2 keyboard inputs, ps2_data and ps2_clk. The ps2_data and ps2_clk are bidirectional ports though the device never sends commands to the keyboard, thus these pins are limited to inputs of the system. For the reset push button on the development board is used.

Figure 6: ASCII to HEX conversion and encrypted data.

Figure 7: Decryption process.

Figure 8: Overall Design Summary

Figure 5 shows that the ASCII input is given which is a plain text. Figure 6 shows that ASCII to hexadecimal convertion is carried out and then various steps of AES algorithm are carried out on the given data for converting it into the cipher text this is encryption. Figure 7 shows decryption is carried out to get the plain text in hexadecimal format. Figure 8 shows the overall design summary, that is persentage of utilization of number of slices ,no. of slice Flip Flops etc.

Figure 4: Sub-system block diagram

The first sub-system contains the sequence of steps that are performed to execute all three major operations, those are: key expansion, encryption and decryption. The sequential steps are micro-programmed and these steps are output through the opcode bus. F1, F2, and Esc are the keys used.

The operation on the signal performed is encryption and decryption routines is instructed by the keys F1 and F2 respectively. The 'Esc' key is used to switch between ASCII input mode and hexadecimal input mode.

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8. CONCLUSIONS Network security is important for computer users and organizations , handling of confidential data requires proper security options. The primary goal of AES algorithm on FPGA is to provide significant level of security as well as faster processing time so that it can be used for secured communication of ATM, DVD content as well as for secured storage of confidential corporate documents, government documents etc.

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