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facilitatedesignfortestandcharacterization.Thisbookisorganizedas follows:
Chapters1 3goovertheintroductionandreviewofexistingliterature.Chapter1laysoutthemotivationandchallengesinbuildingan ADPLLforthemm-waveregime,whileChapter2presentsvarious existingmm-wavefrequencysynthesizerarchitectures.Chapter3 reviewsthebuildingblocksofafrequencysynthesizer,whichare commontobothanaloganddigitalimplementations.
Chapters4 6dealwiththetheory,design,andrealizationofammwaveADPLL.Chapter4coversthebasicconceptswhichareneeded tounderstandthedesignandoperationofanADPLL,andChapter5 discussesmm-wavedigitallycontrolledoscillator(DCO)designsand implementations.Chapter6addressesthedesignsofotherkeycircuit blocks,anddemonstratesa60-GHzADPLLforuseinanFMCW transmitter.
Chapter7explainsseveralcalibrationtechniquesusedtoimprovethe performanceofthe60-GHzADPLL,whileChapter8describesthe measurementchallengesofamm-wavefrequencysynthesizer,and proposesbuild-inself-testandself-characterizationtechniques. Theworkpresentedinthisbookisaculminationofseveralyears ofresearch.Wewouldliketothankandacknowledgethediscussions andhelpwereceivedfrompastandpresentcolleaguesattheDepartment ofElectronicsofDelftUniversityofTechnologyinTheNetherlands. WealsothankthestaffatElsevierfortheirsupport.
WanghuaWu
RobertBogdanStaszewski
JohnR.Long April2015
ADC Analog-to-digitalconverter
ADPLL All-digitalphase-lockedloop
AM Amplitudemodulation
BiCMOS BipolarandCMOS
BISC Built-inself-characterization
BIST Build-inself-test
CB Coarse-tuningbank
CKM Modulationclock
CKR Referenceclockretimedbyoscillatorclock
CKV Oscillator(variable)outputclock
CLK Clock
CML Current-mode-logic
CMOS Complementarymetal-oxide-semiconductor
CT Center-tap
DAC Digital-to-analogconverter
DCO Digitallycontrolledoscillator
DDFS Directdigitalfrequencysynthesizer
DFC Designforcharacterization
DFT Designfortest
DNL Differentialnonlinearity
DSP Digitalsignalprocessing
EM Electromagnetic
ESD Electrostaticdischarge
EVM Errorvectormagnitude
FB Fine-tuningbank
FCC FederalCommunicationsCommission
FCW Frequencycommandword
FET Field-effecttransistor
FM Frequencymodulation
FMCW Frequency-modulatedcontinuous-wave
FREF Frequencyreference
Gb/s Gigabitpersecond
GRO Gatedringoscillator
GSM Globalsystemformobile(communications)
GUI Graphicaluserinterface
HVAC Heating,ventilating,andairconditioning
IC Integratedcircuit
IEEE InstituteofElectricalandElectronicsEngineers
IF Intermediatefrequency
IIR Infiniteimpulseresponse
ILFD Injection-lockedfrequencydivider
INL Integralnonlinearity
IO Input/output
Contents
1.1 Motivation2
1.1.1 AdvantagesofMillimeter-WaveRadios2
1.1.2 Deep-SubmicronCMOS5
1.1.3 DigitallyIntensiveApproach7
1.2 DesignChallenges9
1.2.1 TowardAll-DigitalPLLinmm-WaveRegime9
1.2.2 WideTuningRangeandFineFrequencyResolution11
1.2.3 LinearWidebandFM12 References13
WirelesscommunicationhasevolvedremarkablysinceGuglielmoMarconi demonstratedthetransmissionandreceptionofMorse-codedmessages acrosstheAtlanticOceanintheearlytwentiethcentury.Sincethen,new wirelesscommunicationmethodsandserviceshavebeencontinuously adoptedthatrevolutionizeourlives.Today,cellular,mobile,andwireless local-areanetworks(WLANs),affordedbybreakthroughsinsemiconductor technologiesandtheircapabilityofmassproduction,areinuseworldwide. Theyenableustoshareimagesofourcherishedmomentswithfamilyand friendsanywhere,andatanytime.Thecurrenttrendstoward portablewirelessdeviceswithultra-high-speed(e.g.,gigabitpersecond) connectivitywillsoonallowustogoonlineviaournotebooks,cell phones,andtablets,simultaneouslyemailing,chattingwithfriends,web browsinganddownloadingmoviesandmusicinafractionofthetimeit takestoday.Thesedeviceswillhavetomeetaggressiveperformance specificationsinasufficientlysmallandlow-costproductatlowpower dissipation.Thishaspromptedfranticresearchintonewradiofrequency (RF)-integratedcircuits,systemarchitectures,anddesignapproaches. Thisbookexploresthefeasibility,advantages,design,andtestingof digitallyintensivefrequencysynthesisinthemillimeter-wave(mm-wave) frequencyrange.Anall-digitalphase-lockedloop(ADPLL)-basedtransmitter
Figure1.2 Averageatmosphericattenuationofradiowavespropagatingthrough freespaceversusfrequency [6]
watervapor,signalstrengthdropsoffrapidlywithdistancecomparedto otherbands. Figure1.2 illustratesthegeneraltrendofincreasingthe attenuationofradiowaveswithfrequency(dueonlytoatmosphericlosses; freespacepathlossisnotaccountedfor) [6].Atmosphericabsorptionby oxygencausesmorethan15dB/kmofattenuation.Thelossofalink budgetat60GHzisthereforeunacceptableforlong-distancecommunication(e.g., . 1km),butcanbeusedtoanadvantageinshort-rangeindoor communicationsbecausethelimitedrangeandnarrowbeamwidthsprevent interferencebetweenneighboringlinks.Theseattributeshaveledtogreatly reducedregulatoryburdensformm-wavecommunications.
Duetoitspotentialforshort-range,gigabit-per-secondcommunications, severalstandardsinthe60-GHzbandhavebeenestablishedinrecent years.TheIEEE802.15.3cstandardwasapprovedin2009forwireless personal-areanetwork [7].AsimilarstandardforEurope(ECMA-387 [8]) waspublishedin2008.TheWirelessHDconsortiumhasreleasedaspecificationversion1.0aforregulatingthetransmissionofhigh-definitionvideoin thisunlicensedband [9].Mostrecently,theIEEE802.11adstandard(known asWiGig) [10] wasadoptedin2013.Itprovidesdataratesupto7Gb/s,or morethan10 3 themaximumspeedpreviouslysupportedbytheIEEE 802.11standard.IEEE802.11adalsoaddsa“fastsessiontransfer”feature,
Figure1.3 (a)SimplifiedblockdiagramofanFMCWradartransceiver;(b)transmittedandreceivedlinearFMCWsignal.
CMOStechnologiesinproductionofferingpeaktransitfrequency(fT)and maximumfrequencyofoscillation(fmax)closeto200GHz(simulatedusing baselinetransistors) [13],severalexperimental60-GHztransceivershave beenreportedthatachievedataratesabove4Gb/sacrossa2-mlink [14 16].TheseprototypesdemonstratethepotentialtouseCMOSfor RF/basebandco-integration,andrevealthedesignchallengesandopportunitiesforimprovedRFperformance(e.g.,higherRFoutputpower,lower oscillatorphasenoise(PN),etc.)andlowerpowerconsumption. Nevertheless,III-Vprocessesstillhaveanicheinpoweramplifiersand antennaswitchesformobilephones/basestations,andultra-high-frequency, high-powerelectronicsformilitaryandspaceapplications.
Abetterunderstandingofthepropertiesofdeep-submicronCMOS technologiesiscrucialinordertoimplementhigh-performance mm-waveICs.Severalkeypropertiesaresummarizedhere,whichshould betakenintoaccountwhendecidingonthepreferredarchitecturesand designapproaches.
•Lowsupplyvoltage:comparedtoIII-Vandbipolartechnology,which relyonalargersupplyvoltage(3.3and2.5V),deep-submicron CMOSfeaturesanominalsupplyvoltageof B1V.
•Duetotheaforementionedlowsupplyvoltageofdeep-submicron CMOSandrelativelyhighthresholdvoltage(0.5Vandoftenhigher, duetothebodyeffect),theavailablevoltageheadroomisquitesmall. Thus,themarginbetweentechnologyperformanceanddesign requirementsappearslargerinthetimedomainthaninthevoltage domain [17]
•ExcellentswitchingcharacteristicsofMOStransistors—bothrise andfalltimesareontheorderoftensofpicosecondsorlessfor deep-submicronCMOStechnologies.
•Rapidpaceofprocessscaling—eachnewdigitalCMOSprocessnode occursroughlyevery18months,resultinginanincreaseinthedigital gatedensitybyafactorof2(knownasMoore’slaw [18]).
•Multiplemetallayersarecommonlyavailableforinterconnectioninlargescaledigitalcircuitry,whichalsoprovidehigh-densitymetal-oxide-metal capacitors.
Duetotheaforementionedpropertiesofdeep-submicronCMOS technologies,especiallythestrengthincircuitspeedanddensity,digitally assistedanddigitallyintensiveRFsystemsarebecomingattractivefor mm-wavetransceiverICs.WhenthedesignedRFsystememploysdigital logicandsignalprocessingextensivelytoobtainbetterRFperformance, itiscalled digitallyintensive.Comparedto analog-intensive architectures,the numberofpurelyanalogcircuitfunctionsinadigitallyintensive mm-wavetransceiverisreduced,whichresultsinadvantagesthat conventionaldigitaldesignflowshaveoveranalogdesignmethodologies. Amongthemare:reduceddesigncycletimesusingautomateddigital implementationtoolsandflow,easeoftestabilityviabuilt-inselftest, on-chipDSP,high-densitymemory,andautomaticfunctionaltesting withgoodfaultcoverage.Moreover,digitallyintensivearchitectureshave lowersensitivitytoprocess/deviceparametervariabilitycomparedtothe analogintensivesystems.Inaddition,digitalcircuitsprovidereconfigurabilitytocontroltheoperationmodeandimprovesystemperformance viapowerfulon-chipcalibrationtechniques,whichmayreducesilicon areaandpowerdissipationoftheSoC.
Notethatthe“digitallyintensive”termdoesn’timplythatanalog/RF designtechniquesarenotimportant.Onthecontrary,theyareascrucial asbefore.Theoverallsystemperformanceisusuallydominatedbyafew keyanalogcircuitblocks.Theessenceofthedigitallyintensiveapproach istomaketheinputs/outputs(IOs)oftheRF/analogbuildingblocks digitalsothatthesystemcanbemodeledandanalyzedusingthedigital designflow,withitsmanyadvantagesfordesignthroughputandyield. Consequently,itrequiresRF/analogdesignerstobeconversantwith digitalcircuitsandsystemdesign,toanalyzethesystemfrombothanalog anddigitalperspectives,andtocollaboratewithdigitaldesigners.
AgoodexampleofadigitallyintensivearchitectureisADPLL synthesizershownin Figure1.4.Itcontainsadigitallycontrolledoscillator, whichmayoscillateinthegigahertzrangeandiscontrolledbyadigital oscillatortuningword(OTW).ThegigahertzDCOoutput(usually followedbyaninvert-basedbuffer)hassharprising/fallingedgeswhen implementedindeep-submicronCMOStechnologieswith fT above 100GHz,thusbehavinglikeadigitalclock.Thetime-to-digitalconverter (TDC)measuresandquantizesthetimedifferencebetweenthereference andDCOclocktransitionedges.Thenthedigitizedphaseerrorisfiltered byadigitalloopfilter(LF)andeventuallyconvertedtotheOTWinorder totunetheoscillatortothedesiredfrequency.AlthoughtheDCOand TDCarebothanaloginnature,allbuildingblocksintheADPLLare definedasdigitalattheI/Olevel,andthereforetheloopcontrolcircuitry isimplementedinafullydigitalmanner,asillustratedin Figure1.4.
ThisADPLLarchitecturehasbeenusedinmassproductionfor RFconnectivityand2G/3Gmobilecommunications [17].Withthe improvedRFcapabilityof65-nmCMOStechnology,digitallyintensive frequencysynthesiscouldbeexploredinthemm-waverange,which isover10 3 thepreviouslyprovenfrequencyrange.Suchmm-wave
ADPLLincreasesthereconfigurabilityoffrequencygenerationina mm-wavetransceiver.Moreover,FMcanbeincorporatedtheretoforma digitaltransmitterwiththepotentialforsuperiormodulationqualityand lowercostinmassproduction.
Torealizelow-cost,yethigh-performancemm-wavetransceiversinCMOS technology,newconceptsinICimplementationsforultra-widebandsignal generationandmm-wavefront-endsarenecessary.Thisbookfocuseson frequencysynthesis,whichiscriticaltomanymoderncommunication systems.Duetothehighoperatingfrequency,finefrequencyresolution,and widebandlinearFMrequirements,afullyintegratedmm-wavefrequency synthesizerhasvariousdesignchallengesthatarediscussedinthefollowing sections.
Beforethisvery60-GHzall-digitalphase-lockedloop(PLL)thatwillbe elaboratedinthisbook,therehadbeennootherreportedsuccessful fractional-Nsynthesizerimplementationsabove10GHzforwireless applicationsthatwouldemployanall-digitalapproach.Therewere, however,tworeportsofdigitalPLLsynthesizers [19,20] operatingat20 and40GHz,respectively,usedforhigh-speedserialwirelineapplications, andnumeroussuccessfulADPLLdemonstratorsoperatingbelow10GHz forvariouswirelessapplications,forexample,bluetooth,cellular,WLAN, WiMAX,etc. [21 24].Forlow-gigahertzapplications,anLCoscillator isnormallyusedtosatisfystringentPNrequirements,inwhichthe tuningoftheoscillationfrequencyisachievedviadigitalcontrolofan arrayofMOSvaractorsthatoperateinflatregionsoftheir C V curve.It iswell-knownthatthePNofanLCoscillatorintheupconverted thermalnoiseor 1/f 2 regime(i.e.,outsidetheloopbandwidthofaPLL synthesizer)isinverselyproportionaltothesquareofthetankquality factor Q [25].Thetank Q-factorbelow10GHzisdominatedbythe Q-factoroftheinductor,whilethevaractor Q-factorisnormallymuch higher(e.g., B100at2GHz)ina65-nmCMOStechnology.
However,thisisoppositetothesituationatmm-wavefrequencies. Figure1.5 plotsthe Q-factorandcapacitance(Cv)versusbiasvoltagefor n 1 /n-wellandp 1 /p-wellaccumulationmodevaractorsina65-nm CMOStechnologyatminimumgatelength [26]. Q-factorvarieswith
Figure1.5 Capacitanceand Q-factorat60GHzversusgatevoltageforminimum length,thin-oxideaccumulationmodevaractors(65-nmCMOS) [26]
bias(duetochanging Cv)andisapproximately20or5intheflatregions. Whiletheinductor Q-factor(QL)increaseswithincreasingfrequency, the Q-factorofcapacitorsandvaractors(QC)isinverselyproportionalto frequency.Therefore, Q ofthetankcapacitance(varactorplusparasitics) becomestheprimaryfactorlimitingthequalityoftunableon-chip resonators,andthePNperformanceofmm-waveoscillators.Power consumptionoftheoscillatormustthereforebeincreasedinorderto maintainsignalswingandcompensateforgreaterlossesintheLCtank.
Inaddition,afrequencydividerchainisnecessarytobringthecarrier frequencydowntoafewGHzforfurtherprocessingbythedigitalphase detector.Therearestrongtrade-offsbetweenpower,chiparea(inductors), maximumoperatingfrequency,andoperatingrangeinthedividerchain design,whichnormallydissipatesmorethan50%ofthetotalpowerina mm-waveanalogPLL [27].Moreover,thedivider’soperatingrangeshould bealignedwiththeDCOfrequencytuningrangeinthepresenceof process,voltage,andtemperature(PVT)variations.Thedividerchain introducesextradelayintheloopandmayaffectthestabilityofthePLL. Allthesebringextrachallengestothedesignofmm-waveADPLLs.
AlthoughthedigitallyintensivenatureoftheADPLLpermitsthefast system-levelsimulationandverificationbyanevent-drivensimulator,the transistorsizingandphysicallayoutofthekey“analog-nature”building blocks,suchasDCO,dividerchain,andTDChavetobe“handcrafted” accordingtothedesignspecifications,andthenmodeledatthebehavioral levelfortheclosed-loopsimulations.Comparedtodesignforlow-GHz
applications,theinterconnectionsbetweenmm-wavefrequencybuilding blocksaffectsthesystemperformanceduetoparasiticcapacitance,losses, andunwantedcapacitiveandmagneticcouplingeffects.Therefore,intensiveelectromagneticsimulationisalsorequiredforasuccessfulADPLL designinthemm-waveregime.
Asmentionedearlier,onemajorbenefitofthe60-GHzbandisthe7-GHz worthofunlicensedbandwidth.Whenthe7-GHzbandwidthisfully employed,the60-GHzFMCWradar,asshownin Figure1.3,cantheoreticallyachievearangeresolutionasfineas2cm.SincePVTvariationsmust beaccommodatedbythetuningrangeoftheoscillator,awiderthan9-GHz tuningrangeisdesiredtoensurefullcoverageoftheentire60-GHzband. However,atuningrangelessthan5%istypicallyexpectedforanLC voltage-controlledoscillator(VCO)operatingatthesefrequencies [26]
Thetank Q-factorandfractionaltuningbandwidthfortanks optimizedateachfrequencyareplottedin Figure1.6 (schematicshown inset),usingsimulationsinthesame65-nmRF-CMOStechnologyas Figure1.5[26].Inordertoconstructthetuningrangecurve,wefirst
Figure1.6 Optimumtank Q-factorandfractionaltuningrangeforresonatorsin 65-nmRF-CMOSfromsimulation(basedonsimulationswith Cfixed 5 20fF) [26]
providelinearwidebandFMcapability.Forexample,ina60-GHz FMCWradartransceivershownin Figure1.3,thefrequencyofthe transmitsignalislinearlyrampingupanddownacross5-GHzrange. Theradarrangeresolutionisdeterminedby Eq.(1.1) anddegradeswith thesweepnonlinearity [12].However,inpractice,theDCOtuningmust besegmentedintocoarse-andfine-tuningbanks,eachwithdifferent tuningstep, KDCO (definedasfrequencychangeperbit)torealizehigh resolutionandawidetuningrangesimultaneously.Consequently,the widebandtriangularmodulation,asshownin Figure1.3a hastotraverse throughvarioustuningbanksandrelyonlinearized KDCO acrossmultiple banks.Moreover,thetuningstepmismatchesinsideeachbankalso introducenonlinearitiesintheFM.Dummystructurescanbeaddedin thephysicallayouttoimprovethematchingperformancebuttheymay notbepossibleatmm-wavefrequenciesduetotheincreasedparasitics andreducedoveralltuningrange.Alternatively,digitalcalibrationand compensationtechniquesshouldbedevelopedandappliedtoimplement thewidebandtriangularmodulation.Inaddition,sincethe Q-factorof thetankalsovariesfrom20to5acrossthemodulationrange (Figure1.5),theoutputswingoftheoscillatormayvarybymorethan 3dB.Theoutputbuffermustcompensateforthesignalpowerfluctuation acrossthemodulationrangeandproduceachirpwithaflatoutputpower (e.g., 6 dB)attheFMCWtransmitteroutput.
Toaddresstheaforementionedconcernsandissuesforhighperformancefrequencysynthesisatmm-wavefrequencies,somenew circuitsandsystemarchitecturesarrangementshavetobediscovered.In thisbook,alternativedesignapproachesandarchitectureformm-wave PLLsareexplored.Weusea60-GHzall-digitalPLLforFMCWradar applicationasadesignexample.ThePLLarchitecture,mm-wavecircuit design,andtheDSPtechniquesdevelopedinthisparticularworkcanbe universallyappliedtoothermm-waveapplicationsthatfocusonhigh performanceandlowcost.
[1]IEEEP802.11ac/D4.0,Part11:wirelessLANmediumaccesscontrolandphysical layerspecifications—amendment4:enhancementsforveryhighthroughputfor operationinbandsbelow6GHz,November2012.
[2]P.Adhikari,Understandingmillimeterwavewirelesscommunication,2008[online]. Available: , http://www.loeacom.com/pdf%20files/L1104-WP_Understanding% 20MMWCom.pdf .
[3]FederalCommunicationsCommission,Title47:telecommunicationpart2—frequencyallocationsandradiotreatymatters;generalrulesandregulations,May6, 2008[online].Available: , http://www.gpo.gov/fdsys/pkg/CFR-2010-title47-vol1/ pdf/CFR-2010-title47-vol1-part2.pdf .
[4]FederalCommunicationsCommission.Revisionofpart15ofthecommission’s rulesregardingultra-widebandtransmissionsystems,April22,2002[online]. Available: , http://transition.fcc.gov/Bureaus/Engineering_Technology/Orders/ 2002/fcc02048.pdf .
[5]InternationalTechnologyRoadmapforSemiconductors.Radiofrequencyand analog/mixed-signaltechnologiesforwirelesscommunications,2009[online]. Available: , http://www.itrs.net/Links/2009ITRS/2009Chapters_2009Tables/ 2009_Wireless.pdf .
[6]H.J.Liebe,D.H.Layton.Millimeter-wavepropertiesoftheatmosphere:laboratory studiesandpropagationmodeling,October1987[online].Available: , http://www. its.bldrdoc.gov/pub/ntia-rpt/87-224/index.php .
[7]IEEE802.15.3c.Part15.3:wirelessmediumaccesscontrol(MAC)andphysicallayer (PHY)specificationsforhighratewirelesspersonalareanetworks(WPANs): amendment2:millimeter-wavebasedalternativephysicallayerextension,October 2009.
[8]ECMAInternational.StandardECMA-387:highrate60GHzPHY,MACand HDMIPAL,December2008[online].Available: , http://www.ecma-international. org/publications/files/ECMA-ST/ECMA-387.pdf .
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[10]IEEE802.11ad.Part11:wirelessLANmediumaccesscontrol(MAC)andphysical layer(PHY)specificationsamendment3:enhancementsforveryhighthroughputin the60GHzband,2012.
[11] J.A.Scheer,J.L.Kurtz,CoherentRadarPerformanceEstimation,ArtechHouse, Inc.,Boston,MA,1993.
[12]G.MBrooker,UnderstandingmillimeterwaveFMCWradars,in:Proceedingsof InternationalConferenceonSensingTechnology,November2005,pp.152 157.
[13]Z.Luo,A.Steegen,M.Eller,etal.,Highperformanceandlowpowertransistors integratedin65nmbulkCMOStechnology,in:IEEEInternationalElectron DeviceMeeting(IEDM)DigestofTechnicalPapers,2004,pp.661 664.
[14] A.Tomkins,R.A.Aroca,T.Yamamoto,S.T.Nicolson,Y.Doi,S.P.Voinigescu,A zero-IF60GHz65nmCMOStransceiverwithdirectBPSKmodulation demonstratingupto6Gb/sdataratesovera2mwirelesslink,IEEEJ.Solid-State Circuits44(8)(2009)2085 2099.
[15] K.Okada,N.Li,K.Matsushita,K.Bunsen,R.Murakami,A.Musa,etal.,A 60-GHz16QAM/8PSK/QPSK/BPSKdirect-conversiontransceiverfor IEEE802.15.3c,IEEEJ.Solid-StateCircuits46(12)(2011)2988 3004.
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[17] R.B.Staszewski,P.T.Balsara,All-DigitalFrequencySynthesizerinDeep-Submicron CMOS,WILEY-Interscience,Hoboken,NJ,2006.
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Contents
2.1 FrequencySynthesizerFundamentals17
2.1.1 PNinOscillators18
2.1.2 FrequencySynthesizerinaRadioTransceiver20
2.1.3 MethodsforFrequencySynthesis21
2.2 Phase-LockedLoop23
2.2.1 Charge-PumpPLL24
2.2.2 All-DigitalPLL26
2.3 Millimeter-WavePLLArchitectures28
2.3.1 PLLwithaFundamentalOscillator28
2.3.2 PLL-BasedHarmonicGeneration29
2.4 Summary32 References33
Alocaloscillator(LO)isrequiredinhigh-performanceradiotransceiversirrespectiveofthearchitecture.ItisemployedtotranslatetheRF signaldowntoanintermediatefrequencyorbasebandinreceivers, andviceversaintransmitters.TheLOhastobetunableacrosstheRF bandandthefrequencyresolutionhastobeatleastequaltothe channelspacing.AfrequencysynthesizeristypicallyusedastheLOin RFtransceiverstoovercomethedriftsinoscillatorfrequencydueto temperaturevariations.ThesynthesizerprovidesastableRFcarrier withhighspectralpurity,ideallyacrossawidefrequencyspan. RFfrequencysynthesizersremainoneofthemostchallengingblocks inmanywirelesssystems(e.g.,mobilecommunications).Thechoiceof frequencysynthesisapproachdependsonfactorssuchasphasenoise (PN),permissiblespuriousoutputlevels,switchingrate,frequency resolution,cost,andcomplexity.
AnidealLOoperatingatangularfrequency ω c ,producesasinusoidal outputversustimeoftheform yðt Þ 5 AUcosðω c t 1 ϕÞ,where A isthe amplitudeand ϕ isanarbitraryandfixedphase.Thezero-crossingsoccur atintegermultiplesoftheperiod, Tc 5 2π=ω c .Inthefrequencydomain, allofitspowerisconcentratedatasinglefrequency, ω c ,asshownin Figure2.1a.However,noisesourcesinsidepracticaloscillatorcircuits (e.g.,fromtransistors)perturbthezerocrossingsrandomly.Therefore, boththeamplitudeandphasevaryrandomlywithtime.Inmostcases, thechangeinamplitudeisremovedbyalimitingbuffercircuit,and thereforeonlytherandomdeviationofthephasemustbeconsidered:
where ϕn ðt Þ isasmall,randomphasequantitythatcausesthezerocrossingstodeviatefromintegermultiplesof Tc .Consequently,theoscillator frequencyspectrumspreadsaround ω c (Figure2.1b).Thephasefunction ϕn ðt Þ inthetimedomainisobservedasspectralspreadinginthe frequencydomainandiscalledPN [1]
PNofRFoscillatorsisnormallycharacterizedinthefrequency domain.Forasmallvalueofthephasefluctuation, jϕn ðt Þj{1radian, Eq.(2.1) canbesimplifiedto
whichmeansthatthespectrumof ϕn ðt Þ isfrequency-translatedto 6 ω c . Thus,thedecliningskirtsin Figure2.1b areduetothephasefluctuation ϕn ðt Þ
Figure2.1 Outputspectrumof(a)idealand(b)practicaloscillators.