InPraiseof DigitalDesign andComputerArchitecture
ARM® Edition
HarrisandHarrishavedonearemarkableandcommendablejobin creatingatruetextbookwhichclearlyshowstheirloveandpassionfor teachingandeducating.Thestudentswhoreadthisbookwillbethankful toHarrisandHarrisformanyyearsaftergraduation.Thewritingstyle, theclearness,thedetaileddiagrams,theflowofinformation,thegradual increaseinthecomplexityofthesubjects,thegreatexamplesthroughout thechapters,theexercisesattheendofthechapters,theconciseyetclear explanations,theusefulreal-worldexamples,thecoverageofallaspects ofeachtopic allofthesethingsaredoneverywell.Ifyouareastudent usingthisbookforyourcoursegetreadytohavefun,beimpressed,and learnagreatdealaswell!
MehdiHatamian ,Sr.VicePresident,Broadcom
HarrisandHarrishavedoneanexcellentjobcreatingthisARMversion oftheirpopularbook, DigitalDesignandComputerArchitecture.RetargetingtoARMisachallengingtask,buttheauthorshavedoneitsuccessfullywhilemaintainingtheirclearandthoroughpresentationstyle,as wellastheiroutstandingdocumentationquality.Ibelievethisnewedition willbeverymuchwelcomedbybothstudentsandprofessionals.
DonaldHung,SanJoseStateUniversity
OfallthetextbooksI’vereviewedandassignedinmy10yearsasaprofessor, DigitalDesignandComputerArchitecture isoneofonlytwothat isunquestionablyworthbuying.(Theotheris ComputerOrganization andDesign.)Thewritingisclearandconcise;thediagramsareeasyto understand;andtheCPUtheauthorsuseasarunningexampleiscomplexenoughtoberealistic,yetsimpleenoughtobethoroughlyunderstoodbymystudents.
ZacharyKurmas,GrandValleyStateUniversity
DigitalDesignandComputerArchitecture bringsafreshperspectiveto anolddiscipline.Manytextbookstendtoresembleovergrownshrubs, butHarrisandHarrishavemanagedtopruneawaythedeadwoodwhile preservingthefundamentalsandpresentingtheminacontemporarycontext.Indoingso,theyofferatextthatwillbenefitstudentsinterestedin designingsolutionsfortomorrow’schallenges.
JimFrenzel,UniversityofIdaho
HarrisandHarrishaveapleasantandinformativewritingstyle.Their treatmentofthematerialisatagoodlevelforintroducingstudentstocomputerengineeringwithplentyofhelpfuldiagrams.Combinationalcircuits, microarchitecture,andmemorysystemsarehandledparticularlywell.
JamesPinter-Lucke ,ClaremontMcKennaCollege
HarrisandHarrishavewrittenabookthatisveryclearandeasyto understand.Theexercisesarewell-designedandthereal-worldexamples areanicetouch.Thelengthyandconfusingexplanationsoftenfoundin similartextbooksarenotseenhere.It’sobviousthattheauthorshave devotedagreatdealoftimeandefforttocreateanaccessibletext. Istronglyrecommend DigitalDesignandComputerArchitecture.
PeiyiZhao,ChapmanUniversity
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Notices
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AllmaterialrelatingtoARM® technologyhasbeenreproducedwithpermission fromARMLimited,andshouldonlybeusedforeducationpurposes.AllARM-basedmodels shownorreferredtointhetextmustnotbeused,reproducedordistributed forcommercialpurposes,andinnoeventshallpurchasingthistextbookbeconstruedasgranting youoranythirdparty,expresslyorbyimplication,estoppelorotherwise, alicensetouseanyotherARMtechnologyorknowhow.Materialsprovidedby ARMarecopyright © ARMLimited(oritsaffiliates).
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Chapter2 CombinationalLogicDesign
2.10 Summary ................................................95 Exercises ..................................................97 InterviewQuestions ......................................106
Chapter3 SequentialLogicDesign ..........................
3.1 Introduction.............................................109
3.2 LatchesandFlip-Flops ...................................109
3.2.1 SRLatch .......................................111
3.2.2 DLatch ........................................113
3.2.3 DFIip-Flop .....................................114
3.2.4 Register .........................................114
3.2.5 EnabledFlip-Flop ...............................115
3.2.6 ResettableFlip-Flop ..............................116
3.2.7 Transistor-LevelLatchandFlip-FlopDesigns ......116
3.2.8 PuttingItAllTogether ...........................118
3.3 SynchronousLogicDesign.. ..............................119
3.3.1 SomeProblematicCircuits ........................119
3.3.2 SynchronousSequentialCircuits ..................120
3.3.3 SynchronousandAsynchronousCircuits ...........122
3.4 FiniteStateMachines ....................................123
3.4.1 FSMDesignExample ............................123
3.4.2 StateEncodings .................................129
3.4.3 MooreandMealyMachines ......................132
3.4.4 FactoringStateMachines .........................134
3.4.5 DerivinganFSMfromaSchematic ...............137
3.4.6 FSMReview ....................................140
3.5 TimingofSequentialLogic. ..............................141
3.5.1 TheDynamicDiscipline ..........................142
3.5.2 SystemTiming ..................................142
3.5.3 ClockSkew .....................................148
3.5.4 Metastability ....................................151
3.5.5 Synchronizers ...................................152
3.5.6 DerivationofResolutionTime ....................154
3.6 Parallelism ..............................................157 3.7 Summary ...............................................161 Exercises ................................................162 InterviewQuestions ......................................171
Chapter4 HardwareDescriptionLanguages
.................. 173
4.1 Introduction.............................................173
4.1.1 Modules ........................................173
4.1.2 LanguageOrigins ...............................174
4.1.3 SimulationandSynthesis .........................175
7.4 MulticycleProcessor. ....................................406
7.4.1 MulticycleDatapath .............................407
7.4.2 MulticycleControl ...............................413
7.4.3 PerformanceAnalysis ............................421
7.5 PipelinedProcessor.. ....................................425
7.5.1 PipelinedDatapath ..............................428
7.5.2 PipelinedControl ................................430
7.5.3 Hazards ........................................431
7.5.4 PerformanceAnalysis
7.6 HDLRepresentation. ....................................443
7.6.1 Single-CycleProcessor
7.6.2 GenericBuildingBlocks
7.6.3 Testbench .......................................452
7.7 AdvancedMicroarchitecture ..............................456
7.7.1 DeepPipelines ..................................457
7.7.2 Micro-Operations
7.7.3 BranchPrediction
7.7.4 SuperscalarProcessor
7.7.5 Out-of-OrderProcessor
7.7.6 RegisterRenaming
7.7.7 Multithreading ..................................467
7.7.8 Multiprocessors .................................468
7.8 Real-WorldPerspective:EvolutionofARM Microarchitecture ........................................470
7.9
8.3 Caches.. ................................................492
8.3.1 WhatDataisHeldintheCache? .................493
8.3.2 HowisDataFound? .............................494
8.3.3 WhatDataisReplaced? ..........................502
8.3.4 AdvancedCacheDesign ..........................503
8.3.5 TheEvolutionofARMCaches ...................507
8.4 VirtualMemory .........................................508
8.4.1 AddressTranslation .............................510
8.4.2 ThePageTable ..................................512
8.4.3 TheTranslationLookasideBuffer .................514
8.4.4 MemoryProtection ..............................515
8.4.5 ReplacementPolicies .............................516
8.4.6 MultilevelPageTables ...........................516
Preface
Thisbookisuniqueinitstreatmentinthatitpresentsdigitallogicdesign fromtheperspectiveofcomputerarchitecture,startingatthebeginning with1’sand0’s,andleadingthroughthedesignofamicroprocessor.
Webelievethatbuildingamicroprocessorisaspecialriteofpassagefor engineeringandcomputersciencestudents.Theinnerworkingsofaprocessorseemalmostmagicaltotheuninitiated,yetprovetobestraightforward whencarefullyexplained.Digitaldesigninitselfisapowerfulandexciting subject.Assemblylanguageprogrammingunveilstheinnerlanguagespoken bytheprocessor.Microarchitectureisthelinkthatbringsitalltogether.
Thefirsttwoeditionsofthisincreasinglypopulartexthavecoveredthe MIPSarchitectureinthetraditionofthewidelyusedarchitecturebooksby PattersonandHennessy.AsoneoftheoriginalReducedInstructionSet Computingarchitectures,MIPSiscleanandexceptionallyeasytounderstand andbuild.MIPSremainsanimportantarchitectureandhasbeeninfused withnewenergyafterImaginationTechnologiesacquireditin2013.
Overthepasttwodecades,theARMarchitecturehasexplodedin popularitybecauseofitsefficiencyandrichecosystem.Morethan50billionARMprocessorshavebeenshipped,andmorethan75%ofhumans ontheplanetuseproductswithARMprocessors.Atthetimeofthiswriting,nearlyeverycellphoneandtabletsoldcontainsoneormoreARM processors.ForecastspredicttensofbillionsmoreARMprocessorssoon controllingtheInternetofThings.Manycompaniesarebuildinghigh-performanceARMsystemstochallengeIntelintheservermarket.Becauseof thecommercialimportanceandstudentinterest,wehavedevelopedthis ARMeditionofthisbook.
Pedagogically,thelearningobjectivesoftheMIPSandARMeditions areidentical.TheARMarchitecturehasanumberoffeaturesincluding addressingmodesandconditionalexecutionthatcontributetoitsefficiencybutaddasmallamountofcomplexity.Themicroarchitecturesalso areverysimilar,withconditionalexecutionandtheprogramcounter beingthelargestchanges.ThechapteronI/OprovidesnumerousexamplesusingtheRaspberryPi,averypopularARM-basedembeddedLinux singleboardcomputer.
WeexpecttoofferbothMIPSandARMeditionsaslongasthemarketdemands.
HOWTOUSETHESOFTWARETOOLSINACOURSE
AlteraQuartusII
QuartusIIWebEditionisafreeversionoftheprofessional-strength Quartus™ IIFPGAdesigntools.Itallowsstudentstoentertheirdigital designsinschematicorusingeithertheSystemVerilogortheVHDLhardware descriptionlanguage(HDL).Afterenteringthedesign,studentscansimulate theircircuitsusingModelSim™-AlteraStarterEdition,whichisavailable withtheAlteraQuartusIIWebEdition.QuartusIIWebEditionalsoincludes abuilt-inlogicsynthesistoolsupportingbothSystemVerilogandVHDL.
ThedifferencebetweenWebEditionandSubscriptionEditionisthat WebEditionsupportsasubsetofthemostcommonAlteraFPGAs.The differencebetweenModelSim-AlteraStarterEditionandModelSimcommercialversionsisthattheStarterEditiondegradesperformancefor simulationswithmorethan10,000linesofHDL.
Keil'sARMMicrocontrollerDevelopmentKit(MDK-ARM)
Keil'sMDK-ARMisatoolfordevelopingcodeforanARMprocessor.It isavailableforfreedownload.TheMDK-ARMincludesacommercial ARMCcompilerandasimulatorthatallowsstudentstowritebothC andassemblyprograms,compilethem,andthensimulatethem.
LABS
Thecompanionsiteincludeslinkstoaseriesoflabsthatcovertopics fromdigitaldesignthroughcomputerarchitecture.ThelabsteachstudentshowtousetheQuartusIItoolstoenter,simulate,synthesize,and implementtheirdesigns.ThelabsalsoincludetopicsonCandassembly languageprogrammingusingtheMDK-ARMandRaspberryPidevelopmenttools.
Aftersynthesis,studentscanimplementtheirdesignsusingtheAltera DE2(orDE2-115)DevelopmentandEducationBoard.Thispowerful andcompetitivelypricedboardisavailablefromwww.altera.com.The boardcontainsanFPGAthatcanbeprogrammedtoimplementstudent designs.Weprovidelabsthatdescribehowtoimplementaselectionof designsontheDE2BoardusingQuartusIIWebEdition.
Torunthelabs,studentswillneedtodownloadandinstallAlteraQuartusIIWebEditionandeitherMDK-ARMortheRaspberryPitools.Instructorsmayalsochoosetoinstallthetoolsonlabmachines.Thelabsinclude instructionsonhowtoimplementtheprojectsontheDE2Board.The implementationstepmaybeskipped,butwehavefounditofgreatvalue. WehavetestedthelabsonWindows,butthetoolsarealsoavailable forLinux.
BUGS
Asallexperiencedprogrammersknow,anyprogramofsignificantcomplexityundoubtedlycontainsbugs.So,too,dobooks.Wehavetaken greatcaretofindandsquashthebugsinthisbook.However,someerrors undoubtedlydoremain.Wewillmaintainalistoferrataonthebook’s webpage.
Pleasesendyourbugreportstoddcabugs@gmail.com.Thefirstpersontoreportasubstantivebugwithafixthatweuseinafutureprinting willberewardedwitha$1bounty!