AdvancesinSemiconductorTechnologies
SelectedTopicsBeyondConventionalCMOS
Editedby AnChen
IBMResearch–Almaden,CA,USA
Copyright©2023byTheInstituteofElectricalandElectronicsEngineers,Inc.Allrightsreserved.
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LibraryofCongressCataloging-in-PublicationData:
Names:Chen,An(Electronicsengineer),editor.
Title:Advancesinsemiconductortechnologies:selectedtopicsbeyond conventionalCMOS/AnChen.
Description:Hoboken,NewJersey:Wiley-IEEEPress,[2023]|Includes bibliographicalreferencesandindex.
Identifiers:LCCN2022018684(print)|LCCN2022018685(ebook)|ISBN 9781119869580(cloth)|ISBN9781119869597(adobepdf)|ISBN 9781119869603(epub)
Subjects:LCSH:Semiconductors.
Classification:LCCTK7871.85.A35652023(print)|LCCTK7871.85(ebook) |DDC621.3815/2–dc23/eng/20220627
LCrecordavailableathttps://lccn.loc.gov/2022018684
LCebookrecordavailableathttps://lccn.loc.gov/2022018685
Coverimage:©BlueAndy/Shutterstock
Coverdesign:Wiley
Setin9.5/12.5ptSTIXTwoTextbyStraive,Chennai,India
Contents
Preface xi
ListofContributors xv
1HeterogeneousIntegrationatScale 1 SubramanianS.IyerandBorisVaisband
1.1Introduction 1
1.2TechnologyAspectsofHeterogeneousIntegration 4
1.2.1InterconnectPitch 4
1.2.2SubstrateMaterial 5
1.2.3Inter-DieSpacing 6
1.2.4DieSizeConsiderations 6
1.2.5DielettoSubstratePitchConsiderations 8
1.2.6BackwardCompatibility 8
1.3DesignandArchitectureofHeterogeneousIntegrationPlatforms 9
1.3.1PowerDeliveryandThermalManagement 9
1.3.2Floorplanning 11
1.3.3Communication 12
1.4ReliabilityofHeterogeneousIntegrationSystems 14
1.5ApplicationSpaceofHeterogeneousIntegration 17
1.6FutureofHeterogeneousIntegration 18
1.7Summary 20 References 21
2HyperdimensionalComputing:AnAlgebraforComputingwithVectors 25 PenttiKanerva
2.1Introduction 25
2.2Overview:ThreeExamples 26
2.2.1BindingandReleasingwithMultiplication 26
2.2.2SuperposingwithAddition 26
2.2.3SequenceswithPermutation 28
2.3OperationsonVectors 28
2.4DataStructures 30
2.5VectorSumsEncodeProbabilities 32
2.6DecodingaProduct 33
2.7High-DimensionalVectorsatLarge 34
2.8MemoryforHigh-DimensionalVectors 35
2.9OutlineofSystemsforAutonomousLearning 36
2.10Energy-Efficiency 37
2.11DiscussionandFutureDirections 37 References 40
3CADforAnalog/Mixed-SignalIntegratedCircuits 43
AhmetF.Budak,DavidZ.Pan,HaoChen,KerenZhu,MingjieLiu,MohamedB.Alawieh, ShuhanZhang,WeiShi,andXiyuanTang
3.1Introduction 43
3.2Front-EndCAD 45
3.2.1CircuitArchitectureandTopologyDesignSpaceExploration 45
3.2.2DeviceSizing 46
3.2.2.1AMSCircuitSizing:ProblemFormulation 46
3.2.2.2MethodsforAMSCircuitSizing 47
3.3LayoutAutomation 48
3.3.1ProceduralLayoutGeneration 49
3.3.2Optimization-BasedLayoutSynthesis 50
3.4Post-LayoutExtractionandVerification 52
3.5Conclusion 53 Acknowledgments 53 References 53
4MagnetoelectricTransistorDevicesandCircuitswithSteeringLogic 61
AndrewMarshallandPeterA.Dowben
4.1Introduction 61
4.2SimpleLogicFunctionswiththeMEFET“SteeringLogic” 62
4.3LogicFunctions–MajorityGate 64
4.4TheFullAdderandtheDualXOR(Sum)Gates 67
4.5LatchandMemory 70
4.6TheJKMaster–SlaveFlip-Flop 72
4.7Conclusion 75 Acknowledgments 75 References 75
5NonvolatileMemoryBasedArchitecturesUsingMagnetoelectricFETs 79
ShaahinAngizi,DeliangFan,AndrewMarshall,andPeterA.Dowben
5.1Introduction 79
5.2MagnetoelectricFieldEffectTransistor(MEFET) 79
5.31T-1MMemoryDesignBasedontheMEFET 81
5.3.1ReadOperation 81
5.3.2WriteOperation 82
5.42T-1MMemoryDesignBasedontheMEFET 84
5.4.1ReadOperation 85
5.4.2WriteOperation 86
5.5MEFETSteeringMemory 87
5.6Evaluation 90
5.6.1ComparativeReadTime 90
5.6.2ComparativeWriteTime 90
5.6.3ComparisonofCellAreas 90
5.7Conclusion 91 Acknowledgments 91 References 91
6OrganicElectronics 93 HagenKlauk
6.1Introduction 93
6.2OrganicLight-EmittingDiodes 94
6.3OrganicSolarCells 96
6.4OrganicThin-FilmTransistors 97
6.5Outlook 101 References 102
7Active-MatrixElectroluminescentDisplays 109 XiaojunGuo,Li’angDeng,andArokiaNathan
7.1Introduction 109
7.2Light-EmittingDiodesforDisplays 110
7.2.1ThermallyEvaporatedOLEDs 110
7.2.2RealizationofFullColorDisplays 111
7.2.3PrintedDisplays 113
7.2.4Micro-LED 114
7.3TFTBackplanes 115
7.4DrivingSchemesandPixelCircuits 116
7.4.1AnalogDriving 117
7.4.2CompensationforVoltageProgramming 118
7.4.2.1InternalCompensation 118
7.4.2.2ExternalCompensation 119
7.4.3DigitalDriving 120
7.4.4HybridDriving 123
7.5Conclusion 124 References 124
8OrganicandMacromolecularMemory–NanocompositeBistableMemory Devices 133 ShashiPaul
8.1Introduction 133
8.1.1WhatIsanElectronicMemoryDevice? 133
8.2OrganicMemoryandItsEvolution 137
8.2.1MolecularMemory 137
8.2.2PolymerMemoryDevices 139
8.3Summary 146 Acknowledgment 147 References 147
FurtherReading/Resources 151 RelatedArticles(SeeAlso) 151
9NextGenerationofHigh-PerformancePrintedFlexibleElectronics 153 AbhishekS.Dahiya,YogeenthKumaresan,andRavinderDahiya
9.1Introduction 153
9.2PrintingTechnologies 155
9.3High-PerformancePrintedDevicesandCircuitsUsingNano-to-ChipScale Structures 158
9.3.1NanoscaleStructures 158
9.3.2MicroscaleStructures 162
9.3.3Chip-Scale(orMacroscale)Structures 165
9.4ChallengesandFutureDirections 168
9.4.1IntegrationofNano-to-ChipScaleStructures 168
9.4.2TechnologicalChallenges 169
9.4.3Robustness 169
9.4.4Disposability 170
9.4.5ModelingforFlexibleElectronics 170
9.4.6PowerConsumption 170
9.5Summary 171 References 171
10HybridSystems-in-Foil 183 MouradElsobky
10.1Introduction 183
10.1.1System-LevelConcept 183
10.2EmergingApplications 185
10.2.1SmartLabelsforLogisticsTracking 185
10.2.2ElectronicSkin 187
10.2.2.1E-SkinwithEmbeddedAI 187
10.2.3Biomedical 189
10.3IntegrationTechnologies 191
10.3.1SubstrateandInterconnectMaterials 191
10.3.2Flex-PCB 191
10.3.3Wafer-BasedProcessing 193
10.3.3.1ChipFilmPatch 193
10.3.4Challenges 194
10.3.4.1SurfaceTopography 194
10.3.4.2ThermalStress 196
10.3.4.3AssemblyandPositioningErrors 196
10.4State-of-the-ArtComponents 196
10.4.1ActiveElectronics 197
10.4.1.1Microcontrollers 197
10.4.1.2SensorFrontends 197
10.4.1.3SensorAddressingandMultiplexing 200
10.4.2PassiveComponentsandSensors 200
10.4.2.1FlexibleAntennas 200
10.4.2.2HySiF-CompatibleSensors 201
10.5HySiFTesting 202
10.6ConclusionandFutureDirections 204 References 204
11OpticalDetectors 211
LisNanverandTihomirKneževi ´ c
11.1Introduction 211
11.2SiPhotodiodesDesignedinCMOS 213
11.3UltravioletPhotodetectors 217
11.4InfraredOpticalDetectors 219
11.4.1DetectorsforPhotonicIntegratedCircuits 220
11.4.2InfraredPhotoconductiveDetectors 223
11.4.3ThermalInfraredDetectors 224
11.5EmergingDevices 225
11.6ConcludingRemarks 226 References 227
12EnvironmentalSensing 231
TarekZaki
12.1Motivation 231
12.1.1AirPollution 231
12.1.2HazardousPollutants 232
12.1.3AirQualityIndex 233
12.1.4AirMonitoringNetwork 234
12.1.5Hand-HeldDevices 236
12.2ParticulateMatter(PM)Sensing 238
12.2.1ParticulateMatter(PM) 238
12.2.2SensingMechanisms 239
12.2.3OpticalParticleCounter(OPC) 241
12.2.4ParticleSizeDistributions 242
12.2.5MiniaturizedOpticalPMSensing 243
12.3VolatileOrganicCompounds(VOCs)Sensing 244
12.3.1VolatileOrganicCompounds(VOCs) 244
12.3.2SensingMechanisms 246
12.3.3MOX-BasedSensors 247 References 249
13InsulatedGateBipolarTransistors(IGBTs) 255
ThomasLaska
13.1Introduction 255
13.2State-of-the-ArtIGBTTechnology 257
13.2.1StructuralBasicswithRespecttoBlocking,ONStateandSwitching 257
13.2.2CellandVerticalDesign 258
13.2.3WaferTechnology 259
13.2.4Reverse-BlockingandReverse-ConductingIGBTs 259
13.2.5IncreasingMaximumJunctionTemperature 260
13.2.6AssemblyandInterconnectTechnology 260
13.2.7PowerDensityIncrease 260
13.3FutureProspectofIGBT 261
13.3.1ApplicationRequirementAspects 261
13.3.2NextGenerationCellDesignIncludingGateDrivingSchemes 262
13.3.3NextGenerationVerticalStructureConcepts 265
13.3.4NextLevelofThermalManagementandInterconnectTechniqueInnovation 266
13.4Outlook 268
Acknowledgment 268 References 268
x Contents
14III–VandWideBandgap 273
MohammedAlomari
14.1Introduction 273
14.2DiamondPowerDevices 276
14.3SiCPowerDevices 277
14.4GaNPowerDevices 279
14.5WideBandgapsforHigh-TemperatureApplications 285
14.6Conclusion 286 References 287
15SiCMOSFETs 295
PeterFriedrichs
15.1IntroductiontoSiliconCarbideforPowerSemiconductors 295
15.2SiCSchottkyBarrierDiodes 295
15.3SiCTransistors 298
15.4SiCPowerMOSFETs 299
15.4.1PossibleCellConcepts 299
15.4.2SiCMOSChannelChallenges 301
15.4.3TypicalMOSFETDeviceCharacteristics–StaticBehavior,SwitchingPerformance,and BodyDiodeAspects 302
15.4.4Gate-OxideReliabilityAspects 308
15.4.5Short-CircuitAspectsandAvalancheRuggednessofSiCMOSFETs 312
15.5SiCMOSFETsinPowerApplications–SelectedAspectsandProspects 316 References 317
16MultiphaseVRMandPowerStageEvolution 321
DannyClavette
16.1EvolutionoftheFirstMultiphaseControllers 321
16.2TransitionfromVRMsto“Down”Solutions 324
16.3IntelXeonGenerationsChallengesMoore’sLaw 326
16.4IncreasedSystemDigitizationEnablesDigitalControl 327
16.5DrMOS1.0:Driver + MOSFETs 328
16.6DrMOS4.0andInternationalRectifier’sPowerStageAlternative 330
16.7InternationalRectifier’s“Smart”PowerStage 334
16.8DrMOS5 × 5mmand4 × 4mmDe-standardization 335
16.95 × 6mmSmartPowerStage:IndustryDrivenStandardization 336
16.10LatestSPSActivities 337
16.11TrendingBacktoVRMs 338
16.12Summary 339 References 340
Abbreviations 341
Index 343
Preface
Sincetheinventionofthesolid-statetransistors,thesemiconductortechnologieshaveadvanced atanexponentialpaceandbecomethefoundationfornumerousindustries,e.g.computing, communication,consumerelectronics,autonomoussystems,anddefense.GuidedbyMoore’s law,thescalingoftransistorshasprovidednewgenerationsofchipseveryonetotwoyears,with ever-increasingdensityandbetterperformance.Today,silicontransistorsareapproachingsome fundamentallimitsofdimensionalscaling.Thesemiconductorindustryhasalsotransformed throughseveralphasesandfoundationaltechnologies.TheemergenceofInternetofThings(IoT), bigdata,artificialintelligence(AI),andquantumcomputinghascreatednewopportunitiesfor advancedsemiconductortechnologies.Thecomplementarymetal-oxide-semiconductor(CMOS) technologydominatesthesemiconductorindustrytoday,buttherearenumeroustechnologiesand activeresearchbeyondconventionalCMOS.Althoughsemiconductorsareoftenassociatedwith high-performancecomputingchipssuchascentralprocessingunit(CPU)andgraphicsprocessing unit(GPU),thereisawiderangeofapplicationsbeyondcomputingforsemiconductorproducts, e.g.sensors,displays,andpowerelectronics.Silicon(Si)isthemostimportantsemiconductor,but thesemiconductorresearchalsocoversavarietyofmaterials,e.g.germanium(Ge),III–Vcompounds,organicmaterials,carbonnanotube,2Dmaterials,magneticmaterials,andtopological materials.
ThisbookisacollectionofarticlesreviewingadvancedsemiconductortechnologiesbeyondconventionalSiCMOSforvariousapplications.Thesearticleswrittenbytheexpertsinthefieldscan bereadindependentofeachother.Thevarietyoftopicsreflectsthebreadthofthesemiconductor R&Dandapplicationstoday,butthesearticlesonlycoveraverysmallfractionofsemiconductor technologies.
Withthetransistorscalingapproachingthefundamentallimits,heterogeneousintegrationisa promisingdirectiontosustaintheimprovementofperformanceandfunctionalitieswithoutrelying onreducingtransistorsizes.Chapter1,“HeterogeneousIntegrationatScale,”providesacomprehensivereviewoftechnologies,design/architectureconsiderations,reliabilityissues,applications, andfuturedirectionsoflarge-scaleheterogeneousintegration.
Whiletechnologyinnovationhasbeenaprimarydriverforthesemiconductorindustry,the futureofsemiconductorsystemswillincreasinglyresorttonovelcomputingparadigms.Chapter2, “HyperdimensionalComputing:AnAlgebraforComputingwithVectors,”presentsanexampleof entirelynewwaysofcomputinginspiredbytheinformationprocessinginthebrain.Insteadof traditionalmodelofcomputingwithnumbers,hyperdimensional(HD)computingencodesinformationinaholographicrepresentationwithwidevectorsanduniqueoperations.HDcomputing isextremelyrobustagainstnoise,matcheswellwith3Dcircuits,andisuniquelysuitabletoprocess avarietyofsensorysignalswithoutinterferencewitheachother.
Themajorityofsemiconductorchipsaredigitalcircuits;however,analogandmixed-signal circuitsarecruciallyimportant.Thephysicalworldisanalog;therefore,analogcircuitsarealways neededtoconnectdigitalchipswithrealworld,e.g.sensorydata,powermanagement,and communication.Althoughdigitalcircuitdesignishighlyautomated,analogcircuitdesignstill reliesonmanualeffort.Chapter3,“CADforAnalog/Mixed-SignalIntegratedCircuits,”reviews theprogresstowardautomatedcomputer-aideddesign(CAD)ofanalogandmixed-signalcircuits. ModerncomputersarebuiltbasedonthevonNeumannarchitecturewithseparatelogic/ computingunitsandmemory/storageunits.Emergingmemorydevicesnotonlyprovidenew technologiestoimprovememorysystemsbutalsoenablenovelcomputingarchitectures,e.g. in-memorycomputing.Oneofthemostpromisingemergingmemoriesisbasedonmagnetic materialsandproperties.Chapters4and5focusonaso-calledmagnetoelectricfieldeffect transistor(MEFET)basedontheprogrammingofthepolarizationina2Dsemiconductorchannel withlargespin-orbitcoupling,viatheproximityeffectofamagnetoelectricgate.Chapter4, “MagnetoelectricTransistorDevicesandCircuitswithSteeringLogic,”presentsvariouslogicgate designsbasedonaone-sourcetwo-drainMEFETconfiguredwithasteeringfunction.Chapter5, “NonvolatileMemoryBasedArchitecturesUsingMagnetoelectricFETs,”describesMEFET memorydesignswiththeperformanceandsizesuitabletofulfilltheapplicationspacebetween staticrandom-access-memory(SRAM)anddynamicrandom-access-memory(DRAM).
NovelmaterialsbeyondSi,Ge,andIII–Vcompoundsmayenablenewsemiconductorproducts andapplications.Amongthem,organicsemiconductorsarepromisingmaterialsforlow-cost,flexible,andbio-compatibleelectronics.Chapter6,“OrganicElectronics,”discussestheopportunities oforganicsemiconductorsforlarge-areaflexibleelectronics,includingorganiclight-emittingdiode (OLED),organicdisplays,organicsolarcells,andthin-filmtransistors.Chapter7,“Active-Matrix ElectroluminescentDisplays,”delvesintothedetailsofflatpanelelectroluminescentdisplays basedonlight-emittingdiodes(LEDs)thathavebeenutilizedinawiderangeofapplications includingsmartphones,tablets,laptops,andTVs.VariousunderlyingLEDtechnologies,associatedcircuits,anddesignconsiderationsarereviewed.Anotherinterestingapplicationoforganic materialsismemory.Chapter8,“OrganicandMacromolecularMemory–NanocompositeBistable MemoryDevices,”discussesthemechanisms,characteristics,andcurrentstatusoforganicmemories.Oneoftheadvantagesoforganicmaterialsistheirlow-costprocessingandthepotential tostackupmultiplelayers.Chapter9,“NextGenerationofHigh-PerformancePrintedFlexible Electronics,”summarizesdifferentprintingtechnologiesforflexibleelectronics,showcases thestate-of-the-artprintedflexibleelectroniccircuits,anddiscussesthechallengesandfuture directionsoflarge-scalecost-effectiveprintedelectronics.Thevisionofintegratingelectronic componentsontopolymerfoilsleadstotheflexibleelectronicsversionofsystems-on-chip(SoC), knownassystems-in-foil(SiF).AwiderangeofapplicationscanbenefitfromSiF,e.g.smartlabels, intelligentelectronicskin,andimplanteddevices.Chapter10“HybridSystems-in-Foil”reviews theopportunitiesofSiFandchallengesinmaterials,integration,andtesting.
Theelectronicsystemsneedaninterfacewiththephysicalworld.Semiconductorchipsrelyon sensorsto“see,”“hear,”and“smell.”Opticalsensingisutilizedinawiderangeofapplications,e.g. camera,fiberopticsandcommunication,lightsourceandlaser,datastorage,medicalmonitoring anddiagnostics,andmanufacturing.Chapter11,“OpticalDetectors,”reviewsthephotodiodes basedonSi,III–V,andemergingmaterialsastheessentialcomponentsforhighlysensitive detectorsforabroadspectrumofwavelengths.Chapter12,“EnvironmentalSensing,”coverscomprehensivelydifferentairpollutionsources,airqualitymetrics,andvarioussensingapproaches forparticulatemattersandvolatileorganiccompounds.Theadvancementofsemiconductor
technologiescontributestotheminiaturizationofthesensingequipmentandtheimprovementof theirperformance.
Unlikecomputerchipsoperatingwithverylowvoltageandcurrent,powerelectronicshandle veryhighvoltage(e.g.thousandsofvoltorhigher)andcurrentrequiredtooperatemachinery, vehicles,appliances,etc.Specialdevicedesignsanduniquematerialpropertiesarerequiredto sustainsuchhighvoltageandcurrentinsemiconductorchips.Chapter13,“InsulatedGateBipolar Transistors(IGBTs),”reviewsanimportanthigh-powerdeviceknownasSiinsulatedgatebipolar transistors(IGBTs).IGBTnotonlydominatespowerelectronicstodaybutalsocontinuestobe innovatedforfurthergainsinpowerdensityandefficiency.Atthesametime,significantprogress hasbeenmadeonwidebandgapsemiconductors.Chapter14,“III–VandWideBandgap,”reviews promisingmaterials(e.g.diamond,GaN)andtheirapplicationsinhigh-frequencypowerconversionandhigh-temperatureelectronics.Whilewidebandgappowermodulesmaybecombinedwith Si-basedcontrolcircuitsinnear-termsolutions,considerableeffortismadetoadvanceintegrated circuitsbasedonwidebandgapsemiconductors.Chapter15,“SiCMOSFETs,”reviewsSiC-based powersemiconductordevicesincludingdiodesandtransistors.SiCiswellpositionedtofulfillthe requirementsofpowerelectronics,e.g.energyefficiency,scaling,systemintegration,andreliability. TheuniqueabilityofSiCtoformanativeSiO2 asthegatedielectricmakesitparticularlyattractive forpowermetal-oxide-semiconductorfield-effect-transistors(MOSFETs).Attheend,Chapter16, “MultiphaseVRMandPowerStageEvolution,”providesadetailedoverviewoftheevolutionof CPUpowerdeliverytechnologiesandexplainsthereasonsdrivingthetechnologyshifts.
Thisbookcouldbeconsideredasasmall-scalereferenceofadvancedsemiconductor technologies,whichmaypotentiallybeexpandedintoalarge-scalereferencewithmore comprehensivecoverage.Itisourwishthatthiscollectionofchapterswillprovideusefultutorials onselectedtopicsofadvancedsemiconductortechnologies.
AnChen IBMResearch–Almaden,CA,USA September2022
ListofContributors
MohamedB.Alawieh DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
MohammedAlomari InstitutfürMikroelektronikStuttgart Stuttgart Germany
ShaahinAngizi DepartmentofElectricalandComputer Engineering
NewJerseyInstituteofTechnology Newark,NJ USA
AhmetF.Budak DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
HaoChen DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
DannyClavette InfineonTechnologies AmericasCorporation ElSegundo,CA USA
AbhishekS.Dahiya UniversityofGlasgow JamesWattSchoolofEngineering,Bendable ElectronicsandSensingTechnologies(BEST) Group Glasgow UK
RavinderDahiya UniversityofGlasgow JamesWattSchoolofEngineering,Bendable ElectronicsandSensingTechnologies(BEST) Group Glasgow UK
Li’angDeng DepartmentofElectronicEngineering ShanghaiJiaoTongUniversity China
PeterA.Dowben DepartmentofPhysicsandAstronomy JorgensenHall,UniversityofNebraska Lincoln,NE USA
ListofContributors
MouradElsobky InstitutfürMikroelektronikStuttgart,Sensor Systems Stuttgart Germany
PeterFriedrichs IFAGIPCT,InfineonTechnologiesAG Neubiberg Germany
XiaojunGuo DepartmentofElectronicEngineering ShanghaiJiaoTongUniversity China
SubramanianS.Iyer ElectricalEngineeringDepartment UniversityofCalifornia LosAngeles,CA USA
PenttiKanerva UniversityofCaliforniaatBerkeley RedwoodCenterforTheoreticalNeuroscience Berkeley,CA USA
HagenKlauk MaxPlanckInstituteforSolidStateResearch Stuttgart Germany
TihomirKneževi ´ c FacultyofElectricalEngineering Mathematics&ComputerScience MESA+ InstituteofTechnology UniversityofTwente Enschede TheNetherlands
YogeenthKumaresan UniversityofGlasgow JamesWattSchoolofEngineering,Bendable ElectronicsandSensingTechnologies(BEST) Group Glasgow,UK
ThomasLaska InfineonTechnologiesAG Germany
MingjieLiu DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
AndrewMarshall DepartmentofElectricalEngineering,The ErikJohnsonSchoolofEngineeringand ComputerScience
UniversityofTexasatDallas Richardson,TX USA
LisNanver FacultyofElectricalEngineering Mathematics&ComputerScience MESA+ InstituteofTechnology UniversityofTwente Enschede TheNetherlands
ArokiaNathan DarwinCollege UniversityofCambridge Cambridge UK
DavidZ.Pan DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
ShashiPaul EmergingTechnologiesResearchCentre DeMontfortUniversity Leicester UK
WeiShi
DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
XiyuanTang DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
BorisVaisband McGillUniversity ElectricalandComputerEngineering Department Montreal,QC Canada
TarekZaki Munich,Germany
ShuhanZhang DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
KerenZhu DepartmentofElectricalandComputer Engineering
TheUniversityofTexasatAustin Austin,TX USA
DeliangFan DepartmentofElectrical,Computerand EnergyEngineering ArizonaStateUniversity Tempe,AZ USA
HeterogeneousIntegrationatScale
SubramanianS.Iyer 1 andBorisVaisband 2
1 ElectricalEngineeringDepartment,UniversityofCalifornia,LosAngeles,CA,USA
2 McGillUniversity,ElectricalandComputerEngineeringDepartment,Montreal,QC,Canada
1.1Introduction
Microelectronicshasmadetremendousprogressoverthelastseveraldecadesadheringtowhatis popularlycalledMoore’sLaw.OnemeasureofMoore’slawisthescalingfactorofminimumfeaturesonasiliconintegratedcircuit(IC).Thistrendisshowninthedarkgray(left-handy-axis)curve inFigure1.1[1]exhibitingovera1,000-folddecreaseinminimumfeaturesize,correspondingtoa million-foldtransistordensityimprovement.Thisimprovementcorrespondstoreductioninpower perfunctionaswellasreductionofcostandpriceperfunction.Nonetheless,untilrecently,packagingdidnotscaleasseeninthelightgray(right-handy-axis)curveinFigure1.1.Forexample, in1967,whenflip-chipbondingwasfirstintroduced,thebumppitchwas400 μm.Eventoday,the pitchofthebump(dietolaminate)hasscaledtoabout130 μm,whileballgridarray(BGA)pitch andtracepitchonlaminatesandprintedcircuitboards(PCBs)havenotfaredbetter.However,in thelastfewyears,wehaveseenanaccelerationofthesemetricsasshownintheinsetinFigure1.1. Notethatthesilicon(Si)scaleisinnanometers,whilethepackagingscaleisinmicrometers.There aretwokeyfactorsthathavemediatedthisacceleration:(i)theadoptionofsilicon-likeprocessingmaterialsandmethodstoachievescaling,includingsiliconinterposers,and,importantly,(ii) fan-outwafer-levelpackaging(FOWLP).
Thistrendhasmanifesteditselfintwoways:(i)Theextensiveuseofinterposers,whichisan additionallevelinthepackaginghierarchyasshowninFigure1.2.Atabasiclevel,interposersprovideafirst-levelplatformfortheintegrationofseveral(eight)heterogeneousdieletsonathinned siliconsubstratethatisthenfurtherpackagedonalaminateandattachedtoaPCB.Thisallows thedieletsontheinterposertocommunicateintimatelywithintheinterposer,thoughcommunicationoutsidetheinterposerismoreconventional.(ii)Three-dimensional(3D)integration,where diesarestackedoneontopoftheother,typicallyfacetobackwiththroughsiliconvias(TSVs) oralternativelyfacetofacethroughsurfaceconnections.Theseface-to-faceconnectionscanbeat highbandwidthandlowlatency.Bothofthesetechniqueshavetransformedpackaging,especially whenitcomestothememorysubsystem.Aroadmapusingthememorysubsystemasaparadigm foradvancedpackagingisdepictedinFigure1.3.Anotherareainwhichinterposersand3Dintegrationcanplayabigroleistheintegrationofanalogandmixedsignalfunctions.Moore’slaw scalingdoesagoodjobinscalingdigitallogic,butisatbestmarginalwhenitcomestoanalogand mixedsignalfunctions.ThisisshowninFigure1.4,wheretheanalog/mixedsignalcomponents canoccupyanincreasingpercentageofrealestateatfinergeometries.Inthesecases,retainingthe AdvancesinSemiconductorTechnologies:SelectedTopicsBeyondConventionalCMOS,FirstEdition.EditedbyAnChen. ©2023TheInstituteofElectricalandElectronicsEngineers,Inc.Published2023byJohnWiley&Sons,Inc.
Figure1.1 ScalingtrendsforCMOSfeaturesaswellaspackagefeatures.Packagescalinghaslagged significantlyascomparedtoSiscaling.Adoptionofsilicon-liketechnologyforpackaginghassomewhat acceleratedscaling.
Figure1.2 Currentpackaginghierarchy.Left:die-laminate-PCB.Right:die-interposer-laminate-PCB. analog/mixedsignalfunctionsinanoldernodemakessenseaslongasonecanprovidecompatible voltagedomainsandensurelowlatencyaswellaslowanalogsignaldistortion.Thesearenotvery difficulttodooninterposers. Whyisitimportanttoscalepackaging?Packagingdimensionsdeterminethesizeofthesystemespeciallysincethescaleis10–100timeslargerthanchipdimensions.Powertooisamajor consideration.Communicationpowerbetweenchipsaccountsfor30–40%oftotalsystempower. Soforsize,weight,andpower(SWaP),aswellascost,scalingthepackagehasadvantages.The keyparametersthataffectSWaParedominatedbypackagingmetrics,andscalingthepackagehas greaterimpactonSWaPthanadditionalSiscaling.Forflexiblehybridelectronics(FHE),formfactorandpowerplayacriticalrole.MostFHEdevicesaremobileanddependentonbatterypower. Assuch,FHEpackageswillbenefitimmenselyfromscaling.
sink (Cu, AI)
sink (Cu, AI)
Level of integration
Figure1.3 Packagingevolution–thememoryparadigm.
Figure1.4 Percentofareadedicatedtoanalogcircuitsisincreasingwithscaling(squares).Thus,practical diearea(normalizedto180nmtechnology)isincreasingwithscaling(rhombuses)ascomparedtoidealdie area(triangles).
Anotheraspectofadvancedpackagingthathasthefocusofattentioninrecentyearsisheterogeneousintegration.Thistermrequiressomeclarification.Mostpackagingconstructsdoinfact achieveheterogeneousintegrationviatheintegrationofdiversepackagedchipsonanextended substratesuchasaPCB.Heterogeneousintegration,therefore,ingeneralandinitself,isnotnew. However,inthecontextofadvancedpackaging,heterogeneousintegrationreferstotheintegration ofbarediesonafirst-levelpackagingsubstrate.Thiscouldbeanorganic,ceramic,orsiliconinterposer.Thekeyfeaturesthatdistinguishheterogeneousintegrationfromclassicalorconventional packagingarethepitchoftheconnectionsbetweenthebaredieandthesubstrate,thenumber ofconnectionsbetweentheinterconnectedbaredies,thesizeofthedies,andhenceasignificant simplificationinthecommunicationprotocolsofinterdiesignaling.Itisgenerallyacceptedthat forbumppitches <50 μm,interdiespacingof <2mm,andtracepitches(wiringbetweenthedies) of <5 μm,theintegrationisconsideredintheregimeofadvancedpackaging.
Finally,“chiplets”and“dielets”areanotherfeatureofadvancedpackaging.Acomplexsystemor largechipdesignisfragmentedintosmallerentitiescalledchipletsandtheninstantiatedinSias dielets.Thesedieletsarethenintimatelyreintegratedatfinepitch(bumpandtrace)aswellasshort interdiespacing,aspreviouslydescribed,tosynthesizeasubsystemoramodule.Thisconstructcan befurtherassembledonaPCBor,inthecaseofwaferscalesystems,andcanrepresenttheentire system[2,3].
1.2TechnologyAspectsofHeterogeneousIntegration
Technologyinnovationisthemaindriverofthevariousheterogeneousintegrationplatforms.In thepastseveraldecades,packagingtechnology(e.g.verticalinterconnectpitch)hasbeenscaling atasignificantlyslowerrateascomparedtoICtechnology(e.g.devicedimensions),asshownin Figure1.1.Specifically,on-chipdimensionshavescaledapproximately200timesmorethanpackagefeatures.Thisdisparityinscalingofpartsofasinglesystemledthepackagehierarchytobecome thebottleneckofmodernintegratedsystems.
Nonetheless,inthelastfiveyears,theelectronicpackagingcommunityhaspickedupthepace proposingvariousnovelintegrationtechnologiestoreducethedimensionsofthepackaginghierarchy.Specifically,novelheterogeneousintegrationplatformshavebeenproposed,significantly drivingdownthefeaturesofthepackaginghierarchy.Realizationoftheheterogeneousintegration conceptispredicatedonseveralimportanttechnologyconsiderations.Areviewoftheverticalinterconnectpitch(betweendieletsandsubstrate),substratematerial,interdieletspacing,anddielet terminationisprovidedinthissection.
1.2.1InterconnectPitch
Typicalpackage-levelinterconnectpitchisseveralhundredsofmicrometers.Theseare solder-basedBGAorlandgridarray(LGA)connectionsbetweenthepackageandthePCB. Connectionsbetweendiesandpackagelaminate,i.e.solder-basedC4/pillar,exhibitasmaller pitch(∼50to100 μm).Nonetheless,comparingtothelastmetallevelsonthedie(pitchof 2–10 μm),thepackage-levelinterconnectsareapproximatelybetween10and500timeslarger. Infact,themainpurposeofthepackaginghierarchyistofan-outtheinterconnectpitchfrom thesmalldie-levelpitch,tothelargePCB-levelpitch,andthenviceversawhenconnectingto theneighboringpackageddie.Solderhastheadvantageofdeformingatlowtemperatureand pressure,toaccommodatewarpageofthePCB,laminate,anddie.AtypicalCupillarcappedwith
Figure1.5 (a)A50mmdiameterCupillarcappedwithsolder.(b)Aftermassreflowwithcompression showingthesolderextrusions.(c)Micrographshowingextrusionsthatcauseadjacentpillarstobecome electricallyshorted.Source:Photocourtesy:EricPerfecto.
solderisshowninFigure1.5a,acrosssectionaftermassreflowisshowninFigure1.5b,anda micrographoftwoshortedpillarsisshowninFigure1.5c.Shortingofneighboringsolderballsis themainchallengetothecontinuousscalingofsolder-basedinterconnectsbelowabout50 μm.
Anotherpossibleintegrationapproachistoattachdieletsdirectlytoasubstratewithoutsolder (orotherintermetallics),usingdirectmetal-to-metalthermalcompressionbonding(TCB).Inthis integrationapproach,twometalsarebondedtogetherbyapplyingpressureandtemperaturefor acertainamountoftime.Afterthisprocess,averystronglow-contactresistancebondisformed. Toensurehigh-qualityconnectionsusingTCB,thesurfacesofthemetalsmustbepristineand atomicallysmooth.AdditionalconditionsmustbemetwhenbondingCuforexample,suchas surfacepreparationtoavoidoxidationoftheCupriortobonding(byusingplasmaorformicacid). Alignmentisanotherchallengeinsmallpitchconnectionsforheterogeneousintegration. Solder-basedinterconnectsareeasiertoalignduetothelargerdimensionsandsincetheyexhibit aformofself-alignmentpropertyduetosurfacetensionatsoldermeltingtemperature.Unlike solder,directmetal-to-metalintegrationrequiresahighlevelofalignmentaccuracywhichis difficulttoachievebyopticalmeanssincethedieandsubstratearetypicallynottransparent.A second-orderopticalalignmentisthereforerequired,wherethedieandthesubstratearealignedto avirtualreference.Forexample,inthesiliconinterconnectfabric(Si-IF)technology,analignment accuracyof ±1 μmhasbeenachieved[4].Althoughthisalignmentaccuracyisgood,itisstillabout anorderofmagnitudeworsethandie-levelconventionalopticallithography.
1.2.2SubstrateMaterial
Differentsubstratematerialsarecurrentlyusedinheterogeneousintegration.Themostcommonly usedmaterialsarecomparedinTable1.1.
Hybridsubstratematerialsarealsousedinindustry.Forexample,theembeddedmultidieinterconnectbridge(EMIB)[5]approachsupportstheintegrationofsmallSibridgeswithinanorganic substrate.TheEMIBenablesdifferentinterconnectpitches,coarsepitchontheorganicFR4and finepitchontheSibridge.Thistechnology,however,exhibitsincreasedcomplexityandtherefore highercost.
Table1.1 KeystructuralandthermalpropertiesofSiandotherrelevantmaterials.
Material
Organic (FR4)
0.1–202,000–3,00014–700.3–1HighLowLargehorizontaland verticalinterconnectpitch
Glass50–9033–3,5004–91–2LowHighLowelectricallosses. Metallizationisdifficult
Silicon130–1855,000–9,0003–5148LowLowHighelectricallosses
Steel190–200400–50011–1316–25
Copper128200–35017400
TheSi-IF[2]isasiliconwafer-scaleplatformthatsupportsintegrationofsmalldiesatfinevertical pitch(2–10 μm).Siisahighlymaturesubstratethatbenefitsfromdecadesoftechnologyoptimization.Furthermore,passiveSiwithmicrometersizeinterconnectsisarelativelyinexpensive construct.
1.2.3Inter-DieSpacing
Inconventionalpackaging,diesarepackagedandplacedonPCBs.Interposers,anadditionalhierarchicallayer,isoftenutilizedinmodernsystemsasasteppingstonetocloseintegrationofheterogeneouscomponents.However,interposersareexpensiveandlimitedtoonlyseveralcomponents. Inanyoftheabovementionedintegrationapproaches,theinter-diespacingislarge.Ininterposers thespacingisafewhundredsofmicrometers,whereasthespacingbetweentwopackageddieson aPCBreachestensofmillimeters.Thelargeinter-diespacingsignificantlyincreasesthelatency andpowerofcommunication.InstandardvonNeumannarchitectures,whereprocessor-memory communicationisakeybottleneck,theexcessiveperformancedegradationofcommunicationis especiallylimiting.
IntheSi-IFtechnology,diesareintegratedathighproximity(∼50 μm).Thisisenabledsince thediesarenotpackaged.TheonlylimitationsoninterdieletspacingintheSi-IFplatformarethe roughnessoftheedgeofthedie(duetowaferdicing),andedgesealsandcrackstopsthataretypicallypresentattheedgeofthedie,effectivelyincreasingtheinterdiespacing.Noveltechnologies, suchasplasmadicing[6],willenablefurtherreductionoftheinterdiespacingontheSi-IF.
1.2.4DieSizeConsiderations
Modernsystems-on-chips(SoCs)aretypicallyverylargeinarea(excludingmobileSoCs).For example,AMD’sRomeserverSoCincludesupto1,000mm2 ofcumulativesiliconarea[7].The reasonforsuchalargeareaistheattempttointegrateasmanycomponentsaspossibleatthe ICleveltoleveragethesmallinterconnectdimensionsandintercomponentspacing.LargeSoCs integratedoninterposers,are,however,pronetoyielddegradationandaretypicallyexpensive tofabricate.Theconceptofheterogeneousintegrationaimstosolvethisproblembyenabling platformsthatsupportIC-levelinterconnectdimensionsatthepackagelevelandeliminatethe needforcomplexandexpensiveintegrationhierarchy,(e.g.theuseofinterposers).
