TP3_RF
TP23
TP20
TP21
TP18 FD0512
J_UAT_RF
C5319_RF
C5316_RF
C5315_RF
C5318_RF
FL4211
DZ3156 FL3156
R3144 C3121
C3143 C3126 FL4134 FL3146 FL4241 C3146 DZ3150
R4222
DZ3151 FL3151 C3102
FL3152 DZ3152
C3130
FL3202
FL3201
R3203
FL3210
C3211
C3200
C4104
C4102
R3142
C4126
FL4210
FL4208
C4710
R4720
R4710
C4130
FL4200
C4203
C4207FL4207
C3230 FL3200
R3233
R3234 FL3230
FL3231 FL3232
W 36 20 X
C5201_RF XW3_RF PP5298_RF
XW3401 FL3155
FL3110
R5301_RF
FL3154
CL0501
FD0510
FD0504
R3515
C2024
C2043
C4040
C2031
C2030
C1310
C2040
C3663
R0803
R4220 R0801
C3603
C3662
C2042
C4020
C4025 U4020
U3500
C3650
R3550
C3505
C3506
C2203
BS0531
XW1120
40 20 W X XW2105
00 21 W
X W X
30 22 W 240 2
C4713
XW0650
XW1100
X
BS0530
R0951 R0730 R0911 C0730
C2106
PP1104
PP0706
C1317
C2022
C2110
C1250
C1203
C1320 C2005 C2088
C2085
C0651
C2000
L2060
C0650 FL0610 R3020 C3020 C3022
PP0601
PP1105
C1511
C3021
C1535
R1501 C1524 C1534
PP1503 PP1502 PP06
C1544
PP0902
PP08 PP0903
C1545
J3000_RF
CL0500
J3001_RF
U1500
PP1500
C1510
C1522 C1540 C1541 C1548 C1504 C1543
C1557
C1527
PP1501
C1555 C1513
R1520
C1550
PP0707
PP1504 PP1505
PP1520
C1556
C2007
PP3091_RF
C1156 C0620
FL4713
C2087
C1115 C0600
C2132
C1124
C1240
C0603
C0801
C2019
C2094
U2000
C0815 C0802
C2015
C4000
C2089
C1123
C1223
C1133
C1201
C0602
C0612 C2201
C1136
C2090 R2260
R0406
C1200 C1153
C0717
R0404
R0901
C1227
FL3153
C2111
R3143
R0960
C3400
C2107
C3308
C3373
U3300
R5305_RF C0706
R0411
R0410
R0409
R0945
C4008
C4007 R5314_RF C0701
C0601
C1135
C4005
C5303_RF
C5321_RF
C5322_RF C0718
C2011
C1157
XW2070 R0640
PP0610
C0705
C0552 R1201
C2240
C3402
R5302_RF
C5302_RF C3612 C1244
C1105
C1102
C5324_RF
C4006 R2205
C3653
C3600
C5330_RF
C2122
C3602 C3665 C3611C4026
C0610
C0551
C0550 C0553
L2000
R0405
R2240
XW2_RF P P5296_RF
C5304_RF
U5301_RF
C4050 C3610
C3651
XW1_RF
U3400
C2091
XW4701 DZ4711
XW2200
L2001
C2060
L2002
R0941 R0407 R0408
PP1023
C0708 C0702
L2003
C2097
L2013
C2099
XW2080
C5317_RF R3401 C3499
U4040 C4041
T5301_RF
FL4720
C4205 L4904_RF
L4903_RF
R4902_RF
R4901_RF
C5210_RF
R5202_RF
C4024
C3504
L2012
R0910
PP0600
C1242
R0940
R0909
C2102
C1302
C2001
C2006
C1141
C0707
C2023
L2011
20 22 W
FL4711
C1312
R0700
R2261
C0703
C4021
R1200
L5301_RF C5308_RF R5303_RF C5310_RF U4000
C3554
L2010
X
C0611
R0808
X
U0600
C4711
XW2210
Y0600
R0809
W 20 30
C1134
C1137
C2061
C1300 C2032
C1322
C1121
C2071
C0704
L2050
C2025
C0709
C3401
C3670 C3552
C2044
C0710
L5205_RF L5202_RF
R5310_RF
C4056
C1542
C1526
C1528
PP1521
C1521 C1532
R1521 C1533
C1523
C1525
PP3084_RF
L5204_RF
C5215_RF C2041
C2115
R1204
XW1110
C3001
C3002
C1138
C1140
C1139
C1221
C1222
C1126
R1021
FL4221 FL4220
C5203_RF
C3124
R0904 R0905
L2030
C1301
J4701
U3000
C1125
C3000
R0921
C3003 C3006 C3005 C3004
R0930 C2112
C1202
DZ4712 DZ4713
FL4712 C2210 C3008
C3007
C4712
R2210
C1246
FD0511
R1205
R1203 C1113
C2008
C1130
C1128
C1127
R1020
L3100
F5202_RF C5205_RF
C4004
C3122
FL4254 FL4255
JWLAT_RF
L2041
C1316
C2017
C4022 FL4120 R3141
L2040
C2026
R0802
C1116 C1120
C1132
C1129
C1220
C2070
C2105
PP1101
C1111
C1117
L2070 C1245
R4510 C4510
R0720
C2260
C1122
R1002
C2121 C2127
C1104
PP1100
C1131
C2101
C1321
C0741
C0743
C0750
C0751 C0731
C2114
C1323
C1114
C2016
C4211
C5209_RF
L4905_RF
C3123 C3128
C4106 C4042 C2050
C4099
C4051
L4051
TP1100
C1154
C1155
C2131
C2104
R2250
C2270
R2270
R0650 R0651
C2250 C0752
C1248
C1243
C2002
C0740
TP1120
C1106
C1224
R0600
C2098
R2201 PP1021 PP1022 C2103 PP1020
C2003
C0742 C2200
C1330
C1101
C1108
C1226
C1109 C2130
C2018
C2010
FL4209 C4209
J4200
C2051
L2020
C4053
L4050
C3601
C3654
C1112
C2095
R1202 PP0900
Y2200
C2202
C1225
C1110
C1107
C1280
C2012 C2100 C1103
C3640
C2081
C2205
C3664
FL1280
C2093
C3652
XW3600 C0814 R0952
W 20 50
C2080
C2092
C2013
R0920
C2009
C4204
F5201_RF
FL3220
C4722 C4721
C4723 C4724
C4907_RF
L5412_RF C2113
C4107
C4905_RF C4901_RF L4906_RF L4907_RF
C4023
R3502 R3503 C3550 C3551
C3387
L4020
L2021
C3661
C3386
L3300
CL0502
C3660
BS0510
FD0502
L4021
C5311_RF C5309_RF R3400 R5304_RF
C4115
TP04
C4122
C4123
C4121
C3106
FL3100
DZ3155 C3145
C3144 C3140
FL3125 C3125 C3113
FL3111
D4050
U4050
60 36 W
R0807
C4105 FL4105
C3103 FL4250
C4055
X
R0806
C4125 C4120
C4111 C4116 C4117
R4041
FL1_RF
J4700
C4291
C4112
C4212C4213
FL3102
C4299
C4250 FL4231 C4231 C4223 C4260
FL4251 FL3150 C4251 C4241
C3112 C3111
C3105 C3104
C3101 C3100
C3110
C4054
R4051
R4021
D4020
D4021
R0900
C4110
R4111 R4115
R4020
X
C1313
C4100
C4132
SH0500
PP1102
C1151
C2020
C1241
Q3140
C4101 C4103
FL4130 C4134 C4133
BS0511
D4051
R3650
C1247
DZ3154
DZ3153
L5201_RF
C4098
L4040
C4043
Q5301_RF
PP3067_RF
U5302_RF
L2080
C1314
L4000
C2014
C4003 C3023 C3024 C3025
C2109 FL4110
R4117 FL4112 C4118
J3100
PP5287_RF PP5292_RF PP5286_RF
C5200_RF
C3396
C3394
C5320_RF C4009 U3020
C5314_RF
J3200 C4199
J4100
L4293 L4294
R4116
FL4253 C4253 FL4252
C4252 C4230
FL4230 C4224 C4261
C4232 FL4232
C4222 C4221
L3102 L3101
no_refdes+7
FL4100
FL4213
L4200
C2062
R4130
R4131
FL4212
FL4293
FL4291
FL4292
C4131
R4125
C4293C4292 R0950
L4202
C3206
U4100
R4240
C4240
C4202
C4200
C4201
C4220 C4254 C4255
C3129
FL3126C3127
PP3064_RF
C5323_RF
L5303_RF
C0712
TP15
C3202
C3201 C3299 R0804 C3234
C3220
DZ4710
C4701 FL4701
FL4131
C4052
FL4107
C3120
PP3066_RF
C2004
PP5299_RF PP5289_RF PP0906
C4206 C4208 C4210
FL3104
C2096
C2108
R3140
BS0513
PP4100
no_refdes+1
PP3013_RF
PP3065_RF
C2086
R0922
BS0512
C4127 XW3400
XW3630
L3400
C2021
C0711
PP5301_RF
C3207
SH0503
C4002
PP0901
FL4702 C4702 C4700
FL4205
C5283_RF
C4128
R5315_RF
C3221
PP5300_RF
L4201
PP5285_RF
C5284_RF
C4124
R5316_RF
FL4700 C4720
C2500_RF R5213_RF R5200_RF
L5206_RF
PP3063_RF PP3062_RF
J5003_RF
PP5288_RF PP5302_RF
C4215
J5004_RF
C4903_RF
C4904_RF
C4902_RF
C4910_RF
L5302_RF
C3233 R0805 C3232
PP5305_RF PP5294_RF R0701
C3231
L4910_RF
R4040
U4240 U5200_RF
R5205_RF
C3203
J5005_RF
L4909_RF
R0721
U_DPL_RF
L5414_RF
TP22
U_VOX_RF
PP5203_RF
R2220 C2220
TP17
C3205
TP24
C3204
TP25
C5313_RF
L5404_RF
C5403_RF
R5401_RF
TP07
BS0520
C5312_RF
PP07
PP5303_RF
PP5202_RF PP5200_RF PP5201_RF PP5293_RF PP5295_RF PP5290_RF PP5297_RF PP5291_RF PP5306_RF PP5307_RF
TP5304_RF TP5303_RF
no_refdes+6
L5408_RF
C5404_RF C5408_RF
L5402_RF
L5401_RF
C5407_RF R5402_RF
FD0503 TP16
U3200
L5411_RF
PP3004_RF PP3001_RF PP3002_RF PP3003_RF TP5301_RF TP19
C5007_RF
L5413_RF
UTRIP_RF
PP09
C3235
C5405_RF
C5401_RF
L5415_RF
L5407_RF
L5400_RF
U5411_RF C5402_RF
FD0513
C5411_RF
C5410_RF
FD0505
L5403_RF
no_refdes+5
C1520
PP3085_RF PP3036_RF PP3019_RF PP3037_RF
XW3616_RF
XW3619_RF
R3306_RF C3111_RF C3229_RF C3124_RF C3122_RF C3119_RF R3305_RF XW3613_RF C3121_RF C3102_RF C3103_RF C3112_RF C3117_RF C3109_RF C3106_RF C3114_RF
XW3615_RF
XW3605_RF
XW3602_RF
C3706_RF
U_QPT_RF
C4410_RF
C4201_RF
L4222_RF L4221_RF L4223_RF C2301
C2302
L4224_RF
L4404_RF L4305_RF
C4306_RF
L4407_RF
C4705_RF
XW3702_RF
R3301_RF
R3302_RF
L3903_RF
C3904_RF
C4309_RF
C4308_RF
C3801_RF
C4701_RF C4703_RF
U2300
PP3015_RF C3405_RF
C3032
R3032
C3033
C3312_RF
PP3090_RF
PP3082_RF C0715 PP3083_RF C0716
R3004_RF
PP3011_RF
X
PP3008_RF
C3863
PP3009_RF
02 38 W
C3802
C4108_RF
XW3611_RF
C2124
C3840 C4500
R3504_RF C3608_RF R3503_RF
C3010 C3011
C2123
R0902
L5001_RF
FD0514
TP03
TP09
FL4622
TP14
TP01
BS0500
TP11
C4606
XW3702
J_LAT_RF
TP10
R4640
TP12
TP02
TP13
VIETMOBILE.VN
XW2400
TP00
C2400
R2300
C4652
SH0502
C5006_RF
R2320
J2400 C2307 TP08
C1560 R1560
R0903 R1530
C3810 R3810
C3803
R0907
C3620_RF
C3621_RF
C3605_RF
C3627_RF
L4405_RF
L4408_RF L4410_RF
L4803_RF
L4802_RF
C4804_RF
C3737
C3795
no_refdes+4
J4600
C3607_RF
L4403_RF
L4703_RF
C4301_RF
L4220_RF
C3814_RF Q2300
L4303_RF
L4502_RF
C3808_RF C4654 FL4624
C2125
C2333 C4614 FL4614
L3700
C2306
C4621
R2301
C3813_RF C3805_RF
L4908_RF FLFBR_RF
C4502_RF L4106_RF C4109_RF
C3806_RF C3812_RF
C4906_RF FLGPS_RF
L2300
C4611 C4623 DZ4603 C4607 FL4612 DZ4602
U_WTR_RF
L4202_RF C4642
C4406_RF
L4101_RF
C4510_RF C4506_RF
C3745 C3746 R3702 C3704
C2331
R3703
FL4621 C4612 C4640 FL4607
C4641
C4604_RF L4603_RF
C3606_RF
R3829 R3811 C3811
R4301_RF
C3630_RF
PP3010_RF
C3404_RF C4107_RF
C3916_RF
C3917_RF C3742
L4301_RF
C3401_RF R3407_RF
C3907_RF
R4101_RF
C4610 FL4610
C3901_RF C3903_RF L3901_RF
C4105_RF
C4000_RF C4605_RF L4604_RF
C3301_RF
R3802_RF
C3803_RF
C3202_RF
L3909_RF C3908_RF L3908_RF C3912_RF
C4106_RF R3801_RF C3809_RF C3810_RF
C3211_RF
L4804_RF
C3208_RF
C3101_RF C3705
C3104_RF
C3616_RF R3701
C3210_RF
C3640_RF
C3626_RF
C4101_RF C3118_RF C3220_RF C4114_RF C3223_RF R3509_RF DZ4601
C3218_RF
XW3803_RF
U5101_RF
C3125_RF
C3204_RF
C4503_RF
C4501
U_PMU_RF
L4504_RF
C4502
C3215_RF C4205_RF
C3406_RF
C3107_RF C3214_RF
C3708_RF R3703_RF
C3501_RF
L4205_RF C4206_RF
C3203_RF C3212_RF U_BB_RF
Y_XO_RF
C4633
FL3803
DZ4604 DZ4610 DZ4600
C3205_RF
FL3804
C4603_RF
R3802
R0722 R3402_RF R3406_RF R3801XW3801
C4602_RF XW4500_RF C4601_RF
R3401_RF
C3113_RF
C4207_RF L4214_RF
C3110_RF
C2411
FLDIP_RF
C4653
FL4620 C4615
FL4630 C4630 C4631 FL4631 C4636 C4637 FL4632 FL4633
C3123_RF R3303_RF
L4601_RF
C2330
C2305
R2311
C3735 C2300
R2310 R2400
C2311
FL4613
C3760 C4635
C3116_RF
DZ301_RF R3603_RF
C3617_RF C3624_RF
C3846
U0900
R3404_RF
XW3614_RF
C3701_RF
ULBPA_RF
C4403_RF
L4306_RF C4307_RF C3905_RF
C4203_RF
C4302_RF
L4302_RF
L4216_RF C4208_RF
C3216_RF
C3837
R0702
R3507_RF
R3403_RF
R3411_RF R3412_RF C3302_RF
C2120
R2230
U3030
C3902_RF C3914_RF
C4202_RF
C4303_RF
PP3077_RF XW3802_RF
XW3701
C1503 L4501_RF
XW3609_RF
C3705_RF
L3704_RF
R3409_RF C3403_RF
L4210_RF
C3612_RF C3704_RF
L3922_RF
UHBPA_RF
L4218_RF C4211_RF
XW3606_RF
XW3601_RF
XW3618_RF
L3701_RF
XW3701_RF
C3702_RF
C3614_RF
L3702_RF XW3603_RF C3609_RF
XW3610_RF
PP3017_RF
XW3801_RF
C4408_RF
L4207_RF
C3613_RF
XW3608_RF
C3013 U3010
XW3604_RF
XW3607_RF
PP3007_RF
L3604_RF
L3902_RF C3913_RF C3915_RF
C4305_RF L4304_RF
UMBPA_RF
L4705_RF
L3603_RF
L3601_RF
PP3034_RF
C3219_RF
C2320
C2412
C2410
C2303
C2304
C3709 C4650 R3735
C4651
FL4615 C4613
FL4641
FL4642
FL4611
C4698 C3700
C3610_RF
L3602_RF
C2321
C3730
C3732
C3740
C3741
C3743
FL4602
C4632
C4620
VR301_RF
C3707_RF
L3904_RF
L4104_RF R4104_RF
L4701_RF
C2310
C3701
C3744
C3729 FL4603
C3702
FL4601
C3763 C4634
C4696
C4624
R3304_RF
no_refdes+8
R3414_RF
L3703_RF
L4307_RF
C4702_RF
UHASM_RF
FL4623 R3729
FL4604
FL4605
FL4600
C4622
L4706_RF
C4704_RF
C2322
U3700
R4600 C4600
L3605_RF
XW3501_RF
R3408_RF
C4405_RF L4406_RF C4409_RF
L4203_RF
C4801_RF C4802_RF
L4212_RF C4803_RF
L4213_RF L4204_RF
L4215_RF L4206_RF
C4209_RF
C4806_RF L4805_RF
C1501 UBUFR_RF PP3005_RF
PP3052_RF PP3014_RF
R3013_RF
C3402_RF
L4401_RF
UDIVA_RF
ULASM_RF
L4209_RF
C4407_RF
C4807_RF
R3014_RF
C5101_RF C3209_RF
PP3012_RF
C3206_RF C3207_RF R3508_RF
R3410_RF
PP3054_RF FD0501
L4602_RF
C3815_RF
C4214_RF
C4213_RF
L4211_RF
L4605_RF
L4219_RF C4212_RF
C4508_RF
C4505_RF
C4507_RF
C4805_RF
C3031
PP3051_RF
XW3612_RF
PP3056_RF
J5002_RF
C3804_RF
L4801_RF
R3030
FD0515
C3807_RF
C3811_RF
R3031
C3802_RF
R4201_RF
C4112_RF
C3408_RF
C3407_RF PP4500 R4500
L4201_RF R4202_RF
C4110_RF
L3800
C4504
C4503
J5001_RF
C4104_RF
C3895
L4105_RF
C3835
PP3075_RF
L4522
Q4500
R4105_RF
C3920_RF L4103_RF
C3832
C3805 DZ302_RF
L4521
U4500
C3105_RF
C3115_RF
C3108_RF
C3848
C2126
R3803
C3860
C3800
XW3810
C3801
PP3018_RF
C3226_RF
L3906_RF L3911_RF
XW3811
C3012
C3611_RF XW3617_RF
C1530
C1531
C1507
C1509
C1506
C3829
U3800
PP3033_RF
R3505_RF
R3502_RF
C3919_RF
C3922_RF C3910_RF L3912_RF C3911_RF L3910_RF C3909_RF
FL4606
C1547
C3631_RF
C3227_RF C3619_RF C3225_RF
C3918_RF
L3907_RF
C3906_RF
L3919_RF
C4501_RF
R4501_RF
L3705_RF
C2230 C4699
C4697
C1546
R3501_RF
C3633_RF
C3632_RF
C3635_RF
C3618_RF
C3625_RF
C3636_RF
R3506_RF C3502_RF
C3213_RF C3120_RF C3603_RF
C3921_RF
L4503_RF
R3835 C3809
C3804
L3905_RF
U2GPA_RF
C3842
C3830
SH0504
R4106_RF PP3053_RF
C1551
C3503_RF C3010_RF
C1561
R1561
R0906
R0402
C3629_RF
C3615_RF
U3301_RF
C1554
R1500 R2302
C3622_RF
C3634_RF UEPRM_RF
R0403 Q2301 R0401 R0400
C3002_RF
C1508 PP3032_RF
C0900
no_refdes+2
SH0501
R3413_RF
C1505
no_refdes+3
R2200
PP3006_RF PP3076_RF
PP3074_RF
C1502
C1514
PP3081_RF
C1515
C1512
PP3016_RF PP3080_RF PP3020_RF PP3073_RF
8
7
6
5
4
3
2
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
1
REV
ECN
CK APPD
DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
4
0003980769
ENGINEERING RELEASED
2015-03-27
N66 MLB - EVT_MD D
LAST_MODIFICATION=Tue Mar 24 12:47:11 2015
C
PAGE
<CSA>
1
1
2
D
PAGE
<CSA>
CONTENTS
TABLE OF CONTENTS
31
45
I/O:TRISTAR 2
3
SYSTEM:BOM TABLES
32
46
I/O:DOCK FLEX B2B
3
4
SYSTEM:N66 SPECIFIC
33
47
I/O:BUTTON FLEX B2B
4
5
34
49
BASEBAND:RADIO SYMBOL
5
6
SYSTEM: MECHANICAL COMPONENTS SOC:JTAG,USB,XTAL
35
TABLE OF CONTENTS
6
7
SOC:PCIE
36
ELNA & UAT ANT FEED
7
8
SOC:CAMERA & DISPLAY
37
CELLULAR FRONT END: ANTENNA CONNECTORS AND FEEDS
8
9
SOC:SERIAL & GPIO
38
WLAN LAT 2.4GHZ BAW BPF
9
10
SOC:OWL
39
DEBUG CONN & TEST POINTS
10
11
SOC:POWER (1/3)
40
CELLULAR BASEBAND: POWER1
11
12
SOC:POWER (2/3)
41
CELLULAR BASEBAND: POWER2
12
13
SOC:POWER (3/3)
42
CELLULAR BASEBAND: CONTROL AND INTERFACES
13
15
NAND
43
CELLULAR BASEBAND: GPIOS
14
20
SYSTEM POWER:PMU (1/3)
44
CELLULAR PMU: CONTROL AND CLOCKS
15
21
SYSTEM POWER:PMU (2/3)
45
CELLULAR PMU: SWITCHERS AND LDOS
16
22
SYSTEM POWER:PMU (3/3)
46
CELLULAR PMU: ET MODULATOR
17
23
SYSTEM POWER:CHARGER
47
CELLULAR TRANSCEIVER: POWER
18
24
SYSTEM POWER:BATTERY CONN
48
CELLULAR TRANSCEIVER: PRX PORTS
19
30
SENSORS:MOTION SENSORS
49
CELLULAR TRANSCEIVER: DRX/GPS PORTS
20
31
CAMERA:FRONT CAMERA B2B
50
CELLULAR TRANSCEIVER: TX PORTS
21
32
CAMERA:REAR CAMERA B2B
51
CELLULAR FRONT END: LB PAD
22
33
CAMERA:STROBE DRIVER
52
CELLULAR FRONT END: MB PAD
23
34
CAMERA: SPHERE DRIVER
53
CELLULAR FRONT END: HB PAD
24
35
AUDIO:CALTRA CODEC (1/2)
54
CELLULAR FRONT END: 2G PA
25
36
AUDIO:CALTRA CODEC (2/2)
55
CELLULAR FRONT END: LB ASM
26
37
AUDIO:SPEAKER DRIVER
56
CELLULAR FRONT END: MB-HB ASM
27
38
AUDIO:ARC DRIVER
57
CELLULAR FRONT END: DIVERSITY
28
40
DISPLAY:POWER
58
SIM
29
41
TOUCH:ORB & MESA B2B
30
42
DISPLAY:LCM B2B
59 60
WIFI/BT: WIFI/BT MODULE STOCKHOLM
CONTENTS
SYNC
DATE
SYNC
DATE
C
B
B
SCH 051-00094 BRD 820-00040 MCO 056-00472
A
BOM BOM BOM BOM BOM BOM BOM BOM BOM
639-00299 639-00301 639-00302 639-01063 639-01064 639-01065 639-01116 639-01117 639-01118
(BETTER) (ULTRA) (SUPREME) (BETTER, RF2) (ULTRA, RF2) (SUPREME, RF2) (BETTER, RFC) (ULTRA, RFC) (SUPREME, RFC)
BOM BOM BOM BOM BOM BOM BOM BOM BOM
639-01119 639-01122 639-01125 639-01120 639-01123 639-01126 639-01121 639-01124 639-01127
(BETTER, M) (ULTRA, M) (SUPREME, M) (BETTER, RF2, M) (ULTRA, RF2, M) (SUPREME, RF2, M) (BETTER, RFC, M) (ULTRA, RFC, M) (SUPREME, RFC, M)
TABLE OF CONTENTS DRAWING TITLE
A
SCHEM,MLB,N66 DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
1 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
1 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
Active Diode Alternate
5
4
3
Schematic & PCB Callouts
2
1
Global Capacitor Alternates
TABLE_ALT_HEAD
TABLE_5_HEAD TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
CRITICAL
?
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
118S0764
118S0717
ALTERNATE
?
RES, 3.92K, 0.1%, 0201
138S0702
138S0657
ALTERNATE
?
CAP, X5R, 4.3UF, 4V, 0610
138S00006
138S0835
ALTERNATE
?
CAP, 3-TERM, 4.3UF, 4V, 0402
138S00005
138S00003
ALTERNATE
?
CAP,X5R,15UF,6.3V,0.65MM,0402,TAIYO
138S00048
138S00003
ALTERNATE
?
CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERA
TABLE_5_ITEM
051-00094
TABLE_ALT_ITEM
376S00106
376S00047
ALTERNATE
Q2300
1
SCH
SCH,SINGLE_BRD,N66
TABLE_ALT_ITEM
DIODES INC. ACT DIODE TABLE_5_ITEM
820-00040
1
PCB
PCBF,SINGLE_BRD,N66
CRITICAL
?
TABLE_ALT_ITEM
TABLE_5_ITEM
825-6838
NAND BOM Options
1
EEEE_G360
EEEE CODE FOR 639-00299
CRITICAL
EEEE_BETTER
TABLE_ALT_ITEM
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-00301
CRITICAL
EEEE_G35W
EEEE_ULTRA
TABLE_ALT_ITEM
TABLE_5_ITEM TABLE_5_HEAD
PART#
D
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
825-6838
BOM OPTION
1
EEEE_G35V
EEEE CODE FOR 639-00302
CRITICAL
EEEE_SUPREME
TABLE_ALT_ITEM
TABLE_5_ITEM
D
TABLE_5_ITEM
335S00039
1
U1500
NAND,T,B0,1Y,MLC,16GX8,S3E,WLGA70
CRITICAL
NAND_16G
825-6838
1
EEEE CODE FOR 639-01063
EEEE_GKKY
CRITICAL
EEEE_BETTER_RF2
825-6838
1
EEEE CODE FOR 639-01064
EEEE_GKL0
CRITICAL
EEEE_ULTRA_RF2
TABLE_ALT_ITEM
TABLE_5_ITEM
138S0648
138S0652
ALTERNATE
?
CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO
132S0400
132S0436
ALTERNATE
?
CAP,X5R,0.22UF,6.3V,01005,TDK
138S00032
138S0831
ALTERNATE
?
CAP,X5R,2.2UF,6.3V,0201,TAIYO
138S00049
138S0831
ALTERNATE
?
CAP,X5R,2.2UF,6.3V,0201,KYOCERA
138S00024
138S0986
ALTERNATE
?
CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK
138S0706
138S0739
ALTERNATE
?
CAP,CER,1UF,20%,10V,X5R,0201,MURATA
138S0945
138S0739
ALTERNATE
?
CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA
TABLE_5_ITEM
335S00040
1
U1500
NAND,T,B0,1Y,MLC,64GX8,S3E,VLGA70
CRITICAL
NAND_64G
TABLE_ALT_ITEM
TABLE_5_ITEM TABLE_5_ITEM
335S00079
1
U1500
NAND,H,B0,1Y,TLC,128GX8,S3E,VLGA70
CRITICAL
825-6838
NAND_128G
1
EEEE_GKL1
EEEE CODE FOR 639-01065
CRITICAL
EEEE_SUPREME_RF2
TABLE_ALT_ITEM
TABLE_5_ITEM
825-6838
1
EEEE_GLL7
EEEE CODE FOR 639-01116
CRITICAL
EEEE_BETTER_RFC
TABLE_ALT_ITEM
TABLE_5_ITEM
825-6838
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
335S00039
ALTERNATE
REF DES
1
EEEE CODE FOR 639-01117
CRITICAL
EEEE_GLL4
EEEE_ULTRA_RFC
TABLE_ALT_ITEM
COMMENTS: TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-01118
EEEE_GLL1
CRITICAL
EEEE_SUPREME_RFC
TABLE_ALT_ITEM
TABLE_ALT_ITEM
335S00074
U1500
H, B0, 1Y, MLC, 16Gx8
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-01119
EEEE_GLL2
CRITICAL
EEEE_BETTER_M
TABLE_ALT_ITEM
TABLE_ALT_ITEM
335S00075
335S00040
ALTERNATE
U1500
H, B0, 1Y, MLC, 64Gx8
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-01122
EEEE_GLL3
CRITICAL
EEEE_ULTRA_M
825-6838
1
EEEE CODE FOR 639-01125
EEEE_GLL6
CRITICAL
EEEE_SUPREME_M
825-6838
1
EEEE CODE FOR 639-01120
EEEE_GLL8
CRITICAL
EEEE_BETTER_RF2_M
TABLE_ALT_ITEM
335S00078
335S00040
ALTERNATE
U1500
H, B0, 1Y, TLC, 64Gx8
TABLE_5_ITEM
TABLE_ALT_ITEM
335S00082
335S00040
ALTERNATE
U1500
T, B0, 1Z, TLC, 64Gx8
Global Ferrite Alternates
TABLE_5_ITEM
TABLE_ALT_ITEM
335S00064
335S00040
ALTERNATE
U1500
S, B0, 1Z, TLC, 64Gx8
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-01123
EEEE_GLL0
CRITICAL
EEEE_ULTRA_RF2_M
TABLE_ALT_HEAD
TABLE_ALT_ITEM
335S00083
335S00079
ALTERNATE
U1500
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
152S2052
152S1929
ALTERNATE
?
IND, 1UH, 1.2A, 0603
155S0773
155S0453
ALTERNATE
?
FERR, 120OHM, 0.8OHM DCR, 01005
155S0653
155S0511
ALTERNATE
?
FERR, 33OHM, 0.09OHM DCR, 0201
155S00067
155S0581
ALTERNATE
?
FERR, 240OHM, 0.38OHM DCR, 0201
155S00012
155S00009
ALTERNATE
?
FLTR, 65 OHMS, 0605
155S0960
155S0941
ALTERNATE
?
FERR, 70 OHMS, 01005
TABLE_5_ITEM
T, B0, 1Z, TLC, 128Gx8
825-6838
1
EEEE CODE FOR 639-01126
CRITICAL
EEEE_GLLC
EEEE_SUPREME_RF2_M
TABLE_ALT_ITEM
335S00065
335S00079
ALTERNATE
U1500
TABLE_ALT_ITEM
TABLE_5_ITEM
S, B0, 1Z, TLC, 128Gx8
825-6838
1
EEEE_GLKY
EEEE CODE FOR 639-01121
CRITICAL
EEEE_BETTER_RFC_M TABLE_ALT_ITEM
TABLE_5_ITEM
825-6838
Carbon BOM Options
1
EEEE_GLL5
EEEE CODE FOR 639-01124
CRITICAL
EEEE_ULTRA_RFC_M TABLE_ALT_ITEM
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-01127
EEEE_GLL9
CRITICAL
EEEE_SUPREME_RFC_M TABLE_ALT_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
PMU/SOC BOM Options
TABLE_5_ITEM
338S1163
1
DISCRETE ACCEL, BOSCH
U3030
CRITICAL
NOSTUFF
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_HEAD TABLE_5_ITEM
C
338S1163
1
DISCRETE ACCEL, BOSCH
U3030
CRITICAL
PART#
CARBON_INVENSENSE
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
C
TABLE_5_ITEM
Global Varistor Alternates
TABLE_5_ITEM
338S00017
1
CARBON, INVENSENSE
U3010
CRITICAL
CARBON_INVENSENSE
998-01699
1
IC,PMU,ANTIGUA,A0,AI,200UBM,210SB,CSP380
U2000
POR
118S0631
1
RES,MF,100 OHM,1%,1/32W,01005
R0730
POR
TABLE_5_ITEM TABLE_5_ITEM
132S0395
1
C3013
C3013, 0.1UF, INVENSENSE OPTION
CRITICAL
CARBON_INVENSENSE
TABLE_ALT_HEAD
TABLE_5_ITEM TABLE_5_ITEM
338S00029
1
CARBON, ST
U3010
CRITICAL
CARBON_ST
131S0307
1
CAP,CER,NP0/C0G,100PF,5%,16V,01005
C0730
POR
339S00057
1
DEV FUSED, H DRAM
U0600
POR
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
377S0168
377S0140
ALTERNATE
?
VARISTOR, 6.8V, 100PF, 01005
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
132S0391
1
C3013, 0.01UF, ST OPTION
C3013
CRITICAL
CARBON_ST
338S00087
1
CARBON, INVENSENSE MPU-6800
U3010
CRITICAL
CARBON_INVENSENSE_6800
132S0395
1
C3013, 0.1UF, INVENSENSE OPTION
C3013
CRITICAL
CARBON_INVENSENSE_6800
TABLE_5_ITEM
DDR PLL Alternate
TABLE_5_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION TABLE_ALT_HEAD TABLE_5_ITEM
Power Inductor Alternates
998-02438
1
IC,PMU,ANTIGUA,A1,ZJ,200UBM,210SB,CSP380
U2000
M
118S00009
1
RES,MF,3.01KOHM,1%,1/32W,01005
R0730
M
131S0307
1
CAP,CER,NP0/C0G,100PF,5%,16V,01005
C0730
NOSTUFF
339S00067
1
M DEV FUSED, M DRAM
U0600
M
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
155S00095
155S00068
ALTERNATE
FL1280
FERR BD,100OHM,25%,100MA,2OHM,01005
TABLE_5_ITEM TABLE_ALT_ITEM
TABLE_ALT_HEAD TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_5_ITEM TABLE_ALT_ITEM
152S00117
152S00074
ALTERNATE
$?
IND,PWR,SHLD,1.0 UH,3.6A,0.060 OHM,2016
152S00118
152S00075
ALTERNATE
$?
IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016
152S00120
152S00077
ALTERNATE
$?
IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016
TABLE_ALT_ITEM
Maui AP Alternates
TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00121
152S00081
ALTERNATE
$?
IND,PWR,SHLD,0.47 UH,3.8A,0.048 OHM,2012
152S00123
152S1936
ALTERNATE
$?
IND,PWR,SHLD,15 UH,0.72A,0.900 OHM,3225
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
339S00058
339S00057
ALTERNATE
U0600
DEV FUSED, M DRAM
339S00059
339S00057
ALTERNATE
U0600
DEV FUSED, S DRAM
339S00068
339S00067
ALTERNATE
U0600
M DEV FUSED, M DRAM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S1929
152S2052
ALTERNATE
$?
TABLE_ALT_ITEM
IND,MULT,1UH,1.2A,0.320 OHM,0603
TABLE_ALT_ITEM
B
SIM Callouts
B TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
CRITICAL
COMMON
Low Noise Caps
TABLE_5_ITEM
512S00013
1
SIM, Integrated Eject, N66
J3001_RF
TABLE_5_HEAD
PART#
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
COMMENTS: TABLE_5_ITEM
138S0867
3
CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402
C2085, C2086, C2087
CAPS_NORMAL
998-01223
3
CAP,X5R,10UF,20%,6.3V,0.65MM,0402,INTPOSER
C2085, C2086, C2087
CAPS_LOW_NOISE
TABLE_ALT_ITEM
512S00015
512S00013
ALTERNATE
J3001_RF
TABLE_5_ITEM
SIM, INTEGRATED EJECT, N71
NOTE: Revisit for Carrier
SEP EEPROM Alternate
Shield Alternates
TABLE_ALT_HEAD TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
613-01503
806-02349
ALTERNATE
SH0500
Upper Front shield
613-01504
806-02350
ALTERNATE
SH0501
Lower Front shield
806-02655
806-02352
ALTERNATE
SH0503
Upper Back shield
806-03410
806-02352
ALTERNATE
SH0503
Upper Back shield
806-02656
806-02353
ALTERNATE
SH0504
Lower Back shield
806-03411
806-02353
ALTERNATE
SH0504
Lower Back shield
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
335S00066
335S0946
ALTERNATE
U0900
IC,EEPROM,16KX8,1.8V,I2C,WLCSP4,ONSEMI
TABLE_ALT_ITEM TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
NOTE: Revisit for Carrier
A
A PAGE TITLE
SYSTEM:BOM TABLES DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
3 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
2 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
TESTPOINTS
TP16 1
PMU_AMUX_AY
A
POWER
TP-P55
VOLTAGE=0V
A
TP-P5
POWER GROUND
TP17 1
PMU_AMUX_BY
16
A
TP-P55
ROOM=TEST
32 31 17
A
TP-P55
VBUS 29 28
TP02 1
PP_BATT_VCC
A
ROOM=TEST
TP04 1
A
TP-P5
0X27
0X4E
BACKLIGHT 1
1100011X
0X62
0XC4
TIGRIS
1110101X
0X75
0XEA
ARC DRIVER
1000001X
0X41
0X82
SPEAKER AMP
1000000X
0X40
0X80
TRISTAR
0011010X
0X1A
0X34
ALS
0101001X
0X29
0X52
DISP EEPROM
1010001X
0X51
0XA2
BACKLIGHT 2
1100011X
0X62
0XC4
D
A
I2C2
LCM POWER GROUND 30
TP20 1
PP_LCM_BL_CAT1_CONN
A
LCM BACKLIGHT SINK1 OWL
ROOM=TEST
RESET PP06
P4MM-NSM SM 1 PP
30
TP21 1
PP_LCM_BL_CAT2_CONN
A
TP-P55
LCM BACKLIGHT SINK2
ISP I2C0
ROOM=TEST
SOC & BB RESET
ROOM=TEST 30
TP22 1
PP_LCM_BL_ANODE_CONN
A
ROOM=TEST
DFU TP07 1
A
TP-P55
FORCE DFU
30
TP23 1
PP_LCM_BL_CAT3_CONN
A
PP07
30
TP24 1
PP_LCM_BL_CAT4_CONN
A
TP-P55
N/A
N/A
REAR CAM
TBD
TBD
TBD
1100011X
0X63
0XC6
ISP I2C1
FRONT CAM
0010000X
0X10
0X20
LCM BACKLIGHT SINK3
TOUCH I2C
MESON
1000000X
0x40
0x80
MAMBA
1100000X
0x60
0xC0
DOPPLER
1011000X
0x58
0xB0
SEP EEPROM
1010001X
0x51
0xA2
ROOM=TEST
P4MM-NSM SM 1
N/A
LED DRIVER
TP-P55
ROOM=TEST
UNUSED
LCM BACKLIGHT SOURCE
TP-P55
LCM BACKLIGHT SINK4
C
ROOM=TEST
PP
SEP I2C
ROOM=TEST
PP08
DFU_STATUS
0100111X
I2C1
TP-P55
34 8
CHESTNUT
ANALOG MUX B OUTPUT
ROOM=TEST
ROOM=TEST
PP1V8
0XE8
TP-P55
TP-P5
21 20 17 14 13 12 9 8 7 6 5 3 34 30
0X74
TP19 1
PP16V5_MESA
29 28
ROOM=TEST
C
1110100X
ROOM=TEST
VBATT
A
FORCE_DFU
ANTIGUA PMU
A
TP03 1
34 8
I2C0
8-BIT HEX
7-BIT HEX
TP-P55
ROOM=TEST
PMU_TO_SYSTEM_COLD_RESET_L
DEVICE
TP18 1
MESA_TO_BOOST_EN
TP-P5
34 16 9 5
BINARY
I2C BUS
SM
PP
MOJAVE
ROOM=TEST
18 17
1
1
ROOM=TEST
TP01 1
PP5V0_USB
GND
ANALOG MUX A OUTPUT
2
N66 I2C DEVICE MAP
PP09 0.50MM
ROOM=TEST
TP00 1
3
UAT GND Ring Opening
AMUX 16
D
4
30
P4MM-NSM SM 1
TP25 1
PP_LCM_BL34_ANODE_CONN
A
LCM BACKLIGHT SOURCE (3/4)
TP-P55
PP
ROOM=TEST
ROOM=TEST
BOOTSTRAPPING:BOARD REV BOARD ID BOOT CONFIG
E75 32 31
TRISTAR_DP1_CONN_P
TP08 1
A
TP-P5 8
ROOM=TEST
B
32 31
TRISTAR_DP1_CONN_N
BOARD_REV3
01005
TP09 1
A
8
BOARD_REV2
ROOM=TEST
TRISTAR_DP2_CONN_P
NOSTUFF
TP10 1
8
BOARD_REV1
A
NOSTUFF
ROOM=TEST
TRISTAR_DP2_CONN_N
R0402 01005
TP-P5
32 31
R0401 01005
TP-P5
32 31
R0400
TP11 1
8
BOARD_REV0
R0403 01005
A
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
2 1.00K 1/32W
PP1V8
2 1.00K 1/32W 2 1.00K 1/32W
3 5 6 7 8 9 12 13 14 17 20 21 30 34
B
BOARD_REV[3:0]
SELECTED -->
2 1.00K 1/32W
FLOAT=LOW, PULLUP=HIGH 1111 PROTO1 1110 PROTO2 1101 EVT 1100 EVT-MD XXXX CARRIER XXXX DVT
TP-P5 ROOM=TEST
32 31
PP_TRISTAR_ACC1
TP12 1 TP-P5
PP_TRISTAR_ACC2
8
ACCESSORY ID AND POWER
ROOM=TEST
32 31
NOSTUFF
A
BOARD_ID4
01005
TP13 1
A
8
BOARD_ID3
R0405 01005
ROOM=TEST
TP14 1
A
TP-P55 ROOM=TEST
8
TP IS TO HELP WITH USB SI IN THE FACTORY FIXTURE.
TP15 1
BOARD_ID2
R0406 01005
BOARD_ID1
R0407 01005
A
TP-P55
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
2 1.00K 1/32W 2 1.00K 1/32W
BOARD_ID[4:0] 2 1.00K 1/32W SELECTED -->
8
TRISTAR_CON_DETECT_L
ROOM=SOC
1 MF
NOSTUFF
TP-P5
32 31
R0404
NOSTUFF
FOR DIAGS
ROOM=TEST
8
BOARD_ID0
R0408 01005
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
1.00K
2 1/32W
FLOAT=LOW, 00100 N71 00101 N71 00110 N66 00111 N66
PULLUP=HIGH MLB DEV MLB DEV
2 1.00K 1/32W
A
A PAGE TITLE
NOSTUFF 8
BOOT_CONFIG2
R0409 01005
8
BOOT_CONFIG1
R0410 01005
8
BOOT_CONFIG0
R0411 01005
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
2 1.00K 1/32W
1.00K
2 1/32W
1.00K
2 1/32W
SYSTEM:N66 SPECIFIC
BOOT_CONFIG[2:0]
SELECTED -->
DRAWING NUMBER
FLOAT=LOW, PULLUP=HIGH 000 SPI0 001 SPI0 TEST MODE 010 NVME0_X2 011 NVME0 X2 TEST 100 NVME0 X1 101 NVME0 X1 TEST 111 FAST SPI0
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
3 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
TUBE STANDOFF: STOCKHOLM FEED 860-5189
TUBE STANDOFF 860-00177
D
ROOM=ASSEMBLY
ROOM=ASSEMBLY
BS0530 STDOFF-2.6OD0.648H-TH
BS0531 STDOFF-2.6OD0.648H-TH
1
5
34
AP_TO_STOCKHOLM_ANT
33 4
NORTH_AC_GND_SCREW 1
TUBE STANDOFF
C0550 220PF
860-00176 1
10% 2 10V X7R-CERM 01005
BS0513 ROOM=ASSEMBLY
THREADED STANDOFF
1
C0551 100PF
5% 2 16V NP0-C0G 01005
1
C0552
1
5%
+/-0.1PF 2 16V NP0-C0G 01005
100PF
2 16V NP0-C0G
01005
C0553 4.7PF
ROOM=ASSEMBLY
ROOM=ASSEMBLY
ROOM=ASSEMBLY
ROOM=ASSEMBLY
860-00175
FIDUCIALS CL0501
FD0501
1 2 3 4 5
0P5SM1P0SQ-NSP 1
STDOFF-2.9OD0.888H-SM
D
FID
ROOM=ASSEMBLY
COAX CLIP BRACE 806-02354
FD0503
CLIP-BRACE-COAX-N66
BS0510 1
1
SM
STDOFF-2.6OD0.808H
NORTH_AC_GND_SCREW
2
(BLOCKS DC CURRENT THROUGH COMPASS REGION) 33 4
ROOM=ASSEMBLY
3
MLB NORTH PENINSULA AC CHASSIS SHORT
1
BS0520 STDOFF-2.49OD1.4ID-1.25H-SM
1
4
FID
0P5SM1P0SQ-NSP 1
TODO: TUNE AC CAPS FOR ANTENNA RF GND
ROOM=ASSEMBLY
ROOM=ASSEMBLY
FD0504 FID
0P5SM1P0SQ-NSP 1 ROOM=ASSEMBLY
THREADED STANDOFF
TOP SIDE
BS0512
THREADED STANDOFF 860-00175
FD0505
BOTTOM SIDE
860-00175
FID
0P5SM1P0SQ-NSP 1
ROOM=ASSEMBLY
STDOFF-2.9OD0.888H-SM
BS0511
1
FD0510
STDOFF-2.9OD0.888H-SM
FID
0P5SQ-SMP3SQ-NSP 1
1 ROOM=ASSEMBLY
ROOM=ASSEMBLY
ROOM=ASSEMBLY
FD0511
PLATED SLOTTED THRU-HOLE 998-00099
FID
0P5SQ-SMP3SQ-NSP 1
CL0502 TH-NSP
C
ROOM=ASSEMBLY
FD0512
1 SL-1.20X0.40-1.50X0.70-NSP
C
FID
806-02352 SHLD-EMI-UPPER-BACK-N66
0P5SQ-SMP3SQ-NSP 1
ROOM=ASSEMBLY
1
1
FD0513
SH0503
806-02349 SHLD-EMI-UPPER-FRONT-N66
FID
SM
0P5SQ-SMP3SQ-NSP 1
ROOM=ASSEMBLY
SH0500
FD0514
ROOM=ASSEMBLY
SM
FID
0P5SQ-SMP3SQ-NSP 1
ROOM=ASSEMBLY
ROOM=ASSEMBLY
FD0515 FID
0P5SQ-SMP3SQ-NSP 1
ROOM=ASSEMBLY
DOUBLE COAX CLIP 806-01802 CLIP-RETENTION-COAX-DOUBLE 1
FD0502
CL0500 SM
FID
29 28 27 26 25 23 22 17 15 14 34
PP_VCC_MAIN
0P5SM1P0SQ-NSP 1
ROOM=ASSEMBLY
B
B 806-02350 SHLD-EMI-LOWER-FRONT-N66 1
SH0501
806-02353 SHLD-EMI-LOWER-BACK-N66
SM
1 ROOM=ASSEMBLY
SH0504 SM
ROOM=ASSEMBLY
TIGRIS/SPKR INDUCTOR SHIELD 806-02351 SHLD-EMI-SA-N66 1
SH0502 SM
A
A
ROOM=ASSEMBLY PAGE TITLE
SYSTEM: MECHANICAL COMPONENTS
BS0500 SOUTH TUBE STANDOFF 860-00176
DRAWING NUMBER
STDOFF-2.6OD0.808H
Apple Inc.
1
051-00094 REVISION
4.0.0
R
ROOM=ASSEMBLY
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
5 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
4 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
MAUI - USB, JTAG, XTAL D
D
VDD12_PLL_LPDP:1.14-1.26V @2mA MAX VDD12_PLL_SOC: 1.14-1.26V @12mA MAX VDD12_PLL_CPU: 1.14-1.26V @2mA MAX VDD18_USB: 1.71-1.89V @20mA MAX VDD18_XTAL:1.62-1.98V @2mA MAX
R0600 15 7 6
PP1V2
1
0.00 0% 1/32W MF 01005
PP1V2_PLL
2
PP1V8
3 6 7 8 9 12 13 14 17 20 21 30 34
VOLTAGE=1.2V
1
C0600
1
0.1UF
ROOM=SOC
2
20% 6.3V X5R-CERM 01005
C0601
1
0.1UF 2
ROOM=SOC
20% 6.3V X5R-CERM 01005 ROOM=SOC
C0602
1
C0603
0.01UF
2
1
20% 2 6.3V X5R-CERM 01005
10% X5R 01005
2
6.3V
ROOM=SOC
FL0610
1KOHM-25%-0.2A
0.1UF
0.01UF
10% 6.3V X5R 01005
C0612 PP1V8_XTAL
ROOM=SOC
ROOM=SOC
1
VOLTAGE=1.8V
1
C0611 0.1UF
PP3V3_USB VDD18_XTAL AL34
VDD33_USB AN20
VDD18_USB AL21
VDD12_PLL_LPDP F22 U20 T19 VDD12_PLL_SOC W19 VDD12_PLL_CPU AF13
VDD12_UH1_HSIC0 AP21 VDD12_UH2_HSIC1 C15
ROOM=SOC
2.2UF
ROOM=SOC
ROOM=SOC
C
C0610
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 01005
1
1
2 0201
C0620
15
3.14-3.46V @5mA MAX
0.1UF
20% 6.3V 2 X5R-CERM 01005 ROOM=SOC
C
OMIT_TABLE
CRITICAL
U0600 MAUI-2GB-25NM-DDR-H AN22 NC AN21 NC
UH1_HSIC0_DATA UH1_HSIC0_STB
C16 NC D15 NC
UH2_HSIC1_DATA UH2_HSIC1_STB
Y32
31 31
34 16 9 3
31 28 16 9
16 5
B
13
SWD_DOCK_BI_AP_SWDIO SWD_DOCK_TO_AP_SWCLK PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_OWL_ACTIVE_READY AP_TO_PMU_TEST_CLKOUT AP_TO_NAND_RESET_L
AC32 NC AB31 NC AA32 NC AB32 AA31 AC31 H33 AR23
AN23
FCMSP SC58980B0B-A040
ANALOGMUX_OUT AP24
SYM 1 OF 14 ROOM=SOC
USB_D_P AT20 USB_D_N AT19
USB_AP_DATA_P USB_AP_DATA_N
USB_VBUS AP19
USB_VBUS_DETECT
JTAG_SEL JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK
AP_TO_PMU_AMUX_OUT 16
5 31 5 31
17
USB_ID AR19NC
COLD_RESET* CFSB
USB_REXT AP18
USB_REXT 1
TST_CLKOUT
R0640 200
1% 1/32W MF 2 01005
S3E_RESET*
B
ROOM=SOC
H32
HOLD_RESET
AF6
TESTMODE
AL22 AG25
WDOG Y33
XI0 AK35 XO0 AL35
FUSE1_FSRC FUSE2_FSRC
AP_TO_PMU_WDOG_RESET XTAL_AP_24M_IN XTAL_AP_24M_OUT
16
1
R0650
CRITICAL
511K
1% 1/32W MF 2 01005 ROOM=SOC
ROOM=SOC
Y0600
1.60X1.20MM-SM
R0651 1
0.00 0% 1/32W MF 01005
ROOM=SOC
24.000MHZ-30PPM-9.5PF-60OHM 1 3 SOC_24M_O
2 1
C0650
2
4 1
12PF
C0651 12PF
5%
16V
2 CERM 01005
2
ROOM=SOC
AP_XTAL_GND
5% 16V CERM 01005
ROOM=SOC
PROBE POINTS PCB: PLACE THIS XW AT U1, NEAR XI/XO
XW0650 SHORT-10L-0.1MM-SM 1
31 5
1
USB_AP_DATA_P
SM PP
PP0600 P3MM-NSM ROOM=SOC
2
31 5
VOLTAGE=0V
1
USB_AP_DATA_N
SM PP
ROOM=SOC
PP0601 P3MM-NSM ROOM=SOC
16 5
1
AP_TO_PMU_TEST_CLKOUT
SM PP
PP0610 P3MM-NSM ROOM=SOC
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
SOC:JTAG,USB,XTAL DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
6 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
5 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
A
8
7
6
5
4
3
2
1
MAUI - PCIE INTERFACES VDD12_PCIE_REFBUF:1.08-1.26V @50mA MAX VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX VDD12_PCIE: 1.14-1.26V @115mA MAX
PP_FIXED
PP1V2
ROOM=SOC
1.0UF
20% 2 6.3V X5R 0201-1
ROOM=SOC
1
C0742
1
0.1UF
C0743
1
0.1UF
0.1UF
20% 2 6.3V X5R-CERM 01005
20% 6.3V 2 X5R-CERM 01005 ROOM=SOC
ROOM=SOC
1
C0731 0.1UF
20% 2 6.3V X5R-CERM 01005 ROOM=SOC
PCIE_EXT_C 13 13
C
PCIE LINK 0
13 13
13 13
13 13
PCIE LINK 1
34
B
34
34 34
PCIE LINK 2
34 34
34 34
C0701
1 ROOM=SOC 20% X5R-CERM 1 ROOM=SOC 20% X5R-CERM
PCIE_NAND_TO_AP_RXD0_P PCIE_NAND_TO_AP_RXD0_N
C0702 C0703 ROOM=SOC
1 20% X5R-CERM 1 ROOM=SOC 20% X5R-CERM
PCIE_AP_TO_NAND_TXD0_P PCIE_AP_TO_NAND_TXD0_N
C0704 C0705 ROOM=SOC
1 20% X5R-CERM 1 ROOM=SOC 20% X5R-CERM
PCIE_NAND_TO_AP_RXD1_P PCIE_NAND_TO_AP_RXD1_N
C0706 C0707
PCIE_AP_TO_NAND_TXD1_P PCIE_AP_TO_NAND_TXD1_N
C0709 ROOM=SOC
2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005
C0710 C0711 ROOM=SOC
1 20% X5R-CERM 1 ROOM=SOC 20% X5R-CERM
PCIE_AP_TO_WLAN_TXD_P PCIE_AP_TO_WLAN_TXD_N
C0712 C0715 ROOM=SOC
1 20% X5R-CERM 1 ROOM=SOC 20% X5R-CERM
PCIE_BB_TO_AP_RXD_P PCIE_BB_TO_AP_RXD_N
C0716 C0717 ROOM=SOC
1 20% X5R-CERM 1 ROOM=SOC 20% X5R-CERM
PCIE_AP_TO_BB_TXD_P PCIE_AP_TO_BB_TXD_N
C0718
2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005
PCIE_EXT_C
AM30 AN30
PCIE_RX0_P PCIE_RX0_N
PCIE_AP_TO_NAND_TXD0_C_P PCIE_AP_TO_NAND_TXD0_C_N
AT32 AR32
20% 2 6.3V X5R-CERM 01005 ROOM=SOC
OMIT_TABLE
CRITICAL
U0600 FCMSP SC58980B0B-A040 SYM 2 OF 14
PCIE_TX0_P PCIE_TX0_N
1
C0751
1
1.0UF
C0750 2.2UF
20% 2 6.3V X5R 0201-1
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
ROOM=SOC
AN35 AP35
PCIE_AP_TO_NAND_REFCLK_P 13 PCIE_AP_TO_NAND_REFCLK_N 13
PCIE_REF_CLK1_P AN34 PCIE_REF_CLK1_N AP34
PCIE_AP_TO_WLAN_REFCLK_P 34 PCIE_AP_TO_WLAN_REFCLK_N 34
PCIE_REF_CLK2_P AM32 PCIE_REF_CLK2_N AN32
PCIE_AP_TO_BB_REFCLK_P 34 PCIE_AP_TO_BB_REFCLK_N 34
PCIE_REF_CLK0_P PCIE_REF_CLK0_N
PP1V8
PCIE_REF_CLK3_P AM31NC PCIE_REF_CLK3_N AN31NC
PCIE_NAND_TO_AP_RXD1_C_P PCIE_NAND_TO_AP_RXD1_C_N
2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005
AP29
MAUI-2GB-25NM-DDR-H
2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005
1 20% X5R-CERM 1 ROOM=SOC 20% X5R-CERM
PCIE_NAND_TO_AP_RXD0_C_P PCIE_NAND_TO_AP_RXD0_C_N
2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005
1 ROOM=SOC 20% X5R-CERM 1 ROOM=SOC 20% X5R-CERM
C0708
PCIE_WLAN_TO_AP_RXD_P PCIE_WLAN_TO_AP_RXD_N
2 0.1UF 6.3V 01005 2 0.1UF 6.3V 01005
C0752
AM28 AN28
D
7 11 14
VDD085_PCIE
20% 2 6.3V X5R-CERM 0201
C0741
AH28 AJ25 AL23 AJ29 AL29 AJ24 AK27 AJ27
2.2UF
1
VDD12_PCIE_REFBUF AJ26
C0740
VDD12_PCIE_TXPLL AL26
1
VDD12_PCIE
15 7 5
AK28 AK25 AL24 AL27
D
VDD085_PCIE:0.802-TBDV @TBDmA MAX
1
R0720 100K
5% 1/32W MF 2 01005
PCIE_RX1_P PCIE_RX1_N
ROOM=SOC
PCIE_CLKREQ0* PCIE_CLKREQ1* PCIE_CLKREQ2* PCIE_CLKREQ3*
PCIE_WLAN_TO_AP_RXD_C_P PCIE_WLAN_TO_AP_RXD_C_N
PCIE_RX2_P PCIE_RX2_N
PCIE_AP_TO_WLAN_TXD_C_P PCIE_AP_TO_WLAN_TXD_C_N
AT28 AR28
PCIE_TX2_P PCIE_TX2_N
PCIE_EXT_REF_CLK_P AR33 PCIE_EXT_REF_CLK_N AT33
1
R0700 100K
5% 1/32W MF 2 01005
ROOM=SOC
PCIE_RX3_P PCIE_RX3_N
PCIE_AP_TO_BB_TXD_C_P PCIE_AP_TO_BB_TXD_C_N
AT26 AR26
PCIE_TX3_P PCIE_TX3_N
5% 1/32W MF 2 01005
ROOM=SOC
C
R0722 100K
5% 1/32W MF 2 01005
ROOM=SOC
PCIE_AP_TO_NAND_RESET_L PCIE_AP_TO_WLAN_RESET_L PCIE_AP_TO_BB_RESET_L
PCIE_PERST0* PCIE_PERST1* PCIE_PERST2* PCIE_PERST3*
AM26 AN26
100K
1
AR10 AT10 AP11 AR11 NC
AM27 AN27
PCIE_BB_TO_AP_RXD_C_P 6 PCIE_BB_TO_AP_RXD_C_N
R0721
PCIE_NAND_TO_AP_CLKREQ_L PCIE_WLAN_TO_AP_CLKREQ_L PCIE_BB_BI_AP_CLKREQ_L
AT31 AR31
6
1
AT11 AP12 AR12 AT12 NC
PCIE_AP_TO_NAND_TXD1_C_P PCIE_AP_TO_NAND_TXD1_C_N
PCIE_TX1_P PCIE_TX1_N
3 5 7 8 9 12 13 14 17 20 21 30 34
NOSTUFF
1
R0701 100K
5% 1/32W MF 2 01005
ROOM=SOC
1
13 34 34
13 34 34
R0702 100K
5% 1/32W MF 2 01005
ROOM=SOC
B
PCIE_RX_TX_BYPASS_CLK_P AT29 PCIE_RX_TX_BYPASS_CLK_N AR29
PROBE POINTS PCIE RX CAPS ARE PLACED CLOSER TO TX DRIVERS PROBE POINTS ADDED FOR MEASUREMENTS AT RX DRIVER
AM25 NC AN25 NC
PCIE_RX4_P PCIE_RX4_N
6
PCIE_BB_TO_AP_RXD_C_P
1
SM PP
ROOM=SOC
6
PCIE_BB_TO_AP_RXD_C_N
1
SM PP
PCIE_RCAL_P OMIT_TABLE PCIE_RCAL_P AT30 PCIE_RCAL_N AR30
PCIE_TX4_P PCIE_TX4_N
PP0707 P3MM-NSM ROOM=SOC
1
AR24 NC AT24 NC
PP0706 P3MM-NSM
R0730 100
1% 1/32W MF 2 01005 ROOM=SOC
PCIE_RCAL_N
A
OMIT_TABLE 1
C0730 100PF
5% 2 16V NP0-C0G 01005
ROOM=SOC
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
SOC:PCIE DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
7 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
6 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
A
8
7
6
5
4
3
2
1
MAUI - CAMERA & DISPLAY INTERFACES D
D
0.756-0.893V @11mA MAX
PP1V8
20% 2 6.3V X5R-CERM 01005
C0801
1
0.1UF
C0802
1
0.1UF
20% 2 6.3V X5R-CERM 01005
C0815 0.1UF
20% 2 6.3V X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
ROOM=SOC
ROOM=SOC
VDD085_MIPI
ROOM=SOC
1
NOTE:VDD12_LPDP SHOULD BE POWERED EVEN WHEN LPDP IS NOT USED
ROOM=SOC
15 6 5
PP1V8
PP1V2
3 5 6 7 8 9 12 13 14 17 20 21 30 34
E23 E25 E27 F24
0.1UF
3 5 6 7 8 9 12 13 14 17 20 21 30 34
VDD18_MIPI
C0814
D10 E7 D8 E11 E14
1
E10 E13 E8 D13
14 11 6
1.62-1.98V @23mA MAX
PP_FIXED
CRITICAL 1
R0804 1.00K
MAUI-2GB-25NM-DDR-H
5% 1/32W MF 2 01005
FCMSP SC58980B0B-A040
ROOM=SOC
C
21 21
21 21
21 21
21 21
21 21
MIPI_RCAM_TO_AP_DATA0_CONN_P MIPI_RCAM_TO_AP_DATA0_CONN_N
B8 A8
MIPI_RCAM_TO_AP_DATA1_CONN_P MIPI_RCAM_TO_AP_DATA1_CONN_N
A9 B9
MIPI0C_DATA1_P MIPI0C_DATA1_N
MIPI_RCAM_TO_AP_DATA2_CONN_P MIPI_RCAM_TO_AP_DATA2_CONN_N
A13 B13
MIPI0C_DATA2_P MIPI0C_DATA2_N
MIPI_RCAM_TO_AP_DATA3_CONN_P MIPI_RCAM_TO_AP_DATA3_CONN_N MIPI_RCAM_TO_AP_CLK_CONN_P MIPI_RCAM_TO_AP_CLK_CONN_N RCAM_REXT 30 30
30 30
30 30
30
B
30
30 30
MIPI_AP_TO_LCM_DATA0_P MIPI_AP_TO_LCM_DATA0_N
R0801 4.02K
1% 1/32W MF 01005 2
ROOM=SOC
R0802
MIPI0C_CLK_P MIPI0C_CLK_N
D12
MIPI0C_REXT
A3 B3 B4 A4
MIPI_AP_TO_LCM_DATA2_P MIPI_AP_TO_LCM_DATA2_N
B6 A6
MIPI_AP_TO_LCM_DATA3_P MIPI_AP_TO_LCM_DATA3_N
A7 B7
MIPI_AP_TO_LCM_CLK_P MIPI_AP_TO_LCM_CLK_N
OMIT_TABLE
MIPID_DATA3_P MIPID_DATA3_N
MIPID_REXT
1.00K
5% 1/32W MF 2 01005
5% 1/32W MF 2 01005
ROOM=SOC
R0807
5% 1/32W MF 2 01005
ROOM=SOC
ROOM=SOC
ISP_I2C1_SCL F35 ISP_I2C1_SDA G34
I2C_ISP_TO_FCAM_SCL I2C_ISP_BI_FCAM_SDA
21 22
SENSOR0_CLK D33 SENSOR0_RST D32
AP_TO_RCAM_CLK_R AP_TO_RCAM_SHUTDOWN_L
SENSOR1_CLK F33 SENSOR1_RST E34
AP_TO_FCAM_CLK_R AP_TO_FCAM_SHUTDOWN_L
1 1% MF 21
R0809 1 1% MF
20
33.2
01005
33.2
01005
2 1/32W
AP_TO_RCAM_CLK
21 22
U0600 MAUI-2GB-25NM-DDR-H
20 20
21
ROOM=SOC
AP_TO_FCAM_CLK
2 1/32W
20
ROOM=SOC
AP_TO_SPHERE_BUCK_EN 23 AP_TO_STOCKHOLM_DWLD_REQUEST 34
A29 NC B29 NC
LPDP_AUX_P LPDP_AUX_N
A33 NC B33 NC
LPDP_TX0_P LPDP_TX0_N
A32 NC B32 NC
LPDP_TX1_P LPDP_TX1_N
A31 NC B31 NC
LPDP_TX2_P LPDP_TX2_N
A30 NC B30 NC
LPDP_TX3_P LPDP_TX3_N
NC NC
AP_TO_MUON_BL_STROBE_EN 28
NC
MIPI1C_REXT D14
FCAM_REXT
MIPI1C_DATA0_P B17 MIPI1C_DATA0_N A17
MIPI_FCAM_TO_AP_DATA0_P MIPI_FCAM_TO_AP_DATA0_N
MIPI1C_DATA1_P B19 MIPI1C_DATA1_N A19
MIPI_FCAM_TO_AP_DATA1_P MIPI_FCAM_TO_AP_DATA1_N
MIPI1C_CLK_P A18 MIPI1C_CLK_N B18
MIPI_FCAM_TO_AP_CLK_P MIPI_FCAM_TO_AP_CLK_N
NC
FCMSP SC58980B0B-A040 SYM 4 OF 14 ROOM=SOC
OMIT_TABLE
D24
LPDP_CAL_DRV_OUT
D25
LPDP_CAL_VSS_EXT
AL4
EDP_HPD
H35
DP_WAKEUP
20 20
B
20 20
20 20
1
1
C
CRITICAL
MIPICSI_MUXSEL G35 NC
MIPID_DATA2_P MIPID_DATA2_N
D9
1.00K
I2C_ISP_TO_RCAM_SCL I2C_ISP_BI_RCAM_SDA
SENSOR1_ISTRB C35 NC SENSOR1_XSHUTDOWN C34
MIPID_DATA1_P MIPID_DATA1_N
MIPID_CLK_P MIPID_CLK_N
1.00K
1
R0806
ISP_I2C0_SCL G31 ISP_I2C0_SDA G32
SENSOR0_ISTRB D34 SENSOR0_XSHUTDOWN F32
MIPID_DATA0_P MIPID_DATA0_N
A5 B5
1
R0805
R0808
MIPI0C_DATA3_P MIPI0C_DATA3_N
A12 B12
MIPI_AP_TO_LCM_DATA1_P MIPI_AP_TO_LCM_DATA1_N
LCM_REXT 1
B14 A14
MIPI0C_DATA0_P MIPI0C_DATA0_N
SYM 3 OF 14 ROOM=SOC
1
VDD12_LPDP
U0600
R0803 4.02K
4.02K
1% 1/32W MF 2 01005
1% 1/32W MF 01005 2
ROOM=SOC
ROOM=SOC
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
SOC:CAMERA & DISPLAY DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
8 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
7 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
A
8
7
6
5
4
3
2
1
MAUI - GPIO & SERIAL INTERFACES PP1V8
R09001
R09011
R09021
R09031
R09041
R09051
5% 1/32W MF 01005 2
5% 1/32W MF 01005 2
5% 1/32W MF 01005 2
5% 1/32W MF 01005 2
1% 1/32W MF 01005 2
1% 1/32W MF 01005 2
2.2K
D
2.2K
ROOM=SOC
ROOM=SOC
2.2K
ROOM=SOC
2.2K
1.33K
ROOM=SOC
3 5 6 7 8 9 12 13 14 17 20 21 30 34
D
1.33K
ROOM=SOC
ROOM=SOC
26 34 34 34 22 29 30 16 34 34 3
NO_TEST=1
C
3 27 34 30 9 27 34 27 34 3 34 3 34 3 3 3 25 16 34 13 30 3 3 3 3 34 34 34 33 16 8
B
FCMSP SC58980B0B-A040
1
SYM 5 OF 14
TMR32_PWM0 AE1 TMR32_PWM1 AF2 NC TMR32_PWM2 AF3 NC
CRITICAL ROOM=SOC
OMIT_TABLE
AP_TO_SPHERE_BUCK_MODE
UART0_RXD AE3 UART0_TXD AE4
UART_AP_DEBUG_RXD UART_AP_DEBUG_TXD
UART1_CTS* UART1_RTS* UART1_RXD UART1_TXD
K31 K32 L33 L32
UART_BT_TO_AP_CTS_L UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD
UART2_CTS* UART2_RTS* UART2_RXD UART2_TXD
AT23 NC AR20 NC AP23 NC AP22 NC
UART3_CTS* UART3_RTS* UART3_RXD UART3_TXD
N4 P3 R3 R2
UART4_CTS* UART4_RTS* UART4_RXD UART4_TXD
J33 J34 J35 K33
23
34
R0922
34
33.2 1% 1/32W MF 01005
31 34
34
34
ROOM=SOC
1
31 34
34
ROOM=SOC
34
2 27 26 25 27 26 25 27 26 25 27 26 25
34
20 34
34 34
UART_STOCKHOLM_TO_AP_CTS_L UART_AP_TO_STOCKHOLM_RTS_L UART_STOCKHOLM_TO_AP_RXD UART_AP_TO_STOCKHOLM_TXD UART_WLAN_TO_AP_CTS_L UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD
UART5_RTXD T32
SWI_AP_BI_TIGRIS
31 16 34
25
34
25
34
25
34
25
30
34
3
34
3
ALS_TO_AP_INT_L I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_LRCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT TRISTAR_TO_AP_INT I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT
I2C2_AP_SCL I2C2_AP_SDA
GRP1
CRITICAL I2S1_MCK I2S1_BCLK I2S1_LRCK I2S1_DIN I2S1_DOUT
U32 V33 U33 T33 V34
I2S2_MCK I2S2_BCLK I2S2_LRCK I2S2_DIN I2S2_DOUT
AM3 AM4 AN2 AP1 AN1
I2S3_MCK I2S3_BCLK I2S3_LRCK I2S3_DIN I2S3_DOUT
R32 R31 V32 P31 P32
I2S4_MCK I2S4_BCLK I2S4_LRCK I2S4_DIN I2S4_DOUT
3
AD4 AC3 AB2 AD3
SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN
SPI_CODEC_TO_AP_MISO SPI_AP_TO_CODEC_MOSI SPI_AP_TO_CODEC_SCLK SPI_AP_TO_CODEC_CS_L
P33 V35 N32 M31
SPI1_MISO SPI1_MOSI SPI1_SCLK SPI1_SSIN
SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_TOUCH_SCLK_R SPI_AP_TO_TOUCH_CS_L
E33 E35 F34 F31
SPI2_MISO SPI2_MOSI SPI2_SCLK SPI2_SSIN
SPI_MESA_TO_AP_MISO SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_SCLK_R MESA_TO_AP_INT
AA2 Y2 AA3 AC4
SPI3_MISO SPI3_MOSI SPI3_SCLK SPI3_SSIN
BOARD_ID2 BOARD_ID1 BOARD_ID0
9 17
NC
25 31
25
ROOM=SOC
OMIT_TABLE
PP1V8
R09061
R09071
5% 1/32W MF 01005 2
5% 1/32W MF 01005 2
2.2K
SEP_SPI0_SCLK W3 NC SEP_SPI0_MISO AA4 NC SEP_SPI0_MOSI U2 NC
8 16 28 34
8 17 26 27 31 34 8 17 26 27 31 34
20 28 30 20 28 30
3 5 6 7 8 9 12 13 14 17 20 21 30 34
2.2K
ROOM=SOC
ROOM=SOC
SEP_I2C_SCL V3 SEP_I2C_SDA Y4
I2C_SEP_TO_EEPROM_SCL I2C_SEP_BI_EEPROM_SDA
30 8
1
0.00 0% 1/32W MF 01005
SPI_AP_TO_MESA_SCLK
30
2 30
R0930 0.00
1
0% 1/32W MF 01005
ANALOG_PROX 1
29 29
2 29
8
C
PP1V8
R09091
1
3 5 6 7 8 9 12 13 14 17 20 21 30 34
R0910 10K
5% 1/32W MF 2 01005
5% 1/32W MF 01005 2
ROOM=SOC
ROOM=SOC
ROOM=SOC
R0940 SOCHOT0 AM1
PMU_TO_AP_SOCHOT0_R_L
1 0% MF
0.00
2
01005
PMU_TO_AP_SOCHOT0_L
1/32W
16
R0941 SOCHOT1 AM2
AP_TO_PMU_SOCHOT1_R_L
1 0% MF
0.00
2
01005
AP_TO_PMU_SOCHOT1_L
1/32W
16
ROOM=SOC
CPU_ACTIVE_STATUS H31 NC CLK32K_OUT H34 NAND_SYS_CLK AM24
AP_TO_TOUCH_CLK32K_RESET_L
B
30
R0945
AP_TO_NAND_SYS_CLK_R
1
0.00
AP_TO_NAND_SYS_CLK
2
13
0% 1/32W MF 01005
ROOM=SOC
1.00K
8
SEP_GPIO0 Y3 NC SEP_GPIO1 AB4 NC
31
SPI_AP_TO_TOUCH_SCLK
29
I2C2_SCL L31 I2C2_SDA M32
SYM 6 OF 14
34
R0960
UART7_RXD J31 UART7_TXD J32 NC
I2C1_AP_SCL I2C1_AP_SDA
10K
25
UART_ACCESSORY_TO_AP_RXD UART_AP_TO_ACCESSORY_TXD
I2S_AP_TO_SPEAKERAMP_MCLK_R I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_CODEC_TO_AP_ASP_DIN I2S_AP_TO_CODEC_ASP_DOUT
FCMSP SC58980B0B-A040
34
25
UART6_RXD AF1 UART6_TXD AE2
M4 M3 P1 N3 L4
I2S_AP_TO_ARC_MCLK_R I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCLK I2S_BT_TO_AP_DIN I2S_AP_TO_BT_DOUT
I2C1_SCL AH1 I2C1_SDA AG4
MAUI-2GB-25NM-DDR-H
8 16 28 34
34
34
PP1V8
R0911
2
1% 1/32W MF 01005
ROOM=SOC 21 20 17 14 13 12 9 8 7 6 5 3 34 30
33.2
25
GRP1
R0921
I2C0_AP_SCL I2C0_AP_SDA
GRP3
MAUI-2GB-25NM-DDR-H
25 9
I2C0_SCL E31 I2C0_SDA D35
GRP3
26
25 9
ROOM=SOC
U0600
GRP2
MAMBA_EXT_LDO_EN
26
U0600
25 9
I2S0_MCK I2S0_BCLK I2S0_LRCK I2S0_DIN I2S0_DOUT
GRP1
29
34 33 16
26
GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42
1% 1/32W MF 01005
P34 R34 N34 N35 M33
I2S_AP_TO_CODEC_MCLK_R I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_CODEC_TO_AP_OWL_XSP_DIN I2S_AP_TO_CODEC_XSP_DOUT
GRP3
34
BUTTON_VOL_UP_L BUTTON_VOL_DOWN_L SPEAKERAMP_TO_AP_INT_L AP_TO_SPEAKERAMP_STAYIN_ALIVE AP_TO_SPEAKERAMP_RESET_L AP_TO_BT_WAKE AP_TO_BB_RESET_L PCIE_AP_TO_WLAN_DEV_WAKE AP_TO_LED_DRIVER_EN AP_TO_TOUCH_RESET_L AP_TO_LCM_RESET_L PMU_TO_AP_IRQ_L AP_TO_BB_PCIE_DEV_WAKE AP_TO_STOCKHOLM_DEV_WAKE BOARD_ID3 NC_AP_TO_STOCKHOLM_SIM_SEL BOOT_CONFIG0 AP_TO_ARC_RESET_L LCM_TO_OWL_BSYNC ARC_TO_AP_INT_L BB_TO_AP_GPS_TIME_MARK AP_TO_ARC_STAYIN_ALIVE BB_TO_AP_RESET_DETECT_L BOOT_CONFIG1 FORCE_DFU DFU_STATUS BOOT_CONFIG2 BOARD_ID4 CODEC_TO_AP_PMU_INT_L AP_TO_BB_RADIO_ON_L AP_TO_NAND_FW_STRAP TOUCH_TO_AP_INT_L BOARD_REV3 BOARD_REV2 BOARD_REV1 BOARD_REV0 AP_TO_BB_COREDUMP BB_IPC_GPIO BUTTON_RINGER_A AP_TO_BB_MESA_ON_L
34 33 16
C1 D2 D1 F1 E2 F3 F2 H3 G3 J1 H4 K1 J3 K2 J4 L2 K3 L3 N1 AH2 AH3 AH4 AJ1 AJ2 AJ3 AJ4 AK1 AP3 AN4 AP4 AP5 AR2 AR3 AR4 AP6 AT3 AT4 AR6 AP7 AT5 AP8 AP9 AP10
2
GRP1
32
AP_TO_HP_HS3_CTRL AP_TO_HP_HS4_CTRL
33.2
GRP3
32
1
GRP1
27
I2S_AP_TO_CODEC_MCLK I2S_AP_TO_ARC_MCLK I2S_AP_TO_SPEAKERAMP_MCLK
GRP1
25
GRP1
R0920
5% 1/32W MF 01005 2 ROOM=SOC
ROOM=SOC
PROX_SELECT
I2C PROBE POINTS
SPI PROBE POINTS PIN J31 (UART7_RXD) SHOULD BE SET TO INTERNAL PULL-DOWN. STUFF R0911 FOR ANALOG PROX. NOSTUFF R0911 FOR DOPPLER PROX.
30 8
SPI_TOUCH_TO_AP_MISO
1
SM PP
PP0906 P3MM-NSM ROOM=SOC
I2C0_AP_SCL
34 28 16 8
1
SM PP
PP0900 P3MM-NSM ROOM=SOC
PLACE_SIDE=TOP
I2C0_AP_SDA
34 28 16 8
1
SM PP
PP0901 P3MM-NSM ROOM=SOC
BUTTON PULL-UP RESISTORS
ANTI-ROLLBACK EEPROM
PP1V8_SDRAM 1
R0950 191K
A1
C0900 1.0UF
A
CRITICAL
VCC
20% 2 6.3V X5R 0201-1
BUTTON_MENU_KEY_L BUTTON_RINGER_A
U0900
ROOM=SOC
SCL
WLCSP
SDA
A2
I2C_SEP_BI_EEPROM_SDA I2C_SEP_TO_EEPROM_SCL
B2
VSS
B1
M34128-FCS6_P/T
I2C1_AP_SDA
34 31 27 26 17 8
PP1V8 1
1
PP
1% 1/32W MF 2 01005 ROOM=SOC
1
1
5% 1/32W MF 2 01005 ROOM=SOC 9 16 29 34
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
SOC:SERIAL & GPIO
12 15 17
DRAWING NUMBER
R0952
Apple Inc.
5% 1/32W MF 2 01005 ROOM=SOC
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
9 16 33 34
9 OF 49
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
8 OF 60
IV ALL RIGHTS RESERVED
6
5
PLACE_SIDE=TOP
100K
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
7
PP0903 P3MM-NSM ROOM=SOC
220K
ROOM=SOC
PP
PLACE_SIDE=TOP
R0951
PP1V8_ALWAYS
8
1
SM
12 14 15 16 25 28 31 32 34
8 16 33 34
8
BUTTON_HOLD_KEY_L
8
PP0902 P3MM-NSM ROOM=SOC
128kbit APN:335S0946 21 20 17 14 13 12 9 8 7 6 5 3 34 30
I2C1_AP_SCL
34 31 27 26 17 8
SM
4
3
2
.
1
SIZE
D
A
8
7
6
5
4
3
MAUI - OWL
2
1
POWER STATE CONTROL PROBE POINTS 16 9
OWL_TO_PMU_ACTIVE_REQUEST
1
SM PP
PP1020 P3MM-NSM ROOM=SOC
31 28 16 9 5
D
PMU_TO_OWL_ACTIVE_READY
1
OWL_TO_PMU_SLEEP1_REQUEST
1
SM PP
PP1021 P3MM-NSM
D
ROOM=SOC
16 9
SM PP
PP1022 P3MM-NSM ROOM=SOC
16 11
PMU_TO_OWL_SLEEP1_READY 9
1
SM PP
PP1023 P3MM-NSM ROOM=SOC
PP1V8 1
NOSTUFF
3 5 6 7 8 12 13 14 17 20 21 30 34
R1002 1.00K
5% 1/32W MF 2 01005
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 16 9
C
16 11 9
OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY
AD30 AB33
OWL_DDR_REQ OWL_DDR_RESET*
SYM 7 OF 14
CFSB_AOP W33
CRITICAL
AWAKE_REQ AA33 AWAKE_RESET* AD32
ROOM=SOC 19 19 19 19 19 19 19 34 30 8 9
AF35 AH32 AG32 AG31 AG30 AF33 AE34 AF34 AF31 AF32
OWL_FUNC_0 OWL_FUNC_1 OWL_FUNC_2 OWL_FUNC_3 OWL_FUNC_4 OWL_FUNC_5 OWL_FUNC_6 OWL_FUNC_7 OWL_FUNC_8 OWL_FUNC_9 OWL_I2CM_SCL OWL_I2CM_SDA
OMIT_TABLE
PMGR_MISO PMGR_MOSI PMGR_SCLK0 PMGR_SSCLK1
PHOSPHORUS_TO_OWL_IRQ
19
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
19
DISCRETE_ACCEL_TO_OWL_INT1
AH31 AH33
SPI_IMU_TO_OWL_MISO SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK
AK31 AK32 AL33
OWL_SPI_MISO OWL_SPI_MOSI OWL_SPI_SCLK
UART_BB_TO_OWL_RXD UART_OWL_TO_BB_TXD
AJ32 AK33
OWL_UART0_RXD OWL_UART0_TXD
OWL_TO_WLAN_CONTEXT_B OWL_TO_WLAN_CONTEXT_A
AH30 AJ31
OWL_UART1_RXD OWL_UART1_TXD
TOUCH_TO_OWL_ACCEL_DATA_REQUEST UART_OWL_TO_TOUCH_TXD
AJ34 AJ33
OWL_UART2_RXD OWL_UART2_TXD
19 19
34 34
34 34
30 30
25 8
I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_CODEC_TO_AP_OWL_XSP_DIN
25 8
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
25 8
AD34 AA34 AE32 NC AE31
OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY
AL2 AL1 AK4 AL3
DWI_PMU_TO_PMGR_MISO DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMGR_TO_PMU_SCLK DWI_PMGR_TO_BACKLIGHT_SCLK
RT_CLK32768 AD31
19
19
B
SPI_OWL_TO_COMPASS_CS_L COMPASS_TO_OWL_INT DISCRETE_ACCEL_TO_OWL_INT2 ACCEL_GYRO_TO_OWL_INT1 SPI_OWL_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_OWL_INT2 SPI_OWL_TO_PHOSPHOROUS_CS_L LCM_TO_OWL_BSYNC OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
PMU_TO_SYSTEM_COLD_RESET_L
OWL_SWD_TCK_OUT OWL_SWD_TMS0 OWL_SWD_TMS1 SWD_TMS2 SWD_TMS3
EXT OSC IN
GPO
PMU_TO_OWL_CLK32K SWD_AP_PERIPHERAL_SWCLK
AE33 AD35 NC AC33 U31 T31 NC
SWD_AP_BI_BB_SWDIO SWD_AP_BI_NAND_SWDIO
HOLD_KEY* U3 GPO VDD_SOC GPO
3 5 16 34
C
9 16 5 9 16 28 31
16 16 28 16 28
16
13 34
34 13
BUTTON_HOLD_KEY_L
8 16 33 34
BUTTON_MENU_KEY_L
8 16 29 34
SKEY* W4 NC
MENU_KEY* V4
OWL_I2S_BCLK OWL_I2S_DIN OWL_I2S_MCK OWL_I2S_LRCK
B
OWL SYSTEM SHUTDOWN OPTION NOSTUFF
R1020 10
1 2 1/32W MF 5% 01005 ROOM=SOC 9
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
SWI_AP_BI_TIGRIS
8 17
NOSTUFF
R1021
A
10
1 2 1/32W MF 5% 01005 ROOM=SOC
OWL_TO_PMU_SHDN
SYNC_MASTER=N71_SINGLE_BRD
16
SYNC_DATE=05/29/2014
PAGE TITLE
SOC:OWL DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
10 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
9 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
A
8
7
6
5
4
3
2
1
MAUI - CPU, GPU & SOC RAILS
PP_SOC 1
14 10
AA17 AA19 AA23 AB14 AB16 AB20 AB22 AB24 AB26 AC17 AC19 AC23 AD16 AD20 AD22 AD24 AD26 AE5 AE15 AE17 AE19 AE23 AF14 AF16 AF20 AF22 AF24 AF26 AG17 AG19 AG23 AH16 AH20 AH22 AH24 AH26 AJ15 AJ17 AJ19 AJ23 AK14 J29 G23 AK22 F6 F14 AL15 AM5 G25 G27 H24 H26 H28 J27 K24 K26 K28 L27 L23 M26 M28 AL19 N7 N27 P24 P26 P28 R17 R27 R29 T22 T26 T7 T28 U17 V8 V20 V22 V24 V26 W7 W11 Y28
PP_GPU 0.8V @10.5A MAX 1
C1101
1
10UF
D
SM
PP
1
PP_GPU
1
2.2UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=SOC
10 14
C1103
1
10UF
20% 2 6.3V CERM-X5R 0402-9
TP1120 0.50MM
C1102
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
C1104
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
C1105
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1106
C1107
C1108
C1109
C1110
C1111
4.3UF
7.5UF
4.3UF
7.5UF
4.3UF
7.5UF
1
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
3
20% 4V CERM 0402
1
2 4
3
1
2 4
20% 4V CERM 0402
3
20% 4V CERM 0402
1
2 4
3
1
2 4
20% 4V CERM 0402
3
2 4
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1112
C1113
C1114
C1115
C1116
C1117
1UF
1UF
1UF
1UF
0.47UF
0.47UF
1
1
1
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
3
20% 4V CERM 0402
1
2 4
20% 4V CERM 0402 1
3
2 4
3
20% 6.3V CERM 0402
2 4
AA7 AA9 AA11 AB6 AB10 AB12 AC13 AD6 AD8 AD10 AD12 AE7 AE9 AE11 AE13 AF8 AF10 AF12 AH6 AH8 AH10 AH12 AJ5 AJ7 AJ9 AJ11 AJ13 AK6 AK10 AL7 AL9 AL11 AM6 AM8 AM10 AN7 AN11 AL13 Y8 Y10 Y12 AM12
3
20% 6.3V CERM 0402
2 4
3
2 4
C
XW1110 SHORT-10L-0.1MM-SM 14
BUCK1_PP_GPU_FB
2
1 ROOM=SOC
14 10
PP_CPU 0.625V @TBDA MAX 0.9V @10.5A MAX 1.0V @12.5A MAX
1
C1120 10UF
20% 2 6.3V CERM-X5R 0402-9
TP1100 0.50MM SM
PP
1
PP_CPU
1
1
10UF
1
2.2UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=SOC
C1122
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
C1123
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
C1124
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
C1125
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
10 14
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1126
C1127
C1128
C1129
C1130
C1131
7.5UF
7.5UF
4.3UF
4.3UF
4.3UF
7.5UF
1
20% 4V CERM 0402
3
1
2 4
B
C1121
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
3
2 4
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1132
C1133
C1134
C1135
C1136
C1137
4.3UF
7.5UF
1UF
1UF
1UF
1UF
1
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
3
1
2 4
ROOM=SOC
20% 4V CERM 0402
20% 4V CERM 0402 1
3
2 4
ROOM=SOC
3
2 4
ROOM=SOC
C1139
C1140
C1141
0.47UF
0.47UF
0.47UF
1
1
1
1
2 4
3
2 4
3
20% 6.3V CERM 0402
3
FCMSP SC58980B0B-A040 SYM 8 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
VDD_CPU
VDD_GPU
N17 N19 P10 G11 P12 P14 P16 P20 R15
3
2 4
R19 G13 R9 T10 T14 T16 U11 V14
ROOM=SOC
C1138
20% 6.3V CERM 0402
20% 4V CERM 0402 1
2 4
0.47UF 20% 6.3V CERM 0402
1
20% 4V CERM 0402
U0600 MAUI-2GB-25NM-DDR-H
3
2 4
20% 6.3V CERM 0402
3
V16 G7 R23 G9 H10 T24 P22 W17
2 4
XW1100
SHORT-10L-0.1MM-SM 14
G15 W13 T12 M6 U9 V12 W9 M12 M18 N15 N21 N9 F10 H14 H16 H20 H22 H6 H8 J11 J13 J17 J19 J23 J7 K10 K14 K16 K20 K22 K6 K8 L11 L13 L15 L17 L19 L21 M24 L7 L9 F8 M8 N11 N13
BUCK0_PP_CPU_FB
2
1
N23 G17 G21 T18 T20
ROOM=SOC
A PP1100 P2MM-NSM PP1101 P2MM-NSM
SM PP
SM PP
1
AP_CPU_SENSE_P
Y6 VDD_CPU_SENSE
VDD_GPU_SENSE G20
SM PP1105 P2MM-NSM SM PP1104 P2MM-NSM
PP PP
1
AP_SOC_SENSE_P
AP_CPU_SENSE_N
Y7 VSS_CPU_SENSE
VSS_GPU_SENSE H19
ROOM=SOC
MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 SYM 9 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
VSS
AJ20
VDD_SOC_SENSE
1
AP_SOC_SENSE_N
AK21
VSS_SOC_SENSE
ROOM=SOC
AP_GPU_SENSE_P
16
AP_GPU_SENSE_N
1 ROOM=SOC
SM PP
VDD_SOC
VDD_SOC
ROOM=SOC
ROOM=SOC
1
U0600
W23 Y14 Y16 Y20 Y22 Y24 Y26 G29 AA27 F17 F20 L29 N29 V28
L22 L24 L26 L28 M1 M5 M7 M9 M11 M13 M17 M21 M23 M25 M27 M29 M35 N6 N10 N12 N14 N16 N18 G19 N22 N24 N26 N28 N30 N33 P9 P11 P13 P15 P17 P19 P21 P23 P25 P27 P29 P35 R4 R6 R8 R10 R12 R14 M19 R18 R20 R22 R24 R26 R28 R30 T1 T2 R33 T9 T11 T13 T15 T17 P7 T23 T25 T27 T30 T35 U6 U10 U12
14
0.825V @4.7A MAX 0.725V @TBDA MAX
C1151 10UF
20% 6.3V 2 CERM-X5R 0402-9
XW1120
SHORT-10L-0.1MM-SM 1
ROOM=SOC
2
BUCK2_PP_SOC_FB
14
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1153
C1154
C1155
C1156
C1157
4.3UF
1UF
1UF
0.47UF
0.47UF
1
1
1
20% 4V CERM 0402
2 4
3
1
20% 4V CERM 0402
2 4
3
1
20% 4V CERM 0402
3
2 4
20% 6.3V CERM 0402
3
2 4
20% 6.3V CERM 0402
D
3
2 4
C
B
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
SOC:POWER (1/3) DRAWING NUMBER
PP1102 P2MM-NSM
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTE: AP_GPU_SENSE_P probe location @ R2205.2
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
11 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
10 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
MAUI - POWER SUPPLIES DDR IMPEDANCE CONTROL
D
14 11
14 11
D
PP1V1 1
PP1V1
R1200 240
1
C1240 10UF
20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC
1
C1241
1
2.2UF
C1242
1
2.2UF
20%
6.3V
2 X5R-CERM 0201
20%
20% 2 6.3V X5R-CERM 0201
2 X5R-CERM 0201
ROOM=SOC
ROOM=SOC
C1245
C1246
C1247
4.3UF
1UF
0.47UF
3
1
20% 4V CERM 0402
3
10UF
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1201
C1202
C1203
4.3UF
1UF
0.47UF
20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC
A20 A22 B11 B15 B23 B25 D16 D20 D22 E15 E17 E19 E21
1
20% 6.3V CERM 0402
2 4
3
2 4
0.8V @TBDA MAX 0.9V @TBDA MAX 1.0V @1.0A MAX
PP_FIXED
C1200
ROOM=SOC
ROOM=SOC
ROOM=SOC
0.802-TBDV @1.1A MAX
1
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
20% 4V CERM 0402
1% 1/32W MF 2 01005
C1248 2.2UF
ROOM=SOC
2 4
14 7 6
1
ROOM=SOC
1
C
C1244 2.2UF
6.3V
2 X5R-CERM 0201
ROOM=SOC
1
2.2UF
20%
6.3V
C1243
1
20% 4V CERM 0402
20% 4V CERM 0402 1
3
2 4
3
1
2 4
20% 6.3V CERM 0402
2
3
4
B
AA15 AA21 AA25 AB18 AC15 AC21 AC25 AD14 AD18 AE21 AE25 AF18 AG15 AG21 AH25 AH14 AH18 AJ21 AK16 F12 G10 V18 AL17 J25 L25 N25 R25 R7 AN6 U25 W15 W21 W25 Y18 F21 F26 AB28 AC27 G18 AK20 F16 R16 T8 V7 U19 W27 U27 AF4 AF27 U21
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 VDD_CPU_SRAM SYM 10 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
AC11 AC7 AC9 AA13 AG11 AG7 AG9 AK12
PP_CPU_SRAM ROOM=SOC
ROOM=SOC
ROOM=SOC
C1220
C1221
C1222
0.47UF
1UF
4.3UF
1
20% 6.3V CERM 0402
2
VDD_GPU_SRAM
VDD_FIXED
H12 H18 R21 U15 J15 J21 J9 K12 K18 M10 M14 M16 M20 P18 R11 R13 U13 V10 M22
3
4
20% 4V CERM 0402 1
3
1
2 4
20% 4V CERM 0402
1
14
C1223 2.2UF 20%
2 6.3V X5R-CERM 0201 ROOM=SOC
3
PP_GPU_SRAM ROOM=SOC
ROOM=SOC
ROOM=SOC
C1224
C1225
C1226
4.3UF
1UF
4.3UF
1
3 2
4
20% 4V CERM 0402 1
2 4
FCMSP SC58980B0B-A040
DDR0_ZQ B21 DDR3_ZQ P2
SYM 11 OF 14
VDDIO11_DDR0
C21 AP17 V31 P5
CRITICAL
R1201 240
1% 1/32W MF 2 01005
1
1
R1202 240
1
240
1% 1/32W MF 2 01005
ROOM=SOC
R1203
1% 1/32W MF 2 01005
ROOM=SOC
ROOM=SOC
R1204 240
1
R1205 240
1% 1/32W MF 2 01005 ROOM=SOC
1% 1/32W MF 2 01005 ROOM=SOC
DDR0_RREF DDR1_RREF DDR2_RREF DDR3_RREF DDR0_ZQ DDR3_ZQ
ROOM=SOC
OMIT_TABLE DDR0_RET* DDR1_RET* DDR2_RET* DDR3_RET*
C18 AP15 Y31 U4
PMU_TO_OWL_SLEEP1_READY
FL1280
100OHM-25%-0.12A
1.1V @7mA MAX
VDDIO11_PLL_DDR
F19 AK18 W26 P8
9 16
PP1V1_DDR_PLL
1
1
2
PP1V1
11 14
01005
VOLTAGE=1.1V
C1280
ROOM=SOC
0.22UF
20% 2 6.3V X5R 01005-1
ROOM=SOC
C
VDDIO11_DDR1
VDDIO11_RET_DDR
D19 AN17 W31 T4
PP1V1_SDRAM
C19 AP16 W32 T3
SYSTEM_ALIVE
12 14 15
2 4
0.8V @0.5A MAX
20% 4V CERM 0402
AN19 AR18 AR21 AR8 AT13 AT16 AM14 AM16 AM18 AM20 AR15 AN13 AN15
U0600 MAUI-2GB-25NM-DDR-H
DDR0_RREF DDR1_RREF DDR2_RREF DDR3_RREF
1
3
1
20% 4V CERM 0402
2 4
1
C1227 2.2UF 20%
2 6.3V X5R-CERM 0201
3
ROOM=SOC
14
AB29 V29 Y29 Y35 AB35 AG34 M34 R35 T29 T34 AA30 U30 AC30
AA1 AC2 V6 W2 H2 M2 U5 P6 T6 U1 N5 R5 W5
DDR0_SYS_ALIVE DDR1_SYS_ALIVE DDR2_SYS_ALIVE DDR3_SYS_ALIVE
13 16 17
VDDIO11_DDR2
B
VDDIO11_DDR3
A
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
0.756-TBDV @44mA MAX 15
PP0V8_OWL 1
C1250 1.0UF
AH29 AD29 AF29
SOC:POWER (2/3) DRAWING NUMBER
VDD_LOW
Apple Inc.
20% 2 6.3V X5R 0201-1
051-00094 REVISION
4.0.0
R
ROOM=SOC
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
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I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
11 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
D
C
B
A
A1 A2 A11 A16 A21 A24 A25 A27 A34 A35 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA24 AA26 N8 AA28 AA35 AB1 C17 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AB27 AB30 AC1 AC6 AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AC26 T5 AC28 AC34 AC35 AD5 AD7 AD9 AD11 AD15 AD17 AD19 AD21 AD23 AD25 AD27 AD33 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE22 AE24 AE26 AE29 AE30 AE35 AF5 AF7 AF9 AF11 AF15 AF17 AF19 AF21
7
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 SYM 13 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
VSS
VSS
AF23 AF25 AF30 AG1 AG2 AG3 AG6 AG8 AG10 AG14 AG16 AG18 AG20 AG22 AG24 U7 AG29 AG33 AG35 AH5 AH7 AH9 AH11 AH13 AH15 AH17 AH19 AH21 AH23 AH27 AJ6 AJ8 AJ10 AJ12 AJ14 AJ16 AJ18 W8 AJ22 AG12 AK24 AJ28 AK2 AK3 AK5 AK7 AK9 AK11 AK13 AK15 B28 AK17 M15 AP28 AK26 AK30 AK34 AK29 AL6 AL8 AL10 AL12 AF28 AL14 AM29 AL16 AR27 AL18 Y30 AL20 AL25 AL28 AL30 AL31 AM7 AM9 AM11 AM13 AM15 AM17 AM19 AM21 AM33 AM34 AM35 AN3 AN5 AN16 AN8 AN10
6
AN12 AN14 AN18 AN29 AN33 AP2 AP13 AP14 AP20 AP25 AP26 AP27 AP30 AP31 AP32 AP33 AR1 AR5 AR9 AR14 AR16 AR25 AR34 AR35 AT1 AT2 AT6 AT8 AT9 AT14 AT17 AT18 AT21 AT25 AT34 AT35 B1 B2 B16 B20 B22 B24 B27 B34 B35 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C20 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 D3 D4 D5 D6 D11 D17 D21 D23 D26 D27 D28 D29 D30 E1 E3 E4 E5 D7 E9
5
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 SYM 14 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
VSS
VSS
E12 E16 E18 E20 E22 E24 E26 E29 E32 F4 F5 F7 F9 F11 F13 F15 F18 D18 F23 E30 F25 F27 F28 F29 G4 G5 G6 G8 G12 G14 G16 E6 G22 G24 G26 G28 G33 H1 H7 H9 H11 H13 H15 H17 E28 H21 H23 H25 H27 H29 J2 J5 J6 J30 J8 J10 J12 J14 J16 J18 J20 J22 J24 J26 J28 K7 K9 K11 K13 K15 K17 K19 K21 K23 K25 K27 K29 K34 K35 L1 L5 L6 K4 L8 L10 L12 L14 L16 L18 L20
4
3
2
1
MAUI - POWER SUPPLIES 1.70-1.95V @100mA 34 32 31 28 25 16 15 14 8
D
MAX
PP1V8_SDRAM 1
C1300 2.2UF
20% 2 6.3V X5R-CERM 0201
1
C1302
1
2.2UF
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
15 14 11
C1301
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
PP1V1_SDRAM 1
C1310
1
10UF
C1312 2.2UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
1
C1313 2.2UF
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
C1314
1
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
NOTE: Commandeered C1311 for PP1V1 ROOM=SOC
ROOM=SOC
C1316
C1317
1UF
1UF
1
20% 4V CERM 0402
3
20% 4V CERM 0402
1
2 4
3
2 4
1.62-1.98V @41mA MAX 21 20 17 14 13 12 9 8 7 6 5 3 34 30
PP1V8 1
C1320
1
10UF
2.2UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
19 14
17 15 8
21 20 17 14 13 12 9 8 7 6 5 3 34 30
ROOM=SOC
PP1V8_IMU_OWL
1.62-1.98V @8mA
PP1V8_ALWAYS
1.62-1.98V @1mA
PP1V8
C1321
1
C1322 2.2UF
20% 2 6.3V X5R-CERM 0201
1
C1323 2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
MAX MAX
1.62-1.98V @10mA MAX 1
C1330 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=SOC
A10 A26 AD1 AH35 AT22 AT7 G1 L35 A15 A23 AB34 AD2 AH34 AR13 AR17 AR22 AR7 AT15 B10 B26 G2 L34 N2 R1 U34 V2 W35
U0600 MAUI-2GB-25NM-DDR-H VDD1
SYM 12 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
VDD2
F30 H30 K30 M30 VDDIO18_GRP1 N31 P30 H5 VDDIO18_GRP2 K5 AN9 AA5 AC5 VDDIO18_GRP3 AG5 AL5 AM23 VDDIO18_GRP4 AE28 VDDIO18_GRP10 AG28 Y5 VDDIO18_GRP11 AG26 AM22 AD13 AN24 AG13 AK8 AB8 N20 U23 AK23
FCMSP SC58980B0B-A040
VDD18_LPOSC VDD18_FMON VDD18_UVD VDD18_AMUX
VDD18_TSADC
VSS
(OWL) (AON)
U14 U16 U18 U22 U24 U26 U28 U35 V1 V5 AA29 U29 V9 V11 V13 V15 V17 V19 V21 V23 V25 V27 W30 W1 W6 W10 W12 W14 W16 W18 W20 W22 W24 W28 W29 W34 Y1 Y9 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 Y27 Y34 AC29 AD28 AE27 AG27 AJ30 AJ35 AK19 AT27 D31 G30 L30 P4 U8 V30 A28 AL32 T21
C
B
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
SOC:POWER (3/3) DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
13 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
12 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
S3E NAND R1530 PP1V8
21 20 17 14 13 12 9 8 7 6 5 3 34 30
D
1
24.9
1
C1532
1
100PF
C1533
1
100PF
100PF
5% 2 16V NP0-C0G 01005
5% 16V 2 NP0-C0G 01005
ROOM=NAND
C1534
5% 16V 2 NP0-C0G 01005
ROOM=NAND
1
1% 1/32W MF 01005
C1535 100PF
5% 2 16V NP0-C0G 01005
ROOM=NAND
2
PP1V8_NAND_AVDD VOLTAGE=1.8V
1
13
1
2.2UF
NAND_AGND
D
C1531 0.1UF
20% 2 6.3V X5R-CERM 0201
ROOM=NAND
ROOM=NAND
C1530
20% 2 6.3V X5R-CERM 01005
ROOM=NAND
ROOM=NAND
VOLTAGE=0V
C1527
1
0.1UF
C1526 100PF 5%
20%
6.3V
1
15UF
20%
6.3V
2 X5R 0402-1
ROOM=NAND
C1521 15UF
6.3V
2 NP0-C0G 01005
ROOM=NAND
C1520 20%
16V
2 X5R-CERM 01005
1
2 X5R 0402-1
ROOM=NAND
ROOM=NAND
EXTRA CAPS ADDED FOR UF BLOCKING.
1
10UF
C1523 10UF
20% 6.3V 2 CERM-X5R 0402-9
20% 6.3V 2 CERM-X5R 0402-9
ROOM=NAND
ROOM=NAND
1
C1524
1
0.1UF
C1525 100PF
20%
5%
6.3V
16V
2 X5R-CERM 01005
2 NP0-C0G 01005
ROOM=NAND
1
C1528 10UF
20% 6.3V 2 CERM-X5R 0402-9 ROOM=NAND
ROOM=NAND
PP3V0_NAND 15
1
C1540 15UF
20% 2 6.3V X5R 0402-1 ROOM=NAND
1
C1541
1
C1542 10UF
15UF
20% 6.3V 2 CERM-X5R 0402-9
20% 2 6.3V X5R 0402-1
1
1
10UF
20% 6.3V 2 CERM-X5R 0402-9
ROOM=NAND
ROOM=NAND
C1543 ROOM=NAND
C1546 1.0UF
20% 2 6.3V X5R 0201-1
1
C1547
20% 2 6.3V X5R 0201-1
ROOM=NAND
ROOM=NAND
0.1UF 20%
2 6.3V X5R-CERM 01005 ROOM=NAND
C1554
20%
10% 2 6.3V X5R-CERM 01005
1
1000PF
0.1UF
2 6.3V X5R-CERM 01005 ROOM=NAND
C1555 100PF
C1556
1
100PF
2 16V NP0-C0G 01005
2 16V NP0-C0G 01005
ROOM=NAND
C1557
20% 6.3V 2 X5R 0402-1
100PF
5%
5%
ROOM=NAND
21 20 17 14 13 12 9 8 7 6 5 3 34 30
1
5%
2 16V NP0-C0G 01005
ROOM=NAND
1
C1560 0.01UF 10%
2 6.3V X5R 01005
C1507 100PF
R1560
5%
2 16V NP0-C0G 01005
10K
1% 1/32W MF 2 01005
ROOM=NAND
NAND_VREF
ROOM=NAND
ROOM=NAND
20% 2 6.3V X5R 0402-1
15UF
ROOM=NAND
ROOM=NAND
C1505
1
15UF
C1506
1
1.0UF
20% 6.3V 2 X5R 0402-1
1
1.0UF
2 6.3V X5R 0201-1
1
EXTRA CAPS ADDED FOR UF BLOCKING.
20%
2 16V NP0-C0G 01005
ROOM=NAND
C1511 0.1UF
5%
2 6.3V X5R 0201-1
ROOM=NAND
C1510 100PF
20%
20%
ROOM=NAND
C1509
2 6.3V X5R-CERM 01005
ROOM=NAND
C
ROOM=NAND
ROOM=NAND
NOSTUFF
1
1
ROOM=NAND
PP1V8 1
C1503
1
C1508
1
100PF
C1512
1
100PF
5%
100PF
5%
2 16V NP0-C0G 01005
5%
16V 2 NP0-C0G 01005
ROOM=NAND
C1513
2 16V NP0-C0G 01005
ROOM=NAND
ROOM=NAND
1
C1514
1
5%
5% 2 16V NP0-C0G 01005
100PF
2 16V NP0-C0G 01005
C1515 100PF
ROOM=NAND
ROOM=NAND
OA0 OA10 OD0 OD10 OG0 OG10
ROOM=NAND
20% 6.3V 2 CERM-X5R 0402-9
C1551
1
A5 OB0 OB10 OF0 OF10 R5
2 16V NP0-C0G 01005
10UF
C1550
1
A3 A7 F2 J1 J9 R3 R7
5%
1
C1504 15UF
E5
2 6.3V X5R-CERM 01005
100PF
C1548
20%
15
ROOM=NAND
C3
20%
C1544
1
1
2 6.3V X5R 0402-1
ROOM=NAND
K4 K6
C1545
1
C1502 15UF
2 6.3V X5R 0402-1
J7
1
1
20%
1.0UF
ROOM=NAND
C1501 15UF
1
0.1UF
C
C1522
PP0V9_NAND 1
EXTRA CAPS ADDED FOR UF BLOCKING.
1
M4 J5
1
10%
2 6.3V X5R 01005
ROOM=NAND
ROOM=NAND
VCC VCC VCC VCC VCC VCC
VDD VDD VDD VDD VDD VDD VDD
VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
1% 1/32W MF 2 01005
VREF
10K
AVDD1
0.01UF
R1561
PCI_VDD1 PCI_VDD2
C1561
PCI_AVDD_CLK1 PCI_AVDD_CLK2
1 1
PCI_AVDD_H
NOSTUFF
U1500 THGBX5G9D8KLFXF VLGA
AP_TO_NAND_SYS_CLK
D2
13 6
PCIE_AP_TO_NAND_REFCLK_P PCIE_AP_TO_NAND_REFCLK_N
H8 H6
6
PCIE_NAND_TO_AP_CLKREQ_L
G9
PCIE_CLKREQ*
PCIE_NAND_RESREF
M6
PCI_RESREF
PCIE_AP_TO_NAND_TXD0_P PCIE_AP_TO_NAND_TXD0_N
M8 K8
PCIE_AP_TO_NAND_TXD1_P PCIE_AP_TO_NAND_TXD1_N
N5 N3
8
13 6
1
R1501
13 6
3.01K
B
13 6
1% 1/20W MF 2 201
13 6 13 6
ROOM=NAND
6 6
6 6
P8 N7
PCIE_NAND_TO_AP_RXD0_P PCIE_NAND_TO_AP_RXD0_N
M2 K2
PCIE_NAND_TO_AP_RXD1_P PCIE_NAND_TO_AP_RXD1_N
CLK_IN
VER-1
ROOM=NAND
PINUSE=IN
PCIE_REFCLK_P PCIE_REFCLK_M PINUSE=IN
BOMOPTION=OMIT_TABLE
CRITICAL
PINUSE=IN
PCIE_RX0_P PCIE_RX0_M PINUSE=IN PINUSE=IN
PCIE_RX1_P PCIE_RX1_M PINUSE=OUT PINUSE=OUT
PCIE_TX0_P PCIE_TX0_M PINUSE=OUT PINUSE=OUT
PCIE_TX1_P PCIE_TX1_M
PROBE POINTS
NC
NAND_ZQ SWD_AP_BI_NAND_SWDIO_R
1
SM PP
PP1520 P3MM-NSM
1
13
1
SM PP
PP1521 P3MM-NSM
PCIE_AP_TO_NAND_REFCLK_P
1
SM PP
TRST*
D6
ZQ
R1500
0.5% 1/32W MF 01005 2 ROOM=NAND
ROOM=NAND
13 6
D8
34.8
ROOM=NAND
SWD_AP_NAND_SWCLK_R
RESET*
B2
13
F8
13
EXT_NCE
G1
PMU_TO_NAND_LOW_BATT_BOOT_L 16 AP_TO_NAND_FW_STRAP 8 NC NC NC NC NC
SYSTEM_ALIVE PCIE_AP_TO_NAND_RESET_L
EXT_NRE
F4
13
SWD_AP_BI_NAND_SWDIO_R
EXT_NWE
C5
13
SWD_AP_NAND_SWCLK_R
EXT_RNB
G5
EXT_CLE
H4
EXT_ALE
D4
11 16 17
B
6
0.00
1 1/32W 0%
2
1 1/32W 0%
2
ROOM=NAND
ROOM=NAND
0.00
R1520 01005
SWD_AP_BI_NAND_SWDIO 9
MF
R1521 01005
SWD_AP_PERIPHERAL_SWCLK 9
MF
34
NC NC
B4 B6 OE10 G7 L3 L5 L7 P2 P4 P6 OC0 OC10 OE0
AP_TO_NAND_RESET_L
VSSA
5
G3 J3 H2 E3 E7 F6 C7 B8
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
PINUSE=OUT
EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7
NAND_AGND
PP1500 P3MM-NSM ROOM=NAND
13 6
PCIE_AP_TO_NAND_REFCLK_N
1
SM PP
A
PP1501 P3MM-NSM ROOM=NAND
A
SYNC_MASTER=N71_SINGLE_BRD 13 6
PCIE_AP_TO_NAND_TXD0_P
1
SM PP
SYNC_DATE=05/29/2014
PAGE TITLE
PP1502 P3MM-NSM
NAND
ROOM=NAND
13 6
PCIE_AP_TO_NAND_TXD0_N
1
SM PP
DRAWING NUMBER
PP1503 P3MM-NSM
Apple Inc.
ROOM=NAND
051-00094 REVISION
4.0.0
R
13 6
PCIE_AP_TO_NAND_TXD1_P
1
SM PP
PP1504 P3MM-NSM ROOM=NAND
13 6
PCIE_AP_TO_NAND_TXD1_N
1
SM PP
PP1505 P3MM-NSM
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
15 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
ROOM=NAND
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
13 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
ANTIGUA PMU - Buck Supplies OMIT_TABLE
D
U2000
D2255A080UXUVAI2
PP_VCC_MAIN OMIT_TABLE 1
OMIT_TABLE
C2085
1
10UF
OMIT_TABLE
C2086 10UF
10UF
ROOM=PMU
ROOM=PMU
A4 B4 C4 1
C2089
1
2.2UF
C2090
C2091
1
2.2UF
20%
2.2UF
20%
2 6.3V X5R-CERM 0201
20%
2 6.3V X5R-CERM 0201
ROOM=PMU
C2092 2.2UF
20%
2 6.3V X5R-CERM 0201
ROOM=PMU
1
2 6.3V X5R-CERM 0201
ROOM=PMU
A8 B8 C8
C2093
1
2.2UF
C2094
C2095
1
2.2UF
20%
6.3V
ROOM=PMU
2 X5R-CERM 0201
ROOM=PMU
100PF
20% 6.3V 2 X5R-CERM 0201
ROOM=PMU
C2099
5% 16V 2 NP0-C0G 01005
ROOM=PMU
ROOM=PMU
A12 B12 C12 J17 J18 J19 T18 T19 V12 Y12 Z12
$VOLTAGE=?
19 12
PP1V8_TOUCH PP1V8_IMU_OWL
VOLTAGE=1.8V
11
VOLTAGE=1.1V
BUCK0_LX2
VDD_BUCK1_01
BUCK0_LX3
1.1A MAX
1
C2050
1
15UF
2 X5R 0402-1
XW2050
15UF
20%
6.3V
C2051
ROOM=PMU
20%
SHORT-10L-0.1MM-SM 2 1
6.3V
2 X5R 0402-1
ROOM=PMU
400mA MAX
BUCK6
PP1V2_CAMERA VOLTAGE=1.2V
1
15UF
2 X5R 0402-1
1.1A MAX
BUCK7
20%
5% 2 16V NP0-C0G 01005
6.3V
2 X5R 0402-1
ROOM=PMU
11
1
15UF
20%
6.3V
C2061 ROOM=PMU
PP_CPU_SRAM
ROOM=PMU
C2062 100PF ROOM=PMU
21
CRITICAL
0.80V/0.90V/1.0V
1
C2070
1
15UF
15UF
20%
2 6.3V X5R 0402-1
A
C2071 20%
PIXB2016FE-SM
ROOM=PMU
ROOM=PMU
ROOM=PMU
VDD_BUCK2
BUCK1_LX0
0.80V/0.90V/1.0V
1
C2080 15UF 20%
6.3V
2 X5R 0402-1 ROOM=PMU
1
C2081 15UF 20%
6.3V
2 X5R 0402-1 ROOM=PMU
BUCK0_LX3
2
1
20%
20% 2 6.3V X5R 0402-1
15UF
6.3V
2 X5R 0402-1
ROOM=PMU
C2010 15UF
6.3V
2 X5R 0402-1
ROOM=PMU
C2009 ROOM=PMU
ROOM=PMU
1 PIQA20121T-SM ROOM=PMU
CRITICAL
BUCK0_PP_CPU_FB
10
L2010
A17 B17 C17
2
BUCK1_LX0
PP_GPU 10
1 PIQA20161T-SM
VOLTAGE=1V
ROOM=PMU
1
CRITICAL
L2011
BUCK1_LX1
VDD_BUCK4
A15 B15 C15
1
BUCK1_LX1
C2011
1
15UF 6.3V
2 X5R 0402-1
C2012
1
15UF
20%
2
2 X5R 0402-1
ROOM=PMU
1
15UF
20%
6.3V
C2013
2 X5R 0402-1
ROOM=PMU
1
15UF
20%
6.3V
C2014
C2015
1
20%
20% 2 6.3V X5R 0402-1
15UF
20%
6.3V
2 X5R 0402-1
ROOM=PMU
6.3V
2 X5R 0402-1
ROOM=PMU
ROOM=PMU
C
0.80V/0.90V/1.0V
C2016 15UF
ROOM=PMU
PIQA20121T-SM ROOM=PMU
CRITICAL
L2012
1.0UH-20%-3.6A-0.060OHM VDD_BUCK5 BUCK1_LX2
VDD_BUCK7
A13 B13 C13
1
BUCK1_LX2
1
2
C2017
1
15UF 6.3V
2 X5R 0402-1
ROOM=PMU
CRITICAL
L2013
C2018
1
15UF
20%
PIQA20161T-SM
2 X5R 0402-1
ROOM=PMU
1
15UF 6.3V
2 X5R 0402-1
ROOM=PMU
C2020
1
20%
20% 2 6.3V X5R 0402-1
15UF
20%
20%
6.3V
C2019
6.3V
2 X5R 0402-1
ROOM=PMU
C2021 15UF
ROOM=PMU
ROOM=PMU
0.47UH-20%-3.8A-0.048OHM BUCK1_LX3
VDD_BUCK8
A11 B11 C11
2
BUCK1_LX3
1 PIQA20121T-SM ROOM=PMU
CRITICAL
BUCK1_PP_GPU_FB
BUCK1_FB F12
10
L2020
1.0UH-20%-3.6A-0.060OHM BUCK3_SW1
BUCK2_LX0
H17 H18 H19
1
BUCK2_LX0
PP_SOC 10
2 PIQA20161T-SM
VOLTAGE=1.1V
ROOM=PMU
CRITICAL
1
L2021
U16 BUCK3_SW2 U15 BUCK3_SW3 BUCK2_LX1 BUCK4_SW1
K17 K18 K19
1
BUCK2_LX1
C2022
1
15UF
0.47UH-20%-3.8A-0.048OHM
6.3V
2 X5R 0402-1
2
C2023
1
15UF 6.3V
2 X5R 0402-1
ROOM=PMU
C2024
1
15UF
20%
20%
PIQA20121T-SM
2 X5R 0402-1
ROOM=PMU
1
20%
20% 2 6.3V X5R 0402-1
15UF
20%
6.3V
C2025 6.3V
2 X5R 0402-1
ROOM=PMU
ROOM=PMU
0.725V/0.825V
C2026 15UF
B
ROOM=PMU
ROOM=PMU
CRITICAL
BUCK2_FB J14
BUCK2_PP_SOC_FB
L2030
CRITICAL
10
ROOM=PMU
1.0UH-20%-3.6A-0.060OHM M17 M18 M19
BUCK5_LX0
BUCK3_LX0
R18 R19
BUCK3_LX0
1
BUCK3_FB
V19
1
SHORT-10L-0.1MM-SM 1 2
BUCK3_FB
H1 H2
VBUCK3_SW BUCK6_LX0
12 15 16 25 28 31 32 34
VOLTAGE=1.8V
XW2030
M13 BUCK5_FB
PP1V8_SDRAM 8
2 PIQA20161T-SM
C2030
1
15UF
2 X5R 0402-1
C2031
1
20%
5% 2 16V NP0-C0G 01005
15UF
20%
6.3V
U17 V17 Y17 Z17
6.3V
2 X5R 0402-1
ROOM=PMU
C2032 100PF
ROOM=PMU
ROOM=PMU
L2040
F1 F2
BUCK4_LX0
BUCK7_LX0
V11 Y11 Z11
C1 BUCK7_FB
L2080
BUCK4_LX1
BUCK8_LX0
PIXB2016FE-SM ROOM=PMU
F17 F18 F19
BUCK4_FB T9 BUCK8_LX0
BUCK8_FB
12 15
VOLTAGE=1.1V
ROOM=PMU
CRITICAL
1
L2041
BUCK4_LX1
1
2 PIQA20121T-SM
C2040 15UF 20%
2 6.3V X5R 0402-1 ROOM=PMU
1
C2041 15UF 20%
2 6.3V X5R 0402-1 ROOM=PMU
15UF 20%
2 6.3V X5R 0402-1 ROOM=PMU
1
C2043
1
20%
5% 2 16V NP0-C0G 01005
15UF
2 6.3V X5R 0402-1 ROOM=PMU
C2044 100PF
A
ROOM=PMU
SYNC_DATE=05/29/2014
PAGE TITLE
XW2040 SHORT-10L-0.1MM-SM 1
C2042
SYNC_MASTER=N71_SINGLE_BRD
ROOM=PMU
BUCK4_FB
1
SYSTEM POWER:PMU (1/3)
2
DRAWING NUMBER
ROOM=PMU
XW2080
SHORT-10L-0.1MM-SM 2 1
V13 Y13 Z13
PP1V1_SDRAM 11
2 PIQA20161T-SM
0.47UH-20%-3.8A-0.048OHM
BUCK7_FB
1
1
BUCK4_LX0 CRITICAL
1
2
VOLTAGE=1V
1.1A MAX
BUCK8
PP_GPU_SRAM
1
20%
2 X5R 0402-1
ROOM=PMU
C2008 15UF
6.3V
2 X5R 0402-1
0.47UH-20%-3.8A-0.048OHM
1.0UH-20%-2.25A-0.15OHM 11
A9 B9 C9
VDD_BUCK3
ROOM=PMU
CRITICAL
1
20%
6.3V
CRITICAL
C2007 15UF
20%
ROOM=PMU
XW2070 SHORT-10L-0.1MM-SM
2 6.3V X5R 0402-1
1
15UF
PIQA20161T-SM
L2070
2
C2006
1.0UH-20%-3.6A-0.060OHM
1.0UH-20%-2.25A-0.15OHM 2 1 BUCK7_LX0
VOLTAGE=1V
1
2
J5 BUCK6_FB
BUCK6_FB
ROOM=PMU
1.0UH-20%-3.6A-0.060OHM
L2060 0603
C2060
1
BUCK0_LX2
ROOM=PMU
1UH-20%-1.2A-0.320OHM 2 1 BUCK6_LX0 1
A7 B7 C7
ROOM=PMU
ROOM=PMU
CRITICAL 21 20
BUCK5_FB
ROOM=PMU
VBUCK4_SW
C19 BUCK8_FB
Apple Inc.
V15 Y15 Z15
051-00094 REVISION
4.0.0
R
ROOM=PMU
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
20 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
14 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
BUCK4
PIQA20161T-SM
VOLTAGE=0.85V
ROOM=PMU
4.7A MAX
PP_FIXED
20% 2 6.3V X5R 0402-1
2 6.3V X5R 0402-1
BUCK3
11 7 6
2 6.3V X5R 0402-1
15UF
ROOM=PMU
BUCK0_FB F8
VDD_BUCK1_23
L2050
1.0UH-20%-3.6A-0.060OHM 2 1 BUCK5_LX0
20%
0.775V/0.95V/1.0V
C2005
1.5A MAX
BUCK5
CRITICAL
1
15UF
20%
ROOM=PMU
C2004
CRITICAL
L2003
E1 E2
V16 Y16 Z16
PP1V1
1
15UF
2 6.3V X5R 0402-1
ROOM=PMU
C2003
L2002
VOLTAGE=1.8V
B
1
20%
2 6.3V X5R 0402-1
ROOM=PMU
C2002 15UF
20%
2 6.3V X5R 0402-1
2
1
15UF
20%
1.0UH-20%-3.6A-0.060OHM
VDD_BUCK0_23
VDD_BUCK6
U18 V18 Y18 Z18
PP1V8
1
C2001
PIQA20121T-SM
VDD_BUCK0_01
J1 J2
E17 E18 E19
30 29 20
BUCK0_LX1
1
15UF
0.47UH-20%-3.8A-0.048OHM
BUCK0_LX1
C2000
0.47UH-20%-3.8A-0.048OHM
N17 N18 N19
30 21 20 17 13 12 9 8 7 6 5 3 34
1
BUCK1
1
2.2UF
20% 6.3V 2 X5R-CERM 0201
ROOM=PMU
CRITICAL
L2001
A5 B5 C5
10
VOLTAGE=1V
BUCK2
C2098
1
2.2UF
PP_CPU
1 PIQA20161T-SM
4.7A MAX
C2097
ROOM=PMU
2
10.5A MAX
1
6.3V
2 X5R-CERM 0201
ROOM=PMU
C
20%
6.3V
2 X5R-CERM 0201
C2096 2.2UF
20%
6.3V
2 X5R-CERM 0201
1
2.2UF
20%
BUCK0_LX0
BUCK0_LX0
ROOM=PMU
A16 B16 C16 1
CRITICAL
A3 B3 C3
BUCK0
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V 0402
ROOM=PMU
C2088
ROOM=PMU SYM 2 OF 5
12.5A MAX
ROOM=PMU
1
10UF
20% 2 6.3V 0402
20% 2 6.3V 0402
C2087
1
1.0UH-20%-3.6A-0.060OHM
CSP
BAT/USB
29 28 27 26 25 23 22 17 15 4 34
V3 VDD_MAIN_SNS R6 F10 L13 L5 VDD_MAIN R8 L4
BUCK INPUT
15
VCC_MAIN_SNS
D
L2000
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
ANTIGUA LDO SPECS
ANTIGUA PMU - LDOs 29 28 27 26 25 23 22 17 14 4 34
D
PP_VCC_MAIN 1
C2120
1
10UF
10UF
20% 2 6.3V CERM-X5R 0402-9
14
VCC_MAIN_SNS
2
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
XW2105 SHORT-10L-0.1MM-SM
C2121
1
C2122 10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
ROOM=PMU
1
ROOM=PMU
C2123
1
10UF
10UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V CERM-X5R 0402-9 ROOM=PMU
1
C2126
1
C2125 10UF
20% 2 6.3V CERM-X5R 0402-9
C2127 OMIT_TABLE
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
U2000 D2255A080UXUVAI2
ROOM=PMU
C2130
C2131
2.2UF
M3 V2 M2 U1 U2 L2 Y6 Y4 Y3 Y9 Z9 R3 Y5 Y7 N2 K3
C
1
2.2UF
20% 6.3V X5R-CERM 2 0201
20% 6.3V X5R-CERM 2 0201
ROOM=PMU
ROOM=PMU
PP1V8_SDRAM
C2132
1
2.2UF
20% 6.3V 2 X5R-CERM 0201
VDD_LDO5 VDD_LDO6 VDD_LDO7 VDD_LDO8 VDD_LDO9
M1 V1 L1 N1 T1 T2 K1 K2 Z6 Z4 Z3 Y2 Y8 Z8 R2 K6 Z5 Z7 P2
VLDO1 VLDO2 VLDO3 VLDO4 VLDO5
VDD_LDO10 VDD_LDO11 VDD_LDO13 VDD_LDO14 VDD_LDO15 VDD_BYPASS
VLDO6 VBYPASS VLDO7 VLDO8 VLDO9 VLDO9_FB VLDO10 VLDO11 VLDO12 VLDO13 VLDO14 VLDO15
ROOM=PMU
OMIT_TABLE
VPUMP U19
U2000
CAM_AVDD_FB
B
PLACE_NEAR=U2000.Y2:2mm ROOM=PMU
A
NC
J15 J16 J3 J4 K15 K16 L15 L16 M14 M15 M16 N14 N15 N16 P13 P14 P15 P16 P17 R13 R14 R15 R16 R17 T10 T11 T12 T13 T14 T15 T17 U10 U11 U12 U13 U14 U4 U5 U6 V4 V5 V6
50mA
LDO2 (B)
1.2-2.0V
+/-2.5%
50mA
LDO3 (A)
2.5-3.3V
+/-1.4%
50mA
LDO4 (D)
0.7-1.2V
+/-2.5%
100mA
LDO5 (F)
2.5-3.3V
+/-2.5%
1000mA
LDO6 (C1)
1.2-3.6V
+/-2.5%
150mA
LDO7 (C)
2.5-3.3V
+/-25mV
250mA
LDO8 (C)
2.5-3.3V
+/-25mV
250mA
LDO9 (C)
2.5-3.3V
+/-25mV
250mA
LDO10 (G)
0.7-1.2V
+/-5.5%
1335mA
LDO11 (C)
2.5-3.3V
+/-25mV
250mA
LDO12 (E)
1.8V
+/-5%
10mA
LDO13 (C)
2.5-3.3V
+/-25mV
250mA
LDO14 (H)
0.8-1.5V
+/-2.5%
250mA
LDO15 (B)
1.2-2.0V
+/-2.5%
50mA
D
VOLTAGE=3.3V VOLTAGE=1.8V VOLTAGE=3.0V VOLTAGE=0.8V VOLTAGE=3.0V
PP3V3_USB 5 PP1V8_VA 25 PP3V0_TRISTAR 19 PP0V8_OWL 11 PP3V0_NAND 13
VOLTAGE=3.3V
PP3V3_ACC 31
2
PP3V0_PROX_ALS 20 PMU_LDO8 PP2V85_CAM_AVDD_PMU 20
SHORT-10L-0.25MM-SM
VOLTAGE=0.9V
28 31 32 34
C
21
PP0V9_NAND 13 PP3V0_PROX_IRLED 20 PP1V8_ALWAYS 8 12 17 PP3V0_MESA 29 PP1V2 5 6 7 PP1V8_MESA 29
PMU_VPUMP
C2100 47NF
20% 2 6.3V X5R-CERM 01005 ROOM=PMU
1
C2101
1
2.2UF
C2103
1
2.2UF
20% 2 6.3V X5R-CERM 0201
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2105
1
4.3UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2107
1
2.2UF
ROOM=PMU
C2111
1
4.3UF
20% 2 6.3V X5R-CERM 0201
20% 2 4V X5R-CERM 0610
ROOM=PMU
C2109
1
2.2UF
20% 2 4V X5R-CERM 0610
ROOM=PMU
C2113
4.3UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2115
20% 2 4V X5R-CERM 0610
ROOM=PMU
ROOM=PMU
OMIT_TABLE
U2000 D2255A080UXUVAI2
1
CSP A1 A10 A14 A18 A19 A2 A6 B1 B10 B14 B18 B19 B2 B6 C10 C14 C18 C2 C6 D1 D19 E14 G1 G17 G18 G19 G2 H7 J6 K12 K7 L17 L18 L19 L6 L7
SYM 4 OF 5
CRITICAL ROOM=PMU
VSS
XTAL GND
L9 M8 M9 N10 N12 N13 N9 P10 P11 P18 P19 P5 R10 R11 R12 R9 T16 T3 T6 T8 U3 U9 V10 V14 V8 V9 Y1 Y10 Y14 Y19 Z1 Z10 Z14 Z19 Z2
C2102 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=PMU
PMU_VSS_RTC
1
C2104 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=PMU
1
C2106 2.2UF
20% 2 6.3V X5R-CERM 0201
1
C2108 2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
ROOM=PMU
1
C2110 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=PMU
1
C2112
1
2.2UF
C2114 2.2UF
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 0201 ROOM=PMU
B
ROOM=PMU
16
A
SYNC_DATE=05/29/2014
SYNC_MASTER=N71_SINGLE_BRD PAGE TITLE
SYSTEM POWER:PMU (2/3) DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
21 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
15 OF 60
IV ALL RIGHTS RESERVED
8
26 27
XW2100
VOLTAGE=3.0V VOLTAGE=1.8V VOLTAGE=3.0V VOLTAGE=1.2V VOLTAGE=1.8V
VPUMP:10nF min. @ 4.6V
ROOM=PMU
NC
1
1
CSP
CRITICAL
+/-1.4%
VOLTAGE=3.0V VOLTAGE=2.75V VOLTAGE=2.85V
D2255A080UXUVAI2 D10 D11 D12 D13 D14 D15 D16 D17 D18 D2 D5 D6 D7 D8 D9 D3 E10 E11 E12 E13 D4 E15 E16 E3 E4 E5 E7 E8 E9 F14 F15 F16 F3 F4 G14 G15 G16 G3 G4 H15 H16 H3 H4
2.5-3.3V
SYM 1 OF 5
VDD_LDO1_3 CRITICAL VDD_LDO2 ROOM=PMU VDD_LDO4
P12 VPP_OTP
SYM 5 OF 5
LDO1 (A)
MAX.CURRENT
CSP
PP1V1_SDRAM 1
ACCURACY
ROOM=PMU
10UF
20% 2 6.3V CERM-X5R 0402-9
34 32 31 28 25 16 14 12 8
1
ROOM=PMU
10UF
14 12 11
C2124
LDO
1
LDO INPUT
PLACE_NEAR=U2000.V2:2MM
ADJ.RANGE
LDO#
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
CONTROL PIN NOTES:
ANTIGUA PMU - GPIOs, NTCs
NOTE NOTE NOTE NOTE
(1):INPUT PULL-DOWN 100-300k (2):INPUT PULL-DOWN 1M (3):INPUT PULL-UP OR DOWN 100k-300k (4):OUTPUT OPEN-DRAIN, REQUIRES PULL-UP
D
D OMIT_TABLE 34 32 31 28 25 15 14 12 8
U2000
PP1V8_SDRAM
D2255A080UXUVAI2 SYM 3 OF 5
1
1000PF
11 9
ROOM=PMU
9 31 28 9 5
9 34 16
17 13 11
OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY
N3 N7 P3 P4
PMU_TO_OWL_CLK32K PMU_TO_WLAN_CLK32K
T4 SLEEP_32K R4 OUT_32K
SYSTEM_ALIVE NC 8
34 28 16 8 34 28 8
9 28 9 9
5 23
FOREHEAD NTC
34 33 16 8 34 33 8
1
34 33 8
R2210
1
100PF
5% 16V 2 NP0-C0G 01005 ROOM=PMU
10KOHM-1% 2
30 28 31 16
FOREHEAD_NTC_RETURN
28 16
01005 ROOM=PMU
3
34 34
REAR CAMERA NTC
34 16 34 5
1
34
C2220
B
R2220
1
100PF
5% 16V NP0-C0G 2 01005 ROOM=PMU
10KOHM-1% 2
3
PMU_TO_WLAN_CLK32K BB_TO_PMU_AMUX_LDO11_SIM1 AP_TO_PMU_TEST_CLKOUT BB_TO_PMU_AMUX_SMPS4 PMU_AMUX_BY
RCAM_NTC_RETURN
01005 ROOM=PMU
XW2210
SHORT-10L-0.1MM-SM 1 2 ROOM=PMU
XW2220
RADIO PA NTC SHORT-10L-0.1MM-SM 1 2 ROOM=PMU
XW2230
1
C2230
R2230
1
100PF
5% 16V 2 NP0-C0G 01005 ROOM=PMU
10KOHM-1% 2
PA_NTC_RETURN
01005 ROOM=PMU
(4)
M6 M7 N4 N5 N6
FOREHEAD_NTC REAR_CAMERA_NTC RADIO_PA_NTC AP_NTC PMU_TCAL
SHORT-10L-0.1MM-SM 1 2 ROOM=PMU
1
SHORT-10L-0.1MM-SM 1 2 ROOM=PMU
A
5% 16V NP0-C0G 2 01005 ROOM=PMU
200K
1% 1/20W MF 2 201
ROOM=PMU
PMU_TO_AP_SOCHOT0_L
8 16
R2201 VDROOP G5
PMU_VDROOP_OUT
1 MF 0%
PMU_VDROOP_DET_IN
C2205
1 MF 1%
0.00
ROOM=PMU
PMU_TO_AP_SOCHOT0_L
2 1/32W 01005
R22052 150
AP_GPU_SENSE_P
1/32W 01005
10
NOTE:VDROOP_DET R/C Low-pass Fc=1.06MHz
ROOM=PMU
1000PF
8 16
NO_XNET_CONNECTION
10% 2 10V X5R 01005
C
ROOM=PMU
(1) (1)
16 28
1
C2203 1000PF
BRICK_ID T5 ADC_IN R5
TRISTAR_TO_PMU_USB_BRICK_ID CHESTNUT_TO_PMU_ADCMUX
10%
2 VOLTAGE=6.3V X5R-CERM
16 31
01005
ROOM=CHESTNUT
PLACE_NEAR=U2000.R5:20mm BUTTON1 BUTTON2 BUTTON3 BUTTON4
AMUX_B0 AMUX_B1 AMUX_B2 AMUX_B3 AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B7 AMUX_BY
GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21
TDEV1 TDEV2 TDEV3 TDEV4 TCAL
PMU_XTAL1 PMU_XTAL2
P1 XTAL1 R1 XTAL2
PMU_VDD_RTC
P6 VDD_RTC
G6 F6 E6 F5
BUTTON_MENU_KEY_L BUTTON_HOLD_KEY_L BUTTON_RINGER_A
BUTTON1 + BUTTON2 ASSERTED FOR >TBD SECONDS CAUSES TWO-FINGER RESET
8 9 29 34 8 9 33 34 8 16 33 34
NC
F7 G7 J7 G8 H8 J8 K8 F9 G9 H9 J9 G10 H10 J10 F11 G11 H11 NC K9 NC J11 G12 NC H12 NC
TIGRIS_TO_PMU_INT_L 17 BB_TO_PMU_PCIE_HOST_WAKE_L 34 PMU_TO_BB_PMIC_RESET_R_L TRISTAR_TO_AP_INT 8 31 STOCKHOLM_TO_PMU_HOST_WAKE 34 PMU_TO_NAND_LOW_BATT_BOOT_L 13 WLAN_TO_PMU_HOST_WAKE 34 CODEC_TO_PMU_MIKEY_INT_L 25 PMU_TO_BT_REG_ON 34 BT_TO_PMU_HOST_WAKE 34 PMU_TO_WLAN_REG_ON 34 I2C0_AP_SCL 8 16 PMU_TO_CODEC_DIGLDO_PULLDN 25 CODEC_TO_AP_PMU_INT_L
PMU_TO_BB_USB_VBUS_DETECT PMU_TO_STOCKHOLM_EN PMU_TO_LCM_PANICB
R2200 1
1.00K 2
PMU_TO_BB_PMIC_RESET_L
34
5% 1/32W MF 01005 ROOM=PMU
B
28 34
8 25 34 34
30
C2202 0.22UF
XW2240
20% 2 6.3V X5R 0201 ROOM=PMU
Y2200
32.768KHZ-20PPM-12.5PF 1
10KOHM-1% 2
R2270
CRITICAL
R2240
100PF
PRE_UVLO M5
1
AMUX_A0 AMUX_A1 AMUX_A2 AMUX_A3 AMUX_A4 AMUX_A5 AMUX_A6 AMUX_A7 AMUX_AY
1 1
1
C2270
20% 2 6.3V X5R 0201
VDROOP_DET H5
AP NTC
C2240
1
(1)
L8 IRQ*
N11 M12 L11 NC M10 NC L14 L12 M11 L10 K14
BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3
PMU_VREF 0.22UF
NTC
C2210
VREF M4
ROOM=PMU
(2)
F13 G13 J12 H13 H14 K10 K11 K13 J13
PMU_IREF
(1)
L3 TMPR_DET
U7 SCLK U8 MOSI V7 MISO
IREF K5
(1)
(4)
DWI_PMGR_TO_PMU_SCLK DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMU_TO_PMGR_MISO
BUTTON_RINGER_A BUTTON_VOL_UP_L BUTTON_VOL_DOWN_L LCM_TO_CHESTNUT_PWR_EN TRISTAR_TO_PMU_USB_BRICK_ID CHESTNUT_TO_PMU_ADCMUX PMU_AMUX_AY
(4)
H6 SYS_ALIVE
R7 SCL T7 SDA
SPHERE_REF_TO_AMUX
(3)
SLEEP1_REQ SLEEP1_RDY ACTIVE_REQ ACTIVE_RDY
I2C0_AP_SCL I2C0_AP_SDA
AP_TO_PMU_AMUX_OUT
(3)
ROOM=PMU
XTAL
C
PMU_TO_AP_IRQ_L
CRITICAL
(3)
REFS
9
PMU_TO_SYSTEM_COLD_RESET_L
RESET_IN1 RESET_IN2 RESET_IN3 RESET* SHDN
COMPARATOR
10% 2 6.3V X5R-CERM 01005
31
ROOM=PMU
P7 P8 P9 K4 N8
ADC
C2260
9
OWL_TO_PMU_SHDN
5
BUTTONS
8
ROOM=PMU
5% 1/32W MF 2 01005
GPIO
100K
AP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AP_TO_PMU_SOCHOT1_L
5% 1/32W MF 2 01005 34 9 5 3
CSP
R2261
RESETS
100K
1
PMGR
R2260
AMUX
1
1
AP_NTC_RETURN
01005 ROOM=PMU
C2250 100PF
5% 2 16V NP0-C0G 01005 ROOM=PMU
1
C2200
R2250
1.60X1.00-SM
1
ROOM=PMU
18PF
3.92K
2
ROOM=PMU
C2201 18PF
5% 2 16V CERM 01005
5% 16V 2 CERM 01005
0.1% 1/20W MF 2 0201 ROOM=PMU
1
15
PMU_VSS_RTC
ROOM=PMU
VOLTAGE=0V
XW2200
SYNC_MASTER=N/A
SHORT-10L-0.1MM-SM 1 2
PAGE TITLE
SYSTEM POWER:PMU (3/3)
ROOM=PMU
DRAWING NUMBER
Apple Inc.
NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
22 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
16 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
A
SYNC_DATE=N/A
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
D
D
TIGRIS CHARGER APN:343S0693 PP_VCC_MAIN VOLTAGE=4.3V 1
1
C2330 10UF
20% 2 6.3V CERM-X5R 0402-9 ROOM=CHARGER
C
1
C2331
4 14 15 22 23 25 26 27 28 29 34
C2333 2.2UF
20% 2 6.3V X5R-CERM 0201
10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=CHARGER
ROOM=CHARGER
C
TIGRIS_LDO
4.2UF
C2321
1
4.2UF
100PF
10% 2 16V X5R-CERM 0402-1
10% 2 16V X5R-CERM 0402-1 ROOM=CHARGER
C2322
5% 2 35V NP0-C0G 01005
ROOM=CHARGER
2.2UF
5% 2 16V NP0-C0G 01005
20% 2 6.3V X5R-CERM 0201
ROOM=CHARGER
S
ROOM=CHARGER
NO_XNET_CONNECTION
F5 32 31 3
PP5V0_USB
C2310
1
4.2UF
15 12 8
A5 B5 D5 C5 E5
10% 2 16V X5R-CERM 0402-1
PP1V8_ALWAYS 1
R2310
ROOM=CHARGER
1
C2311 100PF
5% 2 35V NP0-C0G 01005 ROOM=CHARGER 34 31 27 26 8
100K
5% 1/32W MF 2 01005
34 31 27 26 8
16 13 11
VBUS VBUS VBUS VBUS VBUS
SN2400AB0
BOOT G5
WCSP ROOM=CHARGER
BUCK_SW BUCK_SW BUCK_SW BUCK_SW
CRITICAL
I2C1_AP_SDA I2C1_AP_SCL
G3 E4
SYSTEM_ALIVE
E3
SYS_ALIVE
TRISTAR_TO_TIGRIS_VBUS_OFF TIGRIS_TO_PMU_INT_R_L
F4
VBUS_OVP_OFF
G2
INT
TIGRIS_VBUS_DETECT
F1
VBUS_DET
SDA SCL
BAT BAT BAT BAT
ROOM=CHARGER
16
TIGRIS_TO_PMU_INT_L
100
1
2
1% 1/32W MF 01005
31
F3 TEST
ROOM=CHARGER
B
R2320 USB_VBUS_DETECT
30.1K 2
1
1% 1/32W MF 01005
2
D
PIQA20161T-SM
10%
ROOM=CHARGER
16V
X5R 0201
C2301
ROOM=CHARGER
C2302
1
100PF
TIGRIS_BUCK_LX
1
100PF
5% 16V NP0-C0G 2 01005
5% NP0-C0G 2 01005 16V
ROOM=CHARGER
ROOM=CHARGER
PP_BATT_VCC
BAT_SNS E1
VBATT_SENSE
ACT_DIODE E2
TIGRIS_ACTIVE_DIODE SWI_AP_BI_TIGRIS_FET TIGRIS_TO_BATTERY_SWI
1
NOSTUFF
R23001
18
D
ROOM=CHARGER
2
CRITICAL
Q2301
G S
DMN2990UFA DFN0806 ROOM=CHARGER
1
5% 2 16V NP0-C0G 01005 ROOM=CHARGER
1
C2303
1
20%
20% 2 6.3V X5R-CERM 0201
2.2UF
2 6.3V X5R-CERM 0201 ROOM=CHARGER
C2304 2.2UF
B
ROOM=CHARGER
5% 1/32W MF 01005 2 ROOM=CHARGER
3
PP1V8
C2306 100PF
100K
21 20 17 14 13 12 9 8 7 6 5 3 34 30
3 18
18
A3 B3 D3 C3
5
1
2
A1 B1 D1 C1
HDQ_HOST G1 HDQ_GAUGE F2
PGND PGND PGND PGND
R2311
A4 B4 D4 C4
1
ROOM=CHARGER
1.0UH-20%-3.6A-0.060OHM
0.047UF
TIGRIS_BOOT
BGA
G
L2300
C2300
LDO G4
U2300
PMID
Q2300 CSD68827W
A1
CRITICAL
ROOM=CHARGER
CRITICAL
C1 C2 C3
1
A2 B2 D2 C2
C2320
C2305
1
100PF
VDD_MAIN VDD_MAIN VDD_MAIN VDD_MAIN
1
C2307
A2 A3 B1 B2 B3
1
TIGRIS_PMID
NOSTUFF
R2301 0.00
0% 1/32W MF 2 01005 ROOM=CHARGER
1
PP1V8 1
3 5 6 7 8 9 12 13 14 17 20 21 30 34
R2302 40.2K
1% 1/32W MF 2 01005 ROOM=CHARGER
SWI_AP_BI_TIGRIS
A
8 9
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
SYSTEM POWER:CHARGER DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
23 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
17 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
D
D
BATTERY CONNECTOR THIS ONE ON MLB
--->
516S00104 (RCPT) 516????? (PLUG)
CRITICAL ROOM=BATTERY_B2B
J2400
C
C
RCPT-BATT-2BLADES F-ST-SM 11
R2400 17
TIGRIS_TO_BATTERY_SWI
1
100
2
5% 1/32W MF 01005 ROOM=BATTERY_B2B
18
1
TIGRIS_BATTERY_SWI_CONN
C2400 56PF
7
8
1
5
3
2
4
6
9
5% 2 16V NP0-C0G 01005
PP_BATT_VCC TIGRIS_BATTERY_SWI_CONN
18
1
C2410 56PF
5% 2 16V NP0-C0G 01005
10 12
3 17
VOLTAGE=4.3V
1
C2411 100PF
5% 2 16V NP0-C0G 01005
ROOM=BATTERY_B2B
ROOM=BATTERY_B2B
1
C2412 220PF
10% 2 10V X7R-CERM 01005 ROOM=BATTERY_B2B
ROOM=BATTERY_B2B
XW2400
SHORT-10L-0.25MM-SM 1 2
VBATT_SENSE
17
ROOM=BATTERY_B2B
B
B
A
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=04/29/2014
PAGE TITLE
SYSTEM POWER:BATTERY CONN DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
24 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
18 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
D
7
6
5
4
3
MAGNESIUM - COMPASS
ST (APN 338S00029): C3013=0.01UF INVENSENSE, MPU-6700 (APN 338S00017): C3013=0.1UF *DOE* INVENSENSE, MPU-6800 (APN 338S00087): C3013=0.1UF
APN:338S00084
PP1V8_IMU_OWL
PP1V8_IMU_OWL 12 14 19
0.1UF
0.1UF
20% 2 6.3V X5R-CERM 01005
C3012 2.2UF
20% 2 6.3V X5R-CERM 01005
ROOM=CARBON
20% 2 6.3V X5R-CERM 0201
ROOM=CARBON
VDD
NOTE: For AKM Backup
VDDIO 34 32 31 28 15
GYRO_CHARGE_PUMP
CS FSYNC/GND REGOUT/GND_CAP
SCL/SPC SDA/SDI SA0/SDO
PP3V0_TRISTAR
2 3 4
NC
C3008
1
LGA 5 8 14
NC
NOSTUFF
MPU-6700-12-COMBO SPI_OWL_TO_ACCEL_GYRO_CS_L
C3001
1
0.1UF
2.2UF
20% 2 6.3V X5R-CERM 01005
ROOM=MAGNESIUM
C3000
20% 2 6.3V X5R-CERM 0201 ROOM=MAGNESIUM
ROOM=MAGNESIUM
HSCDTD601A-19
U3010 9
1
5% 2 16V NP0-C0G 01005
U3000
ROOM=CARBON
C3002 100PF
VDD
1
16
1
C4
C3011
1
12 14 19
NOSTUFF
1
C3010
1
D
CARBON - ACCEL & GYRO
1
2
0.1UF
SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_IMU_MOSI SPI_IMU_TO_OWL_MISO
NOTE: For AKM Backup
20% 6.3V 2 X5R-CERM 01005
9 19 9 19
B1 B3 D1 D2
RSV RSV RSV RSV
SDO B4
SPI_IMU_TO_OWL_MISO 9
19
SDA/SDI A4
SPI_OWL_TO_IMU_MOSI 9
19
SCL/SCK A3
SPI_OWL_TO_IMU_SCLK 9
19
CSB A2
SPI_OWL_TO_COMPASS_CS_L 9
114K INT PU 19 14 12
D4 RST*
PP1V8_IMU_OWL
ROOM=MAGNESIUM
9 19
LGA
C2 VPP
TRG/SE C3 NC
114K INT PD
1.09M INT PU
DRDY A1 9
7
ACCEL_GYRO_TO_OWL_INT2
DRDY/INT1 6
INT/INT2
ACCEL_GYRO_TO_OWL_INT1
9
COMPASS_TO_OWL_INT 9
ROOM=MAGNESIUM
NOSTUFF
CRITICAL
C
ROOM=CARBON
VSS
OMIT_TABLE OMIT_TABLE
NOSTUFF
C3003
1
100PF
C1
NOSTUFF
C3004
1
100PF
5% 2 16V NP0-C0G 01005
ROOM=MAGNESIUM
NOSTUFF
C3005
1
100PF
5% 2 16V NP0-C0G 01005
15 GND6
13 GND5
ROOM=CARBON
12 GND4
10% 2 6.3V X6S 0201
11 GND3
0.1UF
10 GND2
CRITICAL
C3013
9 GND1
1
1
1
100PF
ROOM=MAGNESIUM
C3007
C
100PF
5% 2 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
ROOM=MAGNESIUM
NOSTUFF
C3006
5% 2 16V NP0-C0G 01005
ROOM=MAGNESIUM
ROOM=MAGNESIUM
PHOSPHOROUS BOSCH (APN:338S00044) PP1V8_IMU_OWL 1
C3020
1
0.1UF
C3021 1.0UF
20% 2 6.3V X5R 0201-1
20% 2 6.3V X5R-CERM 01005 ROOM=PHOSPHORUS
ROOM=PHOSPHORUS
6
CRITICAL
8
B
12 14 19
VDD
VDDIO
ROOM=PHOSPHORUS
B
U3020
19 9 19 9
DISCRETE ACCEL BOSCH APN 338S1163 NO-STUFF for Invensense DOE
NOSTUFF
1
100PF
5% 2 16V NP0-C0G 01005
PP1V8_IMU_OWL 1
C3031 2.2UF
20% 2 6.3V X5R-CERM 0201
1
C3032
LGA
C3033
ROOM=PHOSPHORUS
1
C3024 100PF
5% 16V 2 NP0-C0G 01005 ROOM=PHOSPHORUS
NOSTUFF
1
C3025
SDO 5
SPI_IMU_TO_OWL_MISO
GND
1
C3022 100PF
5% 2 16V 01005
ROOM=PHOSPHORUS
100PF
5% 2 16V NP0-C0G 01005 ROOM=PHOSPHORUS
20% 2 6.3V X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
NOSTUFF
R3020 PHOSPHORUS_TO_OWL_IRQ_R
1 01005
VDD
0.00 0%
2 PHOSPHORUS_TO_OWL_IRQ 1/32W MF
9
ROOM=PHOSPHORUS
R3020 SHOULD BE STUFFED FOR ST PHOSPHORUS ONLY. FOR BOSCH PHOSPHORUS, PINS 1 AND 7 ARE SHORTED INTERNALLY, SO NO NEED FOR 0-OHM TO GROUND OPTION ON PIN 7.
ROOM=ACCEL
ROOM=ACCEL
9 19
NOSTUFF 70K INT PU
0.1UF
0.1UF
8
ROOM=ACCEL
1
C3023
NOSTUFF
7
19 14 12
3 SDI 4 SCK 2 CS*
SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_PHOSPHOROUS_CS_L
1 7
9
BMP282BC
VDDIO
U3030 BMA282 LGA 9
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
4 CS*
SCX 1 SDX 2 SDO 3
ROOM=ACCEL
OMIT_TABLE
R3030 1
2
5% 1/32W MF 01005
DISCRETE_ACCEL_TO_OWL_INT1_R DISCRETE_ACCEL_TO_OWL_INT2_R
DISCRETE_ACCEL_TO_OWL_INT2
1
20.0
20.0
2
SPI_IMU_TO_OWL_MISO
9 19
PS 13
A
SYNC_MASTER=N71_SINGLE_BRD
ROOM=ACCEL
SYNC_DATE=05/29/2014
PAGE TITLE
GND
R3031 9
6 INT1 5 INT2
1
5% 1/32W MF 01005
CRITICAL ROOM=ACCEL
R3032
SENSORS:MOTION SENSORS GNDIO
DRAWING NUMBER
10
DISCRETE_ACCEL_TO_OWL_INT1
9
20.0
9 11 12 14
A
SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_IMU_MOSI SPI_IMU_TO_OWL_MISO_R
Apple Inc.
2
051-00094 REVISION
4.0.0
R
5% 1/32W MF 01005 ROOM=ACCEL
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
30 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
19 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
FRONT CAMERA FLEX
4
3 MLB: 516S1081 (RCPT)
AA22L
C3120
1
1
C3123
1
20%
20% 2 6.3V X5R-CERM 0201
2.2UF
6.3V
2 X5R-CERM 01005
ROOM=CG_B2B
1
20%
6.3V
2 NP0-C0G 01005
C3122 2.2UF
20%
16V
CAMERA POWER
C3121 0.1UF
5%
2 X5R-CERM 0201
ROOM=CG_B2B
F-ST-SM 41 ROOM=CG_B2B 37 38
C3124 2.2UF
6.3V
2 X5R-CERM 0201
ROOM=CG_B2B
ROOM=CG_B2B
ROOM=CG_B2B
20 20 20
FL3100
FL3125
FERR-22-OHM-1A-0.055OHM
30 21 17 14 13 12 9 8 7 6 5 3 34
PP1V8_FCAM_CONN
20
2
PP3V0_PROX_ALS
15
C3101
1
20% 2 6.3V X5R-CERM 01005
2
ROOM=CG_B2B
C3125
1
20
100PF
5% 16V NP0-C0G 01005
5% 16V NP0-C0G 01005
2
ROOM=CG_B2B
20 7 20 7
FL3102
20
PP1V2_FCAM_VCORE_CONN
0201 ROOM=CG_B2B
1
30 20
120-OHM-210MA
2
C3103
FL3104
C3130
C3129
1
2.2UF
1
2.2UF
20% 6.3V X5R-CERM 2 0201
ROOM=CG_B2B
ROOM=CG_B2B
PP3V0_ALS_CONN
01005
5% 16V NP0-C0G 01005
2
2
20
100PF
0.1UF
20% 2 6.3V X5R-CERM 01005
1
VOLTAGE=1.2V
C3102
1
AP_TO_FCAM_SHUTDOWN_CONN_L I2C_ISP_TO_FCAM_SCL I2C_ISP_BI_FCAM_SDA
ROOM=CG_B2B
FERR-22-OHM-1A-0.055OHM PP1V2_CAMERA
20
FL3126
1
CODEC_TO_RCVR_CONN_N CODEC_TO_RCVR_CONN_P AP_TO_FCAM_CLK_CONN PP1V8_FCAM_CONN PP2V85_FCAM_AVDD_CONN
VOLTAGE=3.0V
100PF
ROOM=CG_B2B
21 14
PP3V0_PROX_CONN
01005
C3100
0.1UF
20
1
VOLTAGE=1.8V
1
20
120-OHM-210MA
2 0201 ROOM=CG_B2B
C3128
ROOM=CG_B2B
ROOM=CG_B2B
1
C3127
1
0.1UF
2.2UF
20% 6.3V X5R-CERM 2 0201
20
VOLTAGE=3.0V
ROOM=CG_B2B
1
20
ROOM=CG_B2B
20
C3126
20
100PF
20% 2 6.3V X5R-CERM 01005
20% 6.3V X5R-CERM 2 0201
5% 2 16V NP0-C0G 01005
ROOM=CG_B2B
PP3V0_PROX_CONN TOUCH_TO_PROX_RX_EN_FCAM_CONN PGND_IRLED_K
20
I2C2_AP_BI_ALS_SDA_CONN I2C2_AP_TO_ALS_SCL_CONN FRONTMIC3_TO_CODEC_AIN4_CONN_N
ROOM=CG_B2B
FERR-22-OHM-1A-0.055OHM 21 15
1
PP2V85_CAM_AVDD_PMU
C3106
1
2
PP2V85_FCAM_AVDD_CONN
0201 ROOM=CG_B2B
1
C3105
1
0.1UF
20%
6.3V
X5R-CERM 2 0201
2 X5R-CERM 01005
ROOM=CG_B2B
C3104
25
2 NP0-C0G 01005
I2C_TOUCH_TO_MAMBA_PROX_SCL
0.00
1
CAMERA I/O
PGND_IRLED_K
2
1
2
30
TOUCH_TO_PROX_TX_EN_BUFF
D 1
20
1
C3110
S
R3140
CODEC_TO_HAC_N
2
DFN1006H4-3
20 20 20
C
2 ROOM=CG_B2B
ROOM=CG_B2B
FL3152
2
70-OHM-25%-0.28A 24
CODEC_TO_HAC_P
2
1
CODEC_TO_HAC_CONN_P 20 NO_XNET_CONNECTION=1
DZ3152
1
12V-33PF 01005-1
20
2 ROOM=CG_B2B
C3111 100PF
5% 2 16V NP0-C0G 01005
30 29 14
FL3153
PP1V8_TOUCH
70-OHM-25%-0.28A
R31411
ROOM=CG_B2B
24
CODEC_TO_RCVR_N
1
2
100K
I2C_ISP_TO_FCAM_SCL
CODEC_TO_RCVR_CONN_N 20
01005
5% 1/32W MF 01005 2
NO_XNET_CONNECTION=1
ROOM=CG_B2B
1
DZ3153
12V-33PF 01005-1
ROOM=CG_B2B
TOUCH_TO_PROX_RX_EN_FCAM_CONN
C3112
2 ROOM=CG_B2B
20 30
56PF
B
5% 2 16V NP0-C0G 01005 30 29
I2C_TOUCH_BI_MAMBA_PROX_SDA
0.00
1
70-OHM-25%-0.28A
2 24
0% 1/32W MF 01005 20 7
I2C_ISP_BI_FCAM_SDA
30
PROX_TO_TOUCH_RX_LCM_CONN
0.00
1
PROX_TO_TOUCH_RX_FCAM_CONN
2
0% 1/32W MF 01005
1
4
SYM_VER-2
1
2
MIPI_FCAM_TO_AP_DATA0_CONN_P
20
30 28 8
2
MIPI_FCAM_TO_AP_DATA0_CONN_N
MIPI_FCAM_TO_AP_DATA1_CONN_P
20
30 28 8
7
MIPI_FCAM_TO_AP_CLK_N
C3144 24
FRONTMIC3_TO_CODEC_AIN4_P
2
1
FRONTMIC3_TO_CODEC_AIN4_CONN_P 20 NO_XNET_CONNECTION=1
01005
1
ROOM=CG_B2B
2
DZ3156
6.8V-100PF 01005
I2C2_AP_SCL
I2C2_AP_TO_ALS_SCL_CONN
MAKE_BASE=TRUE
MIPI_FCAM_TO_AP_DATA1_CONN_N
20
MIPI_FCAM_TO_AP_CLK_CONN_N
C3145
8
2
ALS_TO_AP_INT_L
20
ROOM=CG_B2B
ROOM=CG_B2B
SYNC_DATE=05/29/2014
PAGE TITLE
CAMERA:FRONT CAMERA B2B
ROOM=CG_B2B
DRAWING NUMBER
1 01005
A
SYNC_MASTER=N71_SINGLE_BRD
5% 2 16V NP0-C0G 01005
FL3146 MIPI_FCAM_TO_AP_CLK_CONN_P
20
56PF
20
120-OHM-210MA 3
120-OHM-210MA
2 ROOM=CG_B2B
L3102 65-OHM-0.1A-0.7-2GHZ 1
DZ3155
FL3156
20
5% 2 16V NP0-C0G 01005
CRITICAL
SYM_VER-2
NO_XNET_CONNECTION=1
1
2 ROOM=CG_B2B
56PF
20
ROOM=CG_B2B
TAM0605
FRONTMIC3_TO_CODEC_AIN4_CONN_N 20
ROOM=CG_B2B
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
4
2
6.8V-100PF 01005
I2C2_AP_BI_ALS_SDA_CONN
1
MIPI_FCAM_TO_AP_CLK_P
1 ROOM=CG_B2B
MAKE_BASE=TRUE
L3101
7
FRONTMIC3_TO_CODEC_AIN4_N
01005
I2C2_AP_SDA
CRITICAL
MIPI_FCAM_TO_AP_DATA1_N
24
DOPPLER_PROX
ROOM=CG_B2B
3
C3143 ROOM=CG_B2B
1 3
120-OHM-210MA
5% 2 16V NP0-C0G 01005
ANALOG_PROX
ROOM=CG_B2B
TAM0605
DZ3154
FL3155
20
56PF
L3100 65-OHM-0.1A-0.7-2GHZ
7
1
12V-33PF 01005-1
CRITICAL
MIPI_FCAM_TO_AP_DATA1_P
NO_XNET_CONNECTION=1
ROOM=CG_B2B
R3143
CAMERA MIPI
7
CODEC_TO_RCVR_CONN_P 20
2 ROOM=CG_B2B
ROOM=CG_B2B
7
2 01005
C3113
5% 2 16V NP0-C0G 01005
MIPI_FCAM_TO_AP_DATA0_N
1
DOPPLER_PROX
56PF
MIPI_FCAM_TO_AP_DATA0_P
CODEC_TO_RCVR_P
ROOM=CG_B2B
1
7
B
FL3154
R3144
ROOM=CG_B2B
A
15 20 20
12V-33PF 01005-1
ROOM=CG_B2B
1
20
DZ3151
DMN3730UFB4
120-OHM-210MA
20 7
20
NO_XNET_CONNECTION=1
1
01005
1
20
CODEC_TO_HAC_CONN_N 20
ROOM=CG_B2B
ANALOG_PROX
FL3111 01005
20
VOLTAGE=2.86V
DZ3150
1 01005
ROOM=CG_B2B
ROOM=CG_B2B
20
SYM_VER_1
5% 1/32W MF 2 01005 ROOM=CG_B2B
5% 2 16V NP0-C0G 01005
24
CRITICAL
Q3140
G
1.00M
100PF
AP_TO_FCAM_SHUTDOWN_CONN_L
20
2 ROOM=CG_B2B
3
DOPPLER_PROX
2
20
FL3151
ROOM=CG_B2B
1
D
70-OHM-25%-0.28A
120-OHM-210MA
AP_TO_FCAM_SHUTDOWN_L
20
6.8V-100PF 01005
C3140
5% 2 16V NP0-C0G 01005
FL3110
7
20
PP_CODEC_TO_FRONTMIC3_BIAS_CONN 20 1
20
56PF
ROOM=CG_B2B
1
1 ROOM=CG_B2B
DOPPLER_PROX
AP_TO_FCAM_CLK_CONN
PP_CODEC_TO_FRONTMIC3_BIAS
R3142
ROOM=CG_B2B
0% 1/32W MF 01005
2
PROX_TO_TOUCH_RX_FCAM_CONN PP3V0_PROX_IRLED PP3V0_ALS_CONN ALS_TO_AP_INT_CONN_L PP_CODEC_TO_FRONTMIC3_BIAS_CONN FRONTMIC3_TO_CODEC_AIN4_CONN_P
01005
C
ROOM=CG_B2B
40
MIPI_FCAM_TO_AP_DATA0_CONN_N MIPI_FCAM_TO_AP_DATA0_CONN_P MIPI_FCAM_TO_AP_CLK_CONN_P MIPI_FCAM_TO_AP_CLK_CONN_N MIPI_FCAM_TO_AP_DATA1_CONN_P MIPI_FCAM_TO_AP_DATA1_CONN_N
20
120-OHM-210MA
16V
30 29
01005
39 42
CODEC_TO_HAC_CONN_P CODEC_TO_HAC_CONN_N PP1V2_FCAM_VCORE_CONN
FL3150
PROX & ALS INTERFACE
5%
ROOM=CG_B2B
1
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
20
100PF
20%
6.3V
AP_TO_FCAM_CLK
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35
VOLTAGE=2.85V
2.2UF
7
J3100
PP3V0_PROX_IRLED 100PF
1
CRITICAL
FLEX: 516S1177 (PLUG) 1
PP1V8
1
FCAM CONNECTOR
PROX & ALS POWER 20 15
D
2
ALS_TO_AP_INT_CONN_L
Apple Inc. 20
051-00094 REVISION
4.0.0
R
1
C3146 100PF
5% 2 16V NP0-C0G 01005
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
31 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
ROOM=CG_B2B
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
20 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
REAR CAMERA FLEX RCAM CONNECTOR
CAMERA POWER/MAMBA LDO
MLB: 516S00043 (RCPT) FLEX: 516S00042 (PLUG) CRITICAL ROOM=RCAM_B2B
J3200
D
D
AA26-S034VA1 F-ST-SM
21
21
C3211
1
C3200
1
2.2UF
01005
1
X5R-CERM 2 0201 ROOM=RCAM_B2B
C3202
21
PP2V85_RCAM_AVDD_CONN
100PF
20% 2 6.3V X5R-CERM 01005
6.3V
X5R-CERM 2 0201
C3201
1
0.1UF
20%
6.3V
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
38
37
PP1V2_RCAM_DIGITAL_CONN
5% 2 16V NP0-C0G 01005
ROOM=RCAM_B2B
21 21
ROOM=RCAM_B2B 21
21 21
21
AP_TO_RCAM_CLK_CONN I2C_ISP_TO_RCAM_SCL_CONN I2C_ISP_BI_RCAM_SDA_CONN RCAM_TO_LED_DRIVER_STROBE_EN_CONN AP_TO_RCAM_SHUTDOWN_CONN_L PP1V8_RCAM_CONN
FL3201
21
MIPI_RCAM_TO_AP_DATA3_CONN_N MIPI_RCAM_TO_AP_DATA3_CONN_P MIPI_RCAM_TO_AP_DATA1_CONN_N MIPI_RCAM_TO_AP_DATA1_CONN_P
VOLTAGE=2.85V
ROOM=RCAM_B2B
1
2.2UF
20%
ROOM=RCAM_B2B
PP2V85_RCAM_AVDD_CONN 21
2
2
PP_SPHERE_CONN
10-OHM-1.1A PP2V85_CAM_AVDD_PMU
35
PP1V2_RCAM_DIGITAL_CONN
FL3200
20 15
36
MIPI_RCAM_TO_AP_CLK_CONN_N MIPI_RCAM_TO_AP_CLK_CONN_P MIPI_RCAM_TO_AP_DATA0_CONN_N MIPI_RCAM_TO_AP_DATA0_CONN_P MIPI_RCAM_TO_AP_DATA2_CONN_N MIPI_RCAM_TO_AP_DATA2_CONN_P
7 7
7 7
7 7
7 7
7 7
FERR-22-OHM-1A-0.055OHM 1
PP1V2_CAMERA
20 14
PP1V2_RCAM_DIGITAL_CONN
2
PLACE_NEAR=FL3201.1:1mm
C
R3203
21
VOLTAGE=1.2V
0201 1
ROOM=RCAM_B2B
1
C3203
1
2.2UF
6.3V
2 X5R-CERM 0201
2 X5R-CERM 0201
ROOM=RCAM_B2B
C3206 2.2UF 20%
20%
6.3V
0% 1/32W MF 01005 2
1
2.2UF
20%
0.00
C3204
6.3V
2 X5R-CERM 0201
ROOM=RCAM_B2B
ROOM=RCAM_B2B
1
C3205
C
100PF 5%
16V
2 NP0-C0G 01005 ROOM=RCAM_B2B
BUCK6_FB
14
Digital I/O
FL3210
FERR-22-OHM-1A-0.055OHM 23
PP_SPHERE
1
PP_SPHERE_CONN
2
FL3230
21
VOLTAGE=2.0V
0201 1
ROOM=RCAM_B2B
120-OHM-210MA
C3207 100PF
7
1
AP_TO_RCAM_CLK
2
5%
2 16V NP0-C0G 01005
1
C3230
1
ROOM=RCAM_B2B
100PF
ROOM=RCAM_B2B
AP_TO_RCAM_CLK_CONN 21 NOSTUFF
01005
C3299 100PF
5% 2 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
ROOM=RCAM_B2B
ROOM=RCAM_B2B
FL3231
120-OHM-210MA
FL3220
7
FERR-22-OHM-1A-0.055OHM 17 14 13 12 9 8 7 6 5 3 34 30 20
PP1V8
1
PP1V8_RCAM_CONN
2 0201
2
1
C3220
1
ROOM=RCAM_B2B
21
1.0UF
20% 2 6.3V X5R 0201-1
5% 2 16V NP0-C0G 01005
100PF
5% 2 16V NP0-C0G 01005
ROOM=RCAM_B2B
C3231 100PF
C3221
1
AP_TO_RCAM_SHUTDOWN_CONN_L 21
01005
VOLTAGE=1.8V
ROOM=RCAM_B2B
B
1
AP_TO_RCAM_SHUTDOWN_L
B
ROOM=RCAM_B2B
ROOM=RCAM_B2B
FL3232
120-OHM-210MA 22
1
RCAM_TO_LED_DRIVER_STROBE_EN
2
RCAM_TO_LED_DRIVER_STROBE_EN_CONN 21
01005 ROOM=RCAM_B2B
1
C3232 100PF
5% 2 16V NP0-C0G 01005 ROOM=RCAM_B2B
MIPI Common-Mode Chokes R3233
L3200 65-OHM-0.1A-0.7-2GHZ 1
TAM0605 SYM_VER-2
22 7
I2C_ISP_BI_RCAM_SDA
1
0.00
CKPLUS_WAIVE=I2C_PULLUP
0% 1/32W MF 01005
4
1
ROOM=RCAM_B2B
2
3
ROOM=RCAM_B2B
NOSTUFF
L3201
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 1 4
A
L3203
22 7
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 1 4
I2C_ISP_TO_RCAM_SCL
1
0.00
3
ROOM=RCAM_B2B
NOSTUFF
L3202 65-OHM-0.1A-0.7-2GHZ 1
TAM0605 SYM_VER-2
4
2 ROOM=RCAM_B2B
5% 2 16V NP0-C0G 01005 ROOM=RCAM_B2B
NOSTUFF
I2C_ISP_TO_RCAM_SCL_CONN 21
2
0% 1/32W MF 01005
3
C3233 56PF
R3234
ROOM=RCAM_B2B
2
I2C_ISP_BI_RCAM_SDA_CONN 21
2
CKPLUS_WAIVE=I2C_PULLUP
1
C3234 56PF
5% 2 16V NP0-C0G 01005 ROOM=RCAM_B2B
PAGE TITLE
CAMERA:REAR CAMERA B2B
L3204 65-OHM-0.1A-0.7-2GHZ 1
TAM0605 SYM_VER-2
A
SYNC_DATE=05/29/2014
SYNC_MASTER=N71_SINGLE_BRD
DRAWING NUMBER
4
Apple Inc.
051-00094 REVISION
4.0.0
R
2
3
ROOM=RCAM_B2B
NOSTUFF
2 ROOM=RCAM_B2B
3 NOSTUFF
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
32 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
Placeholder Footprints
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
21 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
D
D
DUAL LED STROBE DRIVER C
C
APN:353S3899 PP_LED_BOOST_OUT VOLTAGE=5.0V 29 28 27 26 25 23 17 15 14 4 34
U3300
PP_VCC_MAIN
C3386
1
10UF
20% 6.3V 2 CERM-X5R 0402-9 ROOM=STROBE
C3387
CRITICAL
20% 6.3V 2 CERM-X5R 0402-9
1.0UH-20%-3.6A-0.060OHM 1 2 LED_DRIVER_SW
ROOM=STROBE
ROOM=STROBE
D1 IN A2 B2
PIQA20161T-SM
CRITICAL OUT
34 28 21 7
20% 2 6.3V CERM-X5R 0402-9 ROOM=STROBE
A4 B4
PP_LED_DRIVER_COOL_LED 33
LED1
C4 D4
PP_LED_DRIVER_WARM_LED 33
LED2
INT 200K PD
ENABLE STROBE INT 200K PD TORCH INT 200K PD TX SDA SCL GND
VOLTAGE=5.0V
INT 200K PD
A1 B1
21 7
BB_TO_LED_DRIVER_GSM_BURST_IND I2C_ISP_BI_RCAM_SDA I2C_ISP_TO_RCAM_SCL
NC
D3 E3 C2 E4 E2 D2
10UF
ROOM=STROBE
VOLTAGE=5.0V
1
C3308 100PF
TEMP E1
5% 2 16V NP0-C0G 01005
AGND
ROOM=STROBE
C1
21
AP_TO_LED_DRIVER_EN RCAM_TO_LED_DRIVER_STROBE_EN
A3 B3 C3
C3396
SW
ROOM=STROBE 8
1
20% 2 6.3V CERM-X5R 0402-9
WLCSP
L3300
10UF
C3394 10UF
LM3564A1TMX
1
1
1
C3373 100PF
5% 2 16V NP0-C0G 01005 ROOM=STROBE
LED_MODULE_NTC
33
B
B
A
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
CAMERA:STROBE DRIVER DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
33 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
22 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
D
D
Sphere Driver APN:353S00413
29 28 27 26 25 22 17 15 14 4 34
C
PP_VCC_MAIN 1
C3400 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=SPHERE
1
C3499 100PF
A2
C
5% 2 16V NP0-C0G 01005
VIN
U3400
ROOM=SPHERE
ROOM=SPHERE
L3400
FAN53612AUC205X
0.47UH-20%-1.4A-0.128OHM
WLCSP
8
B2
AP_TO_SPHERE_BUCK_EN
EN
A1 VSEL
AP_TO_SPHERE_BUCK_MODE 1
R3400 100K
5% 1/32W MF 2 01005 ROOM=SPHERE
1
R3401
GND
100K
5% 1/32W MF 2 01005 ROOM=SPHERE
SW FB
C2
7
ROOM=SPHERE
B1 C1
1
SPHERE_SW SPHERE_FB
2
PP_SPHERE
21
VOLTAGE=2.05V
0603 SHORT-10L-0.1MM-SM 1 2
XW3400
1
C3401 4.7UF
20% 2 6.3V X5R-CERM1 402 ROOM=SPHERE
1
C3402 100PF
5% 2 16V NP0-C0G 01005
ROOM=SPHERE
XW3401
16
SPHERE_REF_TO_AMUX
SHORT-10L-0.1MM-SM 1 2 ROOM=PMU
B
B
A
A PAGE TITLE
CAMERA: SPHERE DRIVER DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
34 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
23 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS) D
D
APN:338S00105 CRITICAL ROOM=CODEC
U3500 VOICE MIC
32 32
LOWER MIC
32 32
L2 L1
LOWERMIC1_TO_CODEC_AIN1_P LOWERMIC1_TO_CODEC_AIN1_N
K3 L3
LOWERMIC4_TO_CODEC_AIN2_P LOWERMIC4_TO_CODEC_AIN2_N
WLCSP-1 AIN1+ AIN1-
SYM 1 OF 3
CS42L71
ANC REF MIC
ANC ERROR MIC
33
20 20
K2 K1
REARMIC2_TO_CODEC_AIN3_P REARMIC2_TO_CODEC_AIN3_N
J3 J4
FRONTMIC3_TO_CODEC_AIN4_P FRONTMIC3_TO_CODEC_AIN4_N
CODEC_TO_RCVR_P CODEC_TO_RCVR_N
AOUT2+ L8 AOUT2- M8
CODEC_TO_HAC_P CODEC_TO_HAC_N
HPOUTA K10 HPOUTB K11
AIN2+ AIN2-
C 33
AOUT1+ L9 AOUT1- M9
CODEC_TO_HPHONE_L CODEC_TO_HPHONE_R
NC NC
AIN5+ AIN5-
F2 F3
AIN6+ AIN6-
NC NC NC NC NC NC NC NC NC NC NC NC
G2 G3
32
CODEC_TO_HPHONE_HS4
32
CODEC_TO_HPHONE_HS3_REF CODEC_TO_HPHONE_HS4_REF
CODEC_HSIN_P CODEC_HSIN_N
CODEC_HSIN_R_P
1 2 20% 01005 6.3V X5R-CERM
1
1
C3504 220PF
0.1UF
NOSTUFF
C3550 56PF
32
R3550 1
CODEC_HSIN_R_N
ROOM=CODEC
NOSTUFF 1
5% 16V NP0-C0G 2 01005
NO_XNET_CONNECTION=1
10% 2 10V X7R-CERM 01005
C3506
1.33K 2 1% 1/32W MF 01005
ROOM=CODEC
ROOM=CODEC
HPHONE_TO_CODEC_DETECT
32
R3515
0.1UF
HSIN+ D1 HSIN- E1
C
ROOM=CODEC
1.33K 2
ROOM=CODEC
C3551
1
56PF
5% 16V NP0-C0G 2 01005 ROOM=CODEC
1% 1/32W MF 01005 ROOM=CODEC NO_XNET_CONNECTION=1
32
ROOM=CODEC
C3552 100PF 1
B
32
HS4 M4
HPDETECT J9 F1 G1
20
32
1 2 20% 01005 6.3V X5R-CERM
NC NC
20
CODEC_TO_HPHONE_HS3
C3505
AIN4+ AIN4-
20
HS3 M5
HS3_REF L10 HS4_REF M10
AIN3+ AIN3-
20
5% 16V NP0-C0G 01005
R3502
AIN7+ AIN7-
1
A4 B4
DMIC1_CLK DMIC1_DATA
DP J12 DN H12
C4 C3
DMIC2_CLK DMIC2_DATA
MBUS_REF G10
A3 B3
DMIC3_CLK DMIC3_DATA
20.0 5% 1/32W MF 01005
MIKEYBUS_CALTRA_DATA_P MIKEYBUS_CALTRA_DATA_N
DMIC4_CLK DMIC4_DATA
A9 B9
PDM_CLK PDM_DATA
B
2
MIKEYBUS_DATA_P MIKEYBUS_DATA_N
ROOM=CODEC
31 31
R3503 1
20.0
2
5% 1/32W MF 01005
C3554 100PF
ROOM=CODEC
A2 B2
2
1
2
5% 16V NP0-C0G 01005 ROOM=CODEC
A
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
AUDIO:CALTRA CODEC (1/2) DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
35 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
24 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
CALTRA AUDIO CODEC (POWER & I/O) 27 26 15
PP1V8_VA 1
D
C3640
D
2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=CODEC PLACE_NEAR=U3500.J2:2mm
CODEC_AGND 29 28 27 26 23 22 17 15 14 4 34
25
PP_VCC_MAIN 1
C3600
1
10UF
34 32 31 28 25 16 15 14 12 8
C3601 0.1UF
1
C3602 0.1UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
ROOM=CODEC
ROOM=CODEC
ROOM=CODEC
1
C3603 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=CODEC 34 32 31 28 25 16 15 14 12 8
PP1V8_SDRAM 1
C3610
1
10UF
C3611 0.1UF
1
PP1V8_SDRAM 1
C3612
1.00K
0.1UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
ROOM=CODEC
ROOM=CODEC
ROOM=CODEC
R3650
5% 1/32W MF 2 01005
ROOM=CODEC
PP1V2_VD_FILT
C3650
C
4.7UF
32
1
LOWERMIC1_TO_CODEC_BIAS_FILT_RET
CRITICAL
VOLTAGE=2.86V 32
2
PP_CODEC_TO_LOWERMIC1_BIAS LOWERMIC1_BIAS_FILT_IN
M6 K7
ROOM=CODEC
MIC1_BIAS MIC1_BIAS_FILT
VP_MBUS H10
VA J1
VPROG_CP H11
ROOM=CODEC
VP M7
VCP J11
20% 2 6.3V X5R 0201-1
VL A5
1.0UF
VD_FILT C1 VD_FILT E12
C3670 VD D12 VD G12
1
32
1
LOWERMIC4_TO_CODEC_BIAS_FILT_RET
WAKE*
CODEC_TO_AP_PMU_INT_L
K9
INT*
SPI_AP_TO_CODEC_CS_L SPI_AP_TO_CODEC_SCLK
C9 C8
CS* CCLK
8
SPI_AP_TO_CODEC_MOSI SPI_CODEC_TO_AP_MISO
B8 A8
MOSI MISO
8
I2S_AP_TO_CODEC_MCLK
C12
MCLK
8 8
CALTRA_FLYP
WLCSP-1
8
CS42L71
1
C3660 2.2UF
32
2
PP_CODEC_TO_LOWERMIC4_BIAS LOWERMIC4_BIAS_FILT_IN
L6 J7
20% 2 6.3V X5R-CERM 0201
MIC2_BIAS MIC2_BIAS_FILT
FLYC L12
ROOM=CODEC
CALTRA_FLYC
27 26 8 27 26 8
20% 6.3V X5R-CERM1 402
27 26 8 27 26 8
ROOM=CODEC
C3652
XW3620 SHORT-10L-0.1MM-SM 1
2
4.7UF 1
REARMIC2_BIAS_FILT_RET
ROOM=CODEC
1
VOLTAGE=2.86V 33
2
PP_CODEC_TO_REARMIC2_BIAS REARMIC2_BIAS_FILT_IN
K6 L5
C3661 2.2UF
MIC3_BIAS MIC3_BIAS_FILT
9 8
20% 2 6.3V X5R-CERM 0201
20% 6.3V X5R-CERM1 402
FLYN M12
9 8 8
ROOM=CODEC
CALTRA_FLYN
9 8
ROOM=CODEC
1
2
8
C3653
XW3630
4.7UF
SHORT-10L-0.1MM-SM
1
FRONTMIC3_BIAS_FILT_RET
ROOM=CODEC PLACE_NEAR=J3100.40:2mm
2
VOLTAGE=2.86V 20
PP_CODEC_TO_FRONTMIC3_BIAS FRONTMIC3_BIAS_FILT_IN
J6 K5
+VCP_FILT J10
MIC4_BIAS MIC4_BIAS_FILT
CALTRA_VCP_FILTP
8 8
1
20% 6.3V X5R-CERM1 402
C3662
8
4.7UF
ROOM=CODEC
XW3660 SM GNDCP
JTAG_TMS ROOM=CODEC JTAG_TCK U3500 JTAG_TDI WLCSP-1 JTAG_TDO
CRITICAL
SYM 3 OF 3
ROOM=CODEC
4.7UF
K8
16 8
SYM 2 OF 3
VOLTAGE=2.86V
RESET*
CODEC_TO_PMU_MIKEY_INT_L
16
FLYP K12
U3500
20% 6.3V X5R-CERM1 402
C3651
H3
CODEC_RESET_L
VOLTAGE=1.2V
L11
CALTRA_GNDCP
B
1
16
20% 2 6.3V X5R-CERM1 402
C6 C5 B5 B6
I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_AP_TO_CODEC_ASP_DOUT I2S_CODEC_TO_AP_ASP_DIN
B11 C11 A11 A10
I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_AP_TO_CODEC_XSP_DOUT I2S_CODEC_TO_AP_OWL_XSP_DIN
CS42L71
ASP_SCLK ASP_LRCK/FSYNC ASP_SDIN ASP_SDOUT XSP_SCLK XSP_LRCK/FSYNC XSP_SDIN/DAC2B_MUTE XSP_SDOUT
I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_AP_TO_CODEC_MSP_DOUT I2S_CODEC_TO_AP_MSP_DIN
B7 C7 D8 A7
MSP_SCLK MSP_LRCK/FSYNC MSP_SDIN MSP_SDOUT
PMU_TO_CODEC_DIGLDO_PULLDN
H5 J5
DIGLDO_PULLDN DIGLDO_PDN
ROOM=CODEC
2 ROOM=CODEC
1
C3663 4.7UF
20% 2 6.3V X5R-CERM1 402 ROOM=CODEC
-VCP_FILT M11
CALTRA_VCP_FILTN
LP_FILT+ F12
CALTRA_LP_FILTP 1
C3665 0.1UF
CALTRA_HS_BIAS_FILT 1
C3654
M3 M2
20% 6.3V 2 X5R-CERM 01005 ROOM=CODEC
HS_BIAS_FILT HS_BIAS_FILT_REF
FILT+ H1
CALTRA_FILTP
D3 D4 D2 C2
NC NC NC NC
TSTO TSTO TSTO TSTO TSTO TSTO TSTO TSTO
D11 B10 D5 D6 E5 E6 E7 K4
TSTI TSTI TSTI TSTI TSTI TSTI TSTI TSTI TSTI
C10 D10 D7 D9 E8 E9 G11 H4 M1
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
A1 A12 B12 E2 E3 E4 E10 F4 F5 F6 F7 F8 F9 F10 G4 G5 G6 G7 G8 G9 H6 H7 H8 H9
NC NC NC NC NC NC NC NC
C
B
GND J8
4.7UF
1
20% 2 6.3V X5R-CERM1 402
C3664 10UF
20% 2 6.3V CERM-X5R 0402-9 J2 GNDA
ROOM=CODEC
L7 GNDP
A6 B1 E11 F11
GNDD GNDD GNDD GNDD
CALTRA_HS_BIAS_FILT_IN
L4 GNDHS
ROOM=CODEC
FILT- H2
A
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
AUDIO:CALTRA CODEC (2/2) DRAWING NUMBER
XW3600 SHORT-10L-0.1MM-SM 1
2
25
Apple Inc.
CODEC_AGND
REVISION
4.0.0
R
VOLTAGE=0V
ROOM=CODEC
051-00094
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
36 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
25 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
D
D
SPEAKER AMPLIFIER APN: 338S1285 I2C ADDRESS: 1000000
23 22 17 15 14 4 34 29 28 27 25
PP_VCC_MAIN
PP1V8_VA
C3795
C3732
1
10UF
C3735
1
2.2UF
10UF
ROOM=SPKR_AMP
C3709
1
0.1UF
ROOM=SPKR_AMP
C3730 2.2UF
20% 2 6.3V X5R-CERM 01005
20% 6.3V 2 X5R-CERM 0201
ROOM=SPKR_AMP
ROOM=SPKR_AMP
1
1
2.2UF
20% 6.3V 2 X5R-CERM 0201
20% 6.3V 2 CERM-X5R 0402-9
20% 6.3V 2 CERM-X5R 0402-9
C3737
1
15 25 27
20% 2 6.3V X5R-CERM 0201
ROOM=SPKR_AMP
ROOM=SPKR_AMP
VOLTAGE=8.0V
PP_SPKR_VBOOST
20% 2 10V X5R-CERM 0402-8 ROOM=SPKR_AMP
C3742
1
10UF
C3743
1
10UF
20% 2 10V X5R-CERM 0402-8
10UF
20% 2 10V X5R-CERM 0402-8
ROOM=SPKR_AMP
C3744
20% 2 10V X5R-CERM 0402-8
ROOM=SPKR_AMP
1
C3745 0.1UF
10% 2 16V X5R-CERM 0201
ROOM=SPKR_AMP
ROOM=SPKR_AMP
1
C3746 100PF
5% 2 16V NP0-C0G 01005 ROOM=SPKR_AMP
VBST
C
F5
10UF
1
A4 A5
C3741
A1 B1 C1 D1
1
VP
VA 1
CRITICAL
2.2UF
L3700
A2 B2
SPEAKERAMP_SW
2 PIQA20161T-SM
CS35L21-XWZR WLCSP SW
ROOM=SPKR_AMP 34 31 27 17 8
34 31 27 17 8
8
8
I2C1_AP_SDA
D5
I2C1_AP_SCL
D6
SPEAKERAMP_TO_AP_INT_L
A7 A6
AP_TO_SPEAKERAMP_RESET_L 1
R3729
8
AP_TO_SPEAKERAMP_STAYIN_ALIVE
100K
VER1 ROOM=SPKR_AMP
CRITICAL
SDA SCL
FILT+ F2 LDO_FILT C5
SPEAKERAMP_FILT SPEAKERAMP_LDO_FILT
VSENSE- E3 VSENSE+ E2
SPEAKER_TO_SPEAKERAMP_VSENSE_N SPEAKER_TO_SPEAKERAMP_VSENSE_P
ISENSE- F1 ISENSE+ E1
INT* RESET*
OUT+ D2 OUT- C2
D7 ALIVE C7 ADO
5% 1/32W MF 2 01005
20% 2 6.3V X5R-CERM 0201
U3700
1.2UH-20%-3.0A-0.080OHM 1
C3729
IREF+ B7
1M INT PD 8
E7
I2S_AP_TO_SPEAKERAMP_MCLK
27 25 8
E6
I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK
F6
27 25 8
I2S_AP_TO_CODEC_ASP_DOUT
F7 E5
ROOM=SPKR_AMP
32 32
C3701 0.1UF 1
220PF
SPEAKERAMP_IREF 1
SCLK
R3735
ROOM=SPKR_AMP
44.2K
SDIN
R3702 1
2 1
20% 6.3V X5R-CERM 01005
39.2
1% 1/32W MF 01005 2 ROOM=SPKR_AMP
ROOM=SPKR_AMP
XW3702
GNDA
ROOM=SPKR_AMP
ROOM=SPKR_AMP
1 PLACE_NEAR=R3703.2:0.5mm
R3703
B5 B6 C6 E4 F3 F4
A3 B3 B4 C3 C4 D3 D4
GNDP
5% 2 10V C0G-CERM 01005
XW3701 SHORT-10L-0.1MM-SM
ROOM=SPKR_AMP PLACE_NEAR=R3703.1:0.5mm 1
1M INT PD
220PF
1% 1/32W MF 2 01005 ROOM=SPKR_AMP
2
SHORT-10L-0.1MM-SM
SDOUT
C3705
SPEAKERAMP_ISENSE_R_N
2
ROOM=SPKR_AMP
1
R3701 39.2
SPEAKERAMP_ISENSE_R_P
1% 1/32W MF 01005 2
LRCK/FSYNC
1
5% 10V 2 C0G-CERM 01005
MCLK
1M INT PD
I2S_CODEC_TO_AP_ASP_DIN
20% 2 6.3V CER-X5R 0402
C3704
1M INT PD
27 25 8
4.7UF
SPEAKERAMP_OUT_POS
1M INT PD 27 25 8
C
C3740
SPEAKERAMP_ISENSE_N SPEAKERAMP_ISENSE_P
1M INT PD
ROOM=SPKR_AMP
ROOM=SPKR_AMP
1
1
B
0.100 2
SPEAKERAMP_TO_SPEAKER_OUT_POS
32
B
1% 1/4W MF 0402
SPEAKERAMP_TO_SPEAKER_OUT_NEG
ROOM=SPKR_AMP
C3760 1000PF
1
10% 10V 2 X5R 01005
ROOM=SPKR_AMP
A
C3763 1000PF
1
10% 10V 2 X5R 01005
ROOM=SPKR_AMP
C3700 1000PF
1
10% 10V 2 X5R 01005
1
32
C3702 1000PF
10% 2 10V X5R 01005
ROOM=SPKR_AMP
ROOM=SPKR_AMP
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
AUDIO:SPEAKER DRIVER DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
37 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
26 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
D
D
ARC DRIVER APN: 338S1285 I2C ADDRESS: 1000001
29 28 26 25 23 22 17 15 14 4 34
PP_VCC_MAIN
PP1V8_VA
C3895
C3832
1
10UF
C3835
1
C3837
1
10UF
10UF
20% 6.3V 2 CERM-X5R 0402-9
20% 6.3V 2 CERM-X5R 0402-9
ROOM=ARC
ROOM=ARC
1
1
20% 6.3V 2 CERM-X5R 0402-9
20% 2 6.3V X5R-CERM 01005
20% 6.3V 2 X5R-CERM 0201
ROOM=ARC
C3809 0.1UF
2.2UF
ROOM=ARC
ROOM=ARC
1
15 25 26 27
C3830 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=ARC
VOLTAGE=8.0V
PP_ARC_VBOOST
22UF
20% 2 10V X5R-CERM 0402-8
C
C3848
20% 2 10V X5R-CERM 0603-1
ROOM=ARC
ROOM=ARC
1
C3842 0.1UF
1
C3846 100PF
10% 2 16V X5R-CERM 0201
5% 2 16V NP0-C0G 01005
ROOM=ARC
ROOM=ARC
VBST
C
F5
1
10UF
A4 A5
C3803
A1 B1 C1 D1
1
VP
VA 1
CRITICAL
1
A2 B2
ARC_SW
2 PIQA20161T-SM
CS35L21-XWZR WLCSP SW
VER1
ROOM=ARC 34 31 26 17 8
I2C1_AP_SDA
D5
34 31 26 17 8
I2C1_AP_SCL
D6
8
A7
ARC_TO_AP_INT_L
A6
AP_TO_ARC_RESET_L
R3829
8
100K
5% 1/32W MF 2 01005
27 26 25 15
FILT+ F2 LDO_FILT C5
CRITICAL
SCL
VSENSE- E3 VSENSE+ E2
RESET*
C7 ADO
I2S_AP_TO_ARC_MCLK
E7 E6
I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK
F6
26 25 8
I2S_AP_TO_CODEC_ASP_DOUT
F7
I2S_CODEC_TO_AP_ASP_DIN
E5
MCLK
1
NOSTUFF 1
ARC_DRIVER_OUT_POS
10% 2 10V X7R-CERM 01005
R3835 44.2K
SCLK
C3801
NOSTUFF
1
5% 10V 2 C0G-CERM 01005
R3802 1 39.2
ROOM=ARC
1% 1/32W MF 01005 ROOM=ARC 2
ROOM=ARC
SDIN
NOSTUFF
0.1UF
1
1% 1/32W MF 2 01005
LRCK/FSYNC
1
2
SDOUT
20% 6.3V X5R-CERM 01005
1
1M INT PD
ROOM=ARC PLACE_NEAR=R3803.1:0.5mm 1
B5 B6 C6 E4 F3 F4
A3 B3 B4 C3 C4 D3 D4
C3811 220PF
ROOM=ARC
10% 2 10V X7R-CERM 01005 ROOM=ARC
R3801
ROOM=ARC
ARC_ISENSE_R_N
XW3810
SHORT-10L-0.1MM-SM 1 2
2
XW3801 SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
B
ROOM=ARC
32
1% 1/32W MF 2 01005 ROOM=ARC
XW3802
GNDA
C3805
SOLENOID_TO_ARC_DRIVER_VSENSE_P
2
0% 1/32W MF 01005
NOSTUFF 1
0.00
5% 2 10V C0G-CERM 01005
39.2
ROOM=ARC
2
GNDP
32
220PF
ARC_ISENSE_R_P
1M INT PD
C3810 220PF
220PF
1
1M INT PD
26 25 8
ROOM=ARC
ARC_ISENSE_N ARC_ISENSE_P
ARC_IREF
1M INT PD 26 25 8
SOLENOID_TO_ARC_DRIVER_VSENSE_N
2
R3810
C3804
IREF+ B7
1M INT PD 26 25 8
0.00 0% 1/32W MF 01005
SOLENOID_TO_ARC_DRIVER_VSENSE_R_N SOLENOID_TO_ARC_DRIVER_VSENSE_R_P
OUT+ D2 OUT- C2
1M INT PD 8
ROOM=ARC
1
ROOM=ARC
ISENSE- F1 ISENSE+ E1
INT*
PP1V8_VA
ROOM=ARC
R3811
20% 2 6.3V X5R-CERM1 402
ROOM=ARC
SDA
D7 ALIVE
AP_TO_ARC_STAYIN_ALIVE
ARC_DRIVER_FILT ARC_DRIVER_LDO_FILT
C3840 4.7UF
20% 2 6.3V X5R-CERM 0201
U3800
1.2UH-20%-3.0A-0.080OHM
1
1
2.2UF
L3800
8
C3829
ROOM=ARC
ROOM=ARC
FL3803
1 PLACE_NEAR=R3803.2:0.5mm
R3803
0.100 2 1
B
NOSTUFF
120OHM-25%-1.8A-0.06DCR
ARC_DRIVER_OUT_FILT_POS
1
1% 1/4W MF 0402
ARC_DRIVER_TO_SOLENOID_OUT_POS
2 0402
32
ROOM=ARC
FL3804
120OHM-25%-1.8A-0.06DCR
ROOM=ARC
ARC_DRIVER_OUT_FILT_NEG
1
ARC_DRIVER_TO_SOLENOID_OUT_NEG
2
32
0402
C3860 1000PF
1
10% 10V 2 X5R 01005
ROOM=ARC
1
NOSTUFF
C3863
ROOM=ARC
1000PF
XW3811
10% 2 10V X5R 01005
SHORT-10L-0.1MM-SM 1 2
ROOM=ARC ROOM=ARC
C3800
1
1
1000PF
C3802 1000PF
10% 10V 2 X5R 01005
10% 2 10V X5R 01005
ROOM=ARC
ROOM=ARC
A
A PAGE TITLE
AUDIO:ARC DRIVER DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
38 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
27 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
DISPLAY & TOUCH - POWER SUPPLIES CHESTNUT DISPLAY PMU APN:338S1172 PP_VCC_MAIN
28 27 26 25 23 22 17 15 14 4 34 29
C4000
1
D
CRITICAL
1
D
10UF
20% VOLTAGE=6.3V 2 CERM-X5R 0402-9
L4000
1.0UH-20%-2.25A-0.15OHM
VOLTAGE=6.0V
TPS65730A0PYFF
ROOM=CHESTNUT
PIXB2016FE-SM
PP_CHESTNUT_CP
U4000 BGA
ROOM=CHESTNUT
D1 VIN
2
ROOM=CHESTNUT
6.3V
34 28 16 8
I2C0_AP_SCL
D3 SCL
34 28 16 8
I2C0_AP_SDA
D2 SDA
LCMBST B3 CPUMP B4
PP6V0_LCM_BOOST VOLTAGE=6.0V
VNEG E3
C3 LCM_EN
LCM_TO_CHESTNUT_PWR_EN
ROOM=CHESTNUT
VOLTAGE=-6.0V
NO INT PULL
30 16
20% 2 VOLTAGE=10V X5R-CERM 0402-8
PN_CHESTNUT_CN
A2 SYNC
C4002 10UF
CRITICAL
B2 SW
CHESTNUT_SW
1
CF1 C4 CF2 E4
PN5V7_LCM_MESON_AVDDN VOLTAGE=-5.7V
30
VNEG(SUB) E2
200K INT PD
C2 RESET*
PMU_TO_OWL_ACTIVE_READY
31 16 9 5
HVLDO1 A4
PP5V7_MESON_AVDDH
HVLDO2 A3
PP5V7_LCM_AVDDH
HVLDO3 A1
PP5V1_TOUCH_VDDH
VOLTAGE=5.7V
C1 AGND
E1 ADCMUX
CHESTNUT_TO_PMU_ADCMUX
16
B1 PGND1 D4 PGND2
NO INT PULL
VOLTAGE=5.7V VOLTAGE=5.1V 1
C4003
1
1UF
C4004 10UF
20% 2 VOLTAGE=16V CER-X5R 0201
20% 2 VOLTAGE=10V X5R-CERM 0402-8
ROOM=CHESTNUT
1
C4005 10UF
20% 2 VOLTAGE=10V X5R-CERM 0402-8
ROOM=CHESTNUT
1
C4006
1
10UF
20% 2 VOLTAGE=10V X5R-CERM 0402-8
ROOM=CHESTNUT
ROOM=CHESTNUT
C4007
1
10UF
20% 2 VOLTAGE=10V X5R-CERM 0402-8 ROOM=CHESTNUT
C4008
1
10UF
30
30
30
C4009 100PF
20% 2 VOLTAGE=10V X5R-CERM 0402-8
5% 2 VOLTAGE=16V NP0-C0G 01005
ROOM=CHESTNUT
ROOM=CHESTNUT
LED BACKLIGHT DRIVERS APN:353S00407
C
C
CRITICAL
CRITICAL
L4021
D4021 DSN2
1.0UH-20%-3.6A-0.060OHM
PP_VCC_MAIN
1
BL_SW2
2
A
PIQA20161T-SM
C4021
10UF
ROOM=BACKLIGHT
10UF
20% 6.3V CERM-X5R 2 0402-9
CRITICAL
20% 6.3V CERM-X5R 2 0402-9
ROOM=BACKLIGHT
NSR05F30NXT5G
ROOM=BACKLIGHT
1
CRITICAL
L4020
D4020
15UH-20%-0.72A-0.9OHM
ROOM=BACKLIGHT
1
2
NSR0530P2T5G
BL_SW1
A
PP_LCM_BL_ANODE
K
VOLTAGE=25V
PITA32251T-SM SOD-923-1
ROOM=BACKLIGHT
ROOM=BACKLIGHT
1
ROOM=BACKLIGHT
100PF
5% 2 35V NP0-C0G 01005
U4020
LM3539A0YFFR D4 IN
28 16 9 28 9
34 28 16 8 34 28 16 8
28 7
B
34 28 22
CRITICAL
ROOM=BACKLIGHT
D3 VIO/HWEN
DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMGR_TO_BACKLIGHT_SCLK
C2 SDI C3 SCK
SW2_1 A3 SW2_2 A4
I2C0_AP_SDA I2C0_AP_SCL
B2 SDA A2 SCL
LED1 C1 LED2 B1
20% 2 35V X5R-CERM 0603
MOJAVE MESA BOOST
ROOM=BACKLIGHT
APN:353S3978
L4040
VOLTAGE=0.26V
PP_LCM_BL_CAT1 30 PP_LCM_BL_CAT2 30
28 27 26 25 23 22 17 15 14 4 34 29
200K
PP_VCC_MAIN NOSTUFF
C4040
C4050 10UF
C4051 10UF
20% 20% VOLTAGE=6.3V 2 VOLTAGE=6.3V 2 CERM-X5R CERM-X5R 0402-9 0402-9 ROOM=BACKLIGHT
ROOM=BACKLIGHT
C4099 2.2UF
20% VOLTAGE=6.3V 2 X5R-CERM 0201 ROOM=BACKLIGHT
C4098
D4051 DSN2
BL34_SW2
2
A
PIQA20161T-SM
2.2UF
CRITICAL
20% VOLTAGE=6.3V 2 X5R-CERM 0201
1
2
ROOM=MOJAVE
C4043 2.2UF
20% 2 VOLTAGE=35V X5R-CERM 0402
B
ROOM=MOJAVE
PMID C1
1
C4041 2.2UF
20% 2 VOLTAGE=35V X5R-CERM 0402 ROOM=MOJAVE
A
PP_LCM_BL34_ANODE
K
SOD-923-1
DSBGA
CRITICAL
PP1V8_SDRAM
D3 VIO/HWEN
DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMGR_TO_BACKLIGHT_SCLK
C2 SDI C3 SCK
D2 INHIBIT
BB_TO_LED_DRIVER_GSM_BURST_IND
C4052 100PF
5% 2 35V NP0-C0G 01005
ROOM=BACKLIGHT
1
C4053 10UF
20% 2 35V X5R-CERM 0603 ROOM=BACKLIGHT
OUT A1 SW1 C4
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
DISPLAY:POWER
VOLTAGE=0.26V
LED1 C1 LED2 B1
PP_LCM_BL_CAT3 30 PP_LCM_BL_CAT4 30
DRAWING NUMBER
VOLTAGE=0.26V
D1 TRIG
AP_TO_MUON_BL_STROBE_EN
1
SW2_1 A3 SW2_2 A4
B2 SDA A2 SCL
I2C2_AP_SDA I2C2_AP_SCL
30
VOLTAGE=25V
Apple Inc.
051-00094 REVISION
4.0.0
R
B3 GND B4 GND
34 28 22
C2 LDOIN
5% 2 VOLTAGE=35V NP0-C0G 01005
NSR0530P2T5G
BL34_SW1
D4 IN
28 7
B2 EN_M A3 EN_S
1
100PF
D4050
15UH-20%-0.72A-0.9OHM
ROOM=BACKLIGHT
U4050
30 20 8
2
VOUT C3
C4042
CRITICAL
L4050
LM3539A0YFFR
30 20 8
PP17V0_MOJAVE_LDOIN
1
CRITICAL
ROOM=BACKLIGHT
ROOM=BACKLIGHT
28 9
0.00
ROOM=MOJAVE
K
ROOM=BACKLIGHT
28 16 9
1
B1 SW
3 29
VOLTAGE=16.5V
NSR05F30NXT5G
ROOM=BACKLIGHT
1
MESA_TO_BOOST_EN
CRITICAL
ROOM=BACKLIGHT
A
MOJAVE_EN_M
PP16V5_MESA
BGA
0% 1/32W MF 01005
PITA32251T-SM
34 32 31 28 25 16 15 14 12 8
2
0% 1/32W MF 01005
29 3
1 1
1
LM3638
A2 VIN
ROOM=MOJAVE
R4041
1.0UH-20%-3.6A-0.060OHM 1
PP3V0_TRISTAR
0.00
0403
VOLTAGE=17.0V
L4051
1
34 32 31 19 15
ROOM=MOJAVE
CRITICAL PP_VCC_MAIN
R4040
1
20% VOLTAGE=6.3V 2 CERM-X5R 0402-9
1% 1/32W MF 01005 ROOM=BACKLIGHT 2
27 26 25 23 22 17 15 14 4 34 29 28
1.0UH-20%-0.4A-0.636OHM 1 2 POS18V0_MESA_SW
10UF
1
U4040
CRITICAL
VOLTAGE=0.26V
D2 INHIBIT
R4020
10UF
SW1 C4
D1 TRIG
BB_TO_LED_DRIVER_GSM_BURST_IND
C4023
OUT A1
PP1V8_SDRAM
AP_TO_MUON_BL_STROBE_EN
1
B3 GND B4 GND
34 32 31 28 25 16 15 14 12 8
DSBGA
C4022
30
B3 AGND
C4020
1
K
A1 PGND
28 27 26 25 23 22 17 15 14 4 34 29
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
40 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
28 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
A
8
7
6
5
4
3
MAMBA & MESA FLEX
2
1
ORB & MESA CONNECTOR MLB: 516S00056 (RCPT)
MESA POWER CRITICAL
FL4100
D
J4100
70-OHM-25%-0.28A 1
PP3V0_MESA
15
1
C4104
1
2.2UF
C4103
1
2.2UF
20%
2.2UF
20%
2 6.3V X5R-CERM 0201
20%
2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
C4102
2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
2
PP3V0_MESA_CONN 29
01005
ROOM=MAMBA_MESA
27
VOLTAGE=3.0V
1
C4101
1
0.1UF
C4100 100PF
20% 2 6.3V X5R-CERM 01005
5% 2 16V NP0-C0G 01005
ROOM=MAMBA_MESA
PP3V0_MESA_CONN
29
ROOM=MAMBA_MESA
SPI_AP_TO_MESA_MOSI_CONN SPI_MESA_TO_AP_MISO_CONN BUTTON_MENU_KEY_CONN_L
29 29
FL4105
29
70-OHM-25%-0.28A 15
PP1V8_MESA
1 1
PP1V8_MESA_CONN
2
29
29
ROOM=MAMBA_MESA
1
2.2UF
C4105
29
100PF
20% 2 6.3V X5R-CERM 0201
29
5%
2 16V NP0-C0G
MAMBA POWER
01005
ROOM=MAMBA_MESA
MESA_TO_BOOST_EN_CONN SPI_AP_TO_MESA_SCLK_CONN MESA_TO_AP_INT_CONN PP16V5_MESA_CONN
29
VOLTAGE=1.8V
01005
C4106
ROOM=MAMBA_MESA
FL4107
D
BB35CRA223A
29
PP1V8_MESA_CONN
F-ST-SM
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
25
26
MAMBA_TO_LCM_MDRIVE_MAMBA_CONN LCM_TO_MAMBA_MSYNC_MAMBA_CONN AP_TO_TOUCH_RESET_CONN_L TP_MAMBA_HINT_L NO_TEST I2C_TOUCH_BI_MAMBA_PROX_SDA I2C_TOUCH_TO_MAMBA_PROX_SCL PP1V8_TOUCH_TO_MAMBA_CONN PP2V75_MAMBA_CONN
29
PP4100 P3MM-NSM
29 29 30
1
SM
PP
20 29 30 20 29 30 29
29
28
70-OHM-25%-0.28A
PP16V5_MESA
1
PP16V5_MESA_CONN
2
29
VOLTAGE=16.5V
01005 ROOM=MAMBA_MESA
1
C4107 100PF
NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
5% 2 35V NP0-C0G 01005
NOSTUFF
MESA DIGITAL I/O 28 27 26 25 23 22 17 15 14 4 34
FL4110
8
120-OHM-210MA 8
SPI_AP_TO_MESA_MOSI
70-OHM-25%-0.28A
LP5907SNX-2.85
1
PP_VCC_MAIN
4 VIN
X2SON
VOUT 1
PP2V75_MAMBA_LDO
ROOM=RCAM_B2B
MAMBA_EXT_LDO_EN
3 EN
SPI_AP_TO_MESA_MOSI_CONN
01005 ROOM=MAMBA_MESA
1
29
C3210
1
30 29 20 14
SPI_AP_TO_MESA_SCLK_CONN
2 1
6.3V
ROOM=MAMBA_MESA
1
20%
5% 2 16V NP0-C0G 01005
2 X5R-CERM 0201
ROOM=MAMBA_MESA
C4120 100PF
6.3V
2 X5R-CERM 0201
2 X5R-CERM 0201
C4121 2.2UF
20%
6.3V
PP1V8_TOUCH
1
0.00
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
PP1V8_TOUCH_TO_MAMBA_CONN 29
2
VOLTAGE=1.8V
0% 1/32W MF 01005
29
1
C4126
1
20%
C4111
5% 2 16V NP0-C0G 01005
2 6.3V X5R-CERM 0201 ROOM=MAMBA_MESA
5%
C4125 100PF
2.2UF
56PF
ROOM=MAMBA_MESA
1
2.2UF
20%
ROOM=MAMBA_MESA
0% 1/32W MF 01005
C4122
R4125
R4111 0.00
1
2.2UF
ROOM=MAMBA_MESA
ROOM=RCAM_B2B
ROOM=MAMBA_MESA
1
C4123
X5R-CERM 2 0201
5% 2 16V NP0-C0G 01005
SPI_AP_TO_MESA_SCLK
1
6.3V
56PF
8
C
29
VOLTAGE=2.75V
01005 ROOM=MAMBA_MESA
20% 2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
20%
C4124
PP2V75_MAMBA_CONN
2
2.2UF
20% 2 6.3V X5R-CERM 0201
2.2UF
C4110
C4127
1
2.2UF
GND EPAD
2
1
VOLTAGE=2.75V
1
2
C
FL4120
U3200
ROOM=MAMBA_MESA
5
28 3
ROOM=MAMBA_MESA
16V
2 NP0-C0G 01005
FL4112
ROOM=MAMBA_MESA
120-OHM-210MA 8
SPI_MESA_TO_AP_MISO
1
SPI_MESA_TO_AP_MISO_CONN
2 01005 ROOM=MAMBA_MESA
1
MAMBA DIGITAL I/O
29
C4112 56PF
5% 2 16V NP0-C0G 01005
FL4130
120-OHM-210MA
ROOM=MAMBA_MESA 30
1
MAMBA_TO_LCM_MDRIVE_LCM_CONN
C4130
B
2
1
MAMBA_TO_LCM_MDRIVE_MAMBA_CONN NOSTUFF
01005
1
ROOM=MAMBA_MESA
56PF
29
C4199
B
56PF
5% 16V NP0-C0G 2 01005
5% 2 16V NP0-C0G 01005
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
FL4131
120-OHM-210MA 30
30 29 20 14
LCM_TO_MAMBA_MSYNC_LCM_CONN PP1V8_TOUCH
R4130
NOSTUFF
R4131
2.0K
8
MESA_TO_AP_INT
1
681
1% 1/32W MF 01005 ROOM=MAMBA_MESA 2
MESA_TO_AP_INT_CONN
2
1% 1/32W MF 01005
1
1
ROOM=MAMBA_MESA
1
29
C4131 56PF
5% 2 16V NP0-C0G 01005
1
2.0K
1% 1/32W MF 01005 ROOM=MAMBA_MESA 2
ROOM=MAMBA_MESA
I2C_TOUCH_TO_MAMBA_PROX_SCL
29
1
C4115
20 29 30
CKPLUS_WAIVE=I2C_PULLUP
C4132 56PF
100PF
5% 2 16V NP0-C0G 01005
5%
ROOM=MAMBA_MESA
LCM_TO_MAMBA_MSYNC_MAMBA_CONN
2 01005
NOSTUFF
R4115
1
16V
2 NP0-C0G 01005
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
R4116 28 3
MESA_TO_BOOST_EN
1
681
MESA_TO_BOOST_EN_CONN
2
1% 1/32W MF 01005
1
I2C_TOUCH_BI_MAMBA_PROX_SDA
29
1
C4116
5% 2 16V NP0-C0G 01005
5%
A
2 16V NP0-C0G 01005
FL4134
R4117 34 16 9 8
1
C4118 0.01UF
1
100
BUTTON_MENU_KEY_CONN_L
29
8
1
AP_TO_TOUCH_RESET_L
TOUCH:ORB & MESA B2B
2 01005
5% 1/32W MF 01005
ROOM=MAMBA_MESA
1
ROOM=MAMBA_MESA
5%
2 6.3V X5R 01005
2 16V NP0-C0G 01005
ROOM=MAMBA_MESA
1
DRAWING NUMBER
29 30
C4134
Apple Inc.
051-00094 REVISION
4.0.0
R
5% 2 16V NP0-C0G 01005
100PF
10%
AP_TO_TOUCH_RESET_CONN_L 100PF
C4117
SYNC_DATE=05/29/2014
PAGE TITLE
120-OHM-210MA
2
A
SYNC_MASTER=N71_SINGLE_BRD
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
BUTTON_MENU_KEY_L
C4133 56PF
100PF
ROOM=MAMBA_MESA
20 29 30
CKPLUS_WAIVE=I2C_PULLUP
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
NOTE:MAMBA I2C PULL-UPS TO PP1V8_TOUCH INSIDE KEPLER ADDING R4130, R4131 AS OPTION FOR TWEAKING VALUE
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
41 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
29 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7 FL4200
DISPLAY POWER
2
C4200
C4201
1
2.2UF
C4202
1
2.2UF
20% 6.3V X5R-CERM 2 0201
1
ROOM=KEPLER_B2B
C4203
C4204
1
20% 6.3V 2 X5R-CERM 0201
ROOM=KEPLER_B2B
VOLTAGE=5.7V
7
5% 16V NP0-C0G 01005
2
ROOM=KEPLER_B2B
7
2
1
C4205
C4206
1
20% 2 6.3V X5R-CERM 0201
FL4207
70-OHM-25%-0.28A 2
7
VOLTAGE=1.8V
01005
2
7
7
VOLTAGE=-5.7V
7
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
MIPI_AP_TO_LCM_DATA1_P MIPI_AP_TO_LCM_DATA1_N
3
MIPI_AP_TO_LCM_DATA2_P
7
7
MIPI_AP_TO_LCM_DATA2_N
MIPI_AP_TO_LCM_DATA3_P
PP1V8_TOUCH_CONN
30
TAM0605
MIPI_AP_TO_LCM_DATA3_N
3
FL4210
30 30 30 30
28 16
2
LCM_TO_CHESTNUT_PWR_EN
1
LCM_TO_CHESTNUT_PWR_EN_CONN
01005
PP5V1_TOUCH_VDDH_CONN
C4210
1
ROOM=KEPLER_B2B
VOLTAGE=5.1V
2
AP_TO_LCM_RESET_L
240OHM-350MA
PP_LCM_BL_ANODE_CONN 3 VOLTAGE=25V
ROOM=KEPLER_B2B
16
PMU_TO_LCM_PANICB
1
10
ROOM=KEPLER_B2B
OWL/TOUCH INTERFACE
PP_LCM_BL34_ANODE
1
100PF
C4251
5% 2 16V NP0-C0G 01005
30 34 9 8
VOLTAGE=0.26V
1
ROOM=KEPLER_B2B
C4291
1 1
1 ROOM=KEPLER_B2B
C4292
FL4231
9
2
UART_OWL_TO_TOUCH_TXD
1
1
ROOM=KEPLER_B2B
C4293
2
TOUCH_TO_OWL_ACCEL_DATA_REQUEST
VOLTAGE=0.26V
30 29 20 14
5% 1/32W MF 01005 2
DISPLAY EEPROM I2C
1
NOSTUFF
20
TOUCH_TO_PROX_RX_EN_FCAM_CONN
C4224
ROOM=KEPLER_B2B
56PF
20
I2C_TOUCH_BI_MAMBA_PROX_SDA
5% 2 16V NP0-C0G 01005
1
NOSTUFF
1
C4260
2
TOUCH_TO_PROX_RX_EN_LCM_CONN
30
5% 16V NP0-C0G 01005
2
ROOM=KEPLER_B2B
6
5
DISPLAY:LCM B2B
30 20 29
NOSTUFF
DRAWING NUMBER
C4261 5% 16V NP0-C0G 01005 ROOM=KEPLER_B2B
C4241 100PF
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
42 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
ROOM=KEPLER_B2B
7
A
20 29 30
56PF
5% 2 16V NP0-C0G 01005
ROOM=KEPLER_B2B
C4255
PAGE TITLE
I2C_TOUCH_TO_MAMBA_PROX_SCL
56PF
1
30
ROOM=KEPLER_B2B
SOT1226 4 TOUCH_TO_PROX_TX_EN_BUFF
2
01005
1
74AUP1G04GX
FL4241
1
AP_TO_TOUCH_CLK32K_RESET_CONN_L 5% 2 16V NP0-C0G 01005
120-OHM-210MA 8 20 28 30
1
100PF
NC
2 5% 16V NP0-C0G 01005
8
2
AP_TO_TOUCH_CLK32K_RESET_L
1
C4223
30
C4254
FL4255
3
8 20 28 30
NOSTUFF
TOUCH_TO_AP_INT_L_CONN
120-OHM-210MA
U4240 VER 3
30
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
2
TOUCH_TO_PROX_TX_EN_CONN_L
SPI_TOUCH_TO_AP_MISO_CONN
5% 2 16V NP0-C0G 01005
CRITICAL
20% 2 6.3V X5R 01005-1
B
100PF
C4232
ROOM=KEPLER_B2B
0.22UF
56PF
1
1
01005
C4240
30
1 ROOM=KEPLER_B2B
NC
30
I2C2_AP_SCL
2
TOUCH_TO_AP_INT_L
ROOM=KEPLER_B2B
100K
SPI_AP_TO_TOUCH_MOSI_CONN
ROOM=KEPLER_B2B
01005
8
R4240
30
C4253
FL4254
PP1V8_TOUCH 1
SPI_AP_TO_TOUCH_SCLK_CONN
120-OHM-210MA
ROOM=KEPLER_B2B
1
30
5% 2 16V NP0-C0G 01005
TOUCH_TO_OWL_ACCEL_DATA_REQUEST_CONN 30
PROX/TOUCH INTERFACE
30
SPI_AP_TO_TOUCH_CS_CONN_L
56PF
5% 2 16V NP0-C0G 01005
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
1
56PF
ROOM=KEPLER_B2B
1
30
C4252
1
C4231
1 ROOM=KEPLER_B2B
100PF
I2C2_AP_SDA
2
SPI_TOUCH_TO_AP_MISO
ROOM=KEPLER_B2B
8
01005
5% 2 35V NP0-C0G 01005
A
30
ROOM=KEPLER_B2B
01005
120-OHM-210MA 9
1
FL4253
FL4232
30
VOLTAGE=0.26V
PP_LCM_BL_CAT4_CONN 3
0201
30
120-OHM-210MA
5% 2 16V NP0-C0G 01005
ROOM=KEPLER_B2B
2
1
56PF
5
1
30
5% 2 16V NP0-C0G 01005
UART_OWL_TO_TOUCH_TXD_CONN 30
240OHM-350MA
PP_LCM_BL_CAT4
30
56PF
1 ROOM=KEPLER_B2B
5% 35V 2 NP0-C0G 01005
28
2
C4230
8
01005
100PF
FL4293
8 20 28 30 20 29 30 30
C4299
FL4252
ROOM=KEPLER_B2B
120-OHM-210MA
30
VOLTAGE=25V
PP_LCM_BL_CAT3_CONN 3 1
30
ROOM=KEPLER_B2B
01005
ROOM=KEPLER_B2B
0201
30
5% 2 16V NP0-C0G 01005
SPI_AP_TO_TOUCH_MOSI
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
2
30
56PF
5% 2 16V NP0-C0G 01005
240OHM-350MA
PP_LCM_BL_CAT3
1
ROOM=KEPLER_B2B
56PF
5% 2 35V NP0-C0G 01005
28
1
LCM_TO_OWL_BSYNC_CONN 30
ROOM=KEPLER_B2B
100PF
FL4292
01005
5% 16V 2 NP0-C0G 01005
8
01005
PP_LCM_BL34_ANODE_CONN 3
0201
20
120-OHM-210MA
2
LCM_TO_OWL_BSYNC
1
56PF
ROOM=KEPLER_B2B
2
30
ROOM=KEPLER_B2B
2
SPI_AP_TO_TOUCH_SCLK NOSTUFF
FL4230
240OHM-350MA 28
8
ROOM=KEPLER_B2B
5% 2 35V NP0-C0G 01005
FL4291
29
120-OHM-210MA
30
C4222
1
100PF
B
30
C4250
FL4251
ROOM=KEPLER_B2B
PP_LCM_BL_CAT2_CONN 3
C4213
20 29 30 30
5% 16V 2 NP0-C0G 01005
120-OHM-210MA 1
30
56PF
PMU_TO_LCM_PANICB_CONN
ROOM=KEPLER_B2B
VOLTAGE=0.26V
ROOM=KEPLER_B2B
0201
1
ROOM=KEPLER_B2B
2
5% 1/32W MF 01005
30
240OHM-350MA
PP_LCM_BL_CAT2
1 01005
ROOM=KEPLER_B2B
5% 35V 2 NP0-C0G 01005
2
2
SPI_AP_TO_TOUCH_CS_L
5% 2 16V NP0-C0G 01005
100PF
FL4213
8
R4222 PP_LCM_BL_CAT1_CONN 3
C4212
8 20 28 30
FL4250
100PF
240OHM-350MA 1
D
30
120-OHM-210MA
30
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
0201
3 30
AP/TOUCH INTERFACE
C4221
1
ROOM=KEPLER_B2B
1% 1/32W MF 01005 2
5% 35V 2 NP0-C0G 01005
2
58
3 30
C
AP_TO_LCM_RESET_CONN_L
100K
30
100PF
FL4212
57
TOUCH_TO_OWL_ACCEL_DATA_REQUEST_CONN I2C_TOUCH_BI_MAMBA_PROX_SDA SPI_AP_TO_TOUCH_SCLK_CONN TOUCH_TO_PROX_RX_EN_LCM_CONN AP_TO_TOUCH_RESET_CONN_L TOUCH_TO_PROX_TX_EN_CONN_L PROX_TO_TOUCH_RX_LCM_CONN SPI_TOUCH_TO_AP_MISO_CONN SPI_AP_TO_TOUCH_MOSI_CONN LCM_TO_OWL_BSYNC_CONN I2C2_AP_SCL I2C_TOUCH_TO_MAMBA_PROX_SCL UART_OWL_TO_TOUCH_TXD_CONN NC_KEPLER_PHOTON_PIFA_CONN PMU_TO_LCM_PANICB_CONN AP_TO_LCM_RESET_CONN_L LCM_TO_CHESTNUT_PWR_EN_CONN TOUCH_TO_AP_INT_L_CONN AP_TO_TOUCH_CLK32K_RESET_CONN_L
3 30
ROOM=DISPLAY
1 01005
R42201 C4211
30
120-OHM-210MA
FL4211
1
MAMBA_TO_LCM_MDRIVE_LCM_CONN LCM_TO_MAMBA_MSYNC_LCM_CONN PP5V1_TOUCH_VDDH_CONN PP5V7_MESON_AVDDH_CONN PP1V8_LCM_CONN PP5V7_LCM_AVDDH_CONN PN5V7_LCM_MESON_AVDDN_CONN PP1V8_TOUCH_CONN
FL4221
8
0201
MIPI_AP_TO_LCM_DATA0_CONN_N MIPI_AP_TO_LCM_DATA0_CONN_P
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
MIPI_AP_TO_LCM_DATA1_CONN_N MIPI_AP_TO_LCM_DATA1_CONN_P
PP_LCM_BL_CAT2_CONN PP_LCM_BL_CAT1_CONN PP_LCM_BL_ANODE_CONN NC_KEPLER_MESON_TEST2_MUX_CONN NC_KEPLER_MESON_TEST0_MUX_CONN SPI_AP_TO_TOUCH_CS_CONN_L I2C2_AP_SDA
5% 2 16V NP0-C0G 01005
30
5% 16V NP0-C0G 01005
2
MIPI_AP_TO_LCM_CLK_CONN_N MIPI_AP_TO_LCM_CLK_CONN_P
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54
100PF
100PF
2
56
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53
C4220
1
ROOM=KEPLER_B2B
1
F-ST-SM
120-OHM-210MA
ROOM=KEPLER_B2B
0201
28
30
FL4220
5% 16V NP0-C0G 01005
MIPI_AP_TO_LCM_DATA2_CONN_N MIPI_AP_TO_LCM_DATA2_CONN_P
29
MIPI_AP_TO_LCM_DATA3_CONN_N 30
2
MIPI_AP_TO_LCM_DATA3_CONN_N MIPI_AP_TO_LCM_DATA3_CONN_P
29
MIPI_AP_TO_LCM_DATA3_CONN_P 30
1
SYM_VER-2
100PF
2
1
30
DISPLAY CONTROL SIGNALS
VOLTAGE=1.8V
C4209
1
ROOM=KEPLER_B2B
1
30
ROOM=KEPLER_B2B
0201
2
PP_LCM_BL_CAT1
MIPI_AP_TO_LCM_DATA2_CONN_N 30
2
4
240OHM-350MA
28
MIPI_AP_TO_LCM_DATA2_CONN_P 30
1
SYM_VER-2
30
30
1
1
30
L4294 CRITICAL 65-OHM-0.1A-0.7-2GHZ
7
20% 6.3V X5R-CERM 2 0201
PP_LCM_BL_ANODE
TAM0605
3
VOLTAGE=5.7V
5% 16V NP0-C0G 01005
2.2UF
28
30
ROOM=KEPLER_B2B
2
BACKLIGHT
MIPI_AP_TO_LCM_DATA1_CONN_N 30
ROOM=KEPLER_B2B
240OHM-350MA
PP5V1_TOUCH_VDDH
30
MIPI_AP_TO_LCM_DATA1_CONN_P 30
2
4
100PF
FL4209
28
30
CRITICAL
30
C4208
1 2
C
30
L4293 CRITICAL 65-OHM-0.1A-0.7-2GHZ
PP5V7_MESON_AVDDH_CONN 30
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
MIPI_AP_TO_LCM_DATA0_CONN_N 30
2
ROOM=KEPLER_B2B
5% 16V NP0-C0G 01005
1 0201
1
3
ROOM=KEPLER_B2B
2
C4215
30 3
MIPI_AP_TO_LCM_DATA0_CONN_P 30
30
240OHM-350MA
PP1V8_TOUCH
MIPI_AP_TO_LCM_DATA0_N
100PF
FL4208
30 29 20 14
MIPI_AP_TO_LCM_DATA0_P
PP_LCM_BL_CAT3_CONN PP_LCM_BL_CAT4_CONN PP_LCM_BL34_ANODE_CONN
30 3
ROOM=KEPLER_B2B
C4207
1 2
PP5V7_MESON_AVDDH
CRITICAL
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
L4202
PN5V7_LCM_MESON_AVDDN_CONN 30
ROOM=KEPLER_B2B
28
55
ROOM=KEPLER_B2B
5% 16V NP0-C0G 01005
ROOM=KEPLER_B2B
1
J4200
MIPI_AP_TO_LCM_CLK_CONN_N 30
2
100PF
2.2UF
PN5V7_LCM_MESON_AVDDN
3
L4201
PP1V8_LCM_CONN 30 1
CRITICAL
FLEX: 516S00050 (PLUG)
30 3
ROOM=KEPLER_B2B
28
MIPI_AP_TO_LCM_CLK_N
ROOM=KEPLER_B2B
7
0201
D
MLB: 516S00051 (RCPT) MIPI_AP_TO_LCM_CLK_CONN_P 30
1
SYM_VER-2
ROOM=KEPLER_B2B
240OHM-350MA PP1V8
TAM0605
4
1
KEPLER CONNECTOR
CRITICAL L4200 65-OHM-0.1A-0.7-2GHZ
MIPI_AP_TO_LCM_CLK_P
2
AA27-S054VA1
FL4205
14 13 12 9 8 7 6 5 3 34 21 20 17
3
100PF
2.2UF
20% 6.3V X5R-CERM 2 0201
ROOM=KEPLER_B2B
4
PP5V7_LCM_AVDDH_CONN 30
2.2UF
20% 6.3V X5R-CERM 2 0201
ROOM=KEPLER_B2B
1 0201
1
5
DISPLAY MIPI
240OHM-350MA
PP5V7_LCM_AVDDH
28
6
SHEET
30 OF 60
IV ALL RIGHTS RESERVED
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
D
D
TRISTAR 2 APN:343S0695 PP3V0_TRISTAR 1
1.0UF
3
C4501 0.1UF
20% 2 6.3V X5R 0201-1
20% 2 6.3V X5R-CERM 01005
ROOM=TRISTAR
34 32 28 25 16 15 14 12 8
D
PP1V8_SDRAM 1
ROOM=TRISTAR
0.01UF
REVERSE_GATE VDD_1V8 F3
C
ROOM=TRISTAR
PLACE_NEAR=U2000.T5:20mm
R4510
1 1
C4510 0.01UF
10% 2 6.3V X5R 01005
6.34K 2 1% 1/32W MF 01005
ROOM=PMU 24 24
34 34
L4521
15NH-250MA 1
2 0201
C3 C4
MIKEYBUS_DATA_P MIKEYBUS_DATA_N
A1 B1
USB_BB_DATA_P USB_BB_DATA_N TRISTAR_USB_BRICK_ID_R
C2
USB_AP_DATA_L_P USB_AP_DATA_L_N
A3 B3
UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD
E2 E1
UART_AP_DEBUG_TXD UART_AP_DEBUG_RXD
F2 F1
ROOM=TRISTAR
L4522
8
15NH-250MA 5
USB_AP_DATA_N
CSD68822F4
G
0402
C
ROOM=TRISTAR
CRITICAL
1
ROOM=TRISTAR
R4500 10K
S
5% 1/32W MF 2 01005 ROOM=TRISTAR
U4500
PLACE_NEAR=U2000.T5:20mm
USB_AP_DATA_P
1
CBTL1610A3UK DIG_DP
WLCSP
DIG_DN
ROOM=PMU
5
CRITICAL
Q4500
C4502
10% 2 6.3V X5R 01005
TRISTAR_TO_PMU_USB_BRICK_ID
3 17 32
15
2
C4500
ACC_PWR D5
1
16
PP5V0_USB
PP3V3_ACC
VDD_3V0 F4
34 32 28 19 15
1
8
2 34 8
0201 ROOM=TRISTAR
34 8
NC 5
B
A5 B5
SWD_DOCK_TO_AP_SWCLK SWD_DOCK_BI_AP_SWDIO
VOLTAGE=5.0V VOLTAGE=4.3V VOLTAGE=4.3V
PP_TRISTAR_PIN PP_TRISTAR_ACC1 PP_TRISTAR_ACC2
DP1 A2 DN1 B2
TRISTAR_DP1_CONN_P TRISTAR_DP1_CONN_N
DP2 A4 DN2 B4
TRISTAR_DP2_CONN_P TRISTAR_DP2_CONN_N
CON_DET_L E3
TRISTAR_CON_DETECT_L
BRICK_ID
3 32 3 32
3 32 3 32
1
C4503 1UF
20% 2 16V CER-X5R 0201 ROOM=TRISTAR
USB0_DP USB0_DN UART0_TX UART0_RX
POW_GATE_EN* D6
UART1_TX UART1_RX
SWITCH_EN E4 HOST_RESET B6
UART2_TX UART2_RX
SDA SCL INT BYPASS
JTAG_CLK JTAG_DIO
3 32 3 32
3 32
TRISTAR_TO_TIGRIS_VBUS_OFF 17 PMU_TO_OWL_ACTIVE_READY 5 9 TRISTAR_TO_PMU_HOST_RESET 16
D3 D4 C6 E6
I2C1_AP_SDA I2C1_AP_SCL TRISTAR_TO_AP_INT TRISTAR_BYPASS
31
16 28
8 17 26 27 34 8 17 26 27 34 8 16
B
DVSS DVSS DVSS
5
D2 D1
USB1_DP USB1_DN
P_IN F6 ACC1 C5 ACC2 E5
1
C4504 1.0UF
F5 C1 A6
20% 2 6.3V X5R 0201-1
ROOM=TRISTAR
PROBE POINTS 31 17
TRISTAR_TO_TIGRIS_VBUS_OFF
1
SM PP
PP4500 P3MM-NSM
ROOM=TRISTAR
A
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
I/O:TRISTAR 2 DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
45 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
31 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
DOCK FLEX CONNECTOR
DOCK FLEX CONNECTOR
MLB: 516S00033 (RCPT) FLEX: 516S00034 (PLUG)
ANTENNA
AUDIO JACK 24
1
3.3K
HPHONE_TO_CODEC_DETECT_CONN
2
5% 1/32W MF 01005
D
1
FL4620
32
2
PP3V0_TRISTAR
34 31 28 19 15
1
FL4621
DZ4600
1
1
6.8V-100PF
01005
2
34 31 28 25 16 15 14 12 8
32
2
PP1V8_SDRAM
1
PP1V8_LAT_CONN
ROOM=DOCK_B2B
NO_XNET_CONNECTION=1
C4699
100PF
5% 2 16V NP0-C0G 01005
220PF
10% 2 10V X7R-CERM 01005
ROOM=DOCK_B2B
FL4622
120-OHM-210MA
FERR-33-OHM-0.8A-0.09-OHM
CODEC_TO_HPHONE_HS4_CONN
2 0201
1
ROOM=DOCK_B2B
34
32
1
RFFE5_BB_TO_ANT_SCLK
DZ4601
6.8V-100PF 01005
FL4602
1
C4698
1
ROOM=DOCK_B2B
5% 2 16V NP0-C0G 01005
10% 2 10V X7R-CERM 01005
ROOM=DOCK_B2B
FL4623
120-OHM-210MA
32 34
1
RFFE5_BB_TO_ANT_DATA
2
RFFE5_BB_TO_ANT_DATA_CONN
01005
6.8V-100PF 01005
C
CODEC_TO_HPHONE_HS3_REF_CONN
0201
1
ROOM=DOCK_B2B
C4650
10% 25V 2 X5R 0201
FL4624
120-OHM-210MA
DZ4603
6.8V-100PF 01005
34
1
BB_LAT_GPIO1
ROOM=DOCK_B2B
2
BB_LAT_GPIO1_CONN
01005
2 ROOM=DOCK_B2B
41
42
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
43
44
SPEAKERAMP_TO_SPEAKER_OUT_NEG SPEAKER_TO_SPEAKERAMP_VSENSE_CONN_N ARC_DRIVER_TO_SOLENOID_OUT_NEG SOLENOID_TO_ARC_DRIVER_VSENSE_CONN_N CODEC_TO_HPHONE_LEFT_CONN CODEC_TO_HPHONE_RIGHT_CONN CODEC_TO_HPHONE_HS3_CONN CODEC_TO_HPHONE_HS4_CONN LOWERMIC1_TO_CODEC_AIN1_CONN_P PP_TRISTAR_ACC1_CONN TRISTAR_DP1_CONN_P TRISTAR_DP1_CONN_N TRISTAR_DP2_CONN_N TRISTAR_DP2_CONN_P PP_TRISTAR_ACC2_CONN LOWERMIC4_TO_CODEC_AIN2_CONN_N LOWERMIC4_TO_CODEC_BIAS_FILT_RET
D 26 32 32 27 32 32 32 32
32 32 32 32
3 31 3 31
3 31 3 31 32 32 25
C4651
1
0.1UF
10% 25V 2 X5R 0201
ROOM=DOCK_B2B
C4652
1
0.1UF
10% 25V 2 X5R 0201
ROOM=DOCK_B2B
C4653
1
56PF
5% 25V NP0-C0G-CERM 2 01005 ROOM=DOCK_B2B
C4654
1
46
100PF
5% 35V NP0-C0G 2 01005
C
ROOM=DOCK_B2B
32
C4624
1
ROOM=DOCK_B2B
NO_XNET_CONNECTION=1
1
0.1UF
ROOM=DOCK_B2B 32
PP5V0_USB
ROOM=DOCK_B2B
VOLTAGE=5.0V
5% 16V 2 NP0-C0G 01005
NO_XNET_CONNECTION=1
2
32
31 17 3
56PF
ROOM=DOCK_B2B
600-OHM-25%-0.28A-0.75OHM 1
C4623
1
ROOM=DOCK_B2B
FL4603
CODEC_TO_HPHONE_HS3_REF
C4622
1
220PF
DZ4602
2
32
56PF
CODEC_TO_HPHONE_HS4_REF_CONN
0201
RFFE5_BB_TO_ANT_SCLK_CONN
ROOM=DOCK_B2B
600-OHM-25%-0.28A-0.75OHM 2
2 01005
2 ROOM=DOCK_B2B NO_XNET_CONNECTION=1
24
32
VOLTAGE=1.8V
C4621
1
ROOM=DOCK_B2B
FL4601
CODEC_TO_HPHONE_HS4_REF
32
120-OHM-210MA CODEC_TO_HPHONE_HS3_CONN
SPEAKERAMP_TO_SPEAKER_OUT_POS SPEAKER_TO_SPEAKERAMP_VSENSE_CONN_P 32 ARC_DRIVER_TO_SOLENOID_OUT_POS 27 SOLENOID_TO_ARC_DRIVER_VSENSE_CONN_P 32 HPHONE_TO_CODEC_DETECT_CONN 32 AP_TO_HPHONE_HS3_CTRL_CONN 32 AP_TO_HPHONE_HS4_CTRL_CONN 32 CODEC_TO_HPHONE_HS3_REF_CONN 32 CODEC_TO_HPHONE_HS4_REF_CONN 32 LOWERMIC1_TO_CODEC_AIN1_CONN_N 32 PP_CODEC_TO_LOWERMIC1_BIAS_CONN 32 RFFE5_BB_TO_ANT_DATA_CONN 32 TRISTAR_CON_DETECT_CONN_L 32 LOWERMIC1_TO_CODEC_BIAS_FILT_RET 25 PP1V8_LAT_CONN 32 RFFE5_BB_TO_ANT_SCLK_CONN 32 BB_LAT_GPIO1_CONN 32 PP3V0_LAT_CONN 32 LOWERMIC4_TO_CODEC_AIN2_CONN_P 32 PP_CODEC_TO_LOWERMIC4_BIAS_CONN 32
32 26
ROOM=DOCK_B2B
ROOM=DOCK_B2B
ROOM=DOCK_B2B
24
5% 16V NP0-C0G 01005
2
01005
1
45
100PF
5% 2 16V NP0-C0G 01005
2
1
F-ST-SM
32
VOLTAGE=3.0V
C4620
1
ROOM=DOCK_B2B
0201
CODEC_TO_HPHONE_HS4
PP3V0_LAT_CONN
01005
FERR-33-OHM-0.8A-0.09-OHM
24
1
C4600
FL4600
24
J4600
24-5859-040-XXX-829
56PF
ROOM=DOCK_B2B
CODEC_TO_HPHONE_HS3
CRITICAL
120-OHM-210MA
R4600 HPHONE_TO_CODEC_DETECT
1
56PF
5% 2 16V NP0-C0G 01005
FL4604
FERR-33-OHM-0.8A-0.09-OHM 1 2 CODEC_TO_HPHONE_L
24
CODEC_TO_HPHONE_LEFT_CONN
0201
1
ROOM=DOCK_B2B
DZ4604
1
6.8V-100PF 01005
2
ROOM=DOCK_B2B NO_XNET_CONNECTION=1
32
FL4610
C4697
10% 2 10V X7R-CERM 01005
CODEC_TO_HPHONE_RIGHT_CONN
0201
1
DZ4610
1
6.8V-100PF 01005
2 ROOM=DOCK_B2B NO_XNET_CONNECTION=1
FL4606 01005
1
SPEAKER_TO_SPEAKERAMP_VSENSE_CONN_P
01005
1
FL4631
10% 2 10V X7R-CERM 01005
1
LOWERMIC1_TO_CODEC_AIN1_N
1
25
PP_CODEC_TO_LOWERMIC1_BIAS
ROOM=DOCK_B2B
1
C4607
32 26
FL4613
24
LOWERMIC4_TO_CODEC_AIN2_P
5% 16V NP0-C0G 01005
2
ARC
TRISTAR
27
FL4614
TRISTAR_CON_DETECT_CONN_L
1
31 3
PP_TRISTAR_ACC1
1
A
01005
C4640
FL4633
SOLENOID_TO_ARC_DRIVER_VSENSE_N
2
1 01005
PP_TRISTAR_ACC1_CONN
C4641
FL4642
31 3
PP_TRISTAR_ACC2
1 01005 ROOM=DOCK_B2B
32 27
C4642
PP_CODEC_TO_LOWERMIC4_BIAS_CONN
32
C4614
1
1
C4615
VOLTAGE=2.86V
100PF
SOLENOID_TO_ARC_DRIVER_VSENSE_CONN_N 1
ROOM=DOCK_B2B
5% 2 16V NP0-C0G 01005
32
ROOM=DOCK_B2B
C4633
2
32
VOLTAGE=4.3V
5% 16V NP0-C0G 01005
I/O:DOCK FLEX B2B
C4636
DRAWING NUMBER
5% 16V NP0-C0G 01005
Apple Inc.
C4637 100PF
ROOM=DOCK_B2B
2
051-00094 REVISION
4.0.0
R
ARC_DRIVER_TO_SOLENOID_OUT_NEG 1
SYNC_DATE=05/29/2014
PAGE TITLE
ROOM=DOCK_B2B 32 27
A
SYNC_MASTER=N71_SINGLE_BRD
100PF
100PF
2
2 ROOM=DOCK_B2B
ARC_DRIVER_TO_SOLENOID_OUT_POS 1
PP_TRISTAR_ACC2_CONN 1
PP_CODEC_TO_LOWERMIC4_BIAS
01005
ROOM=DOCK_B2B
ROOM=DOCK_B2B
2
25
5% 2 16V NP0-C0G 01005
VOLTAGE=4.3V
5% 16V NP0-C0G 01005
10-OHM-1.1A
32
100PF
32
100PF
2
LOWERMIC4_TO_CODEC_AIN2_CONN_N 5% 2 16V NP0-C0G 01005
120-OHM-210MA
120-OHM-210MA 27
1
FL4615
C4632 ROOM=DOCK_B2B
ROOM=DOCK_B2B
1
ROOM=DOCK_B2B
1
32
5% 2 16V NP0-C0G 01005
ROOM=DOCK_B2B
2
SOLENOID_TO_ARC_DRIVER_VSENSE_CONN_P 100PF
5% 2 16V NP0-C0G 01005
10-OHM-1.1A
2
56PF
1
32
27PF
FL4641
LOWERMIC4_TO_CODEC_AIN2_N
ROOM=DOCK_B2B
01005
R46401
ROOM=DOCK_B2B
120-OHM-210MA 2
C4613
5% 2 16V NP0-C0G 01005
01005
ROOM=DOCK_B2B
ROOM=DOCK_B2B
1
5% 16V NP0-C0G 01005
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
46 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
ROOM=DOCK_B2B
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
32 OF 60
IV ALL RIGHTS RESERVED
8
7
32
120-OHM-210MA
FL4632
SOLENOID_TO_ARC_DRIVER_VSENSE_P
LOWERMIC4_TO_CODEC_AIN2_CONN_P
1
56PF
24
1
2
C4635 ROOM=DOCK_B2B
1.00K 01005
ROOM=DOCK_B2B
100PF
ROOM=DOCK_B2B
B
5% 2 16V NP0-C0G 01005
ROOM=DOCK_B2B
5% 16V 2 NP0-C0G 01005
C4612
120-OHM-210MA
SPEAKERAMP_TO_SPEAKER_OUT_NEG 1
32
VOLTAGE=2.86V
100PF
01005
100PF
1/32W 2 5% MF
1
ROOM=DOCK_B2B
5% 16V NP0-C0G 2 01005 ROOM=DOCK_B2B
32
PP_CODEC_TO_LOWERMIC1_BIAS_CONN
1 01005
100PF
01005
TRISTAR_CON_DETECT_L
2
C4634
1
AP_TO_HPHONE_HS4_CTRL_CONN
C4611 ROOM=DOCK_B2B
120-OHM-210MA
SPEAKERAMP_TO_SPEAKER_OUT_POS
120-OHM-210MA
32
5% 2 16V NP0-C0G 01005
FL4612
C4631 ROOM=DOCK_B2B
2
1
32
5% 16V 2 NP0-C0G 01005 32 26
LOWERMIC1_TO_CODEC_AIN1_CONN_N
1 ROOM=DOCK_B2B
100PF
C4606
FL4607
31 3
2 01005
SPEAKER_TO_SPEAKERAMP_VSENSE_CONN_N
ROOM=DOCK_B2B
32
ROOM=DOCK_B2B
1
ROOM=DOCK_B2B
56PF
01005
5% 2 16V NP0-C0G 01005
AP_TO_HP_HS4_CTRL
24
ROOM=DOCK_B2B
2
C4610
120-OHM-210MA
120-OHM-210MA SPEAKER_TO_SPEAKERAMP_VSENSE_N
32
5% 2 16V NP0-C0G 01005
FL4611
C4630
5% 2 16V NP0-C0G 01005
100PF
8
1
32
100PF
220PF
LOWERMIC1_TO_CODEC_AIN1_CONN_P 56PF
C4696
AP_TO_HPHONE_HS3_CTRL_CONN 1
B
1 ROOM=DOCK_B2B
ROOM=DOCK_B2B
26
2 ROOM=DOCK_B2B
2 01005
2
SPEAKER_TO_SPEAKERAMP_VSENSE_P
32
120-OHM-210MA 1
LOWERMIC1_TO_CODEC_AIN1_P
FL4630
26
ROOM=DOCK_B2B
AP_TO_HP_HS3_CTRL
24
120-OHM-210MA
FERR-33-OHM-0.8A-0.09-OHM 1 2 CODEC_TO_HPHONE_R
8
120-OHM-210MA
SPEAKER
220PF
FL4605
24
LOWER MIC1/4
ROOM=DOCK_B2B
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
BUTTON FLEX RIGHT BUTTON FLEX CONNECTOR
D
D
MLB: 516S00047 (RCPT) FLEX: 516S00046 (PLUG) CRITICAL
FL4700
120-OHM-210MA 25
PP_CODEC_TO_REARMIC2_BIAS
2
ROOM=BUTTON_B2B
1
PP_CODEC_TO_REARMIC2_BIAS_CONN VOLTAGE=2.86V
01005
ROOM=BUTTON_B2B
1
J4700
33
BM28P0.6-10DS-0.35V
C4700
F-ST-SM
100PF
5% 16V 2 NP0-C0G 01005 ROOM=BUTTON_B2B
FL4701
MIC2 ANC REF MIC
120-OHM-210MA REARMIC2_TO_CODEC_AIN3_P
2
1
REARMIC2_TO_CODEC_AIN3_CONN_P
33
11
12
PP_LED_DRIVER_COOL_LED
1 3 5 7 9
2 4 6 8 10
BUTTON_HOLD_KEY_CONN_L REARMIC2_TO_CODEC_AIN3_CONN_P REARMIC2_TO_CODEC_AIN3_CONN_N PP_CODEC_TO_REARMIC2_BIAS_CONN LED_MODULE_NTC_CONN
13
14
PP_LED_DRIVER_WARM_LED
22 33
33 33 33 33 33
01005
ROOM=BUTTON_B2B
1
C4701
22 33
56PF
5% 2 16V NP0-C0G 01005 ROOM=BUTTON_B2B
FL4702
120-OHM-210MA 24
REARMIC2_TO_CODEC_AIN3_N
2
1
REARMIC2_TO_CODEC_AIN3_CONN_N
01005
ROOM=BUTTON_B2B
1
C
LEFT BUTTON FLEX CONNECTOR
33
MLB: 516S1317
C4702 56PF
C
CRITICAL
5% 16V 2 NP0-C0G 01005
ROOM=L_BUTTON_B2B
J4701
ROOM=BUTTON_B2B
505066-0610 F-ST-SM
NC NC
33
R4710 34 16 9 8
BUTTON_HOLD_KEY_L
1
C4710
BUTTON_HOLD_KEY_CONN_L
2
0% 1/32W MF 01005
1
27PF
5% 6.3V NP0-C0G 2 0201
0.00
C4711
2
BUTTON_RINGER_A_CONN
ROOM=L_BUTTON_B2B
33
1
2 01005
BUTTON_VOL_DOWN_CONN_L 1
ROOM=L_BUTTON_B2B
100PF
C4721
2
120-OHM-210MA
33
1
LED_MODULE_NTC
FL4713
A
ROOM=BUTTON_B2B
FL4720
ROOM=L_BUTTON_B2B
2
LED_MODULE_NTC_CONN
33
01005
R47201
120-OHM-210MA 2
ROOM=L_BUTTON_B2B
5% 2 16V NP0-C0G 01005
ROOM=BUTTON_B2B
33
C4722 27PF
5% 16V 2 NP0-C0G 01005
22
01005
1
DZ4712
NORTH_AC_GND_SCREW 4
1
1
100PF
ROOM=L_BUTTON_B2B
5% 16V NP0-C0G 2 01005
22 33
12V-33PF 01005-1
5% 16V 2 NP0-C0G 01005
100PF
ROOM=BUTTON_B2B
PP_LED_DRIVER_COOL_LED
STROBE: WARM LED COOL LED MODULE NTC
120-OHM-210MA
1
5% 16V 2 NP0-C0G 01005
ROOM=L_BUTTON_B2B
FL4712
C4713
27PF
0201
NORTH_AC_GND_SCREW 4
BUTTON_VOL_UP_L
B
C4724
1
1
ROOM=BUTTON_B2B
5.5V-6.2PF
BUTTONS: HOLD RINGER VOL UP/DOWN
34 16 8
33
22 33
5% 16V NP0-C0G 2 01005
1
2
1
10
C4723
33
DZ4711
ROOM=L_BUTTON_B2B
C4712
9
100PF
5% 6.3V 2 NP0-C0G 0201
BUTTON_VOL_DOWN_L
6
33
PP_LED_DRIVER_WARM_LED
27PF
34 16 8
5
BUTTON_VOL_DOWN_CONN_L BUTTON_VOL_UP_CONN_L
0201 ROOM=BUTTON_B2B
01005
1
4
5.5V-6.2PF
120-OHM-210MA 1
2
3
DZ4710
ROOM=BUTTON_B2B
2
BUTTON_RINGER_A
1
XW4701
FL4711 34 16 8
8
SHORT-10L-0.1MM-SM 1 2 LEFT_BTN_RTN
33
1
ROOM=BUTTON_B2B
B
BUTTON_RINGER_A_CONN
7
BUTTON_VOL_UP_CONN_L 1
51.1K
1% 1/32W MF 01005 2
33
DZ4713
ROOM=BUTTON_B2B
12V-33PF 01005-1
2 ROOM=L_BUTTON_B2B NORTH_AC_GND_SCREW 4
ROOM=BUTTON_B2B
1
C4720 100PF
5% 2 16V NP0-C0G 01005 ROOM=BUTTON_B2B
33
A
SYNC_MASTER=N71_SINGLE_BRD
ROOM=L_BUTTON_B2B
SYNC_DATE=05/29/2014
PAGE TITLE
I/O:BUTTON FLEX B2B DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
47 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
33 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
BASEBAND, WLAN, BT & STOCKHOLM SUBDESIGN_SUFFIX=RF
RADIO_MLB_MIMO SHARED POWER
D
28 27 26 25 23 22 17 15 14 4 45 29 37 32 31 28 19 15 39 32 31 28 25 16 15 14 12
PP_VCC_MAIN PP3V0_TRISTAR 8 PP1V8_SDRAM
BASEBAND
PCIE_AP_TO_BB_TXD_P PCIE_AP_TO_BB_TXD_N
39 6 39 6
39 6
39 6
39 6 39 6 39 16 39 8
39 8 39 8 39 8 39 8
39 16 44 8
43 8 39 28 22 39 8 39 8 39 8 43 8 39 30 9 8 39 9 39 9
42 31 42 31 44 16
42 13 9 39 9
36 32 36 32 43 32
PCIE_AP_TO_BB_RESET_L PCIE_BB_BI_AP_CLKREQ_L BB_TO_PMU_PCIE_HOST_WAKE_L AP_TO_BB_PCIE_DEV_WAKE
PCIE0_AP_TO_BB_PERST_L PCIE0_AP_TO_BB_CLKREQ_L PCIE0_BB_TO_PMU_HOST_WAKE_L PCIE0_AP_TO_BB_DEV_WAKE
I2S_AP_TO_BB_LRCLK I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_DOUT I2S_BB_TO_AP_DIN
I2S_AP_TO_BB_WS I2S_AP_TO_BB_CLK I2S_AP_TO_BB_TX I2S_BB_TO_AP_TX AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L AP_TO_BB_RST_L
BB_TO_AP_RESET_DETECT_L BB_TO_LED_DRIVER_GSM_BURST_IND AP_TO_BB_MESA_ON_L BB_TO_AP_GPS_TIME_MARK AP_TO_BB_COREDUMP BB_IPC_GPIO LCM_TO_OWL_BSYNC UART_OWL_TO_BB_TXD UART_BB_TO_OWL_RXD
BB_TO_AP_RESET_DET_L BB_TO_AP_GSM_TXBURST_IND
USB_BB_DATA_P USB_BB_DATA_N PMU_TO_BB_USB_VBUS_DETECT
USB_BB_P USB_BB_N USB_BB_VBUS_DETECT
SWD_AP_PERIPHERAL_SWCLK SWD_AP_BI_BB_SWDIO RFFE5_BB_TO_ANT_SCLK RFFE5_BB_TO_ANT_DATA BB_LAT_GPIO1
45 16 45 16 45 16
PCIE_AP_TO_WLAN_TX_P PCIE_AP_TO_WLAN_TX_N PCIE_WLAN_TO_AP_TX_P PCIE_WLAN_TO_AP_TX_N PCIE_AP_TO_WLAN_REFCLK_P PCIE_AP_TO_WLAN_REFCLK_N PCIE_AP_TO_WLAN_PERST_L
PCIE_AP_TO_WLAN_DEV_WAKE PCIE_WLAN_TO_AP_CLKREQ_L UART4_AP_TO_WLAN_TX UART4_AP_TO_WLAN_RTS_L UART4_WLAN_TO_AP_TX UART4_WLAN_TO_AP_RTS_L PMU_TO_WLAN_32K_CLK PMU_TO_WLAN_REG_ON WLAN_TO_PMU_HOST_WAKE
AP_TO_BB_MESA_ON_L
BB_TO_AP_GPS_TIME_MARK AP_TO_BB_COREDUMP_TRIG AP_TO_BB_IPC_GPIO
OWL_TO_WLAN_CONTEXT_A OWL_TO_WLAN_CONTEXT_B
UART0_OWL_TO_BB_TX UART0_BB_TO_OWL_TX
75_RFFE5_SCLK_BB 75_RFFE5_SDATA_BB RFFE_BUFFER_LAT_GPIO1 BB_TO_PMU_AMUX_LDO11_SIM1 BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3 BB_TO_PMU_AMUX_SMPS4
PCIE_WLAN_TO_AP_RXD_P PCIE_WLAN_TO_AP_RXD_N
6 59
PCIE_AP_TO_WLAN_REFCLK_P PCIE_AP_TO_WLAN_REFCLK_N
6 59
PCIE_AP_TO_WLAN_RESET_L PCIE_AP_TO_WLAN_DEV_WAKE PCIE_WLAN_TO_AP_CLKREQ_L UART_AP_TO_WLAN_TXD UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_WLAN_TO_AP_CTS_L PMU_TO_WLAN_CLK32K PMU_TO_WLAN_REG_ON WLAN_TO_PMU_HOST_WAKE OWL_TO_WLAN_CONTEXT_A OWL_TO_WLAN_CONTEXT_B
I2S_AP_TO_BT_LRCK I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DOUT
I2S_AP_TO_BT_LRCLK I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN
UART1_AP_TO_BT_TX UART1_AP_TO_BT_RTS_L UART1_BT_TO_AP_TX UART1_BT_TO_AP_RTS_L
UART_AP_TO_BT_TXD UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_BT_TO_AP_CTS_L
PMU_TO_BT_REG_ON BT_TO_PMU_HOST_WAKE AP_TO_BT_WAKE
6 59
6 59
6 59
6 59
8 59 6 59
8 59 8 59 8 59 8 59
C
16 59 16 59 16 59
9 59 9 59
STOCKHOLM_ANT
PMU_TO_BT_REG_ON BT_TO_PMU_HOST_WAKE AP_TO_BT_WAKE
8 59 8 59 8 59 8 59
8 59 8 59 8 59 8 59
16 59 16 59 8 59
B
STOCKHOLM
PMU_TO_STOCKHOLM_EN
AP_TO_STOCKHOLM_ANT
6 59
BLUETOOTH
UART3_AP_TO_STOCKHOLM_TXD UART3_AP_TO_STOCKHOLM_RTS_L UART3_STOCKHOLM_TO_AP_TXD UART3_STOCKHOLM_TO_AP_RTS_L
ANT
60 4
PCIE_AP_TO_WLAN_TXD_P PCIE_AP_TO_WLAN_TXD_N
TOUCH_TO_BBPMU_FORCE_PWM
SWD_CLK_BB_JTAG_TCK SWD_IO_BB_JTAG_TMS
BB_TO_PMU_AMUX_LDO11_SIM1 BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3 BB_TO_PMU_AMUX_SMPS4
45 16
B
PCIE0_AP_TO_BB_REFCLK_P PCIE0_AP_TO_BB_REFCLK_N
AP_TO_BB_RADIO_ON_L PMU_TO_BB_PMIC_RESET_L AP_TO_BB_RESET_L
44 8
C
PCIE0_BB_TO_AP_TX_P PCIE0_BB_TO_AP_TX_N
PCIE_AP_TO_BB_REFCLK_P PCIE_AP_TO_BB_REFCLK_N
39 6
WLAN
PCIE0_AP_TO_BB_TX_P PCIE0_AP_TO_BB_TX_N
PCIE_BB_TO_AP_RXD_P PCIE_BB_TO_AP_RXD_N
39 6
D
PP_VCC_MAIN PP3V0_TRISTAR PP1V8_SDRAM
STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_DEV_WAKE AP_TO_STOCKHOLM_FW_DWLD_REQ
UART_AP_TO_STOCKHOLM_TXD UART_AP_TO_STOCKHOLM_RTS_L UART_STOCKHOLM_TO_AP_RXD UART_STOCKHOLM_TO_AP_CTS_L PMU_TO_STOCKHOLM_EN STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_DEV_WAKE AP_TO_STOCKHOLM_DWLD_REQUEST
8 39 8 39 8 39 8 39
16 60 16 60 8 60 7 60
AP DEBUG
PP1V8 DFU_STATUS 3 FORCE_DFU
21 20 17 14 13 12 9 8 7 6 5 3 39 30 8 3 39 8
PP1V8 DFU_STATUS FORCE_DFU
PMU_TO_SYSTEM_COLD_RESET_L 8 I2C0_AP_SCL 8 I2C0_AP_SDA 8 I2C1_AP_SCL 8 I2C1_AP_SDA 8 BUTTON_HOLD_KEY_L 8 BUTTON_MENU_KEY_L 8 BUTTON_RINGER_A 8 BUTTON_VOL_DOWN_L 8 BUTTON_VOL_UP_L NC_PMU_GPIO20 NC_PMU_GPIO21 NC_OWL_FUNC2
PMU_TO_SYSTEM_COLD_RESET_L
16 9 5 3 39 28 16 39 28 16 39 31 27 26 17 39 31 27 26 17 39 33 16 9 39 29 16 9
A
39 33 16 39 33 16 39 33 16
31 31
NC_AP_RESERVED2 8 UART_AP_DEBUG_RXD 8 UART_AP_DEBUG_TXD NC_PMU_AMUX_AY NC_PMU_AMUX_BY
I2C0_AP_SCL I2C0_AP_SDA I2C1_AP_SCL I2C1_AP_SDA BUTTON_HOLD_KEY_L BUTTON_MENU_KEY_L BUTTON_RINGER_A
A
BUTTON_VOL_DOWN_L PAGE TITLE
BUTTON_VOL_UP_L NO_TEST
PMU_GPIO20
NO_TEST
PMU_GPIO21
NO_TEST
OWL_FUNC2
NO_TEST
AP_RESERVED2
BASEBAND:RADIO SYMBOL DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
AP_RESERVED1 AP_RESERVED0
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
NO_TEST
PMU_AMUX_AY
NO_TEST
PMU_AMUX_BY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
49 OF 49
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
34 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
1
REV
ECN
CK APPD
DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
4
N66 RADIO_MLB_MIMO - EVT_MD MARCH 26, 2015
D
ROW HB PAD MATCHING BOM OPTIONS PART#
QTY
DESCRIPTION
0003980769
ENGINEERING RELEASED
2015-03-27
D
RF2 HB PAD MATCHING BOM OPTIONS TABLE_5_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
152S1907
1
3.3NH, INDUCTOR
L4105_RF
ROW
152S2007
1
8.2NH, INDUCTOR
L4401_RF
ROW
131S0426
1
22PF, CAPACITOR
C4405_RF
ROW
152S2042
1
1.8NH, INDUCTOR
C4406_RF
ROW
131S0425
1
0.5PF, CAPACITOR
L4407_RF
ROW
152S2041
1
10.0NH, INDUCTOR
L4403_RF
ROW
131S00071
1
33PF, CAPACITOR
C4407_RF
ROW
152S00143
1
15NH, INDUCTOR
L4404_RF
ROW
131S00071
1
33PF, CAPACITOR
C4408_RF
ROW
117S0108
1
51 OHM, RESISTOR
L4410_RF
ROW
131S0599
1
1.5PF, CAPACITOR
C3921_RF
ROW
152S00052
1
3.4NH, INDUCTOR
L3910_RF
ROW
117S0201
1
0 OHM, RESISTOR
L3911_RF
ROW
152S2039
1
3.8NH, INDUCTOR
L3919_RF
ROW
131S0414
1
5.0PF, CAPACITOR
C4410_RF
ROW
TABLE_5_ITEM
152S1990
1
3.0NH, INDUCTOR
L4105_RF
RF2
131S0377
1
1.2PF, CAPACITOR
C4108_RF
RF2
131S0631
1
0.3PF, CAPACITOR
L4401_RF
RF2
152S2042
1
1.8NH, INDUCTOR
C4405_RF
RF2
152S2042
1
1.8NH, INDUCTOR
C4406_RF
RF2
131S0631
1
0.3PF, CAPACITOR
L4407_RF
RF2
131S00001
1
0.1PF, CAPACITOR
L4403_RF
RF2
152S2051
1
1.3NH, INDUCTOR
C4407_RF
RF2
152S2051
1
1.3NH, INDUCTOR
C4408_RF
RF2
131S0805
1
100PF, CAPACITOR
C4409_RF
RF2
131S0431
1
0.2PF, CAPACITOR
L4410_RF
RF2
131S0381
1
1.6PF, CAPACITOR
C3921_RF
RF2
152S00027
1
3.7NH, INDUCTOR
L3910_RF
RF2
117S0201
1
0 OHM, RESISTOR
L3911_RF
RF2
152S2045
1
3.0NH, INDUCTOR
L3919_RF
RF2
152S00052
1
3.4NH, INDUCTOR
L3912_RF
RF2
TABLE_5_ITEM
PDF PAGE 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
C
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
B
TABLE_TABLEOFCONTENTS_ITEM
CSA PAGE 2 3 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
CONTENTS ELNA & UAT ANT FEED FE: ANT CONNECTORS AND UAT TUNER DEBUG CONN & TEST POINTS CELLULAR BASEBAND: POWER1 CELLULAR BASEBAND: POWER2 CELLULAR BASEBAND: CONTROL AND INTERFACES CELLULAR BASEBAND: GPIOS CELLULAR PMU: CONTROL AND CLOCKS CELLULAR PMU: SWITCHERS AND LDOS CELLULAR PMU: ET MODULATOR CELLULAR TRANSCEIVER: POWER CELLULAR TRANSCEIVER: PRX PORTS CELLULAR TRANSCEIVER: DRX/GPS PORTS CELLULAR TRANSCEIVER: TX PORTS CELLULAR FRONT END: LB PAD CELLULAR FRONT END: MB PAD CELLULAR FRONT END: HB PAD CELLULAR FRONT END: 2G PA CELLULAR FRONT END: LB ASM CELLULAR FRONT END: MB-HB ASM CELLULAR FRONT END: DIVERSITY SIM WIFI/BT: WIFI/BT MODULE STOCKHOLM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
RFC HB PAD MATCHING BOM OPTIONS
TABLE_5_ITEM
131S0599
1
1.5PF, CAPACITOR
C3922_RF
RF2
131S0630
1
27PF, CAPACITOR
C3911_RF
RF2
131S0414
1
5.0PF, CAPACITOR
C4410_RF
RF2
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
TABLE_5_ITEM
152S1907
1
3.3NH, INDUCTOR
L4105_RF
RFC
152S2007
1
8.2NH, INDUCTOR
L4401_RF
RFC
131S0426
1
22PF, CAPACITOR
C4405_RF
RFC
152S2042
1
1.8NH, INDUCTOR
C4406_RF
RFC
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
RF2 LB PAD MATCHING BOM OPTIONS
TABLE_5_ITEM
131S0425
1
0.5PF, CAPACITOR
L4407_RF
RFC
152S2041
1
10.0NH, INDUCTOR
L4403_RF
RFC
131S00071
1
33PF, CAPACITOR
C4407_RF
RFC
152S00143
1
15NH, INDUCTOR
L4404_RF
RFC
131S00071
1
33PF, CAPACITOR
C4408_RF
RFC
117S0108
1
51 OHM, RESISTOR
L4410_RF
RFC
131S0599
1
1.5PF, CAPACITOR
C3921_RF
RFC
152S00052
1
3.4NH, INDUCTOR
L3910_RF
RFC
117S0201
1
0 OHM, RESISTOR
L3911_RF
RFC
152S2039
1
3.8NH, INDUCTOR
L3919_RF
RFC
131S0414
1
5.0PF, CAPACITOR
C4410_RF
RFC
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
TABLE_5_ITEM
131S0551
1
1.2PF, CAPACITOR
L4203_RF
RF2
152S2004
1
3.3NH, INDUCTOR
C4205_RF
RF2
131S0551
1
1.2PF, CAPACITOR
L4204_RF
RF2
152S2020
1
3.6NH, INDUCTOR
C4206_RF
RF2
131S0551
1
1.2PF, CAPACITOR
L4205_RF
RF2
152S00202
1
4.0NH, INDUCTOR
C4207_RF
RF2
131S0336
1
1.3PF, CAPACITOR
L4206_RF
RF2
152S2022
1
4.3NH, INDUCTOR
C4208_RF
RF2
131S0555
1
1.0PF, CAPACITOR
L4207_RF
RF2
152S00052
1
3.4NH, INDUCTOR
C4209_RF
RF2
131S0551
1
1.2PF, CAPACITOR
L4209_RF
RF2
152S00158
1
4.1NH, INDUCTOR
C4211_RF
RF2
131S00070
1
1.3PF, CAPACITOR
L4210_RF
RF2
152S00180
1
4.2NH, INDUCTOR
C4212_RF
RF2
131S0560
1
1.1PF, CAPACITOR
L4211_RF
RF2
152S00027
1
3.7NH, INDUCTOR
C4213_RF
RF2
152S00202
1
4.0NH, INDUCTOR
L4201_RF
RF2
152S2045
1
3.0NH, INDUCTOR
R4201_RF
RF2
152S2056
1
5.6NH, INDUCTOR
L4202_RF
RF2
152S1996
1
15NH, INDUCTOR
C3913_RF
RF2
131S00074
1
30PF, CAPACITOR
L3902_RF
RF2
152S1995
1
12NH, INDUCTOR
C3902_RF
RF2
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
HB PAD
RFC LB PAD MATCHING BOM OPTIONS
ROW LB PAD MATCHING BOM OPTIONS
TABLE_5_HEAD
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
1
IC,PWR AMP,HB_PAD,TQS
UHBPA_RF
ROW
353S4494
1
IC,PWR AMP,HB_PAD,AVAGO
UHBPA_RF
RF2
353S00376
1
IC,PWR AMP,HB_PAD,TQS
UHBPA_RF
RFC
TABLE_5_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
353S00376
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
131S0555
1
1.0PF, CAPACITOR
L4203_RF
RFC
152S00158
1
4.1NH, INDUCTOR
C4205_RF
RFC
131S0425
1
0.5PF, CAPACITOR
L4204_RF
RFC
152S2053
1
4.7NH, INDUCTOR
C4206_RF
RFC
131S0555
1
1.0PF, CAPACITOR
L4205_RF
RFC
152S00027
1
3.7NH, INDUCTOR
C4207_RF
RFC
131S0557
1
0.7PF, CAPACITOR
L4206_RF
RFC
152S2001
1
2.4NH, INDUCTOR
C4208_RF
RFC
131S0351
1
0.4PF, CAPACITOR
L4207_RF
RFC
152S2002
1
2.7NH, INDUCTOR
C4209_RF
RFC
152S2002
1
2.7NH, INDUCTOR
C4211_RF
RFC
152S2056
1
5.6NH, INDUCTOR
C4212_RF
RFC
131S0340
1
2.0PF, CAPACITOR
L4219_RF
RFC
152S2021
1
1.5NH, INDUCTOR
C4213_RF
RFC
TABLE_5_ITEM
1
1.0PF, CAPACITOR
L4203_RF
ROW
152S00158
1
4.1NH, INDUCTOR
C4205_RF
ROW
131S0425
1
0.5PF, CAPACITOR
L4204_RF
ROW
152S2053
1
4.7NH, INDUCTOR
C4206_RF
ROW
131S0555
1
1.0PF, CAPACITOR
L4205_RF
ROW
152S00027
1
3.7NH, INDUCTOR
C4207_RF
ROW
131S0557
1
0.7PF, CAPACITOR
L4206_RF
ROW
152S2001
1
2.4NH, INDUCTOR
C4208_RF
ROW
131S0351
1
0.4PF, CAPACITOR
L4207_RF
ROW
152S2002
1
2.7NH, INDUCTOR
C4209_RF
ROW
152S2002
1
2.7NH, INDUCTOR
C4211_RF
ROW
152S2056
1
5.6NH, INDUCTOR
C4212_RF
ROW
131S0340
1
2.0PF, CAPACITOR
L4219_RF
ROW
152S2021
1
1.5NH, INDUCTOR
C4213_RF
ROW
TABLE_5_ITEM
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
IC,PWR AMP,LB_PAD,SKWS
ULBPA_RF
TABLE_5_ITEM
TABLE_5_ITEM
1
IC,PWR AMP,LB_PAD,MURATA
ULBPA_RF
TABLE_5_ITEM
TABLE_5_ITEM
1
IC,PWR AMP,LB_PAD,SKWS
ULBPA_RF
TABLE_5_ITEM
RFC TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
VINYL A
TABLE_5_ITEM
RF2 TABLE_5_ITEM
353S00461
TABLE_5_ITEM
ROW TABLE_5_ITEM
353S00056
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
1
TABLE_5_ITEM
BOM OPTION TABLE_5_ITEM
353S00461
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
DESCRIPTION
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
LB PAD
TABLE_5_ITEM
TABLE_5_ITEM
131S0555 TABLE_5_ITEM
TABLE_5_ITEM
PART#
B
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
PART#
C
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
A
TABLE_5_ITEM
TABLE_5_ITEM
337S00125
1
IC, VINYL
U5101_RF
ROW
TABLE_5_ITEM
TABLE_5_ITEM
DRAWING TITLE
SCHEM,MLB,N66
TABLE_5_ITEM
337S00125
1
IC, VINYL
U5101_RF
RF2
TABLE_5_ITEM
118S0724
1
0 OHM, RESISTOR
R4201_RF
RFC
TABLE_5_ITEM
118S0724
1
0 OHM, RESISTOR
R4201_RF
ROW
DRAWING NUMBER
TABLE_5_ITEM
131S0551
VINYL RESISTOR
1
1.2PF, CAPACITOR
L4601_RF
RFC
QTY
DESCRIPTION
131S0551
1
1.2PF, CAPACITOR
L4601_RF
Apple Inc.
ROW
TABLE_5_ITEM
152S1342
1
15NH, INDUCTOR
L3902_RF
RFC
TABLE_5_HEAD
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
152S1342
1
15NH, INDUCTOR
L3902_RF
1
27PF, CAPACITOR
C3902_RF
RFC
TABLE_5_ITEM
131S0630
1
27PF, CAPACITOR
C3902_RF
ROW
TABLE_5_ITEM
117S0161
1
0 OHM, RESISTOR
R3402_RF
REVISION
4.0.0
R
ROW
TABLE_5_ITEM
131S0630
BOM OPTION
TABLE_5_ITEM
051-00094
RFC
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
1 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
35 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
N66-SPECIFIC RADIO PAGE 2
DIVERSITY LNA R4901_RF 43
39 37 34
IN
75_RFFE5_SCLK_BB
0
1
5% 1/20W 43
39 37 34
IN
75_RFFE5_SCLK_BB_UAT
2
MF 201
R4902_RF
RADIO_DRX_GPS_LNA
75_RFFE5_SDATA_BB
D IN
PP_1V8_LDO15
75_RFFE5_SDATA_BB_UAT
2
5% 1/20W
L4903_RF
56 55 54 53 52 51 46 45 43 39 57
0
1
120NH-5%-40MA
RADIO_DRX_GPS_LNA
1
PP_1V8_LDO15_FILT
2
D
MF 201
0201 RADIO_DRX_GPS_LNA
L4904_RF 120NH-5%-40MA
57 56 55 45
IN
1
PP_2V8_LDO14
2
PP_2V8_LDO14_FILT
0201 RADIO_DRX_GPS_LNA
L4905_RF 120NH-5%-40MA 45
IN
1
PP_2V7_LDO12
2
PP_2V7_LDO12_FILT
0201 RADIO_DRX_GPS_LNA 1
1
C4910_RF
C4902_RF
1
0.1UF
100PF
1
0.1UF
20% 2 6.3V X5R-CERM 01005
5% 2 16V NP0-C0G 01005 RADIO_DRX_GPS_LNA
C4903_RF
0.1UF
20% 6.3V 2 X5R-CERM 01005
RADIO_DRX_GPS_LNA
C4904_RF
20% 2 6.3V X5R-CERM 01005
RADIO_DRX_GPS_LNA
RADIO_DRX_GPS_LNA
C4907_RF
10
50_GPS_LNA_IN
11
2
9
1
50_GPS_LNA_IN_MATCH
3
2
12
2.7NH+/-0.1NH-0.370A
C
L4909_RF
L4910_RF
10NH-3%-140MA
10NH-3%-140MA
01005 RADIO_DRX_GPS_LNA NOSTUFF
01005 RADIO_DRX_GPS_LNA NOSTUFF
2
2
SCLK
C
VOX3-MODULE 27
GPS_IN
23
DRX_HB_ANT
25
DRX_MB_ANT
1.0NH+/-0.1NH-0.580A
LGA RADIO_DRX_GPS_LNA
GPS_OUT 2
50_DRX_GPS_LNA_OUT
DRX_OUT 14
50_MB-HB_UAT_COAX_UPPER
OUT
49
2 50_HB_DRX_LNA_IN
1
50_HB_DRX_LNA_MATCH_IN
SDATA
U_VOX_RF
C4901_RF
2
VIO
1
VDD_DRX
RADIO_DRX_GPS_LNA
1
VDD_GPS
01005
01005
RADIO_DRX_GPS_LNA 1
L4907_RF
BI
+/-0.05PF 2 16V C0G-CERM 01005
27PF
1
50_MB_DRX_LNA_MATCH_IN
2 50_MB_DRX_LNA_IN
2% 16V CERM 01005 RADIO_DRX_GPS_LNA
1 4 5 6 7 8 13 15 16 17 18 19 20 21 22 24 26 28
2
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
RADIO_DRX_GPS_LNA
C4905_RF
37
THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD
0.5PF
1
L4906_RF 7.5NH+/-3%-0.2A 01005 RADIO_DRX_GPS_LNA 2
UAT ANT FEED
B
B UAT COAX CONNECTOR
U_DPL_RF
DIPLEXER-CELL-WIFI 885072
L5414_RF
1.7NH-+/-0.1NH-0.8A-0.07OHM 59
BI
50_G_0_MATCH_MOD
2 50_DIPL_WIFI_IN
1 0201
2
1 RF3
50_LB_UAT_COAX_UPPER
BI
SMD2_RF1/SMD4_GND 7 2
6 SMD1_RF2
1
L5413_RF
2 3 5 8 10
2 50_DIPL_SMD1_RF2
1
50_MB_DRX_LNA_MATCH_IN
GND
3.7NH+/-0.1NH-0.5A
3.0NH+/-0.1NH-0.6A
0201
LMTP2HAA-G74
F-ST-SM
5 CELL_LOW 7 CELL_MID 10 GPS GND
C5007_RF
2
1.0NH-+/-0.05NH-1.1A-0.04OHM ANT 2
50_QUADPLEXER_CELL
2 50_UAT_TEST
1
1
0201
RADIO_DRX_GPS_LNA
3
11 9 8 6 4 3 1
L5415_RF
MM7829-2700
LGA
50_UAT_DIPLEXER_WIFI_LB
RF1 9
4 RF2
50_HB_DRX_LNA_MATCH_IN
37
LGA
J_UAT_RF
UTRIP_RF
2
50_GPS_LNA_IN_MATCH
1
0201
WIFI COAX CONNECTOR 2
L5411_RF
18NH+/-3%-0.250A
J5005_RF
0201
MM7829-2700
FL1_RF
50_DIPL_SMD_GND
NOSTUFF
F-ST-SM
LFD212G45MP2E013
2
2
LGA 1
4 P1
L5412_RF
P3 2 50_UAT_WIFI_TEST
6 P2
5.6NH-3%-0.23A-1.3OHM 01005
1 3
1 3 5
GND 2
A
A PAGE TITLE
ELNA & UAT ANT FEED DRAWING NUMBER
59
Apple Inc.
50_A_0_MATCH_MOD BI
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
2 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
36 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
N66-SPECIFIC RADIO PAGE 3 ANTENNA FEEDS AND CONNECTORS MM6829-2700B
MM6829-2700B
F-ST-SM
F-ST-SM
1
50_LB_UAT_COAX_UPPER
BI
D
36
L5408_RF
LOWER SIDE
TWO COAX CABLES
50_MB-HB_ASM_ANT2_COAX_LOW
UPPER SIDE
J5002_RF
J5004_RF
MM6829-2700B
MM6829-2700B
F-ST-SM
F-ST-SM
1
1
PAC2_VDD_3V0_FILTER
1
PP3V0_TRISTAR
2
5
0201 1
1
C5405_RF 33PF
50_MB-HB_UAT_COAX_UPPER
BI
10%
2 25V X5R-CERM
5% 2 16V NP0-C0G 01005
36
C5403_RF 0.01UF 0201
6
3 2
BI
120NH-5%-40MA
2 3
56
UAT TUNER
2 3
1
50_LB_ASM_ANT2_COAX_LOW
BI
J5003_RF
3 2
D
55
J5001_RF
VDD
LAT COAX CONNECTOR FLDIP_RF
DPX202690DT 0805
C
55
4
50_MB-HB_ASM_ANT1_LAT
BI
6
50_LB_ASM_ANT1_LAT
BI
2.8NH-+/-0.1NH-0.6A-0.12OHM COM 2
HI
50_LAT_DIPLEXER_ANT
1
2
50_LAT_TEST
9 5 2
MM4829-2702B
75_RFFE5_SCLK_BB
1
0
5% 1/20W
F-ST-SM
SCLK_FILT SDAT_FILT
MF 0201 1
1
5 SCLK 4 SDAT
C5401_RF
1 10 9 8
33PF
0201
LO
5% 2 16V NP0-C0G 01005
GND
L5407_RF
120NH-5%-40MA
RF1347
2
4 3 2
56
J_LAT_RF
C5006_RF
U5411_RF
R5401_RF
WLCSP
VIO 3
VIO_FILT
1
5
0201
RF1 RF2 RF3 RF4
1
1
10%
5% 2 16V NP0-C0G 01005
2 25V X5R-CERM
1 3 5
C
33PF
0.01UF
L5001_RF
C5404_RF
C5408_RF 0201
2
0.5PF
0.05PF 2 25V NP0-C0G 0201
R5402_RF 9 5 2
75_RFFE5_SDATA_BB
1
0
5% 1/20W
1
C5410_RF 1 C5411_RF 0.4PF
2
+/-0.05PF 2 25V C0G 201
MF 0201
1
11
RFGNDGNDA 7
1
RFFE_VIO_S2R
2
0.4PF
+/-0.05PF 2 25V C0G 201
C5402_RF 33PF
5% 2 16V NP0-C0G 01005
L5404_RF
C5407_RF
47NH-2%-0.58OHM
L_2B
1
TP3_RF
9PF
UAT_MID
2
0402
1
UAT
2
PROPEPOINT-1.34CIR SM 1 PP
+/-0.1PF 25V C0H-CERM 0201
L5403_RF 12NH-2%
L_2A
1
2 0402
L5402_RF 12NH-2%
L_1B
B
1
B
2 0402
L5401_RF
47NH-2%-0.58OHM
L_1A
1
2 0402
1
L5400_RF
8.2NH-1.5A-0.054OHM 0402
SIM CARD CONNECTOR 11 7 5 3
SIM CARD ESD PROTECTION
PP_UIM1_LDO11
1 R3004_RF
15.00K 1%
C3002_RF
2.2UF
20% 2 6.3V X5R-CERM 0201
9 5 3
VR301_RF ESD5004
SIM1_TRAY_DET
DZ302_RF
9
SIM_DETECT 8
SIM_DETECT_GND
SIM1_TRAY_DET
OUT
9 5
SIM1_IO 3
1
9 5 3
SIM1_RST
2
9 5 3
SIM1_CLK
3
5.5V-6.2PF
0201 37 39 43
2
A
LGA
1
1/32W MF 2 01005
1
43 39 37
IN
SIM1_CLK
3
CLK
J3001_RF
IO 7
SIM1_IO BI
2
RESET
F-RT-SM
SWP 6
4FF_SIM_SWP
BI
PAGE TITLE
CELLULAR FRONT END: ANTENNA CONNECTORS AND FEEDS
4
DRAWING NUMBER
37 39 60
PP_UIM1_LDO11
OMIT 1
4FF_SIM_SWP
11 7 5 3
VCC
1
GND
Apple Inc.
5
SIM1_RST
26 5 3
5 10 11 12 13 14 15 16
IN
A
37 39 43
RCPT-ITG-EJECT-N66 43 39 37
2
DZ301_RF
051-00094 REVISION
4.0.0
R
12V-33PF
01005-1 2 NOSTUFF
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
3 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
37 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
N66-SPECIFIC RADIO PAGE 4 D
D
WLAN LAT 2.4GHZ BAW BPF F5201_RF WLAN-BT-LTE
L5205_RF
25
50_G_1_MATCH_MOD
1
C5203_RF
DGLS96B LGA
0.4NH+/-0.1NH-320MA 50_G_1_BAW_TX_RX
2 01005
1 INPUT_UNBAL
OUTPUT_UNBAL 4
50_G_1_BAW_ANT
GND 1
2 3 5 6
1
3.6PF 1
2
50_G_1_DPLX 25
+/-0.1PF 16V NP0-C0G 01005
1
NO STUFF
L5202_RF
12NH-3%-0.140A 01005
L5204_RF
L5206_RF
6.8NH-3%-0.210A
4.0NH-+/-0.1NH-0.27A
01005
01005 2
2
2
C
C
B
B
A
A PAGE TITLE
WLAN LAT 2.4GHZ BAW BPF DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
38 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
AP TO BB/WLAN/BT/SH CONNECTIONS BASEBAND
D
IO
AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L AP_TO_BB_RST_L
10 10 5 10
9 5
BB_TO_AP_RESET_DET_L BB_TO_AP_GSM_TXBURST_IND AP_TO_BB_MESA_ON_L BB_TO_AP_GPS_TIME_MARK
9 5
AP_TO_BB_COREDUMP_TRIG
9 9 5 9 5
IN
10 5
SINGLE_NODENET
9 5
8 5
8 5
PCIE0_AP_TO_BB_TX_P
8 5
PCIE0_AP_TO_BB_TX_N
25
BT_TO_PMU_HOST_WAKE
25
AP_TO_BT_WAKE
C
9 5 9 5 9 5 9 5
9 5 9 5 9 5
OUT
25
UART1_AP_TO_BT_TX
25
UART1_BT_TO_AP_TX
8 10
IN
25
I2S_AP_TO_BT_LRCK
25
I2S_BT_TO_AP_DOUT
IN
9 5 3 2 5 3
11 11 11
B
PP1V8 FORCE_DFU DFU_STATUS PMU_AMUX_AY PMU_AMUX_BY PMU_TO_SYSTEM_COLD_RESET_L I2C0_AP_SDA I2C0_AP_SCL I2C1_AP_SDA I2C1_AP_SCL BUTTON_HOLD_KEY_L BUTTON_MENU_KEY_L BUTTON_VOL_DOWN_L BUTTON_VOL_UP_L BUTTON_RINGER_A PMU_GPIO20 PMU_GPIO21 OWL_FUNC2 AP_RESERVED0 AP_RESERVED1 AP_RESERVED2
5
5 5 5 5 5 5 5 5 5
SM
SM
PP
OMIT
OUT IN
25
UART4_AP_TO_WLAN_TX
25
UART4_WLAN_TO_AP_TX
IN
SM
OUT
PP
1
OMIT
5 8
PCIE0_BB_TO_AP_TX_P
SM
IN
PCIE_WLAN_TO_AP_CLKREQ_L
25
IN
PP OUT
PCIE_AP_TO_WLAN_PERST_L
25
PCIE_AP_TO_WLAN_DEV_WAKE
25 OUT
PCIE_AP_TO_WLAN_TX_P
25 OUT
PCIE_AP_TO_WLAN_TX_N
25
IN
IN IN
OUT
PCIE_WLAN_TO_AP_TX_P PCIE_WLAN_TO_AP_TX_N
25
IN
PP
SM
IN
PP
25
OWL_TO_WLAN_CONTEXT_B
SM PP
5 8
SM PP
5 8
OMIT
RADIO_DEBUG
OMIT
9 5 8 5 10 5
IN OUT
26
IN
26
IN
26
IN
26
IN
26 5
IO
26 5
IO
26 5
IO
26 5
SWD_IO_BB_JTAG_TMS
5 8
MAKE_BASE=TRUE
PP
AP_TO_BB_COREDUMP_TRIG
SM
OMIT STOCKHOLM_TO_BBPMU_CLK_REQ
SM PP
UART0_BB_TO_OWL_TX
PP_1V8_LDO15
2 9 11 12 17 18 19 20 21 22 23
RADIO_DEBUG
C
75_RFFE1_SDATA_BB
1
9 16
RADIO_DEBUG
75_RFFE4_SDATA_BB
1
OMIT
5 9
9 12
RADIO_DEBUG
PP3051_RF P2MM SM PP
UART0_OWL_TO_BB_TX
5 9
1
75_RFFE5_SCLK_BB_BUFFER
OMIT
RADIO_DEBUG
9
RADIO_DEBUG
PP3052_RF
P2MM-NSM SM 1 75_RFFE5_SDATA_BB_BUFFER PP
10 26
RADIO_DEBUG 1
1
PP3077_RF P2MM
RADIO_DEBUG 1
5
RADIO_DEBUG
OMIT
5 9
PP3020_RF P2MM-NSM
10 26
PP
9
OMIT
TOUCH_TO_BBPMU_FORCE_PWM
PP3053_RF P2MM SM
5 10
PP
RADIO_DEBUG
SIM2_RESET
1
2
75_RFFE2_SDATA_BB
1
9 17 18 19 20 21 22
RADIO_DEBUG
P2MM-NSM SM 1
3
4
5
6
7
8
9
10
OUT
11
12
IN
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
75_RFFE3_SDATA_BB
9 23
PP
OMIT
STOCKHOLM
B
PP3062_RF P2MM-NSM SM 1 PP
STOCKHOLM_DWPM_DBG
26
STOCKHOLM_DWPS_DBG
26
OMIT 1
OUT IN IN IN
ESD CAPS
C5101_RF 100PF
5% 2 16V NP0-C0G 01005
IN
1
C3503_RF 100PF
5% 2 16V NP0-C0G 01005
1
C3312_RF 100PF
5% 2 16V NP0-C0G 01005 RADIO_BB
1
C3408_RF 100PF
5% 2 16V NP0-C0G 01005 RADIO_BB
25 9
5 OUT
5 OUT
5 OUT
24 9 5 IO
24 9
ANT
25 9 9
IN
24 IN
IN
POWER PP1V8_SDRAM VOLTAGE=1.8V
SM
F-ST-SM
A 5
50_BBPMU_TO_STOCKHOLM_19P2M_CLK
PP1V8_SDRAM
PP3056_RF P2MM
RADIO_DEBUG
1
1
RFFE
5 9
AXE550124
5
PP_1V8_S2R_VDDIO_WLAN_BT VOLTAGE=1.8V PP_STOCKHOLM_1V8_S2R VOLTAGE=1.8V RFFE_VIO_S2R VOLTAGE=1.8V
PP
53
24 9 5
OUT
STOCKHOLM_ANT
SM
RADIO_DEBUG
OMIT
J3000_RF
OUT
26
5 9
NOSTUFF
OUT
IN
BB_TO_AP_GPS_TIME_MARK
OMIT
PCIE0_AP_TO_BB_PERST_L BB_JTAG_SRST_L PMU_TO_BBPMU_RESET_L
5
IO
PP
PP3016_RF P2MM-NSM
8 10
RADIO_DEBUG
1
SM
DEBUG CONNECTOR
RADIO_DEBUG
IO
IO
50_MDM_PCIE_CLK
51
IN
AP_TO_STOCKHOLM_SIM_SEL STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_FW_DWLD_REQ PMU_TO_STOCKHOLM_EN AP_TO_STOCKHOLM_DEV_WAKE UART3_AP_TO_STOCKHOLM_TXD UART3_STOCKHOLM_TO_AP_TXD UART3_AP_TO_STOCKHOLM_RTS_L UART3_STOCKHOLM_TO_AP_RTS_L
OMIT
3 5
PP3005_RF P2MM
RADIO_DEBUG 1
PP3V0_TRISTAR
PP3054_RF
OUT
PP1V8_SDRAM
9
1
OMIT
RADIO_DEBUG
1
RADIO_DEBUG
OMIT
PP
OUT
5
5 9
PP3091_RF
OUT
STOCKHOLM
AP_TO_BB_MESA_ON_L
PP3007_RF P2MM
BB_JTAG_SRST_L
P2MM-NSM SM 1
OUT
1
OMIT
RADIO_DEBUG
OMIT
IN
SM
OMIT
PP
IN
PP
PP3015_RF P2MM
PP3006_RF P2MM-NSM
P2MM-NSM SM 1
IN
5 8
PP3090_RF
OUT
PP
PP
P2MM-NSM SM 1
PCIE0_AP_TO_BB_TX_N
OMIT
OUT
SM
2 3 5 9
PP3004_RF P2MM-NSM SM
1
75_RFFE5_SCLK_BB
OMIT
PP3014_RF P2MM
PP3019_RF RADIO_DEBUG
1
5 9
P2MM-NSM SM 1 BB_TO_AP_GSM_TXBURST_IND PP RADIO_DEBUG OMIT
PP
SM
PP
RADIO_DEBUG
OMIT BB_DEBUG_ERROR
OMIT
PP3085_RF P2MM-NSM
OUT
OWL_TO_WLAN_CONTEXT_A
PP
PCIE0_AP_TO_BB_TX_P
1
OMIT
OUT
25
SM
RADIO_DEBUG
IN
I2S_BB_TO_AP_TX
OMIT
PP3018_RF P2MM
5 8
PP3084_RF P2MM-NSM
IN
PCIE_AP_TO_WLAN_REFCLK_N
25
PP
OMIT PCIE0_BB_TO_AP_TX_N
OMIT
IN
PCIE_AP_TO_WLAN_REFCLK_P
8 10
RADIO_DEBUG
PP
IN
OUT
SPMI_DATA
SM
1
PP3003_RF P2MM-NSM SM
1
2 3 5 9
RADIO_DEBUG
OMIT
PP3012_RF P2MM
P2MM-NSM SM 1
RADIO_DEBUG
1
PP 5 9
RADIO_DEBUG
OMIT
PP3017_RF
5 8
PP3083_RF P2MM
IN
PP
BASEBAND
5 8
RADIO_DEBUG
1
I2S_AP_TO_BB_TX
PP3013_RF
PCIE0_AP_TO_BB_REFCLK_N
OMIT
IN
IN
8 10
RADIO_DEBUG
PP3037_RF
PP3082_RF P2MM
OUT
UART4_AP_TO_WLAN_RTS_L
25
PP
SM
75_RFFE5_SDATA_BB
PP3002_RF P2MM-NSM SM
1
1
OMIT
PP3011_RF P2MM SPMI_CLK
PP
5 9
RADIO_DEBUG
OMIT
RADIO_DEBUG
OMIT SM
UART4_WLAN_TO_AP_RTS_L
25
IN
PP
8 10
PP3081_RF P2MM-NSM
IN OUT
1
SM
P2MM-NSM SM 1
PCIE0_AP_TO_BB_REFCLK_P
PP
PP3010_RF P2MM
XO_OUT_D0_EN
P2MM-NSM SM 1
I2S_AP_TO_BB_CLK
OMIT
RADIO_DEBUG
OMIT
PP3001_RF P2MM-NSM SM
1
PP
8 10
PP3036_RF 5 9
RADIO_DEBUG
SM
RADIO_DEBUG
1
ANT TUNER
5 9
PP3009_RF P2MM
50_SLEEP_CLK_32K
OMIT
PP3080_RF P2MM-NSM
IN
I2S_AP_TO_BT_DOUT
PP 5 9
RADIO_DEBUG
SM
OMIT
RADIO_DEBUG
1
I2S_AP_TO_BB_WS
1
PP
8 10
PP3034_RF P2MM
PCIE0_AP_TO_BB_DEV_WAKE
OMIT
OUT
IN
1
PP
SM
PMIC_RESOUT_L
OMIT
RADIO_DEBUG
PP
OUT
AP DEBUG 5
PP 5 9
PP3076_RF P2MM-NSM
OUT
BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3 BB_TO_PMU_AMUX_SMPS4 BB_TO_PMU_AMUX_LDO11_SIM1
11
SM
OMIT
IN
IN
RFFE_BUFFER_LAT_GPIO1 75_RFFE5_SDATA_BB 75_RFFE5_SCLK_BB PP3V0_TRISTAR
9 5 3 2
OUT
1
PP3033_RF P2MM
PCIE0_BB_TO_PMU_HOST_WAKE_L
OMIT
IN
I2S_AP_TO_BT_BCLK
25
25 9
1
PP
IN
UART1_BT_TO_AP_RTS_L
25
25
8 5
RADIO_DEBUG
SM
PP3008_RF P2MM
OMIT
PP3074_RF P2MM-NSM
OUT
IN
SWD_CLK_BB_JTAG_TCK SWD_IO_BB_JTAG_TMS
8
OUT
UART1_AP_TO_BT_RTS_L
25
IN
USB_BB_P USB_BB_N USB_BB_VBUS_DETECT
8
5 9
P2MM-NSM SM 1 PCIE0_AP_TO_BB_CLKREQ_L PP
IN
I2S_AP_TO_BB_WS I2S_AP_TO_BB_CLK I2S_AP_TO_BB_TX I2S_BB_TO_AP_TX
9 5
IN
IN
PCIE0_AP_TO_BB_PERST_L PCIE0_AP_TO_BB_CLKREQ_L PCIE0_BB_TO_PMU_HOST_WAKE_L PCIE0_AP_TO_BB_DEV_WAKE
PCIE0_AP_TO_BB_PERST_L
OMIT
IN
PCIE0_BB_TO_AP_TX_P PCIE0_BB_TO_AP_TX_N
8 5
PP
PP
PP3075_RF
25 8 5
1
SM
IN
OUT
PCIE0_AP_TO_BB_REFCLK_P PCIE0_AP_TO_BB_REFCLK_N
8 5
OUT IN
UART0_BB_TO_OWL_TX UART0_OWL_TO_BB_TX
9 5
25
IN
AP_TO_BB_IPC_GPIO TOUCH_TO_BBPMU_FORCE_PWM
9
OUT
PMU_TO_BT_REG_ON WLAN_TO_PMU_HOST_WAKE
25
SM
IN
D
PP3032_RF P2MM
PP3073_RF P2MM-NSM
PMU_TO_WLAN_REG_ON
25
IN
PMU
PCIE
PMU_TO_WLAN_32K_CLK
25
1
MLB PROBE POINTS
WLAN/BT
PP_VCC_MAIN
26 25 20 18 17 12 11
2
25 26
UART_WLAN_TO_BB_COEX_TX I2C0_AP_SDA I2C0_AP_SCL BUTTON_VOL_DOWN_L BUTTON_VOL_UP_L BUTTON_RINGER_A SIM2_RESET SIM2_DATA UART_BB_TO_WLAN_COEX_TX SIM2_DETECT SIM2_DATA_R
52
PP3063_RF P2MM-NSM SM 1 PP
OMIT SIM1_CLK SIM1_RST SIM1_IO PP_UIM1_LDO11 SIM1_TRAY_DET 4FF_SIM_SWP I2C1_AP_SDA I2C1_AP_SCL BUTTON_HOLD_KEY_L BUTTON_MENU_KEY_L PP1V8 FORCE_DFU SIM2_CLK PP_UIM2_LDO13
PP3064_RF
P2MM-NSM SM 1 UART3_AP_TO_STOCKHOLM_TXD PP
3 9 3 9
5 26
OMIT
3 9 3 7 11
PP3065_RF
P2MM-NSM SM 1 UART3_STOCKHOLM_TO_AP_TXD PP
3 9 3 26
5 26
OMIT
5 5
PP3066_RF
P2MM-NSM SM 1 UART3_AP_TO_STOCKHOLM_RTS_L PP
5 5
5 26
OMIT
5 5
PP3067_RF
P2MM-NSM SM 1 UART3_STOCKHOLM_TO_AP_RTS_L
9 24 7 11 24
5 26
PP
OMIT
A PAGE TITLE
DEBUG CONN & TEST POINTS DRAWING NUMBER
Apple Inc.
54
051-00094 REVISION
4.0.0
R
3
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
30 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
SHEET
39 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
BASEBAND: POWER 1 A1 A3 A14 A22 A24 B3 B14 B22 C3 E15 E17 E18 E24 F1 F8 F17 F18 G8 G9 G12 G13 G16 G17 G24 H1 H7 H8 H11 H12 H15 H16 H19 J5 J6 J7 J10 J11 J14 J15 J18 J19 J24 K6 K9 K10 K13 K14 K17 K18 L1 L8 L9 L12 A9 A13 C11 A5 A7 A11 A20 B18 C21 A16 A18 C14 F13 F14
U_BB_RF MDM9X35M
D
BGA-UBM200
11 6
PP_0V9_LDO3
C 11 7 6
B
PP_1V0_SMPS3
11 6
C3101_RF 2.2UF
20% 2 4V X5R-CERM 0201
1
C3104_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE
F10 F11 F19 G10 G11 G18 G19 H9 H10 M9 M13 N8 N9 N12 N13 P19 R19 R20
VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM
G6 G14 H5 H6 H13 H14 H17 H18 J8 J9 J12 J13 J16 J17 K7 K8 K11 K12 K15 K16 L6 L7 L10 L11 L14 L15 M6 M10 M14 P7 P8 P11 P12 R7 R10 R11 T10 G7
VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM
RADIO_BB
PP_0V9_SMPS1
6 11
1
C3107_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3110_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3113_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3116_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3120_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3123_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
RADIO_BB
1
C3125_RF 15UF
20% 2 6.3V X5R 0402-1
RADIO_BB
(MSM MODEM)
PP_0V9_SMPS1 1
C3102_RF 2.2UF
20% 2 4V X5R-CERM 0201
1
C3105_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB 11 7 6
E16 F5 F6 F7 F15 F16 G15 K19 L18 L19 M17 M18 N16 N17 P15 P16 R6 R14 R15 R18 T6 T13 T14 T17 T18
(MSM CORE)
PP_0V9_LDO3 1
11 6
SYM 6 OF 8 PWR1
1
C3108_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3111_RF
1
2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
C3114_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3117_RF 2.2UF
20% 2 4V X5R-CERM 0201
1
2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
RADIO_BB
C3119_RF
1
C3122_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
U_BB_RF MDM9X35M BGA-UBM200 SYM 8 OF 8 GND
RADIO_BB
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
L13 L16 L17 L24 M7 M8 M11 M12 M15 M16 M19 N6 N7 N10 N11 N14 N15 N18 N23 N24 P6 P9 P10 P13 P14 P17 P18 R1 R8 R9 R12 R13 R16 R17 R24 T7 T8 T9 T11 T12 T15 T16 T19 U11 U15 U19 U24 W1 W9 W11
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
W24 Y6 Y10 Y14 Y15 AA1 AA6 AA8 AA12 AA14 AA18 AA24 N19 F9 E8
D
C
B
RADIO_BB
(MODEM SUB MEMORY)
PP_1V0_SMPS3 1
C3103_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3106_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3109_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3112_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3115_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3118_RF 2.2UF
20% 2 4V X5R-CERM 0201
1
C3121_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
RADIO_BB
1
C3124_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
A
A PAGE TITLE
CELLULAR BASEBAND: POWER1 DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
31 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
40 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
BASEBAND: POWER 2 U_BB_RF MDM9X35M BGA-UBM200
D 11 7
PP_1V2_LDO2
1
C3204_RF
1
2.2UF
C3207_RF
1
2.2UF
20% 2 6.3V X5R-CERM 0201
C3210_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
1
C3214_RF
1
2.2UF
RADIO_PMIC
C3218_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
F23 F24 K23 K24 P23 P24 W2 V23 V24 V1
VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1
26 11 9 8 7
PP_1V8_LDO6
G1
VDD_P2
26 11 9 8 7
PP_1V8_LDO6
C22 D3 J1 J20 M1 M20 T1 T24 AA5 AA15 AA23
VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3
1
C3202_RF
1
2.2UF
1
C3205_RF
C3211_RF
20% 2 4V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
1
2.2UF
20% 2 4V X5R-CERM 0201
20% 2 4V X5R-CERM 0201
RADIO_PMIC
C3208_RF 2.2UF
2.2UF
20% 2 4V X5R-CERM 0201
C
D
SYM 7 OF 8 PWR2
RADIO_PMIC
11 5 3
PP_UIM1_LDO11
AA19
VDD_P4
24 11 5
PP_UIM2_LDO13
AA17
VDD_P5
PP_1V2_LDO2
U23
VDD_P6
PP_1V0_SMPS3
U13
VDD_USB_CORE
PP_1V8_LDO8 PP_3V075_LDO10
Y12 W15
11 7
11 7 6
11 11
11
PP_0V95_LDO4
1
C3209_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_PMIC
1
C3206_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_PMIC
1
C3203_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
1
C3212_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
1
C3213_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
1
C3215_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
1
RADIO_BB
VDD_DDR_CORE_1P8_0 VDD_DDR_CORE_1P8_1 VDD_DDR_CORE_1P8_2 VDD_DDR_CORE_1P8_3
C1 D24 Y24 AA2
PP_1V8_LDO6
7 8 9 11 26
VDD_DDR_CORE_1P2_0 VDD_DDR_CORE_1P2_1 VDD_DDR_CORE_1P2_2 VDD_DDR_CORE_1P2_3
B1 E23 W23 Y1
PP_1V2_LDO2
7 11
G2 U18
VDDPX_BIAS_UIM2
10
VREF_SDC VREF_UIM
VDD_A3 C10 VDD_A3 E19
PP_1V0_SMPS3
VDD_A2 VDD_A1 VDD_A2 VDD_A1 VDD_A2 VDD_A1
B11 B9 B7 B5 B13 E12
VDD_A2 VDD_A2
B20 B16
VDD_A1
F12
VDD_ALWAYS_ON
U16
VDD_PLL VDD_PLL
N20 E9
PP_1V8_LDO7
7 10 11
VDD_QFPROM_PRG
H20
PP_1V8_LDO7
7 10 11
PP_1V7_LDO5 PP_1V5_LDO1 1
VDD_USB_SS_0P9 VDD_USB_SS_1P8
W8 U9
VDD_PCIE_09P VDD_PCIE_1P8
C3220_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
1
C3226_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
1
C3225_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
1
C3219_RF 0.1UF
20% 2 6.3V X5R-CERM 01005
RADIO_PMIC
1
C3223_RF 2.2UF
1
11 11
C3229_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
PLACE CLOSE TO B1
C
NC
VDD_USB_1P8 VDD_USB_3P3
W7 U7
6 7 11
1
C3227_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
C3216_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
B
B
A
A PAGE TITLE
CELLULAR BASEBAND: POWER2 DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
32 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
41 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
BASEBAND: CONTROL AND INTERFACES U_BB_RF
D
MDM9X35M
MDM9X35M BGA-UBM200
SYM 1 OF 8 44 39
IN
44 39
OUT
44
IN
39
IN
44 39
IN
50_SLEEP_CLK_32K XO_OUT_D0_EN 50_MDM_19P2M_CLK
W20 U20 E3
SLEEP_CLK CXO_EN CXO
BB_JTAG_SRST_L PMIC_RESOUT_L
K3 G22
SRST* RESIN*
NC NC 42
J2 K5 NC J3 K1 NC K2 NC
SWD_CLK_BB_JTAG_TCK_BUFFER IN
SWD_IO_BB_JTAG_TMS 5
26 11 9 7
L3 L5
CONTROL
RADIO_BB
HSIC_STROBE HSIC_DATA HSIC_CAL RESOUT* PS_HOLD
MODE_0 MODE_1
SDC1_CLK SDC1_CMD SDC1_DATA_0 SDC1_DATA_1 SDC1_DATA_2 SDC1_DATA_3
TCK TRST* TMS TDI TDO
D
U_BB_RF
BGA-UBM200
PMIC_SPMI_CLK PMIC_SPMI_DATA
SYM 4 OF 8
U22 NC T23 NC V22 BB_HSIC_CAL H22 NC AA16 PS_HOLD H2 F2 G5 F3 G3 H3 Y21 Y20
11
OUT
1
44
1
R3303_RF 240
1% 1/32W MF 2 01005 RADIO_BB
NC NC NC NC NC NC
PLACE CLOSE TO V22 SPMI_CLK SPMI_DATA
BI
39 44
BI
39 44
R3305_RF 240
1
R3306_RF 240
1% 1/32W MF 2 01005 RADIO_BB
1% 1/32W MF 2 01005 RADIO_BB
PLACE CLOSE TO E1
PLACE CLOSE TO T3
BDM_CAL EBI1_CAL MDM_VREF_LPDDR2
1
C3302_RF 1UF
20% 2 10V X5R 0201 RADIO_BB
E1 T3 M24 V2 T20 P20
BDM_ZQ EBI1_CAL VREF_DQ_BDM EBI1_VREF0 EBI1_VREF1 EBI1_VREF2
MEMORY
RADIO_BB
PP_1V8_LDO6
U3301_RF 5
74AUP1G34GX SOT1226 SWD_CLK_BB_JTAG_TCK_BUFFER 4
2
8
C
NC
5
SWD_CLK_BB_JTAG_TCK
NC
1
C
U_BB_RF MDM9X35M BGA-UBM200 SYM 2 OF 8 48
48
49
49
B
49
49
48
48
44
IN
IN
IN
IN
IN
IN
IN
50_PRX_CA2_I 50_PRX_CA2_Q
50_DRX_CA2_I 50_DRX_CA2_Q
50_DRX_CA1_I 50_DRX_CA1_Q
50_PRX_CA1_I
IN
50_PRX_CA1_Q
IN
VREF_DAC_BIAS
1
A10 B10 NC C8 C9 NC E7 E6 NC B8 A8 NC C7 C6 NC A6 B6 NC A4 B4 NC C4 C5 NC C20 C15
BBRX_IP_CH0 BBRX_IM_CH0 BBRX_QP_CH0 BBRX_QM_CH0 BBRX_IP_CH1 BBRX_IM_CH1 BBRX_QP_CH1 BBRX_QM_CH1 BBRX_IP_CH2 BBRX_IM_CH2 BBRX_QP_CH2 BBRX_QM_CH2
ANALOG_RF
RADIO_BB
BBRX_IP_FB BBRX_IM_FB BBRX_QP_FB BBRX_QM_FB GNSS_BB_IP GNSS_BB_IM GNSS_BB_QP GNSS_BB_QM TX_DAC0_IP TX_DAC0_IM TX_DAC0_QP TX_DAC0_QM
BBRX_IP_CH3 BBRX_IM_CH3 BBRX_QP_CH3 BBRX_QM_CH3
TX_DAC1_IP TX_DAC1_IM TX_DAC1_QP TX_DAC1_QM
TX_DAC0_VREF TX_DAC1_VREF
ET_DAC0_P ET_DAC0_M ET_DAC1_P ET_DAC1_M
C3301_RF 2200PF 10%
2 16V X5R-CERM
DNC DNC DNC DNC DNC DNC
01005 RADIO_BB
B12 A12 NC C13 C12 NC E10 E11 NC E13 E14 NC C19 C18 A19 B19 C16 NC C17 NC A15 NC B15 NC A21 B21 A17 NC B17 NC M22 NC N22 NC AA20 NC AA21 NC Y8 NC W13 NC
50_TX_FB_RX_I
IN
U_BB_RF
50
MDM9X35M
50_TX_FB_RX_Q
IN
BGA-UBM200
50
SYM 5 OF 8
50_GPS_RX_I 50_GPS_RX_Q
TX_I_P TX_I_N TX_Q_P TX_Q_N
USB_PCIE IN
IN
49 44 39
IN
50_MDM_PCIE_CLK BB_USB_TRXTUNE
W12 U12
PCIE_USB_PHY_CLK USB_HS_TXRTUNE
USB_BB_P USB_BB_N
U14 W14
USB_HS_DP USB_HS_DM
U10 W10
PCIE0_AP_TO_BB_REFCLK_P PCIE0_AP_TO_BB_REFCLK_N
49
OUT
50
OUT
50
OUT
50
OUT
50
1
39
34
BI
39
34
BI
Y7 NC AA7 NC Y9 NC AA9 NC
R3304_RF 200
1% 1/32W MF 2 01005 RADIO_BB
PLACE CLOSE TO U12 OUT
46
OUT
46
U8
SS_CAL_RES 1
ET_DAC_P ET_DAC_N
PCIE_EP_REF_CLK_P PCIE_EP_REF_CLK_M
IN
34 39
IN
34 39
PCIE_TX_P PCIE_TX_M
AA11 Y11
PCIE0_BB_TO_AP_TX_P PCIE0_BB_TO_AP_TX_N
OUT
34 39
OUT
34 39
USB_SS_TX_P USB_SS_TX_M
PCIE_RX_P PCIE_RX_M
AA13 Y13
PCIE0_AP_TO_BB_TX_P PCIE0_AP_TO_BB_TX_N
IN
34 39
IN
34 39
USB_SS_RX_P USB_SS_RX_M
PCIE_REXT
AA10
RADIO_BB
B
PCIE_CAL_RES 1
USB_SS_REXT
R3302_RF 1.43K
1% 1/32W MF 2 01005 RADIO_BB
R3301_RF 1.43K
PLACE CLOSE TO AA10
1% 1/32W MF 2 01005 RADIO_BB
PLACE CLOSE TO U8
A
A PAGE TITLE
CELLULAR BASEBAND: CONTROL AND INTERFACES DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
33 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
42 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
BASEBAND: GPIOS U_BB_RF MDM9X35M BGA-UBM200
9 5 58 39
OUT
58 39
OUT
D 39
34
OUT
39
34
IN
39
34
IN
39
34
IN
39 39
UART0_BB_TO_OWL_TX UART0_OWL_TO_BB_TX
I2S_AP_TO_BB_WS I2S_AP_TO_BB_TX I2S_BB_TO_AP_TX I2S_AP_TO_BB_CLK
34 OUT 34
IN
BB_EEPROM_I2C_SDA BB_EEPROM_I2C_SCL
9 9
26 11 9 8 7
C
PP_1V8_LDO6
R3412_RF 10K
1
1% 1/32W MF 01005 2 RADIO_BB NOSTUFF
R3411_RF 10K
1
1% 1/32W MF 01005 2 RADIO_BB NOSTUFF
9
FAST_BOOT_SELECT0 FAST_BOOT_SELECT1
9
9
9 39
34
STUFF R3411 FOR PCIE BOOT (UNFUSED BB) STUFF R3412 FOR USB BOOT (UNFUSED BB)
OUT
FAST_BOOT_SELECT0 FAST_BOOT_SELECT1 BB_TO_AP_GSM_TXBURST_IND
OPTION SEL2 SEL1 SEL0 GPIO 35 34 32 PCIE 0 0 1 HSUSB 0 1 0 HSIC 0 1 1
GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39
GPIO_40 GPIO_41 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_46 GPIO_47 GPIO_48 GPIO_49 GPIO_50 GPIO_51 GPIO_52 GPIO_53 GPIO_54 GPIO_55 GPIO_56 GPIO_57 GPIO_58 GPIO_59 GPIO_60 GPIO_61 GPIO_62 GPIO_63 GPIO_64 GPIO_65 GPIO_66 GPIO_67 GPIO_68 GPIO_69 GPIO_70 GPIO_71 GPIO_72 GPIO_73 GPIO_74 GPIO_75 GPIO_76 GPIO_77 GPIO_78 GPIO_79
SYM 3 OF 8 GPIO
RADIO_BB
D1 F22 G20 G23 C23 C24 D22 D23 E22 F20 E2 W4 R5 R2 W3 T5 A2 B2 U3 R3 T2 Y2 AA3 U2 K20 U6 U5 Y3 U1 U17 V3 W22 E20 A23 B23 B24 Y19 W19 Y18 W18
BB_TO_AP_GPS_TIME_MARK 50_GSM_TX_PHASE
OUT
34 39
OUT
49
NC NC
75_RFFE3_SDATA_BB 75_RFFE3_SCLK_BB 75_RFFE4_SDATA_BB 75_RFFE4_SCLK_BB 75_RFFE5_SDATA_BB_BUFFER 75_RFFE5_SCLK_BB_BUFFER
BI
39 57
BI
39 46
BI
39 43
D
9
9
OUT
39 43
OUT
39 59
IN
39 59
NC NC
UART_BB_TO_WLAN_COEX_TX UART_WLAN_TO_BB_COEX_TX PCIE0_AP_TO_BB_DEV_WAKE BB_TO_AP_RESET_DET_L AP_TO_BB_COREDUMP_TRIG BB_DEBUG_ERROR
IN
34 39
OUT
34 39
IN
34 39
OUT
BUFFER ON RFFE5 SCLK/SDATA_A IS OUTPUT
39
NC
AP_TO_BB_IPC_GPIO
BI
34 39
UBUFR_RF
NC
PCIE0_BB_TO_PMU_HOST_WAKE_L
OUT
34 39
RF1361
NC NC
PCIE0_AP_TO_BB_CLKREQ_L PCIE0_AP_TO_BB_PERST_L AP_TO_BB_MESA_ON_L
BI
34 39
IN
34
IN
34 39
39 9 5
9 5
SIM1_REMOVAL_ALARM
OUT
75_RFFE5_SCLK_BB_BUFFER
GPO1 1 GPO2 8
1
44
C3407_RF 51PF 5%
BI
39 51 52 53 54 55 56
BI
39 50
2 SCLK
75_RFFE5_SDATA_BB_BUFFER
16V 2 NP0-C0G
RF_SOC2BB_I2S_MCLK 75_RFFE2_SDATA_BB 75_RFFE2_SCLK_BB 75_RFFE1_SDATA_BB 75_RFFE1_SCLK_BB SIM1_IO SIM1_TRAY_DET SIM1_RST SIM1_CLK
WLCSP
43
NC NC NC NC
4 VIO
23 22 21 20 19 18 17 12 11 5 2 PP_1V8_LDO15
01005 RADIO_BB
1
SCLK_A 5
3 SDATA
RFFE_BUFFER_LAT_GPIO1
C3405_RF 51PF 5%
2 16V NP0-C0G
5
R3414_RF
NC 75_SCLK_A
1
0.00
2
75_RFFE5_SCLK_BB
2 3 5
0% 1/32W MF 01005
SDATA_A 6 GND
SIM2_DATA SIM2_DETECT SIM2_RESET SIM2_CLK
BI
RADIO_BB
C
R3413_RF
7
58 39
Y17 Y16 W16 W17 L22 NC L23 NC L20 NC M23 NC W6 Y5 W5 NC AA4 NC AA22 Y23 W21 Y22 P22 NC R23 NC R22 NC T22 NC H24 NC H23 NC J23 J22 K22 NC Y4 NC P5 NC P3 NC P2 NC P1 NC N5 NC N3 NC N2 N1 NC M5 M3 NC M2 L2 NC D2 NC C2 NC
75_SDATA_A
01005 RADIO_BB
1
0.00
2
75_RFFE5_SDATA_BB
2 3 5
0% 1/32W MF 01005
9
RADIO_BB
9
BI
37 39
IN
37 39 43
OUT
37 39
OUT
37 39
PLACE C3405_RF CLOSE TO BUFFER PLACE C3407_RF CLOSE TO MDM
RFFE CLOCK FILTERS 9
R3407_RF 0.00 2 1
75_RFFE1_SCLK_BB
75_RFFE1_SCLK_FILT
0% 1/32W MF 01005 RADIO_BB
NOSTUFF R3402 WHEN VINLY PRESENT STUFF R3402 WHEN VINLY NOT PRESENT 9
PP_1V8_LDO6
B
9 5
R3401_RF 10K
1
1
BB EEPROM
R3402_RF
PP_1V8_LDO6
0% 1/32W MF 2 01005
R3403_RF 10K
RADIO_BB OMIT
SIM1_TRAY_DET
1
1
1% 1/32W MF 2 01005 RADIO_BB
C3406_RF 1UF
20% 2 10V X5R 0201 RADIO_BB
R3404_RF 10K
9
75_RFFE2_SCLK_FILT 1
75_RFFE3_SCLK_FILT
0% 1/32W MF 01005 RADIO_BB
1% 1/32W MF 2 01005 RADIO_BB
1
UEPRM_RF CAT24C08C4A
PP_1V8_LDO6
R3406_RF 100K
1
9
1% 1/32W MF 01005 2 RADIO_BB
BB_EEPROM_I2C_SCL
B1 SCL
WLCSP RADIO_BB
SDA B2
BB_EEPROM_I2C_SDA
9
75_RFFE4_SCLK_BB
57
OUT
46
C3403_RF 10PF 01005 NOSTUFF RADIO_BB
75_RFFE4_SCLK_FILT
0% 1/32W MF 01005 RADIO_BB
1
C3404_RF 10PF 5%
2 16V CERM
VSS
01005 NOSTUFF RADIO_BB
A2 9 5
OUT
5%
R3410_RF 0.00 2 1
9
B
2 16V CERM
VCC 26 11 9 8 7
C3402_RF 10PF
5% 2 16V CERM 01005 NOSTUFF RADIO_BB
R3409_RF 0.00 2 1
75_RFFE3_SCLK_BB
51 52 53 54 55 56
01005 NOSTUFF RADIO_BB
7 8 9 11 26
1
OUT
C3401_RF 10PF 5%
0% 1/32W MF 01005 RADIO_BB
0.00
1% 1/32W MF 01005 2 RADIO_BB 9 5 3
75_RFFE2_SCLK_BB
50
2 16V CERM
R3408_RF 0.00 2 1
SIM2_DETECT
A1
26 11 9 8 7
1
OUT
PCIE0_AP_TO_BB_CLKREQ_L
RFFE USAGE TABLE RFFE1 RFFE2 RFFE3 RFFE4 RFFE5
PCIE PULL-UPS TO BB RAIL
A
WTR LB/MB/HB PAD, 2G PA, LB/MB/HB ASM DIV ASM QPOET DIV LNA, ANT TUNERS
A
PAGE TITLE
CELLULAR BASEBAND: GPIOS DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
34 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
43 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
PMU: CONTROL AND CLOCKS RESET AND CONTROL: PMU D
D
39
C
34
IN
R3501_RF 1.00K 2 1
AP_TO_BB_RST_L
1% MF 1/32W 01005 RADIO_PMIC
HW_REV2_ID 1.80V 0.12V
R3502 698K 698K
R3503 51.1K
CONFIG MLB SELF GEN
HW_REV_ID 0.10V 0.30V 0.50V 0.70V 0.90V 1.10V 1.20V 1.31V 1.43V 1.55V 1.63V 1.80V
R3504 887K 255K 124K 82.5K 51.1K 31.6K 50K 39K 13.3K 8.25K 5.23K 10K
R3505 51.1K 51.1K 51.1K 51.1K 51.1K 51.1K 100K 105K 51.1K 51.1K 51.1K -
REVISION DEV1 DEV2 DEV3 DEV4/PROTOMLB1 PROTOMLB2 DEV5/PROTO1 PROTO2 EVT EVT_ALT CARRIER BUILD DVT PVT
42
IN
R3507_RF 20.0K 2 1
PS_HOLD
U_PMU_RF PMD9635
5% MF 1/32W 01005 RADIO_PMIC
U_PMU_RF PMD9635 WLNSP
WLNSP 39
39
34
AP_TO_BBPMU_RADIO_ON_L
IN
34
PMU_TO_BBPMU_RESET_L PMIC_RESOUT_L PS_HOLD_PMIC SPMI_CLK SPMI_DATA
IN
42 39 OUT
42 39
BI
42 39
BI
58 75 43 63 82 25 31
CBL_PWR* PON_1 RESIN* PON_RST* PS_HOLD SPMI_CLK SPMI_DATA
SYM 1 OF 5 CONTROL
RADIO_PMIC
OPT_1 OPT_2 GND BAT_ID_THERM
52 42 98 53
36 46 57 62
NC NC
GND GND GND GND
SYM 5 OF 5 GND
GND 67
MPPS AND GPIOS: PMU C PP_1V8_LDO7
1
1
R3502_RF 698K
R3504_RF 13.3K
7 10 11
REV_ID EVT_ALT
1% 1/32W MF 2 01005 RADIO_PMIC
1% 1/32W MF 2 01005 RADIO_PMIC
WLNSP
NC 41
OUT
42 OUT
1
R3503_RF 51.1K
1% 1/32W MF 2 01005 RADIO_PMIC NOSTUFF
U_PMU_RF PMD9635
1
HW_REV1_ID VDDPX_BIAS_UIM2 HW_REV2_ID VREF_DAC_BIAS
NC NC NC
R3505_RF 51.1K
1% 1/32W MF 2 01005
13 51 61 9 4 20 83 88
MPP_01 MPP_02 MPP_03 MPP_04 MPP_05 MPP_06 PA_THERM1 PA_THERM2
SYM 3 OF 5 GPIO_MPP
RADIO_PMIC
GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06
26 15 21 37 32 38
NC STOCKHOLM_TO_BBPMU_CLK_REQ
IN
39 60
IN
34 39
IN
43
IN
34 39
NC USB_BB_VBUS_DETECT SIM1_REMOVAL_ALARM TOUCH_TO_BBPMU_FORCE_PWM
1
R3508_RF 100K
1% 1/32W MF 2 01005
RADIO_PMIC
RADIO_PMIC NOSTUFF
B
B 45 44 41
IN
PP_1V8_LDO7
XTAL AND CLOCK: PMU 1
C3501_RF 0.1UF 20%
2 6.3V X5R-CERM
01005 RADIO_PMIC
1
R3506_RF
Y_XO_RF 19.2MHZ-10PPM-7PF-80OHM
100K
1% 1/32W MF 2 01005 RADIO_PMIC
XTAL_19P2M_OUT
10 10
1
C3502_RF
XO_THERM
2.0X1.6-SM 1 3
4
XTAL_19P2M_IN
10
U_PMU_RF PMD9635
2 RADIO_PMIC
WLNSP
1000PF
42 39
10% 2 10V X5R 01005 RADIO_PMIC
XO_OUT_D0_EN
IN 10
2
10
XW3501_RF
10
SHORT-10L-0.1MM-SM OMIT
1
PLACE AT U2_RF.41
56
BB_CLK_EN
SYM 2 OF 5 CLOCK
XO_THERM XO_ADC_GND
76 41
XO_THERM GND_XOADC
XTAL_19P2M_IN XTAL_19P2M_OUT
55 65 71
XTAL_19M_IN XTAL_19M_OUT GND_XO_CLK
RADIO_PMIC
LN_BB_CLK 45 BB_CLK 35 RF_CLK1 66 RF_CLK2 77 SLEEP_CLK 72
R3509_RF 0.00 1
50_MDM_19P2M_CLK_PMU 50_WTR_19P2M_CLK 50_BBPMU_TO_STOCKHOLM_19P2M_CLK 50_SLEEP_CLK_32K
OUT
50
OUT
39 60
OUT
39 42
2
50_MDM_PCIE_CLK 50_MDM_19P2M_CLK
OUT
39 42
OUT
42
0% 1/32W MF 01005 RADIO_PMIC
GND_XO_CLK: VIA DOWN TO GND PLANE
A
A PAGE TITLE
CELLULAR PMU: CONTROL AND CLOCKS DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
35 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
44 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
PMU: SWITCHERS AND LDOS SWITCHERS BULK CAPS 59 52 60 46 39 34 45 51 54
I296 PP_VCC_MAIN
IN
VBATT_S1
11
VBATT_S1
11
XW3601_RF
SHORT-10L-0.25MM-SM
D
1
C3640_RF 15UF
20% 2 6.3V X5R 0402-1
1
C3616_RF
1
OMIT
15UF
XW3602_RF
20% 2 6.3V X5R 0402-1
RADIO_PMIC
D
2
SHORT-10L-0.25MM-SM 11
1
S1_GND
2
OMIT
RADIO_PMIC
L3601_RF
XW3603_RF
1UH-20%-0.054OHM-3.4A
SHORT-10L-0.25MM-SM 1 59 52 60 46 39 34 45 51 54
I295
1
VBATT_S2
C3615_RF VBATT_S2 1 C3617_RF 15UF 20%
2 6.3V X5R 0402-1
RADIO_PMIC
1
20% 2 6.3V X5R 0402-1
2.2UH-20%-0.14OHM-1.6A
2
PP_VSW_S2 VOLTAGE=1.225V
OMIT
XW3605_RF 1
2
11
C3634_RF 4.7UF
20% 2 6.3V CER-X5R 0402
1
11
C3618_RF 15UF
20% 2 6.3V X5R 0402-1
RADIO_PMIC
5 16 6 17 28 33
VBATT_S1
XW3606_RF
SHORT-10L-0.25MM-SM
RADIO_PMIC
1
2
11
92 103 102
VBATT_S2
OMIT
XW3607_RF
C
11
S2_GND
SHORT-10L-0.25MM-SM 1
2
11
VBATT_S3
OMIT
11
S3_GND
XW3608_RF
59 54 52 6051 46 45 39 34
11
SHORT-10L-0.25MM-SM 1 2 S3_GND
I275 IN
11
11
VBATT_S4
11
11
XW3609_RF
1
C3619_RF
1
11
2 45
IN
41 40 45
IN
OMIT
20% 2 6.3V X5R 0402-1
XW3610_RF
SHORT-10L-0.25MM-SM 11
RADIO_PMIC
VBATT_S5
SHORT-10L-0.25MM-SM
15UF
59 54 52 6051 46 45 39 34
VBATT_S4
OMIT VBATT_S4
PP_VCC_MAIN
S4_GND
1
2 47 45
IN
S5_GND
VBATT_S5
11
VBATT_S5 1
11
C3620_RF 15UF
20% 2 6.3V X5R 0402-1
RADIO_PMIC
XW3611_RF
SHORT-10L-0.25MM-SM 1
45 59 52 46 39 34 6045 51 54
IN IN
VDD_S2 VDD_S2 GND_S2
70 49 54
VDD_S3 GND_S3 GND_S3
VREG_S3 69 VSW_S3 59 VSW_S3 64
8 1 7
VDD_S4 GND_S4 GND_S4
VREG_S4 12 VSW_S4 2
94 93
VDD_S5 GND_S5
VREG_S5 87 VSW_S5 99
PP_1V0_SMPS3
44
VDD_L3_4
PP_1V85_SMPS4
14
VDD_L5_6_15
23
VDD_L7_8
PP_1V0_SMPS5
89
VDD_L9
PP_VCC_MAIN
90 47
VIN_VPH1 VIN_VPH2
73
VDD_OTP
MDM_VREF_LPDDR2
78
VREF_DDR
AVDD_BYP
74 79
AVDD_BYP REF_BYP
68
GND_REF
24
VDD_XO_RF
VDD_OTP 11
S5_GND
XW3612_RF
42
SHORT-10L-0.25MM-SM 1
OUT
2
REF_BYP
OMIT
B
1
C3621_RF 1UF
20% 10V 2 X5R 0201 RADIO_PMIC
1
C3622_RF
0.1UF
20% 2 6.3V X5R-CERM 01005
RADIO_PMIC
REF_BYP_GND
1
R3603_RF 0.00
0% 1/32W MF 2 01005
2
VREG_L1 VREG_L2 VREG_L3 VREG_L4_16 VREG_L5 VREG_L6 VREG_L7 VREG_L8 VREG_L9 VREG_L10 VREG_L11 VREG_L12 VREG_L13 VREG_L14 VREG_L15
80 81 39 48 19 3 18 29 100 84 95 85 96 101 30
VREG_XO GND_XO VREG_RF GND_RF_CLK
34 40 60 50
VREG_XO
11
20%
0603 S1_GND
0603 NOSTUFF LOW VOLTAGE LDOS TCXO SHUTDOWN: ON
587MA
PP_1V225_SMPS2 VOLTAGE=1.225V
OUT
45
MDM MEMORY, MDM USB TCXO SHUTDOWN: ON
2234MA
PP_1V0_SMPS3 VOLTAGE=1.0V
OUT
40 41 45
HIGH VOLTAGE LDOS TCXO SHUTDOWN: ON
653MA
PP_1V85_SMPS4 VOLTAGE=1.85V
OUT
45 47
C3610_RF 43UF
11
2 0806
1
C3611_RF 43UF
VREG_XO_GND
L3604_RF
PP_VSW_S4
1 0806
1
C3612_RF 43UF
20% 2 4V X5R 0603 S4_GND
C 11
700MA
LDO9->WTR TCXO SHUTDOWN: OFF
2 0806
1
RADIO_PMIC
PP_1V0_SMPS5 VOLTAGE=1.0V
OUT
45
OUT
41
OUT
41
OUT
40
OUT
41
OUT
41
OUT
41 42 43 60
OUT
41 44
OUT
41
OUT
47
OUT
41
OUT
37 39 41 45
OUT
36
OUT
39 41 58
OUT
36 55 56 57
OUT
36 39 43 46 51 52 53 54 55 56 57
C3613_RF 43UF 20%
2 4V X5R
0603 S5_GND
VREG_XO 11 VREG_XO_GND 11 VREG_RF_CLK 11 VREG_RF_CLK_GND
VREG_RF_CLK
11
VREG_RF_CLK_GND
XW3615_RF
1
1
TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO
SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN:
ON ON ON OFF ON ON OFF ON OFF ON ON OFF ON OFF OFF
PP_1V5_LDO1 PP_1V2_LDO2 PP_0V9_LDO3 PP_0V95_LDO4 PP_1V7_LDO5 PP_1V8_LDO6 PP_1V8_LDO7 PP_1V8_LDO8 PP_1V0_LDO9 PP_3V075_LDO10 PP_UIM1_LDO11 PP_2V7_LDO12 PP_UIM2_LDO13 PP_2V8_LDO14 PP_1V8_LDO15
B 1
C3632_RF
1
15UF
11
20% 2 10V X5R 0201 RADIO_PMIC NOSTUFF
4.7UF
20% 2 6.3V X5R 0402-1
C3624_RF 1UF
20% 2 6.3V CER-X5R 0402
RADIO_PMIC
1
C3635_RF 1
RADIO_PMIC NOSTUFF
C3627_RF
1
10UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 10V X5R 0201 RADIO_PMIC
1
C3605_RF 1UF
20% 2 10V X5R 0201 RADIO_PMIC
RADIO_PMIC
1
C3606_RF 1UF
C3608_RF 1UF
20% 2 10V X5R 0201 RADIO_PMIC
20% 2 10V X5R 0201 RADIO_PMIC
C3625_RF 10UF
1
20% 2 6.3V CERM-X5R 0402-9 11
1
C3603_RF 1UF
C3626_RF
1
4.7UF
20% 2 6.3V CER-X5R 0402
RADIO_PMIC
SHORT-10L-0.1MM-SM OMIT
1
20% 2 10V X5R 0201 RADIO_PMIC
4.7UF
20% 2 6.3V X5R 0402-1
20% 2 6.3V CER-X5R 0402
RADIO_PMIC
PLACE XW CLOSE TO PMU VIA XW DOWN TO THE GND PLANE
C3607_RF 1UF
C3633_RF 1 C3636_RF 15UF
RF_CLK_GND
1
C3629_RF 1UF
20% 2 10V X5R 0201 RADIO_PMIC
RADIO_PMIC
XW3614_RF
11
MDM LOW VOLTAGE ANALOG MDM EBI1, DDR CORE MDM CORE MDM PCIE MDM HIGH VOLTAGE ANALOG MDM 1.8V I/O, DDR, SHARED 1.8V VOLTAGE RAIL MDM PLL MDM LOW VOLTAGE USB WTR MDM HIGH VOLTAGE USB UIM1 GPS LNA UIM2 FRONT END SUPPLY RFFE VIO
VOLTAGE=1.5V VOLTAGE=1.2V VOLTAGE=0.9V VOLTAGE=0.95V VOLTAGE=1.7V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.0V VOLTAGE=3.075V VOLTAGE=1.8V VOLTAGE=2.7V VOLTAGE=1.8V VOLTAGE=2.8V VOLTAGE=1.8V
2
XO_GND
1
RADIO_PMIC
PP_VSW_S5 VOLTAGE=1.0V
11
2
L3605_RF
2
SHORT-10L-0.1MM-SM OMIT
0603 S3_GND
2.2UH-20%-0.14OHM-1.6A
20% 2 10V X5R 0201 RADIO_PMIC 11
2 4V X5R
2.2UH-20%-0.14OHM-1.6A
1UF
20% 2 10V X5R 0201 RADIO_PMIC
1
1
RADIO_PMIC
1 C3631_RF
1UF
SHORT-10L-0.1MM-SM OMIT
PP_VSW_S3 VOLTAGE=1.0V
1
1 C3630_RF
XW3613_RF
C3614_RF 43UF
2 4V X5R
0603 S2_GND
1.0UH-20%-2.7A-0.056OHM
VOLTAGE=1.85V
VDD_L1_2_16
OMIT
40 45
20%
86
2
OUT
2 4V X5R
L3603_RF
10 11 22 27
VREG_S1 VSW_S1 VSW_S1 VSW_S1
VREG_S2 91 VSW_S2 97
I274 PP_VCC_MAIN
VOLTAGE=0.9V PP_0V9_SMPS1
20%
POWER
PP_1V225_SMPS2
OMIT IN
1
RADIO_PMIC
SYM 4 OF 5
VDD_S1 VDD_S1 GND_S1 GND_S1 GND_S1 GND_S1
1
2 0806
WLNSP
11
VBATT_S3
11
PMD9635
OMIT VBATT_S3
1
U_PMU_RF
SHORT-10L-0.25MM-SM S2_GND
C3609_RF 43UF
2 4V X5R
L3602_RF
XW3604_RF
PP_VCC_MAIN
1
1
RADIO_PMIC
20%
SHORT-10L-0.25MM-SM
3400MA
MDM MODEM TCXO SHUTDOWN: ON
2 2520
11
I279 IN
1
11
15UF
RADIO_PMIC
6054 52 45 39 34 51 46 59
PP_VSW_S1 VOLTAGE=0.9V
OMIT
PP_VCC_MAIN
IN
2
RADIO_PMIC NOSTUFF
XW3616_RF OMIT SHORT-10L-0.25MM-SM
A
11 6
1
PP_0V9_SMPS1
2
BB_TO_PMU_AMUX_SMPS1
OUT
34 39
OUT
34 39
A
XW3617_RF OMIT SHORT-10L-0.25MM-SM 11 7 6
1
PP_1V0_SMPS3
2
BB_TO_PMU_AMUX_SMPS3
XW3618_RF OMIT SHORT-10L-0.25MM-SM 13 11
1
PP_1V85_SMPS4
2
051-00094 BB_TO_PMU_AMUX_SMPS4
OUT
34 39
OUT
34 39
4.0.0
XW3619_RF OMIT SHORT-10L-0.25MM-SM 11 7 5 3
1
PP_UIM1_LDO11
2
BB_TO_PMU_AMUX_LDO11_SIM1
36 OF 51 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
45 OF 60
2
1
8
7
6
5
4
3
2
1
PMU: ET MODULATOR D
D
L3704_RF FERR-22-OHM-1A-0.055OHM 1
PP_QPOET_VDD_CLASS_AB_AMP VOLTAGE=4.0V
STAR ROUTING
C 60 59 54 52 51 45 39 34
IN
1
C3701_RF 10UF
CAN BE DELETED IF NEARBY BULK CAPACITANCE IS AVAIALBLE TO BE SHARED
PP_QPOET_VDD_BOOST_OUT VOLTAGE=4.0V
0201 RADIO_QPOET
12
C3705_RF 22UF
C
20% 2 10V X5R-CERM 0603-1 RADIO_QPOET
PP_VCC_MAIN 1
2
GROUND CLOSE TO U4_RF.3
20% 2 6.3V CERM-X5R 0402-9
U_QPT_RF QFE1100
L3702_RF FERR-22-OHM-1A-0.055OHM
RADIO_QPOET
1
2
0201 RADIO_QPOET
1
53 52 51 46
OUT
C3702_RF
PP_QPOET_BYP_BATT PP_QPOET_VCC_PA
PP_QPOET_BUCK_GND
10UF
20% 2 6.3V CERM-X5R 0402-9
42
IN
42
IN
43 39
BI
RADIO_QPOET
VOLTAGE=0.0V 43
2
IN
GND_BUCK
75_RFFE4_SCLK_FILT
21
SCLK
NC
13 20
L3701_RF
2
PP_VBATT_PA_BOOST VOLTAGE=4.3V
RADIO_QPOET
VSW_BUCK 23
22
GND
24
GND_BOOST
PP_1V8_LDO15
2
36 39 43 45 51 52 53 54 55 56 57
C3706_RF
RADIO_QPOET
10UF
L3703_RF 1.5UH-20%-1.7A-0.11OHM 1
PP_QPOET_VSW
VOLTAGE=4.0V
C_BUCK 11 C_BUCK 12
2
LQE2M-SM RADIO_QPOET
20% 2 6.3V CERM-X5R 0402-9
RADIO_QPOET PP_QPOET_VCC_PA VOLTAGE=4.3V
PP_QPOET_APT_CAP_SWITCH_IN VOLTAGE=4.0V 1
C_SW_BUCK 8 C_SW_BUCK 9 C_GSM 6
NC
PA_VBAT 18
NC
OUT
1
C3707_RF 4.7UF
46 51 52 53
C3708_RF 470PF 10%
20% 2 6.3V X5R-CERM1 402 RADIO_QPOET
2 10V X5R
01005 RADIO_QPOET QPOET_CLASS_AB_AMP_SNUBBER
PLACE RC SNUBBER CLOSE TO U_QPOET_RF.4
VOUT_BOOST 25
1
GND 1
RADIO_QPOET
IN
01005 1
AMP_OUT 4
VSW_BOOST USID_LSB
1
VDD_BATT 15 VDD_BATT 16
VDD_1P8 17
MPP1
19
PP_1V8_QPOET_VDD VOLTAGE=1.8V
VDD_AMP 5
AMP_INP AMP_INM SDATA
PLACE AT U_QPOET_RF.27
0603
27
26
2.2UH-20%-0.3A-0.38OHM
B
VDD_BUCK
75_RFFE4_SDATA_BB
SHORT-10L-0.25MM-SM OMIT
1
BYP_BATT BYP_LOAD
28
7 2
ET_DAC_P ET_DAC_N
XW3701_RF 1
14 10
VOLTAGE=4.3V VOLTAGE=4.3V
BGA
L3705_RF
120-OHM-210MA
R3703_RF 2.2
B
5% 1/32W MF 2 01005 RADIO_QPOET
GND_AMP 3 PP_QPOET_VDD_BOOST_OUT
12
GROUND RESISTOR CLOSE TO U_QPOET_RF.3 1
C3704_RF 10UF
20% 2 10V X5R-CERM 0402-8
RADIO_QPOET
VOLTAGE=0.0V PP_QPOET_BOOST_GND
ROUTE CAP GROUND BACK TO U_QPOET_RF.24
2
XW3702_RF
SHORT-10L-0.25MM-SM OMIT
1
PLACE AT U_POET_RF.24
A
A PAGE TITLE
CELLULAR PMU: ET MODULATOR DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
37 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
46 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
TRANSCEIVER: POWER D
D
STAR ROUTING
45
PP_1V0_LDO9
IN
1
C3815_RF
4.7UF
20% 2 6.3V CER-X5R 0402
RADIO_TRANSCEIVER
1
C3801_RF
4.7UF
20% 2 6.3V CER-X5R 0402
R3801_RF 0 2 1 5% 1/20W MF 0201 RADIO_TRANSCEIVER
OPEN ITEM: CAN R3801-R3805 AND C3809-C3813 BE DELETED? 1
C3802_RF 0.1UF
10% 2 6.3V CERM-X5R 0201
RADIO_TRANSCEIVER
RADIO_TRANSCEIVER
R3802_RF 0 2 1 5% 1/20W MF 0201 RADIO_TRANSCEIVER
1
C3803_RF
OMIT
1
10% 2 6.3V CERM-X5R 0201
OMIT
25MA 1
C3805_RF
10% 2 6.3V CERM-X5R 0201
OMIT
C3806_RF 0.1UF
10% 2 6.3V CERM-X5R 0201
RADIO_TRANSCEIVER
67
VDD_RF1_TVCO RADIO_TRANSCEIVER VDD_RF1_TSIG
45
VDD_RF1_DIG
64
VDD_RF1_RX1
VDD_RF2_LDO
23
49
VDD_RF1_RX2
VDD_RF2
30
0201 RADIO_TRANSCEIVER NOSTUFF
1
C3807_RF 1UF
20% 2 10V X5R 0201 RADIO_TRANSCEIVER
345MA
PP_1V85_SMPS4
40MA 1 1
1
C3808_RF 0.47UF
5%
2 25V C0G
IN
3
GND
58 56 42 72
GND GND GND GND
28 84 21 91 20 90 19 89 102
GND GND GND GND GND GND GND GND GND
55
GND
SYM 5 OF 5 GND
RADIO_TRANSCEIVER
45
C3814_RF 4700PF
10% 2 6.3V X5R 01005
20% 2 4V CERM-X5R-1 201 RADIO_TRANSCEIVER
C3812_RF 27PF
RADIO_TRANSCEIVER
GND
94
GND GND GND GND GND GND GND
87 81 17 52 37 36 61
GND GND
53 54
GND GND GND GND GND GND GND GND GND
57 82 83 26 27 71 63 41 48
GND GND GND
38 25 31
C
0201 RADIO_TRANSCEIVER NOSTUFF
70MA
PP_VDD_RF1_RX2 VOLTAGE=1.0V 1
VDD_RF2_LDO_BYPASS
SYM 4 OF 5 PWR
5%
RADIO_TRANSCEIVER
XW3803_RF
88
2 25V C0G
0.1UF
SHORT-10L-0.1MM-SM 1 2
C3811_RF 27PF
PP_VDD_RF1_RX1 VOLTAGE=1.0V 1
WLPSP
0201 RADIO_TRANSCEIVER NOSTUFF
RADIO_TRANSCEIVER
XW3802_RF
U_WTR_RF WTR3925
5%
PP_VDD_RF1_DIG VOLTAGE=1.0V
C3804_RF
WLPSP
C3810_RF 27PF
2 25V C0G
0.1UF
SHORT-10L-0.1MM-SM 1 2
C3809_RF 27PF
175MA
RADIO_TRANSCEIVER
1
U_WTR_RF WTR3925
5% 2 25V C0G 0201 RADIO_TRANSCEIVER NOSTUFF
0.1UF
XW3801_RF
SHORT-10L-0.1MM-SM 1 2
1
PP_VDD_RF1_TX VOLTAGE=1.0V
10% 2 6.3V CERM-X5R 0201
C
35MA
PP_VDD_RF1_TX_VCO VOLTAGE=1.0V
1
C3813_RF 27PF 5%
2 25V C0G
0201 RADIO_TRANSCEIVER NOSTUFF
B
B
A
A PAGE TITLE
CELLULAR TRANSCEIVER: POWER DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
38 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
47 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
TRANSCEIVER: PRX PORTS L3901_RF
51
1
50_PRX_LB1_B8_GSM900_PAD
IN
2
L3922_RF
RADIO_TRANSCEIVER
51
1
IN
2
RADIO_TRANSCEIVER NOSTUFF
0201 RADIO_TRANSCEIVER OMIT
1
50_PRX_LB3_B20_B26_B27_GSM850_PAD
2
+/-0.1PF 16V NP0-C0G 01005
2
RADIO_TRANSCEIVER OMIT
1
C3914_RF
0201
2
01005 RADIO_TRANSCEIVER NOSTUFF
L3904_RF 22NH-3%-0.25A 51
1
50_PRX_LB4_B29_PAD
IN
2
50_PRX_LB3_B20_B26_B27_GSM850
2% 16V CERM 01005 RADIO_TRANSCEIVER
22NH-3%-0.12A-3.2OHM 1
D 50_PRX_LB2_B12_B17_B13_B28
C3903_RF 27PF
50_PRX_LB3_B20_B26_B27_GSM850_MATCH
RADIO_TRANSCEIVER
2
2% 16V CERM 01005 RADIO_TRANSCEIVER OMIT
2.0PF
L3903_RF
IN
1
C3913_RF 1
51
C3902_RF 27PF
2 50_PRX_LB2_B12_B17_B13_B28_MATCH
15NH+/-3%-0.25A-0.7OHM
50_PRX_LB1_B8_GSM900
+/-0.1PF 16V NP0-C0G 01005
L3902_RF 15NH+/-3%-0.25A-0.7OHM 50_PRX_LB2_B12_B17_B13_B28_PAD
2
C3904_RF 27PF
2 50_PRX_LB4_B29_MATCH
0201 RADIO_TRANSCEIVER
1
C3915_RF
2
50_PRX_LB4_B29
2% 16V CERM 01005 RADIO_TRANSCEIVER
2.0PF 1
2
+/-0.1PF 16V NP0-C0G 01005
C
52
1
50_PRX_MB1_B4CA_PAD
IN
2 50_PRX_MB1_B4CA_MATCH
1
50_PRX_MB1_B4CA
C3916_RF 2.2PF 1
4.3NH+/-3%-0.5A 1
50_PRX_MB2_B1_B4_PAD
2
+/-0.1PF 16V NP0-C0G 01005-1
L3906_RF
IN
WLPSP
2
0201 RADIO_TRANSCEIVER
2% 16V CERM 01005 RADIO_TRANSCEIVER
52
U_WTR_RF WTR3925
L3905_RF RADIO_TRANSCEIVER 4.7NH+/-0.3%-0.4A
C3905_RF 27PF
C3906_RF 27PF
RADIO_TRANSCEIVER
2 50_PRX_MB2_B1_B4_MATCH 0201
1
C3917_RF
RADIO_TRANSCEIVER
1
2
+/-0.1PF 16V NP0-C0G 01005
1
50_PRX_MB3_B3_GSM1800_PAD
IN
50_PRX_MB3_B3_GSM1800_MATCH
2
1
50_PRX_MB5_B25_GSM1900_PAD
B
1
1
1
1
2
1
50_PRX_HB1_B7_MATCH
A
1
2
+/-0.05PF 16V NP0-C0G-CERM 01005
50_PRX_HB4_B30_PAD
IN
OUT
42
2
50_PRX_HB1_B7
L3919_RF 1.3PF
2% 16V CERM 01005 RADIO_TRANSCEIVER
1
2
2
50_PRX_HB3_B38_B40_B41
A PAGE TITLE
CELLULAR TRANSCEIVER: PRX PORTS
C3911_RF 27PF 1
0201
2
DRAWING NUMBER
Apple Inc.
50_PRX_HB4_B30
1.3PF 2
+/-0.1PF 16V NP0-C0G 01005
RADIO_TRANSCEIVER OMIT
8
7
6
051-00094 REVISION
4.0.0
R
2% 16V CERM 01005 RADIO_TRANSCEIVER OMIT
C3922_RF 1
B
50_PRX_MLB6_B34_B39_B2CA
C3910_RF 27PF
+/-0.1PF 25V C0G-CERM 201 L3912_RF RADIO_TRANSCEIVER 4.2NH-+/-0.1NH-0.5A-0.17OHM OMIT 1 2 50_PRX_HB4_B30_MATCH RADIO_TRANSCEIVER OMIT
2
RADIO_TRANSCEIVER OMIT 2 50_PRX_HB3_B38_B40_B41_MATCH
1
53
50_PRX_CA2_Q
2% 16V CERM 01005 RADIO_TRANSCEIVER
1.5PF
3.8NH+/-0.1NH-0.5A RADIO_TRANSCEIVER OMIT
PRX_CA2_QP 33
C3909_RF 27PF
RADIO_TRANSCEIVER
C3921_RF
RADIO_TRANSCEIVER OMIT
0201
42
2% 16V CERM 01005 RADIO_TRANSCEIVER
+/-0.1PF 16V NP0-C0G 01005
2
1
OUT
C3908_RF 27PF
RADIO_TRANSCEIVER
2.0PF
0201
50_PRX_HB3_B38_B40_B41_PAD
50_PRX_CA2_I
0201
C3920_RF
L3910_RF
IN
PRX_CA2_IP 39
RADIO_TRANSCEIVER
+/-0.1PF 16V NP0-C0G 01005-1
3.4NH-+/-0.1NH-0.5A-0.17OHM
53
42
2 50_PRX_MB5_B25_GSM1900
1
2 50_PRX_MLB6_B34_B39_B2CA_MATCH
L3911_RF
OUT
C
2
1
50_PRX_HB1_B7_PAD
50_PRX_CA1_Q
L3908_RF
2.2PF
0201
IN
PRX_CA1_QP 77
5.1NH-3%-0.4A
C3919_RF
RADIO_TRANSCEIVER
53
PRX_HB1 PRX_HB2 PRX_HB3 PRX_HB4
42
FOR EVT_MD: 50_PRX_MLB6_B34_B39_B2CA IS ASSIGNED TO MB4
2
50_PRX_MB5_B25_GSM1900_MATCH
2
1
73 65 85 79
OUT
0201
RADIO_TRANSCEIVER
L3909_RF
50_PRX_MLB6_B34_B39_B2CA_PAD
PRX_MB1 PRX_MB2 PRX_MB3 PRX_MB4 PRX_MB5 PRX_MLB6
50_PRX_CA1_I
RADIO_TRANSCEIVER
50_PRX_MB3_B3_GSM1800
2
+/-0.1PF 16V NP0-C0G 01005-1
4NH-+/-0.1NH-0.5A-0.17OHM IN
NC
99 92 106 98 105 97
PRX_CA1_IP 69
RADIO_TRANSCEIVER
2.2PF
2% 16V CERM 01005 RADIO_TRANSCEIVER
52
1
C3918_RF
C3912_RF 27PF IN
NC
PRX_LB1 PRX_LB2 PRX_LB3 PRX_LB4
SYM 1 OF 5 PRX
6.2NH-3%-0.4A
2% 16V CERM 01005 RADIO_TRANSCEIVER
52
50_PRX_MB2_B1_B4
104 96 103 95
L3907_RF
RADIO_TRANSCEIVER
C3907_RF 27PF
2
2% 16V CERM 01005 RADIO_TRANSCEIVER
1.9PF
52
1
2% 16V CERM 01005 RADIO_TRANSCEIVER
3.0PF 1
D
1
50_PRX_LB1_B8_GSM900_MATCH
0201
2
DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF
C3901_RF 27PF
15NH+/-3%-0.25A-0.7OHM
3
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
39 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
48 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
TRANSCEIVER: DRX/GPS PORTS D
D
U_WTR_RF WTR3925
DRX MODULE PORTS ARE DC BLOCKED
WLPSP 57
C
IN
57
IN
57
IN
57
IN
57
IN
57
IN
57
IN
57
IN
57
IN
57
IN
57
IN
57
IN
49
IN
SYM 2 OF 5
50_DRX_LB1_B27_B29 50_DRX_LB2_B26_B13_B17_B12 50_DRX_LB3_B28 50_DRX_LB4_B8_B20
5 12 4 11
DRX_LB1 DRX_LB2 DRX_LB3 DRX_LB4
50_DRX_MB1_B1
15 22 7 14 6 13
DRX_MB1 DRX_MB2 DRX_MB3 DRX_MB4 DRX_MB5 DRX_MLB6
43 50 29 35
DRX_HB1 DRX_HB2 DRX_HB3 DRX_HB4
2 10
GNSS_L2_IN GNSS_L1_IN
NC
50_DRX_MB3_B4 50_DRX_MB4_B34_B39 50_DRX_MB5_B25 50_DRX_MLB6_B3
50_DRX_HB2_B7_B41C 50_DRX_HB3_B40_B41A 50_DRX_HB4_B30_B38_B41B
NC
NC
50_GPS_RX
DRX_GPS
DRX_CA1_IP
78
50_DRX_CA1_I
OUT
42
DRX_CA1_QP
70
50_DRX_CA1_Q
OUT
42
DRX_CA2_IP
34
50_DRX_CA2_I
OUT
42
DRX_CA2_QP
40
50_DRX_CA2_Q
OUT
42
GNSS_BB_IP
18
50_GPS_RX_I
OUT
42
GNSS_BB_QP
32
50_GPS_RX_Q
OUT
42
GPDATA
24
50_GSM_TX_PHASE
IN
43
RADIO_TRANSCEIVER
1
C
C4000_RF 22PF 5%
2 16V CERM
01005
PLACE CAP CLOSE TO MDM GPIO14 IMPROVES RXBN BY 4DB
GPS FILTER
B
B
PLACE NEAR U_WTR FLGPS_RF
IN
50_DRX_GPS_LNA_OUT
2 3 5
GND GND GND
36
GPS-GLONASS-BEIDOU2 SAFFB1G56KD0F57 LGA RADIO_GPS 1 UNBAL_PRT1 UNBAL_PRT4 4
L4908_RF 10NH-3%-0.170A 50_GPS_FILTER_OUT 1
C4906_RF 1.6PF
1
2
50_GPS_RX
OUT
49
01005
+/-0.1PF
2 16V NP0-C0G
01005
A
A PAGE TITLE
CELLULAR TRANSCEIVER: DRX/GPS PORTS DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
40 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
49 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
TRANSCEIVER: TX PORTS
3
2
1
C4110_RF 27PF 16
50_TX_LB3_B12_B17_B13_B28
1
50_TX_VLB_PA_IN_MATCH
2
OUT
51
2% 16V CERM 01005 RADIO_TRANSCEIVER
D
D U_WTR_RF WTR3925
C4112_RF 27PF
WLPSP IN
42
IN
42
IN
42
IN
42
OUT
42
OUT
43
IN
43 39
IN
76 75 68 60
TX_I_P TX_I_N TX_Q_P TX_Q_N
9 1
50_TX_FB_RX_I 50_TX_FB_RX_Q
47 62
75_RFFE1_SCLK_FILT 75_RFFE1_SDATA_BB
SYM 3 OF 5
TX_BB_IP TX TX_BB_IM RADIO_TRANSCEIVER TX_BB_QP TX_BB_QM TX_FB_IP TX_FB_QP RFFE_CLK RFFE_DATA
IN
50_WTR_19P2M_CLK
1
2 50_WTR_19P2M_WTR_IN
5% 16V NP0-C0G 01005 RADIO_TRANSCEIVER
TX_HMB1 TX_HMB2 TX_HMB3 TX_HMB4 TX_HMLB1 TX_HMLB2
C4101_RF 100PF 44
TX_LB1 TX_LB2 TX_LB3 TX_LB4
1
C4114_RF 1.0PF
+/-0.1PF 2 16V NP0-C0G 01005 NOSTUFF
46
XO_IN
TX_FBRX_P TX_FBRX_M
50_TX_LB1_LB_GSM 66 59 NC 50_TX_LB3_B12_B17_B13_B28 51 50_TX_LB4_B27_B26_B20_B8 44 101 100 93 86
50_TX_MB1_B1_B25_B34_B39 50_TX_HMB2_B38_B40_B41 50_TX_HMB3_B3_B4 50_TX_HMB4_B30_B7
80 NC 50_TX_HMLB2_MB_GSM 74 8 16
1
50_TX_LB4_B27_B26_B20_B8
50_TX_LB_PA_IN_MATCH
2
OUT
51
OUT
54
OUT
52
OUT
53
OUT
52
2% 16V CERM 01005 RADIO_TRANSCEIVER
16
16 16
16 16 16 16
RADIO_TRANSCEIVER
FLFBR_RF
FI212P0829C1
TX_FB_RX_IN_P
MID/HI 6 50_MB-HB_COUPLER_DIPLEXER_IN
3 COM
TX_FB_RX_IN_N
C4104_RF 27PF
0805
16
4 COM
LO
1 50_LB_COUPLER_DIPLEXER_IN
16
IN
56
IN
55
1
50_TX_LB1_LB_GSM
50_TX_LB1_LB_GSM_MATCH 1
2% 16V CERM 01005 RADIO_TRANSCEIVER
GND
PIN TX_HMB1 CANNOT BE ALLOCATED TO A HB DUE TO VCO PROXIMITY ON CHIP
2
L4101_RF 10NH-3%-140MA
5 2
42
16
R4101_RF 0.00 2 50_TX_LB1_LB_GSM_PA_IN 1 0% 1/32W MF 01005 RADIO_TRANSCEIVER
01005 NOSTUFF RADIO_TRANSCEIVER 2
C4105_RF 27PF
C
16
1
50_TX_MB1_B1_B25_B34_B39
2
50_TX_MB1_B1_B25_B34_B39_PA_IN
C
2% 16V CERM 01005 RADIO_TRANSCEIVER
L4103_RF
1.2NH+/-0.1NH-0.550A 16
1
50_TX_HMB2_B38_B40_B41
2
50_TX_HMB2_B38_B40_B41_PA_IN
01005
RADIO_TRANSCEIVER 1
C4106_RF 1.4PF
+/-0.1PF 2 16V NP0-C0G 01005
RADIO_TRANSCEIVER
C4107_RF 27PF 16
1
50_TX_HMB3_B3_B4
50_TX_HMB3_B3_B4_MATCH 1
2% 16V CERM 01005 RADIO_TRANSCEIVER
B12/13 TX INTERSTAGE FILTER REMOVED
B
2
L4104_RF
R4104_RF 0.00 2 50_TX_HMB3_B3_B4_PA_IN 1 0% 1/32W MF 01005 RADIO_TRANSCEIVER
B
10NH-3%-140MA
2
01005 RADIO_TRANSCEIVER NOSTUFF
L4105_RF
R4105_RF
3.3NH+/-0.1NH-290MA 16
50_TX_HMB4_B30_B7
1
2
50_TX_HMB4_B30_B7_MATCH
01005
RADIO_TRANSCEIVER OMIT 1
C4108_RF
1
0.00
2
50_TX_HMB4_B30_B7_PA_IN
OUT
53
OUT
54
0% 1/32W MF 01005 RADIO_TRANSCEIVER
1.2PF
+/-0.1PF 2 16V NP0-C0G 01005-1
RADIO_TRANSCEIVER OMIT
C4109_RF
R4106_RF
27PF 16
50_TX_HMLB2_MB_GSM
1
2
50_TX_HMLB2_MB_GSM_MATCH
2% 16V CERM 01005 RADIO_TRANSCEIVER
1
L4106_RF
1
0.00
2
50_TX_HMLB2_MB_GSM_PA_IN
0% 1/32W MF 01005 RADIO_TRANSCEIVER
10NH-3%-140MA 01005 NOSTUFF RADIO_TRANSCEIVER
A
A
2 PAGE TITLE
CELLULAR TRANSCEIVER: TX PORTS DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
41 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
50 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
LOW BAND PA+DUPLEXERS
2
1
C4205_RF
4.1NH+/-0.1NH-0.5A-0.17OHM 50_PAD_ANT_B12
1
50_LB_ASM_IN_B12
2
BI
55
0201
RADIO_LB_PAD OMIT 1
L4203_RF
1
1.0PF
120-OHM-210MA 56 55 54 53 52 43
D
IN
1
75_RFFE2_SCLK_FILT
L4222_RF
56 55 54 53 52 43 39
BI
1
75_RFFE2_SDATA_BB
120-OHM-210MA 57 56 55 54 53 52 46 45 43 39 36
IN
1
RADIO_LB_PAD
2
IN
59 54 52 46 45 39 34
IN
1
2
1
PP_1V8LBPAD_VIO VOLTAGE=1.8V
19
L4204_RF
1
20%
1
C4202_RF 47PF 5%
2 6.3V X5R-CERM
C4214_RF 47PF
50_PAD_ANT_B28A
5% 2 16V CERM 01005 RADIO_LB_PAD
C4203_RF 47PF 5%
16V 2 CERM
01005 RADIO_LB_PAD
01005 RADIO_LB_PAD
1
01005 RADIO_LB_PAD
L4205_RF
50_PAD_ANT_B13
50_TX_VLB_PA_IN
NC
2
IN
R4202_RF 0.00 2 50_TX_LB_PA_IN 1
50_TX_LB_PA_IN_MATCH
L4202_RF 10NH-3%-250MA
35 36 37 38
0201 RADIO_LB_PAD OMIT
RADIO_LB_PAD NOSTUFF 2
C4208_RF
1
50_LB_ASM_IN_B13
2
SCLK 9
C
L4215_RF 2.2PF
+/-0.1PF 2 25V C0G-CERM 0201
+/-0.05PF 2 25V C0G-CERM 0201
RADIO_LB_PAD NOSTUFF
C4209_RF
ANT B12/B17 ANT B28B/B29 ANT B28A ANT B13 ANT B27
LGA RADIO_LB_PAD OMIT
2.7NH+/-0.1NH-0.6A
16 18 20 23 25
50_PAD_ANT_B27
1
50_LB_ASM_IN_B27
2
BI
55
0201
RADIO_LB_PAD OMIT 1
1
L4207_RF
L4216_RF 0.9PF
0.4PF
ANT B26 29 ANT B20 31 ANT B8 33
RX B8 RX LB RX VLB RX B29
+/-0.05PF 2 25V C0G-CERM 0201
+/-0.05PF 2 25V C0G 201
RADIO_LB_PAD NOSTUFF
RADIO_LB_PAD OMIT
EPAD 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57
3 5 11 12 13 14 15 17 19 21 22 24 26 28 30 32 34 39 42 1 27
1
L4206_RF RADIO_LB_PAD OMIT
LB-PAD
GND
B
0201
0.7PF
ULBPA_RF RFIN VLB RFIN LB
1% 1/20W MF 0201 RADIO_LB_PAD
1
2
2 4
1
SDATA 8
0201 RADIO_LB_PAD OMIT
50
39NH-5%-120MA
RADIO_LB_PAD OMIT
VIO 10
L4201_RF 10NH-3%-250MA
L4214_RF
0201
VCC2 40
C
55
1
2.4NH+/-0.1NH-0.6A
1% 1/20W MF 0201 RADIO_LB_PAD OMIT
1
BI
50_LB_ASM_IN_B28A
2
+/-0.05PF 2 25V C0G-CERM 0201
VCC1 41
50_TX_VLB_PA_IN_MATCH
1
1.0PF
VBATT 7
IN
2
RADIO_LB_PAD OMIT
2 16V CERM
NC 6
50
RADIO_LB_PAD NOSTUFF
0201
RADIO_LB_PAD OMIT
R4201_RF 0.00 2 1
55
0201
C4207_RF
1
C4201_RF 0.1UF
BI
39NH-5%-120MA
0.05PF 2 25V NP0-C0G 0201
3.7NH+/-0.1NH-0.5A
RADIO_LB_PAD 1
55
L4213_RF
0.5PF
PP_VBATT_PA_LB_HB
VOLTAGE=4.3V
01005
BI
1
RADIO_LB_PAD OMIT
2
D
50_LB_ASM_IN_B28B_B29
2
RADIO_LB_PAD OMIT
RADIO_LB_PAD
L4223_RF
PP_VCC_MAIN
1 0201
120-OHM-210MA 60
C4206_RF
75_RFFE2_SDATA_LBPAD
RADIO_LB_PAD
PP_QPOET_VCC_PA
RADIO_LB_PAD NOSTUFF
4.7NH+/-0.3%-0.4A 50_PAD_ANT_B28B_B29
01005 53 52 46
RADIO_LB_PAD OMIT
75_RFFE2_SCLK_LBPAD
+/-0.05PF 2 25V C0G-CERM 0201
01005
L4224_RF
PP_1V8_LDO15
2 01005
120-OHM-210MA
1.0PF
+/-0.05PF 2 25V C0G-CERM 0201
L4221_RF
L4212_RF
50_PRX_LB1_B8_GSM900_PAD
48
OUT
48
OUT
48
OUT
48
OUT
50_PRX_LB3_B20_B26_B27_GSM850_PAD 50_PRX_LB2_B12_B17_B13_B28_PAD
B
C4211_RF
50_PRX_LB4_B29_PAD
2.7NH+/-0.1NH-0.6A 50_PAD_ANT_B26
1
50_LB_ASM_IN_B26
2
BI
55
BI
55
BI
55
0201
RADIO_LB_PAD OMIT 1
L4209_RF
1
1.0PF
0.5PF
+/-0.05PF 2 25V C0G-CERM 0201
RADIO_LB_PAD OMIT
L4218_RF
+/-0.05PF 2 25V COG-CERM 0201
RADIO_LB_PAD NOSTUFF
C4212_RF
5.6NH+/-3%-0.4A 50_PAD_ANT_B20
1
50_LB_ASM_IN_B20
2 0201
RADIO_LB_PAD OMIT 1
L4210_RF
1
1.3PF
RADIO_LB_PAD OMIT
L4219_RF 2.0PF
+/-0.05PF 2 16V C0G 01005
+/-0.05PF 2 25V C0G-CERM 0201
RADIO_LB_PAD OMIT
C4213_RF
1.5NH+/-0.1NH-1.0A 50_PAD_ANT_B8
1 0201
1
RADIO_LB_PAD OMIT
A
1
50_LB_ASM_IN_B8
2
L4220_RF
L4211_RF 2.0PF
10NH-3%-250MA
+/-0.1PF 2 25V C0G-CERM 0201
A PAGE TITLE
CELLULAR FRONT END: LB PAD
0201 RADIO_LB_PAD NOSTUFF
RADIO_LB_PAD OMIT
DRAWING NUMBER
2
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
42 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
51 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
MID BAND PA+DUPLEXERS D
D 56 55 54 53 51 43
IN
56 55 54 53 51 43 39
BI
75_RFFE2_SCLK_FILT 75_RFFE2_SDATA_BB
L4307_RF
120-OHM-210MA 57 56 55 54 53 51 46 45 43 39 36
IN
1
PP_1V8_LDO15
PP_1V8_LDO15_MB_PAD VOLTAGE=1.8V
2 01005
53 51 46
60
59 54 51 46 45 39 34
IN
IN
RADIO_MB_PAD
PP_QPOET_VCC_PA PP_VCC_MAIN
1
1
C4301_RF 0.1UF
20% 2 6.3V X5R-CERM 01005 RADIO_MB_PAD
1
C4302_RF 100PF
5% 2 16V NP0-C0G 01005 RADIO_MB_PAD
1
1
C4303_RF 0.1UF
C4309_RF 47PF
20% 2 6.3V X5R-CERM 01005 RADIO_MB_PAD
1
0% 1/32W MF 01005 2 RADIO_MB_PAD PP_VCC1_MB_PA VOLTAGE=4.0V
C4308_RF 12PF 5%
5% 2 16V CERM 01005
16V 2 CERM
RADIO_MB_PAD
R4301_RF 0.00
01005 RADIO_MB_PAD
C4305_RF
3.2NH+/-0.1NH-0.5A 1
50_PAD_ANT_B1_B3_B4
2
50_MB-HB_ASM_IN_B1_B3_B4
BI
56
0201
C
C
10
1
SCLK
SDATA 9
VIO 11
VCC2 39
VCC1 40
VBATT 8
RADIO_MB_PAD 1
L4301_RF
0.7PF
0.6PF
+/-0.05PF 2 25V C0G-CERM 0201
+/-0.05PF 2 25V CERM 0201
RADIO_MB_PAD
RADIO_MB_PAD 50 50
IN IN
48
OUT
48
OUT
48
OUT
48
OUT
48
OUT
UMBPA_RF MB-PAD
3 RFIN_B3/B4 5 RFIN_B1/B25/B34/B39
50_TX_HMB3_B3_B4_PA_IN 50_TX_MB1_B1_B25_B34_B39_PA_IN
ANT_B25/B4CA 25 ANT_B34/B39 15
17 RX_B34/B39/B2CA 19 RX_B25 21 RX_B4CA
50_PRX_MLB6_B34_B39_B2CA_PAD 50_PRX_MB5_B25_GSM1900_PAD 50_PRX_MB1_B4CA_PAD
C4306_RF
ANT_B1/B3/B4 35
LGA RADIO_MB_PAD
3.0NH+/-0.1NH-0.6A 1
50_PAD_ANT_B25_B4CA
2 0201
1
50_MB-HB_ASM_IN_B25_B4CA
L4302_RF
56
BI
56
L4305_RF
0.8PF
10NH-3%-0.14A-2.1OHM
+/-0.05PF 2 16V C0G-CERM 01005
01005 RADIO_MB_PAD NOSTUFF
RADIO_MB_PAD
GND
BI
1
RADIO_MB_PAD
27 RX_B3 31 RX_B1/B4
50_PRX_MB3_B3_GSM1800_PAD 50_PRX_MB2_B1_B4_PAD
L4304_RF
2
C4307_RF
EPAD 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
1 2 4 6 7 12 13 14 16 18 20 22 23 24 26 28 29 30 32 33 34 36 37 38
1.8NH+/-0.1NH-0.8A 50_PAD_ANT_B34_B39
1
2
50_MB-HB_ASM_IN_B34_B39
0201
RADIO_MB_PAD 1
L4303_RF 0.2PF
+/-0.05PF 2 25V COG-CERM 0201
B
RADIO_MB_PAD
1
L4306_RF 0.3PF
+/-0.05PF 2 16V C0G-CERM 01005
B
RADIO_MB_PAD NOSTUFF
A
A PAGE TITLE
CELLULAR FRONT END: MB PAD DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
43 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
52 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
HIGH BAND PA+DUPLEXERS D
D 56 55 54 52 51 43
IN
56 55 54 52 51 43 39
BI
57 56 55 54 52 51 46 45 43 39 36
IN
52 51 46
IN
51
IN
75_RFFE2_SCLK_FILT 75_RFFE2_SDATA_BB
PP_1V8_LDO15 PP_QPOET_VCC_PA
C4405_RF
PP_VBATT_PA_LB_HB
22PF
50_PAD_ANT_B40A_B41A
HB PAD VBATT DECOUPLING CAPS ARE SHARED WITH LB PAD AT C4201_RF AND C4202_RF.
1
C4403_RF 0.1UF
20% 2 6.3V X5R-CERM 01005 RADIO_HB_PAD
1
C4410_RF
1
1
50_MB-HB_ASM_IN_B40A_B41A
5% 6.3V NP0-C0G 0201
47PF
5% 2 16V CERM 01005
2
L4401_RF
1
RADIO_HB_PAD OMIT
8.2NH-3%-0.3A
56
BI
56
L4406_RF 0.5PF
0.05PF 2 25V NP0-C0G 0201
0201 RADIO_HB_PAD OMIT
RADIO_HB_PAD OMIT
BI
RADIO_HB_PAD OMIT
2
C4406_RF
1.8NH+/-0.1NH-0.8A 50_PAD_ANT_B40B_B41C
1
2
50_MB-HB_ASM_IN_B40B_B41C
0201
RADIO_HB_PAD OMIT
IN
50
IN
48
OUT
48
OUT
48
OUT
50_PRX_HB3_B38_B40_B41_PAD 50_PRX_HB1_B7_PAD 50_PRX_HB4_B30_PAD
28 9 40
RFIN_B7/B30 RFIN_B38/B40/B41
SCLK 24
VIO 23
35 VCC2
VCC1
32 30
SDATA 25
50_TX_HMB4_B30_B7_PA_IN 50_TX_HMB2_B38_B40_B41_PA_IN
RADIO_HB_PAD OMIT
ANT_B40A/B41A ANT_B40B/B41C ANT_B38/B41B ANT_B7 ANT_B30
LGA RADIO_HB_PAD OMIT
RX_B38/B40/B41 RX_B7 RX_B30
20 14 11 6 3
C4407_RF 33PF
50_PAD_ANT_B38_B41B
1
1
L4403_RF
10NH-3%-0.3A
EPAD
1 2 4 5 7 8 10 12 13 15 16 17 18 19 21 22 27 29 31 33 36 37 38 39
C
+/-0.05PF 25V 2 COG-CERM 0201
UHBPA_RF HB-PAD
GND
L4407_RF 0.5PF
2 5% 25V C0G 0201
RADIO_HB_PAD OMIT
50_MB-HB_ASM_IN_B38_B41B
1
BI
56
BI
56
L4408_RF 0.2PF
+/-0.05PF 2 25V COG-CERM 0201
0201
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
50
VBATT
26
C
34
1
RADIO_HB_PAD OMIT
RADIO_HB_PAD NOSTUFF
2
C4408_RF 33PF
50_PAD_ANT_B7 1
L4404_RF 15NH-3%-0.3A-0.7OHM
1
50_MB-HB_ASM_IN_B7
2
2% 25V NPO-COG 0201
RADIO_HB_PAD OMIT
0201 RADIO_HB_PAD OMIT 2
B
B
C4409_RF 33PF
50_PAD_ANT_B30
1
2
2% 25V NPO-COG 0201
1
L4405_RF
50_MB-HB_ASM_IN_B30
L4410_RF
RADIO_HB_PAD OMIT
10NH-3%-250MA 0201 RADIO_HB_PAD OMIT
0201
2
56
1
10NH-3%-0.3A RADIO_HB_PAD NOSTUFF
BI
2
A
A PAGE TITLE
CELLULAR FRONT END: HB PAD DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
44 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
53 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
2G PA D
D XW4500_RF SM
60 59 54 52 51 46 45 39 34
60 59 54 52 51 46 45 39 34
IN
IN
PP_VCC_MAIN
1
R4501_RF 0 2 1
PP_VCC_MAIN
5% 1/20W MF C4501_RF 0201 56PF RADIO_2G_PA 5% 25V 2 NP0-C0G-CERM 01005 RADIO_2G_PA
2
PP_VCC_MAIN_2G_PA
PP_VBATT_PA_FILT VOLTAGE=4.3V
1
1
1
C4503_RF 1UF
C4506_RF 0.1UF
20% 2 6.3V X5R-CERM 01005 RADIO_2G_PA
20% 2 10V X5R 0201 RADIO_2G_PA
1
C4505_RF 15UF
20% 2 6.3V X5R 0402-1
RADIO_2G_PA
1
C4510 = 1NF? (TBD)
C4510_RF 1UF 20%
2 10V X5R
0201 RADIO_2G_PA
C4507_RF 27PF
1
VBATT
VCC 1
U2GPA_RF 2G-PA 50
50
C
IN IN
57 56 55 53 52 51 46 45 43 39 36
IN
56 55 53 52 51 43 39
BI
56 55 53 52 51 43
IN
7 LBRFIN
50_TX_LB1_LB_GSM_PA_IN 50_TX_HMLB2_MB_GSM_PA_IN
12 HBRFIN
PP_1V8_LDO15 75_RFFE2_SDATA_BB 75_RFFE2_SCLK_FILT
11 VIO 9 SDATA 10 SCLK
LGA LBRFOUT
1
HBRFOUT
6
L4501_RF
L4503_RF
RADIO_2G_PA
01005 RADIO_2G_PA NOSTUFF
10NH-3%-0.170A
2
C C4508_RF
13
2 4 5
27PF
50_PA_2G_MB
1
C4502_RF 0.1UF 20%
1
2
5% 6.3V NP0-C0G 0201 RADIO_2G_PA
L4502_RF 0.7PF
01005 RADIO_2G_PA
1
+/-0.05PF 25V 2 COG-CERM 0201
EPAD
6.3V 2 X5R-CERM
55
OUT
0.5PF
GND
1
50_LB_ASM_IN_2G_TX
2
5% 6.3V NP0-C0G 0201 RADIO_2G_PA
3
8
50_PA_2G_LB
50_MB-HB_ASM_IN_2G_TX
1
OUT
56
L4504_RF 0.7PF
+/-0.05PF 2 25V C0G-CERM 0201
+/-0.05PF 2 25V C0G-CERM 0201
RADIO_2G_PA NOSTUFF
RADIO_2G_PA NOSTUFF
B
B
A
A PAGE TITLE
CELLULAR FRONT END: 2G PA DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
45 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
54 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
LOW BAND ANTENNA SWITCH MODULE D
D
56 54 53 52 51 43
IN
56 54 53 52 51 43 39
IN
75_RFFE2_SCLK_FILT 75_RFFE2_SDATA_BB
L4605_RF
120-OHM-210MA 57 56 54 53 52 51 46 45 43 39 36
IN
PP_1V8_LDO15
1
2
PP_1V8_LBASM_VIO VOLTAGE=1.8V
01005
RADIO_LB_ASM
PP_2V8_LDO14
0.1UF
20% 2 6.3V X5R-CERM 01005
C
C4602_RF 100PF
5% 2 16V NP0-C0G 01005 RADIO_LB_ASM
1
50_LB_COUPLER_DIPLEXER_IN
C4603_RF
54
IN
51
BI
51
BI
51
BI
51
BI
51
BI
51
BI
57
OUT
51
BI
51
BI
C
RADIO_LB_ASM
1 2 3 4
TRX1 TRX2 TRX3 TRX4
6 7 14 15 16 17
C4604_RF
1.5NH+/-0.1NH-1.0A 50_LB_ASM_ANT1
ULASM_RF
1
L4601_RF
37
BI
37
L4603_RF 10NH-3%-250MA
+/-0.05PF 2 25V C0G-CERM 0201
0201 RADIO_LB_ASM NOSTUFF
RADIO_LB_ASM OMIT
ANT2 12
BI
1
1.2PF
ANT1 9
LGA RADIO_LB_ASM
50_LB_ASM_ANT1_LAT
2
RADIO_LB_ASM
CPL_OUT 19
TRX6 TRX7 TRX8 TRX9 TRX10 TRX11
1 0201
LB-ASM 50_LB_ASM_IN_B27 50_LB_ASM_IN_B13 50_LB_ASM_IN_B12 50_LB_ASM_LB_DRX_OUT 50_LB_ASM_IN_B28B_B29 50_LB_ASM_IN_B8
50
20% 2 6.3V X5R-CERM 01005
VCC
50_LB_ASM_IN_2G_TX 50_LB_ASM_IN_B20 50_LB_ASM_IN_B26 50_LB_ASM_IN_B28A
OUT
0.1UF
21
RADIO_LB_ASM
1
SCLK 23
C4601_RF
22
1
SDATA
IN
VIO 24
57 56 45 36
2
C4605_RF
3.0NH+/-0.1NH-0.6A 50_LB_ASM_ANT2 GND
EPAD 25 26 27 28
RADIO_LB_ASM
1
L4602_RF 10NH-3%-250MA
L4604_RF 10NH-3%-250MA
0201 RADIO_LB_ASM NOSTUFF
0201 RADIO_LB_ASM NOSTUFF
2
B
50_LB_ASM_ANT2_COAX_LOW
2 0201
1
5 8 10 11 13 18 20
1
2
B
A
A PAGE TITLE
CELLULAR FRONT END: LB ASM DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
46 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
55 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
MID-HIGH BAND ANTENNA SWITCH MODULE D
D
IN
57 55 54 53 52 51 46 45 43 39 36
IN
57 55 45 36
IN
75_RFFE2_SDATA_BB PP_1V8_LDO15 PP_2V8_LDO14
1
C
C4701_RF 0.1UF
20% 2 6.3V X5R-CERM 01005
C4702_RF 100PF
5% 2 16V NP0-C0G 01005 RADIO_MB-HB_ASM
1
C4703_RF
50_MB-HB_COUPLER_DIPLEXER_IN
EVT ASM ASSIGNMENT: B40B/B41C - TRX2 B30 - TDD3
53
BI
52
BI
53
BI
52
BI
54
IN
52
BI
53
BI
53
BI
53
BI
57
OUT
57
OUT
TRX2 TRX3 TRXB7 TRXB1/B3/B4 MB2GTX
C4704_RF 2.6NH-+/-0.1NH-0.6A-0.12OHM 50_MB-HB_ASM_ANT1
UHASM_RF MB-HB-ASM LGA RADIO_MB-HB_ASM
1
RADIO_MB-HB_ASM CPL_OUT
26
1
50_MB-HB_ASM_ANT1_LAT
2 0201
TDD1 TDD2 TDD3 TDD4
ANT1
15
ANT2
18
BI
37
1
L4701_RF
L4703_RF 10NH-3%-250MA
0.1PF
+/-0.05PF 2 25V C0G 0201
0201 NOSTUFF RADIO_MB-HB_ASM 2
C4705_RF
10 HBDIV 12 MBDIV
50_MB-HB_ASM_HB_DRX_OUT 50_MB-HB_ASM_MB_DRX_OUT
C
RADIO_MB-HB_ASM
5 7 8 9
50_MB-HB_ASM_IN_B34_B39 50_MB-HB_ASM_IN_B40A_B41A 50_MB-HB_ASM_IN_B30 50_MB-HB_ASM_IN_B38_B41B
50
20% 2 6.3V X5R-CERM 01005
2 3 4 28 30
50_MB-HB_ASM_IN_B40B_B41C 50_MB-HB_ASM_IN_B25_B4CA 50_MB-HB_ASM_IN_B7 50_MB-HB_ASM_IN_B1_B3_B4 50_MB-HB_ASM_IN_2G_TX
OUT
0.1UF
VCC 21
RADIO_MB-HB_ASM
1
SCLK 23
55 54 53 52 51 43 39
75_RFFE2_SCLK_FILT
SDATA 24
IN
VIO 22
55 54 53 52 51 43
27PF
GND
EPAD
50_MB-HB_ASM_ANT2
31 32 33 34
1 6 11 13 14 16 17 19 20 25 27 29
1
B
L4705_RF 10NH-3%-250MA
1
50_MB-HB_ASM_ANT2_COAX_LOW
2
5% 6.3V NP0-C0G 0201 RADIO_MB-HB_ASM
37
1
B
L4706_RF 10NH-3%-250MA
0201 NOSTUFF RADIO_MB-HB_ASM 2
BI
0201 NOSTUFF RADIO_MB-HB_ASM 2
A
A PAGE TITLE
CELLULAR FRONT END: MB-HB ASM DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
47 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
56 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
8
7
6
5
4
3
2
1
DIVERSITY MODULE D
D
43
IN
43 39
IN
75_RFFE3_SCLK_FILT 75_RFFE3_SDATA_BB
L4804_RF
120-OHM-210MA 56 55 54 53 52 51 46 45 43 39 36
PP_1V8_LDO15
IN
1
PP_1V8_DIVASM_VIO VOLTAGE=1.8V
2 01005
RADIO_DRX_ASM 56 55 45 36
PP_2V8_LDO14
IN
1
C4801_RF 0.1UF 20%
C
2 6.3V X5R-CERM
01005 RADIO_DRX_ASM
1
1
C4802_RF 100PF 5%
C4803_RF 0.1UF 20%
2 16V NP0-C0G
C
2 6.3V X5R-CERM
01005 RADIO_DRX_ASM
01005 RADIO_DRX_ASM
C4804_RF 15PF
49
OUT
49
OUT
49
OUT
49
OUT
49
OUT
49
OUT
49
OUT
49
OUT
49
OUT
49
OUT
49
OUT
49
OUT
50_DRX_LB1_B27_B29 50_DRX_LB2_B26_B13_B17_B12 50_DRX_LB3_B28 50_DRX_LB4_B8_B20 50_DRX_MB1_B1 50_DRX_MLB6_B3 50_DRX_MB5_B25 50_DRX_MB4_B34_B39 50_DRX_MB3_B4
50_DRX_HB2_B7_B41C 50_DRX_HB4_B30_B38_B41B 50_DRX_HB3_B40_B41A
27 29 30 32 1 35 36 37 38
VDD
B27/B29 B12/B13/B17/B26 B28 B8/B20
VIO
SDATA
50_LB_ASM_LB_DRX_OUT
55
IN
56
RADIO_DRX_ASM
L4801_RF
22NH-3%-0.25A 0201
RADIO_DRX_ASM
LGA RADIO_DRX_ASM
2
LBIN
15
50_DRX_ASM_LB_IN
MBIN
18
50_DRX_ASM_MB_IN
HBIN
21
50_DRX_ASM_HB_IN
C4805_RF 10PF
3 B7/B41C 5 B38/B41B/B30 6 B41A/B40
1
2
50_MB-HB_ASM_MB_DRX_OUT
5% 25V CER 0201
1
RADIO_DRX_ASM
L4802_RF
1
12NH-3%-0.3A-0.5OHM
GND
EPAD
2 4 7 12 13 14 16 17 19 20 22 23 24 25 26 28 31 33 34
39 40 41 42 43 44 45 46 47
C4807_RF 0.1UF 20%
0201
2 6.3V X5R-CERM
RADIO_DRX_ASM
B
IN
5% 25V NPO 0201
1
SCLK
UDIVA_RF DIVERSITY-MODULE
B1 B3 B25 B34/B39 B4
2
9
8
10
11
1
01005 RADIO_DRX_ASM NOSTUFF
2
B
C4806_RF
2.5NH+/-0.1NH-0.6A 1
2
50_MB-HB_ASM_HB_DRX_OUT
IN
56
0201
RADIO_DRX_ASM
1
2
1
L4803_RF 10NH-3%-250MA
L4805_RF 10NH-3%-250MA
0201 RADIO_DRX_ASM NOSTUFF
0201 RADIO_DRX_ASM NOSTUFF 2
A
A PAGE TITLE
CELLULAR FRONT END: DIVERSITY DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
48 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
57 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
SIM D
D
C
C 11 7 5
PP_UIM2_LDO13
1 1
C3010_RF
R3013_RF 15.00K
2.2UF
20% 2 6.3V X5R-CERM 0201
2
A1
RADIO_BB
1% 1/32W MF 01005 RADIO_BB
VCC
U5101_RF VINYL IN
43 39
IN
NC
D1 CLK D2 RST B3 SWP
NC
B2 NC
SIM2_CLK SIM2_RESET
WLCSP OMIT
GPIO0 GPIO1 GPIO2 GPIO3
A2 B1 D3 C1
IO0 C3 GND
NC NC NC NC 5
SIM2_DATA_R
R3014_RF 1
0.00 0% 1/32W MF 01005
A3
43 39
2
SIM2_DATA
BI
39 43
RADIO_BB
B
B
A
A PAGE TITLE
SIM DRAWING NUMBER
Apple Inc.
051-00094 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
49 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
58 OF 60
IV ALL RIGHTS RESERVED
2
1
SIZE
D
8
7
6
5
4
3
2
1
WIFI/BT R5213_RF 2
25
1
C5201_RF
1
27PF
D
C
73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
B
U5200_RF
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
LBEE5UM1EE-775 LGA SYM 2 OF 2
THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD
C2500_RF
1
10% 2 6.3V X5R 01005
20% 2 6.3V X5R-CERM1 402
PMU_TO_WLAN_32K_CLK
OUT
UART4_AP_TO_WLAN_TX UART4_WLAN_TO_AP_TX
14 GPIO_11_FAST_UART_RX 13 GPIO_12_FAST_UART_TX
OUT
UART4_WLAN_TO_AP_RTS_L
15 GPIO_7_FAST_RTS_OUT
IN
PMU_TO_WLAN_REG_ON
29 WL_REG_ON
IN
PMU_TO_BT_REG_ON
39 34
IN
59
39 34
IN
59
39 34
C5283_RF 4.7UF
41 CLK32K_AP
59
5 11 12 17 18 20 26
1
C5284_RF 4.7UF
BT_GPIO_4 10
PP_WL_VDDIO
25
39
NO STUFF 1
R5200_RF
59
34
39 34
10K
5% 1/32W MF 2 01005
59
39 34
IN
IN
1
UART4_AP_TO_WLAN_RTS_L
2
XW2_RF SM 43 39
IN
1
UART_BB_TO_WLAN_COEX_TX
25
GPIO_2_JTAG_TCK
25
GPIO_3_JTAG_TMS GPIO_6_JTAG_TRST GPIO_4_JTAG_TDI
25
2 25
OUT
1
UART_WLAN_TO_BB_COEX_TX
25
2
39 34 OUT
23 21 18 19
GPIO_5_JTAG_TDO
BT_TO_PMU_HOST_WAKE
GPIO_3_JTAG_TMS GPIO_6_SEC_IN/JTAG_TRST GPIO_4_JTAG_TDI GPIO_5_SEC_OUT/JTAG_TDO
50_G_1_MATCH_MOD
2
50_A_0_MATCH_MOD 50_A_1_MATCH_MOD
25
OWL_TO_WLAN_CONTEXT_A
25 5
OWL_TO_WLAN_CONTEXT_B
P2MM-NSM SM 1
GPIO_13_WLAN_THROTTLE
P2MM-NSM SM 1
25 5
GPIO_2_JTAG_TCK
P2MM-NSM SM 1
25 5
A
PCIE_PME
GPIO_3_JTAG_TMS
P2MM-NSM SM 1
GPIO_6_JTAG_TRST
GPIO_4_JTAG_TDI
P2MM-NSM SM 1
GPIO_5_JTAG_TDO
PCIE_AP_TO_WLAN_TX_P
P2MM-NSM SM 1 P2MM-NSM SM 1 P2MM-NSM SM 1
3 BT_GPIO_3 2 BT_GPIO_5
P2MM-NSM SM 1
25 5
PCIE_AP_TO_WLAN_TX_N
P2MM-NSM SM 1
PP
P2MM-NSM SM 1
OMIT
25 5
OMIT
PMU_TO_WLAN_REG_ON
25 5
OMIT
25 5
UART1_AP_TO_BT_RTS_L
OMIT
PMU_TO_BT_REG_ON
34 39
59
IN
34 39
59
OUT
34 39
59
IN
34 39
IN
34 39
OUT
34 39
IN
34 39
OWL_TO_WLAN_CONTEXT_A OWL_TO_WLAN_CONTEXT_B SRVTX
25
OUT
34 39
59
25
BI IN
IN
34 39
59
IN
34 39
59
OUT
34 39
OUT
34 39
IN
34 39
59
IN
34 39
59
34 39 34 39
59
5 25 5 25
L5201_RF
2.2UH-20%-1.05A-0.194OHM 2
B
0805
C5200_RF
25 5
25 5
UART1_BT_TO_AP_RTS_L PCIE_AP_TO_WLAN_DEV_WAKE
P2MM-NSM SM 1
BT_TO_PMU_HOST_WAKE
P2MM-NSM SM 1 P2MM-NSM SM 1
PCIE_AP_TO_WLAN_PERST_L
P2MM-NSM SM 1
1
C5209_RF 0.2PF
0.00
F-ST-SM1
2
50_AG_1_LAT_COAX
0% 1/32W MF 01005
1
C5210_RF 0.2PF
+/-0.1PF 2 16V NP0-C0G 01005
+/-0.1PF 2 16V NP0-C0G 01005
NO STUFF
OMIT
1
NO STUFF
OMIT
R5202_RF 25
50_A_1_MATCH_MOD
1
0.00
2
50_A_1_DPLX
LAST UPDATED: 4/14/2014
0% 1/32W MF 01005
OMIT 1
OMIT
C5215_RF 0.2PF
+/-0.1PF 16V 2 NP0-C0G 01005
OMIT
SYNC_MASTER=WIFI
SYNC_DATE=01/30/2014
PAGE TITLE
1
C5205_RF
WIFI/BT: WIFI/BT MODULE
0.3PF
+/-0.05PF 2 16V C0G-CERM 01005
DRAWING NUMBER
Apple Inc.
NO STUFF
051-00094 REVISION
4.0.0
R
PP
PP5306_RF UART4_AP_TO_WLAN_TX
P2MM-NSM SM 1
OMIT
PP
OMIT
PP5307_RF 25 5
OMIT
50_AG_1_DPLX 1
GND
MM5829-2700
R5205_RF P3 2
6 P2
PP
OMIT
PP
4 P1
OMIT
PP
PP5305_RF
25 5
JWLAT_RF
LLP
PP
OMIT 25 5
F5202_RF
PP
PP5303_RF
P2MM-NSM SM 1 P2MM-NSM SM 1
P2MM-NSM SM 1
PP5302_RF
PP
OMIT
OUT
LFD212G45MJCD900
PP
PP5203_RF
PP5286_RF 25 5
UART1_BT_TO_AP_TX
P2MM-NSM SM 1
PP5202_RF
PP5287_RF 25 5
P2MM-NSM SM 1
PP5201_RF
PP
OMIT
PP
P2MM-NSM SM 1
4
PP
PP
PP5301_RF OMIT
UART1_AP_TO_BT_TX
PP
PP
PP5298_RF 25
OMIT
OMIT
25 5
PP
PP5297_RF 25
P2MM-NSM SM 1
PP5300_RF 25 5
PP5296_RF 25
25 5
PCIE_AP_TO_WLAN_REFCLK_N
PP
PP5295_RF 25
OMIT
59
WIFI LAT COAX CONNECTOR
PP5299_RF
P2MM-NSM SM 1
34 39
20% 2 6.3V X5R-CERM1 402
PP
PP
PP5294_RF 25
PCIE_AP_TO_WLAN_REFCLK_P
IN
4.7UF
PP5289_RF OMIT
PCIE_AP_TO_WLAN_TX_P PCIE_AP_TO_WLAN_TX_N PCIE_WLAN_TO_AP_TX_P PCIE_WLAN_TO_AP_TX_N PCIE_AP_TO_WLAN_REFCLK_P PCIE_AP_TO_WLAN_REFCLK_N
1
PP
PP
PP5293_RF 25
WLAN_TO_PMU_HOST_WAKE
50 49 47 46 44 43 11 12
1
PP5285_RF OMIT
PCIE_PME PCIE_WLAN_TO_AP_CLKREQ_L PCIE_AP_TO_WLAN_PERST_L
VIN_LDO
PP
PP
PP5292_RF 25
25 5
PCI_PME 52 PCIE_CLKREQ 53 PERST 54
VIN_LDO 31
PP5200_RF PMU_TO_WLAN_32K_CLK
WLAN_TO_PMU_HOST_WAKE
SR_VLX 33
OMIT
OMIT
I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCK I2S_BT_TO_AP_DOUT I2S_AP_TO_BT_DOUT
GPIO_0_WL_HOST_WAKE 38
62 5G_ANT_CORE0 26 5G_ANT_CORE1 NC NC
PP5288_RF
PP5291_RF
60 64 65 59
PCIE_RDP0 PCIE_RDN0 PCIE_TDP0 PCIE_TDN0 PCIE_REFCLKP PCIE_REFCLKN GPIO_14_WL_UART_RX GPIO_15_WL_UART_TX
WLAN LAT 2.4GHZ BAW BPF ON CSA 4
PP
BT_PCM_CLK BT_PCM_SYNC BT_PCM_OUT BT_PCM_IN
1 3 5
25 5
P2MM-NSM SM 1
UART1_AP_TO_BT_TX UART1_BT_TO_AP_TX UART1_AP_TO_BT_RTS_L UART1_BT_TO_AP_RTS_L
GPIO_13_WLAN_THROTTLE
57 2G_ANT_CORE0 69 2G_ANT_CORE1
4
8 9 7 6
GPIO_13_WLAN_THROTTLE 24
5 HOST_WAKE_BT
50_G_0_MATCH_MOD
2
BT_UART_RXD BT_UART_TXD BT_UART_CTS* BT_UART_RTS*
C
XW3_RF 59
34 39
39 GPIO_1_HSIC_HOST_READY 22 GPIO_2_HSIC_RESUME/JTAG_TCK
SM 43 39
17 ANT_SWITCH_CORE1 16 ANT_SWITCH_CORE0
PCIE_AP_TO_WLAN_DEV_WAKE
XW1_RF SM 34
LGA
37 JTAG_SEL NC NC
39
IN
U5200_RF
28 BT_REG_ON
JTAG_WLAN_SEL
39 34
AP_TO_BT_WAKE
LBEE5UM1EE-775 SYM 1 OF 2
59
NC
BT_WAKE 4
50_G_1_DPLX
PP5290_RF
D
20% 2 6.3V X5R-CERM1 402
4 3 2
1 20 25 27 32 34 40 42 45 48 51 55 56 58 61 63 66 67 68 70 71 72
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162
PP_VCC_MAIN VOLTAGE=4.3V
0.01UF
5% 16V 2 NP0-C0G 01005
THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD
PP_WL_VDDIO VOLTAGE=1.8V
0% 1/32W MF 01005
35 36
0.00
BATT_VCC BATT_VCC
1
30
PP_1V8_S2R_VDDIO_WLAN_BT
VDDIO_1P8V
5
UART4_WLAN_TO_AP_TX
P2MM-NSM SM 1
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
50 OF 51
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
OMIT
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
PP
SHEET
59 OF 60
IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
1
SIZE
D
A
7
6
5
STOCKHOLM
4
A3 VIN
7 8 9 11
C5321_RF
1
15UF
2 0603 STOCKHOLM_BOOST_SW
20% 2 6.3V X5R 0402-1
1 C5320_RF
0.1UF
B1 SW B2 SW
1.8UH-0.7A
VOUT A1 VOUT A2
STOCKHOLM_5V
1
B3 EN
20% 2 6.3V X5R-CERM 01005
26
D 1
C5322_RF
C5323_RF 15UF
15UF
C3 AGND
PP_VCC_MAIN
1
FAN48614BUC50X
WLCSP
RADIO_STOCKHOLM
INSTALL R5312 AND REMOVE R5311 WHEN VINYL PRESENT
1
U5302_RF
L5303_RF PP_1V8_LDO6
2
ALL NETNAMES NEED TO BE CHECKED
26 25 20 18 17 12 11 5
D
3
C1 PGND C2 PGND
8
20% 2 6.3V X5R 0402-1
20% 2 6.3V X5R 0402-1
STOCKHOLM_5V
26
STOCKHOLM_DC_BOOST_EN STOCKHOLM_TVDD
1UF
20% 2 10V X5R 0201
R5310_RF 2
STOCKHOLM_DVDD 26 5
PP_STOCKHOLM_1V8_S2R RADIO_STOCKHOLM
1 C5302_RF
R5314_RF
AVDD D7
VUP G2 TVDD E7
C6 C7 B5 D3 VDD_DVDD VBAT_VBAT2 SIM_PMU_VCC PVDD
20% 2 10V X5R 0201
IN
34
IN
39
34
OUT
39
34
IN
39
34
OUT
39 34
IN
26
TP5301_RF 1 TP5301 A
PP_STOCKHOLM_ESE
R5316_RF 1
TP-P55
0.00
2
STOCKHOLM_SPIM_MOSI
0% 1/32W MF 01005
C1 B1 D2 A1 E1 E3 E4 NC F4 NC B3 B4 NC E6 NC NC
1
0.00
2
STOCKHOLM_SIM_PRES
1UF
C5303_RF 0.22UF
20% 2 10V X5R 0201
560
1
2
5% 1/20W MF 201
160NH-10%-0.48A-0.33OHM 1
2
STOCKHOLM_ANT_MATCH
STOCKHOLM_BAL1
0402
1
C5310_RF
F1
NC A4 A7 A6 NC D5
4FF_SIM_SWP
37 39
BI
STOCKHOLM_SIM_PRES
STOCKHOLM_DWPM_DBG STOCKHOLM_DWPS_DBG
RXP F6 RXN F5
26
5
L5302_RF
5
160NH-10%-0.48A-0.33OHM
STOCKHOLM_RXP STOCKHOLM_RXN
TX1 G3 TX2 G5
1
2 1
60
SE2_PWR_REQ
NOSTUFF 1
1
C5315_RF
1000PF
NOSTUFF 1
C5316_RF
1000PF
560PF
2% 2 25V C0G-NP0 0201
2% 2 25V C0G-NP0 0201
C5318_RF
2% 2 25V NPO-C0G 0201
1
C5319_RF
100PF
TP5303_RF 1 A
2% 2 50V C0G 0201
TP-P55
TP5304_RF 1
NOSTUFF
A
TP-P55
C5314_RF 22PF
2
5% 50V C0G 0201
NOSTUFF
5 26
C5309_RF
S
2
G
Q5301_RF
1
DMP22D4UFA
2% 25V C0G-NP0 0201
DFN0806
0.1UF
20% 2 6.3V X5R-CERM 01005
2 5% 50V C0G 0201
C5311_RF
1000PF
1 C5317_RF
5 STOCKHOLM_ANT
1
SE2_SVDD_IN
RADIO_STOCKHOLM
2% 50V C0G 0201
22PF
2% 2 25V C0G-NP0 0201
PP_STOCKHOLM_1V8_S2R
2
1
820PF
34 39
1
1
STOCKHOLM_TX1 STOCKHOLM_TX2 IN
220PF
C5313_RF
STOCKHOLM_BAL0
0402
AP_TO_STOCKHOLM_DEV_WAKE
C
C5312_RF
RADIO_STOCKHOLM
SE2_PWR_REQ F2 SE2_SVDD_IN G1
0% 1/32W MF 01005
STOCKHOLM_RXP_CAP
L5301_RF
20% 2 10V CERM-X5R 0201
VMID F7 STOCKHOLM_VMID
26
2
2% 25V C0G-NP0 0201
RADIO_STOCKHOLM
1 C5304_RF 1
WKUP_REQ E5
XTAL2
E2
R5315_RF
0% 1/32W MF 01005
ESE_DWPM_DBG G7 ESE_DWPS_DBG G6
SMX_RST* SMX_CLK ESE_IO1 SPIM_MOSI SPIM_MISO SPIM_SCK
VSS
B
C3
SIM_IRQ SIM_SWIO SIM_PRES SPIM_NSS TX_PWR_REQ
TVSS PVSS
44 39
STOCKHOLM_TO_BBPMU_CLK_REQ 50_BBPMU_TO_STOCKHOLM_19P2M_CLK UART3_AP_TO_STOCKHOLM_TXD UART3_STOCKHOLM_TO_AP_TXD UART3_AP_TO_STOCKHOLM_RTS_L UART3_STOCKHOLM_TO_AP_RTS_L PMU_TO_STOCKHOLM_EN
1
PP_STOCKHOLM_ESE
2% 2 25V C0G-NP0 0201
G4 C2
OUT
UFLGA
DVSS DVSS
44 39
AP_TO_STOCKHOLM_FW_DWLD_REQ
A5 NC B2 A2 A3
IRQ PWR_REQ DWL CLK_REQ NFC_CLK_XTAL1 RX TX CTS RTS VEN
B6 C4
IN
D1
STOCKHOLM_TO_PMU_HOST_WAKE
AVSS AVSS AVSS
39 34
39
60
OUT
PN66V
D4 D6 F3
60
34
2
R5303_RF
1000PF
820PF
U5301_RF 39
1
0.00
VOLTAGE=1.80V
VOLTAGE=1.80V
1UF
C
C5308_RF
STOCKHOLM_AVDD
BAL1 3 UNBAL 4
0% 1/32W MF 01005
2 BAL0 1 GND
20% 2 10V X5R 0201
0.00
0805
1
T5301_RF
1UF
ATB201206E-20011
RADIO_STOCKHOLM
1 C5324_RF
SVDD B7 STOCKHOLM_SVDD ESE_VDD C5
26 25 20 18 17 12 11 5
RADIO_STOCKHOLM
1 C5330_RF
PP_VCC_MAIN
D
2
STOCKHOLM_RXN_CAP
R5304_RF 1
560
B
2
5% 1/20W MF 201
3
NOSTUFF
26 5
PP_STOCKHOLM_1V8_S2R 1 RADIO_STOCKHOLM
R5301_RF
100K 5% 1/32W MF 2 01005 60
39 34
IN
60
39 34
IN
NOSTUFF
PMU_TO_STOCKHOLM_EN AP_TO_STOCKHOLM_FW_DWLD_REQ
1 RADIO_STOCKHOLM
R5302_RF
100K 5% 1/32W MF 2 01005
A
A 60
39 34
IN
PAGE TITLE
AP_TO_STOCKHOLM_DEV_WAKE
STOCKHOLM
1 RADIO_STOCKHOLM
R5305_RF
DRAWING NUMBER
100K 5% 1/32W MF 2 01005
Apple Inc. R
051-00094 4.0.0
REVISION
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
7
6
5
4
3
2
51 OF 51 60 OF 60
SHEET
IV ALL RIGHTS RESERVED
8
SIZE
1
D