International Journal of Electrical and Electronics Engineering Research (IJEEER) ISSN 2250-155X Vol. 3, Issue 2, Jun 2013, 327-336 © TJPRC Pvt. Ltd.

HYBRID PS FULL BRIDGE AND LLC HALF BRIDGE DC-DC CONVERTER FOR LOWVOLTAGE AND HIGH-CURRENT OUTPUT APPLICATIONS P. HARI KRISHNA PRASAD1 & M. VENUGOPALA RAO2 1

Professor, Department of Electrical & Electronics Engineering, KL University, Vaddeswaram, Andhra Pradesh, India

2

Professor & Head of the Department, Department of Electrical & Electronics Engineering KL University, Vaddeswaram, Andhra Pradesh, India

ABSTRACT A hybrid phase shifted full bridge (PSFB) and LLC half bridge (HB) dc-dcconverter for low-voltage and highcurrent output applications is proposed in this paper. The PSFB shares its lagging leg with the LLC-HB and their outputs are parallel connected. When the output current is small, the energy of LLC network in combination with the energy stored in the leakage inductor of PSFB’s transformer can help the lagging leg switches to realize ZVS turn on, which can reduce voltage stress and avoid annoying voltage spikes over switches. For the power distribution at rated load, the PSFB converter undergoes most of the power while the LLC-HB converter working as an auxiliary part converts only a small portion of the total power. To improve the conversion efficiency, synchronous rectification technique for the PSFB dc-dc converter is implemented. Proper gating signals can ensure the synchronous rectifiers to behave as diodes and thus prevent the power flow from moving backwards. The design principle is given in view of ZVS for lagging leg switches and low trans-conductance of LLC converter. The validity and feasibility of the proposed converter have been verified by simulation and experimental results of a 2.5kW prototype.

KEYWORDS: DC-DC Power Convertors, IGBT INTRODUCTION Low voltage and high current converter has gained much attention since its wide applications such as welding, microwave oven and battery charger and so on. Of all these applications, high current is demanded to provide enough energy or sufficient temperature for welding or heating，or charging batteries in shorter times. While simultaneously, low voltage is required to guarantee safety. Phase shifted full bridge (PSFB) converter has been widely used in high power applications due to its advantages of high power output capability, light voltage stress andZVS realization of all switches without auxiliary circuits etc. But for the conventional PSFB converter, ZVS for lagging leg switches is difficult to achieve under light loads. Since it is the energy stored in the leakage inductance of transformer that ensures ZVS of lagging leg switches, it is beneficial to extend ZVS range by increasing the leakage inductance. However, it results in larger duty cycle loss, which limits converter’s ability to output high power. Besides, lower turn ratio of can increase reflected primary current of transformer, which can increase stored energy of leakage inductor and thus help to realize ZVS for lagging leg switches. But more serious voltage stress and overshoot of rectifiers would be caused that reduces the stability of converter. To achieve soft switching for lagging leg switches, many solutions have been provided in the literature. The solutions can be classified into two categories: one is ZVS forleading leg switches and ZCS for lagging leg switches. A blocking capacitor is added in the primary winding of transformer to make the current decay to zero during freewheeling

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intervals to ensure ZCS for lagging leg switches. The blocking capacitor is transferred to the secondary winding of transformer. Apart from providing ZCS condition, the capacitor can also clamp the voltage stress of rectifiers. An auxiliary circuit contains a resonance capacitor and two diodes are added in the output-end of PSFB converter, with ZCS for lagging leg switches, conducting loss reduction during the freewheeling intervals are achieved, and voltage stress over rectifying diodes are clamped as well. Other solutions are proposed to achieve ZVS for all the four switches. A saturable-inductor is introduced into the primary winding of transformer to extend ZVS range without significantly increasing duty cycle loss. But it results in larger conduction loss and it inhibits the integration of the application. A ZVS PSFB converter with controlled leakage inductance of transformer is proposed, the additional leakage inductor shares the same ferrite core with transformer, and thus core loss is reduced. A two-inductor rectifier is used in secondary side of transformer to achieve ZVS under light loads. However, the ZVS condition under heavy loads cannot be satisfied. The front-end of traditional PSFB converter is re-designed and many auxiliary circuits are introduced to solve the problem of soft switching. By introducing a resonant inductance and two clamping diodes, ZVS can be realized and the oscillation caused by reverse recovery of rectifier diodes can be eliminated. But the clamping diodes themselves will cause reverse recovery loss and issues. A reset winding in series with the resonant inductor is introduced to naturally turn off the clamping diodes and thus the reverse recovery loss is avoided. A solution that PSFB dc-dc converter shares its lagging leg with a LLC resonant half-bridge dc-dc converter is presented. ZVS can be obtained for lagging leg switches even for light loads. However, their outputs are series connected, which is very suitable to be used for high-voltage output applications. The LLC dc-dc converter undergoes almost half of the total power at rated load and it is actually open-loop controlled. The output voltage range is limited and narrow. For low-voltage and high-current output applications, the paper proposes a PSFB dc-dc converter that shares the lagging leg with a LLC half bridge dc-dc converter while their outputs are parallel connected. In this paper, the operation principles, mode analysis and design considerations of the proposed converter are illustrated in detail. Simulation and experiment results of a 2.5kW prototype are shown to verify its effectiveness. Since the proposed converter is used for high current output applications, to reduce the rectifying loss caused by diodes, synchronous rectification (SR) technique is applied.

OPERATION PRINCIPLES AND DESIGN CONSIDERATIONS

Figure 1: Circuit of Proposed Converter They share the lagging leg and their outputs are parallel connected. The PSFB converter includes four MOSFETs: S1 and S2 as the leading leg while S3 and S4 as the lagging leg; transformer TR1 with a central tap in the secondary side;

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two synchronous rectifiers SR1 and SR2 and an output inductor Lf. The LLC-HB converter includes two MOSFETs S3 and S4; transformer TR2 with a central tap in the secondary side, a resonant inductor Lr and a resonant capacitor Cr series connected with the primary side; two diodes in the secondary side as rectifiers. For the convenience of analysis, it is assumed that all the switches are ideal, C1=C2=Clead, C3=C4=Clag, and the DC input voltage Vin is constant. ZVS Condition for Lagging Leg Switches For the conventional PSFB converter, if the output current is small, the energy stored in the leakage inductance of transformer is not sufficient to ensure ZVS for lagging leg switches. To realize ZVS for lagging leg switches, the corresponding parasitic As shown in Figure 1, the proposed converter consists of a PSFB converter and a LLC HB converter capacitors must be fully charged and discharged during the dead time. Based on this, the limitation of output current can be obtained as follows:

(1) Where n1 is the turn ratio of TR1 and tdead

is the dead time between the PWM of twoMOSFETs in

one bridge. If the output current is lower than the value calculated in (1), ZVS cannot be achieved. Under this condition, LLC circuit is introduced to effectively solve the problem.To realize ZVS for switches, the current must lag behind the voltage. The phase between the switch current and switch voltage is determined by the input impedance of the LLC network, thus ZVS could only occur when it is inductive in nature. Before S4 is turned off,the front-end of PSFB is in the freewheeling interval and Lr is resonating with Cr, while themagnetizing inductor Lm is clamped by the reflected output voltage. After S4 is turned off, the energy stored in the leakage inductor Llk and LLC circuit charges and discharges theparasitic capacitors of lagging leg switches in combination. The equivalent circuit is shown in Figure 2.

Figure 2: The Equivalent Circuit after Sa is Turned off During the dead time, the five resonant components Lr, Llk, Cr, C3 andC4 are resonatingwith each other altogether. When C3andC4are fully charged and dischargedand the current flows through the parasitic diodes of S3, the resonant ends and the ZVS condition forS3 could be achieved.

(2) Here, ip and ir are values of TR1â€™s primary current and LLCâ€™s resonant current at the time when S4 is turned off, respectively. Their expressions are shown as follows:

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(3) Since the parameters of LLC circuits could be properly designed so that (2) is satisfied, the ZVS turn on for lagging lag switches could be achieved over the whole load range. Thusavoiding the annoying voltage overshoots and spikes of switches and improving the stability of the converter. Load Distribution Mechanism Since the converter is designed as a current source, the outputs of PSFB and LLC-HB are parallel connected. The load distribution mechanism between PSFB and LLC-HB will be discussed in this section.

(a) Figure 3: (a) Common Load for PSFB and LLC-HB;

(b) (b) Separated Loads for PSFB and LLC-HB

As showed in Figure 3(a), Rload is the load resistor of the proposed converter and it is also thecommon resistor of PSFB and LLC-HB. However, its equivalent circuit is plotted in Fig. 3(b), in which Rload can be separated into two parts, one for PSFB and the other for LLC-HB.As Figure 3(b) shows, Ro1 is the load resistor for PSFB while Ro2 is the load resistor forLLC-HB. Obviously, the relationship among Rload, Ro1 and Ro2 is:

(4) For the LLC-HB converter, the voltage gain is expressed as follows [17]:

(5) The parameters in the expression are defined as:

(6) Where fsis operating frequency of the converter, fr is resonant frequency of LLC circuit, n2is turns ratio of TR2. From expression (5), we can get the function of Q with respect to theoutput voltage of converter vo:

(7)

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Hybrid PS Full Bridge and LLC Half Bridge DC-DC Converter for Low-Voltage and High-Current Output Applications

Substituting (7) into (6) yields:

(8) Similarly, the load for PSFB Ro1 can be obtained as the following:

(9) The values of corresponding parameters of the proposed converter can be got from the prototype specifications that are shown in table I. Table 1: Parameters of the Converter

Thus the figures of Ro1 and Ro2 versus Vo can be obtained, which are plotted in the following:

(a)

(b)

From Figure 4, we can conclude that Ro1 approximately equals to Rload. The error between Ro1 and Rload become less and less with the increase of vo, while the relationship between Ro2 and vo is nearly linear and Ro2 is much larger than Rload. So in theproposed PSFB and LLC-HB parallel connected converter, the total load is actually divided into two parts: one is the load for the LLC-HB and it is the dominated, while the other is the load for PSFB and it makes up only a small portion of the total load. Output Current of LLC Circuit In order to extend the regulating range of PSFBâ€™s output, based on realizing ZVS for lagging leg switches, the

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output current of LLC-HB should be designed as small as possible. The trans-conductance of LLC-HB is expressed as the following:

(10) Here, fn and Q are normalized frequency and qualify factor, respectively, and they are defined in equation (6). The change of trans-conductance with respect to fn and Q is illustrated in Fig. 5.

Figure 5: Transconductance of LLC_HB as a function of Normalized Frequency and Quality Factor

As seen, if ZVS realization and small trans-conductance are achieved simultaneously, the region above unity normalized frequency is preferred. That is, the operating frequency fsshould be higher than the resonant frequency fr.

Under this condition, smaller trans-conductance could be obtained by decreasing Q, which is reflected by Figure

5. According to equation (8), the expression of LLC-HBâ€™s output current io2 is written by:

(11) The figures of io2 with respect to n2, Lm, Lr and Cr are shown in Figure 6

Figure 6: (a) io2 versus Ton2; (b) io2 versus to Lmi (c) io2 versus Lri (d) io2 versus to Cr

Hybrid PS Full Bridge and LLC Half Bridge DC-DC Converter for Low-Voltage and High-Current Output Applications

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As seen in Figure 6(a), the relationship between the output current of LLC-HB and the transformer turn ratio is nearly linear. The current rises with the increase of turn ratio. So in order to lower LLC-HB’s output current, lower turn ratio values is desired. As Lmincreases, the current rises as well, but it will end up with a finite value finally [see Figure 6(b)]. The increase of resonant inductor Lr and resonant capacitor Cr causes the decrease of LLC-HBoutput current [see Figure 6(c) and Figure 6(d)]. Finally, Figure 6 reveals one feature of the converter: if the converter’s output voltage increases, LLC-HB’s output current will slightlydecrease. The feature is strongly desired since it indicates that the output current of LLC-HB has a maximum and comparatively small value which is got under light load, thus LLC-HB does not limit the output current range of PSFB and guarantee the wide output current range of the proposed converter. Gating Signals for Synchronous Rectifiers In order to reduce rectification loss and improve the conversion efficiency, synchronous rectification technique is introduced. Proper gating signals should be designed so that the synchronous rectifier could behave more like a diode. In the proposed converter, by analyzing the modes in a cycle, the gating signals for the two synchronous rectifiers in the secondary side of TR1 is determined as following:

(12) Where Vgs1~Vgs4 are gating signals of S1~S4, respectively. With these gating signals, therectifiers are turned on at the time when the rectifier current begins to increase from zero and turned off before it decreases to zero. This ensures the synchronous rectifiers to behave like a diode and prevent the power from moving backwards.

SIMULATION AND EXPERIMENTAL RESULTS Simulation has been done and a 2.5kW prototype has been built to verify the effectiveness of the proposed converter. The converter is designed as a wide range adjustable current source, of which the output current can vary from 30A to 300A. The specifications have been listed above in table I of section II.

Figure 7: Simulation Results of Primary Voltage of TR1 and Waveforms about S4 The results of simulation are presented in Figure 7. Vp is the voltage of the primary winding of TR1, Vgs4 and Vds4 are gating signal and voltage stress of S4, respectively. It shows that Vgs4goes high after Vds4 has decreased to zero, thus ZVS of S4 has been achieved, and there is no voltage overshoot or ringing on S 4.

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(a)

(b)

Figure 8: Experimental Results: (a) Key Waveforms of S4 in Conventional PSFB Converter; (b) Key Waveforms of S4 in Proposed Converter Figure 8 to Figure 10 show experimental results of the converter. Figure 8 compares the experimental results of S4 in proposed converter and conventional PSFB converter, respectively. As shown in Figure 8(a), in the conventional PSFB converter, due to lack of ZVS, annoying voltage ringing is generated after S4 is turned off and EMI issue is caused that affects gating signal. Hence, serious voltage stress and voltage overshoot is imposed on S 4 and the maximum value of Vds4 is 350V. While in comparison that shown by Figure 8(b),Vgs4goes high after Vds4 decreases to zero, thus the ZVS for S4 is realized. The waveform of Vds4is flat without any ringing or overshoot and the maximum value is 254V, which is less than the corresponding value in conventional PSFB converter by about 100V.

Figure 9: Total Output Current and LLC-HB’s Output Current Figure 9 shows the waveforms of converter’s total current and LLC-HB’s output current. Each of the four pictures represents the condition when the total current of the converter is 60A, 100A, 200A and 300A, respectively. Meanwhile, the average value of LLC-HB’s output current is 8.62A, 8.57A, 7.93A and 5.79A, respectively. The result illustrates that, with the increase of the converter’s output power, LLC-HB’s output current even decreases and isalways less than 10A, which is only a very small portion of the converter’s total output current. This verifies that the proposed converter’s output current can be regulated with a wide output range.

Figure 10: Key Waveforms of SR2

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Figure 10 illustrates the experimental result of which the output current is 50A. It shows the relationship between the gating signal and the current of SR2. It can be concluded that the gating signal turns on while the current is passing through SR2, which can effectively reduce rectification loss, and turns off before the current decreases to zero that ensures SR2 to behave like a diode. It verifies the effectiveness of the gating signals for synchronous rectifiers.

CONCLUSIONS The paper proposes a novel parallel connected PSFB and LLC-HB converter with shared lagging leg. The operation principle, analysis and design considerations of the converter are illustrated in this paper. ZVS for lagging leg switches could be realized, thus the voltage stress and overshoot of switches are reduced. By proper designing, the output of the LLC converter makes up only a very tiny portion of the total output power. The current stress difference between the leading leg and lagging leg switches can be neglected and they have almost the same thermal rise. Besides, the output range is very wide. The synchronous rectification technique can effectively reduce rectification loss and improve the conversion efficiency. The applied gating signals can ensure synchronous rectifiers to behave like diodes. The validity of the proposed converter has been tested and verified by simulation and experimental results of a 2.5kW prototype.

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