The magazine of record for the embedded computing industry
May 2014
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Optical Interconnects Bridge Boards Data Acquisition: Small Modules for Small Boards IoT Transforms Connected Health Applications
An RTC Group Publication
42 Graphics Core Next-Based GPU Doubles Performance with Seven-Year Longevity
45 Freescale QorIQ T2080 and T1042-Based Modules for High Performance per Watt
TABLEOF CONTENTS
45 Mini Card Carrier for CompactPCI Serial
VOLUME 23, ISSUE 5
DEPARTMENTS
6Editorial So No Flying Car? And Now Could the Driverless Car Be a Dangerous Dream? Insider 8Industry Latest Developments in the Embedded Marketplace
10 & Technology 42Products Newest Embedded Technology Used by Industry Leaders Small Form Factor Forum The End of an Epoch
EDITOR’S REPORT Graphics Moves High Performance to Embedded
Highlights the Computational Power of Graphics 12 Conference Processors and Their Move into Mobile and Embedded Tom Williams
TECHNOLOGY CORE
TECHNOLOGY IN SYSTEMS
AMD Brings Power to SoC Designs
Small Modules for Data Acquisition
16
Achieving Frictionless Parallel Processing with the Heterogeneous System Architecture
George Kyriazis, AMD
Standard Guides AMD G-Series into Even 20 Qseven Smaller Form Factors
Dan Demers, congatec
TECHNOLOGY CONNECTED Optical Connectivity in System Design
Form Factors, Data 34 Small Acquisition and the Internet of Things, Oh My! David Fastenau, Diamond Systems
TECHNOLOGY DEVELOPMENT Medical Devices—Intelligence Plus Connectivity
of Things Transforms 38 Internet Connected Health Applications Maria Hansson, Kontron
Optical Interfaces Boost System Capabilities 24 VPX Rodger Hosking, Pentek
System Architectures to Interface High Data Rate Sensors 30 New Thierry Wastiaux, Interface Concept
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RTC MAGAZINE MAY 2014
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MAY 2014 Publisher PRESIDENT John Reardon, johnr@rtcgroup.com
Editorial
Bridge the gap between ARM and x86 with Qseven Computer-on-Modules
One carrierboard can be equipped with Freescale® ARM, Intel® Atom™ or AMD® G-Series processor-based Qseven Computer-on-Modules. conga-QMX6
conga-QA3
conga-QG
EDITOR-IN-CHIEF Tom Williams, tomw@rtcgroup.com SENIOR EDITOR Clarence Peckham, clarencep@rtcgroup.com CONTRIBUTING EDITORS Colin McCracken and Paul Rosenfeld MANAGING EDITOR/ASSOCIATE PUBLISHER Sandra Sillion, sandras@rtcgroup.com COPY EDITOR Rochelle Cohn
Art/Production ART DIRECTOR Jim Bell, jimb@rtcgroup.com GRAPHIC DESIGNER Michael Farina, michaelf@rtcgroup.com
ARM Quad Core
Intel® Atom™
AMD® G-Series SOC
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Qseven™ -
MSC Q7-IMX6 Compatible Modules from Single-Core to Quad-Core
Freescale i.MX6 Quad-, Dualor Single-Core ARM Cortex-A9 up to 1.2 GHz
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up to 4 GB DDR3 SDRAM up to 64 GB Flash GbE, PCIe x1, SATA-II, USB Triple independent display support
The MSC Q7-IMX6 with ARM
HDMI/DVI + LVDS up to 1920x1200
Cortex™-A9 CPU is a compatible
Dual-channel LVDS also usable
module with economic single-core CPU, strong dual-core processor or a powerful quad-core CPU with
4
as 2x LVDS up to 1280x720 1.1, OpenCL™ 1.1 EP
up to 1.2 GHz, and provides a very
UART, Audio, CAN, SPI, I2C
high-performance graphics.
Industrial temperature range
MAY 2014 RTC MAGAZINE
Editorial Office Tom Williams, Editor-in-Chief 1669 Nelson Road, No. 2, Scotts Valley, CA 95066 Phone: (831) 335-1509, tomw@rtcgroup.com
OpenGL® ES 1.1/2.0, OpenVG™
V-7_2013-WOEI-6535
Untitled-3 1
To Contact RTC magazine:
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Published by The RTC Group Copyright 2014, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.
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EDITORIAL MAY 2014
So No Flying Car. And Now Could the Driverless Car Be a Dangerous Dream?
W
e now already have cars that can self-park and that increasingly sport driver awareness or driver assistance functions such as blind spot alerts, GPS, lane departure warnings, collision avoidance systems, adaptive cruise control, hill descent control and more. There is very active research and development currently underway to integrate and expand these systems to produce the truly driverless vehicle. Most people, and especially Americans, take their relationships with their vehicles quite seriously—often to points worthy of a Freudian diagnosis. Therefore it makes sense to ask, “What really is a driverless vehicle and how many drivers would really want one?” Beyond that are questions of when or where such vehicles might be mandatory as a condition of access to certain roadways, and then, of course, there is the inescapable fact that an intelligent vehicle will also be a connected vehicle. And no, the central control systems probably will not have a “road rage” mode. Even with the present advances that are currently being deployed, mostly as options, the general consensus seems to be that the task of getting the systems integrated with the additional needed functionality, such as vision systems, is going to take another seven to ten years. Beyond that lie hurdles involving laws and regulations. These have to take into account not only the capabilities of autonomous vehicles, but also the fact that they will initially be in the vast minority and will have to coexist with all the vehicles being operated by human drivers. And yes, these do have a “road rage” mode. Like all major developments in technology, the advent of driverless vehicles as well as connected vehicles will have a major impact on society. Just look at the effect of smartphones. At present driver assistance, or what is coming to be known as advanced driver assistance systems (ADAS), are making fairly strong headway in being adapted. They are even spawning companies that market these technologies as OEM products to several auto manufacturers. And, good news for this audience, a large majority of them rely on embedded intelligence, which means sales of processors, electronic components, software and software tools. In fact, the National Highway Traffic Safety Administration (NHTSA) has just issued a rule requiring all new light vehicles—that’s cars, SUVs, pickups and vans—to have rear-view visibility systems. These will start being phased in with 2016 models, and the expectation is that it will reach 100 percent by 2018. The interesting part here is that adoption
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MAY 2014 RTC MAGAZINE
Tom Williams Editor-in-Chief
of rear-view cameras is not the result of manufacturers jumping on an attractive feature, but the result of pressure from consumer groups and the families of back-up accident victims. The adoption of seat belts came from similar pressures and who would buy a car without them today? On the other hand, nobody is likely to pressure the automobile industry into perfecting the driverless car, so there must be market forces at work here. It’s just not obvious from this particular perspective what they are, and the effort seems to be coming from the manufacturers. Both BMW and Audi are known to have very active programs underway. But beyond not just responding to consumer pressure, automakers will have to bring up marketing and sales strategies to sell buyers on the idea of an autonomous vehicle. Why is this? Whatever eventually happens with the idea of the driverless car, we are definitely on the way to major changes that will pose challenges and opportunities for the embedded and Internet of Things community. There will have to be major design efforts to minimize driver distraction as cars become more connected. Internet connectivity is already a reality for some advanced models and it will increase with features like traffic alerts. Already my own car has Internet features that can only be trusted to the passenger, but it also has no engineering to prevent the driver from being distracted by these things if alone. As we have learned from fatalities caused by texting drivers, if these are flaws built into automobiles, we can expect some major liabilities to be assessed fairly soon. Actually, the driver who thinks he or she has little to do could become a major liability. There is already consideration aimed at preventing the “driver” from reading printed material (How??), due to the need to quickly get his or her attention in case of need—the talk is of a limit of ten seconds. So you could only be allowed to read electronic media? What’s to prevent someone from actually falling asleep in the “driver’s” seat and missing whatever attention-getting mechanisms are designed to bring him or her back into control? And who wants to sit behind the wheel doing nothing? I could go on, but there is a lesson in the possibilities that are raised by advancing technology and how it actually makes sense to apply it. So bring on the safety features, the convenience features, the comfort features, but don’t go to a huge effort to sell us something for which you must first justify the value. Oh yes, now about that flying car . . .
Mini-ITX
COM Express Module
PICMG SBC
www.portwell.com info@portwell.com 1-877-278-8899
Small Form Factor System
Network Security Appliance
INDUSTRY
INSIDER MAY 2014 Altera and Intel Extend Partnership to Include Development of Multi-Die Devices Altera and Intel have announced their collaboration on the development of multi-die devices that leverage Intel’s package and assembly capabilities and Altera’s programmable logic technology. The collaboration is an extension of the foundry relationship between Altera and Intel, in which Intel is manufacturing Altera’s Stratix 10 FPGAs and SoCs using the 14nm Tri-Gate process. Altera’s work with Intel will enable the development of multi-die devices that efficiently integrate monolithic 14nm Stratix 10 FPGAs and SoCs with other advanced components, which may include DRAM, SRAM, ASICs, processors and analog components, in a single package. The integration will be enabled through the use of high-performance heterogeneous multi-die interconnect technology. Altera’s heterogeneous multi-die devices provide the benefit of traditional 2.5 and 3D approaches with more favorable economic metrics. The devices will address the performance, memory bandwidth and thermal challenges impacting highend applications in the communications, high-performance computing, broadcast and military segments. Intel’s 14nm Tri-Gate process density advantage and Altera’s patented FPGA redundancy technology enable Altera to deliver the industry’s highest density monolithic FPGA die, offering greater integration of system components on a single die. Altera is leveraging its leadership in developing the largest monolithic FPGA die and Intel’s packaging technology to integrate even more capabilities into a single system-in-apackage solution. Intel’s manufacturing process is co-optimized to offer manufacturing simplicity consisting of turnkey foundry services that include the manufacturing, assembly and testing of heterogeneous multidie devices. Intel and Altera are currently developing test vehicles aimed at streamlining manufacturing and integration flows.
Samsung and Green Hills Announce Certification for Government Networks
Samsung Electronics and Green Hills Software have announced that Samsung Knox Hypervisor has been approved for use on sensitive U.S. Department of Defense enterprise networks. The Authority to Operate (ATO), performed under the auspices of the U.S. Marine Corps, includes devices from the Samsung Galaxy line of smartphones and tablets and represents a broad collaboration between Green Hills Mobile, Samsung, mobile network carriers, systems integrators and the U.S.
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SEPTEMBER MAY 2014 RTC 2014 MAGAZINE RTC MAGAZINE
Department of Defense. Samsung Knox Hypervisor is a foundational firmware layer of data protection and isolation below the mobile operating system, enabling a level of certifiable security that enhances application-level sandbox mechanisms. Whether devices are enterprise or personally owned, the Knox Hypervisor enables users to have complete confidence in the privacy of their photos, contacts, e-mail and other information while enterprise and government IT administrators manage the device’s business use with complete assurance in the security of enterprise information
both within the device and across the enterprise network. Samsung Knox offers several data protection and isolation solutions including Container and Hypervisor. Samsung Knox Hypervisor is a Type-1 mobile virtualization solution (also known as “Knox Integrity”) developed by Green Hills and integrated with the Knox mobile enterprise solutions suite. Shipping since 2003, the Integrity Hypervisor is built upon security-certified separation kernel technology that provides highly assured isolation between one or more “guest” operating systems (domains) while also providing a native open standard execution environment for security-critical tasks, including FIPS 140-2-certified and NSA Suite B-compliant data encryption, user authentication, security event auditing and remote management.
NVM Express SSD Work Group Incorporates
The NVM Express Work Group, developer of the NVM Express specification for accessing solid-state disks (SSDs) on a PCI Express (PCIe) bus, has announced its incorporation as the NVM Express Organization. The work group’s transition to an incorporated industry association indicates the member companies’ commitment to continue delivering technology and high-quality specifications that meet the needs of a rapidly changing storage market. NVM Express is an optimized, high-performance, scalable host controller interface with a streamlined register interface and command set designed for enterprise and client systems that use PCI Express storage solutions. NVM Express reduces latency, providing faster performance, with support for security and end-toend data protection. Version 1.0 of the specification was released in March 2011, and Version 1.1 was published in October 2012. NVM Express is a standard-
ized register interface, command and feature set for PCIe-based storage solutions, such as SolidState Drives (SSDs) designed specifically for non-volatile memory. NVM Express is optimized for high performance and low latency, scaling from client to enterprise segments. The NVM Express Organization is currently developing revision 1.2 of the base specification, which adds new capabilities. In addition, the organization is also standardizing in-band and out-ofband management of PCI Express SSDs (e.g., LEDs, thermal control, etc.). These specifications are targeted for release in the second half of 2014. The new organization will continue to be led by the current promoters: Cisco Systems, Dell, EMC, HGST, a Western Digital Co., Intel, LSI, Micron Technology, NetApp, Oracle, PMC-Sierra, Samsung, SanDisk and Seagate Technology.
Altera Joins IBM OpenPower Foundation to Enable FPGABased Power Solutions
Altera has announced it joined the IBM OpenPower Foundation, an open development alliance based on IBM’s Power microprocessor architecture. Altera will collaborate with IBM and other OpenPower Foundation members to develop high-performance compute solutions that integrate IBM Power CPUs with Altera’s FPGAbased acceleration technologies for use in next-generation data centers. FPGAs provide Power users configurable hardware accelerators in the core compute complex that help system architects reduce operating expenses by achieving very high performance at lower power. IBM and Altera have already worked together to create a coherent interface between the Power8 processor and Altera’s Stratix V FPGAs. This collaboration provides developers a roadmap to use the high-performance capabilities of Altera’s Arria 10 and Stratix 10 FPGAs and SoCs in next-genera-
tion Power-based systems. Leveraging the Altera SDK for OpenCL, developers are able to integrate IBM Power CPUs with Altera FPGAs as a high-performance compute solution. The OpenPower Foundation includes a group of companies working together to develop high-performance compute solutions based on the IBM Power architecture. OpenPower Foundation members include Altera, IBM, Google, Mellanox, NVIDIA, Samsung Electronics, Suzhou PowerCore Technology and Tyan. Together, the companies are building advanced server, networking, storage and hardware-acceleration technologies aimed at delivering more choices, control and flexibility to developers of next-generation hyperscale and Cloud data centers.
AMD and Mentor to Accelerate Open Source Linux Development for Embedded Systems
AMD has announced a multi-year agreement with Mentor Graphics to expand availability of open source embedded Linux development for heterogeneous and multicore processors from AMD. Dedicated to providing embedded developers with a more manageable and focused open source framework, the agreement will provide embedded developers with more supported processor options, robust development tools and greater speed in open platform development. As a Yocto Project-compatible product, Mentor Embedded Linux will now bring standardized features and tools, and ensure quick access to the latest board support packages (BSPs) for AMD 64-bit x86 architecture beginning with the upcoming AMD Embedded G-Series system-on-a-chip (SoC) (code-named: “Steppe Eagle”) and AMD Embedded R-Series APU/ CPU (code-named: “Bald Eagle”). Embedded systems developers will have comprehensive access to the
Mentor Embedded Linux development platform for customized embedded Linux development and commercial support, as well as a no-cost Mentor Embedded Linux Lite derivative providing all the essentials to evaluate Linux on AMD embedded processors. To address the growing complexity of embedded systems, embedded developers will also have access to Sourcery CodeBench for greater insight into system execution, performance and debugging applications in Linux-based embedded systems. As part of the agreement between AMD and Mentor Graphics, embedded developers will have access to customized embedded Linux development products including the Yocto Project-compliant Mentor Embedded Linux Lite with free enablement for evaluation and prototyping for the upcoming AMD Steppe Eagle and Bald Eagle products. This will include binary images of root file system and kernel and access to sources for all open source components. Also available will be Mentor Embedded Linux with commercial terms for project development including bug fixes, security patches and product updates, and the Eclipse-based Sourcery CodeBench development environment, data trace analysis and visualization capabilities. This also includes customizability for unique project needs including custom BSP development, back porting and longterm support.
Advantech to Partner with Linear Technology for Smart City and IoT Solutions
Advantech has announced that it is partnering with Linear Technology’s Dust Networks product group to develop Smart City and Internet of Things (IoT) solutions based on Dust’s SmartMesh IP embedded wireless sensor networks (WSN). Advantech will develop, manufacture and sell a variety of IoT gateways, wireless
sensors and solutions that incorporate Linear’s industry-leading SmartMesh IP embedded WSN products as well as complementary power management and Power over Ethernet (PoE) ICs. Advantech has declared 2014 as its first year for actual Smart City applications. The Internet of Things is growing rapidly and wireless sensor networks (WSNs) are essential for extending the reach of the Internet infrastructure to all kinds of devices. WSNs are already in use in critical monitoring and control applications worldwide. Linear Technology’s broad line of WSN products and highperformance analog and power integrated circuits are enabling products for industrial networks and the IoT. Linear Technology produces power management, data conversion, signal conditioning, RF and interface ICs, µModule subsystems and Dust Network’s SmartMesh wireless sensor network products. Integrating Advantech RISC computing design power with Linear Technology’s Dust Networks WSN technology, Advantech Embedded Core Group will announce the release of a WSN controller, UBC-WN500, and sensor mote products, EWS-1540A and UBCWNM200, in Q3 2014. Meanwhile, Advantech will include the SUSIAccess remote management software tool for IoT in the WSN series. This will enable customers to implement environmental monitoring, urban security and smart street solutions easily and quickly. Advantech and Linear Technology are working together to achieve the ultimate goal of enabling an intelligent planet.
Rise of the Machines: Industrial Machinery Market Growth to Double in 2014
a doubling of growth this year, according to a new report from IHS Technology. As economic conditions continue to improve worldwide, the demand for machines in sectors such as agriculture, packaging, materials handling and machine tools will push revenues to $1.6 trillion this year, up from $1.5 trillion in 2013. This represents annual growth of 6.3 percent, more than twice the 2.9 percent increase seen in 2013. Strong growth is forecast to continue for the next four years, with revenue rising to $2.0 trillion by 2018. During this period, the machinery market’s annual growth rate will remain quite impressive, averaging between 5 percent and 6 percent. Sales growth for industrial machines in 2014 is being driven by a number of factors. First, higher demand for cars worldwide is spurring the requirement for more spending on tools and robotics in the automotive business, as well as the rubber and plastics segments. Meanwhile, an increase in the standard of living and growing spending on nutrition will benefit the food and packaging machinery sectors. Furthermore, rising spending on technology products will boost the demand for robotics, semiconductor equipment, mining, and oil and gas machinery. At the same time, increased demand for housing, infrastructure and commercial buildings is benefiting the construction equipment sectors. Moreover, social awareness of green technologies is resulting in higher demand for industrial machines in photovoltaics (PV) and in wind turbines.
High demand for machines in manufacturing sectors ranging from auto making to packaging will push the industrial machinery market to new heights during the next five years, highlighted by
RTC MAGAZINE RTC MAGAZINE SEPTEMBER MAY 2014
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SMALL FORM FACTOR
FORUM Colin McCracken
The End of an Epoch
A
ll good things come to an end. For many x86 board users, Windows XP Embedded has been the Rock of Gibraltar for a decade or more. Ever since MS-DOS 6.22 anyway. While small form factor (SFF) suppliers and customers are ever vigilant of born-on dates and end-of-life (EOL) dates for silicon, sometimes we’re blissfully ignorant that software faces lifecycle limits too. And for once, you and your IT person are now faced with the same news: End of support for Windows XP and XP Embedded. In the hardware realm, we like our PCNs and EOL notices. We appreciate our suppliers who give us a last time buy opportunity with a year to take deliveries. We don’t like them quite as much when they decide not to notify us until we’re trapped into placing a huge order for several years’ quantities, because they didn’t give us enough time to qualify and certify the replacement board, theirs or a competitor’s board. What does EOL mean for software? After all, these are just bits and bytes, numbered in the billions. A software image can be copied onto new media indefinitely. Well, for starters, there’s a little thing called a license sticker. It’s not so much a consideration for the growing number of Linux users, but this is a big deal for the proprietary OS market. There is a last ship date for license stickers. Equally important, if not more so, is the last support date. Support comes in several flavors: tech support and software updates. Tech support may not be needed at this late stage of a particular embedded system’s deployment. Updates include new or improved device drivers, OS libraries, and most importantly for desktop Windows users, service packs, security patches—all the SPs. For within the Windows ecosystem lurk many hackers and troublemakers who have nothing better to do than invent newer sneakier ways to deliver viruses to unsuspecting e-mail and browser users. While viruses bring even the most Goliath gaming PCs and server motherboards to their knees, they are usually far removed from the reaches of ultrasound machines, robotics, avionics control systems, and most embedded devices that don’t need to update themselves. April 8 was the last day for support for XP and XP Embedded. Desktop users will no longer receive automatic updates, and Microsoft warns that even if you have antivirus software, your
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PC will still not be fully secure. Embedded license stickers are still available until January 2017, but it’s time to start designing next generation devices. ISVs and IHVs are moving on to the new OSs. This train is leaving the station; last call. As if on cue, Intel is also in the process of housecleaning, affecting the popular Core Duo/945 platform and the original Atom Z510/530 “Menlow” family. Users of SBCs can find replacements with some differences in the expansion bus connectors and the I/O block. ETX users can find Intel- and AMD-based replacements; COM Express type 2 users can as well. Most type 1 users can go to type 10. The computer-on-module (COM) form factors are plug-and-play with minimal disruption to the carrier board and its connectors. The replacement modules are much better situated to running power-hungry desktop operating systems, with dual core and even quad core processors now available in these form factors. Migrating to a new product necessarily requires an appropriate product to migrate to. In some cases, your SBC or COM will run Windows 7 or its embedded counterpart. This is likely the case if Windows 7 was released around the time the processor became available. The further back you go to older processors, the less likely you will find chipset drivers. In addition, there’s a concern about how much additional hardware resources are required just to run newer OSs—CPU horsepower, RAM, disk space including swap/cache space, and so on. There has always been a foot race between the processor manufacturers who increase performance and the OS vendors who gobble it up. A bigger leap forward to Windows 8 or Win 8 Embedded may be out of the question with old hardware. Very loosely paraphrasing, Microsoft gives three steps for that migration: “buy a new PC,” followed by “buy a new PC,” and finally “buy a new PC.” Win 8 was not designed to run on old hardware. Your embedded hardware manufacturer will say the same thing… almost. You might also hear about the various other operating systems that their new boards support as well.
EDITOR’S REPORT Graphics Moves High Performance to Embedded
Conference Highlights the Computational Power of Graphics Processors and Their Move into Mobile and Embedded The GPU Technology Conference hosted by NVIDIA focused on new and powerful application areas made possible by advances in graphics processing that can also be applied to a wide range of computationally intensive applications, and how these will increasingly influence mobile and embedded systems. by Tom Williams, Editor-in-Chief
H
umans are visual creatures, and interacting with computer systems large and small on a visual basis has been a distant goal that was largely frustrated by the enormous demands of the sheer processing power needed to make realistic visual interaction possible. That time now appears to be coming to an end as demonstrated by the recent GPU Technology Conference (GTC) held in San Jose by NVIDIA. Many of the solutions being developed using the underlying powerful GPU technology address more than just interaction with systems. They provide meaningful analysis and presentation of huge amounts of data in visual form; they provide a means for truly intelligent machine vision, machine learning, robotics and automotive applications. The interest-
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ing part is that a large number of these growing and innovative solutions owe the underlying technology to the demands of the gaming industry. The gaming industry constantly strives for more realism and more—and faster—interactivity. Unlike the offerings of the early CAD industry, gaming cannot work with just drawing pictures and rendering surfaces. It must deal with motion, which means physics. Not so long ago it was difficult and time-consuming enough to render a realistic image of an object with textures, ray tracing, lighting models and all the other elements that go into graphical processing. Gaming demands that it happen at the highest resolution in real time. That means it must represent flying objects like collapsing or exploding build-
ings, racing vehicles, fighting figures and more. This entails re-rendering surfaces and shapes for each frame to maintain the gaming experience. Now that such processing has been achieved for the gamers, it turns out that the ability to do physics processing along with high-speed, high-definition graphical rendering lends itself to many other “practical” applications in a vast number of fields such as seismology, medical imaging, machine vision, data analysis and more. This year the percentage of gaming solutions showing at the conference was smaller than previous years, but that was offset by a variety of creative new startups and applications. NVIDIA continues to feed this segment with a number of significant announcements. Continuing the high-end graphics direction with at least a partial appeal to high-end gamers, NVIDIA announced the GeForce GTX Titan Z, which incorporates two Kepler GK100 GPU chips and 12 Mbytes of frame buffer memory. Each GPU has 2,880 CUDA cores for a total of 5,760 cores on the one card. The two GPUs are tuned to run at the same clock speeds with dynamic power balancing so that neither of them becomes a bottleneck (Figure 1). While the Titan Z will plug into a x16 PCIe slot in a PC (it is triple-wide) and handle 5k multi-display gaming, its potential as an under-the-desk “supercomputer” at the roughly $3,000 price for other applications is attractive. Of course, many applications will turn to systems that may contain multiple Titan Z modules and go
FIGURE 1 The GeForce GTX Titan Z incorporates two Kepler GPUs running with clock and power balance, with 12 Gbytes of frame buffer memory.
EDITOR’S REPORT
PCIe Switch
5X More Bandwidth for Multi-GPU Scaling
GPU
GPU
GPU
GPU
CPU
FIGURE 2 NVLink is a high-speed interconnect that enables tightly integrated GPUs and CPUs.
well beyond the high-end PC for many of these advanced applications.
New GPU Interconnect Technology
Parallelism is the one key to supercomputing, embedded or otherwise. Fast data movement is definitely another. This requires not only increasing data bandwidth, but also minimizing the number of transfers needed. NVIDIA has developed an interconnect architecture it calls NVLink, which it will incorporate into future GPU architectures. NVLink is expected to increase data rates from 5 to 12 times that of current PCIe 3.0. Putting this fatter pipe between the CPU and GPU will thus allow data to flow at more than 80 Gbytes/s, compared to the 16 Gbytes/s available now. The GPU will be able to access memory at near the bandwidth of the memory and will enable a faster data link between GPU and CPU (Figure 2). PCIe being four to five times slower than CPU memory systems makes it a definite bottleneck for the GPUs. This is even more significant for Power CPUs, which have a higher memory bandwidth than x86 processors. The NVLink technology was developed in cooperation with IBM, which will be incorporating it into its next-generation Power CPU technology. Today’s GPUs are connected to x86based CPUs through the PCI Express (PCIe) interface, which limits the GPU’s ability to access the CPU memory system and is four to five times slower than typical CPU memory systems. PCIe is an even greater bottleneck between the GPU and IBM Power CPUs, which have more
bandwidth than x86 CPUs. As the NVLink interface will match the bandwidth of typical CPU memory systems, it will enable GPUs to access CPU memory at its full bandwidth. When Power CPUs also have HVLink, that bandwidth bottleneck should disappear. In addition to faster memory access, the NVLink model implements unified memory, in which the developer can treat GPU and CPU memory as a single block. This has significant advantages over partitioned memory, which requires data transfers between memory partitions for a different CPU or GPU to operate on a given set of data. With unified memory, GPU and CPU can both directly access the same memory. Although future NVIDIA GPUs will continue to support PCIe, NVLink technology will be used for connecting GPUs to NVLink-enabled CPUs as well as providing high-bandwidth connections directly between multiple GPUs. Also, despite its very high bandwidth, NVLink is substantially more energy efficient per bit transferred than PCIe.
will also feature 3D memory, which stacks DRAM chips into dense modules with wide interfaces and brings them inside the same package as the GPU. The new memory chips are expected to have multiple times the existing bandwidth, about 2.5 times the current bandwidth and size and have 4 times the energy efficiency of today. This makes possible more compact GPUs that put more power into smaller devices. The result: several times greater bandwidth, more than twice the memory capacity and quadrupled energy efficiency. NVIDIA’s first module will be about 1/3 the size of a PCIe card (Figure 3), and from the appearance of the proposed first module, it will not have the standard PCIe edge connector. This would suggest that it will be intended for use with CPUs that are also enabled with NVLink, which would initially imply Power Architecture CPUs. There is also no indication, despite the connector at the ends of the board, that there is yet a definition of an NVLink interface connector.
Moving into Embedded and Mobile
As powerful as NVIDIA GPUs like the Tesla and the Titan Z may be, it is hard to imagine them being used in embedded and mobile systems due to their size and power consumption. However, as with other longstanding assumptions mentioned here, this is about to change as well. The announcements around the Pascal technol-
Pascal: The Next Step
NVIDIA has announced that the NVLink technology along with unified memory will be implemented on its next generation GPU architecture called Pascal, which is scheduled for release in 2016. The new GPUs
FIGURE 3 The Pascal architecture—introduced here by NVIDIA CEO Jen-Sun Huang—will bring 3D memory onto a single device with a GPU and an NVLink interface for maximum data processing.
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The possibilities of truly High Performance Embedded Computing (HPEC) are only now beginning to be realized. In the coming months and years we can expect to witness a range of yet to be discovered embedded and mobile applications from NVIDIA and other companies pioneering this new and exciting area of intelligent devices. NVIDIA Santa Clara, CA (408) 486-2000 www.nvidia.com
FIGURE 4 The Jetson TK1 Development Kit will put powerful GPU development tools into the hands of anyone from engineers to hobbyists.
ogy certainly point in that direction with a very powerful GPU in a small, low-power form factor. A more immediate development has arrived in the form of the Tegra K1, which was introduced last December (see “Mobile Graphics CPU Promises High Performance . . .” RTC, February 2014). The K1 is the latest member of the Tegra family, which incorporated NVIDIA GPU technology on the same die with multicore ARM CPUs and was used in highend mobile graphics applications such as tablets or automobiles like the Tesla (the car, not the GPU). The K1 is also an advance in that it now includes a 4-Plus-1 quad core ARM Cortex-A15 and a 192core GPU based on the Kepler architecture—and it is compatible with CUDA, the parallel platform and computing model designed to harness the parallel nature of the GPU not only for graphic applications but also for numeric-intensive computation such as physics, vision and data analysis. Now NVIDIA has released the Jetson TK1 Developer Kit, which consists of a board with the Tegra K1, a BSP and software stack, CUDA, OpenGL 4.4 and the NVIDIA VisionWorks toolkit (Figure 4). It also includes a suite of development and profiling tools plus support for cameras and other peripherals. The board has 2 Gbytes of memory and a 16 Gbyte eMMC, USB
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3.0, HDMI 1.4, Gigabit Ethernet, camera interface and more. The best part is that it will sell for $192. No one has yet indicated whether it will be available via Amazon. The Jetson TK1 also supports Linux for Tegra. The fact that the Tesla K1 supports CUDA is of high importance because the CUDA platform represents a software compatibility continuum from a device like the K1 all the way up to the largest Teslaor Titan-based system. One example of how this is being exploited involves Audi’s efforts to develop a driverless car. Developing an intelligent vision system involves a big project of machine learning using neural networks. Among other things, the system must be taught to recognize objects such as pedestrians, other cars, dogs, etc. While that can be done using something like 18,000 cores on a multiple-Tesla system, there is no way to install such a thing in an automobile. Audi is taking the parameters gained from the machine learning project and placing them—the results—onto a Tegra K1 in a small box that fits in a corner of the trunk. This then forms the basis of the automotive vision system thanks to the CUDA compatibility across the range of GPUs.
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TECHNOLOGY
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AMD Brings Power to SoC Designs
Achieving Frictionless Parallel Processing with the Heterogeneous System Architecture General-purpose GPUs have evolved to the point where they are also capable of very intense parallel numeric processing for a wide range of applications. However, programming these devices along with the on-chip CPU has been a hurdle. A new architectural concept for both hardware and software promises a smoother path to code development. by George Kyriazis, AMD
G
PUs have transitioned in recent years from pure graphics accelerators to more general-purpose parallel processors, supported by standard APIs and tools such as OpenCL and DirectCompute. Those APIs are a promising start, but many hurdles remain for the creation of an environment that allows the GPU to be used as fluidly as the CPU for common programming tasks—for example, different memory spaces between CPU and GPU, non-virtualized hardware, and so on. The Heterogeneous System Architecture (HSA) removes those hurdles, and allows the programmer to take advantage of the parallel processor in the GPU as a peer or co-processor to the traditional multi-threaded CPU. HSA provides a unified view of fundamental computing elements, allowing a programmer to write applications that seamlessly integrate CPUs with GPUs while benefiting from the best attributes of each. The essence of the HSA strat-
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egy is to create a single unified programming platform providing a strong foundation for the development of languages, frameworks and applications that exploit parallelism. More specifically, HSA aims to remove the CPU/GPU programmability barrier, reduce CPU/GPU communication latency, open the programming platform to a wider range of applications by enabling existing programming models, and create a basis for the inclusion of additional processing elements beyond the CPU and GPU. HSA enables exploitation of the abundant data parallelism in the computational workloads of today and of the future in a power-efficient manner. It also provides continued support for traditional programming models and computer architectures.
FIGURE 1 The HAS platform. The HMMU provides a unified address space.
TECHNOLOGY CORE
HSA Compute Units and Architectural Features
The HSA architecture deals with two kinds of compute units. The first are CPUs, which can support both a native CPU instruction set and the HSA intermediate language (HSAIL) instruction set—more on HSAIL later. The second are GPUs, which support only the HSAIL instruction set. GPUs perform very efficient parallel execution. An HSA application can run on a wide range of platforms consisting of both CPUs and GPUs. The HSA framework allows the application to execute at the best possible performance and power points on a given platform, without sacrificing flexibility. At the same time, HSA improves programmability, portability and compatibility. Prominent architectural features of HSA include: Shared page table support: To simplify OS and user software, HSA allows a single set of page table entries to be shared between CPUs and GPUs. This allows units of both types to access memory through the same virtual address. The system is further simplified in that the operating system only needs to manage one set of page tables. This enables shared virtual memory (SVM) semantics between CPU and GPU. Page faulting: Operating systems allow user processes to access more memory than is physically addressable by paging memory to and from disk. Early GPU hardware only allowed access to pinned memory, meaning that the driver invoked an OS call to prevent the memory from being paged out. In addition, the OS and driver had to create and manage a separate virtual address space for the GPU to use. HSA removes the burdens of pinned memory and separate virtual address management, by allowing compute units to page fault and to use the same large address space as the CPU. User-level command queuing: Time spent waiting for OS kernel services was often a major performance bottleneck for throughput in previous computing systems. HSA substantially reduces the time to dispatch work to the GPU by providing a hardware dispatch queue per application
and by allowing user mode processes to dispatch directly into those queues, requiring no OS kernel transitions or services. This makes the full performance of the platform available to the programmer, minimizing software driver overheads. Hardware scheduling: HSA provides a mechanism whereby the GPU engine hardware can switch between application dispatch queues automatically, without requiring OS intervention on each switch. The OS scheduler is able to define every aspect of the switching sequence and still maintain control. Hardware scheduling is faster and consumes less power. Coherent memory regions: In traditional GPU devices, even when the CPU and GPU are using the same system memory region, the GPU uses a separate address space from the CPU, and the graphics driver must flush and invalidate GPU caches at required intervals in order for the CPU and GPU to share results. HSA embraces a fully coherent shared memory model, with unified addressing. This provides programmers with the same coherent memory model that they enjoy on SMP CPU systems. It enables developers to write applications that closely couple CPU and GPU codes in popular design patterns like producer-consumer. The coherent memory heap is the default heap on HSA and is always present. Implementations may also provide a noncoherent heap for advanced programmers to request when they know there is no data sharing between processor types. Figure 1 shows a simple HSA platform. The accelerated processing unit (APU) with HSA contains a multicore CPU, a GPU with multiple HSA compute units (H-CUs), and the HSA memory management unit (HMMU). These components communicate with coherent and non-coherent system memory.
Programming Versatility and Hardware Compatibility
The HSA platform is designed to support high-level parallel programming languages and models, including C++ AMP, C++, C#, OpenCL, OpenMP, Java and Python, to name a few. HSA-aware tools generate program binaries that can exe-
FIGURE 2 The HSA software stack.
cute on HSA-enabled systems supporting multiple instruction sets (typically, one for the CPU and one for the GPU), but also can run on existing architectures without HSA support. Program binaries that can run on both CPUs and GPUs contain CPU instruction set architecture (ISA) code for the CPU and HSAIL code for the GPU. A finalizer converts HSAIL to GPU ISA. The finalizer is typically lightweight and may be run at install time, compile time, or program execution time, depending on choices made by the platform implementation. Hardware/software interoperability is another important consideration when it comes to HSA versatility. HSA is a system architecture encompassing both software and hardware concepts. Hardware that supports HSA does not stand on its own, and similarly the HSA software
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is not tied to a single language, but rather has available a world of possibilities that can be leveraged from the ecosystem.
Unified Address Space
FIGURE 3 NDRange, work-group and work-item.
stack requires HSA-compliant hardware to deliver the system’s capabilities. While HSA requires certain functionality to be available in hardware, it also allows room for innovation. It enables a wide range of solutions that span both functionality—small vs. complex systems—and time in terms of backward and forward compatibility. By standardizing the interface between the software stack and the hardware, HSA enables two dimensions of simultaneous innovation: Software developers can target a large hardware install base; and hardware vendors can differentiate core IP while maintaining compatibility with the existing and future software ecosystems (Figure 2).
Optimizing for Parallel Workloads
General computing on GPUs has progressed in recent years from graphics shader-based programming to more modern APIs like DirectCompute and OpenCL. While this progression is definitely a step forward, the programmer still must explicitly copy data across address spaces, effectively treating the GPU as a remote processor. Task programming APIs like Micro-
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soft’s ConcRT, Intel’s Thread Building Blocks, and Apple’s Grand Central Dispatch are existing paradigms in parallel programming. They provide an easy-touse task-based programming interface, but only on the CPU. Similarly, Thrust from NVIDIA provides a similar solution on the GPU. HSA moves the programming bar further, enabling solutions for task-parallel and data-parallel workloads as well as for sequential workloads. Programs are implemented in a single programming environment and executed on systems containing both CPUs and GPUs. HSA provides a programming interface containing queue and notification functions. This interface allows devices to access load-balancing and device-scaling facilities provided by the higher-level task queuing library. The overall goal is to allow developers to leverage both CPU and GPU devices by writing in task-parallel languages, like the ones they use today for multicore CPU systems. HSA’s goal is to enable existing task- and data-parallel languages and APIs and enable their natural evolution without requiring the programmer to learn a new HSA-specific programming language. The programmer
HSA defines a unified address space across CPU and GPU devices. HSA devices support virtual address translation: a pointer (that is, a virtual address) can be freely passed between devices, and shared page tables ensure that identical pointers resolve to the same physical address, and therefore the same data. Internally, HSA implementations provide several special memory types with some on chip, some in caches, and some in system memory, but there is no need for special loads or stores. A GPU memory operation, including atomic operations, produces the same effects as a CPU operation using the same address. All memory types are managed in hardware. An HSA-specific memory management unit (HMMU) supports the unified address space. The HMMU allows the GPUs to share page table mappings with the CPU. HSA supports unaligned accesses for loads and stores; however, atomic accesses have to be aligned to minimize hardware complexity. Many compute problems today require much larger memory spaces than can be provided by traditional GPUs, whether we are discussing the local memory of a discrete GPU or the pinned system memory used by an APU. Partitioning a program to repeatedly use a small memory pool can require a huge programming effort, and for that reason large workloads often are not ported onto the GPU. By allowing the HSA throughput engine to use the same pageable virtual address space as the CPU, problems can be easily ported to an HSA system without special coding effort. This also helps to significantly increase computational performance of programs requiring very large data sets. In addition, a unified address space allows data structures containing pointers (such as linked lists and various forms of tree and graph structures) to be freely used by both CPUs and GPUs. Today, such data structures require special handling by the programmer and often are the main reason why certain algorithms can-
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P RO D U C T S P OTLIG HT not be ported to a GPU. With HSA, this is handled transparently.
HSAIL and Workflow Efficiency
HSA exposes the parallel nature of GPUs through the HSA Intermediate Language (HSAIL). HSAIL is translated onto the underlying hardware’s instruction set architecture (ISA). While HSA GPUs are often embedded in powerful graphics engines, the HSAIL language is focused purely on compute and does not expose graphics-specific instructions in the base instruction set (HSAIL extensions may target additional accelerators in the future). The underlying hardware executes the translated ISA without awareness of HSAIL. The smallest unit of execution in HSAIL is called a work-item. A work-item has its own set of registers, can access assorted system-generated values, and can access private (work-item local) memory. Work-items use regular loads and stores to access private memory, which resides in a special private data memory segment. Work-items are organized into cooperating teamsz called work-groups. Workgroups can share data through group memory, again using normal loads and stores. Memory shared across a work-group is identified by address. Each work-item in a work-group has a unique identifier called its local ID. Each work-group executes on a single compute unit, and HSA provides special synchronization primitives for use within a work-group. A work-group is part of a larger group called an n-dimensional range (NDRange). Each work-group in an NDRange has a unique work-group identifier called its global ID, available to any work-item within the NDRange. Workitems within an NDRange can communicate with the CPU through memory, because the address space (excluding group and private data) is shared across all workitems and is coherent with the CPU. Figure 3 shows an NDRange, a work-group and a work-item. The finalizer translates HSAIL into the underlying hardware ISA at runtime. The finalizer also enforces HSA virtual machine semantics as part of the translation to ISA. Because of that, the underly-
ing hardware architecture does not have to strictly adhere to the HSA Virtual Machine. The HSA Virtual Machine can also be implemented on a CPU, by having the finalizer convert HSAIL to the CPU’s ISA. HSAIL has a unified memory view. The virtual address, rather than a special instruction encoding, determines whether a load or store address is private, shared among work-items in a work-group, or globally visible. This can relieve the programmer of much of the burden of memory management. Memory between the CPU and GPU cores is coherent. The HSA Memory Model is based on a relaxed consistency model and is consistent with the memory models defined for C++11, .NET and Java. Because the entire address space of the CPU is available to the GPU, the programmer can handle large data sets without special code to stream data into and out of the GPU. The current state of GPU high-performance computing is not flexible enough for many of today’s computational problems. HSA helps meet this challenge by unifying CPUs and GPUs into a single system with common computing concepts, allowing the developer to solve a greater variety of complex problems more easily. This ultimately empowers software developers to easily innovate and unleash new levels of performance and functionality on modern computing devices, leading to powerful new experiences such as visually rich, intuitive, human-like interactivity. The HSA Foundation (HSAF) was formed as an open industry standards body to unify the computing industry around this common approach. The foundation’s ultimate goal is to provide a unified install-base across all platforms and devices, which will simplify the software development process by enabling software developers to “write once and run everywhere.”
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Advanced Micro Devices Sunnyvale, CA. (408) 749-4000. www.amd.com www.hsafoundation.com
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TECHNOLOGY
CORE
AMD Brings Power to SoC Designs
Qseven Standard Guides AMD G-Series into Even Smaller Form Factors As AMD’s SoC family becomes smaller and consumes less energy while becoming computationally much more powerful, it is only reasonable to pair it with the small, versatile and rugged Qseven form factor. by Dan Demers, congatec
I
n 2013, AMD shocked the embedded systems market by announcing the first x86 quad-core system on chip (SoC). Previously, x86 SoCs were limited to two CPU cores along with modest graphics and minimal I/O interfaces. Four-core solutions required two chips and a large thermal solution. Now the two-chip GSeries platform with discreet-GPU class integrated graphics has merged together into a single chip, thanks to an advanced design coupled with 28nm process technology. This announcement set the stage for an all-out war between AMD and Intel, and a few months later Intel followed with its own SoC announcement. Embedded system manufacturers have always had a “make versus buy” choice when it comes to x86 processors. The latest wave of low power silicon with very respectable performance is once again flooding the market with consumer motherboards and embedded small form factor single board computers (SFF SBCs). For applications like point of sale (POS) terminals and information kiosks, the I/O requirements resemble desktop and laptop PCs closely enough to allow those motherboards to be used directly.
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However, the rest of the embedded x86 space is very diverse when it comes to application I/O. SFF SBCs are very disorganized and fragmented in the area of expansion bus interfaces. Therefore, most system OEMs are way down the path of choosing COM (computer-on-module) form factors like COM Express and using standard interfaces like PCI Express and USB to customize the peripherals in the form of a just-right I/O card called a “carrier board” or “baseboard.” Rather than I/O being stacked right above the heat from the processor, the novel COM approach spreads out the design in X and Y dimensions, thereby allowing a range of affordable thermal solutions from fansinks and heatsinks down to flat heat spreader plates. While COM Express has been quite successful with the 3-chip and 2-chip x86 platforms, there is significant overhead in terms of size and connector cost that doesn’t scale down very well to allin-one SoC solutions. What is the point of collapsing two chips into one if the board space doesn’t also shrink? The cost savings of a single chip gets partially squandered when the tiny chip still goes
FIGURE 1 AMD G-series SoC.
on large module PCBs with expensive board-to-board interconnects to the carrier board. Clearly, a lower cost connector scheme and a smaller board are needed. Rather than inventing yet another form factor, industry leaders in embedded SFF standards are choosing Qseven as the form factor on which to implement the Gseries SoC. Before diving into the details of a Qseven solution, let’s first examine what comprises the powerful SoC itself.
TECHNOLOGY CORE
The Ultimate Fusion
The embedded evolution marches on with a x86 CPU, graphics processor comparable to stand-alone external GPU card, and I/O controller (southbridge) all on a single die. While x86 SoCs are not a new invention, the attainment of this level of performance and integration is what’s unprecedented. With up to 2 GHz CPU performance per core, and having four such cores along with Radeon graphics, the AMD Embedded G-series SoC blends an impressive fusion of technologies into a tiny chip (Figure 1). The G-Series SoC platform is a highperformance, low-power System-on-Chip (SoC) design, featured with enterpriseclass error-correction code (ECC) memory support, dual and quad-core variants, integrated discrete-class GPU and I/O controller on the same die. It achieves superior performance per watt in the lowpower x86 microprocessor class of products when running multiple industry standard benchmarks. This brings the kind of exceptional multimedia experience from desktop and laptop computers down into embedded devices, and the CPU+GPU provides a heterogeneous computing platform for parallel processing. The smallfootprint SoC sets the new baseline for power efficiency across different workload types found in the variety of embedded applications. ECC memory support helps the SoC support application requirements that were previously inaccessible to x86 products in these power envelopes at this price point. An AMD G-Series SoC offers 113% improved CPU performance compared to the previous two-chip AMD G-Series APU. Its advanced GPU supports DirectX 11.1, OpenGL 4.2 and OpenCL 1.2, enabling parallel processing and high-performance graphics processing that provides up to 20% improvement over the 2-chip APU. Excellent compute and graphics performance with enhanced hardware acceleration delivers up to 70% overall improvement versus the G-Series APU. The SoC design offers a 33% footprint reduction compared to the AMD G-Series APU two-chip platform, simplifying design with fewer board layers and
FIGURE 2 Qseven outline drawing.
simplified power supply. The low-power SoC also reduces overall system costs. It enables fanless designs, enhancing system reliability by eliminating moving parts. AMD’s standard embedded 5-year availability and support (additional 2 years possible) qualifies the SoC for long lifecycle medical, military, vehicle and avionics applications. From the cost perspective, the G-Series SoC platform brings performance and efficiency with desirable features, delivering lower total cost of ownership and higher ROI.
The Ever-Shrinking Form Factor
With an array of performance options, the AMD G-Series SoC platform allows OEMs to utilize only one board design to cover solutions from entry-level to mid-range. The SoC design enables unprecedented levels of combined graphics and CPU performance in SFFs. Mid-range performance in a smaller package deserves a smaller form factor. Qseven was invented for 1-1.6 GHz single core processors. Now that dual core Gigahertz processors with desktop GPU have arrived within the same 10-12W power envelope, Qseven becomes a natural choice for implementing a G-series SoC design. Originally invented when 2-chip x86 solutions appeared in late 2007 to provide
an entry level below the 3-chip notebook processors, the tiny 2.75 x 2.75” (7x7 cm) board size has already replaced ETX as the high volume cross-architecture open standard for low- and mid-range embedded computing. The “Q” in the name Qseven comes from the word “quadratic” (square), and “seven” is the module’s 7 cm form factor. This base area allows the deployment of a powerful and efficient cross-architecture platform with extensive interface options, which at the same time retains the compact dimensions needed to facilitate its integration into handheld equipment. Unlike most of today’s board standards that use costly board-to-board mated pair connectors, Qseven is the first standard to use the reasonably priced laptop internal MXM card socket, and is easy for carrier board routing with 230 pins—30% fewer than similar connectors—arranged on a 0.5 mm grid. This socket was originally used with fast laptop GPU cards and can therefore handle the high data transmission rates required by some interfaces such as PCI Express. Despite its small dimensions, it has an extremely robust construction and therefore is suitable for mobile applications. The Qseven Computer-on-Module, unlike memory modules, is not held by the
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FIGURE 3 High-density conga-QC, a Qseven module with G-Series SoC.
card socket itself, but is instead secured using four screws and a spacer (2.7 or 5 mm, depending on socket height). This type of mounting allows high shock and vibration specifications to be achieved. Many board manufacturers around the world already produce Qseven modules, and the market adoption rate continues to climb rapidly due to the low-cost gold-plated card edge “fingers” that make it easy to install and upgrade over time. The mechanical outline of the processor board and mounting holes is shown in Figure 2.
Module Added-Value
While the SoC is rich in features, embedded developers often have requirements for controllers not found in the base platform. The Qseven 2.0 specification allows additional interfaces beyond the processor’s I/O to come off the module, such as serial ports (UARTs) and a dedicated I2C controller. Sometimes carrier circuits are easier to design hanging off these interfaces. Three processors in the G-Series SoC family are available in the Qseven form factor. The AMD GX-210HA 1.0 GHz dual core (1 Mbyte L2 cache) has a 9-watt thermal design power (TDP). The
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AMD GX-210JA 1.0 GHz dual core (same cache) has just a 6-watt TDP and an expected average power consumption of just 3 watts in many embedded applications. For extreme environments, the module is also available in an extended temperature range of -40° to +85°C featuring the AMD GX-209HA 1.0 GHz dual core (L2 cache 1 Mbyte). The SoC is designed to require 33% less power than previously available AMD G-Series processors. Four single (x1) PCI Express Gen 2 Lanes, one USB 3.0 and five USB 2.0 ports, up to two SATA 3 Gbit/s ports and a Gigabit Ethernet interface allow for flexible system expansions with high data bandwidths. A microcontroller, on-module SATA SSD up to 64 Gbyte, ACPI 3.0 CPU power management and high-definition audio complete the rich feature set of the conga-QG Qseven module. Embedded developers benefit from outstanding multimedia performance, excellent performance-per-watt ratios and flexible task distribution between CPU and GPU. The fanless module design is particularly suitable for cost-sensitive applications in the control and automation industry, digital gaming, communications infrastructures, and graphics-rich devices such as thin clients, digital information
boards and medical-imaging equipment. Thanks to onboard error-correction code (ECC) memory support, the module is also suitable for communications, safety-critical situations and applications in harsh environments. It can be equipped with up to 8 Gbyte ECC DDR3L onboard memory. ECC provides additional functions to check the data flow and adjust it as necessary in order to correct errors. The correction mode of this memory type can detect and correct both single and double bit errors. It therefore differs significantly from the so-called “parity bit,” where errors can be detected but not corrected. The integrated AMD Radeon graphics supports DirectX 11.1, OpenGL 4.2 for fast 2D and 3D imaging, plus OpenCL 1.2 to execute program code with the integrated GPUs. Third-party tools are available that can generate code to run on the GPUs too, effectively increasing the number of processor cores available to the application. The dedicated hardware, Universal Video Decoder 4.2, for the seamless processing of BluRays with HDCP (1080p) decodes H.264, MPEG4, VC-1, MPEG-2 video streams. The available display interfaces include single/dual channel 18/24bit LVDS and DisplayPort 1.2, as well as DVI/HDMI 1.4a for the direct control of two independent displays. DisplayPort 1.2 also supports multi-stream transport (MTS), enabling the control of up to two displays per graphics port in daisy chain mode (Figure 3). Embedded developers finally get to have their cake and eat it too. The unprecedented graphics and CPU performance within a tiny footprint module is a novel solution to the almost insatiable need for graphics to drive next-gen user interfaces for equipment and instruments. The SoC platform is well-suited to increase performance while reducing system power and size in a broad range of markets including portable medical devices, industrial automation, digital signage, thin client terminals and electronic gaming machines. congatec San Diego, CA (858) 457-2600 www.congatec.com
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TECHNOLOGY
CONNECTED Optical Connectivity in System Design
VPX Optical Interfaces Boost System Capabilities New optical interfaces for VPX allow modules to communicate through backplane connectors to adjacent modules, racks and even remote systems. Compared with traditional copper connections, these optical links offer extremely high data rates across significant distances, improve data integrity and security, and reduce cable size and weight. by Rodger Hosking, Pentek
F
or well over 150 years, copper interconnections have served the telecommunication and radio industry admirably for nearly all implementations of industrial, commercial, military and consumer products. However, over the last 15 years, optical interconnections have advanced rapidly to meet exploding market demands for telcom, data servers, storage facilities and the Internet infrastructure. Optical links offer many advantages over copper that are critical for these applications. Copper cables suffer from losses due to resistance, impedance mismatching and electromagnetic radiation, all of which pose serious problems for longer cables and higher signal frequencies. For example, standard unshielded twisted pair Ethernet cable is usable for lengths of about 100m, while an optical fiber cable can span from 300m up to 40 km, depending on the technology. These same effects afford optical cables one or more orders of magnitude improvement in data rates compared to an equal length of copper. Electromagnetic radiation impacts copper cables in two significant ways. Eavesdropping on the emissions from network cables is a major security concern, not only for military and government cus-
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FIGURE 1 VITA 66.4 mating metal housings containing MT ferrules for 3U VPX replace half of the VPX P2 copper connector (courtesy TE Connectivity).
tomers, but also for corporations, banks and financial institutions. Sniffers in vehicles and briefcases now using sophisticated and sensitive electronics are hard to detect and restrict. Optical cables are extremely difficult to “tap� without physical damage and loss of connectivity. Secondly, signals on copper cables are susceptible to noise from nearby sources of electromagnetic radiation, such as transmitters, generators and industrial machinery. This is of special concern
for military and commercial aircraft and ships, as well as unmanned and land mobile vehicles, which are often packed with dozens of different electronic payloads. Optical cables are completely immune to EMI and even lightning discharges. Optical cables are much smaller and lighter than copper cables, delivering a special advantage to weight-sensitive applications such as weapons, UAVs and aircraft. In case of a mishap, optical cables will operate just as well when submerged
TECHNOLOGY IN CONTEXT
in seawater. They are completely immune to electrical shorting—especially important where explosive vapors may be present. To ease installation through conduits and passages, optical cables have smaller diameters and can withstand up to ten times more pulling tension than copper cables. As the use of optical cables becomes more widespread, the cost per length can be much lower than copper cables that depend on commodity metal pricing.
Optical Cable Technology
Inside an optical cable is a cylindrical optical fiber that acts as a waveguide to propagate light. The fiber consists of a central dielectric core clad with a dielectric material having a higher index of refraction than the core to ensure total internal reflection. Two types of optical cables exist: multi-mode and single-mode fiber. Multi-mode cables have typical core diameters of 50 to 200 micrometers, and propagate light using principles of geometrical optics. Light rays entering the core within a certain angle of the axis are completely reflected by the dielectric boundary between the core and the cladding, and travel by repeated reflections down the length of the cable. The wavelength of light typically used for multimode cable is 850 nm. Single-mode cables have a much thinner core, typically 8 to 10 micrometers, and propagate light as an electromagnetic wave operating in a single transverse mode. The core diameter must be no greater than ten times the light wavelength, and two commonly used values are 1310 and 1550 nm. Single mode fiber cables carry signals over lengths 10 to 100 times greater than multi-mode cables, but require more expensive transceivers. There are nearly 100 different types of optical cable connectors in the market, but all of them address the mechanical challenges of connecting the ends of two optical cables to retain the maximum fidelity of the light interface in spite of human factors, tolerances, contamination and environments.
Optical Transceiver Technology
Optical transceivers couple electrical signals to the light signals in optical cable.
New transceiver technology is boosting data rates to 100 Gbits/s and higher, while reducing the power, size and cost of devices. Different technologies are required for emitters and detectors, but both are often combined in a single product to provide full-duplex operation. Traditional edge-emitting lasers generate coherent infrared light between parallel layers of semiconductors, with light emanating from the edges of these layers. The latest optical emitter is called the vertical cavity surface emitting laser, or VCSEL (pronounced “vixel”) where light is emitted vertically (perpendicular to the layers). VCSELs are more economical than edge-emitters and operate at relatively low power levels. They can produce wavelengths between 600 and 1300 nm, nicely covering 850 nm for multi-mode optical interfaces. Detectors use infrared photo diodes that can handle the required data rates using technology far less exotic than the emitters.
Embedded System Protocols for Optical Interfaces
Optical emitters simply translate the digital logic levels into modulation of the laser light beam, while the detectors convert the modulated light back into digital signals. This physical layer interface for transporting 1’s and 0’s is capable of supporting any protocol. Depending on the application, these interfaces can handle protocols from the link layer up through any of the higher layers. For example, Xilinx FPGAs include Aurora link-layer gigabit serial transceivers designed primarily for point-to-point connectivity between FPGAs. It includes 8b/10b or 64b/66b channel coding to balance the transmission channel, and supports single- or full-duplex operation. Aurora handles virtually any word length and allows multiple gigabit serial lanes to be bonded into a single logical channel, aggregating single lane bit rates for higher data throughput. Extremely simple and with minimal overhead, Aurora is very efficient in linking data streams between multiple FPGAs within a module, or between modules across a backplane. Data rates per serial lane can be 12.5 GHz or higher.
FIGURE 2 Samtec FireFly optical modules, each interfacing 12 gigabit serial copper signals to 12 optical fibers, joined together as flat cables.
Stepping up in complexity is the SerialFPDP protocol defined under VITA 17.1 for bit rates up to 2.5 GHz, although higher rates have been successfully deployed. It adds certain features to the lowlevel, link-layer data transfers to address several important needs of embedded systems. These include flow control to avoid data overruns, and copy mode to allow one node to receive data and also forward it on to another node. The copy/loop mode supports a ring of nodes with data circulating through several nodes, eventually completing a closed loop. Fibre Channel, an older ANSI standard running at bit rates up to 16 GHz, defines several network topologies for connecting storage area networks for highperformance computing and data servers. InfiniBand defines a flexible, lowlatency, point-to-point interconnect fabric for data storage and servers with bit rates to 14 GHz today, and 25 and 50 GHz in the next few years. Bonding of bit lanes into x4 and x12 logical links boosts channel speeds. InfiniBand offers a major advantage over Fibre Channel by achieving the required performance and reliability levels of specific data center requirements through easy-to-use tools for configuring network density, speed and topology. The venerable Ethernet protocol still dominates computer networks, with 10 GbE now commonly supported by a vast range of computers, switches and adapters. Even though Ethernet suffers from high RTC MAGAZINE RTC MAGAZINE OCTOBER MAY 2014 2013
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Rugged Boards & Solutions We know PCIe/104. And we do it best. At RTD, designing and manufacturing rugged, top-quality boards and system solutions is our passion. As a founder of the PC/104 Consortium back in 1992, we moved desktop computing to the embedded world. Over the years, we've provided the leadership and support that brought the latest signaling and I/O technologies to the PC/104 form factor. Most recently, we've championed the latest specifications based on stackable PCI Express: PCIe/104 and PCI/104-Express.
With our focused vision, we have developed an entire suite of compatible boards and systems that serve the defense, aerospace, maritime, ground, industrial and research arenas. But don't just think about boards and systems. Think solutions. That is what we provide: high-quality, cutting-edge, concept-to-deployment, rugged, embedded solutions. Whether you need a single board, a stack of modules, or a fully enclosed system, RTD has a solution for you. Keep in mind that as an RTD customer, you're not just
working with a selection of proven, quality electronics; you're benefitting from an entire team of dedicated engineers and manufacturing personnel driven by excellence and bolstered by a 28-year track record of success in the embedded industry. If you need proven COTS-Plus solutions, give us a call. Or leverage RTD's innovative product line to design your own embedded system that is reliable, flexible, expandable, and serviceable in the field for the long run. Contact us and let us show you what we do best.
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TECHNOLOGY IN CONTEXT
FIGURE 3 Pentek Model 5973 3U VPX Virtex-7 FMC Carrier uses two Samtec FireFy optical modules for the VITA 66.4 backplane interface.
overhead, making it somewhat cumbersome for high data rate, low latency applications, its ubiquitous presence virtually assures compatibility. Because each of these protocols offers distinct benefits and tradeoffs, they all are deployed in embedded systems using optical interfaces
New VPX Standards for Optical Interfaces
Optical interfaces of all connector and cable types have been deployed in VME and VPX systems for years with connectors mounted on the front panels— a maintenance issue for servicing and often not permitted in conduction-cooled systems. Alternatively, backplane copper signals from the module connect to rear transition modules containing the optical transceivers, adding both cost and complexity. The VITA 66 Fiber Optic Interconnect group has developed a set of standards that bridge optical connections directly through the VPX backplane connector. The first three are variants for 3U and 6U systems and are based on MT, ARINC 801 Termini and Mini-Expanded Beam optical connector technology, respectively. Spring-loaded ferrules containing
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optical cables float within metal housings to provide blind-mate connections between the module and the backplane, as shown in Figure 1. Alignment pins and holes in each half of the mating assemblies ensure exact alignment of the polished ends of each optical fiber. The metal housings are physically dimensioned to replace one or more of the standard MultiGig RT-2 VPX bladed copper connectors. The high-density MT variant defined in VITA 66.1 provides the highest density of the three, with up to 12 or 24 pairs of optical fibers, while VITA 66.2 and 66.3 each provide 2 pairs. A fourth standard soon to be released, VITA 66.4, uses the MT ferrule but with a metal housing half the size of VITA 66.1, and occupying only half of the 3U VPX P2 connector position. It supports either 12 or 24 pairs of optical cable. First versions of the connectors are already available from major vendors, including TE Connectivity and Molex. To ease implementation of the optical interface, Samtec is now sampling its FireFly Micro Fly-Over system. These small modules interface 12 lanes of gigabit serial electrical signals to laser transmitters or receivers. They connect through 12-lane optical flat ribbon cables that are
terminated in the MT ferrule shown in Figure 2. Capable of operating at speeds of up to 14 GHz using 850 nm multi-mode technology, a pair of these compact modules delivers data at over 16 Gbytes/s in both directions. They are especially wellsuited for direct connection to the gigabit serial transceivers found on FPGAs. Figure 3 shows a product implementation of the proposed VITA 66.4 optical backplane interface. This Virtex-7-based 3U VPX carrier for FMC modules connects the Samtec FireFly modules directly to the Xilinx GTX gigabit serial I/O pins, supporting a variety of popular FPGAbased protocols. This product approach eliminates cumbersome front panel connectors, simplifies installation and maintenance, and reduces system complexity. VITA 66.4 complements the standard PCIe Gen 3 x8 copper interface with a full duplex, multimode fiber link delivering more than 10 Gbytes/s of I/O to other systems, racks or sensors located at distances of 100 meters or more. As these backplane optical interfaces gain acceptance, embedded system designers will leverage the speed, distance, weight and size advantages they offer to create new architectures and open up new applications. Such interfaces will help high-performance embedded computing support the new sensors, processors, storage devices and memories that are pushing data traffic to increasingly higher limits. Achieving these objectives requires open industry standards based on new technology in optical cables, optoelectronics and protocols. A new optical backplane interconnect standard offers several advantages over earlier implementations. Pentek Upper Saddle River, NJ (201) 818-5900 www.pentek.com
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TECHNOLOGY
CONNECTED Optical Connectivity in System Design
New System Architectures to Interface High Data Rate Sensors New technology offers engineers of EW or EO/IR systems the possibility to use remote high-performance sensor modules using Gigabit/10 Gigabit serial interfaces. After processing, these systems need high-speed data transmission links to the wide area operation network. To benefit from this new technology, designers must define new innovative system architectures. by Thierry Wastiaux, Interface Concept
T
he development of the market for high-performance surveillance systems has led to a significant growth of sophisticated and powerful sensors. These sensors can be high-definition daylight or infrared cameras as well as large antenna arrays for radars or multi-antenna systems for SIGINT, SFDR or direction finding systems. The global market for sensors is growing at a double digit rate beyond just the defense market and into new fields such as energy and smart infrastructures according to market and technology forecast consultants ElectroniCast. UAVs have already been recognized as essential to many military operations. The importance of UAVs drives the market for surveillance, EO/IR, radar, detection, communication and intelligence-gathering UAV payloads. Inside UAVs, but also UGVs or UUVs, these surveillance or electronic warfare systems run in harsh and tightly packed environmental conditions with sensors often located remote from the processing units. Delivering high-frequency signals through long coaxial cables from the sensor to the processing units has a number of disadvantages. Even the last generation
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FIGURE 1 High level sensor-to-processing units architecture.
of high-definition IR and daylight optical sensors or RF antenna systems generated a tremendous flow of sample data feeding the processing units, and with the high frequency the signal loss can be high. In addition, copper cables carrying these analog high-frequency signals present EMI radiation and susceptibility issues. Their impact on the weight of UAVs and on maintenance can also represent a real burden. These serial links from the sensors bear various protocols such as Serial FPDP,
10GbE, Aurora, SerialRapidIO and others. Data can be delivered over copper and optical cables. Optical cables are free from EMI radiation, avoiding interference inside tightly packed unmanned vehicle systems, and are much lighter than copper cables. In addition, single mode and even multimode fiber cables can collect data from large antenna arrays or from widely spaced antennas at distances greatly exceeding the constraints met in embedded systems. With this very high sample data
TECHNOLOGY IN CONTEXT
throughput from the sensor, many algorithms such as beam forming, down conversion, image filtering and compression need massively parallel computing. The last generation FPGAs have become real “processing workhorses� offering the necessary parallel computing resources including thousands of dedicated multipliers, optimized memory interfaces and high-speed transceivers. The ratio of computing power per second and per watt is close to ten times that of the best CPU or GPU when computing on integers. With such a ratio of computing power to power consumption that is second to none, FPGAs have become the best possible interface to sensors allowing low-latency processing and communication. In terms of communication capabilities, FPGA vendors offer many ways of communicating with built-in PCIe ports as well as lightweight gigabit serial protocols like Aurora. These protocols along with Serial FPDP appear to be among the best for carrying high-speed data sample throughput. Processing these data flows also implies back-end computing behind the FPGA parallel processing via the use of high-end SBCs with their own native interfaces for PCIe. These SBCs can perform such applications as detection, tracking or target recognition. They also run the software protocol stacks that connect the system to the wide area network. All these considerations lead us to a high level architecture that can be summarized in the block diagram of Figure 1. Given this high-level architecture, what would be the best possible solutions to implement it? Interfacing optical links coming from the sensors with FPGAs at a controlled cost implies the use of standard form factors, and VITA has defined excellent specifications that allow high-speed communication as well as cost reduction by using standards. The OpenVPX Vita 65 standard has become a well-proven solution with backplanes able to sustain data rates at up to 10 Gbit/s per lane. Reaching even greater speed remains a technical challenge because the backplane may appear in the future as a data communication bottleneck in a system. The VITA 57 standard features its high pin count connector for FPGA mez-
zanine cards that sustain high data rates at a competitive cost and that can be interfaced with the high-speed transceivers of the last generation of FPGAs. Based on these two efficient and wellproven norms, we can progress further. The IC-QSFPFMCa can be seen as a good example of an optical interface in a small form factor (Figure 2). This VITA 57 FMC features two QSFP cages, each of which is able to receive a four-fiber optical QSFP+ interface. FIGURE 2 Each of these QSFP+ The IC-QSFP-FMCa is an example of an FMC interfaces allows commezzanine card that can provide two quad optical munication on four fullinterfaces. duplex lanes at a data rate up to 10 Gbit/s per lane, depending on the maximum data received through the optical interfaces rate achievable on the FPGA transceiver using the great resources of the Virtex-7 interface. They can reach a distance of up especially in terms of DSP logic elements. to100 meters with multimode 850 nm fi- The processing results may be stored in ber. A total of eight SERDES run up to the two high-bandwidth DDR3 banks, the FMC connector to interface the signal each of which has a 64-bit interface. processing module. An onboard micro- These 2 Gbyte memory banks allow the controller manages the QSFP interfaces storage of a large amount of data before through an I2C bus. A clock synthesizer transfer to other part of the system. The next step consists of moving this can be configured by the microcontroller data from the DDR3 memory of the FPGA through an SPI bus. to another memory in the system through the data pipes connected to the backplane. Front End Processing FPGA Powerful DMA Engines instantiated within Modules The block diagram in Figure 3 shows the FPGA move this data using PCIe from a Xilinx Virtex-7 OpenVPX module IC- FPGA DDR3 memory banks to any other FEP-VPX3c. Two quad GTX interface memory location in the system for further with the eight lanes coming from the processing. This is done via nontransparFMC connector after optical-to-electrical ent PCIe switches in order to avoid root conversion at the receive side and before complex issues between Intel processors. These matrixes can be on specific switch electrical conversion at the transmit side. The Xilinx IBERT test confirms the boards or directly implemented on the very low bit error rate at the nominal data CPU boards. These fast DMA engines rate and proves the validity of this com- can move data at a rate of 1.5 Gbytes/s of munication approach. Behind the FPGA effective useful data on a PCIe x 4 link. transceivers, firmware is instantiated to That rate comes close to the theoretical interface various protocols (sFPDP, 10 data throughput limit when including PCIe communication layer overhead and 8B/10B GbE, Aurora, PCIe, etc.). The relevant IPs in the FPGA (FFT, encoding. These DMA engines are driven Beamforming, filtering, down conversion by CPUs that are connected to the FPGA among others) process the data samples module or that are on the FPGA module RTC MAGAZINE RTC MAGAZINE OCTOBER MAY 2014 2013
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TECHNOLOGY IN CONTEXT
FIGURE 3 Optical interfaces can also be implemented using the FMC card for front end and back ends of an FPGA to the backplane on an OpenVPX module.
itself in the case of the 6U form factor. The Reference Design delivered with the FPGA modules contains the DMA Engine IP that is able to perform these high-speed memory data transfers. A software package called Multiware provides a high-level abstraction in order to provide the designer with services such as Virtual Ethernet over PCIe, shared memory, message synchronization with DMA-powered transfers between FPGA modules and CPU modules or between different CPU modules. The designer can then focus on the application without the burden of writing software. Users will want to access data processed by the surveillance system. Again and for the same reasons as above, optical communication appears to be the right so-
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lution even if the flow of data at this stage appears less important than behind the sensors. The same FMC QSFP+ mezzanine may be used to connect the systems to the outside or to a radio transmission system to send the processed data in an air-to-ground link for example. At this stage, GbE/10GbE or PCIe protocols will be preferred. Virtual Ethernet on PCIe will allow the use of classical TCP/IP stacks. FPGA modules bearing the FMC optical mezzanine can carry an IP TCP/ IP stack to reduce the processing load of FPGAs and to increase the per-slot processing power of the system. Alternatively, this fiber link can also start from Rear Transition Module featuring QSFP+ cages at the rear of a FPGA module. So this demonstrates that we have the tech-
nologies to interface high-speed sensors to the signal processing FPGAs and to connect EW and radar systems to the operational networks. Interface Concept Quimper, France +33 (0)2 98 573 030 www.interfaceconcept.com
General SAN FRANCISCO, CA • JUNE 1 - 5, 2014 • DAC.COM
DESIGN AUTOMATION CONFERENCE EMBEDDED SYSTEMS & SOFTWARE (ESS) AT DAC NEW TRACKS FOR 2014:
AUTOMOTIVE SYSTEMS & SOFTWARE - IP - SECURITY
KEY
ESS KEYNOTES Sir Hossein Yassaie
Dr. Karim Arabi
The Great SoC Challenge (IP to the Rescue!)
Mobile Computing Opportunities, Challenges and Technology Drivers
CEO Imagination Technologies
Vice President, Engineering Qualcomm, Inc.
The Embedded Systems and Software (ESS) track at DAC offers embedded system designers and technical professionals a robust program of research papers, panels, tutorials and educational programs. In addition to the program, the exhibit floor offers an opportunity for attendees to meet with leading ESS providers. • • • •
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Open Source Embedded Software: Savior or Slayer? Invasion of the Body Sensors Teardown: A Peek Inside Your Favorite Gadget Innovator Unplugged Is Model-Driven Development the Answer to Design Complexity? Supermodels, Will They Fall Out? Performance Strategies for System Virtual Prototypes Sensors and Semiconductors: eHealthy Elixir of IoT Connecting Everything: Architecting the Internet of Things
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TECHNOLOGY IN
SYSTEMS
Small Modules for Data Acquisition
Small Form Factors, Data Acquisition and the Internet of Things, Oh My! By now everyone is aware that the Internet of Things (IoT) is here to stay. A concept dating back almost two decades, it continues to evolve over time, becoming an all consuming umbrella covering a wide range of networked infrastructures. by David Fastenau, Diamond Systems
O
ne source defines the Internet of Things as “a world where physical objects are seamlessly integrated into the information network, and where the physical objects can become active participants in business processes. Services are available to interact with these ‘smart objects’ over the Internet, query and change their state and any information associated with them, taking into account security and privacy issues.” Due to the rapid developments in computer hardware, software and the Internet, as well as in sensors, mobile communications and multimedia technologies among others, distributed computing systems have evolved drastically to improve services and responsiveness. In addition, they have expanded into new application areas, with better quality of services and lower costs. Cloud computing is an excellent example and is at the heart of the Internet of Things. In embedded computing, we see this as the continual expansion of smarter and smarter devices in distributed networks interfacing to the world around them. The challenges for distributed computing systems to satisfy increasing demands have
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FIGURE 1 Typical Automated Factory Architecture.
also become greater. Besides reliability, performance and availability, many other attributes such as information security, privacy, trustworthiness, situation awareness, flexibility and rapid application development are increasingly important.
Given the above definition and the ongoing trends of distributed intelligence, especially in the world of embedded computing and machine-to-machine interfaces, it’s time to recognize the key role that data acquisition plays in the Internet of Things.
TECH IN SYSTEMS
FIGURE 2 FeaturePak Analog I/O Module (left) and PCIe MiniCard Analog I/O Module (right).
The Real World Meets the Electronic World
Within the space of small form factor embedded computing, we are no strangers to the requirements for data acquisition to interface to the physical world, as well as the need for communication to enterprise or IT servers to share information and coordinate activities. Wherever the real world of physical objects interacts with the electronic world of 1’s and 0’s, data acquisition is there serving as the intermediary. A translator, a controller or a supervisor communicates what is occurring in both the physical and electronic worlds, and passes commands or instructions from the computer servers back to the physical objects. In today’s vertical market applications there is a huge amount of data generated that is meaningful and useful for process control, quality monitoring and other business-related functions. This large amount of data must be manageable, easily accessible and presentable in meaningful ways for the efficiency of the operation. Examining the workings of a typical 24/7 automated factory provides an excellent context for the role of data acquisition in the Internet of Things. During every minute of operation at this factory there are thousands upon thousands of interactions between the physical world and the electronic world, all designed to keep production on track in a safe and efficient manner. Using plant floor thin clients directed
by the primary factory server, intelligent assembly robots are programmed wirelessly for the next task approaching them on the production line. Motion control sensors and pneumatics, also directed from the primary factory server through an embedded computing node that translates the instructions into analog output signals, pick the material from a storage bay and place it on a conveyor belt for delivery to the assembly robot, whose instructions were provided by the same server. Once the robot has reported the successful completion of its task back to the primary server through the thin client, additional commands are then relayed wirelessly from another thin client to a different embedded node responsible for moving the newly assembled part along to the next step in the process (Figure 1). The same concepts apply in a process control application where intelligent distributed computing nodes with data acquisition control fast moving, complex processes with ease as directed by IT servers. In this environment there are dedicated embedded computer systems with data acquisition capabilities that control exactly how much and when each amount of material is added to the process; others control the temperature and pressure at which the solution is processed; and yet others monitor the output, looking for consistency and quality of the final product. In both of these environments, data acquisition touch points are being more widely distributed and integrated directly
into the physical objects such as robots, conveyor drive systems and flow monitoring nodes—all driven by the ever growing need for more direct contact with the physical world using smaller devices. Whether at an automotive assembly plant, in an oil refinery, or at a thin film processing plant, today’s high volume production would not be possible without data acquisition. Analog inputs and outputs, waveform generators and pulse width modulators are all working together to effectively control and measure what is going on in the real world around us.
It’s a Small World After All
In the world of small form factor computing, data acquisition services have been traditionally supplied via add-on I/O modules in one stackable I/O form factor or another, such as PC/104. While this has served the embedded market well and will continue to in many applications, the continuing requirements for smaller, lighter, less power and lower cost are driving not only changes in embedded single board computers, but also in the way data acquisition is implemented. Some embedded SBCs have data acquisition circuitry on board, eliminating the second add-on I/O module and its associated size and weight. Smaller plugand-play data acquisition I/O modules also address these continuing demands, for example the development of the FeaturePak I/O module (1.70” x 2.55”) industry standard in 2011, and the more recent RTC MAGAZINE RTC MAGAZINE OCTOBER MAY 2014 2013
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TECH IN SYSTEMS
emergence of PCIe MiniCard (1.18” x 2”) sockets appearing on small form factor single board computers. Both of these options allow for off-the-shelf plug-in I/O modules to be quickly added to an embedded computer, including data acquisition I/O modules. Both options offer cost-effective data acquisition functionality in a much smaller and lighter board that does not increase the height profile of the SBC (Figure 2).
We’re Not in Kansas Anymore
ously with the IoT Cloud around them. The Internet of Things in an integral part of the future of computing. There will be no independent architectures. Everything will be seamlessly integrated through interoperable service platforms with data transferring instantly across the network to where it is needed. In embedded small form factor computing, where the real world meets the computer world, data acquisition has and will continue to serve as the service platform for interfacing with the physical world, evolving to meet the emerging needs of an ever changing environment.
The Internet of Things is moving quickly toward a complete integration of the many heterogeneous networks in the world today with the networked physical Diamond Systems objects around them. This includes the Mountain View, CA common factory floor and process control (650) 810-2500 systems and elements we are all familiar www.diamondsystems.com with today. Under the IoT umbrella, one of the most important issues is to capture and collect data from the physical world. In the future, IoT is expected to accomplish this at an extremely efficient level with a high level of accuracy. By integrating current and new technologies such as wireless sensor networks, RFID, intelligent sensors, embedded nodes and Web services, the future of data acquisition within the framework of the Internet of Things is headed toward low-cost, intelligentsystemssource.com IoT-enabled intelligent data acquisition nodes that receive instructions and/ or collect data wirelessly, then independently perform their assigned tasks. One approach is for the networked system to employ compression sampling at intelligent distributed data acquisition nodes, transfer the information wirelessly over the network, and ensure accurate data recovery at the IT servers. This approach will encourage the development of even smaller, smarter • See Instructional Videos data acquisition nodes em• Shop Boards Online • Read Articles & More bedded inside of the physi• Request a Quote cal objects themselves and communicating continu-
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Remote Device to Device Transfers
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TECHNOLOGY DEVELOPMENT Intelligence Plus Connectivity
Internet of Things Transforms Connected Health Applications Connected medicine relies on embedded computing systems with low power consumption, high processing power and good graphics capabilities. Designers are tapping processor advancements, pre-validated building blocks and manufacturer expertise to ensure the interoperability required by the Internet of Things, and to meet time-to-market with optimized price and performance. by Maria Hansson, Kontron
M
edical OEMs and developers have an opportunity within the growing connected health market, designing low power systems focused on graphics-rich computing. Modulebased designs add value with their ability to be used across a product family, covering a broad range of medical applications. The market is transforming rapidly, driven by the Internet of Things (IoT) and its focus on connectivity, security, scalability and sustainability. Applications range from IoT endpoint devices to infrastructure systems, moving well beyond just data collection and now enabling insight for smart, practical applications that add value to patient care by providing realtime data Integrated solutions based on standards such as SMARC and COM Express are paving the way for this type of medical design innovation. Designers have new competitive options including processors that increase performance, security and flexibility; and low power, open architectures that allow pre-validation of hard-
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ware. Standard, readily available modules and motherboards also simplify development, along with custom and semi-custom solutions designed to fit customer requirements on connectivity and performance. Designers must balance price, performance, product lifecycle and time-tomarket to compete in the complex market of intelligent healthcare applications.
balanced processor and graphics performance. ARM technologies are also optimized for medical design, providing industry impact due to performance per watt and interface configuration advantages (Figure 2). For example, ARM-based modules, as well as selected SMARC modules, feature cost-effective Parallel TFT display bus and MIPI display interfaces, which are not typically found on COM Express. ARM modules also support advanced graphical user interfaces that include graphics acceleration capabilities. Along with broad Ethernet and Wi-Fi network connectivity, ARM interface options include CAN, USB, SDIO, LCD I/F, I2C, SATA and PWM. These native features and broad range of interfaces supported by ARM technology contribute to shorter time-to-market. Further, low power consumption makes ARM modules attractive for mobile applications or scenarios where a battery-backed solution is necessary. SMARC covers two module footprints to offer flexibility for different mechanical requirements, including a short module measuring 82 x 50 mm and a full size module measuring 82 x 80 mm. The
Price and Performance Balance with Advancements in Power Consumption
Advancements in modules and boards providing reduced power consumption and better graphics are at the heart of these connected care systems— enabling secure, highly scalable designs. Low power design has been dominated by ARM-based platforms such as COMe and SMARC (Figure 1), fueled primarily by rapid advancements of smartphones, tablets and HMIs. Based on the ARM Cortex A9 technology, they enable an efficient development of smart devices in an extremely compact, fanless design with
FIGURE 1 Kontron’s SMARC-sAMX6i, an ultra-low-power ARM and SoC-based SMARC module, incorporates the Freescale i.MX6 family of solo, dual and quad core processors. The highly scalable Kontron SMARC-sAMX6i modules with single, dual or quad core Freescale i MX6 processors cover an extremely wide performance range.
TECHNOLOGY DEVELOPMENT
SMARC short module is comparable to the COM Express mini form factor (55 x 84mm), and both standards rely on carrier boards to add customization to a design, with the exception of custom BIOS requirements that are executed on the module itself. SMARC was originally developed as a COM standard for ARMbased processors, but is also well-suited for x86-based processors. New SMARC modules include the Intel Atom E3800 processor series in the 82 x 50 mm format, combining low power consumption of 5 to 10 watts with a mobile feature set tailored for the smallest portable handheld devices (Figure 3). There is still enough space for up to 64 Gbyte onboard SSD to store OS and application data. Intel Gen 7 Graphics are carried out via HDMI 1.4 and LVDS (optional eDP) with up to 2560x1600 and 60 Hz to the display. Customer-specific extensions can be implemented via 2 SDIO and 3 PCIe x1 lanes with 5 GT/s. Medical OEMs can deploy SMARCbased modules in any application where power consumption has to be kept at just a few watts but high-level computing and graphics performance are required. Like COM Express, modules can be upgraded for long-term performance without replacing the carrier board, thereby extending the life of the system. Customization contained in the carrier board can remain, allowing long-term scalability and improved performance for next generation versions of an existing medical product or device. Access to patient data such as test results and diagnostic images is a compelling reason for connectivity in healthcare. For medical OEMs, the E3800’s low power consumption is an essential part of the connected care equation, particularly when coupled with its built-in security features. For example, modules such as the Atom E3800-based SMARC and COM Express are increasing performance, security and flexibility in modern healthcare applications that rely on slim graphics-rich tablets, handheld PCs and stationary HMIs. Hardware-assisted capabilities, such as Secure Boot and Intel Advanced Encryption Standard New Instructions (Intel AES-NI), help secure endpoints, encrypt and decrypt data, and allow only trusted software to run on the device.
properly, identifying potential failures in advance so that routine scheduled maintenance can take place.
Purpose-Built x86 Platforms Add Value to Medical Deployments
FIGURE 2 Kontron’s ULP ARM and SoCbased SMARC module sA3874i incorporates TI’s AM3874 up to 800 MHz and is based on Cortex A8 technology, enabling low power consumption and rugged construction to withstand harsh medical environments.
ARM Platforms Drive Low Power, Pre-Validated Solutions Open architecture ARM platforms offer an optional building block solution approach used by medical designers. This building block approach helps minimize the time from evaluation to deployment, and provides value in terms of design flexibility, interoperability and smooth design migration. By leveraging the advantages of verified modules and boards, OEMs can avoid the long delay of validating hardware and gain a critical time-tomarket advantage. These pre-validated building blocks are tested to deliver the required interoperability and functionality; the customer would only need to focus on the system IP. With pre-validated building blocks, medical OEMs are assured of compatibility, interoperability and high reliability— so their full focus can remain on application development and OEMs can readily reuse their “library” of application-specific software and install it on their new hardware. By using a modular approach, there is also the ability to incorporate hardware monitoring. Similar to a smart home usage model, the large and costly machines used in medical treatment can communicate via IoT and minimize system downtime. The real-time data they share helps ensure systems are operating
Standard, mass-produced components are also part of reducing time-tomarket for connected, medical products. For instance, Kontron’s KTQ67/FlexMED is a dedicated medical motherboard manufactured in series production and featuring an EN 60601-1-compliant LAN (Figure 4). It connects two independent displays via DVI, has two isolated Gigabit Ethernet interfaces and 12 USB 2.0 interfaces, and its unique multi-purpose Feature Connector supports up to 160 GPIOs. Intel’s Active Management Technology 8.0 is supported for remote management and easy maintenance, resulting in higher system availability and lower overall costs. With extensive, built-in connectivity and interface options, standardized, highperformance medical motherboards tar-
FIGURE 3 Kontron’s SMARC-sXBTi Computer-on-Modules have been developed to comply with the SGET specification and are equipped with the Intel Atom processor E3800 series and up to 8 Gbytes of RAM, optional with ECC. They support the extended temperature range of -40° to +85°C, measure only 82 mm x 50 mm and have an especially lowprofile design thanks to the use of edge card connectors.
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TECHNOLOGY DEVELOPMENT
FIGURE 4 Kontron’s KTQ67/Flex-MED is a medical motherboard based on the Intel Q67 System Controller Hub and offers up to 32 Gbytes DDR3 RAM.
get graphics and/or processing-intensive medical applications. Today, this level of performance is required in nearly all healthcare environments, ranging from bedside applications and diagnostic work stations to computers in operating theatres, at nursing stations and in consulting rooms. These intelligent systems are often connected to hospital information systems (HIS), requiring non-stop connectivity and data sharing. In OEM equipment, this type of motherboard would be deployed as a back-end processing block and as a GUI controller for a variety of medical devices including stationary and semi-mobile ultrasound scanners, MRI and CT. Widely available boards simplify system development and advance connected healthcare applications, as medical OEMs, VARs and medical end users benefit from a broad customer base, improved support
CUBE
The
™
and better economies of scale. Another key advantage to using embedded motherboards is long lifecycle and revision control, enabling a stable platform for longterm deployment.
Solving Design Challenges with Customization
A notoriously fast-changing market, medical electronics follow a development path similar to that of consumer electronics; smaller, faster, more powerful devices are paving the way for advancements in smarter, more connected patient care. This includes the realm of low-cost connected healthcare strategies based on systems targeted to inexpensive, high volume production of in-home devices. Time-to-market is a primary challenge, with lengthy development and testing schedules, and regulatory review and certification that can mean anywhere from 24 to 36 months
expansion enclosures
Choose from a variety of options: ExpressCard, PCIe, or Thunderbolt connectivity package
1, 2, 3, 5, or 8 slots
Full-length (13.25”), mid-length (9.5” ), or short card (7.5” )
Half-height or full-height cards
36W, 180W, 400W, 550W or 1100W power supply
Flexible and Versatile: Supports any combination of Flash drives, video, lm editing, GPU’s, and other PCIe I/O cards. The CUBE, The mCUBE, and The nanoCUBE are trademarks of One Stop Systems, Inc. Maxexpansion.com and the Maxexpansion.com logo are trademarks of One Stop Systems, Inc. Thunderbolt and the Thunderbolt logo are trademarks of the Intel Corporation in the U.S. and other countries.
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ORDER TODAY!
TECHNOLOGY DEVELOPMENT
from project inception to volume shipment date. During this time, critical attention has to be given to managing the research and development cycle as well as costly and time-consuming efforts behind FDA review. At the same time, designers must be innovative, achieving a successful design by focusing on their core competencies to build products that stand out among the competition. Manufacturing partnerships can provide a significant competitive advantage in these efforts. In fact, “manufacturers as engineering resources” are integral to an effective design process—adding an understanding of fast-changing technology needs and how they relate to new IoT low power deployments. The COM platform, for example, can be heavily supported with customization tools and “perfect fit” custom baseboards within both x86 and ARM architectures.
Embracing the Internet of Things in Medical Design Greater emphasis has been placed on connected healthcare that provides the ability to seamlessly link patients, clinicians and patient care organizations. Real-time patient monitoring is an essential service in the healthcare industry. Connected systems are used to share data locally or remotely. By gaining access to real-time data, doctors can make more informed decisions and more closely monitor the progress of the treatment. The new need is for systems that fit into the Internet of Things and connected healthcare. With manufacturer support, developers are capitalizing on new x86 processors that enable cost-efficient, low power designs, as well the SMARC standard’s recent support of x86 options in addition to ARM-based processors. Long-
term availability of computing platforms based on both x86 and ARM-based processors is essential in meeting product lifetime demands, with service life often exceeding seven years. Standardized embedded form factors such as the latest SMARC and COM Express modules are key components in extended system lifecycles. These design options simplify electrical design and system development in general, and also act as scalable building blocks that ensure complete solution functionality over the course of an application’s life. With available standard modules and motherboards, as well as custom or semi-custom solutions that simplify connectivity and interoperability, designers have a rich opportunity to enable intelligent systems for smart, connected care. Kontron, Poway, CA. (888) 294-4558. http://us.kontron.com
SAFE TECHNICAL SOLUTIONS rom CES f
VIP-7412
The latest small form-factor (VITA 74) solution from CES features a TI DaVinci™ video processor providing multiple HD/SD streams of H.264, VC1, MPEG-4 Video, JPEG/MJPEG compression / decompression and multiple I/Os in a small rugged conduction-cooled format. ru
OSS_22
Headquartered in Geneva, Switzerland, CES - Creative Electronic Systems SA has been designing and manufacturing complex high-performance avionic, defense and communication boards, subsystems and complete systems for thirty years (such as ground and flight test computers, ground station subsystems, radar subsystems, mission computers, DAL A certified computers, video platforms, as well as test and support equipment). CES is involved in the most advanced aerospace and defense programs throughout Europe and the US, and delivers innovative solutions worldwide.
For more information: www.ces.ch
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TECHNOLOGY Graphics Core Next-Based GPU Doubles Performance with Seven-Year Longevity The first discrete graphics card based on Graphics Core Next (GCN) architecture is designed specifically to advance the visual growth and parallel processing capabilities of embedded applications. With more than double the performance in the same power envelope as its predecessor, the AMD E8860 GPU delivers 3D and 4K graphics to embedded gaming machines, digital signage, medical imaging, commercial aerospace and conventional military, and other embedded applications. A 33 percent higher single precision floating point over the previous generation at 768 GFLOPS enables the AMD E8860 GPU to also blast through the most complex parallel applications like terrain and weather mapping, facial and gesture recognition, and biometric and DNA analysis. The GPU, designed in multi-chip module packaging, comes with a seven-year longevity supply guarantee and is available as a mobile PCI Express module (MXM) and PCI Express add-in-board. It drives multiple independent displays with support for AMD Eyefinity Technology, and supports DirectX 11.1, OpenGL 4.2 and OpenCL 1.2 with support for Microsoft Windows 7, Windows Embedded 7 Standard, Windows 8/8.1, Windows Embedded 8 Standard, Linux and real-time and safety-critical operating systems supported by CoreAVI’s suite of embedded software drivers. Additional features include 2 Gbyte of GDDR5 frame buffer, advanced GPGPU capabilities for parallel processing with up to 61 percent higher performance-per-watt than competing sub-50W category of dis-
Tool for Design of Embedded GUIs Autogenerates C Code for Rapid Prototyping on PC
Today, the performance enhancements in modern devices lead customers to expect correspondingly better graphics capabilities and display resolution for next-generation applications. A graphical user interface (GUI) development framework for embedded systems is a PC-based GUI design tool featuring automatic code generation for embedded systems. GUIX Studio from Express Logic simplifies GUI development for medical devices, consumer electronics and industrial control equipment. Using GUIX Studio, developers and designers can execute a complete UI application on a PC, quickly and easily generating and demonstrating UI concepts and test screen flows in order to observe screen transitions and animations. With GUIX Studio, the designer can select, drag and drop, and resize images, backgrounds, widgets and other elements of a powerful GUI without having to write a single line of code. GUIX Studio generates the code
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crete GPUs. The GPU incorporates 640 shader processors, AMD APP technology, OpenCL 1.2 and DirectCompute 11.1. It is capable of 768 / 48 GFLOPS single / double precision peak (600e/4.5 Gbit/s), which amounts to improved performance with 92 percent higher 3D graphics performance-per-watt then the previous generation. The advanced platform power management results in 37W TDP. AMD E8860 GPU-based solutions for digital signage, conventional military and commercial aerospace, medical imaging and embedded gaming machines will be available from Curtiss-Wright Defense Solutions, Quixant, Sapphire, Tech Source Inc., TUL, WOLF Industrial Systems Inc. and other leading board manufacturers and solution providers beginning in Q1 2014. Advanced Micro Devices, Sunnyvale, CA (408) 749-4000. www.amd.com
necessary to implement the exact GUI design created on the PC. When completed, the same code can be compiled and linked with the GUIX and ThreadX runtime target libraries as part of a project. Developers can produce pre-rendered fonts for their applications using integrated font generation in GUIX Studio. Fonts can be generated in monochrome or anti-aliased formats that are compressed to save space on the target. Fonts can include any set of characters, including Unicode characters for multilingual applications. Importing graphics from PNG or JPG files and converting them to compressed GUIX pixelmaps for the target system is another integrated feature of GUIX Studio, and many of the GUIX widget types are designed to incorporate developers’ proprietary graphics for a custom look and feel.
In addition, developers can customize default colors and drawing styles used by the standard GUIX widgets. GUIX Studio also generates and maintains application strings for any number of target languages. GUIX Studio is available for Windows 7 and Windows 8 PCs. GUIX and GUIX Studio are licensed together at prices starting at $12,500. Express Logic, San Diego, CA (858) 613-6640. www.expresslogic.com
PRODUCTS & TECHNOLOGY
Updates to Operator Interface System Provide Faster Development and Better Mobile
Industrial automation manufacturer Opto 22 has announced groov version 2.1, an update to its groov Web-based mobile operator interface system for building and using effective, scalable operator interfaces on smartphones, tablets and other mobile devices. groov 2.1 improvements include faster tag handling with OPC-UA servers, and improved data exchange with mobile devices for faster response times
can be added to interface screens, making it possible, for example, to incorporate an internal company webpage showing production targets and KPIs. Update/refresh rates can be individually set for IP camera widgets, so an IP camera monitoring a production machine, for example, can update twice a second, while a camera watching a loading area might update once every ten seconds. In addition, slider controls and range/level indicators can be oriented horizontally or vertically. Orienting these items ver-
tically saves screen space and is particularly useful for compact mobile devices. groov 2.1 will be available as either the groov Box hardware appliance (GROOV-AT1) at a list price of $2,895 or groov Server for Windows software (GROOV-SVR-WIN) at a list price of $2,695. Opto22, Temecula, CA (951) 695-3000. www.opto22.com
and lower mobile network costs. groov is a zero-programming, Web-based way to build, deploy and view effective, scalable operator interfaces to monitor and control systems and equipment using mobile devices and other computer-based systems. These operator interfaces can be viewed on almost any mobile device or computer regardless of its manufacturer, operating system, or screen size, including smartphones, tablets, PCs and even smart high-definition televisions. A major improvement in groov 2.1 is faster operator interface development due to new real-time OPC tag browsing. An OPC-UA server can have potentially tens of thousands of tags to choose from for an operator interface, and real-time browsing makes it faster to select tags and link them to on-screen indicators and controls. groov 2.1 exchanges up to 75% less data with smartphones, tablets and other devices running an operator interface than earlier groov versions, thanks to improved data handling and compression. Mobile devices operating over a cellular or other network with slower connections benefit with faster updates, faster interface responses and lower mobile network costs. groov 2.1 includes other improvements and new features including webpage links that
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PRODUCTS & TECHNOLOGY
Rugged, 14-Port Gigabit Managed Ethernet Switch with 2 SFP Sockets
A rugged, managed Layer 2+ Ethernet switch module offers twelve 10/100/1000 Mbit/s copper twisted pair ports and two small form factor pluggable (SFP) sockets in a compact COM Express form factor. The new standalone Epsilon-12G2 switch from Diamond Systems does not require any host computer interface. A 480 MHz MIPS processor embedded directly into the switch manages all switch functions. The processor is accessed via an in-band Web interface over one of the Ethernet ports or via an out-of-band command-line interface over an RS-232 serial port. The integrated Web interface provides an intuitive GUI for configuring and managing all switch functionality. Onboard memory holds dual application images, boot code, MAC addresses and other parameters, and can also be used for program execution. Designed for use in rugged applications including industrial, on-vehicle and military environments, Epsilon-12G2 operates over an extended temperature range of -40° to +85°C. All I/O connectors are latching, providing enhanced reliability over the RJ-45 connectors used in commercial Ethernet switches. A 50% thicker PCB provides better protection against vibration in vehicle environments. The +5 to +40V wide range DC/DC power supply is compatible with all common vehicle and industrial power sources. The switch’s dual SFP socket interfaces to 1G fiber Ethernet networks. One port can operate at an enhanced 2.5G to support efficient stacking of two switches together for a combined total of 26 ports. Epsilon-12G2 comes with all the required firmware preconfigured, enabling immediate operation without any development effort. Diamond Systems Mountain View, CA (650) 810-2500 www.diamondsystems.com
Freescale QorIQ T2080 and T1042-Based Modules for High Performance per Watt
Two new Freescale QorIQ T2080 and T1042-based modules, the XPedite5970 and the XPedite6101 have been introduced by Extreme Engineering Solutions. The XPedite5970 is a 3U OpenVPX REDI module based on the T2080 processor, and XPedite6101 is a conduction-cooled XMC or PrPMC module based on the T2081, T1042, or T1022 processor. The XPedite6100, an air-cooled, front panel I/O, XMC/ PrPMC module will soon be available from X-ES, as well. The Freescale T2080 and T2081 processors provide a system-on-chip (SoC) solution that emphasizes processing and I/O performance per watt in a space-efficient package. They offer eight virtual (four dualthreaded) e6500 cores and support an operating frequency of up to 1.8 GHz. Each e6500 core includes the Freescale AltiVec technology-based SIMD engine, providing DSP-level floating-point performance and an extensive inventory of software libraries. The T2081 processor provides the same performance and capability as the T2080 in an even smaller package, which is pin-compatible with the T1042 and T1022 processors. The T1042 processor provides a lower-power alternative with four e5500 cores running at up to 1.4 GHz. The T1022 provides the lowest-power option with two e5500 cores running at up to 1.4 GHz. The OpenVPX REDI XPedite5970 supports up to 8 Gbyte of DDR3 SDRAM and provides a plethora of I/O options to
the backplane, including 10 Gigabit Ethernet, Gen3 PCIe and Gen2 SRIO. The XPedite5970 provides superior growth and expansion capabilities by including an XMC or PMC site with full 10 mm I/O envelope support. It maintains a 0.8 in. VPX slot pitch, providing the system integrator with a wide variety of COTS options for additional I/O, storage, or processing while minimizing total system SWaP-C. The XPedite6101 provides a compact, versatile and cost-effective rugged computing solution. It supports multiple processor configurations and up to 8 Gbyte of DDR3 ECC SDRAM. It also supports a number of high-performance I/O options with a Gen2 PCI Express interface to P15, as well as dual Gigabit Ethernet, USB 2.0 and SATA 3.0 Gbit/s interfaces to P16. The XPedite5970 and XPedite6101 offer Wind River VxWorks, Linuxand Green Hills Integrity Board Support Packages (BSPs). Extreme Engineering Solutions, Middleton, WI (608) 833-1155. xes-inc.com
Mini Card Carrier for CompactPCI Serial
A peripheral board for CompactPCI Serial systems serves as a quad PCI Express Mini Card carrier, either full- or half-size style. The SP4-Mambo from EKF Elekronik provides an additional socket for an optional mSATA module. Up to six SMA antenna connectors are available via the front panel, for MIMO operation of wireless Mini Cards, such as WiFi (WLAN) or GPRS/LTE (WWAN). Any module socket is wired to an individual Micro SIM card holder. Each PCI Express Mini Card socket can accommodate either a USB or PCIe-based module. The mSATA socket is suitable for either a SATA SSD, or a USB controlled Mini Card. The SP4-MAMBO is equipped with an
onboard Gen2 PCI Express packet switch and a PCIe to USB 2.0 bridge, and can be installed into any peripheral slot of a CompactPCI Serial backplane. EFK Elektronik, Hamm, Germany +49 (0) 2831/6890-0. www.ekf.com
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A TQMP2020 module with a Freescale QorIQ can save you design time and money
TQ embedded modules: ■
Are the smallest in the industry, without compromising quality and reliability
■
Bring out all the processor signals to the Tyco connectors
■
Can reduce development time by as much as 12 months
Safety-Critical Expertise and Full Verification for Multicore Platforms
Technology in Quality
With industry’s continued emphasis on reducing size, weight and power (SWaP), safetycritical systems manufacturers continue to look for ways to achieve full verification and even certification of multicore systems in a cost-effective manner including the ability to provide costeffective verification of multicore systems to safety-critical standards. New capabilities in the tool suite from LDRA provide the ability to instrument and capture analysis and test data from such systems and break through the verification barrier, promising system developers the resources and technology they need to achieve rigorous certification. The need for greater processing power with reduced power consumption is driving the developers of safety-critical applications toward multicore systems. Verification of such systems for rigorous safety-critical certifications such as DO-178C poses specific challenges. When multiple processes run on different cores, the process of collecting structural coverage data and creating and executing tests efficiently can be hampered by concurrency, reliability and robustness roadblocks. The LDRA tool suite confronts such challenges on multiple levels. With highly optimized instrumentation and analysis, LDRA aggregates the coverage data across the various processors in the multicore system without the typical overhead of mutexes. This approach avoids the deadlocks caused by other verification tools and technologies. On another level, LDRA comprehensively integrates with RTOS and compiler vendors such as Wind River and Green Hills Software to enable execution of all capabilities across the set of cores. Finally, LDRA’s reduced and optimized instrumentation and data collection eases memory and performance overhead. The tools provide rich, industry-proven integrations with today’s leading safety-critical RTOS vendors. In the avionics sector, LDRA offers full support for the integrated modular avionics technology offered by both Wind River ARINC 653 and Green Hills Integrity-178C. LDRA support includes advanced I/O, project file and IDE integrations, integrations with compiler tool chains and simulators across a wide range of silicon, and integrations with virtualized environments. The LDRA tool suite works seamlessly within the various tool chains, enabling development teams to bring together the development, execution and verification infrastructure. LDRA’s capabilities for coding-standard compliance, structural coverage, data and control coupling, and lowlevel testing can be introduced into the verification workflow as needed on the host, simulator, or actual target hardware. Such comprehensive capabilities dramatically improve workflow and development transparency, and ultimately ensure quality of the delivered multicore application.
ConvergencePromotions.com/TQ-USA
LDRA, Merseyside, UK +44 (0)151 649 9300. www.ldra.com
The TQMP2020 module comes with a Freescale QorIQ™ Power Architecture® MCU and supports Linux and QNX operating systems. The full-function STKP2020 Starter Kit is an easy and inexpensive platform to test and evaluate the TQMP2020 module.
TQ-USA is the brand for a module product line represented in N. America by Convergence Promotions, LLC
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TQMP2020 V2 1-3 Page Ad.indd 1
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RTC PRODUCT GALLERY
Solid-State Drives and Industrial Box PCs
Rugged, Stackable Embedded Systems
• Compatible with RTD’s complete line of PCI Express, PCI, and ISA Single Board Computers, Power Supplies and Peripheral Modules • Stackable, modular chassis milled from solid T-6061 aluminum • Standard PC connectors or optional locking cylindrical connectors with custom pinouts • Optional watertight configurations with EMI suppression and RF isolation • Integrated heat sinks, heat fins, and advanced heat transportation technology • Example programs included to demonstrate product features • -40 to +85°C operating temperatures Phone: (814) 234-8087 Email: sales@rtd.com Web: www.rtd.com
ADLMES-8200 High-Ingress Protection (IP) Modular Enclosure Systems
EN Micro’s MH70I modular application-ready industrial PC features up to nine M configurable slots in one system; pre-defined software for rapid development; operating temperature 0°C to +50°C; up to 16 GB soldered DDR3 DRAM with ECC; up to four SATA hard disks for RAID.
• Modular Design Supports Variable Stack Heights (2 - 6 Cards) • Three Basic Size Profiles Available to Reduce Time to Market • Quick Turn Front I/O Plate Can Be Easily Customized • IP60 and IP65 Configurations • Wide Range of PC/104 SBCs Ranging from Low Power Atom to 4th Gen Intel Core i7 • Designed for MIL-STD 704/1275/461
Phone: (215) 542-9575 FAX: (215) 542-9577 Email: sales@menmicro.com Web: www.menmicro.com
Phone: (858) 490-0597 FAX: (858) 490-0599 Email: sales@adl-usa.com Web: www.adl-usa.com
MEN Micro’s new MH70I Modular Industrial PC
VPX6000 Rugged 6U VPX Processor Blade
• Intel Core i7 processor with ECC • Dual channel DDR3L ECC memory soldered, 16GB per node • Supports three independent displays • Supports storage upgrade via mezzanine card • Remote management and TPM support • Rugged conduction cooled with conformal coating
Virtium gives OEMs proven storage options to match application usage models and minimize requals. With Virtium’s complete line of StorFly SATA 6 Gbit/s SSDs, infrastructure developers can optimize their storage design to deliver higher reliability, meet -40° to +85°C operating temperature requirements and offer the highest endurance – up to 270 GB/day for 10 years.
Phone: (408) 360-0200 Email: info@adlinktech.com Web: www.adlinktech.com
Phone: (949) 888-2444 Email: sales@virtium.com Web: www.virtium.com
SFD 25A
SFD 25AS & SFD 25AT
Phone: (408) 518-8699 Email: ssdsales@apacerus.com Web: www.usa.apacer.com
Phone: (408) 518-8699 Email: ssdsales@apacerus.com Web: www.usa.apacer.com
• SATA 3.0 (6Gb/s) transmission interface • Capacity up to 256GB • Sequential performance up to 475/440 MB/sec, IOPs up to 70K • TRIM command support • DEVSLP support / Thermal sensor support
StorFly - SATA Embedded SSDs
• SATA 3.0 (6Gb/s) transmission interface • CorePower Technology, developed to implement backup power supply • Built-in an Intelligent Power Failure Status Detect Function • TRIM command support
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8-Bit Microcontroller Family with Intelligent Analog and Core-Independent Peripherals
Microchip Technology has announced the PIC16(L)F170X and PIC16(L)F171X family of 8-bit microcontrollers (MCUs), which combine a rich set of intelligent analog and core-independent peripherals, along with cost-effective pricing and eXtreme Low Power (XLP) technology. Available in 14-, 20-, 28- and 40/44-pin packages, the 11-member PIC16F170X/171X family of MCUs integrates two Op Amps to drive analog control loops, sensor amplification and basic signal conditioning, while reducing system cost and board space. These new devices also offer built-in zero cross detect (ZCD) to simplify TRIAC control and minimize the EMI caused by switching transients. Additionally, these are the first PIC16 MCUs with Peripheral Pin Select, a pin-mapping feature that gives designers the flexibility to designate the pinout of many peripheral functions. The PIC16F170X/171X are general-purpose MCUs that are suitable for a broad range of applications, such as consumer (home
Modular Box PC Provides Precise Location of Train Cars
A modular box PC enables precise positioning of a train car within a railway network. Based on MEN Micro’s standard BL50W used for wireless applications, the custom box PC controls all functions required for the exact positioning of a train car. MEN developed the technology in cooperation with Deutsche Bahn, the German railroad. The use of modular and robust box PCs has been steadily gaining ground as a compact, cost-efficient alternative for applications that traditionally use industrial PCs. Deutsche Bahn is the latest example. Equipped with two antennas, the box PC receives GPS data from several satellites and forwards it to the control center via UMTS where position and current speed are calculated. Differential GPS enables location accuracy of less than 3m to determine the exact track on which the car is traveling. An odometer provides dead reckoning functionality. Exact vehicle position can be identified even if the satellite signal is interrupted, as when driving through a tunnel.
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appliances, power tools, electric razors), portable medical (blood-pressure meters, blood-glucose meters, pedometers), LED lighting, battery charging, power supplies and motor control. The PIC16F170X/171X family features core-independent peripherals, such as the configurable logic cell (CLC), complementary output generator (COG) and numerically controlled oscillator (NCO). These “self-sustaining” peripherals take 8-bit PIC MCU performance to a new level, as they are designed to handle tasks with no code or supervision from the CPU to maintain operation. As a result, they simplify the implementation of complex control systems and give designers the flexibility to innovate. The CLC peripheral allows designers to create custom logic and interconnections specific to their application, thereby reducing external components, saving code space and adding functionality. The COG peripheral is a powerful waveform generator that can generate complementary waveforms with fine control of key parameters, such as phase, dead-band, blanking, emergency shut-down states and error-recovery strategies. It provides a cost-effective solution, saving both board space and component cost when driving FETs in half- and full-bridge drivers for control and power-conversion applications, for example. The NCO is a programmable precision linear frequency generator, ranging from <1 Hz to 500 kHz+. It offers a step up in performance, while simplifying designs requiring precise linear frequency control, such as lighting control, tone generators, radio-tuning circuitry and fluorescent ballasts. The new MCUs feature up to 28 Kbyte of self-read/write Flash program memory, up to 2 Kbyte of RAM, a 10-bit ADC, a 5-/8-bit DAC, Capture-Compare PWM modules, stand-alone 10-bit PWM modules and high-speed comparators (60 ns typical response), along with EUSART, I2C and SPI interface peripherals. They also feature XLP technology for typical active and sleep currents of just 35 µA/MHz and 30 nA, respectively, helping to extend battery life and reduce standby current consumption. Microchip Technology, Chandler, AZ. (480) 792-7200. www.microchip.com.
This precise positioning, down to the track, offers crucial advantages regarding track utilization, wait times and power consumption. A faster train can overtake a slower one between stations without danger, trains can be coupled quicker in switch yards using suitable software, or the train speed can be adapted to the landscape. The Deutsche Bahn solution can be upgraded to utilize the functionality of the original BL50W including four PCI Express Mini Card slots with eight SIM card slots, an additional hard disk or different I/O interfaces such as CAN or RS-232/RS-485/RS-422 using SA-Adapters. The standard BL50W uses the T48N AMD Embedded G-Series APU and is equipped with a GPS interface. Additionally, it offers two DisplayPorts, two Gigabit Ethernet channels via robust M12 connectors, two USB 2.0 and five slots for serial I/O or CAN bus, as well as a number of universal inputs and relay outputs.
The BL50W is designed for fanless operation in the extended operating temperature range of -40° to +85°C, and is developed in compliance with EN 50155 for use in railway applications. It also complies with the requirements for E-marking according to ISO 7637-2 for automotive applications. As the I/O and the CPU parts of the BL50W are implemented on two separate PCBs inside the box PC, the system can be easily and cost-effectively adapted to a user's needs. Pricing for a standard BL50W is $2,048. MEN Micro, Blue Bell, PA (215) 542-9575. www.menmicro.com
PRODUCTS & TECHNOLOGY
A TQMa6x module with a Freescale i.MX6 can save you design time and money
TQ embedded modules:
System Details Steps for Realizing ISO 26262 Automotive Standard Compliance
A new compliance management system can provide companies with the proper infrastructure enabling ISO 26262 compliance. LCMS for ISO 26262 from LDRA walks customers through the fully automotive-compliant plans, document and transition checklists, standards and other lifecycle documents, and problem reports to help customers manage software planning, development, verification and regulatory activities of ISO 26262 Part 6, Product Development: Software Level (ISO 26262-6). LCMS for ISO 26262-6 details a process that ensures software functional safety at dramatically reduced project costs. Although ISO 26262 is not government mandated, automotive OEMs have adopted the standard for their supply chain as a way to ensure quality and to manage risk and liabilities. For suppliers, this demand for standard compliance imposes a need for explicit processes and documentation that provides process and product visibility and enables process assessment by OEM Safety Assessors sent to audit suppliers. LCMS includes the detailed document templates outlined by the ISO 26262 standard and walks the LCMS customer through the required activities needed to gain approval for each stage of development. LCMS’s comprehensive compliance management can become the process backbone underpinning compliance for automotive suppliers. LCMS comes complete with a document review management system, comprehensive review and analysis management system, and problem reporting management system with activity checklists. Building on LDRA’s more than forty years of high-assurance software quality and certification experience, LCMS helps companies transition through the stages, automating the process to ensure that progress from one stage to another is seamless. While the compliance tools can work with any customer tool chain, customers who integrate LCMS for ISO 26262-6 with the LDRA tool suite are able to streamline their verification process, further reducing thousands of hours of documentation effort and up to 50 percent reduction of planning costs. To provide additional flexibility and security for customers, LDRA offers LCMS for ISO 26262-6 to operate in either Cloud-based or locally hosted environments. LCMS Local is installed and secured behind an applicant’s firewall to address security-sensitive requirements while LCMS Cloud delivers a more economical option for companies with greater flexibility. Both options include a two-day quick start training. LDRA Boston, MA (855) 855-5372 www.ldra.com
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Are the smallest in the industry, without compromising quality and reliability
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Bring out all the processor signals to the Tyco connectors
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Can reduce development time by as much as 12 months
The TQMa6x module comes with a Freescale i.MX6 (ARM® Cortex™-A9), and supports Linux operating systems. The full-function STKa6Q-AA Starter Kit is an easy and inexpensive way to evaluate and test the TQMa6x module.
Technology in Quality
ConvergencePromotions.com/TQ-USA TQ-USA is the brand for a module product line represented in N. America by Convergence Promotions, LLC
RTC MAGAZINE MAY 2014 TQMa6x V2 1-3 Page Ad.indd 1
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Company Page Website Acces I/O.......................................................................................................................... 44.............................................................................................................www.accesio.com Advanced Micro Devices, Inc............................................................................................. 52................................................................................................ www.amd.com/embedded Altia................................................................................................................................... 2............................................................................................................. www.altia.com/gui Commell........................................................................................................................... 36.......................................................................................................www.commell.com.tw Congatec, Inc.................................................................................................................. 4, 15........................................................................................................... www.congatec.us Creative Electronic Systems............................................................................................... 41......................................................................................................................www.ces.ch Design Automation Conference.......................................................................................... 33...................................................................................................................www.dac.com Dolphin Interconnect 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Inc................................................................................................... 11, 40.............................................................................................www.onestopsystems.com Pentek, Inc......................................................................................................................... 5...............................................................................................................www.pentek.com Portwell............................................................................................................................. 7............................................................................................................. www.portwell.com Real-Time & Embedded Computing Conference.................................................................. 50................................................................................................................ www.rtecc.com RTD............................................................................................................................... 26-27.................................................................................................................www.rtd.com Sensoray........................................................................................................................... 19...........................................................................................................www.sensoray.com Sensors Expo & Conference............................................................................................... 29..................................................................................................... www.sensorsexpo.com Trenton Systems................................................................................................................ 51................................................................................................. www.trentonsystems.com TQ Systems GmbH......................................................................................................... 46, 49................................................................... www.convergencepromotions.com/TQ-USA WinSystems...................................................................................................................... 23....................................................................................................... wwwwinsystems.com Product Showcase............................................................................................................. 47........................................................................................................................................
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High-Performance Computing Conference
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Master Your Domain
From 2U to 5U rackmount computers and custom enclosures, let Trenton Systems help you to master your application domain. Our systems are built to your exact requirements using Trenton’s Made In USA boardlevel products. Key system features include:
System solutions engineered by Trenton are at work in a variety of military, aerospace, industrial automation, telecommunication, and video display wall controller applications. For over 30 years Trenton has been providing products to our customers that include:
Rugged, lightweight aluminum enclosures
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Our board engineering experts are available to discuss your unique military computing application requirements. Contact us to learn more at 770.287.3100 / 800.875.6031 or www.TrentonSystems.com
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