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The magazine of record for the embedded computing industry

February 2013

Machine-to-Machine: How Much Autonomy? System Security Starts On-Chip Linux and Android: Sorting out the Roles An RTC Group Publication







42 Compact Chassis Mount AC-DC Power Supplies Ease Installation in Challenging Environments

45 PLX and Kontron Announce PCI Express Fabric Advance


46 Rugged Portable RF/IF High-Bandwidth Signal Recorder



6Editorial “Big Data” Is a Big Opportunity Form Factor Forum 8Small Processor Roadmap for the Coming Year & Technology 42Products Newest Embedded Technology Used by Industry Leaders


Technology in Context


System Security On-Chip

M2M: How Much Autonomy?

Secure Boot Capability to 14 Adding Embedded Processors G. Richard Newell, Microsemi and Robert K. Braden, Bradtec Security Consultants

TECHNOLOGY CONNECTED BYOD: USB Screams into System Connect


USB 3.0 Brings New Connection Capabilities to System Design Terrill Moore, MCCI

ASICs, ASCs and SoCs

on Chip: Treading the Path Between FPGA and ASIC 10System Clarence Peckham

Much Autonomy? Achieving 24How Efficiency via M2M without Losing Control Christine Van De Graaf, Lilee Systems

Panel PC Technologies Make Industrial HMIs Intuitively 28Integrated Easier to Use and More CostEffective

Max Scholz, Kontron

TECHNOLOGY DEPLOYED Linux and Android: Sorting Out the Roles or Android: Which Is Right for Your Next Design? 34Linux Bill Weinberg, Olliance Consulting Division of Black Duck

and Linux – A Closer Look at the Family Tree 38Android Andrew Patterson, Mentor Graphics

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Simulink With Simulink® Release 2012b, it’s even easier to build, manage, and navigate your Simulink and Stateflow® models: • • • • • • •

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Tom Williams Editor-in-Chief

“Big Data” Is a Big Opportunity


hat is money? Normally this would not even come close to being a topic in an embedded systems publication, but the growing connectedness of literally everything and the advent of “big data” bring the question into focus due to the changing way we interact with the world around us. It would not normally concern issues of, say, factory automation systems. The only thing is that today’s factory floor is connected to the IT systems, which are connected to sales and more. Thus an order placed for a product with a choice of colors, options, features, etc., affects what operations the factory floor equipment performs; it affects inventory; it supplies data to marketing. The list goes on. Through all of this, money is also moving around. The customer’s order gets charged against the bank account or credit card; funds are allocated to replace used inventory; electricity is used and paid for by work done on the factory floor. Sales commissions are calculated and paid. Meanwhile, the factory automation produces products to customer specifications. It is all interconnected. And now we are getting ever more “virtual” when it comes to our own interactions with the connected Internet, the Internet of Things and the monetary/banking systems that are intimately connected to all the commerce taking place on the Web. New digital signage and kiosk systems can interact with smartphones to make purchases; small devices plug into smartphones to allow swiping credit and debit cards. All this interacts with an enormous financial and banking system that spans the globe. As with the Internet, cloud computing and the rising Internet of Things, it is too late to ask, “Are we too dependent on this connectivity?” It is now our world so we must work on making it more robust and maximizing the advantages that can be gained. The fact that money, which in ancient times came in the form of gold and silver, is now coursing around the world in the form of data, just like all the other data generated by sensors, machines and most other human activity, makes for extremely flexible and creative possibilities. Of course, one of the main reasons computers were invented in the first place was to keep track of money and transactions, but today that digital representation is virtually in everyone’s wallet. In addition, whether we call it “big data” or not, there is a growing societal awareness that most everything we deal with in our lives is somehow represented and accessible digitally. This is



new and has largely been brought about not by the PC, which is a unique and distinct device, but through the gradual transformation of the once landlocked telephone through the mobile cell phone and finally to the smartphone. The vast world of interconnected interactive data is available by way of what in everyone’s mind is a completely normal everyday object. Of course, no one thinks about the fact that when they order a product over their phone on the Internet, data flies in all different directions to affect persons and processes involved with that product, its manufacture, future revisions, marketing strategies and so much more. But it does. And practically any other seemingly isolated or simple interaction can have data implications known to few—some may have effects that are not totally known by any single person. Many others, of course, are carefully selected and crafted for specific purposes and may include both public and proprietary data. And the term “big data” is itself still in the process of being fully defined. However, one important point is already clear: “big” refers more to the importance of data than to its volume or size and the fact that it is available in such variety and profusion. In fact, data from whatever sources—from sensors to stock transactions to manufacturing and surveillance—may be created with some specific purpose in mind, but that does not necessarily preclude it from being used by the same or totally different people for different, creative purposes in combination with other data that may have completely different origins and original intent. That means that some creative developer may run across data created for some application, either within his or her own organization or even from some outside source, and use it in innovative ways. So we are not living in The Matrix, where all but a few people were unaware that they were living within a gigantic computer simulation. Rather we are living with a matrix that hopefully can be controlled and utilized to our common advantage so that the more aware we become of its scope and potential, the better advantage everyone will be able to take of it. And, of course, the more applications that are created using available data, the more data will become available thus enabling the development of even more applications. We’ve got ourselves a matrix all right, but it is one that we can use and expand, aware of the things we can create with it.

Microsoft to Introduce Intelligent System Strategy With Windows Embedded 8 YOU ARE INVITED: 34 CITIES ONE POWERFUL TECHNOLOGY UPCOMING EVENTS ASIA

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Windows Embedded Summit What Is It? A half-day technical brieď&#x192;&#x17E;ng highlighting the Microsoft intelligent system strategy and how engineers and technology leaders can leverage existing WES7 and upcoming WES8 technology to increase embedded OEM business more effectively. Who Is Invited? Business leaders and technology decisionmakers will be invited to join Microsoft and key partners at over 30 global locations. Questions Answered: What game-changing technology does Windows Embedded 8 bring to embedded design? How to best select an embedded software platform for next generation intelligent systems? How to get started today and prepare your business for the future?


FORUM Colin McCracken

Processor Roadmap for the Coming Year


013 is already shaping up as a banner year for embedded processors from 1W SoCs to quad and hex core machines with huge caches and innovative thermal solutions. The usual suspects are preparing their roadmaps by extending their successful current generation offerings. Look no further than their primary market announcements (consumer/enterprise) to know what’s heading our way. High-end processors each come with a companion chip (chipset) from the same vendor that serves as an I/O hub. These chipsets are quite impressive with many PCIe lanes, USB 3.0, SATA II and GigE MACs. It’s a diff-pair world, and price and power consumption aren’t really critical in this performance class. Sure, the legacy parallel buses are gone, but so is the requirement for a third large IC. Board vendors can support either parallel PCI or ISA bus by adding a small/cheap or smaller/cheaper bridge chip, respectively, or simply skip both in a ground-up new design. Low-end processors, however, are all about Size, Weight and Power (SWaP) and Cost, just like the commercial off-the-shelf (COTS) boards and modules onto which they’re mounted. That means fewer PCIe lanes and few or no power-hog USB 3.0 or SATA II ports. Sometimes even an old-school serial port or two may appear, presenting a compatibility challenge to the various COTS off-board interfaces. This year appears to be finally the inflection point of true x86 SoCs. This is a big win for board vendors and small form factor (SFF) standards alike. Each new generation is yet another stellar tribute to the livelihood of Moore’s Law. At the processor level, at least, there is no high-tech “fiscal cliff” in sight. Continuing their “tick-tock” model, Intel will follow its newly launched 22nm “Ivy Bridge” third generation Core i-series platform with the fourth generation 22nm “Haswell” microarchitecture. Experience with this semiconductor process makes it harder for competitors to keep up. Low-end models target graphics-oriented embedded apps while staying under 20-25W with Intel’s long seven year plus lifecycle for select models. For this, we are truly grateful. Not to be outdone, AMD is currently launching its “Fusion” quad core and dual core 32nm “eTrinity” processors. AMD has done a stellar job at enabling software support for its integrated GPUs, such as DirectX 11, OpenGL and OpenCL. Thermal de-



sign power (TDP) ratings range from 17W to 35W. From a purely embedded market perspective, these processors are priced well and pose the most significant threat to Intel in many years. Racers, start your engines. Starting to make some headway with OEMs in the tablet space (but not smartphones yet), Intel’s current “Cedar Trail” (“Cedarview”) platform has several new ACPI power-saving states. Intel should fully catch up to ARM by using its process technology advantage, and has already announced the acceleration of the “Valleyview” true single-chip / system-on-chip (SoC) family on 22nm for consumer markets. AMD is not far off the pace, with 28nm SoCs called Kabini and Kaveri on the 2013 consumer roadmap behind the power-efficient graphics of its 40nm eOntario. Although it’s not clear how well AMD will do in the consumer and enterprise markets, squeezed below Intel and above ARM, embedded developers will be the clear winners, with certain models likely to be added to AMD’s long lifecycle embedded roadmap. While ARM-based SoC manufacturers are too numerous to list, many are chasing extremely high-volume and high-turnover consumer electronics markets and would be risky choices for longlife embedded systems. Among the few with long-term availability commitments is Freescale, whose brand new i.MX6 family features single, dual and quad ARM Cortex A9 cores, 3D graphics, 1080p decode, and includes models with an impressive 10-year lifecycle, due to its automotive heritage while under Motorola’s wing. Embedded boards are just becoming available this quarter. Take note: The software “wolf” is always at the door. Linux has broad processor support (RISC and CISC) when it comes to instruction set architecture, privilege mode and compiler support, however, device driver support may not cover all I/O categories. Windows is now catching up with ARM support as part of the Windows 8 project. Launched alongside the x86 Win8 back in October, Windows RT is being distributed to tablet OEMs. Besides access to the OS, ARM-based device driver support and applications are certainly limited at this time. Managers and project leaders who come from a hardware design background would be well advised to ask their software engineer peers to pour through the OS and driver support to minimize the “gotchas” when developing with these next-gen platforms.

editor’s report ASICs, ASCs and SoCs

System on Chip: Treading the Path Between FPGA and ASIC The quest for highly integrated devices for product development offers more choices today than ever before. Still, the considerations remain such as power consumption, cost, time-to-market, volume and ease of development. by Clarence Peckham, Senior Editor


he application specific integrated circuit (ASIC) and field programmable gate array (FPGA) evolution since the 1980s has been dramatic. As an example, the x86 processor in 1980 was about 30K transistors and today the latest Intel dual core processors are over 2B transistors, which is an increase of 60,000 fold in 30 years. The use of ASIC and FPGA technology is increasing in all products—from the simplest toys to the most sophisticated imaging and signal processing applications. The selection of which device to use is driven by several factors—time-to-market, volume expectations, development cost, product cost, size and power. There is a large selection of FPGA and ASIC solutions available from multiple vendors from which the embedded product design team can choose. Unfortunately the life span of a finished product decreases each year as new feature requirements and technologies push aside last year’s product. Today’s design team is facing a shorter development time and pressure to reduce the development costs



while at the same time increasing the functionality of the end product. The objective of using a programmable device is to develop a system on a chip (SoC) that will provide the best cost, performance and power design that meets the end product requirements. If the final SoC design can be utilized in multiple products then that is an extra benefit. When looking at developing a SoC there are three choices: full custom, ASIC and FPGA. The simplest differentiation of the three choices can be made by comparison to making a pizza. The full custom approach is similar to making a pizza from scratch—making the crust, the sauce and adding all of the toppings. The ASIC approach is similar to using an existing pizza crust with sauce and just deciding on the toppings to add. The FPGA approach is the simplest—buy the pizza, take it home and bake it. Each of the three versions of making an integrated circuit has benefits and costs. Table 1 is a summary of the three options to develop a SoC. If time is available and the volume is very high, the full custom approach is

the least expensive from a product cost. However, it also has a very high development cost and risk with multiple iterations of the chip due to errors, which are a common problem. The ASIC solution is a good choice for medium volume products that need to get to market quickly but at the same time have a reasonable cost. An FPGA solution is a good choice for a product that is low volume and requires low development time but at the cost of the highest per unit price. However, an FPGA that costs $600 is still a reasonable solution for a product that sells for $10,000.

Drivers for Integrated Circuit Development

Some of the design factors driving development of ASIC/FPGA designs today are shown in Table 2. The first on the list is programmability/embedded software. Early implementations of ASIC/FPGA designs expected an external processor to be available. and the purpose of the ASIC/ FPGA was to add custom I/O or specialized processing. In order to improve programmability on the SoC, processor cores are being added that can be used for the embedded software. In a lot of product designs this eliminates the need for an external processor completely. One of the added risks is that the software development team cannot test the software until there is a working SoC available. Intellectual Property (IP) reuse is important due to the cost of developing the IP in both dollars and time. IP can be developed by the design team or purchased from a supplier. Examples of IP are processor cores, PCIe cores or other specialized functions. As the design has become more complex, reuse of IP is a way to increase design productivity. Using multiple IP cores and assembling them via the interconnect fabrics reduces the development time significantly. Some IP cores have become so popular that FPGA vendors have included them as preconfigured (hard) cores in their products. For instance, both Altera and Xilinx provide PCIe and Gigabit Ethernet cores in their FPGA products.

editor’s report

The next item in Table 2 is the requirement for low power operation and addressing security issues within embedded designs. Although not all applications are power-sensitive devices that operate from batteries or need to generate the minimal amount of heat, they do require the best performance possible at the lowest power consumption. The largest driver in power is the type of processor used in the integrated circuit. As embedded processor performance increases to the 1 GHz level. the power consumption usually exceeds the allowable power envelope. The current trend is to use a lower clock speed multicore architecture, which consumes less power. This is a good hardware solution but transfers the challenge to the software team to manage the software architecture on a multicore solution. A very good example of the use of multicore architectures is the ARM Cortex solution. ARM has introduced the big.LITTLE processing concept that pairs a Cortex A15 high-performance processor and a lower performance processor, the Cortex A7. on the same chip. The A7 processor can be used to handle lower level software tasks. but when more processing power is required, the A15 processor can be used. This architecture can extend battery life by up to 70%. Security issues can take many forms depending on the application. Basic security is the protection of the design of the IC itself. An ASIC is hard programmed during manufacturing, but an FPGA is generally loaded via a processor or a hardware solution such as an EEPROM. In the case of the FPGA there needs to be a method to protect the data loaded into the device from theft. Another form of security is to protect the data used in the application from tampering. As devices are used for more sensitive operations such as online payments, medical data or military communications, there needs to be a method to partition secure operations from the rest of the application. Several vendors have developed solutions to this problem. One solution is TrustZone, developed by ARM, which provides hardware partitioning of trusted applications and peripherals. preventing outside tampering.

Design process for developing a product with an FPGA and converting the FPGA to an ASIC for production.

Design FPGA

Build/Test Prototypes

Low Volume Production

ASIC Mask Fabrication

Assemble and Test Samples


Figure 1 Design process for developing a product with an FPGA and converting the FPGA to an ASIC for production.

As applications become more demanding there is a greater need for mixed signal solutions. Whether for a cell phone, industrial or medical device, there is a need for a communications solution or an analog I/O subsystem for making thermal and voltage measurements. In the past, FPGA solutions were entirely digital devices, but the latest devices provide hard IP cores for some analog functions. Xilinx series 7 FPGAs contain several hard IP cores—one of which is an analog subsystem providing dual 12-bit 1 Msample/s analog to digital converters. The last item in Table 2 is design starts for new SoCs. As the complexity of the designs has increased, the overall development costs and the risk have reduced the number of design starts. Also, the increased reuse of IP and the programmability of existing parts have reduced the need to do a complete new design. Modifying an existing design with a faster processor or adding a new IP core makes more sense than starting over. Another trend is for the vendors to provide application specific standard products (ASSP) that meet the customer requirements and also reduce the need for new design starts. LSI, for example, has been a provider of ASIC solutions for over thirty years, but their current product line is heavily focused on providing ASSP solutions based on their ASIC technology. LSI develops these products in order to meet the common needs of their customer base. How-

ever, they still do custom ASIC designs if required by their customers.

The All-Programmable Device

The all-programmable device is a SoC that has a processor system with a programmable logic section and a method of interconnecting the two subsystems to the outside world. These devices are completely programmable—software for the processor system, hardware design tools for the programmable logic section and an interconnect method for connecting the I/O to the package pins. A typical device will have a hard core processor system that includes the processor and an assortment of peripherals that are common to many applications. A processor system may have multiple communication buses such as Ethernet, CAN bus, I2C and SPI. In addition, there is usually a memory subsystem to support flash as well as static and SDRAM. By any definition the processor system is a complete embedded processor. Several vendors provide off-the-shelf all-programmable SoCs. Cypress has their PSoC line of products with three different devices—two with 8-bit processors and the third with an ARM 32-bit Cortex M3 processor. Microsemi has the SmartFusion products, which are based on the ARM Cortex M3 processor and Microsemi’s flash-based FPGA fabric. At the high end, both Xilinx and Altera are offering devices based on an ARM dual core CorRTC MAGAZINE FEBRUARY 2013


editor’s report

SoC Design Options Feature

Full Custom



Masks Customized


A Few



$1M and up



Development Time

2+ years

About 1 year

Few Months

Unit Cost (10M/yr)




Unit Cost (100K/yr)

N/A (volume too low)



Unit Cost (1k/yr)


Volume too low


TABLE 1 Soc Design Options.

ASIC/FPGA Design Factors • Programmability/Embedded Software • Intellectual Property Reuse • Low Power/Security • Increase in Mixed Signal Content • Decrease in Design Starts TABLE 2 ASIC/FPGA Design Factors.

tex A9 processor. Both the Altera and Xilinx parts provide programmable logic based on their own FPGA technologies. One clear advantage to all of these SoCs is that the software design team can start work on operating system and driver issues while the digital design engineers are implementing the programmable logic, reducing the development cost and project schedule.

Three Choices – ASIC, FPGA or All-Programmable SoCs

Now instead of two design choices, ASIC and FPGA, there is the off-the-shelf SoC. Table 1 shows the trade-offs between ASIC and FPGA development, but the SoC approach is a very good compromise between the two. In an embedded design it is a given that there will be a processor in the system for the software design and time-to-market requirements, and product life cycle will be a driver in the decision between an ASIC or FPGA design. In some products, volume and product cost can take a back seat to time-tomarket. An example is the latest crop of



Android tablets. Tablets are very high volume and would be good candidates for an ASIC or even a full custom solution, but the time-to-market and short product life cycle have driven the use of standard SoCs. Google sells two tablets—The Nexus 7, which uses an Nvidea Tegra 4 Quad processor SoC, and the Nexus 10, which uses a Samsung Exynos ARM Cortex A15 dual processor SoC. Despite the fact that the combined volume of these two Nexus products will be in excess of three million units, the competitive pressure made time-to-market the key driver instead of saving a few dollars on the product cost that could have been achieved by developing a custom solution. Another alternative that can be used is to combine the use of FPGAs with an ASIC solution. By using FPGAs to prototype the system and then converting the design to an ASIC solution for production, the time-to-market can be decreased and the production cost is lowered. Figure 1 shows the processes that can be used to prototype with FPGAs and then convert to an ASIC solution. The Altera HardCopy

process provides just such a solution—the flexibility of using FPGAs to implement the design and test prototypes as well as make low volume production runs using the FPGA solution. Once the design is verified and field tested following Altera’s design rules, the FPGA is converted into a pin-compatible ASIC by Altera and full production can be started. The conversion process requires 12 to 15 weeks to convert the FPGA into an ASIC. The major benefits of the HardCopy process are reduced development risk, less NRE required, shorter scheduleand reduced parts cost. In summary, the choice of deciding whether to do an FPGA or ASIC design is made much easier today with the broad number of products available from multiple vendors. The adoption of the use of SoCs in the consumer market has also driven the pricing for all programmable parts down to where it is feasible to consider an off-the-shelf SoC for a new design. By choosing a part such as the Xilinix Zynq 7000, the product design team has access to a dual core 1 GHz Cortex A9 ARM processor with a broad set of peripherals and also an FPGA with up to 5 million gates. The choice to use an ASIC solution is still feasible, but for a lot of embedded applications the overall risk and cost in NRE and development time may not be justified. Cypress Semiconductor San Jose, CA. (408) 943-2600. []. LSI Milpitas, CA. (800) 372-2447. [] Altera San Jose, CA. (408) 544-7000. [] Microsemi Aliso Viejo, CA. (949) 713-4113. []. Xilinx San Jose, CA. (408) 559-7778. [].

Technology in


System Security On-Chip

Adding Secure Boot Capability to Embedded Processors No single technique will prevent compromise of an embedded system. Layered security must be built upon a secure foundation or “root-of-trust” since without design/device security, it is virtually impossible to provide good data security. by G. Richard Newell, Microsemi and Robert K. Braden, Bradtec Security Consultants


Validate Validate Validate Validate ecurity threats to embedded systems Phase 1 Code Phase 2 Code Phase 3 Code Phase 4 Code have escalated to an unprecedented level with routine reports of serious intrusions or compromise. A recent prePhase 0 sentation by a Navy security expert sugPhase 1 Phase 2 Phase 3 Phase 4 Immutable BIOS OS Loader OS Application(s) gested that cyber crime has now equaled Boot Loader the dollar value of all illegal drug trafficking. He emphasized that targeted malware Initial root-of-trust Code for phases 1-n is stems from validated by already trusted and nation-sponsored attacks are clearly immutable trusted system before execution is on the rise (e.g. Stuxnet). Even industrial hardware transferred to it controllers and medical systems that previously seemed safe from intrusion due Figure 1 to their isolated functionality have been Typical multi-stage secure boot process. nies providing solutions targeted fornow “cyber blackmail,” data colion into products, technologies and companies. Whether your recregoal is to research the latest lection, potential terrorism and ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you ational hacking. These serious attacks on analysis (DPA). DPA is a powerful tech- larly for Department of Defense sysyou require for whatever type of technology, industrial, communications and nique, first published around 1998, in tems. User recognition of the need for and productsfinancial, you are searching for. military systems highlight the need for se- which the power consumption of a de- security provides an important product curity and anti-tamper safeguards within vice is monitored during the times it is discriminator for the embedded system performing multiple cryptographic op- developer. Customers now recognize electronic systems. The sophistication of attacks and the erations like decryption. Using statistical that security adds value and are willing availability of techniques and equipment methods, the noisy power consumption to pay for quality protections. Lack of for hacking processing systems are also measurements are correlated with data adequate security can result in loss of expanding rapidly. With several thousand calculated from known information, such money, reputation, intellectual property, dollars of equipment, a moderately skilled as the input ciphertext, with the resulting customers and even loss of life, notahacker can extract encryption keys from ability to learn the key the device was us- bly for defense, medical, industrial and many devices using differential power ing. Many reverse engineering tools and transportation systems. hacking techniques are readily available The severity of attacks must be on hacker websites. countered with improved security meaGet Connected In-depth security is now considered sures. Suppliers of embedded systems with companies mentioned in this article. mandatory by many customers, particu- need to understand and adopt measures

ploration your goal k directly age, the source. ology, d products

End of Article



Get Connected with companies mentioned in this article.

technology in context

Hardware Root-of-Trust e.g., SmartFusion2 Secure SoC FPGA

JTAG Configuration and Test

SPI Flash

Cortex - M3

SPI Slave

Target Processor Phase 0 Code Challenge(s) Response(s) Phase 1-4 Code



Main MPU NVM 1. BIOS 2. OS Loader 3. OS 4. Application Code





TRNG Slave

Main MPU Phase 0 Boot Code 0. Trusted Boot Code

Main MPU



Possible Low-Cost PCB Tamper Detection Mesh

Power Enables




POL Power to Board

Tight integration with other board functions such as power management make bypassing the HW root-oftrust more difficult.



Code loaded into on-chip SRAM is validated before branching to it.

JTAG or other interfaces may provide alternate paths to validate Phase 0 code wasn’t tampered with.

Figure 2 System Block Diagram – secure boot of a generic MPU w/o inherent secure boot capability.

to embed security into their offerings. These security measures must include support for information assurance, design integrity and anti-tamper. One of the most important tenets of embedded systems security is to ensure that only authorized code is loaded and executed. If a hacker can modify or substitute the software or firmware the system runs, the security battle is already lost. This begins with the boot code executed immediately after power-on. The process of guaranteeing that the initial boot code and all subsequent code are authentic is called “secure boot.” And secure boot must be built upon a secure foundation or root-of-trust.

Establishing a Root-of-Trust

A root-of-trust is essential to system security. It is an entity that can be trusted to always behave in the expected manner. As a system element, it supports verification of system, software

and data integrity and confidentiality, as well as the extension of trust to internal and external entities. The root-of-trust is the foundation upon which all further security layers are created, and it is essential that its keys remain secret and the process it follows is immutable. In embedded systems, the root-of-trust works in conjunction with other system elements to ensure the main processor boots securely using only authorized code, thus extending the trusted zone to the processor and its applications. The trusted platform module (TPM) is an example of an industry standard root-of-trust. TPM devices provide cryptographic services (hashing, encryption) with a static RSA key embedded in each device. Many of the security features of the TPM are now available in select SoC FPGAs with the recent addition of on-chip oscillators, cryptographic services, a true random number generator, and stronger design

security and anti-tamper measures. SoC FPGAs are vastly more computationally powerful than typical TPMs, and they have many more I/O pins and built-in interfaces. Some FPGAs permanently program keys within the device while others utilize battery-backed internal SRAM. A superior approach is hardware-based key generation, which creates a device-unique secret key upon power-up. This dynamic key can then be used to form the root-of-trust. Unlike other approaches, the secret key can be transient (ephemeral) and immediately cleared after use, enhancing security since the secret key is never present when the system is at rest. Variations of individual circuits induced during the manufacturing process can be used to create a physically unclonable function (PUF). Security experts generally agree that PUFs can provide an excellent root-of-trust. Technical chalRTC MAGAZINE FEBRUARY 2013


technology in context

lenges include stability (voltage/temperature) and aging of some types of PUFs. Fortunately, SRAM PUF technology from Intrinsic-ID has been extensively tested by Philips, Thales, Microsemi and a major U.S. defense contractor, among others, to verify the maturity of the SRAM PUF technique. The PUF creates a highly secure “digital fingerprint” of the device using a dedicated SRAM block and a controller. The controller collects underlying device characteristics resulting in the generation of a unique-per-device hardware-based cryptographic key. One example of an SoC FPGA useable as a hardware root-of-trust is SmartFusion2 from Microsemi. SmartFusion2 FPGAs employ the Intrinsic-ID SRAM PUF—either in soft or hard form—along with immutable on-chip embedded nonvolatile memory. This and other security features create a root-of-trust for configuration and secure boot of the SoC. The SoC can extend that trust to securely boot an external processor chip—even if the processor chip has limited or no intrinsic secure boot capability.

boot loader. The Phase-1 code is digitally signed by the developer using the RSA or ECC private key. During Phase 0 the root-of-trust subsystem validates the digital signature of the Phase-1 code before allowing execution. The boot process is aborted if invalid. It is critically important that the inherently trusted public key and the immutable root-oftrust signature-checking process cannot be modified by a would-be hacker. If a hacker could substitute another public key or subvert the process, they could spoof subsequently loaded digitally signed code. Preferably, continual feedback to each prior stage is used to confirm that no tampering has occurred during boot load. Each phase can continue to execute if all anti-tamper (AT) monitors confirm a safe environment. These monitors typically include voltage, temperature, clocks and any intrusion sensors. The AT monitoring must continue during operation and be capable of terminating operation. An SoC FPGA with cryptographic and antitamper features can be of great value for these functions.

Typical Multi-Stage Boot

Extending Secure Boot

Initializing embedded processing systems from rest requires a secure boot process (Figure 1) that executes trusted code free from malicious content or compromise. Validation of each stage must be performed by the prior successful phase to ensure a “chain-of-trust” all the way through to the top application layer. The initial boot loader (Phase 0) code is embedded within the SoC and is validated by the secure root-of-trust, which ensures the integrity and authenticity of the code. Each sequential phase of the secure boot is validated by the previously trusted system before code and execution is transferred to it. It is essential that the code be validated prior to delivery and execution to ensure that no compromise has occurred that could subvert or damage the boot of each phase. This can be done using either symmetric or asymmetric key cryptographic techniques. One approach is to build an inherently trusted RSA or ECC public key into the immutable Phase-0



Many of the security benefits of an SoC FPGA can be leveraged to provide a root-of-trust for external processors that inherently lack a secure Phase-0 boot capability. A target processor can be paired with the secure SoC FPGA (Figure 2), which would assist in securing the Phase-0 boot process. The FPGA can independently provide run-time monitoring and corrective action or a penalty, if called for. In this example, all loader code for phases 1 and higher would be in SPI Flash memory (all code could be encrypted). The SoC would perform authenticity checks on the code for each stage, decrypt the code (if required), and feed it to the main MPU when requested via the MPU-to-FPGA SPI interface. For added security, the Phase-0 code would be stored in the embedded non-volatile memory (eNVM) of the SoC FPGA, which has strong protections against overwriting, and could be encrypted.

After power-up, the FPGA would hold the main MPU in reset until it had completed its own integrity self-tests. When ready, it would release the reset. The MPU would be configured to boot from the interface to the FPGA (e.g., via its SPI interface). The FPGA, acting as an SPI slave, would deliver the requested Phase-0 boot code to the MPU as it comes out of reset. Assuming the MPU does not inherently support secure boot, the challenge is to load some code into the MPU, with a high assurance that it hasn’t been tampered with. One approach is to have the very first part of the boot code copy the boot code to the MPU’s on-chip SRAM (or cache). Then, the code can perform an integrity check by computing a cryptographic digest of the SRAM contents. This result can be made to vary each time the MPU boots up by including a different true random number, used as a nonce, or “number used only once,” in the uploaded data. The MPU returns the digest value to the FPGA for validation. If it does not respond with the correct value, the FPGA would assume that either the data or the process had been tampered with, and it would terminate the boot process. If everything checks, the boot process would continue by branching to the now-trusted code in the MPU’s SRAM. This would contain the code needed to initiate the next phase, and could include a now-trusted RSA or ECC public key. Another way to validate code in MPU SRAM would be to use another interface such as JTAG to independently verify the SRAM by reading it back to the FPGA. Once the code in the MPU SRAM is trusted, additional security measures can be employed. This could include establishing a shared key by using public key methods, and encrypting all the subsequent boot code transmitted between the FPGA and the MPU with that shared key. Additionally, it may be possible to bind all the hardware components of the system together cryptographically so none would work without all the exact components of the original system. The SoC can additionally provide real-time monitoring of module en-

technology in context

vironmental conditions, such as temperature, voltage, clock frequency and other factors. The FPGA fabric can be securely configured to provide I/O for external tamper sensors and intrusion detectors. These can be sensed by the SoC to prevent vulnerability to attack from known exploits that apply abnormal conditions to extract critical information. Physical anti-tamper monitoring can also be incorporated to sense intrusion or sniffing of the critical connections between the SoC and the Target Processor. If these conditions are detected, the SoC can immediately take action to terminate ongoing processes and perform zeroization (deletion) of any key material. Figure 2 suggests one type of tamper response that would institute a power shutdown of point-of-load (PoL) power regulators thereby disabling the module/system. Tight integration of the SoC FPGA with other board functions can make bypassing the hardware root-oftrust more difficult. Once the main MPU is running trusted code, much higher security levels can be achieved with proper design. For many commercial and industrial applications, secure boot with a few low-cost anti-tamper measures may be enough. For financial and defense applications, additional monitors and a tamper-sensing, tamper-evident enclosure may be required. Whether used as a self-contained processing element or in conjunction with adjunct processors, the SoC FPGA brings a new measure of security to embedded processing. While it is possible to construct an embedded processor module with specialty security devices that perform monitoring and static key storage, consolidation of security features within the SoC FPGA provides much greater security, flexibility and performance. PUFbased ephemeral key generation, cryptographic and anti-tamper protections centralized within the SoC FPGA make it extremely difficult for an attacker to acquire sufficient information to compromise the processing system. The advanced security capabilities of SoC FPGAs such as the Microsemi

SmartFusion2 can provide the essential root-of-trust and security tool set needed by embedded system developers to meet the challenge of todayâ&#x20AC;&#x2122;s security threats. Microsemi Aliso Viejo, CA. (800) 713-4113. [].

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Bradtec Security Consultants (610) 212-6447. []. Intrinsic-ID San Jose, CA. (408) 573-6186. [].


12/5/12 9:57 AM RTC MAGAZINE FEBRUARY 2013


connected BYOD: USB Screams into System Connect

USB 3.0 Brings New Connection Capabilities to System Design USB 3.0 SuperSpeed is now being designed into real systems. It has much to offer in terms of speed and elegance of design. To take advantage of the higher-speed, more versatile interface, it is important to be aware of the elements required for success. by Terrill Moore, MCCI


SB 3.0 has hit mass production. Not designers who want the flexibility to take only is it mainstream in PCs, with advantage of the rapid advances in storploration support from Microsoft, Apple and age, wireless LAN, display and LTE techyour goal Intel as a standard feature of mainstream nologies can use a single USB 3.0 port to k directly products, it’s quickly migrating to smart- address all external wired connectivity age, the source. phones, tablets and embedded systems. needs, from pointing device to display. ology, For example, Qualcomm’s recently an- This is especially attractive for applicad products nounced Snapdragon 800 processors in- tions that require a long design life beclude USB 3.0 as the standard wired con- cause the rapidly changing elements can nectivity technology. Qualcomm says that be modularized and attached via the stanin addition to smartphones and tablets, dard USB 3.0 interface. they expect the Snapdragon 800 processor to be used in other advanced consumer Why Choose USB 3.0 over USB electronics applications, such as Smart 2.0? nies providing now media systems. A new TVssolutions and digital USB 3.0 offers all the features of USB ion into products, technologies companies. goal is to research the latestadding the ability to improve enhancement and of USB 3.0 Whether will beyour released 2.0, while ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you this year, doubling the maximum through- throughput by a factor of ten. It starts with you require for whatever type of technology, 400 Mbyte/s to 800 Mbyte/s, and the USB 2.0 D+/D- signals, which are and productsput youfrom are searching for. making the bus more efficient in high- used just as before for 1.5 Mbit/s (“low throughput applications. Kingston has an- speed”), 12 Mbit/s (“full speed”) and 480 nounced a 1 Tbyte flash drive using USB Mbit/s (“hi-speed”) signaling. USB 3.0 3.0, and is shipping 512 Mbyte flash drives host controllers use these signals to contoday. TRENDnet is using USB 3.0 for its nect to legacy USB 2.0 devices, which AC1200 Wireless TEW-805UB network operate exactly as they did before. Vbus, adapter to get up to 867 Mbit/s throughput used for powering devices, is enhanced to to a Wi-Fi 802.11AC network. deliver up to 4.5W of power (compared to USB 3.0 delivers cost-effective high- 2.5W for USB 2.0), but is otherwise identhroughput expansion. Embedded system tical. The USB 3.0 standard then adds two differential pairs used exclusively for SuperSpeed signaling. In addition to operatGet Connected ing at 5 Gbit/s, compared to 480 Mbits/s with companies mentioned in this article. for USB 2.0, these differential pairs

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prove throughput by dedicating one pair for output from the host, and another pair for input. Each pair operates independently, so it’s possible to sustain close to 400 Mbyte/s concurrently in each direction. The standard USB 3.0 host controller interface model, xHCI, offers many advantages of the traditional enhanced host controller interface (EHCI) host controller used for USB 2.0 systems. The architecture is inherently much lower power— whereas EHCI polls system memory continually to operate the bus, xHCI accesses system memory only to move data. In USB lingo, EHCI host controllers operate on USB transactions, basically one packet at a time; whereas xHCI host controllers operate on transfers, potentially megabytes at a time. Unlike EHCI, the xHCI host design is PCIe friendly—the architecture allows system software to consume time-consuming register reads, and the xHCI only consumes PCIe bandwidth while it’s actually moving data. System power requirements for operating a USB 2.0 bus with an xHCI host controller are frequently much lower because of reduced SDRAM accesses. Thus, even for systems that only use USB 2.0 devices today, the USB 3.0 architecture offers substantial benefits.


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Lower edge of client file system

Client HID driver (for Keyboard)

Mgmt APIs



DataPump Stack Control (HW Independent)

Mass Storage Class Driver

HID Host Class Driver

Additional Class Drivers as needed: Generic, ICCD, EEM, ECM, NCM, UAS, etc. Drivers / Targeted Perpheral List


DataPump Stack Management

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Object API

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Client MSC interface for FAT file system

Abstract NIC API


NCM, ECM, EEM, RNDIS Class Protocols

Mass Storage Class Protocol

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Client OTG Policy and Annunciation Code

Host Controller Driver (HCD)

Additional Protocols as neededd: DFU, Audio, Video, HID, UAS, etc.

DataPump API MCCI USB DataPump Chapter 9 functionality

Descriptors (from USBRC)

DCD API Device Controller Driver (DCD)

Object Directory

DataPump USB Device Modules

DataPump OTG API Platform-specific Code MCCI Code (DataPump) MCCI Code (EH/OTG)

DataPump OTG Control

Hardware API points

DataPump Transceiver Layer DataPump USB Transceiver Control DataPump Platform API USB Platform API USB Host/Device Controller

Figure 1 MCCI’s TrueTask USB is a highly portable, fast, efficient platform that includes USB 3.0/USB 2.0 host and device support, designed to support a variety of hardware. A high-quality host stack such as this will determine whether your product behaves robustly and deterministically.

These technical features add concrete value in addition to the less tangible benefits that come from adopting current technology—systems designed today have the potential to stretch to support new technologies and new use cases as complementary technologies evolve.

What Is Involved in Designing for USB 3.0?

You’ll need several things to add USB 3.0 support to your system begin-



ning with a host controller. If you’re designing a custom ASIC, this will normally be outsourced IP, to save on the cost of test and verification. Synopsys is currently the most popular choice. Otherwise, you’ll either get USB 3.0 support as part of your SoC or you’ll add it with an external component. TI and ASMedia are leading suppliers of xHCI PCIe to USB 3.0 bridge components. Look for a host controller that has passed ISB Implementers Forum (USB-IF) logo testing.

Because USB 3.0 has extra differential pairs for SuperSpeed transmit and receive, the connectors have extra pins. Host systems use either Standard A receptacles or, for dual-role host/device ports, microAB receptacles. Standard A receptacles are the familiar oblong connectors found on PCs. USB 3.0 Standard A receptacles are the same size as older USB 2.0 receptacles. USB 3.0 Micro-AB receptacles are extensions of the low profile USB connectors commonly found on cell phones—ad-

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ditional pins are added in-line, making the connector wider (but no higher) than the USB 2.0 Micro-AB receptacle. No matter which style connector you choose, it’s important to get connectors that have passed the USB 3.0 logo tests. This not only assures quality, but it also keeps your options open in case you need to certify your product, either initially or for an unanticipated application in the future. You need to make sure there is suitable memory bandwidth. This may seem obvious, but it gets overlooked. USB 3.0 can demand substantial throughput to the memory system in order to deliver adequate performance. Your SDRAM system must be designed appropriately. Bear in mind as well that memory system power consumption is determined by duty cycle, so size power supplies and cooling mechanisms appropriately. MCCI has seen USB 3.0 flash drives that overheated when driven by very fast system software. The USB 3.0 host stack controls device discovery when a device is attached. Even if you only intend to support a few devices at first, the quality of the host stack will determine whether your product behaves robustly and deterministically if users attach unexpected devices to the system. Some embedded operating systems come with stacks that support USB 3.0, however these stacks have generally not been submitted to the same testing as the Windows host stacks that are required for USB-IF logo testing. MCCI’s TrueTask USB embedded host stack is the portable core of the Windows host stacks that were used by Synopsys, TI and ASMedia for certifying their host controllers, and may be suitable for applications that require a commercially supported host stack with extensive test and deployment heritage (Figure 1). The host stack is also typically the module that implements USB 3.0 hub support. Again, it’s important to be sure that your stack has been extensively tested. Hubs were the last USB 3.0 components to be certified (in 2012), and many “precertification” hubs were shipped. These hubs have quirks, and the only way to be sure that you have robust support is to have it tested against every variety of hub. There are a number of class drivers for devices that need to be supported. Mass

Figure 2 Tools such as MCCI’s USB 3.0 Connection Exerciser help automate testing. The tool is essential for finding and debugging connect or disconnect bugs in host drivers and devices, and is useful for regression tests.

storage was the first use case for USB 3.0, and it remains the highest volume application. Most devices comply with the USB-IF Mass Storage Class “Bulk Only Transport” (BOT) protocol, so you’ll want to support this class. For “walk up” use cases, where the user inserts a USB flash disk for data interchange, BOT will be sufficient. If your system is using mass storage for more critical requirements, you may also want to support the newer “USB Attached SCSI” (UAS) protocol, which offers overlapped read and write. MCCI’s testing has shown that UAS flash disks are up to twice as fast when used for booting Windows systems, as compared to BOT. In addition to mass storage, you may want to include support for keyboards, mice, displays and networking devices. The “Human Interface Device” (HID) class is the standard for keyboards and mice; it’s also used for game controllers and UPS monitoring. It’s often used for moderate-throughput connectivity to specialized test equipment as well, because

Windows and MacOS X provide frameworks that allow driverless control. For connecting to an LTE modem, there’s a very useful recent standard, the USB Mobile Broadband Interface Model (MBIM). This protocol standardizes the control plane for LTE modems, and provides IP-based connectivity. USB 3.0 is important for talking to next-generation LTE networks, because downlink speeds of up to 1 Gbit/s are on the horizon. In situations with bursty data transfer requirements, the higher speeds can reduce radio-on time, therefore reducing system power consumption, allowing use of more economical battery and heat management systems. Other convenient device classes are less standardized, and you may need to get class drivers that are targeted at a particular manufacturer’s device. Although standards-based solutions are available, USBto-serial adapters normally use proprietary protocols, as do many USB to Wi-Fi adapters, USB-to-Ethernet adapters and USB to HDMI adapters (such as the DisplayLink products). This may limit your ability to support a broad variety of products. For long-lived products, standards-based approaches are superior to proprietary approaches, because there’s less dependence on supply from a single vendor. When debugging a USB system, it’s very important to have suitable test equipment. USB low-level protocols perform many of the traditional link and presentation layer functions in hardware. Unlike TCP-IP, you often cannot get enough information to debug system problems based only on traces from the host stack. USB bus analyzers from companies like Teledyne LeCroy, Ellisys, or TotalPhase are generally mandatory during system integration and troubleshooting. An entrylevel analyzer from LeCroy or TotalPhase costs about $5,000. The author’s experience is that all three companies have excellent products, but the products appeal to different users. Engineers with a strong hardware background typically prefer the LeCroy display. Software developers tend to prefer Ellisys. TotalPhase products appeal to engineers with a foot in both camps, and at the time of writing, TotalPhase has an advantage for MacOS X and Linux support, as well as a small edge in terms of higher-level protocol decoding. RTC MAGAZINE FEBRUARY 2013


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1/31/13 11:57 AM

Testing and validation are needed for certification. USB-IF logo certification has two important roles. First, it helps you validate your USB implementation. Second, it can be used to help assure your customers that your USB implementation meets their requirements. Logo testing is available in two forms. USB-IF holds periodic Compatibility Workshops (“PlugFests”), which are free to USB-IF member companies (although test slots are limited). In addition, USB-IF has certified roughly ten independent test labs around the world to perform logo testing. If you’re using USB-IF logo testing as a validation tool, you may not need to actually pass the test. It may be enough to run the portions of the tests that are relevant to your use case. Some independent test labs offer “pre-certification” testing services, which allow you to do only those portions of the tests that are relevant to your situation. To use the USB-IF logo, however, you’ll need to run all the tests, as well as provide information related to host controller and connector certification from your host controller and connector vendors. When planning your system, it’s important to review the USB-IF OnTheGo and Embedded Host Test Procedures. These procedures require that your host implementation be able to respond to certain specific test device IDs and enter specific test modes for low-level electrical and protocol testing. Alternately, you must be able to give the test lab a procedure for enabling those test modes. If you’ve not planned for this, you may face surprising delays when trying to certify your product at the end of the development cycle. If you’re getting your host stack from an outside vendor, make sure that the host stack supports the embedded host test commands. After you’ve built your USB 3.0 system, you’ll want to make sure that it is still working when you make a new release. Regressions test tools like the MCCI USB Connection Exerciser can help you to automate testing, particularly for device insertion/removal problems (Figure 2).Make sure your host stack vendor provides suitable test tools to allow you to do a reasonable level of regression testing on your integrated system when you’re pre-

paring for a release. These tools should include testing of all transport speeds in your system, from low speed through SuperSpeed, and should provide automatic go/nogo reports. Careful planning for USB 3.0 can ensure embedded systems with more flexibility and longer product life. The experience vendors have gained in shipping for the PC market is directly transferable to embedded system applications, and the leading vendors such as Qualcomm, Synopsys, TI and ASMedia are shipping products that will enable immediate deployment. Open source software solutions are available, and vendors such as MCCI can provide commercially supported packages suitable for more demanding applications. MCCI Ithaca, NY. (607) 277-1029. []. Qualcomm San Diego, CA. (858) 587-11211. []. ASMedia Taipei City, Taiwan. +886-2-2219-6088. []. Synopsis Mountain View, CA. (650) 584-5000. []. Teledyne Technologies Thousand Oaks, CA. (805) 373-4545. []. Teledyne LeCroy Chestnut Ridge, NY. (845) 425-2769. []. Ellisys Geneva, Switzerland. +41 22 777 77 89. []. TotalPhase Sunnyvale, CA. (408) 850-6500. [].

ploration your goal k directly age, the source. ology, d products

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M2M: How Much Autonomy?

How Much Autonomy? Achieving Efficiency via M2M without Losing Control Machine-to-Machine systems can assume a great deal of automation and autonomy. However, many applications and circumstances determine which data and decisions regarding that data should be left to the automated system and which need to be considered by humans. by Christine Van De Graaf, Lilee Systems


2M can be machine-to-machine erate, we can look at how some modern or mobile-to-mobile or machine- day applications spanning the medical, to-mobile among other alterna- finance and energy markets have been tive definitions. However, all definitions implemented. Application-specific checks beg the question: Where does M2M au- and balances are being put into place to tonomy end and the human decision mak- ensure that M2M solutions have an approing process take priority? Hollywood has priate level of autonomy but that human given us at least two examples of how gray matter has the final say. If we say that the goal is to limit M2M M2M autonomy can go horribly wrong: autonomy, the problem becomes what sysiRobot and Eagle Eye. In both cases, the tems do we want connected to one another machines were initially programmed to nies providing solutions now and which do we keep separate? Developfollow a base set of decision rules and ion into products, technologies and companies. Whether your goal is to research the latest ers also have to determine how they want guidelines. However, the connected maation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you to separate types of information commuchines were given the authority to act you require for whatever type of technology, nicated as well as the degree of separaa level for. of human guidance and beand productswithout you are searching tion. Is software partitioning sufficient? gan to make decisions that took their level Does the separation require communicaof control far beyond what their creators had intended. And this doesnâ&#x20AC;&#x2122;t even touch tion over a unified network but via separate data transport means (wired connecon the intentions of hackers. Are we doomed and heading down a tivity versus multiple types of managed path of giving too much autonomy to the wireless and radio connectivity)?Or do M2M solutions being put into use today the networks have to be separated comand to those yet to come? To counter the pletely even though the user interface may fear, uncertainty and doubt (FUD) that be unified? Machines function in absolutes. Mathese â&#x20AC;&#x153;good idea gone badâ&#x20AC;? scenarios genchine language is ones and zeros. Some situations are that straightforward as, for Get Connected example, in industrial automation and with companies mentioned in this article. manufacturing where when one tool

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Get Connected with companies mentioned in this article.

pletes its given task the process moves on to the next step. If an error of stoppage is detected in the process, then the rest of M2M solutions in the environment react according to their absolute programming. Applications in medicine have gray areas and the same can be said of applications within energy and finance. In the arena of modern medicine, there are many tools that healthcare providers and treatment researchers utilize. Heart rate monitors, medical image scanning machines, blood chemistry analysis systems and more collect massive amounts of essential information about patients. That information gets transferred now through M2M communications to their records as well as to those monitoring their status and treating them. The data creates a picture at a moment in time. Is that information sufficient for another machine to act on solo? Though one tool may get either a positive or negative result to a given test, is that sufficient data for an autonomous M2M communication and decision with another connected tool? Through big data analysis, cross referencing up-to-the minute data with past patient data and other globally col-

tech in systems

lected references, recommendations can be made, but there is a chance that a non-M2M measurable factor—such as treatment preferences with respect to taking extreme measures or administering comfort-care alone—could be overlooked. As more connected technology is utilized in this market area, there remains a separation between monitoring systems and treatment systems such that a trained person still is the decision-maker. Figure 1 gives an example of a connected health environment. This is consistent with the research side of the medical house in that there remains a high degree of human gray matter involved in determining success that would take a treatment process from lab trials to clinical trials and on to approved usage worldwide (see sidebar “The Phases of Clinical Trials for Drug Treatments”). Though the endto-end M2M solutions involved serve as a thorough means of collecting data and communicating from the source to the applications that analyze it, teams of people remain involved ensuring that the medical mantra of doing what is best for the patient is kept in check even in light of what would maybe make sense for the business and legal sides of healthcare and treatment research. This separation of tools and data is achieved through a combination of methods. The primary method of separation is through tool programming at the application level, which tells the systems what to do with collected data. Though all data is collected and becomes part of a patient or clinical trial subject’s electronic medical record, a portion of the data may be made available for lab tools to use for analysis but not sent directly to an automated drug injection pump. In addition to the programmable separation of data communication between M2M tools, there are some tools that cannot communicate with one another because they use separate means of communication. Some sensors may use Z-wave whereas others are set to use a different Wi-Fi technology. In the case of the energy market, specifically Smart Grid communications, the means of establishing which M2M systems have autonomy and to what level takes another approach. The Smart Grid has been dubbed “electricity with a brain.”

The Phases of Clinical Trials for Drug Treatments Before a treatment can be approved for mass usage, it has to undergo extensive study and an intense independent review process that may take a number of years. All of these checks and balances are designed for the well-being of patients. Phase 0 – Pharmacodynamics and Pharmacokinetics: This is the first point at which a drug treatment is tested in a sub therapeutic dosage on a very small number of subjects (no more than 15). This gives the researchers preliminary data about what the drug does to the body as well as what the body does to the drug. Phase 1 – Screening for Safety: In this phase, researchers work with a larger subject group (2080). This is when researchers are trying to determine the safe dosage levels and identify side effects. Phase 2 – Establishing the Test Protocol: When the trial gets to this stage, researchers are continuing to evaluate the safety of the drug but with yet a larger subject set (up to 300). They also are evaluating the effectiveness of the drug treatment. Phase 3 – Final Testing: Up to 3000 subjects take part in this stage of testing, allowing researchers to gather data that confirms treatment effectiveness, monitors side effects, compares this treatment to other treatment alternatives, and collects further safety information. Phase 4 – Post Approval Studies: Even once approved, research does not cease. There is ongoing research to assess treatment risks, benefits and optimal use. There are serious adverse events that, if they happen during any one of the phases of clinical research, may result in the stoppage of the trial. These include death or life-threatening reactions, prolonged hospitalization, significant disability and congenital anomaly. Human research is highly regulated and further details are available in the Code of Federal Regulations (CFR) and the E6 Good Clinical Practice (GCP) Consolidated Guidelines. Regulatory Agencies

Medical Records

Insurance Doctors Clinical Researchers

Medical Companies (Drugs & Equipment) 2-way comm Patient Monitoring

Patient Treatment

Limited 2-way comm 1-way comm Limited 1-way comm

Figure 1 In connected health, there is a degree of autonomy for M2M communication. M2M autonomy here is limited by programming and connection such that the non-machine measurable factors are not overlooked and patient safety is ensured.

In Smart Grid technology, each device within the grid is associated with sensors that collect data—i.e., power meters, voltage sensors, fault detectors, etc. Accord-

ing to the National Institute of Standards and Technology (NIST), the smart grid is “a modernized grid that enables bidirectional flows of energy and uses two-way RTC MAGAZINE FEBRUARY 2013


Tech In Systems

Secure Communication Flows Electrical Flows Domain

Application Application Protocol Encoding | Session Control


Service Provider


Transport Transport Layer

Network Bulk Generation


Internet Protocol Transmission


Lower Network Layers Figure 2 Overview of the Smart Grid framework (January 2010).

communication and control capabilities that will lead to an array of new functionalities and applications.” The two way communication encompasses both energy and information as illustrated in the NIST Smart Grid Framework image (Figure 2). The Framework of the Smart Grid takes into consideration the need for secure communication flows as well as the energy flows. Each domain is interested in specific types of information, so the M2M communication and related adjustment capabilities are set up such that each gets the information it requires to make the adjustments that they have authority over. The standards are still developing for this newer submarket within the Energy space. According to NIST, these standards cover material, products, personnel qualifications, processes and services that are: • applicable to their purpose; • ensure compatibility and interoperability for subsystems that need to work together; • preserve public health and safety; • protect the environment; and • optimize cost. PAP01 is the standard that addresses the role of IP in the Smart Grid. This standard outlines the requirements of various applications of the Smart Grid and also identifies the core IP protocols (Figure 3).



Let’s take a specific example. Sensors at the Bulk generator domain (Figure 2) detect that there is shifting in the ground around the generator that could potentially impact the safe operation of the generator. This information is transmitted to the Operations and Transmissions domains. There, trained personnel can make appropriate decisions about whether or not to take the generator off line partially or completely or even at all. If the off-line decision is selected, then M2M comes into play again letting customers know how they will be affected before the off-line goes into effect. Alternatively, if there is a significant safety fault detected that could cause serious harm, then there is a parameter within the M2M communications of the overall Smart Grid system that does enable the M2M system to autonomously shut down the generator and trigger the next levels of action and information. Finance applications such as automatic teller machines (ATMs) take yet another approach to setting boundaries for M2M autonomy. Through the user interface, the ATM machine itself delivers both marketing and promotional information to a customer as well as handling fund transactions. These two types of uses differ in sensitivity and have to be handled through completely separate networks (Figure 4). Since the information that they

Media Layers Data Link Layer Physical Layer

Figure 3 Internet Protocols for the Smart Grid per PAP01 (June 2011).

are handling is very sensitive, the M2M autonomy in such use cases is minimized. Other mobile M2M devices play into finance as well. A user may choose to do much banking via their mobile smart device. That results in a significant amount of user data that could suggest a preference. However, it doesn’t absolutely mean that the user wants to go away from brick and mortar banking. Similarly, if a user makes repeated identical transactions, i.e., withdrawal of $20 every Friday, this too is data captured by M2M solutions. Neither means that the user wants to be switched to eBanking or to have an automatic withdrawal set up. The limitation to M2M autonomy in finance ensures that only the activities the user authorizes with respect to their accounts are enacted. Yes, the world is moving to increased connectivity and we appreciate that we

tech in systems

can automate some aspects of life. However, life is not black and white. Not all data leads to one specific action. We humans aren’t ready to hand over all the decision making to the M2M intelligent systems. The methods discussed here are the tip of the iceberg with respect to how the line is being drawn for M2M autonomy and ensuring that human gray matter has the final say in given situations. Lilee Systems Santa Clara, CA. (408) 988-8672. [].

Financial Institution ≠$ Network Controller

$$$ Network Controller


≠$ Notification (email/text/SMS/ paper letter/other)


Financial App for Smart Device


2-way comm Limited 2-way comm 1-way comm Limited 1-way comm

Figure 4 M2M financial transactions are fully managed over a separate network infrastructure than non-financial banking applications.

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M2M: How Much Autonomy?

Integrated Panel PC Technologies Make Industrial HMIs Intuitively Easier to Use and More CostEffective Advances in multi-touch screen technology and panel PCs are leading to human-machine interfaces that give a unified center of factory floor control along with full access to process data. by Max Scholz, Kontron


ndustrial automation has witnessed amazing advancements in the last decade due in large part to equipment integration that has brought new capabilities from computing performance, to sensor technology, to enhanced networking bandwidth. There is always room for improvement, and manufacturers are challenged by several key areas that are holding back factory floor processes from enabling even greater productivity. First is that the monitoring and control of the diverse list of equipment is in many cases performed manually, which makes doing tasks more difficult and time-consuming. Second, precise control of equipment speeds and settings with existing knobs and switches presents accuracy issues. Finally, many factory automation systems are in varying platforms that deliver fragmented information. Helpful resources to these issues that plague manufacturers are human-machine interface (HMI) technologies and systems that provide increased access to essential factory and operational data. However, the tasks confronting HMIs are becom-



Figure 1 New Panel PCS offer impressive capacitive multi-touch display panels in wide 16:9 formats and integrate a wide range of needed industrial interfaces.

ing increasingly more complex requiring large scale connectivity that connects every area of the organization to receive data

that can facilitate improved factory line monitoring and control, and ultimately productivity. The implementation of shop

Tech In Systems

Figure 2 The Kontron OmniClient series is engineered to be an optimal HMI tool that enables the supervision and management of the entire manufacturing facility. Kontronâ&#x20AC;&#x2122;s OmniClient products provide the interface support needed for the intelligent production environment with eight GPIOs and optionally two RS-232 interfaces, one RS-232/485/422, four USB 3.0, one CAN port, Wi-Fi, Bluetooth, audio, as well as digital I/Os.

floor analytics and smart manufacturing practices puts additional demands on HMIs to deliver greater transparency and enhanced efficiencies throughout the production process and into every part of the manufacturing operation. Furthermore, there is a true need for factory automation solutions to evolve from fragmented information in different platforms to ones that offer a single access point that performs complex, realtime calculations. Having a single access point solves multiple factory floor issues and serves up needed line-level benefits such as enhanced control of production and adequate computing performance for production data analysis. Single access point HMIs also give workers the ability to thoroughly evaluate the entire production line to make any needed adjustments or develop productivity reports. A key technology in converging factory automation systems from a diverse set of platforms with multiple knobs and switches to a single access point is the integration of digital touch screen technology into next-



generation Panel PCs with multi-touch digital screen technology.

Breakthrough Multi-Touch Digital Screen Technology

Multi-touch digital screen technology is a breakthrough advancement for HMI applications, which provides the precision and accuracy needed for increased production line setting control. It is seen as one of the needed evolutionary advancements that make a single HMI ecosystem a reality. HMIs that feature screens with graphical user interfaces (GUI) and SCADA terminals enable consumer smart-device-like user interaction such as advancing display content by swiping fingers across the screen, zooming into content by spreading fingers or scrolling by using a downward finger stroke. Many next-generation HMI systems are incorporating integrated Panel PCs that feature projected capacitive (PCAP) touch panel technology that is typically made of glass or film material. It is the responsiveness due to PCAPs sensitive touch-

point density that enables true multi-touch functionality. This provides accurate and reliable operation even with work gloves, which is a necessity in many factory settings. Because of their scratch resistance and high durability, glass PCAPs are particularly well-suited for industrial automation environments. The zero-bezel design of PCAPs also makes for a more modern design and contributes to an enhanced user experience. For more robust operational demands, these glass touch panels can be ruggedized for additional shock and vibration and comprehensive protection against dust, humidity and water. A good method to accomplish this is to embed the touch panel glass display into an aluminum casing. Mounting equipment can also be integrated into the casing so that the front of the Panel PC is fixed and can be appropriately sealed, resulting in a rugged industrial solution that offers a completely flat glass front surface (Figure 1). The projective-capacitive glass touch displays are designed with a network of xand y-electrodes, which run vertically and horizontally and project electrical fields over and beyond the glass surface, so that fingers can easily glide over the glass surface. Delivering an advanced level of ease-of-use, new projective-capacitive displays eliminate the need for active pressure compared to resistive displays. Selecting the optimum touch screen technology for an HMI to suit a particular factory setting often comes down to whether workers are required to wear gloves. If thick work gloves are not required, then a projective-capacitive glass touch screen is typically viewed as the most optimal for the operator. It is especially touch-sensitive, providing a high level of operation precision through just a gentle touch of the glass surface. Resistive touch displays, on the other hand, offer completely different operating characteristics. This type of display requires stronger touch pressure on the screen and delivers significant advantages for applications that require thick gloves. In addition, 5-wire resistive touch technology provides a greater degree of touch accuracy for workers who wear gloves, and it is typically offered at a lower price and boasts a longer lifecycle compared to 8-wire technology.

tech in systems

Figure 3 The Kontron Micro Client 3 family is completely fanless and is available with a 15.6-inch display with glass and projective-capacitive touch technology.

Enabling Enhanced Control, Ease of Use

The integration of touch-sensitive glass into Panel PC displays employed by HMI systems makes them naturally easy to use while offering impressive multi-touch functionality to improve factory floor control. It is the advancements in multi-touch technologies that give operators enhanced control via support for hand gestures that allow workers to rotate or expand complex display images with two fingers, or with a swipe of a finger, the ability to scroll through lists of data. Operations can use one hand to open a menu while the other controls equipment parameters, thus eliminating the need to jump back and forth between complex menu layers. It is even possible to implement two-hand operation in order to facilitate switching motors on or off, and even the mechanical “dead man’s switch” can be replaced with multi-touch displays. Almost universal in its appeal for intuitive and effective operation control, multi-touch displays

are giving workers greater ability to use their hands. Typing is also easier with multi-touch displays. For instance, the “shift” key can be operated with one finger. Plus, Panel PC displays that use an advanced widescreen format increase the size of the display by one-third, which gives operators a larger area to accommodate gesture control and visualization. Helping to save budget and valuable floor space, the widescreen format also permits display use in a portrait viewing angle so that the virtual keyboard can be displayed in the lower part of the screen, eliminating the need for a separate mechanical keyboard. To support the large range of interfaces found on the factory floor, Panel PCs must feature connectivity matched to industrial needs. Embedded computing integration provides diverse support for Gigabit Ethernet, USB 3.0/2.0 and RS232, RS-485 and RS-422 communication ports. Panel PCs can also provide essential wireless communications with CAN, Wi-Fi, Wi-Fi with Bluetooth and RFID.

Untitled-1 1



1/17/13 10:34 AM

Tech In Systems Multi-screen technology also demands graphical support for DVI and Display Port. For designs that require applicationspecific expansions, a single mini PCI Express socket is also available in certain new Panel PCs. And, the latest Panel PCs also offer broad operating system choice, performance options, memory and storage support (Figure 2). The latest Panel PC designs can be configured to meet the varying industrial application requirements in terms

of performance, the available display sizes and the range of interfaces. HMIs can also leverage the ability to scale Panel PC solutions to a variety of system needs such as those that require application-ready systems with full hardware and software compatibility. Rugged industrial requirements for extended shock, vibration and temperature resistance can also be met with todayâ&#x20AC;&#x2122;s Panel PCs. These options also give developers a range of solutions that meet various

budget parameters. Additional option choices allow more companies to adopt HMI applications that enable improved monitoring and control of factory floor data that helps achieve manufacturing productivity goals (Figure 3).

Evolving HMI Design

HMI solutions contribute to making the â&#x20AC;&#x153;factory of the futureâ&#x20AC;? possible. With all data included in a single ecosystem, HMIs can deliver on the promise of full factory control. The industrial automation market has realized milestone advancements due to the availability of highly integrated technologies for improved computing performance, graphics, interface support and communication bandwidth within HMI systems. HMI tools are seeing more widespread adoption as manufacturing organizations see the overall cost of ownership benefits from access to crucial data that allows them to efficiently run production lines while helping both equipment operators and management to make more informed decisions. Greater cost-effectiveness and continuous process improvements are also possible from access to data that contributes to informed analysis. The growing list of HMI requirements is well-served by the high level of integration found in the latest Panel PCs that ensures seamless and simplified interoperability with the other equipment on the factory floor and throughout the manufacturing organization. Panel PCs are key enablers in making new HMI applications into combined and connected solutions with industrial machinery for a diverse range of factory floor systems in the chemical, pharmaceutical, food and beverage, and energy and power industries. Single access points that feature multi-touch display technology in a modern ergonomic design further enhance usability and the user experience, making the latest Panel PCs destined to be used whenever machine and plant operators feel the need to have convenient HMI systems to improve monitoring and managing production processes. Kontron Poway, CA. (888) 294-4558. [].


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technology deployed Linux and Android: Sorting Out the Roles

Linux or Android: Which Is Right for Your Next Design? The little green robot or the pudgy penguin? How do we decide? Diverse use cases can call for different development approaches that favor one OS over the other, while some applications can leverage either or both. by Bill Weinberg, Olliance Consulting Division of Black Duck


f your next device application will deploy a 32- or 64-bit processor and TCP/IP networking, chances are good that you are already considering either Linux or Android as your embedded OS. Compared to legacy RTOSs and embedded kernels, both Android and Linux are full-blown enterprise/desktop-equivalent operating systems. Both are capable of running off-the-shelf middleware and shrink-wrap applications, even in specialized embedded and mobile contexts. However, the two open source OSs approach development, integration and hosting in different ways, from the bottom to the top of the software stack, impacting how and where they best find deployment. This article will sort out the decision factors for going the way of the little green robot or the pudgy penguin. In particular, the article looks at how diverse use cases call for different development approaches that favor one OS or the other, and how some applications can leverage either or both. What follows partially represents a classic “thought exercise,” but the discussion actually arises from a series of conversations and product design debates around projects targeting premises energy management, IVI, networking and smart display devices.



Open Box or Closed Box?

The vast majority of legacy embedded systems were very much closed box entities. Even if the chosen RTOS sported standard APIs (typically a subset of POSIX threading and/or BSDlite networking), applications crafted for and hosted on those embedded platforms were highly customized. They also remained the only software running on those systems over their entire lifetimes. By contrast, deploying software on smartphones, tablets and a growing cohort of modern intelligent devices more closely resembles provisioning desktop and server systems. With many modern devices, OEMs, operators and end users can install new application packages across the useful lifetime of the devices. Firmware and system software can also be upgraded without recourse to special bench tools

or factory RMA procedures. In creating a smartphone OS, Google shaped Android to fulfill the mission of an open box, field upgradeable application platform. Central to the mobile OS is the notion of ready-to-run application packages. Consequently, the ecosystem around the Android platform is optimized for creation, marketing and deployment of shrink-wrap apps, first and foremost through the Google Play app store. Embedded Linux shares the status of application platform with Android, but from a practical viewpoint it is better suited to deploy-once closed-box use cases. True, there are actually more sanctioned methods for programming on Linux, such as C, C++, Java, Ruby, Python, Lua, etc., but there is no single dominant model for building, distributing and installing apps, nor is there a hardware abstraction model to encourage (if not ensure) interoperability, as there is on Android. Instead there are multiple distribution-specific methods (e.g., package managers, apt-get, etc.) and common/ best practices for working in the various kernel architecture trees. For these pragmatic reasons, Linux is somewhat better suited for closed and semi-closed box embedded applications. Without the need for broad interoperability and concerns for breaking APIs and shrink-wrap apps, OEMs are freer from constraints; free to customize and adapt Linux to the particulars of device hardware and software requirements. If and when an ecosystem evolves around a single device (as is occurring with Raspberry Pi and Python), that instance of Linux can always break out of the closed box category, just as Android did with the Dalvik virtual machine and its flavor of Java. On a related note, don’t confuse the question of open vs. closed box with that of open vs. closed source. The Linux kernel and the GNU/Linux OS are far more open source than Android. The community that maintains and advances Linux is a true meritocracy, open to input from all competent sources. By contrast, Android is a private club in which Google and its top-tier OHA partners call the shots and steer the platform roadmap with minimal input from outside parties.

Technology deployed

LIBRARIES Surface Manager OpenGL|ES

Media Framework Audio Manager





Core Libraries




Da |vik Virtual Machine






Radio (RIL)



LINUX KERNEL Display Driver

Camera Driver

Bluetooth Driver

Shared Memory Driver

Binder (IPC) Driver

USB Driver

Keypad Driver

Wi-Fi Driver

Audio Drivers

Power Management

Figure 1 Android presents a Hardware Abstraction Layer (HAL) between the Linux kernel and application run-time code.

BoM Budget to Burn or Bare Bones?

Related to the open/closed box issue is the question of lean vs. rich provisioning. The extreme lean case would be a “lump on a line” device with only a network interface; an extremely rich design would entail a display, keyboard, pointing device or touchscreen, a healthy complement of memory and storage, etc. Most real-world designs fall somewhere in between. Given its smartphone heritage, Android is well suited to richly provisioned consumer electronics-type applications. Out of the box, the Android stack supports handset and tablet-type configurations, and is finding increasing deployment in DTVs, set-top boxes, IVI systems and other UI-intensive applications. As such, there are relatively few compelling reasons to use Android in a headless system. Conversely, while Linux can support a very broad and rich range of hardware configurations and peripherals, it can also be trimmed down to match extremely lean systems, with minimal memory, storage, etc. While it makes no sense to deploy Android without several hundred megabytes or even gigabytes of DRAM and even more flash (for both OS and apps), you can deploy a minimalist embedded Linux system in tens of megabytes. (Gosh, I never thought I’d



Kernel (Linux for Both)









C Library

Berkeley Software Distribution




Various OSS


Various Proprietary & OSS

Various Proprietary & OSS

TABLE 1 Licensing of various Android and Linux stack layers.

be arguing that Linux is small!) Android is also fairly CPU/GPU intensive—another vote for avoiding it for lean hardware configurations. So, if your design is looking to cut costs by deploying a lower-end CPU, eschewing a GPU, and minimizing memory and storage, Linux is a much better fit. If you have more bill of materials to burn— these days, a matter of a few dollars on silicon, but potentially tens of dollars on display and input hardware—then Android is for you.

Local Display or BYO?

In last month’s RTC, I contributed an article about recruiting available devices as display servers for headless systems. The article highlights how locally headless designs can leverage browser-based displays on nearby and remote devices,

including smartphones, DTVs, etc. In the context of choosing between Android and Linux, the need for a local vs. remote display is another determining factor. If your device absolutely requires a display in close physical proximity “bolted on,” then Android is a good choice, with its integrated UI. But if users are primarily going to interact with the device at a distance, using browsers or dedicated smartphone and tablet apps, then you can dispense with the overhead of Android in favor of embedded Linux hosting Apache or any of several small web servers and serverside programming paradigms (PHP, Python, C, etc.). You can, of course, configure both Android and Linux to support local displays, web interfaces and mobile apps, as needed. Both OSs support rich UIs and both easily field web servers. But off-theRTC MAGAZINE FEBRUARY 2013


technology deployed

Android Shrink-wrap Apps


Frequent Upgrades



Lean BoM


Highly Customizable


Local Display

× ×

Remote Display Java


Native C/C++, Lua, Python, etc.


LAMP Stack


Majority Apache 2.0 licensing (“OEM friendly”)


TABLE 2 Summarizing arguments for Android and Linux.

shelf Android apps will only easily run and display on an Android native display; Linux native apps built with GTK+ or Qt require either a local display or an available remote X server.

Java or C/C++ and LAMP?

A semi-technical argument in favor of Android or Linux is familiarity of programming language and framework. If your team is already building Java apps for Android in some other context, you will probably want to leverage this expertise in creating yet other devices (even headless ones). But if your developers are more comfortable with C/C++, Lua, UI frameworks like GTK+ and Qt and myriad other programming paradigms, then that’s a strong vote either for Linux and/or LAMP (Linux, Apache httpd, MySQL and PHP/Perl/Python). This argument is not clear cut and is intertwined with others presented here. You could also build your embedded application using Android/Linux native programming interfaces, but you would likely break interoperability with shrinkwrap Android apps and no longer have an open box. Also remember that the choice of language and framework is often tied to the choice of local vs. remote display. Another, perhaps more liberating thought is that today’s developers are polyglot, such that many would be equally confortable in Java, C++ or web programming languages on either Android or Linux.



Licensing Considerations

A non-technical yet complex set of selection criteria centers on the licensing regimes surrounding Linux, Android and the applications and extensions written for both. Many OEMs embrace Android because of the liberal licensing terms presented by that mobile OS: Apache 2.0 licensing of both Android middleware and application components places practically no disclosure requirement upon OEMs just for the underlying Linux-level general public license (Gnu GPL) parts. The top-level Apache licensing of Android is often termed “OEM friendly” because device manufacturers modifying most of the Android stack and adding peripheral interfaces using the hardware abstractions layer (HAL) need not disclose those modifications nor distribute their code under Apache or any other OSS license (Table 1). The actual situation is somewhat more complex as discussed in the paper “Android – Opportunity, Complexity and Abundance” from Black Duck. The converse is not a case against Linux—it is perfectly possible to segregate and protect proprietary code on a device running Linux. However, each type of modification and addition to the embedded Linux stack needs to be considered on its own merits (Table 1). In particular, some OEMs are uncomfortable with working directly with code licensed under any GNU license (GPLv2/v3, LGPL, etc.), leading

them to choose Android over Linux. They are, of course, still deploying the Linux kernel, but with Android libraries and middleware running over it as a “buffer.” Often it can come down to a level of comfort. Our purpose here has been to provide general guidelines for choosing Android or Linux for various types of intelligent devices. This typology does not sort itself out in terms of vertical applications (phones, medical devices, transportation, etc.), but rather the selection criteria hinge on development paradigms, paths to market and deployment lifecycles of the devices in question. Table 2 summarizes the arguments made throughout this article. The choices highlighted are not absolute: since Android contains an instance of the Linux kernel, Android systems can theoretically host and run the same software as Linux. And because Linux can equally host and run Java, as well as a range of UI frameworks, Linux can be deployed on devices with local displays, even on phones and tablets and other devices strongly associated with Android. So go ahead and use Android or Linux or both. But do consider the following questions: • How will system software and applications be deployed over the lifetime of your device? • Where do you want to spend the bulk of your BoM budget? • What are the primary user interaction modes for the device? • What are the programming predilections of your developers? • How does your choice of platform and license impact your company IP portfolio? The last question is by no means the least to consider. However, in depth discussion of IP and licensing falls outside the scope of this article. To learn more, explore the offerings of my company, Black Duck: the Android Fast Start package for Android compliance and governance, and the Black Duck Suite for the larger universe of Open Source Software. Black Duck Burlington, MA. (781) 891-510. [].

ploration your goal k directly age, the source. ology, d products

technology deployed Linux and Android: Sorting Out the Roles

Android and Linux – A Closer Look at the Family Tree The success of Android has driven it away from its Linux roots. At its core Android remains a Linux distribution, but the requirements of the smartphone market force Android to constantly evolve. With Android in such high demand, what does the future hold for Linux? Where does Android go from here? by Andrew Patterson, Mentor Graphics


he popularity of smartphones and Whatever the price, it looks to have been tablets has brought the word “An- a very good investment. In 2007, the Open droid” into the lexicon of every- Handset Alliance, an organization set up day life—the same is not true for Linux, by Google, together with phone makers or even the Apple iOS. Consumers are and semiconductor vendors, announced quick to associate Android with a smart- the release of the “Android Operating phone, and that opens the floodgates for System” specifically targeted at the moincreased pressure to develop more An- bile handset development community. droid apps. While these same consumers The initial Android release (v1.5) called may not have heard of Linux, they should “Cupcake”—started a theme of desserts realize that a modified Linux kernel sits as release names. With the Honeycomb nies providing solutions inside everynow Android smartphone. Linux (v3.1), Google made its first tablet-specific ion into products, technologies and companies. Whether your goalopis to research the latestsystem, and the Ice-Cream is a very important and fast-evolving operating ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you erating system in its own right, with a Sandwich (v4.0) combined phone and tabyou require for whatever type of technology, community of developers. So let operating systems into one platform. and productsdedicated you are searching for. how are Linux and Android alike? How The popularity of Android has become are they different? What does the future one of the biggest technical consumer hold for these two operating platforms? A influences of our time, almost by stealth. good starting point is to look at the origins For mobile consumer devices, tablets and and content of both operating systems. smartphones, Android is winning out as The U.S.-based company Android the dominant operating system. AccordInc. was founded in 2003, with a mission ing to Gartner, in the second quarter of to develop new software for smartphones. 2012 smartphones accounted for 37 perThis company was acquired by Google cent of all mobile sales, up 43 percent over Inc. in 2005 for an undisclosed sum. the same three-month period last year. At a recent Motorola press event, Google’s chairman, Eric Schmidt, reported that Get Connected nearly 1.3 million Android smartphones with companies mentioned in this article. and tablets are activated every day. On the

End of Article



Get Connected with companies mentioned in this article.

operating system front, Android extended its lead as the world’s single most popular mobile phone platform to 64 percent, while Apple’s iOS holds about a 19 percent share of the world market. The popularity of Android on smartphones has a lot to do with the different models available from a variety of manufacturers. It also has a lot to do with the vast array of third-party apps now available. According to AOL Tech, the download rate for Android apps in 2012 is 1.5 billion installs per month, with a total of nearly 20 billion installs to date.

Linux Inside

At its core, an Android device uses the Linux kernel, but it’s not the same kernel other Linux-based operating systems use. The architecture of Android consists of five main components: the Linux Kernel, Libraries, Android Runtime, Application Framework and Applications. When Android was first released it came with a complete software development environment, which helped kick-start the development community. Until Android appeared, mobile phone development organizations mostly relied on expensive commercial software development tools— these had the guarantee of professional support and long-term availability. The move to Android by many smartphone developers was understandably cautious at first—issues around licensing, ownership, control and defect remedy had historically made commercial organizations wary. With its strong suite of development tools, which included source code configuration management, integration with build and test process tools, and an Eclipse-based environment, Android allowed engineers to become extremely productive in a very short period of time. The Android development environment also came with a built-in graphics management environment, which meant developers could quickly and easily develop their required user interface from a predefined function library. This environment provided low-level graphics tools such as canvases, color filters, points and rectangles, which allowed a developer to

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No. of apps: iTunes App Store vs Google Play 800,000 600,000 400,000 200,000 0

Jul. 2008

Jan. 2009 iOS

Nov. 2009

May 2010

Oct. 2010

Feb. 2011

Jul. 2011

Jan. 2012

May 2012

Jul 2012


Figure 1 Rate of growth of Android apps compared to the Apple iOS. (

manage and draw images directly onto the UI screen. This is why Android apps all have a similar “look and feel.” Five years from the formation of the Open Handset Alliance, Android is everywhere, and the total number of apps available is about to exceed those available for iOS (Figure 1). Android apps are relatively easy to create and there are many engineers who are able to program in Java. Are these Android apps portable to other OS environments? In theory they should be with some rework on the graphical interface and operating system calls. Users of other operating systems have shown keen interest in running Android apps, and there are virtualization methods available to allow for some portability. In fact, OpenMobile World Wide Inc. has announced a product called Android Compatibility Layer (ACL), which offers the ability to run Android apps on Microsoft Windows-based operating systems such as on Nokia’s latest smartphone. A potential growth market for Android is domestic set-top boxes (STBs). Demand for digital set-top box products is rising globally, and the migration from standard-definition products to high-definition products in developed markets is fueling new growth after a dip in sales in 2011. The market for STBs faces significant challenges, as consumers are looking for combined cable, Internet and satellite



services in one unit. Linux and Android both make suitable operating systems for these more complex systems and have the necessary built-in services to support mixed peripherals and interfaces, as well as links out to cloud-based services. Several manufacturers, instead of waiting for standard open source STB solutions from Google, have started work on their own solutions, and semiconductor manufacturers are responding with dedicated SoC platforms. One such product coming in at just $64 is from Chinese manufacturer Xiaomi. The STB pictured in Figure 2 has an operating system based on the Android 4.0 Ice Cream Sandwich release.

Linux Continues to Serve Us Well

If Android is dominant on smartphones, Linux has established itself as the defacto OS on the back-end server market. Today, 90 percent of all financial transactions on Wall Street are carried out on Linux servers. Linux powers the servers of popular websites like Amazon, Facebook, Google and Twitter. Linux is the largest collaborative software development project of all time, with over 8,000 developers having participated since 2005—from 800 different companies. Because it is not owned by a single dominant company, the Linux name has not benefited from any marketing campaigns. But its popularity has grown steadily. The Facebook server

now has over 1 billion users per month, and it is built on an open source “LAMP” stack with a Linux operating system at its core. The Linux OS in use today has quickly evolved into over 100 variants aimed at commercial and private users and manufacturers. Some of the more popular variants include Mint, Debian, Ubuntu and Mageia. According to Hub Pages (June, 2012), the most popular commercial Linux variant is Ubuntu, which holds true to the principles of free and open source software. The development of Ubuntu is led by UK-based commercial distributor Canonical. The company claims that Ubuntu will ship in five percent of all PCs sold in 2013, a market currently dominated by Microsoft Windows. Progress on this front will help establish Linux as a mainstream business and consumer PC solution. A variety of industry alliances have been established to help bring specific Linux variants to market. For example in the Automotive world, the GENIVI Alliance, comprising over 170 automotive manufacturers and suppliers, has agreed to collaborate on devising a single base Linux operating system for in-vehicle infotainment (IVI) systems. GENIVI releases a new specification approximately every six months, and members such as Mentor Graphics provide specification-

Technology deployed

Common HMI

Graphics Layer Management

Android Market Apps

Networking Navigation

IVI Stack

Android OS

Entertainment Mobile Office

Figure 2 Handheld Android Set-Top-Box from Chinese manufacturer Xiaomi.

compliant Linux distributions targeted at IVI system designers. Several automotive OEMs have GENIVI Linux-based infotainment products in the design stages, and more are expected to move into production in the next two years. Android is also highly applicable in automotive IVI system design—many of the features available in an Android smartphone or tablet are exactly those sought by infotainment systems users: navigation, music player, Internet connectivity, voice activation and more. Increasingly, car makers are hearing, “Make the car’s infotainment system look and feel more like my smartphone.” In fact, new car buyers are using the IVI capabilities of a particular automobile as a determining factor on which vehicle to purchase. Using Android as an infotainment operating system means that users immediately have a familiar user interface. Some manufacturers have already gone to market with Android-based infotainment solutions, such as the new Renault R-Link product.

A Dual OS Existence?

Recent embedded architecture developments allow the Linux and Android operating systems to happily co-exist. For example, the Android operating system can be hosted on top of Linux in a Linux Container (Figure 3). The resources, access control and security of the Android client are managed by the host Linux operating system. For system designers concerned about the security of Android, this represents a good way to offer An-

Linux Container Mentor IVI Linux OS / LXC Resource Management Hardware Layer

Multi-Core CPU


Figure 3 Android OS in a Linux Container sitting on top of Mentor’s Linux IVI OS.

droid app access and keep other system functions on a standard Linux platform. Multicore system-on-chip (SoC) platforms make this architecture even more attractive, as there are sufficient resources for both Linux and Android domains to perform well simultaneously. The CPU resources can be shared, along with memory, graphics processing resources and other peripherals. The output of the two domains can be recombined into a common HMI (Human Machine Interface), allowing the user to select functions from both domains. Despite the strengths and subtle differences between these two very popular platforms, there are situations in which the two platforms play nice together in today’s marketplace. Android is already dominating the smartphone market and is now seen spreading to adjacent markets such as automotive infotainment, set-top boxes and possibly medical handheld devices and portable industrial controllers. Both Android and Linux have proven to be extremely versatile and powerful operating systems, sharing common roots deep at the kernel level. Both will continue to win market share at the expense of more expensive proprietary operating systems, as more and more target devices and applications are found. In some cases they are at their best when the two OSs

run together, so they should not necessarily be viewed as alternatives. Mentor Graphics Wilsonville, OR. (503) 685-7000. [].



products &

TECHNOLOGY Compact Chassis Mount AC-DC Power Supplies Ease Installation in Challenging Environments Five new series of encapsulated AC-DC power supplies range from 5W to 25W. The VSK-T family from CUI is housed in a potted and encapsulated chassis mount package, providing a convenient mounting solution when a dedicated circuit board for the power system is either not feasible or is cost-prohibitive. The units are compact, measuring as small as 76 x 31.5 x 24 mm (2.99 x 1.24 x 0.94 in) in the 5W series. The package design also protects against environmental factors such as dust, moisture, and shock and vibration, making these AC-DC modules ideally suited for use in a range of low-power ITE, industrial, security and transport applications. The VSK-T family provides a universal input of 85 to 264 VAC and fully regulated DC outputs of 3.3, 5, 9, 12, 15, 24 and 48 VDC depending on the series. The modules reach efficiencies of up to 87% and carry UL/cUL and CE 60950-1 certifications. Protections for over voltage, over current, over temperature and short circuit are included as well as isolation voltages of 4K VAC in the 5 and 10W versions, and 3 K VAC in the 15, 20, and 25W versions. The VSK-T family is available immediately with prices starting at $8.90 for quantity 1000. CUI, Tualatin, OR. (503) 612-2300. [].

Airflow Sensor Portfolio Features High Airflow Versions Honeywell has expanded its Zephyr airflow sensor HAF Series portfolio with new digital versions that provide airflow ranges of 0 to 20 Standard Liters per Minute (SLPM) and 0 to 200 SLPM. To accomplish this, it has leveraged its original Zephyr building block airflow sensor via a bypass to the main flow channel of the sensor, eliminating the need for a customer-designed bypass in equipment such as ventilators. Honeywell’s new Zephyr airflow sensors with the built-in bypass offer customers three important benefits. High performance includes a narrow total error band of ±4% reading and a high accuracy of ±3.5% reading, allowing for very precise airflow measurement—often ideal for demanding applications with high accuracy requirements. Ease of integration is provided thanks to simple electrical interfaces and multiple mechanical configurations— manifold mount, male and female fittings. And finally, custom calibration includes forward flow direction and optimized custom calibration for many gases (dry air, helium, argon, nitrogen, nitrous oxide, carbon dioxide), which eliminates the need to implement gas correction factors. These new sensors are designed to function in a wide range of applications. Potential medical applications include anesthesia delivery machines, laparoscopy, patient monitoring systems, spirometers, ventilators and ventricular assist devices (heart pumps). Potential industrial applications include air-to-fuel ratio, analytical instrumentation, fuel cells, fume hoods, gas leak detection and gas meters. Honeywell, Morristown, NJ. (877) 841-2840. [].



PXI Express Uncompressed HDMI Video and Audio Capture for Device Testing A new PXI Express HDMI video and audio capture card enables integration of full single-card analog/digital video and digital audio input. The PXIe-HDV62A from Adlink Technology delivers superior quality high-definition video data from DVI or HDMI sources, provides analog video decoding, and comprehensively supports RGB, NTSC/PAL, S-video and YPbPr formats, with an integrated audio decoder for HDMI and S/ PDIF capture. Adlink’s PXIe-HDV62A further supports uncompressed full HD up to 1080p at 60 fps, 10-bit high-resolution ADC, and HDCP. High integration allows the PXIeHDV62A to easily manage a multitude of video and audio inputs, reducing total cost of ownership and installation. “To ensure consistent quality in validation and manufacturing of multimedia devices such as set-top boxes, Blu-ray Disc players and gaming consoles, the market demand for automated test with PXI systems has increased,” said Neil Chen, Adlink’s product manager for Digital Imaging. “Adlink has utilized extensive field experience in the machine vision industry to meet the specific needs of automated measurement applications, such as multimedia device testing. Adlink offers both PXI Express and PCI Express form factors to fulfill all user requirements.” The PXIe-HDV62A supports LabView and Microsoft DirectShow, reducing engineering effort and accelerating time-to-market. The PXIe-HDV62A is also equipped with Adlink’s ViewCreatorPro utility, enabling system testing and debugging with no software programming required. Full driver support is provided for Windows 7/XP. A recommended PXI Express platform includes the PXES2590 all-hybrid 9-slot PXIe chassis and the PXIe-3975, a 3U PXIe controller with Intel Core i5-520E 2.4 GHz processor. ADLINK Technology, San Jose, CA. (408) 360-0200. [].


Mini-ITX Motherboard Carries Third Gen Core Processors A Mini-ITX motherboard is optimized for the latest Intel technologies using the third Generation Intel Core i7 Mobile ECC processor and Intel QM77 Express Chipset. The X9SPV-M series boards from Supermicro are vPro compliant with 25W CPU i7-3555LE for X9SPV-M4 and 17W i7-3517UE for X9SPV-M4-3UE model. The X9SPV M series offer high-speed I/O via PCI Express 3.0 and USB 3.0, three digital output with Display Port, HDMI and DVI-I. The mini-PCIe with mSATA support can be used for an even smaller footprint with removal of the HDD cage and cabling and using mSATA SSD drives. Quad LAN support provides more networking bandwidth for applications that utilize digital output and embedded graphics as a control device or a video streaming appliance. The ECC SODIMM support differentiates the X9SPV M series from other motherboards emphasizing reliability even for client type applications. Finance and health care segment customers desire any and all ways to ensure memory reliability. Kiosks can take advantage of vPro for remote management and software deployment, saving onsite maintenance or operating cost. With vPro, applications can allocate hardware resources dynamically and ensure secure access via TPM and AMT 8.0. Intel HD Graphics 4000 provides applications three independent displays with great HD to HD transcode performance. The new visual experience extends the embedded graphic market into health care monitor devices, DVR/NVR, POS, or high end terminals and interactive multimedia Kiosks. High end digital signage can utilize these new technologies to create better and more engaging user interfaces. Supermicro offers 7-year product life to protect X9SPV-M customer application development and investment. X9SPV M series delivers a robust, reliable platform to embedded application developers with the flexibility to customize functionality based on end device requirements. Supermicro, San Jose, CA. (408) 503-8000. [].

COM Express Module with High Graphics Performance Supports Up to Four Displays

Industrial Mobile Handheld Device Offers Flexibility, Benefits and Catchy Designs

A new family of COM Express Type 6 modules represents a compact form factor computer-on-module series characterized by very powerful graphics and high parallel computing performance with low power dissipation. The MSC C6C-A7 family from MSC Embedded is based on the AMD embedded R-Series processors also known as accelerated processing units (APUs). The family integrates AMD R-460L 2.0 GHz (2.8 GHz Turbo) or AMD R-452L 1.6 GHz (2.4 GHz Turbo) quad-core processors. The thermal design power (TDP) levels are 25W and 19W, respectively. The two dual-core versions are populated with the AMD R-260H 2.1 GHz (2.6 GHz Turbo) processor or the AMD R-252F 1.7 GHz (2.3 GHz Turbo) processor—each featuring 17W TDP. The processors support the AMD64 technology and the AMD-V virtualization technology. The AMD Fusion Controller Hub (FCH) A75 chipset was also selected. The main memory can be expanded to 16 Gbytes DDR3-1600 dual-channel SDRAM via two SO DIMM sockets. The Radeon HD7000G-Series graphics engine integrated into the AMD R-Series APU, with its high graphics capabilities, offers support for DirectX 11, OpenGL 4.2 and OpenCL 1.1. The modules support up to four independent displays via DisplayPort 1.2 or HDMI, MPEG-2 decoding, H.264 and VCE (video compression engine). Thanks to this module family’s high computing and graphics performance, the platform is especially suited for demanding applications with 3D graphics or high-definition videos and for the control of large displays such as in those found in medical technology as well as in the fields of infotainment, digital signage and gaming. The high-performance platform MSC C6C-A7 runs under the Microsoft Windows Embedded Standard 7 operating system, as well as Linux. The UEFI firmware from AMI is used as BIOS. In addition to the embedded modules, MSC offers a corresponding Starter Kit and carrier boards, as well as cooling solutions and memory modules. U.S. volume pricing is around $290.00.

A new industrial mobile handheld device utilizes the Android 2.3 operating system, combining high-performance RFID, barcode scanner and 3G/WLAN wireless transmission functions to satisfy diverse application requirements. The IMX-2000 from Adlink Technology can be applied in a wide range of industries and applications including fully supported logistics management, transportation and factory automation. With an 800 MHz processor speed, as well as superior resistance to impact, water and dust, the IMX-2000 has the capacity to enhance productivity and significantly reduce costs. The IMX-2000 adopts the Android 2.3 operating system to offer a qualified and userfriendly interface. In addition, all data can be conveniently entered directly by numeric keys into the Android system. To meet customer needs, an application programming interface (API) is provided for secondary development based on specific requirements. Designed with high-efficiency barcode scan processing capacity bundled with Reader Utility software, data saved under 1D or 2D barcode can be accessed easily. With integrated Wi-Fi, Bluetooth, GSM, GPS and AGPS, the IMX-2000 enhances the reliability of wireless communication. Along with the robust design, the IMX-0200 passes IP65 and 1.5m drop tests to ensure continuous operation after being inadvertently dropped, and provides highly efficient operation even in extreme environments. With a 3.5” resistor-type touch panel, the IMX-2000 is designed to be readable in sunlight for outdoor purposes. Equipped with a 5M pixel back camera, the IMX-2000 supports wireless broadband for real-time video communication and surveillance. Also, the memory is expandable via microSD supporting SDHC up to 32 Gbyte. Embedded with the rechargeable Lithium battery with 3900 mAh, the IMX-2000 can provide long-term operation. A charging cradle is also provided along with the IMX-2000 for added convenience.

MSC Embedded, San Bruno, CA. (650) 616-4068. [].

ADLINK Technology, San Jose, CA. (408) 360-0200. []




Extension Microcontroller Card with Zynq-7000 All Programmable SoC An evaluation platform is fitted with a Zynq-7000 All Programmable SoC that incorporates a range of peripheral functions and consists of an ARM Cortex-A9 MPcore with on-chip connection to an FPGA fabric. The TB-7Z-020-EMC from Tokyo Electron Device (TED) can be used to implement evaluation systems into various different development projects. Large logic development projects typically require hardware and software engineers to share the limited number of evaluation systems. In particular, development inefficiencies arise such as the long time simulation and lack of seamless emulation, if software engineers are unable to use their evaluation system frequently. When used in conjunction with TED’s TB-7V-2000T-LSI ASIC development test platform or FPGA evaluation platforms fitted with an FMC connector, the TB-7Z-020-EMC facilitates task separation between hardware and software engineers, helps cut budget and reduce the development time significantly. The new TB-7Z-020-EMC features ease of connection to the main FPGA evaluation platform, and software engineers can use it to test the performance repeatedly on the real hardware during the development process. This provides a system-level evaluation environment that can be used with greater efficiency than was possible in the past. By featuring small size and a wide range of interfaces, TB-7Z-020-EMC goes far beyond just connection ability with an FPGA evaluation platform. The card can also demonstrate its high level performance and design productivity not only as the development environment, but also for the development of the application, which requires powerful ARM processor such as the Zynq-7000 All Programmable SoC. With supporting FMC connector, additional interfaces can be added easily to support the targeted application. This means that the TB-7Z-020-EMC can facilitate innovative product developments, and also can satisfy the diverse needs of developments to differentiate their products from competitors. Software reference designs are also available, including design for connection to various types of FPGA evaluation boards, for DVI interface and for Linux-based embedded systems. Tokyo Electron Device, Yokahama City, Japan. +81-45-443-4000. [].

Wafer-Level 720p HD Camera Module Shows off Large Suite of Features A wafer-level high-definition camera module features an ultra-compact form factor with 720p performance. The Exiguus A15-B1 from Nemotek Technologie incorporates 2-element HD and reflowable wafer-level lenses and provides lower distortion, better resolution and higher image quality while utilizing replicated lenses on glass wafers instead of traditional plastic. This makes the Exiguus A15-B1 suitable for front-facing camera applications in smartphones, tablets, notebooks, gaming systems and other portable devices. According to recent reports, the percentage of all digital camera owners reporting the importance of HD capabilities almost doubled, from 7.9% in 2009 to 15.1% in 2011. The Exiguus A15-B1 responds to this trend and offers a 1/6-inch 1.26 megapixel, reflowable wafer-level camera solution with an active-pixel array of 1296H x 976V. It incorporates a CMOS image sensor and embedded image processor as well as sophisticated functions such as auto exposure control, auto white balance, flicker avoidance and defect correction. The Exiguus A15-B1 also features 720p HD video capture at 30 frames per second and offers low light sensitivity in video mode. Additional features of the Exiguus A15-B1 include integrated image processing, automatic image enhancement, Parallel and MIPI data outputs and multi-camera synchronization. The Exiguus A15-B1 can also be directly reflowed onto the printed circuit board (PCB), making system design and manufacturing easier and cost-effective. By leveraging the benefits of wafer-level technology, the Exiguus A15-B1 can withstand very harsh environmental conditions, making it an attractive solution for existing and new applications requiring cutting-edge camera technology. Nemotek Technologie, Rabat, Morocco, +212 530 200 540. [].



Stylish and Interactive Panel PC with Intel Atom and NM10 Chipset A new Panel PC is based on the Intel Atom dual-core processor D2550 1.86 GHz and the Intel NM10 chipset. The EUDA2 from American Portwell comes standard with a true flat projected capacitive multi-touch display. With its ultra-slim and lightweight aluminum tooling, it is rugged yet stylish. Its cable-less design, HDD tray and wide DC input range add to its flexibility and durability. The COM port and I/O board docking are selectable via BIOS. Furthermore, it is compliant with VESA mounting standards, which further testify to the universality of the EUDA2. While it also comes equipped with application programming interfaces (APIs) and EtherCAT support, many of the attributes and versatility of the EUDA2 make it an attractive solution for Industrial Automation, Kiosk and Human Machine Interface (HMI) applications.

The EUDA2 is compact, 50 mm thick and has a 12.1” or 15” display. With its multitouch and stylish industrial design combined with a painted and seamless assembly, the EUDA2 is capable of operating in a 0° to 50°C temperature range. Additionally, it is resistant to vibrations up to 1G and shock up to 15G. Less is more. At a weight of less than 4kg, the EUDA2 is ready for VESA mounting. Its true flat touch screen and IP54 protection make cleaning easy. Moreover, it has an easily removable back cover, HDD tray and CF cover. In addition, EUDA2 comes equipped with I/O board docking, a Golden Finger connector and a RS-232/433/485 port selectable via BIOS for the use of peripheral legacy devices. EUDA2 offers a full HD video decoder to deliver greater graphics performance. Additionally, APIs and EtherCAT efficiently support system integration of HMIs and Cloud Computing, which enable quick and efficient changes or updates by way of Internet when necessary. American Portwell, Fremont, CA. (510) 403-3399. [].


Firewall Secures New Microcontroller with Embedded Security Icon Labs has announced that its Floodgate Embedded Firewall provides network security for Zilog Corporation’s newly announced Zgate family of protected microcontrollers. Zilog, a pioneer supplier of application-specific, embedded microcontroller (MCU) system-on-chip (SoC) solutions, is using Floodgate to add a critical layer of security for network devices built with their new Zgate architecture. Floodgate provides security to Zilog’s eZ80Acclaim-based products used in today’s wired and wireless Internet connected devices and adds deeper protection from dangerous network attacks. As more embedded applications, devices and products connect to the Internet, there is an increased demand for the security that Zilog’s eZ80Acclaim, embedded with Icon Labs’ Floodgate technology, addresses. Their joint solution reduces the incidence of security breaches in devices used in defense, energy, medical, transportation and manufacturing. “Icon Lab’s Floodgate provides the necessary protection to the growing number of devices connecting to the Internet,” said Alan Grau, president of Icon Labs. “We are excited about the availability of Zilog’s Zgate with Floodgate blocking denial of service attacks, packet floods, port scans, and other Internet-based threats from accessing connected devices.” Icon Laboratories, West Des Moines, IA. (515) 226-3443. []. Zilog, Milpitas, CA. (408) 457-9000. [].

PLX and Kontron Announce PCI Express Fabric Advance PLX and Kontron have announced an advanced deployment of PCI Express (PCIe) technology as a backplane interconnect. Built around PLX ExpressLane PCIe 3.0 (Gen3) switches, Kontron’s VX3042 and VX3044 Intel Core i7-based single-board computers (SBCs) routinely achieve 5.6 Gbytes/s in data throughput between any boards in a VPX rack. The Kontron VX3042 and VX3044 Intel Core i7-based SBCs leverage PLX’s PCIe Gen3 switching technology along with Kontron’s exclusive VXFabric software. In addition to having two 10 Gigabit Ethernet channels already featured on the boards, VXFabric implements TCP/IP over PCI Express as a second data plane for higher-performance embedded computing. This combination of features enables efficient system convergence, as all devices and subsystems offer native PCIe, which permits immediate use of an existing infrastructure, thereby lowering latency, cost and power. Kontron VXFabric provides the software between the PLX ExpressLane switch and the bottom of a standard TCP/IP stack, which allows the boards to use their existing TCP/IP-based application without having to be modified. PLX switches offer the ability to combine different data types in a single converged pathway. Data (compute, communication or storage) are created and consumed as PCIe on each of the slots in the rack, delivering efficiency both in hardware architectural and software usage. Kontron VXFabric software simplifies and accelerates application development and helps to extend application lifecycles as it enables migration to emerging hardware communication standards, such as 10G and 40G Ethernet. The software streamlines the task of inter-CPU communication in VPX system architectures. The VX3042 and VX3044 represent Kontron’s third generation of 3U OpenVPX SBCs, both using Intel Core i7 processors and featuring native support for 10GB Ethernet and PCIe Gen3. The boards are specifically designed to provide the proper combination of leading-edge performance in CPU computing power and I/O bandwidth. Kontron, Poway, CA. (888) 294-4558. []. PLX Technology, Sunnyvale, CA. (408) 774-9060. [].

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GreenPeak Technologies, San Ramon, CA. (925) 230-6844. [].

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PCI/104 Communications Controller with Integrated Encryption Accelerator A communications controller is configured to deliver high performance in communication systems. The Tiny-PPC837 from Advanced Micro Peripherals is an industry standard PCI/104 Express form factor card offering both PCI Express and traditional 32-bit PCI interfaces. The Tiny-PPC837 has been expressly designed for demanding digital video storage and video streaming applications. Advanced features include a fanless conduction-cooled operation, 2 Gbyte high-speed 400 MHz DDR memory, an integrated security encryption accelerator and dual integrated Gigabit Ethernet ports. The Tiny-PPC 387 is suitable for use in a host of extreme situations where robust communications can mean the difference between success and failure including: portable test equipment, industrial automation controllers, AUV and robotic applications among many others. The Tiny-PPC837 is backed by comprehensive and easy to use software tools and has full technical back-up from AMPs video experts. Advanced Micro Peripherals, New York, NY. (212) 951-7205. [].

Rugged Portable RF/IF High-Bandwidth Signal Recorder A new RF/IF signal recording and playback system features recording and playback of IF signals up to 700 MHz with signal bandwidths to 200 MHz. The Model RTR 2727 rugged portable recorder from Pentek can be configured with 500 MHz 12-bit A/Ds or 400 MHz 14-bit A/ Ds and an 800 MHz 16-bit D/A. Pentekâ&#x20AC;&#x2122;s SystemFlow software allows turnkey operation through a graphical user interface (GUI), while the SystemFlow application programming interface (API) allows easy integration of the recording software into custom applications. At the heart of the recorder are the Pentek Cobalt Series Virtex-6 software radio boards featuring A/D and D/A converters, DDCs (digital downconverters), DUCs (digital upconverters) and FPGA IP. This architecture allows the system engineer to take full advantage of the latest technology in a turnkey solution. Optional GPS time and position stamping captures this critical signal information within the recording. The RTR 2727 has a portable, lightweight chassis with up to eight hot-swap solid state drives (SSDs), front panel USB ports and I/O connections on the side panel. Its extremely rugged, 100% aluminum alloy case is reinforced with shock absorbing rubber corners and an impact-resistant protective screen. Shock- and vibration-resistant solid-state drives (SSD) with combined capacity to 3.8 TB make the RTR 2727 a reliable, portable field instrument. Available I/O includes audio and VGA video, RS-232/422/485 serial, multiple USB 2.0 and USB 3.0, eSATA and dual GbE connections. The built-in Windows 7 Professional workstation with an Intel Core i7 processor gives the user total flexibility in routing data to various drives, networks and I/O channels. Also, the user can install post-processing and analysis tools on the system itself to operate on the recorded data. The RTR 2727 is fully supported with Pentekâ&#x20AC;&#x2122;s SystemFlow software for system control and turnkey operation. The software provides a GUI with point-and-click configuration management and can store custom configurations for single-click setup. The software also includes a virtual oscilloscope and spectrum analyzer to monitor signals before, during and after data collection. The RTS 2727 starts at $39,995. Delivery is 10-12 weeks ARO. Pentek, Upper Saddle River, NJ. (201) 818-5900. [].



New Qseven Module with QuadCore ARM Cortex-A9 A low-power, high-performance embedded Qseven module with strong graphics capabilities is offered with three different processor versions and may be used for singlecore, dual-core or even quad-core computing. The new Qseven module MSC Q7-IMX6 from MSC Embedded uses the Freescale i.MX6 processor, which contains an ARM Cortex-A9 RISC CPU with one, two or even four cores. These processors are fully compatible with each other, so they can be alternatively soldered on the same boards. Even though the processor consumes very little power, it provides high computing performance at up to 1.2 GHz clock rates, accompanied by powerful graphics capabilities. All models except the single-core version provide the Freescale Triple Play graphics architecture, which consists of decoder hardware for (dual-stream) 3D videos up to Full-HD resolution (1080p). Up to four shaders with a combined power of up to 200 MT/s achieve excellent 3D graphics results, a separate 2D BLT engine accelerates user interface speeds, and an additional 2D OpenVG engine drives vector-based graphics. The module provides two banks of DDR3 DRAMs supporting between 512 Mbytes and 4 Gbytes of memory. Additionally, a 128 Mbyte NOR Flash device stores the boot loader while an optional NAND Flash memory (up to 8 Gbyte) can be used as a Flash Disk. On top of this, a SATA-II interface up to 3 Gbits/s is available to support external data and program storage. MSC has provided a feature connector for interfaces not contained in the signal scheme of the Qseven connector. It can be accessed on the module and provides an additional UART next to SPI, MIPI-CSI and a BT.656 Camera interface. The MSC Q7-IMX6 will be accompanied by driver and BSP support for Linux and Windows Embedded Compact 7 with further operating systems to follow. The quad-core version will be priced around $180 in medium volumes. MSC Embedded, San Bruno, CA. (650) 616-4068. [].


Multicore Microcontroller Family Doubles RealTime Performance of USB-Equipped Variants

Programmable SoC Family Powers Precision Analog with a Single-Cell Battery

Three new USB-equipped multicore microcontroller products address the processing and interfacing needs of a broad range of embedded applications. The new products from Xmos are the U10-128, U12-128 and the U16-128, which provide 10, 12 and 16 logical cores respectively and deliver up to 1000 MIPS of deterministic parallel computing, along with 128 Kbytes of on-chip RAM. The family takes advantage of the recently announced xSOFTip range of software-based peripherals and processing blocks, which include I2S, TDM, SPDIF and AES/EBU processing. A wide range of audio DSP blocks are also available including filters, equalizers, stereo spatialization and mixers. The devices incorporate a high-speed USB 2.0 PHY and can support 480 Mbit/s data rates and USB Audio Class 2. This allows the xCOREUSB device family to address a range of demanding applications including highperformance peripherals, audiophile consumer audio, sound-bars, multichannel USB audio interfaces, DJ products, USB speakers and protocol conversion plus bridging. Other features include a multichannel 12-bit 1 MSPS analog to digital converter, standby and deep sleep modes for energy-sensitive applications, power on reset, watchdog timer, brownout detection and integrated oscillator circuits. The xCORE architecture uses a 32-bit multicore technology with hardware response to deliver deterministic performance and complete I/O flexibility with a simple high-level C programming environment. xCORE devices are supported by the xTIMEcomposer Studio development tools, which give the designer access to the power of multicore processing in a familiar C/C++ environment. xTIMEcomposer Studio includes static timing analysis and cycle-accurate simulation tools, making it easy for designers to meet precise real-time requirements. The XS1-U8-64 is available now, priced from $6.00 in volume.

New applications needing single-cell battery performance and high-precision analog can take advantage of a new family of programmable SoCs that incorporated precision programmable analog on an ARM Cortex M-3 device that also incorporates over 80 components that can be configured with the device’s development kit. The PSoC 5LP devices from Cypress Semiconductor offer programmable analog precision with differential 12-bit SARs and a 20-bit DelSig ADC supported by a 1.024V±0.1% accurate internal voltage reference. The ADCs include 62 channels, fully functional analog from 1.71 - 5.5V and the widest input signal range from 0 - 5.5V of any ARM Cortex-M device. The wide variety of the PSoC Creator kit’s programmable analog components include opamps, Get Connected with technology and comparators, trans companies providing solutions now impedance ampliGet Connected is a new resource for further exploration fiers (TIAs), programinto products, technologies and companies. Whether your goal mable gain amplifiers is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the (PGAs), mixers, segment of Getsensing, Connected is to put you in touch with the right resource. LCDs, CapSense goal touch levelAll of service you require for whatever type of technology, DACs, analog muxesWhichever and more. of Get Connected will help you connect with the companies and products the components are configurable to meet you are searching for. individual application requirements to deliver a single chip solution. Consuming only 300 nA in Hibernate mode, the new devices can wake-up on I/Os and retain the state of the CPU core, SRAM and device configuration. Suitable for single cell battery operation, Cypress’s boost technology allows designers to power up and regulate on as little as 0.5V. Unlike fixed-function MCUs, PSoC allows designers to further reduce power consumptionGet by customizing each Connected withperipheral technologycomponent and companies prov so unnecessary functions do not consume any power. Get Connected is a new resource for further exploration into pro PSoC 5LP offers programmable and digital with datasheet from aanalog company, speak directly withflexible an Application Engine routing and interconnect inintouch easy-to-use Components within level PSoC Cre- you requir with the right resource. Whichever of service Get Connected you connect with the controlcompanies and produc ator. Designers can easily build their will ownhelp custom embedded ler, standard and proprietary protocols with immunity to specification changes. With the ability to customize logic functions, peripherals, the analog front end and analog subsystems, designers can achieve greater system integration and a reduced system bill of materials. PSoC enables designers to solve complex problems easily with more than 80 pre-verified, production-ready Components. It also empowers companies to create and replicate custom Components across the organization. PSoC Creator allows users to configure PSoC programmable hardware into a personalized, one-chip solution. The free IDE comes with production ready Components and APIs for easy and fast configuration of the device. Get Connected with CA. companies Cypress Semiconductor, San Jose, (408) and 943-2600.

XMOS, Bristol, UK. +44 117 927 6004. [].

Fanless Intel Atom D525 Embedded Controller with 4 GbE LANs, Isolated GPIO and 8 USBs An Intel Atom-powered fanless cost-efficient vision controller is equipped with an Intel Atom D525 1M cache, 1.8 GHz processor, 4 Gigabit Ethernet ports, 3 RS-232 and 1 RS-232/422/485 and external accessible CFast; it has 8 USB ports, Isolated DIO, a PCI-104 and Mini PCIe socket. Supporting EtherCAT for better communication between devices, the ARS-1800 from Vecow also enables GigE Vision cameras to extend performance and application ranges. Engineering design has fanless thermal within operating temperatures from -20° to 70°C (4° 157°F), ARS-1800 is an ideal solution for industrial control, intelligent factory automation, machinery computing, automated optical inspection, solar panel inspection and oil drilling platforms. ARS-1800 is equipped with a programmable GPIO 16-step rotary switch and 4 mode/status LED display, which provide outstanding adaptability for various environment requests. To be seamlessly integrated and built into machines, ARS-1800 is shipped with DIN-rail and two types of wall-mount kits to fit in different environments. Vecow, New Taipei City, Taiwan. 886 2 2268 5658 Ext. 116. [].

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Digital Down Converter Targets Wideband Radar and SDR Applications A very high-speed data acquisition XMC is capable of digitizing one 12-bit channel at 3.6 GHz, or two channels at 1.8 GHz and comes preconfigured with a programmable one- or two-channel digital down converter (DDC) loaded into the onboard Xilinx Virtex-6 FPGA. The new Model 71641 member of the Cobalt family from Pentek is suitable for wideband radar and software defined radio (SDR) applications. Within the Virtex-6 FPGA is a powerful Pentek-designed DDC IP core. The core supports single and dual channel modes, accepting data samples from the analog to digital (A/D) converter at the full 3.6 GHz rate in single-channel mode or 1.8 GHz in two-channel operation. Each DDC has an independent 32-bit tuning frequency programmable from DC to ƒs, where ƒs is the A/D sampling frequency. In single-channel mode, DDC decimation can be programmed to 8x, 16x or 32x. In dual-channel mode, both channels share the same decimation rate, programmable to 4x, 8x or 16x. The decimating filter for each DDC accepts a unique set of user-supplied 16-bit coefficients. The 80% default filters deliver an output bandwidth of 0.8*ƒs/N, where N is the decimation setting. In single-channel mode the maximum output bandwidth is 360 MHz. Rejection of adjacent-band components within the 80% output bandwidth is better than 100 dB. Each DDC delivers a complex output stream consisting of 24-bit I + 24-bit Q or 16-bit I + 16-bit Q samples at a rate of ƒs/N Pentek’s ReadyFlow Board Support package for Windows, Linux or VxWorks operating systems includes C-callable libraries, drivers and example code for easy access to all of the Model 71641 features. The Model 71641 starts at $23,695. Pricing varies depending on the options chosen. Pentek, Upper Saddle River, NJ. (201) 818-5900. [].


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RTC magazine  

February 2013

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