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The magazine of record for the embedded computing industry

December 2011

Hard Logic Speeds Memory Access Scripts Speed Design for Web-Based Maintenance Virtual Tools Speed ASP Development An RTC Group Publication

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Editorial Power and Integration—ARM Making More Inroads into More Designs

Insider 8Industry Latest Developments in the Embedded Marketplace

12 Article Index 50Annual A Review of the Previous Twelve Months in RTC Magazine

Small Form Factor Forum Help Wanted! Industry Leadership


Products & Technology Newest Embedded Technology Used by Industry Leaders

EDITOR’S REPORT Development Tools for ASPs

Platforms from Xilinx and Altera Support Development on ASPs 14Virtual Tom Williams

Technology in Context Embedded Memory Design

Memory Boosts Next 18 Algorithmic Generation SoC Memory Performance Sundar Iyer, Memoir Systems

TECHNOLOGY CONNECTED Embedded Web for Maintenance and Control

Servers and Lua Scripting Speed Rich Web Applications for 24 App Small Devices Wilfred Nilsen, Real Time Logic

TECHNOLOGY IN SYSTEMS Computers for Harsh Environments

28 Conduction Keeps Computing Cool Commercial Products 38 Ruggedizing to Withstand the Most Demanding Environments


3.0 Taking Hold and Gearing 32USB: for the Future Evan Schulz, Silicon Labs


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Power and Integration—ARM Making More Inroads into More Designs

Tom Williams Editor-in-Chief


t’s about power—low power; almost no power. A huge and burgeoning market is opening for devices that are handheld and mobile, have rich graphics, deliver 32-bit multicore compute power, include Wi-Fi, web and often 4G connectivity, and that can last up to ten hours on a battery charge. The most obvious among these are smartphones and tablets, but there is also an increasing number of industrial and military devices that fall into this category. Increasingly the choice for such applications is turning out to be an ARM-based processor. The rivalry between ARM and Intel in this arena is predictably intense because try as it will, Intel has not been able to bring the power consumption of its Atom CPUs down to the level of ARM-based designs. With Atom running in the 1 to 4 watt range and a single ARM Cortex-A9 core in the 250 mW range— to which must be added the consumption of on-chip peripherals along with a second core—the gap in power consumption is still pretty wide. In addition, one needs to add to the Atom design the peripheral controller hub (PCH) and any off-chip peripheral devices. Despite all this, the choice is far from simple. Part of it depends on whether you want to build the processor into a custom board or are looking for a module such as a small form factor SBC. In the latter case, Atom-based board modules are available in vast profusion from PC/104 and its variants to COM Express, EPIC, Q7 and more. For ARM-based OEM boards, not so much. On the other hand, an ARM approach falls into the growing trend to move away from SFF board-based designs and put as much functionality as possible onto an IC. An Atom works well on a COM board, for example, because of its straightforward interface, which can be brought out to a standard connector like a SUMIT or PCIe connector. On the other hand, there is very little among the many ARM implementations that would resemble a standard interface let alone a pinout. Many peripherals that would be accessed on the COM or carrier board in an Atom design are accessed for the ARM on chip by the internal AMBA bus. The external pins are often specific to the on-chip peripherals and these vary among design and manufacturer. This is not to say that there are not board-level ARM products, but the vendor of such modules has to select a manufacturer and members of that vendor’s ARM family to support on that



form factor or arrange for a design and fab with a semiconductor vendor. In any event, the external interfaces on such a board will depend on the interfaces of the processor. Another vendor’s ARM implementation will not work if moved to that board. Despite their differences in power consumption, ARM and Atom appear to be tailored for two different if sometimes overlapping worlds. It is much more difficult for an ARM processor (pick one out of hundreds) to work on a standard module like COM Express because so much of the functionality associated with ARM resides on-chip and that does not lend itself to the world of standard connectors that interface generic CPU boards to custom carrier cards. By the same token, integrating an Atom into a smartphone appears awkward because—aside from the power consumption—other discrete devices would have to be added to make it all work. Now having said all this does not mean that these things are not being done successfully from both directions. ARM processors are being offered on SBC modules, and Atom processors are definitely being deeply integrated into a vast number of small devices. Still there are considerations that have made an ARM choice increasingly attractive in a certain set of instances. These appear to be highly integrated small devices that will be produced in a significant volume so as to justify a certain level of NRE expenses such as increased development effort and custom board design. This has always been important when deciding to go with an ASIC or SoC because of the significant up-front expenses and risks. An ARM processor with a given mix of peripherals is not application-specific per se, but it can be said to be application class-specific. Thus, selecting an ARM approach does make sense for higher volumes, though these need not be nearly as high as those needed to justify an SoC approach. The availability of devices like ARM and all its variants does reinforce the trend for embedded designs to move from board-level to more IC-level implementations. If the demand for a design increases to a certain point, it can also make sense to go to a full-ASIC implementation. One thing is certain beyond the specific details—higher integration will be the choice as soon as it makes financial sense.

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INSIDER DECEMBER 2011 M2M Working Group Created by Sierra, IBM, Eurotech, Eclipse Sierra Wireless, IBM, Eurotech and the Eclipse Foundation have established an M2M Industry Working Group to ease the development, testing and deployment of machine-to-machine (M2M) products. The new Industry Working Group will define and implement an open standard platform for the software development tools used in developing machine-to-machine (M2M) communications applications. The M2M Industry Working Group is open to any organization with an interest in M2M products, including both vendors and potential clients. The market for M2M products is growing, but rapid growth is hindered by incompatible platforms and protocols that require developers to continually reinvent solutions that have already been created. This situation slows innovation and creates maintenance and upgrade problems as deployments evolve over time. The founding members of the Industry Working Group believe the creation of open tools, open protocols, open interfaces and open application programming interfaces (APIs) are the best approach to addressing these problems, bringing tremendous value to the M2M ecosystem. The M2M Industry Working Group is the umbrella for M2M-related Eclipse projects for open source, the first of which is the Koneki project. The goal of Koneki is to provide M2M software developers with tools that ease the development, simulation, testing/debugging and deployment of such products. The initial open source contributions provide a common set of tools and APIs that simplify development of software across multiple environments (such as Linux, Java and proprietary environments such as Open AT from Sierra Wireless), as well as standard communications protocols. The benefit to M2M customers is more flexibility with systems that are interoperable and don’t lock them into a long-term relationship with a single product vendor. Sierra Wireless has made the first significant contribution to the Koneki project, providing a full-featured embedded development environment for the Lua programming language.

ETSI Demonstrates M2M Standards Success

The European Telecommunications Standards Institute (ETSI) has successfully demonstrated the interoperability of products based on its new M2M standards at the recent ETSI Machine-to-Machine workshop held in France in October. Five comprehensive demonstrations, organized by ETSI’s Technical Committee for Machine to Machine communications (TC M2M), showcased how the interoperability of standards-based solutions in M2M products is key to market success. The event, the first in a series of ETSI activities focused on M2M interoperability, included thirteen diverse organizations and covered a wide cross section of M2M applications. These included Smart Energy, Environmental Sensing, mHealth, Intelligent Transport, Ambient Assisted Living, Personal Robots, Home



Automation, Medical Appliances and Smart Metering. The demonstrations covered architectural components specified in the ETSI M2M standard, including M2M devices, gateways with associated interfaces, applications, access technologies as well as M2M Service Capabilities Layer. The companies involved included Actility, Cinterion Wireless Modules GmbH, Grid2Home, Intecs, Intel, InterDigital, NEC, OFFIS, Radisys, Sensinode, Telecom Italia, Vodafone, Vodafone D2 Test & Innovation Center.

LynuxWorks and Themis Demonstrate Rugged, Secure Server Solutions

LynuxWorks and Themis Computer have teamed to demonstrate a new rugged, high-performance multilevel secure solution. The companies are showcasing LynuxWorks’ LynxSecure secure separation kernel and embedded

hypervisor running on Themis’ CoolShell blade servers. Nowhere are the requirements for secure high-performance computing more dramatic than the battlefield. The military requires transportable, highperformance, secure computing platforms optimized for field deployment—where difficult conditions are the norm. This means secure, compact, lightweight and highly available computing that is easy to use. The ideal solution must be scalable and designed to maximize virtual environments. Because back-up windows are short and bandwidth is limited, access to data must be fast, secure and reliable. LynxSecure’s highly secure virtualization solution utilizes CoolShell’s hardware-virtualization technology and multiple processor cores to provide one of the most advanced multilevel secure platforms available in military and aerospace systems today.

The LynxSecure solution is also available on Themis RES rackmountable, small form factor and 3U VPX Mission and Payload Systems (MPS).

Eurotech and IBM Contribute Software to Connect Wireless and Mobile Devices

IBM and Eurotech have announced that they are contributing software to accelerate and support the development of a new generation of smarter wireless and mobile devices. The technology, which could become the basis for a new standard of mobile connectivity and interoperability, will be contributed to the Eclipse Foundation open source community. The Eclipse Foundation, founded by IBM in 2001, is celebrating its 10th anniversary at EclipseCon in Germany. Originally developed by IBM and Eurotech, the contributed Message Queuing Telemetry Transport (MQTT) protocol is in use today among some industrial, mobile and consumer applications, providing reliable device connectivity in industries such as transportation, energy, military, financial, social media and medical. Uses of MQTT range across projects as diverse as real-time monitoring for a ConocoPhillips pipeline, to a new lightweight mobile messaging application for Facebook. Billions of embedded devices—from RFID tag readers, smartphones and cardiac monitors to GPS-aware systems, thermostats and smart appliances,¬ can be interconnected to one another. Fueled by rapid growth in wireless broadband connectivity, this number is rapidly expanding. There are 9 billion connected devices in the world today, and according to a recent study conducted by Ericsson AB, that number is expected to reach 50 billion by 2020.

The architecture that the contributed technology enables can adapt easily to existing systems and provide a new level of connectivity across a wide range of systems—without requiring significant programming or reconfiguration of legacy monitoring systems. Based on an industry proven open protocol, the MQTT technology will provide the missing piece needed to usher in this new level of accessibility and

connectivity among systems, and enable the creation of next generation Machine-to-Machine (M2M) solutions.

MIPS and SYSGO Collaborate to Bring PikeOS Virtualization to MIPS32 Cores

MIPS Technologies and Sysgo have announced they are collaborating to bring Sysgo’s embedded virtualization technol-

ogy to MIPS32 processor cores. Sysgo’s PikeOS RTOS is a hypervisor virtualization platform that allows several applications and operating systems such as Android and Linux to run securely in parallel on a single hardware platform. With PikeOS, MIPS’ licensees have flexibility in deploying CPU resources for different tasks, potentially eliminating the need for a dedicated security CPU in their system. Microprocessor and sys-

tem-level security are increasing in importance with the advent of mobile payments, streaming of sensitive data across devices, processing of high-value media content and other consumer-driven developments. To address these trends, PikeOS offers a unique combination of an RTOS and a secure virtualization environment. Hypervisor-based virtualization is an important piece of the embedded security picture

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across each of MIPS Technologies’ target markets. Such a solution is flexible and enables scaling of security across multiple applications and operating system instances. Together with Sysgo, MIPS is already engaging with customers and prospects in the digital home, networking, automotive and mobile markets.

Xilinx Zynq-7000 Family Wins Embedded & Critical Systems Award

Xilinx has announced that its Zynq-7000 Extensible Processing Platform (EPP) achieved Embedded & Critical Systems Award status at The Institution of Engineering & Technology’s (IET) annual Innovation Awards, held on Wednesday, November 9th, in London. Xilinx was celebrated for its new family of devices that incorporate an ARM dual-core Cortex-A9 MPCore processing


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system with 28nm programmable logic. The IET Innovation Awards recognize the most innovative companies operating within a wide variety of engineering and technology disciplines. The ceremony attracted a record 420 entries, each demonstrating different innovations around the globe with a unique opportunity to demonstrate their imagination and recognize the depth and breadth of innovative work being carried out across all areas of engineering and technology. The judges commented, “This new single platform offers an extremely flexible and productive embedded systems development environment. It enables access to powerful serial and parallel computing resources creating new choices for designers, for example deferring or removing the need to move to ASICs.”

LSI Acquires SSD Controller Maker SandForce

LSI has announced the acquisition of SSD controller maker SandForce, which LSI calls: “the leading provider of flash storage processors.” LSI claims that this move, slated to close early in the first quarter, propels “LSI into an industry-leading position in the rapidly growing, high-volume flash storage processor market,” extending “LSI’s industry-leading position in storage technology solutions.” LSI further states that after the acquisition, “LSI’s breadth and capability will surpass any competitors in the storage semiconductor space.” With the acquisition of SandForce, LSI assumes a leadership position in SATA SSD controllers, positioning itself as a leader in storage control, HDD and SSD controllers, becoming a one-stop controller shop for all things storage. SandForce has sold SSD

controllers to market leading companies including LSI’s partner Seagate. LSI already uses SandForce controllers in its WarpDrive, giving the company an understanding and appreciation of the quality of the SandForce product. Analysts, among which are market research firm Objective Analysis, do not anticipate any significant change to SandForce’s support of SSD makers, and the company’s reach should be expanded through LSI’s larger sales force. LSI will continue to support design wins for all these customers while introducing them to LSI’s broader portfolio of RAID and HBA controllers (for PCIe SSDs), SAS bridges and other related products. Two companies that already avail themselves of such products are Oracle and OCZ.

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Help Wanted! Industry Leadership


he untimely death of Steve Jobs should serve as a reminder to us all that the individuals whose energy, creativity and thirst for innovation brought about today’s Small Form Factor industry are all getting older and either approaching or have already passed retirement age. The folks who brought us the pervasive embedded computer board technologies of the past 30 years or so, VME, PC/104, cPCI and others, are getting ready to hang up their slide rules (or in some cases already have). And just as Apple struggles to try and replace their irreplaceable leader with a passionate and innovative team, the suppliers and standards organizations that together hold responsibility for the evolution of the SFF industry need to identify and put in place a team that can define and drive the next generation of SFF standards. Unfortunately, as we look across our industry, we just don’t see it. The last truly innovative step in the SFF community was the introduction of the Computer-on-Module (COM) concept some 11 years ago. As the SFF community has evolved since then and wrestled with the introduction of new bus technologies forced upon us by chip vendors with little system OEM interest, no individual or group of individuals has stood up to pull the community together. Instead, we have one organization that never met a pin definition (type) they didn’t like. We have another organization where suppliers battle mercilessly to get their proprietary technology adopted by their competitors as long as they have a huge running start to give them a competitive advantage. And an entire geographic region with suppliers who disdain standards completely, declining participation in industry trade groups while they continue to churn out one-off customer project-based proprietary solutions or knockoffs of yesterday’s technologies. This lack of leadership is reaching a stage where it will begin to put a crimp in the future growth of the SFF marketplace. Just as Apple moved their Mac family from Motorola’s “Power” architecture (PowerPC) to Intel architecture processors some years ago, the SFF market is largely based today on Intel architecture processors. And just as Apple disdained Intel architecture in favor of the low power consumption of a custom RISC processor



for their mobile i-products, so the SFF market is starting to see the introduction of more and more non-Intel architecture embedded boards. All in the complete absence of a standardization effort of any kind. It doesn’t take much foresight to see that movement of SFF products to processor architectures other than Intel is probably the next great pervasive technology for the SFF market. Intel just hasn’t been able to get where they need to be with respect to cost and power consumption for the smallest form factors. Power and heat are among the biggest challenges facing the broad swath of embedded OEMs today. However, as RISC processor architectures emerge for SFF boards, we seem to be faced with one proprietary solution after another. Interoperability—Oh Please! Ecosystem? Eco what? Some will argue that these are not important issues and that we don’t need a common interface, with a standardized bus architecture and form factor to support off-the-shelf I/O. Build a baseboard with your own I/O. Change it as necessary to reflect product lifecycle changes. Tell that to the medical and aerospace OEMs with huge certification costs and timeframes. Somebody or some group has to stand up and drive this issue; some set of suppliers (and OEMs) who are willing to set aside proprietary advantage to do what is right to grow the SFF market for everybody. Mind you, this is not an easy pill for egocentric board manufacturers to swallow. It’s natural to want to hang I/O for non-Intel processors on the processor local bus, and every RISC SoC is different. Some kind of chip-based core is probably required to bridge the gap. This is a solution that some group will have to develop and “contribute” to the industry, royalty free. As we look out over the horizon, we don’t see any individuals or groups willing (or with enough clout) to take on this challenge. We see a bunch of folks fighting to use standards groups for their own competitive advantage, and a few go-it-aloners hidden behind URLs and logo clubs. Unless this changes, when the next generation of embedded “gurus” approach retirement age, there’s going to be a whole lot of discussion of missed opportunities and how downright awful it is to do an embedded design.

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editor’s report Development Tools for ASPs

Virtual Platforms from Xilinx and Altera Support Development on ASPs Application Services Platforms combine a hard CPU with an FPGA fabric on a single die. Developing applications requires the combination of software programming with programmable logic development. Two rival vendors have created virtual tools to support such development. by Tom Williams, Editor-in-Chief


verybody has a different name for processing system—combined with FPGA them: Programmable SoC (PSoC) fabric selections based on their own adfrom Cypress, SmartFusion from vanced programmable logic technologies. Microsemi, Extensible Processing Plat- Both are implemented in a 28nm process form (EPP) from Xilinx and, most re- technology. It is the implementation of the cently, SoC FPGA from Altera. In these FPGA fabric that differentiates the spepages we have named them Application cific device offerings both between the Services Platforms (ASPs). All this var- two vendors and within their own product ied nomenclature focuses on a new class families. nies providing solutions now In general terms, the idea of such of devices that combines a hard-wired ion into products, technologies and companies. Whether your goal is to research the latest an ASP integrates the major components CPU with a set of configurable or proation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you of an embedded system design, with the grammable logic on the same silicon die. you require for whatever type of technology, exception of memory and storage, onto the of Cypress, the latter consists and productsInyou arecase searching for. a single device. This brings two distinct of generally defined configurable logic technologies together on the same die. elements. In the case of Microsemi, XilIt also brings two distinct development inx and Altera, it is an FPGA fabric to which have been added a small number disciplines onto a single die. The CPU section, along with the complement of of hard-wired interfaces. In the case of Xilinx and Altera, normal peripherals, is programmed uswhich are the major topics here, the two ing the rich offering of ARM developarch-rivals have developed ASP devices ment tools available on the market using based on a common CPU architecture— widely understood programming lanthe dual-core ARM Cortex-A9 MPCore guages like C. The FPGA fabrics can be configured with IP and/or programmed using the tool suites available from XilGet Connected inx and Altera respectively. Using two with companies mentioned in this article. different tool environments and

End of Article



Get Connected with companies mentioned in this article.

gramming disciplines for such a tightly integrated device is, however, not the optimal solution. Both Altera and Xilinx have now introduced virtual environments that are initially aimed at getting users started with software development in advance of actual hardware availability. At the time of this writing neither device family is actually on the market, but both are anticipated in the near future. The Xilinx offering is called the Zynq-7000 EPP Extensible Virtual Platform (Figure 1), and the Altera offering is the SoC FPGA Virtual Target (Figure 2). Both companies have also teamed with major EDA companies in the creation of their virtual environments—Altera with Synopsis, and Xilinx with Cadence. At this point, both virtual environments appear to emphasize the development of software on the device both in terms of how it functions as code on the ARM processor and how it interacts with functions that will be implemented in the FPGA fabric of the respective devices. The Altera Virtual Target implements a binary- and register-compatible PC-based simulation model of the ARM Cortex-A9 and its peripherals along with the system peripherals found in its Cyclone V and Arria V-based ASPs. It also models board-level components including DDR SRAM, flash memory and virtual I/ Os. Similarly, the Xilinx Zynq-7000 EPP implements a register-level accurate model of the ARM processor and its peripherals plus memory and I/O. The Xilinx platform comes in three levels. The QEMU system model is aimed at early open source development for porting the operating system, device drivers and application development that interacts with the processing system peripherals. The two other levels are called extensible virtual platforms and are able to boot Linux in under ten seconds as well as boot and run other RTOSs. It also has a fast simulator for floating point and support of the advanced SIMD extension known as NEON. The third Xilinx level, known as the Virtual Platform for System Creators,

editor’s report

Zynq-7000 EPP Virtual Platform Custom VHDL

Custom System Verilog


Custom C Model

Custom TLM Model

Processing System

Real-World Interfaces

Programmable Logic

Memory Controller Peripherals • UART • USB • I2C • Ethernet • CAN • GPIO • SDIO • SPI

Graphics/ Display

Custom TLM Model Custom TLM Model

Cortex-A9 MPCore

Custom SystemVerilog*

Custom VHDL*

Custom TLM Model

PCI Device Model


PCI Device Model

Custom C Model

PCI Device Model

Figure 1 The System Creator level of the Xilinx Zynq-7000 EPP Virtual Platform models the ARM core, its peripherals and other needed interfaces. In addition, it supports TLM models of interfaces to functionality that will be placed in the FPGA fabric such that both software and logic designers can develop to the common interface definition.

Real I/O Connectivity on Host PC

PC-Based Simulation of SoC FPGA Develpment Board

Optional FPGA-in-th-loop Extension FPGA for user IP

Ethernet DDR USB


includes all the elements of the first two levels plus advanced verification, analysis and profiling and is integrated with the Cadence System Development Suite. SystemVerilog and VHDL are supported with additional licenses. The Platform for System Creators is also extensible with device and platform models as transaction level models written in TLM/SystemC and C. This allows it to support custom devices that will ultimately be instantiated with the ZYNQ-7000 ASP’s programmable logic. From this it seems clear that both the Altera and the Xilinx virtual platforms are primarily aimed at giving the software developer, who will be writing application code for the ARM core, a head start in advance of the availability of silicon. And of course there is a wide variety of quality ARM development tools and IDEs for programmers to choose from. To do this he or she must be able to interact with not only the processor and its peripheral environment but also at some level with the functionality to be implemented in the programmable logic of the device. Where Xilinx supplies TLM modeling ability, Altera offers a PC interface, specifically a PCIe express link, to an Altera FPGA development board. They call this the FPGA-in-the-loop extension to the virtual target. This allows the developer and the processor application code to interact directly with the IP programmed into the FPGA—albeit via the PCIe link, which will not be the interface in the actual device, but rather a 100 Gbit/s (Cyclone V) or a 125 Gbit/s (Arria V) ARM AMBA AXI interface. One consideration, however, is that in order to use the FPGAin-the-loop option, the IP for the logic must already be developed. The Xilinx platform will also be able to interface to PCIe device models, but not the actual FPGA fabric, via a PCIe interface. The TLM model defines the interface, not the functionality of the logic. That at least gives the programming side and the logic development team a common interface to use, with the registers, etc., defined. Functionality can at least be stubbed by creating a lookup table with

Hardened CPU Interface IP

Flash User IP

User IP

Figure 2 The Altera SoC FPGA Virtual Target models the ARM core and its peripherals as well as the interfaces and devices on a development board. Additionally, it supports an optional extension to an actual FPGA on a hardware development board.

several known results for several known inputs and the software team can proceed as can the logic team. What they—intentionally—do not include in the platforms is the development of the programmable logic on the respective devices themselves. They do have individual solutions for allowing the pro-

grammer to interact with the functionality implemented or to be implemented in those FPGA fabrics. It appears, however, that the actual development of the FPGA will not take place through the user interface of the respective virtual platforms, but via the IDE of each company’s development tool suites. RTC MAGAZINE DECEMBER 2011


editor’s report

Now, these FPGA development suites are certainly very powerful and sophisticated tools, and those skilled in their use can develop a vast variety of IP functionality for the programmable logic. In the case of Altera, this included the Quartus II software and the Qsys system integration tool. For Xilinx, it is the ISE Design Suite, Embedded Edition. Both companies also support their own soft processors, which can be implemented in the FPGA fabric:

for Altera, the Nios, and for Xilinx, the MicroBlaze. So why did we say earlier that this is not the optimal solution? From our perspective, an optimal solution would be one that brought both disciplines—application software development and FPGA hardware design—into a single development environment, one that has a highlevel user interface for developing both code and logic at least at the architectural

level. As it stands, the two technologies are combined on the same die but not the two development disciplines. There is not a single metaphor in which the system architect can at least express the high-level design of a system. Such a high-level tool would have a number of advantages. For one thing, it would facilitate communication between the software and the programmable logic specialists. They would have a single system definition to refer to. For another thing, it would lend itself to the development of tools for evaluating trade-offs. For example, is it better to implement a given function in software or programmable logic? What are the performance and latency considerations; what kind of space does it take up on the logic array? What amount of flexibility does one gain or sacrifice for a given decision? We can always create wish lists, but the advent of the ASP is creating a huge opportunity for developers to take advantage of what would earlier have required a custom ASIC or SoC—with the attendant risks and mandatory high volumes. As time goes on we can expect more developments, not only in devices but also in development environments, which will take these innovative advances even further. Altera San Jose, CA. (408) 544-7000. []. Xilinx San Jose, CA. (408) 559-7778. []. Cadence Design Systems Bracknell, Berkshire, UK. +44 1344 360333. []. Synopsis Mountain View, CA. (650) 584-5000. [].


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Embedded Memory Design

Algorithmic Memory Boosts Next Generation SoC Memory Performance A new memory synthesis platform is able to leverage existing memory IP and combine it with new algorithms to create customized embedded memory solutions that can be highly optimized for specific applications. by Sundar Iyer, Memoir Systems


ystem-on-chip (SoC) architectures 600 million packets per second. For are a popular choice for meeting the each packet, a unique set of jobs must ever increasing performance needs be performed, some requiring four to six of embedded and mobile systems. These memory accesses per packet. Multiplydesigns generate a lot of memory requests ing six accesses by 600 million packets, including frequent back-to-back requests we see 3600 million memory operations from multiple processor cores. Unable to per second (MOPS) are required. Since keep up with processor demand, memory an embedded memory operating at 500 has become a bottleneck. SoC architects MHz can sustain only 500 million MOPS, and designers are struggling to meet the system architects will be challenged to performance requirements of today’s da- bridge the performance gap. In some ta-hungry applications. Faster processors cases though, it is only after the designer can’t fix the problem, and can actually starts figuring out the micro-architecture nies providing solutions nowWith memory performance and analyzing all pipeline stages, inputs, make it worse. ion into products, technologies and companies. Whether your goal is to research the latest and the logic in between that the becoming the limiting factor in many SoC outputs ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you bottlenecks become evident. designs, the question arises: how can we you require for whatever type of technology, Today, system designers use a wide Algorithmic memoand productsmake you arememory searching faster? for. array of ingenious system level mecharies, which use algorithms synthesized in nisms, such as hierarchical caches, pipehardware to speed up memory, offer SoC lined memory architectures, memory architects a new option for unlocking sysstriding, static memory allocation etc., tem performance. When addressing SoC memory re- to avoid memory bottlenecks. Statistical quirements, the first question to ask is solutions such as memory interleaving, where is the bottleneck? In some cases, which involves banking of memories, are the bottleneck is obvious. For example, also commonly used. Often, achieving in network data path processing, a 4-port performance goals requires compromises 100 Gbit/s Ethernet line card receives such as replication of memory hardware or increased design complexity. Most importantly though, system level approaches are Get Connected not always applicable, and do not always with companies mentioned in this article. provide the necessary performance. What

ploration your goal k directly age, the source. ology, d products

End of Article



Get Connected with companies mentioned in this article.

if these kinds of architectural mechanisms could be incorporated at a lower level and placed into the embedded memory core itself? A new approach called algorithmic memory technology does exactly that. Algorithmic memories work by adding logic to existing embedded memory macros enabling them to operate much more efficiently. Within the memories, algorithms intelligently read, write and manage data in parallel using a variety of techniques such as buffering, virtualization, pipelining and data encoding. These techniques are woven together to create a new memory that internally processes memory operations an order of magnitude faster and with guaranteed performance. This increased performance capability is made available to the system through additional memory ports so that many more requests can be processed in parallel (Figures 1 and 2). Perhaps you are wondering, where’s the catch? You can’t get something for nothing. As with all aspects of design there are tradeoffs to be made. Algorithmic memories trade a small amount of area, about—15 percent—to double performance. Using this approach, performance improvements of up to tenfold

technology in context

2X Performance for ~15% overhead

Any Physical Memory Supplements comercial memory IP, Does not re-design memory

Supports different nodes, memory types

Algorithmic Memory IP Up to 10X acceleration

Algorithmic techniques to manage all accesses to memory; transparent to end-user

Dout Read

Dout Read

Din Write

Din Write

are possible, although not always practical. Alternatively, if area or power is more critical, then performance can be traded to optimize these (Figure 3). In addition, every application has a different pain point. Do reads need to be faster, or writes, or both? Is power consumption an issue? Is die area a concern? How can we find the optimal balance of speed, area and power? Understanding whether a bottleneck is the result of reads, writes, updates or any combination of reads and writes is the basis for determining what kind of memory is required to solve the problem, and this is where algorithmic memory technology comes into play. Algorithmic memory allows us to create customized memories that are highly optimized for specific applications. The more clearly and narrowly we define the performance requirement for a specific application the better we can make the right tradeoffs in terms of speed, area and power. For example, if an application is mainly doing reads to a data structure, and that becomes a bottleneck, then perhaps the best solution would be a four read port memory with just one write port (4R1W). In another case, an architect may decide two read ports and two write ports are needed. This could be satisfied with a four port algorithmic memory with two read and two write ports (2R2W), assuming the requirement is for equal amounts of read and write acceleration. Another designer might find an application does lots of reads and other times lots of writes. In this instance, a quad-port memory, which means four bi-directional ports, would be preferable. By convention, if the ports are bi-directional they are called dual, tri, quad and so on. For example, a quad-port memory is a superset, and it can be used as a four port memory or with various ports used bi-directionally. Perhaps an application is doing only updates, which is a special case where the application does a read-

Figure 1 Algorithmic memories work by adding logic to existing embedded memory macros enabling them to operate much more efficiently. Within the memories, algorithms intelligently read, write and manage data in parallel using a variety of techniques such as buffering, virtualization, pipelining and data encoding. Physical Memory

Memoir Algorithmic Memory

500 MHz Memory

500 MHz Memory •••


500 million MOPS

Algorithmic Memory IP

500 M MOPS Allows 500 M Memory Operations/s (MOPS)

500 M MOPS

500 M MOPS

500 M MOPS

Allows 2000 M Memory Operations/s (MOPS)

Figure 2 By adding more external access points to the surrounding IP it creates an interface that can do multiple accesses to the memory array in a single clock cycle, while accessing data at the level of single addresses.

modify-write. For example, to update a counter you would read from an address and immediately write back to the same address a few cycles later. Can a memory be built to exploit this special case? Until now, it has been impractical to use customized memories because both the cost and the amount of time required to design, develop and verify a new mem-

ory were prohibitive. This is no longer the case with algorithmic memories. Algorithmic memories can be created very rapidly by combining existing memory IP memory cores with previously verified algorithms. In principle, a memory synthesis tool could analyze memory IP from any vendor and select the right memory core and the right combination of algoRTC MAGAZINE DECEMBER 2011


technology in context

Physical Memory Higher Performance Algorithmic Memory Area Efficient Algorithmic Memory Power Efficient Algorithmic Memory

Performance (MOPS) Higher performance algorithmic memories 4P

Higher density algorithmic memories 2P

Memory Density (Mb/mm2) SP

Power efficient algorithmic memories

Power Efficiency (Mb/mW) Figure 3 Algorithmic memory technology allows system designers to treat memory performance as a programmable characteristic with its own set of tradeoffs with respect to speed, area and power. For example, it is possible to trade a small amount of area, about 15%, to double performance.

1R1W 1R/4W




Algorithmic Memory Physical Memory

1R/W 3R1W


2RW 1R1W




2R1W 3R/1W

Figure 4 Custom embedded memories can be synthesized on many different embedded memory types including SRAMs, eDRAM, register files and more. Memories can be configured with any combination of read and write interfaces.



rithms for a particular set of memory requirements. Using this automated memory synthesis platform, a new custom memory could be created within a couple of days (Figure 4). How would this new memory synthesis platform actually work? A system architect would need to specify the desired characteristics of the new memory such as the number of read and write interfaces, the operating clock frequency, and any area and power requirements. The synthesis platform would need to perform extremely rapid analysis and estimations of potential solutions since it must sort through a large body of commercially available memory IP and determine the best matching of physical memory and algorithms. This phase of processing could be done working with abstract models of the IP building blocks. For example, all memory IP might be characterized in a common format, such as an ASCII representation, to capture each memory’s data width, address depth, operating clock frequency and power consumption. Likewise, every available algorithm could be characterized or mapped into a database for selection based on whether it accelerates reads or writes, the number of ports it supports and so on. Working with this high level information, the synthesis platform could rapidly analyze various combinations of memory IP and algorithms to find a set of potential algorithmic memory solutions and their estimated speed, area and power characteristics. An architect could then choose an algorithmic memory based on the preferred memory IP vendor or specific details of a particular configuration. Only in a final stage would the synthesis platform need to use detailed information for a specific vendor, process and node to synthesize the algorithmic memory and close timing (Figure 5). Once a suitable combination of memory IP and algorithms has been identified, how is the algorithmic memory built? Building a complex memory with circuits is tedious, and there is essentially only one brute force way to do it. For example, building a 4R4W memory requires laying out enough transistors onto a cell to support four inputs and four outputs. With

technology in context

algorithmic memory, however, there are many ways to build one, each with its own advantages and disadvantages. For example, to build a 4R memory, we might start by building a 2R memory. This 2R algorithmic memory could then be modified to create a 3R memory and then the 3R memory modified to form a 4R memory. Furthermore, the 4R memory could form the basis for a 4R1W memory and additional write acceleration algorithms could be added to support more write ports to form a 4R4W memory. The underlying physical memory may only be doing 1R. The point is that algorithmic memory can be constructed hierarchically and it is not necessary to build every algorithm a priori. To further demonstrate this, consider building a 7R8W custom memory. Imagine there are algorithms that can take a single port physical memory and make it look like a 2R memory with 2x read acceleration. Now we treat that 2R memory like a black box because a 2R algorithmic memory functions just like a 2R physical memory. We can use 2R memory as the black box and repeat the algorithmic operation on each of the ports individually, then re-instantiate the algorithm and hook the first instance to the first port. Then, we can hook another instance to the second port to get a 4x in acceleration and so on. It is possible to keep doing this operation recursively for both the reads and the writes. The important point is that algorithmic memory can be built recursively. The synthesis platform tool can build an NR, NW memory by recursively invoking its core algorithms. This means only a few core algorithms are required. Required algorithms could include even and odd number ports with 2x and 3x for read and write acceleration. Both two and three are co-prime numbers and from these any number of port combinations can be generated. In some cases, it may be preferable to do the acceleration directly. For example, rather than recursively using 2x plus 2x, a 4x algorithm might work better so additional algorithms could be developed. At the end of the process, what would be the output of the synthesis platform,

Algorithmic Memory Synthesis Platform 1P SRAM 2PRF DP SRAM eDRAM

2X 3X 4X

# Read # Write





Synthesized Memory

Latency Reduced Standard

Power Area

Feedback Push Button Analysis


Figure 5 An algorithmic memory synthesis platform can analyze different configurations of memory type, desired acceleration, number of ports and other parameters, and give information about the resulting density, speed, power consumption and die size within seconds.

or more to the point, what constitutes an algorithmic memory? Recall that circuit definitions for the algorithms are just register-transfer level (RTL) logic, like any other logic. Then a logic synthesis tool such as Design Compiler from Synopsys is used to create an intermediate format code i.e., a gate level netlist that is specific for a foundry and technology node. Algorithmic memories would be delivered as soft intellectual property (soft IP), because only intermediate formats are generated. The chip designers would then integrate the intermediate format memory with the rest of the chip’s intermediate format components. This has the advantage of allowing chip designers, who have more system knowledge of their chips, to make decisions about how the routing and placement is done. In summary, algorithmic memory technology addresses the challenge of memory performance at a higher level and allows system designers to rapidly create customized memory solutions that are op-

timized for a specific application. Thus, algorithmic memories allow system architects to treat memory performance as a configurable characteristic with its own set of tradeoffs with respect to speed, area and power. Memoir Systems Santa Clara, CA. (408) 550-2382. [].














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connected Embedded Web for Maintenance and Control

App Servers and Lua Scripting Speed Rich Web Applications for Small Devices With ever more smart devices connecting to the web, even small embedded devices must be able to serve up rich graphical presentations of the data to satisfy user expectations. With time and space at a premium, a scripting approach can be invaluable. by Wilfred Nilsen, Real Time Logic


unning a business used to be straightforward. You had development and production and marketing and sales, little of which had fundamentally changed for decades or more. And then the Internet happened. Suddenly everyone had to have websites and online support and shopping carts and Like buttons. Such a web presence has wormed its way ever deeper into our expectations: increasingly, in our Internet-of-things world, all devices must be connected through a web application. This creates a new challenge for designers of small embedded systems. Not only is it a new task, but smartphones have set the bar ridiculously high when it comes to how sophisticated the application interface should be. We have come to expect that small devices can operate with color, depth and flair. So whether it’s a meteorologist checking on the weather in Antarctica or a seismologist checking bore temperatures deep in the earth, cryptic text or clunky graphics won’t cut it. These folks don’t care how little processing power your device has. They simply want to see things the way they’re used to seeing things. Of course, a web application is nothing more than software, and to a system designer, C may just feel like the natural



Request Page Load page: GET/pagename Response: dynamically created HTML AJAX calls Client (Browser) Smartphone, Tablet, Mac, Windows

GET/pagename? param1=val1&param2=val2 JSON response: { “key” : “val”, “data” :[1,2,4]}

Submit Form Send data: POST / pagename?param=val

Web Application Server Request object: Parsed client data Response object: Client response buffer and transaction management

Response: dynamically created HTML

Figure 1 A web interface implements a series of requests, some explicit and some implicit, achieved ultimately in text with the assistance of abstraction technologies like AJAX and JSON.

way to approach this. But using C can mean spending as much time on the user interface as you spend on your core technology. There are much faster and easier ways to get a high-performance web application to market.

Some Web Basics

While a good web application should provide a viewing experience that is natu-

ral to your user for the specific thing you’re enabling them to do, in the end, it depends on an exchange of information over the Internet. That infrastructure can look deceptively simple. It’s based on the HyperText Transfer Protocol (HTTP) and, as the name suggests, everything being communicated back and forth between the user’s browser and your device—which the browser sees as a web server—is text. No

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technology connected

Lua scripting development cycle

Edit C Code

Build Stop server

C or C++ development cycle

Edit source

Download to target

Refresh browser Start server

Development Time

Refresh browser


Figure 2 C code development takes much longer and is intrusive; Lua script development can be as much as 30 times faster without bringing the system down.

matter how complex the web experience, it all boils down to strings. In the early days of the web, people wrote static web pages that consisted of Hyper Text Markup Language (HTML) text. A browser would request a page at some location, specified by a Uniform Resource Locator (URL), and the server would find that page and simply ship it back. Then some clever people realized that, rather than having a page fixed in some location, you could dynamically create the page using a more sophisticated database of content along with the intelligence to assemble the information into a page. One way of doing that is to have the server return a page with lots of JavaScript code. The browser then executes the JavaScript to render the page. Unfortunately, different browsers work differently, and relying entirely on JavaScript can create compatibility nightmares. The preferred alternative is to move much of the responsibility for assembling the page back to the server. Then some more clever people created technologies like Asynchronous JavaScript And XML (AJAX) for requesting data in real time and JavaScript Object Notation (JSON) for communicating data objects. So what might seem like a single “Please give me a page”/“OK, here’s the page you requested” exchange, is typically much more involved than that. Figure 1 illustrates a tiny portion of a typical exchange. First the browser requests a page via a URL. If the requested page is, for example, a



form, the server takes the data from the URL and stitches together a single HTML text page that the browser will render as a form. Now the user tries to populate the form. But if the form includes a pull-down list, for example, how does that pull-down get populated, especially if the contents depend on other form data? This is where AJAX comes in. If the user clicks the pull-down, the browser quickly sends the server an AJAX request for the data that should be in the list. Those AJAX requests may use URL-encoded data to send parameters back to the server. If the request involves some high-level data object, then the server may respond using JSON, where data is structured and can be easily queried. A number of AJAX requests may be required before the form is ready to be submitted. At some point, the user hits the “Submit” button, and the browser sends a new request to the server; the server responds with a new page. To the user, this looks like “go to a page and get a form; fill in the form; hit ‘Submit’.” But that apparent simplicity hides a complex conversation between the browser and server. Any small glitches or browser inconsistencies can throw the whole thing off.

Writing the Application

With that background in mind, your primary focus should be on your application, which is what directs which pages get sent when. When writing that application, your choices for language are typically two: C or web scripting languages.

You will likely need to write some portions of your application in C. Scripting environments intentionally restrict scripts from getting down to the hardware level. So you will need to write some C routines— similar to drivers—that will connect your hardware to your web application. For everything else, you can choose a scripting approach. So which is best, C or a scripting language? To figure that out, we can break the development work down into three categories. The first is managing the data, which is hopefully structured. The second is the parsing of requests, and the third is assembling responses. With C, structures can’t be entered into lightly: everything must be strictly typed, and memory must be explicitly reserved and released as needed. Parsing isn’t rocket science, but it’s tedious and extremely easy to get wrong, requiring incredible attention to every detail and making maintenance difficult. Assembling the page requires string concatenation on a grand scale. Just the simple act of joining two strings using C involves: • Determining the length of both strings • Reserving a spot of the appropriate size for the result • Combining the two strings • Sending the result off • Releasing the memory used for the result Much of this work has already been done for you, however, in the form of application servers and scripting environments. Because scripts are more free form and are compiled just-in-time, a single line of script can implement the entire string concatenation. The lower-level details are handled for you. Scripts also let you access and manipulate data without worrying about whether you’ve defined the right data type or organization. Figure 2 contrasts the impact of developing with C vs. scripting, referring specifically to the Lua scripting language, which we’ll discuss shortly. When you use C, you start by getting something basic up and running just to bring up the infrastructure. From then on, you’ve got this cycle of stopping the server, making changes (the most time-consuming portion), loading the new code, and starting the server again to see how things look. On the other hand, with a scripting language, not only

technology connected

is the coding time dramatically reduced, but you can simply swap in the new scripts without interrupting anything else. Meanwhile, you can use an application server to abstract the web server, giving you access to request and response objects and their associated APIs. This means your scripts really only deal with the high-level application behavior and data. The application server handles the parsing and page-building details. Bottom line: you can develop your web application in as little as 1/30th the time by using scripts and pre-built infrastructure instead of custom C wherever possible.

Infrastructure and Scripting Options

Older websites were originally implemented using the Common Gateway Interface (CGI). In truth, CGI is only an interface. It’s generally cumbersome to manage and requires a full-up OS like Linux that can load external programs, meaning that deep embedded monolithic systems cannot use CGI. Basic web servers typically specify only function hooks; you must write the functions. With CGI on standard web servers, Perl scripting is very common, but most embedded environments don’t support Perl, meaning you have to revert to C to get things done. All of this makes CGI an unattractive option. The most common modern alternative to CGI combines Linux as an OS, Apache as a web server, MySQL as a database, and PHP as a scripting environment—collectively called a LAMP setup. LAMP setups work well in full-up web server implementations. Unfortunately, they demand far more processing power—primarily CPU speed, but also around 65 Mbyte of memory—than is available in a small embedded device. The application becomes unacceptably slow. An example of this can be seen in one specific network-attached storage (NAS) device that provides a web interface. Even though the processor runs at 900 MHz, its PHP response is so bad that every page request is met by a rotating hourglass. In other words, because they couldn’t speed up the interface, they had to stuff an hourglass in there as a “please wait” indicator to keep the user from thinking that nothing is happening. For small implementations like this, you need a web server that has been de-

Lua Application 1

Lua Application 2

Application Bindings C or C++ Application

Luca Application 3

Lua Server Pages (LSP Bindings) Barracuda Web/ Application Server


Lua (Virtual Machine)

Low Level System Services RTOS, TCP / IP Stack, Optional File I/O

Figure 3 Applications written as Lua scripts interact with the application server and other blocks, including custom C routines. These save many months of development time and can run up to 20 times faster than LAMP.

signed to operate efficiently and quickly with modest processing power—as slowly as 60 MHz—and little memory (1 Mbyte or less of RAM and ROM). And, because many of these devices may be located far from the person trying to communicate with the device—like our meteorologist who, mercifully, isn’t in the Antarctic— the system must be easy to manage remotely. One way to simplify management is by compressing web pages together to reduce their footprint; updates to the system can then be made simply by swapping zip files. An example of such a server is the Barracuda Web/Application Server. For efficient scripting in an embedded environment, there’s a quiet, unassuming scripting language called Lua. You may not have heard of it, but, whether you’ve used Adobe’s Lightbox program, played World of Warcraft, or used any number of other programs, you’ve used Lua. It’s specifically designed to operate on small platforms, and yet handles things like garbage collection, callbacks and type coercion automatically and transparently. It’s specifically defined as an extensible language and is implemented as a library that gets compiled with your application. As a result, an application server can build on the language to add powerful capabilities. So the interplay between Lua and the application server you choose can also determine how powerful your environment will be. Running together, as shown in Figure 3, the Barracuda Web/Application Server and Lua deliver applications that run as much as 20 times faster than they would in a LAMP setup. The system services, application server, SSL stack and

Lua virtual machine allow you to focus on your application logic using high-level data structures in Lua scripts. You use C only for low-level access to your hardware, something the scripts are forbidden to do. In the end, what really matters is that your users experience your system in a way that meets the standards they’re already used to. Whether your users access your device by desktop or smartphone, what they see should look like a desktop or smartphone application. They won’t be forgiving just because you have a small device acting as a server. After all, today’s smartphones appear to be small devices. The typical user does not understand how much compute power lies beneath the covers. Even though you must give them the look they want, you can’t spend a lot of time building that look. The interface should look as advanced as your system technology, but you should be spending most of your development time on your system, not the interface. You can spend months—even years—trying to code a server in C. However, if you use a web server that’s designed for an embedded environment and then do your own customization using Lua scripts wherever possible, you can take that development time down from months to days. That gets you back to focusing on your own technical innovations. And it lets you present those innovations to your customers in the best possible way. Real Time Logic Monarch Beach, CA. (949) 388-1314. [].



technology in


Computers for Harsh Environments

Conduction Keeps Computing Cool Lower power CPUs and chipsets, strategic placement of components on boards along with conduction cooling from chip to chassis, combine to make systems that not only stay cool but also are rugged and resistant to outside contaminants. by Colin McCracken, American Portwell


eliable. Quiet. Affordable. Small. With protection from dust and humidity, and flexible mounting options. And easy on the electric bill. System designers expect everything from their box PC. With fewer engineers doing more loration jobs using slashed development budgets, it our goal is tempting to select a hobbyist-style box k directly PC that has a system fan and air vents. age, the source. Although such a computer may work well ology, on the lab bench and the price is certainly products right, the up-front convenience is traded too conveniently for longer-term reliability risks and potential harm to the system OEM’s reputation. The key issue in creating the ideal reliable box PC is a better system architecture based upon conducFigure 1 tion cooling. A solution is needed that can Portwell’s NANO-6040 SBC features the processor and chipset on the bottom nies providing solutions nowfrom the system processor transfer heat side (right image, toward the center). Mounting holes for the heat spreader can on into products, and companies. Whether your enclogoal is to research the latest andtechnologies chipset directly to the system be seen to the major components. tion Engineer, or jump to a company's technical page, the goal of Get Connected is to putadjacent you sure and dissipate it from there. you require for whatever type of technology, The first step ing fan built with ball bearings. Some the underlying reliability challenge reand products you are searching for. toward improving the reliability of small form factor (SFF) box SFF SBCs have support in the BIOS firm- mains. A better overall solution would inPCs is to eliminate the weakest links—ro- ware for “smart fans,” reading the system clude replacing the fan and vents with an tating parts. Many embedded single board temperature and reducing the fan speed alternative metal conduction path. computers (SBCs) already come with (RPM) during periods of lighter procesbootable onboard solid state disk (SSD) sor utilization and heat dissipation, but the Enter Conduction Cooling options such as Compact Flash, SD revi- fan noise remains. Although sleeve-based Large form factor SBCs in heavy sion 1.1, and other tiny options. For larger fans are quieter and offer reasonable mean enclosures have been able to successcapacity storage, SATA II SSDs are avail- time between failures (MTBF), most of fully remove processor and chipset heat able in 2.5” and 1.8” form factors. the noise still comes from air passing over for many years through thermal conducThe harder habit to kick is the rotat- the fan blades, which can’t be eliminated. tion to exterior metal surfaces, where the In addition, fans require system air vents, sheer amount of mass absorbs heat like a with the adverse effect of providing a path heatsink, and natural air convection in the Get Connected for dust and humidity to enter the box PC. environment removes that heat from the with companies mentioned in this article. Filters can reduce the effects of dust, but enclosure surface.

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Get Connected with companies mentioned in this article.

Tech In Systems

Figure 2 A screen capture of the thermal imaging confirms heat spreading across the board with modest temperature build-up at the processor and chipset.

Several years ago, small form factor box PCs began to emerge, with “fins” on their extruded top covers in order to handle the then-current 10-20W processor/ chipset platforms. The sharp ridges along the extrusions transfer heat to the external ambient air much more efficiently than flat enclosures. Due to the SBC convention of placing processors and chipsets on the top surfaces of the boards, “fan-less” box PC manufacturers resorted to either NREintensive custom heat pipes or tall copper “chimneys” to remove heat to the extruded lids. Adverse side effects include a longer path for heat to travel (greater temperature rise over the thermal resistance), and a broken airtight seal of the thermal interface material (pad or grease) whenever the top cover needs to be opened. If the lid is not reinstalled properly with additional thermal compound, the thermal resistance can increase due to gaps or air bubbles, unwittingly compromising the long-term reliability.

Re-Thinking SBC Chip Placement

The next improvement to the system architecture comes from placing the hot processor and chipset on the bottom of the SBC. Circuit board layouts are becoming more common with a plan for heat conduction to the metal enclosure, learning the important lesson from computeron-module (COM) standards. Figure 1 shows one such SBC, with top and bottom views flipped around a vertical imaginary line between the two photos. As shown,


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the processor and its chipset are located toward the center of the bottom surface (right side of the figure), and four mounting holes are provided in a nearly square pattern for a passive heat spreader plate to be installed. In turn, the plate will make good contact with the metal enclosure for further heat transfer. The result is a reliable fanless solution that, unlike COM products, does not require a custom carrier board in order to achieve conduction cooling. In the course of designing such an SBC, the processor and chipset are placed first during board layout. Depending on the thickness of the heat spreader plate, two Z-axis height keepouts are established on the bottom side—one for components that reside under the plate, and the other for the rest of the bottom surface to avoid components and connectors touching the bottom of the enclosure. In Figure 1, the SD card socket is just beyond the edge of the heat spreader plate, and the elevation at the top of the socket is well below the top of the plate so that the board can be mounted on top of standoffs in the corners of the enclosure with clearance between the socket and the enclosure itself. The tall I/O connectors, 4-pin DC power input connector, LVDS connector, two SATA II ports with power connectors, PCIe x1 expansion slot, and PCI Express MiniCard (a.k.a. “mini PCIe”) socket for Wi-Fi and Bluetooth combo modules, are shown on the left side of Figure 1. Being on the top surface of the SBC, they are easy to access during the initial system integration and in the field for upgrades without disturbing the thermal interface between the processor/chipset and the thermal conduction path to the enclosure.

Enter Ultra-Low-Power Atom Processors

The next system architecture breakthrough involves the use of the latest compact, low-power Atom family of embedded processors. Together with the “Topcliff” EG20 I/O hub (chipset), the “Tunnel Creek” Atom E6xx series processors deliver I/O flexibility including an onboard graphics controller, memory controller and expansion interfaces, all within a power envelope of 5-6W at 1.6 GHz. This

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meets or exceeds the performance of previous generation SBCs used in box PCs based upon VIA Eden, AMD Geode LX 800, and Intel Pentium M / Celeron M plus 852 / 855 and 910 / 915 chipsets. For an even higher level of reliability, the Tunnel Creek family also includes processors ending with a “T” to designate extended temperature operation, even up to the 1.6 GHz E680T processor. The T processors are rated from -40° to +85°C. Older generation SBCs could reach the maximum specification limit for operating temperature with even modest software workloads. The T processors add significant temperature margin when the processor occasionally reaches +60° or +70°C, for example. With less power to dissipate using the 5-6W Atom E-series platform, the enclosure can be implemented with less expensive folded sheet metal and flat plates; fins are not necessary. The amount of metal mass for heat absorption and re-radiation can be reduced as well. Lower weight and flat surfaces also increase the number of applications and mounting scenarios that can be achieved within the very diverse embedded systems market.

Thermal Imaging Confirms Reduced Build-up

Still within the SBC design stage, thermal imaging tools are used to confirm that enough copper has been used to implement the power and ground planes of the board to spread the heat across the board (Figure 2). In the figure, the red and white colors toward the middle of the board correspond to temperatures above 50°C. Of course, the very sources of the heat are the processor and chipset themselves, located there. As much as the fiberglass circuit board and the copper plane layers can permit, that heat is spread laterally (X- and Y-dimensions) toward the edges of the board, which keeps the ICs relatively cool by preventing too much build-up at the center of the board.

CompactPCI® Goes Serial

Figure 3 The WEBS-2350B box PC is designed to conduct heat across the bottom surface and then up the four sides

the hot area as well, downward toward the enclosure. As shown in Figure 3, the enclosure is designed to conduct the heat across the bottom surface where it rises naturally up the sides to dissipate into the surrounding air. This bottom-up approach also adds a measure of safety in that the top surface, the front power button and the rear I/O block are not hot to the touch. The use of flat surfaces rather than extrusions with fins improves the breadth of mounting options, from bench-top to DIN rail to shelf-mount to wall-mount to rack-mount (bracket-based or 2-up per shelf). A system architecture driven by conduction cooling can greatly enhance MTBF and reduce audible noise by eliminating system fans. Purpose-built box PCs use the latest Gigahertz-class Atom E-series technology to improve reliability, performance, power consumption and protection from dust and humidity due to the elimination of cooling air vents. System designers can now expect everything from their box PC and more, saving timeto-market and development resources now without having to worry about returns and field failures later.

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Transferring Heat from the Bottom Up

The heat spreader plate conducts heat vertically (in the Z-dimension) away from

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3.0 USB: 3.0 Taking Hold and Gearing for the Future


niversal serial bus (USB) technology is nothing new—first introduced in 1995, it has since become ubiquitous in a wide array of consumer products that now have a USB connection. The original rationale for USB was to provide a replacement for legacy ports on a computer and make adding peripheral devices quick for end users. Some of these peripherals include mice, printers, telephones, keyboards, modems, scanners, video cameras, storage devices, audio devices, and digital still-image cameras. The growth rate of USB has been remarkable. Market research firm IDC indicated in a report, ‘Worldwide Interfaces and Technologies Embedded in PCs 2010-2014 Forecast,’ that the 2011 USB installed base is 10+ billion units worldwide and growing at 3+ billion units annually. IDC said adoption is virtually 100 percent in PCs and peripheral devices. Over the years there have been a number of versions of USB specs released. Revision 1.0, rolled out on Jan. 15, 1996, showcased a low-speed transfer rate of 1.5 Mbit/s and a full speed transfer rate of 12 Mbit/s. Key feature of Revision 2.0, announced on April 27, 2000, was adding a high-speed transfer rate of 480 Mbit/s. More than eight years later—Nov. 17, 2008—Revision 3.0, was introduced, which brought a number of performance enhancements to the USB standard while simultaneously providing backward compatibility for peripherals still using Revision 2.0. The USB Implementers Forum (USBIF), a nonprofit organization established to provide an avenue for discussing ideas/



concepts to advance/adopt USB technology, refers to USB 3.0 as “SuperSpeed USB.” The organization has outlined a number of key USB 3.0 benefits/advantages, some of which include: • Up to 10x performance increase (5 Gbit/s) • Fast sync-n-go (minimizes user waittime) • Optimized power efficiency (uses onethird the power of USB 2.0, which equates to extended battery life) • Improved power delivery (delivers twice as much power to charge devices faster) • Backward compatibility with USB 2.0 The USB-IF has already certified more than 200 new USB 3.0 devices. Two examples include the first standardized USB 3.0 flash drive from Imation; and the ASUS O!Play HD2, the interface’s first USB media player. In fact, according to the USB-IF, a number of leading technology firms are expected to make significant USB 3.0 inroads by the end of 2011 and leading into Q1/2012. This is being accelerated by the narrowing price difference between 2.0 and 3.0 ICs. A few examples: • Renesas is on track to ship more than 72 million USB 3.0 host controllers by the end of 2011. • GIGABYTE estimates it will ship 7.5 million USB 3.0 motherboards by the end of 2011. • AMD recently announced the first certified USB 3.0 chipset.

• VIA Labs has recently certified 2-port and 4-port host controllers. Host controllers are usually added to motherboards and suppliers include Via Labs, Fresco Logic and Etron. • Device controller ICs are also experiencing sharp competition among vendors including Genesys Logic, Fujits and in the U.S., Symwave and Texas Instruments. As USB 3.0 deployment continues, vendors continue to unveil various products to help verify the accuracy of USB 3.0 designs. Last year, for instance, Synopsis debuted its DesignWare USB 3.0 Protocol Analyzer, a graphical debugger that helps engineers verify USB 3.0 and 2.0 interfaces in their systems-on-chip (SoCs) by providing a graphical view of protocol traffic. This helps users identify design traffic patterns and they can then switch to a detailed view of packet information. Another company, Total Phase, which provides various embedded systems tools, has been marketing its Beagle USB 5000 SuperSpeed Protocol Analyzer, a realtime USB 3.0 bus monitor. The analyzer captures/displays USB 3.0 data in realtime and supports Windows, Linux and Mac OS X. So will USB 3.0 continue to grow in popularity? Yes, but there may be a possible speed bump. Intel’s Thunderbolt, introduced last February, is a high-speed interconnect technology developed by Intel and Apple that transfers data between computers and externals devices at up to 10 gigabits/second.

PC makers Acer and Asustek Computer plan on delivering Windows PCs in 2012 with Intel’s Thunderbolt interconnect —so widespread adoption could grow. Rob Enderle, who heads up market research firm The Enderle Group, added that Thunderbolt and USB 3.0 fall into two classes. “Thunderbolt is a super port that can connect to a hub and also passes through an HD display interface,” said Enderle. “In an ultra-thin product like a Macbook Air or Ultrabook (from Dell), it should be preferred because the port real estate is so limited. Right now there aren’t that many Thunderbolt accessories and only Apple has adopted it widely. USB 3.0 is best for storage or video capture and can be connected through a Thunderbolt hub. Thunderbolt likely will be a huge differentiator for thin notebooks but doesn’t really do much for desktop computers yet because they typically don’t need hubs. “ USB 3.0 may also change the security space. Ed Moyle, principal analyst with Security Curve, said the increase in transfer speed is likely to make folks want to update existing USB storage. “Given the new/better options for data encryption, that change could be a good opportunity for organizations looking to add that functionality—if they’re provisioning USB storage, they might now choose to select a product that has onboard encryption capability at the same time,” said Moyle. Tom Starnes, senior analyst for Objective Analysis, added that the USB design itself is cumbersome—what he calls “awkward compatibility.” “The shoulders on some USB plugs and devices prevent insertion in some devices and if you try to stack them or put them in too tight a space, then they don’t fit—kind of the reverse problem of the HDMI connector,” said Starnes. Lastly, Mike Feibus, principal analyst for TechKnowledge Strategies, added that although USB 3.0 doesn’t offer as much

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Figure 1 In USB Power Delivery, source capabilities are organized as profiles. At startup, a negotiation process identifies the proper profile and checks to see that the proper cable is in place.

bandwidth as Intel’s Thunderbolt, it will help PC makers trim the number of ports they supply in notebooks—an important development as the industry continues to develop thinner, sleeker models. Despite some caveats then, look for continued USB 3.0 market adoption. Market research firm In-Stat estimates 77 million USB 3.0 products will be sold this year; 436 million by the end of 2012. “These new solutions will help contribute to the overall expansion of the SuperSpeed USB ecosystem,” said In-Stat Research Director Brian O’Rourke.

A Unified Approach to Power

There are a number of issues related to delivering power over a USB connection. USB 1 and USB 2.0 do have a limited power delivery ability to deliver 5V at ±5% over a single wire in the cable. When connected to a computer, for example, the current available is limited to what is

known as a “unit load,” which for USB 2.0 is 100 mA and for USB 3.0 150 mA. More than one unit load may be available, up to 500 mA if that amount of current is available on the bus. In the case of USB hubs, there are two types: bus-powered and self-powered (i.e., with a separate plug-in adapter). A bus-powered hub supplies only one unit load to a device, although multiple devices on that hub can draw one unit load each, depending on the power supplied over that bus. A self-powered hub obviously has more current capacity and can supply the needed unit loads to the devices connected to it. For example, a high-power device like a disk drive would require more power than could be supplied over the bus alone. It could use a second USB cable to get the power it needs, but a more practical solution would be to connect it to a self-powered hub. With an ever-increasing number of

USB 3.0 mobile and handheld devices, such as smartphones and tablets, there is increasing attention on battery charging. There is a move to not only support charging battery-powered devices but also to run devices requiring higher power in a seamless and unified environment. To this end, the USB-IF has been supporting the development of charging standards with the recent adoption of the USB battery charging 1.2 specification. This will enable up to 7.5W (1.5A @ 5V) and provides a standard target for the design of chargers for mobile devices. The mobile phone industry has also taken an initiative by moving to support the use of a micro-USB port as a common connector for charging phones. While that in itself is only a step toward a universal charging scheme because it does not

specify all needed aspects such as input power, etc., it has led to a large consortium—the GSM Association—to agree on a standard charger for mobile phones. Subsequently, the European Commission came to an agreement with manufacturers for an external power supply for charging phones sold in the EU. This, in conjunction with the battery charging 1.2 specification, means that future chargers will be “one fits all” and users will be able to use the same charger, which will carry the USB symbol, for any new phones, greatly reducing the number of chargers that will need to be manufactured, greatly reducing electronic waste. All this brings us to a new initiative that is building on the idea of standard battery charging and extending it to actual power delivery for devices of up to

100W. USB Power Delivery is a specification that is still under development and is expected to be finalized by the second quarter of 2012. Still, a number of its goals have been made public. The new Power Delivery specification will co-exist with USB 1.0, 2.0 and 3.0 as well as the battery charging specification, but will in addition have the ability to deliver power to supported devices up to about 100W. USB Power Delivery will have four different power delivery profiles (Figure 1). The default profile will be useable with existing cables up to 7.5W, which is also the level of the charging specification. For the other three profiles, there will need to be cables capable of carrying the increased power. The connectors will be given ID pins and pads that will tell the system the proper cable is installed. The

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negotiation process will start at 5V over the Vbus as usual. If ID pins are detected, then voltage/current adjustments will be made to match the host with the consumer device. Negotiation takes place over the Vbus as well without involving any data line usage. Thus higher power usage will be limited to known cables to eliminate the chance of accidents. Power Delivery enables one device, such as a display that is actually plugged into an AC outlet, to act at the power source and hub to hosts and other devices connected to it (Figure 2). A different device, such as a phone or a laptop, can then act as the USB host. In addition, the source of the power delivery can be switched without changing the cable direction.

Looking Forward

Although USB 3.0 is currently aligned on 5 Gbit/s as the best option for cost and performance, the transaction and line protocols have been developed and analyzed for a minimum bandwidth of 25 Gbit/s. This leaves a path open for

Power Delivery USB Data

Power Delivery USB Data

Figure 2 In this example, the display is in the role of the power hub while the phone is the USB host. Different configurations are possible independent of which device is the power source.

future speed and bandwidth extensions. However, such advancements—like most design decisions—will be considered against the need of applications for more bandwidth balanced against complexity, power requirements and cost. In the light of the proliferation of mobile and handheld devices, there are also activities underway to investigate enhancing power efficiency and extending

battery life. In addition, enhanced protocol capabilities are being considered for things like security and the reduction of transfer latency in order to anticipate the possible needs of future applications. USB 3.0 is called SuperSpeed today, but that may have to be revised in the future. It has proven itself to be a dynamic and extensible interface and we have not yet seen all its possible uses and capabilities.


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Computers for Harsh Environments

Ruggedizing Commercial Products to Withstand the Most Demanding Environments Meeting the challenges for ruggedizing systems designed for the commercial market can enable them to bring the latest technology advances into the harshest environments where they can operate reliably. by Jared Francom and David Kummer, Parvus


ugged box-level systems are a vital component for a variety of demanding conditions on land, sea and air. However, how these rugged systems are created can be as different as the applications in which they are deployed. One such distinction among these systems is “rugged” versus “ruggedized.” The term “rugged” refers to systems that were created from the ground up to meet the requirements of specific harsh environments. Conversely, the term “ruggedized” refers to a commercial product that was not originally intended for harsh-use application, but was enhanced to endure airborne, ground vehicle and/or shipboard deployments. While both “rugged” and “ruggedized” systems have their unique offerings, ruggedized systems are growing in demand as this solution provides a costeffective method for implementing the latest computing technology that meets stringent environmental standards. Additionally, ruggedized systems benefit from the advances made by OEMs and can mean a faster time-to-deployment than their rugged counterparts. Commercial networking products, such as those offered by Cisco, have proven to be an attractive platform for ruggedized products. Additionally, Cisco is credited



with helping to define many of today’s networking standards and protocols, actively contributing to the standards committees within the Internet Task Force, IEEE, and other groups. As a consequence, with the widespread adoption of Cisco products across many industries, combined with its comprehensive feature set, Cisco-based rugged computing solutions are increasingly being deployed in a variety of applications on board land and air vehicles (Figure 1). Two case studies examine how Parvus engineers ruggedized two Cisco networking products: the IE-3000 and the 4948E.

Cisco Switches: Candidates for Ruggedization

One of Cisco’s latest Ethernet switches, the IE-3000, recently proved to be a suitable ruggedization candidate for use in harsh environments. This switch was designed for industrial Ethernet applications, including factory automation, energy and process control and intelligent transportation systems (ITSs). Its intended commercial use already exceeded traditional commercial environment, since the IE-3000 included extended temperature and enhanced shock, vibration and surge ratings not typically offered by commercial networking gear. Later named the

DuraNET 3000, the ruggedized IE-3000 delivers the security, advanced Quality of Service (QoS) and manageability that customers expect from Cisco IOS-based switching technology, but it is designed with mechanical enhancements to support deployment of data, video and voice services in extreme environments (Figure 2). Although the IE-3000 is considerably more rugged than the norm for a commercial product, many military customers require specific electromagnetic interference (EMI) compliance standards—specifically MIL-STD-461—for radiated and conducted emissions as well as radiated and conducted susceptibility. Meeting this rugged EMI standard requires protection against input voltage inversion, voltage surges and over-voltage spikes in accordance with MIL-STD-704 and 1275. This was accomplished through the implementation of a reverse voltage/ overvoltage protection circuit. Engineers also implemented several improvements, such as designing a sealed enclosure with good EMI gaskets and creating proper test cables. Moreover, proper grounding techniques and good bonding between chassis surfaces were critical in creating an enclosure that acts as a Faraday cage. Since external power leads are typically unshielded

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Figure 2 The DuraNET 3000 from Parvus is a ruggedized version of Cisco Systems’ IE-3000 industrial Ethernet switch, specifically hardened for use in demanding networking technology refresh applications.

Figure 1 Rugged conditions encountered by military vehicles such as this Humvee require ruggedized computing systems specifically engineered to withstand harsh conditions.

in test and application, they can be the single largest point of noise and susceptibility. By including a well-designed filter at the point where power enters the system, the ruggedized IE-3000 complies with EMI requirements as the filter prevents internal noise from exiting the system and protects sensitive electronics from external noise that otherwise might enter the system. Like many commercial products, the IE-3000 includes RJ-45 network connectors. Although adequate for its original purposes, these RJ-45 connectors are notoriously prone to failure under extreme vibration and do not provide ingress protection against dust and water. Parvus engineers removed and replaced them with locking headers that ultimately terminated with circular MIL-DTL-38999 style connectors that not only protect against dust, water, vibration and shock, but also bring ports to the outside world. Although a cableless design is optimal for rugged conditions, when ruggedizing an existing commercial product that includes cables, not all cable may be elimi-

nated, so additional steps need to be taken to ensure stability. Since the IE-3000 contains some cabling, engineers leveraged rigid flex circuits and board-to-board interfaces where possible and implemented cable braiding, tie-downs and other strain relief features to maximize reliability and prevent the cables from disconnecting or being severed in vibration or shock. Heat issues are often credited as the largest contributor to system failures, so ruggedizing systems to meet these thermal challenges is a critical step. Thermal management for defense applications has always been a challenge due to the high operating temperatures of the latest processors and dense packaging needed for environmental ruggedness. Cisco’s standard IE-3000 switch relies on internal heat sinks and a vented case with passive air flow through the case to cool the unit. However, relying on convection cooling only inside a completely sealed box would have severe limits, so for the DuraNET 3000, the incorporations of conduction-cooling techniques

enabled the maximization of heat transfer, while allowing the unit to remain fanless and passively cooled. To reduce weight and to speed the DuraNET 3000’s heat transfer rate, engineers removed all of Cisco’s standard finned heat sinks and replaced them with heat spreaders, a conduction-cooling mechanism. The inclusion of heat spreaders, a thin sheet of metal incorporated on top of a device to help dissipate heat, significantly reduced thermal issues inside the IE-3000. These heat spreaders route heat through an internal rail/truss system that supports all of the circuit card assemblies against shock and vibration while dissipating the heat to the aluminum enclosure that incorporates finning on the outside to maximize surface area for cooling. As the example of the IE-3000 demonstrates, ruggedizing a commercial product involves a number of intricate engineering procedures. However, the degree of ruggedization depends on the application for which the system is intended. Since the DuraNET 3000 will be deployed in the harshest of military environments, including tracked vehicles, navy ships and aircrafts, the specific ruggedization techniques implemented will allow the system to endure these environments. RTC MAGAZINE DECEMBER 2011


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Figure 3 The DuraNET 4948 from Parvus is a ruggedized version of Cisco Systems’ high performance Catalyst 4948E data center switch.

Similarly, a number of ruggedized systems designed for compute-intensive applications are gaining popularity. To accommodate the high port density and power requirements of these systems, ruggedization techniques such as cableless and fanless designs aren’t possible. However, as demonstrated by the following case study, ruggedization techniques can still be implemented that won’t compromise the system’s high-performance capabilities.

High Performance Meets Ruggedization

Cisco Systems’ high-performance Catalyst 4948E data center switch is a desirable device for many applications because of its 48 Gigabit Ethernet downlinks, plus three 10 Gigabit Ethernet uplinks (2 copper/1 fiber) and a Gigabit Fiber uplink. To make this switch accessible to demanding networking environments, Parvus engineers deployed a series of mechanical enhancements that support the deployment of data and multimedia services in wider thermal, shock, vibration, altitude and humidity conditions than offered by the standard commercial Cisco version. Dubbed the DuraNET 4948, this powerful, multilayer switch enables demanding military and civil IP networking technology refresh programs to leverage the best that Cisco switching technology has to offer, but in a ruggedized 19-inch rackmount solution suitable for rugged applications (Figure 3). As the intended use for this Cisco switch is in data center environments, its original operating temperature was 0° to 40°C. For this system to be deployed in rugged environments and meet Military Standard 810G (the de facto standard for

rugged military electronics), the operational temperature range needed to be extended to -40° to 54°C with the ability to power up when the temperature changes rapidly from 71° to 54°C without time for stabilization at 54°C. With many ruggedized systems, ensuring a wide operating temperature is a top priority. This proved to be the central engineering challenge when ruggedizing the 4948E because powering the system in cold temperatures instantly created two temperature problems. First, none of the components are rated to power on below 0°C. Second, once the system is operational, some components are self-heating and dissipate a substantial amount of heat (more than 275 watts unit wide), while other components can remain well below their minimum operating temperatures. Cold components need to be warmed at the same time that hot components need to stay cool. To solve this problem, engineers implemented two types of internal heaters to pre-heat the system and protect specific components from damage. The first type of heater provided broad heating across the Catalyst 4948E circuit board. The second type of heater was specifically targeted to the compact flash memory, as this critical component wouldn’t operate, or suffered permanent damage, at the lower temperatures. Due to its limited internal self-heating, the compact flash memory— unlike other components—wasn’t staying warm enough to operate properly, necessitating its own dedicated heater. Conversely, at the high end of the temperature range, additional techniques needed to be implemented to remove the heat from the system. Since the 4948E requires more than 275 watts, heat dissipation was a critical concern as well. The engineers found the best option for removing heat was to keep Cisco’s original design of using fans to force air out of the system. However, since moving parts are not ideal in rugged systems, additional ruggedization procedures were implemented to mitigate any risks involved in using fans.

Ruggedization Techniques Ensure Reliability

The first step in ruggedizing the fans was upgrading the fans themselves. A fan

tech in systems

with a slower RPM yet with a higher air volume was selected. This fan would last longer and thus was selected for the extended temperature range. Secondly, the engineers ruggedized each component of the fan itself by potting the windings and conformal coating the fan PC board. Conformal coating is a process where a coating material is applied to electronic circuitry to protect it from moisture, dust, fungus, corrosive chemicals and temperature extremes. Conformal coating also proved to be an integral ruggedization technique for the DuraNET 4948. To address the potential hazard of blowing corrosive and conductive salt fog from ocean environments directly over the system’s sensitive electronic components, engineers were diligent in conformal coating all circuit boards and using other corrosion-resistant coatings for all the metal in the system. Plus, to ensure against any possible corrosion, engineers sealed critical electronic components with room temperature vulcanization (RTV) silicone rubber and applied bulb grease to all connector contacts. The 4948E was redesigned to operate in an extended temperature range, but the existing firmware wasn’t capable of controlling the device given the new thermal envelope. To counteract this problem, Parvus engineers created new firmware for the DuraNET 4948 that controls the fans and the heaters across the extended temperature range, while using Cisco controls for the original operating range of 0° to 40°C. For many rugged and ruggedized designs, redundancy is a critical element as it significantly increases the MTBF. When ruggedizing the 4948E, the engineers included two power supplies that were redesigned to meet aircraft-grade military standards, and provide for EMI filtering. These supplies were designed to share current, reducing the operational duty cycle to less than 50% per supply, and thereby extending the operational life of the supplies. In addition, each supply was designed to handle the full load of the switch with more than 20% margin. This extends the operational life of the system and keeps the system running if a power supply should fail. As illustrated by the creation of the

DuraNET 3000 and the DuraNET 4948, the process of ruggedizing a commercial product for harsh application use is no small feat. However, ruggedized products have the benefit of capitalizing on the technological advancements made by the world’s leading network manufacturers. When combined with proven ruggedization techniques and innovative engineering efforts, ruggedized systems offer a robust, cost-effective computing choice

Untitled-12 1

engineered to meet the world’s most demanding environments. Parvus Salt Lake City, UT. (801) 483-1533. []. Cisco Systems San Jose, CA. (408) 894-9117. [].


12/5/11 10:32:57 AM RTC MAGAZINE DECEMBER 2011

technology deployed System Software

Simplify Development with Cost-Effective Bootloading Using I2C/ SMBus Interfaces

tion bridge connected to a PC. Let’s examine general bootloader design considerations, as well as I 2C/ SMBus-specific implementation techniques for embedded MCU applications. First, we will cover some basic information of the I 2C protocol, including hardware and firmware considerations. The I 2C protocol requires two signals—serial data (SDA) and serial clock (SCL)—for communication with other integrated circuits in a system. Both bidirectional lines require a pull-up resistor, typically in the 1k-ohm to 4.7k-ohm range and are configured in open-drain mode. In this configuration, the device driving the line can pull the line low or release the line (which will result in the The ability to update firmware is an increasingly important exploration external resistor pulling the signal high). r your goal function for maintaining embedded systems. The I2C/ I 2C devices are “hot-swappable,” which eak directly means that devices can be added and repage, the SMBus can provide a cost-effective and efficient vehicle moved freely from the bus. This can be resource. for bootloading firmware updates. hnology, particularly useful if the I 2C bus is being nd products shared between the bootloader and other integrated circuits within a system. For example, if two devices in an embedded system are communicating on the I 2C bus, an external bootloading device can by Evan Schulz, Silicon Labs be attached to the bus to communicate with the MCU at the same time. panies providing solutions now One drawback to implementing a ation into products, technologies and companies. Whether your goal is to research the latest shared bus is that traffic on the bus (Figure cation Engineer, or jump to a company's technicalcapabilities page, the goal of to Getembedded Connected isapplicato put you dding bootloading 1) can increase the amount of time necessary to bootload a ce you require for whatever type of technology, tions provides the framework to update firmware rundevice. Additional items that can affect the time required to es and products you are searching for. ning on a microcontroller (MCU) at any time. This bootload a device include the duration of a flash page erase, capability is beneficial if the final firmware image contains flash byte program and communication protocol speed. The a bug, if the firmware image needs to be programmed into flash page erase and byte program time are set parameters an MCU after the final product is assembled, or if an ap- that cannot be changed. The clock frequency of the bootplication’s firmware needs to be updated in the field. Any loader’s communication protocol should be considered, as communication protocol can be used for bootloading as long it will directly affect the amount of time required to send as the MCU has a means of communicating using the chosen a new firmware image to the target MCU. The majority of protocol and enough free code space to store the bootloader I 2C devices support up to 400 KHz clock frequencies (fastfirmware. mode), although some devices support up to 2 MHz clock The Inter-Integrated Circuit (I 2C) or System Manage- frequencies (high-speed mode). ment Bus (SMBus) protocols that are commonly used by Another benefit of the I 2C protocol is that devices with MCUs, require only two wires for communication, and can different I/O voltages can communicate with each other, proGet Connected be implemented in a small amount of firmware, making these vided that all of the pins on the I 2C bus are tolerant of the with companies mentioned in this article. ideal candidates to use in a bootloader. Updated voltage the bus is being pulled up to. This enables a wide bootloader-ready firmware images can be sent to the target variety of devices to communicate on the same bus. Each device by a separate MCU or a fixed-function communica- device on the bus is preconfigured with a unique slave address that supports communication with “master” devices. The master device initiates all data transfers on the bus, and Get Connected with companies mentioned in this article. multiple masters can exist on the same bus. The protocol


End of Article



Technology deployed

4.7 kohm



4.7 kohm


Target MCU

Proximity Sensor




Bootloader Traffic

Proximity Sensor Traffic

Figure 1 Example of bootloader traffic domains allowing various devices to communicate at the same time using the same two I2C lines.

employs an arbitration scheme that provides a deterministic way to resolve two or more masters transmitting at the same time, as well as a method of flow control to allow devices with slower system clock frequencies to communicate with devices operating at faster system clock frequencies. The ability to use only two pins on a device and two passive external components make the I 2C bus inexpensive from a hardware perspective. From a firmware perspective, adding I 2C bootloading capabilities to an MCU will increase the overall application’s code size. Firmware tasks that need to be completed include: • • • • • • •

Flash erase routines Flash write routines Polled-mode communication interface implementation Interrupt vector redirection Bootloading communication protocol Bootload enable pin CRC calculation to verify the update code image

A flash erase routine is necessary to erase the application’s code during the bootload process and a write routine is necessary to write bytes that are received by the target MCU during the bootload process. To reduce the chance of any sort of flash corruption in the bootloader application space,

both routines should have boundary checks to ensure that locations of flash outside the application space are not erased or written. This is very important to the system because the communication interface implementation will reside in the protected bootload area of code. Firmware on the device manages the protection of the bootload area of code by preventing erases or writes in that area of code space. Although an interrupt-driven I 2C communication interface is a valid option, a polled-mode I 2C communication interface is sufficient for the system and is much simpler. If the bootloader code resides in the lowest page(s) of flash memory, the interrupts need to be redirected to the application firmware space. Compilers for 8051-compatible MCUs will generate assembly code that places interrupt vectors starting at address 0x0003, but can be configured to instead locate LJMP instructions in place of the interrupt vector table starting at location 0x0003. This enables the interrupt vectors in the application firmware space to be updated when the MCU firmware is bootloaded. A bootloader communication protocol is needed to define the structure of bytes sent between the target MCU and the bootloader device. For example, the protocol should specify a write command that the bootloader device can send to the target MCU to initiate a firmware update. Figure 2 shows an example of a packet of bytes sent to a target MCU from a bootloader device. RTCRTC MAGAZINE MAGAZINE DECEMBER MONTH 2011


technology deployed

Target MCU Slave Address

Bootload Write Command

Starting Code Address (multiple bytes)

Flash Keys

Data Byte 0


Data Byte n


Figure 2 Packet of bytes sent to target MCU from a bootloader device.

The first byte transmitted on the bus is the I 2C address of the target MCU. After the target MCU acknowledges its own I 2C address, a bootload write command is transmitted to inform the target MCU what data to expect from the bootloader device. Next, the starting location to write the updated code is sent on the bus, followed by the flash keys (if required by the MCU) and the updated code image. The target MCU will need a buffer in data or external data (xdata) space to store incoming bytes. As the target MCU receives a byte on the I 2C bus, the target MCU will send an acknowledgement on the bus, which allows the bootloader device to send another byte. This sequence will continue as long as there is room in the target MCU’s buffer. Finally, a cyclic redundancy check (CRC) is sent to validate the updated firmware image. After the target MCU’s buffer is full and the data in the target MCU’s buffer is validated using the CRC, the target MCU can begin writing the buffer to flash, and the bootloader MCU should stop sending data. In Figure 2, the flash keys are sent by the bootloader device to the target MCU. Although this method requires additional communication overhead, it is safer than having the flash keys hard-coded in firmware running on the target MCU. If flash keys are hard-coded on the target MCU, the danger from a flash corruption on the target MCU increases. After the flash write completes on the target MCU, the target MCU should send a predefined packet back to the bootloader MCU to indicate that more bytes can be sent. The bootloader communication protocol and I 2C firmware also will need to handle I 2C error conditions such as arbitration, lost errors or negative-acknowledgments (NAKs). If SCL low timeouts are enabled (which is an SMBus-specific timeout condition), it will need to be handled by the protocol and firmware as well. The bootloader communication protocol and firmware will handle any sort of communication error, but will not handle manually entering bootload mode or invalid firmware images. A bootload pin should be created to provide a fail-safe method of entering bootload mode. This can be implemented with a general-purpose input/output (GPIO) pin. For example, when the target MCU is reset, the first condition that



should be checked is the state of the bootload enable pin. Depending on that state of the pin, the firmware will enter bootload mode or application mode. This provides a fail-safe way to enter bootload mode and can be used to recover from firmware errors. A CRC or signature check also should be done after reset to validate the entire application image before running the application firmware in case of any sort of corruption. Before entering application mode, it is important to verify that the application image is valid. If the application image is not valid, the firmware running on the device could be harmful to the system. The image can be verified by running a CRC on the application space or by checking a signature byte located at a specific location in code space. It is recommended to use both methods to reduce the risk of any invalid firmware being executed. The last aspect of the bootload process is determining how to send the updated firmware to the target MCU. If an I 2C bootloader is selected, a general-purpose MCU or a fixed-function communication bridge can be used as the bootloader device. With the general-purpose MCU, firmware will need to be developed to handle communicating with the target MCU. In addition, the developer will need a way to pass the updated firmware from a computer to the MCU, which will require more code development. This option provides the most flexibility, but also requires the most development time. A fixed-function communication bridge can be used in place of an MCU and will not require any firmware development. For example, if a host interface device (HID)-to-I 2C or HID-to-SMBus communication bridge is used, firmware development and driver installation would not be required. A host-side HID application would be necessary to communicate with the bridge to send updated firmware to the target MCU. Figure 3 shows an example of a system using a fixed-function communication bridge. In any embedded system, having the ability to update firmware on an MCU provides flexibility to the developer. If an application image contains a bug, if the firmware needs to be programmed into an MCU after the final product is assembled, or if an application’s firmware needs to be updated in the field, a bootloader will provide a convenient develop-

Technology deployed


Target MCU

CP2112 Bridge

HID USB Connection


SCL Figure 3 Example of a bootloader-ready system using a fixed-function communication bridge.

ment tool. I2C or SMBus bootloaders are excellent, cost-effective options for developers. The I2C and SMBus protocols require two signals and two passive external components (resistors) and can be implemented in a small amount of firmware. Updated bootloader-ready firmware images can be sent to the target device by a separate MCU or a fixed-function communication bridge connected to a computer. I2C and SMBus communication interfaces are economical, ubiquitous peripherals that are commonly used on MCUs, making them ideal candidates for use as a bootloader communication interface.

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8/29/11 1:20:31 PM





The Migration Path to MicroTCA MicroTCA looks to VME, CompactPCI and AdvancedTCA for potential converts to the emerging standard.

by Mark Lowdermilk, Embedded Planet


icroTCA packs a lot of punch in a small form factor that is supploration ported by the powerful procesyour goal sor boards available coupled with mulk directly tiple high-speed fabric options including age, the source. XAUI, sRIO, GbE and PCIe. The priology, mary selling points for MicroTCA are d products impressive: an affordable next-generation computing architecture, high communications bandwidth, the latest multicore processors, support for redundancy and high availabilityâ&#x20AC;&#x201D;all in a small system footprint that is extremely scalable. But as with any emerging standard, adoption by nies providing solutions now is the ultimate measure its target markets ion into products, technologies and companies. Whether your goal is to research the latest of an architectureâ&#x20AC;&#x2122;s success. ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you In the case of MicroTCA, sevyou require for whatever type of technology, and productseral you aremarkets searching for.stand squarely in its crosshairs: the telecom market with a focus on network and wireless communications equipment; test and measurement, including communications test and high-speed manufacFigure 1 turing inspection equipment; and the increasingly communication-centric EP4080A Freescale 8core processor in and Advanced Mezzanine Card form Mil/Aerospace market. Additional pofactor. tential markets include medical imaging, industrial controls and the physics research community. MicroTCA rable to easily allow tailored solutions addresses the trend toward open stan- across many applications and markets Get Connected dards, takes advantage of multicore (Figure 1). with companies mentioned in this article. processor capabilities, and is configuWithin these markets, MicroTCA

End of Article



Get Connected with companies mentioned in this article.


is hoping to attract interest from CompactPCI, VME and VPX users looking for a next generation architecture that can deliver the increased performance of double the transfer rates, scalability and longevity these architectures lack, as well as from AdvancedTCA adherents that are looking for a less expensive—yet still robust—feature set in a much smaller footprint. There are trade-offs in terms of capacity, size and cost to consider. In addition, MicroTCA has the hot-swappable feature these other systems lack. OEMs who move to MicroTCA are going to do so because it is a next generation architecture that delivers increased performance in a very small package. Although MicroTCA was introduced by the PCI Industrial Computer Manufacturers Group (PICMG) in 2006, there are already over 50 companies worldwide offering Advanced Mezzanine Card (AMC) modules for the standard. This can be attributed to the fact that MicroTCA utilizes the same AMC cards as another PICMG effort—AdvancedTCA—which started in 2002. MicroTCA is gaining traction quickly because it is an offshoot of AdvancedTCA. There is an overlap of the ecosystems in that regard, and as a result, both architectures benefit. As a market, telecommunications demands the maximum bandwidth and transfer rates possible. Other markets such as industrial controls do not require the capacity of a full-blown ATCA system, but can still benefit for the economies of scale and functionality of Advanced Mezzanine Cards (Figure 2).

The Move from AdvancedTCA

Perhaps the most logical migration path to MicroTCA lies with AdvancedTCA users looking for a lower cost solution and a smaller footprint. The original intent of AdvancedTCA

Figure 2 SFP module in an Advanced Mezzanine Card form factor.

was to meet the requirements of the next generation of “carrier grade” wired and wireless networking and telecommunications equipment such as media gateways, video transcoders and IPTV. As a result, AdvancedTCA was created to deliver massive processing and bandwidth with high availability and built-in redundancy. For many applications, AdvancedTCA may be overkill and the final solution is usually quite large. For those that prefer AdvancedTCA’s features but don’t want to invest in unnecessary functions, and are looking for a smaller footprint, MicroTCA is a natural choice. For example, a physics application demands more computational capacity as opposed to a wireless base station application needing a feature set of redundancy and a high throughput rate. With communication bandwidth capabilities in the range of 40 Gbit/s to over 1 Tbit/s, MicroTCA has more than enough bandwidth for most demanding applications.

Starting with a very small twoblade chassis and scaling up to a maximum twelve-blade solution, 2U MicroTCA Processor blades (PrAMCs) can be networked together to deliver a tremendous amount of computing resources, particularly when each could be designed with the latest multicore processors to further increase computing power. Additional system components include power modules, cooling units and AMCs for everything from mass storage to high-end graphic cards (Figure 3). Appropriate product applications for the MicroTCA architecture include wireless base stations, Wi-Fi/WiMAX radios, optical networks and media servers, to name a few. MicroTCA also delivers the high reliability inherent in AdvancedTCA with availability up to five nines (0.999999). As with AdvancedTCA, redundancy and cooling configurations can be scaled for full, partial or no redundancy depending on the application’s requirements. RTCRTC MAGAZINE MAGAZINE DECEMBER MONTH 2011



Figure 3 1U chassis with power supply, MCH and three AMC processor cards.

Making the Move to MicroTCA

Although VME and CompactPCI are still viable for many applications, these architectures are struggling to meet the demanding bandwidth requirements of today’s increasingly communication-centric industrial and military applications. As a result, many VME and CompactPCI users, including the more recent CompactPCi Serial users, are looking for that next generation platform that can deliver on both counts. MicroTCA has the added benefit of further decreasing the size of the final solution, with its 2U cards being smaller than VME and CompactPCI’s 3U and 6U offerings. There are a lot of people who have been using VME and CompactPCI for a long time, pushing it along, keeping it going, and now they face a decision of going to a new architecture, and MicroTCA would be a good option because of its size and increased performance. Price considerations in rolling out a new technology take into account how much more throughput and flexibility there is with MicroTCA. To facilitate the move to MicroTCA, companies such as Embedded Planet are going one step further to offer integrated solutions to help reduce the complexity, improve time-to-market, and reduce risk to OEM partners by delivering an application-specific



solution that meets the customer’s exact needs. Such “application ready” solutions drastically reduce integration time and costs and eliminate the need for customers to work with multiple vendors and integrate the components into a complete system themselves. MicroTCA compared to AdvancedTCA comes down to being cost-efficient in achieving a system performance requirement. Customers may be used to dealing with multiple vendors, particularly with VME, Compact PCI and AdvancedTCA. But in this economy with few resources, less time, and the need to get to market quickly, OEMs are searching for technology experts to help them reduce costs and improve time-to-market. In December 2010, Embedded Planet moved from simply producing off-the-shelf PrAMC boards for AdvancedTCA and MicroTCA to delivering complete solutions ready to run out of the box for embedded applications. The modular embedded computing marketplace, including MicroTCA, can be difficult to navigate, and our goal is to simplify that for the customer. Embedded Planet is partnering with other leading companies in the MicroTCA ecosystem space, including Concurrent Technologies, N.A.T. for Network I/O modules and carrier hubs, and MicroBlade for chassis, backplanes and

power modules. With an integrated solution, the customer can focus on higher levels of activity that bring them more value. This provides savings in terms of direct cost, savings in indirect costs and a reduction in risk factors. Embedded Planet Cleveland, OH. (216) 245-4180. [].














The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

December 2010

January 2011



Embedded Embedded Windows: The Windows Next Generation THE NEXT GENERATION

Enabling The Internet of Things

COMs vs. SBCs: Which to Use When

Software Saves Power in High-End Networks

Identify and Save Power in A/D Conversion

Sort Out the Best Choice for Motor Control

PCI Express Moves Out over Cable An RTC Group Publication


Spare the Juice-- SWaP is a hot topic..................................... 5

Industry Insider

Latest Developments in the Embedded Marketplace................ 8

Small Form Factor Forum

No Mulligan for Embedded Standards.................................... 10

Products & Technology

OpenVPX Opens Options for System Cooling An RTC Group Publication


Security? Security You Say? Hah!............................................ 5

Industry Insider

Latest Developments in the Embedded Marketplace................ 6

Small Form Factor Forum

The Little Engine that CAN..................................................... 10

Products & Technology

Newest Embedded Technology Used by Industry Leaders...... 72

Newest Embedded Technology Used by Industry Leaders...... 46

Editor’s Report—Customizable SoCs

Editor’s Report—Programmable Configurable ASICs

Quest continues fo rthe “Sweet Spot” in Configurable ASIC/SoC Design................................................................................... 14 by Tom Williams, Editor-in-Chief

Technology in Context—COMs vs. SBCs COM Express versus SBC:Deciding Which to Use and Where . ............................................................................................. 18 Juergen Eder, GE Intelligent Platforms

Technology Connected—PCI Express over Cable

PCIe over Cable Goes Mainstream ........................................26 Steve Coooper, One Stop Systems

Technology in Systems—Analog to Digital Conversion

Compression-based A-to-D Converters: Reaching New Low Power Limits in Quantization ............................................................. 32 Fred Tzeng, ZeroWatt Technologies

Technology Deployed—Standards Update

6Gbit/s SAS and Beyond: Emerging Storage Standards Set the Course for the Furture .......................................................... 40 Sam Barnett, Maxim Integrated Products

Industry Watch

Wi-Fi: Leading the Way in Enabling the ‘Internet of Things” ....... 46 Lew Adams, GainSpan

40G ATCA Meets LTE- Speeding from Backplanes to Broadband .............................................................................................. 56 Sven Freudenfeld, Kontron



Intel’s Atom Platform Integrated with Altera FPGA Already in OEM SBC Product.................................................................. 12 by Tom Williams

Technology in Context—Managing Network Systems Mandates for Power Efficiency Push Telecom Providers toward Software Optimization........................................................... 16 Carter Edmonds, Kontron

Technology in Systems—Embedded Windows: The Next

Generation Windows 7 Goes Embedded .................................................... 20 John R. Malin and Sean D. Liming, SJJ Embedded Micro Solutions

CE Goes Multicore: Microsoft Windows Embedded Compact 7....26 Douglas Boling, Boling Consulting

Making Embedded Systems More Secure with Windows Embedded Standard 7............................................................. 30 John Lisherness, Avnet Technology Solutions

Technology Deployed—Motor and Motion Control Implementing Precision High-Speed Linear Motion Control . . 34 Todd Shearer, Galil Motion Control

A Taxonomy of Motion Control Encoder Technologies . ......... 38 Foo Hong Thong, Avago Technologies

Industry Watch—New Approaches to System Cooling A New Approach to 3U VPX Preconfigured Conduction Cooled Systems ................................................................................ 42 Bill Ripley, Themis Computer



MARCH 2011

The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

February 2011

March 2011

FPGAs and CPUs


AllieRs orivals

FPGAs and CPUs, Allies or Rivals?

MHz, Watts, Size Optimizing Energy Use

Atomic Clock Shrinks to Chip Scale

Merging Configurability with Programmability

Small Modules Gobble Big Data

The Quest to Secure Networked Devices

Vital Code: Verify and then Comply

FPGA Family Spans Spectrum of Design Needs

An RTC Group Publication


MHz, Watts, Size Optimizing Energy Use

An RTC Group Publication


Sunshine on the Highway, Power to the Grid........................... 6

The Dance of Optimization: Waltzing Down to the Silicon........ 5

Industry Insider

Industry Insider

Small Form Factor Forum

Small Form Factor Forum

Products & Technology

Products & Technology

Editor’s Report­—Precise Timing for Small Modules

Editor’s Report—FPGA Family Spans the Spectrum

Technology in Context—FPGAs and CPUs-Allies or Rivals? MPUs Team with FPGAs to Solve Real-Time System Requirements ....................................................................... 16 Lawrence Getman, Xilinx

Technology in Context—Configurable and Programmable Devices Configurable and Programmable: The Sweet Spot for the SoC ................................................. 16

Microprocessers or FPGAs? Making the Right Choice............ 22 Steve Edwards, Curtiss-Wright Controls Embedded Computing

Technology Connected—Security for Networked Devices

Latest Developments in the Embedded Marketplace................ 8 Help Wanted! Industry Leadership......................................... 10 Newest Embedded Technology Used by Industry Leaders...... 46 An Atomic Clock in Miniature Ushers in Precise Timing for Small Modules....................................................................... 12 by Tom Williams

Next Generation SoC Platform for Terrestrial and Space Applications........................................................................... 26 Esam Elashmawi, Microsemi

Technology in Systems—From Verification to Compliance

Tracing Requirements through to Verification: Improve Current Practicies for Standards Compliance..................................... 30 Mark Pitchford, LDRA

Technology Deployed—Data Acquisition with Small Modules Data Acquisition Solutions Stack Up...................................... 34

Robert Burckle, WinSystems

Capturing Elusive Data Ensures Reliable Results................... 38

Ben Haest, QED, SA and Klaas A. Vogel, Elsys Instruments

Latest Developments in the Embedded Marketplace................ 6 If Memory Serves.................................................................. 10 Newest Embedded Technology Used by Industry Leaders...... 44 28 nm FPGA Device Portfolio Addresses Continuum of Design Requirements........................................................................ 12 by Tom Williams

Jamie Brettle, National Instruments and Greg Brown, Xilinx

Securing Your Embedded Designs: Encrypion and Authentication ‘Keys’ to Success .......................................... 20 Daryl R. Miller, Lantronix Security Considerations in Embedded I/O Virtualization ........ 24 David Kleidermacher, Green Hills Software

Technology in Systems­—Optimizing Energy Use

Managing Energy Savings in Real Time................................. 28 Raman Sharma, Enery Micro and John Carbone, Express Logic Power Debugging the Software: Optimizing the Power Consumption of an Embedded System.................................. 34

Lotta Frimanson and Anders Lundgren, IAR Systems

Technology Deployed­—Small Modules in Transportation

Transportation Applications Find Value in the Centralized Computing Platforms............................................................. 38 Walter Furter, Kontron




APRIL 2011

MAY 2011 The magazine of record for the embedded computing industry

April 2011

May 2011

Strategies Abound:

Developing with Programmable Logic

Strategies Abound: Developing with Programmable Logic


The magazine of record for the embedded computing industry

Energy Harvesting Brings in THE JUICE


Energy Harvesting Brings in “THE JUICE”

Microcontrollers Get Application Specific Small Controllers Run Advanced Energy Systems Software Targets Safety where Danger Could Lie An RTC Group Publication


HD and 3D Buried in the Chip: Embedded Systems Go More Visual...................................................................................... 6

Industry Insider

Latest Developments in the Embedded Marketplace................ 7

Small Form Factor Forum

When is a Standard not a Standard?..................................... 10

Guest Editorial

Evolution - It’s a Good Thing!................................................. 12

Devices Link Up through the Cloud

Hypervisors Blaze the Path to Multicore Diversity

New Specs Fuel System Design Options

An RTC Group Publication


The Network that Binds: Pulling the Home into the World of Digital Services ...................................................................... 5

Industry Insider

Latest Developments in the Embedded Marketplace................ 6

Small Form Factor Forum

Shootout on the Oak Trail...................................................... 10

Products & Technology

Jonathon Miller, Diamond Systems

Newest Embedded Technology Used by Industry Leaders...... 44

Products & Technology

Editor’s Report—New Network Technologies Enter the Home

Newest Embedded Technology Used by Industry Leaders...... 50

Editor’s Report—Advances in Embedded Processor Architectures

New Embedded Generation Fuses x86 with Parallel Processing Engine................................................................................... 14 by Tom Williams

Technology in Context—Microcontrollers Go After the Details Right Sizing the Micro: Honing in on the Right MCU for the Job........................................................................................ 16 Keith Curtis, Microchip Technology

Technology Connected—Security for Networked Devices

Adding Extra Levels of Security for Connected Client Devices .....20 Robert Day, Lynuxworks

Technology in Systems­—Developing with Programmable Logic

Utilizing a Flexible Interconnect Architecture for System Design................................................................................... 24 Aaron Ferrucci, Altera

Programming ASP-Type Devices: New Approaches for a New Paradigm............................................................................... 30

Greg Brown, Xilinx

Portable and Reusable FPGA Frameworks Let Engineers Do What They Do Best - Design.................................................. 36

Jeffry Milrod and Kristen Zaffini, Bittware

Technology Deployed­—Control for Advanced Energy Systems Advanced Controls Enable Airborne Wind Power Generation.. 40 Brian MacCleery, National Instruments

Industry Watch­—Safety-Critical Software

Safe Software: Things to Consider When Building Products That Can Cause Injury........................................................... 46 Ken Maxwell, Blue Water Embedded



The Smart Grid Meets the Digital Home..................................... 12 by Tom Williams

Technology in Context—Sources of Low Power: Energy Harvesting Energy Harvesting Applications Are Everywhere.................... 14 Tony Armstrong, Linear Technology

Technology Connected—Devices and the Cloud

Storing Device Data in the Cloud ............................................. 20 Kurt Hochanadel, Eurotech

Technology in Systems—Hypervisors, RTOSs and Multicore Embedded Virtualization on x86: A Technical Look at Approaches and Solutions ......................................................................... 24 Timo Kühn, Real-Time Systems

Embedded Virtualization Meets Real-Time Needs in Multi-OS Systems................................................................................. 28 Christophe Grujon, TenAsys

Technology Deployed—New System Specifications Modernizing Legacy Modular Systems Design with CompactPCI Serial . .................................................................................. 32 Barbara Schmitz, MEN Mikro Elektronik

Rugged Memory Spec Raises the Bar for Rugged Modular Computing . .......................................................................... 36 Markus Friese, Lippert Embedded Computers

Industry Watch—MicroTCA in Networks MicroTCA Systems for the Evolving Wireless Infrastructure ........ 40 Tony Romero, Performance Technologies


JUNE 2011

JULY 2011

The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

June 2011

July 2011

The Smart Grid: A New Technology Infrastructure




Software Defined Radio to Aid First Responders

Java and Android Add Power to Embedded

PCI Express Links up with DSP

Small Modules in Powerful Medical Systems

Hybrid CPUs Challenge Supercomputers An RTC Group Publication


The Smart Grid: A Huge Task with Huge Opportunities ........... 6

Industry Insider

Latest Developments in the Embedded Marketplace................ 8

Small Form Factor Forum

Head Transplant.................................................................... 12

Products & Technology

Small Form Factors: Finding the Right Fit

SCADA Systems Add Integrated Security An RTC Group Publication


The Changing Face of Embedded ........................................... 6

Industry Insider

Latest Developments in the Embedded Marketplace................ 8

Small Form Factor Forum

Where have All of the RTOSs Gone?...................................... 12

Products & Technology

Newest Embedded Technology Used by Industry Leaders...... 46

Newest Embedded Technology Used by Industry Leaders...... 50

Editor’s Report—The Promise of the Smart Grid

Editor’s Report—The Growth of Wireless Connectivity

The Smart Grid: The Advent of a New Technology Infrastructure... 14 by Tom Williams

Wi-Fi to Become Even More Versatile and Ubiquitous.................. 14 by Tom Williams

Technology in Context—Platform Management with Customizable Microcontroller Customizing a Microcontroller for Hardware Platform Management......................................................................... 18

Technology in Context—Sorting out Small Form Factors The Right COM for the Right App: Sorting out Small Form Factors.................................................................................. 16

Technology Connected—New Roles for Wireless

Graphics Performance Drives Ever More Capable Small Form Factor Designs...................................................................... 22

Mark Overgaard, Pigeon Point Systems and Hichem Belhadj, Microsemi

Connectivity Software Defined Radio: The Key to Public Safety Radios .......... 22 Rodger H. Hosking, Pentek

Technology in Systems—Hybrid and Multicore Processers

Supercomputer Performance on a Chip Powers Next-Generation Embedded Image Processing .................................................. 26 Dr. Vijay Reddi, Advanced Micro Devices

Technology Deployed—Embedded Technologies for the

Dan Demers, congatec US

Christine Van De Graaf, Kontron

Technology Connected—Supervisory Control Systems

SCADA Security fro Critical Infrastructure ................................. 28 Frank Dickman

Technology in Systems—Embedded Java and Android

Android—Google’s Mobile Platform and its Capabilities for Embedded ............................................................................. 32 Bill Weinberg, and Olliance Group

Smart Grid Synchronized Embedded Intelligence Enables the Smart Grid....................................................................................... 30

Real-Time Java Virtual Machine Undergoes Overhaul................................................................................. 36

Smart Grid Security: Less Bruce Willis, More Ben Franklin... 34

Technology Deployed—Small Modules in Medical Devices Challenges and Opportunities for the Medical Device Industry: Meeting the New IEC 62304 Standard................................... 42

Andre Marais, Symmetricom Robert Vamosi, Mocana

Securing and Improving the Smart Grid Requires Military Grade Technology........................................................................... 38 Jim McElroy, Green Hills Software

Kelvin Nilsen, Atego Systems

Martin Bakal, IBM Rational

Modules Mobilize Medical Care............................................ 46 Colin McCracken, American Portwell Technology

Industry Watch—PCI Express Meets DSP DSPs with PCI Express Interface Expand Embedded Connectivity Options ................................................................................. 42 Krishna Mallampati, PLX Technology






The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

August 2011

September 2011



Wring More Performance out of Embedded Memory



Will OpenVPX Move into the Commercial World?

Making DSP Work in Real Time

Robotic Systems: Sense, Think, Act

Bridging PCIe and Serial RapidIO

Machine-to-Machine Systems: Tying the World Together

Making the Most of Multicore An RTC Group Publication


Things in the Cloud ................................................................ 6

Industry Insider

Latest Developments in the Embedded Marketplace................ 8

Small Form Factor Forum

The Bad, the Good and the Ugly............................................ 12

Products & Technology

Newest Embedded Technology Used by Industry Leaders...... 54

Editor’s Report—Embedded Systems in Solar Power

Growth of Solar Power Rides on Embedded Intelligience.............. 14 by Tom Williams

Technology in Context—Embedded Memory System

Options Downloadable Modules Ease Memory Constraints in Small Embedded Systems............................................................... 18 John A. Carbone, Express Logic

The Things I Hear: The Engineering to Purchasing Gap in Embedded Memory Selection................................................ 26 Nicholas Urbano, Memphis Electronic

Technology Connected—PCI Express Meets Serial RapidIO

Serial RapidIO Reaches a Crossroads with PCIe in Intel-Based DSP Designs ................................................................................. 32 Ian Stalker, Curtiss-Wright Controls Embedded Computing, and Devashish Paul, IDT

Technology in Systems—Real-Time DSP

An Integrated Real-Time Platform Can Deliver Improved DSP Performance at Lower Costs ................................................... 36 Andy The, IntervalZero

Technology Deployed—Making the Most of Multicore

A Static Analysis Approach to Identifying Defects in Multithreaded, Multicore Designs.......................................... 42 Paul Anderson, GrammaTech

Building Scalable Network Processing Platforms with Multicore Processers............................................................................ 46 Paul Stevens, Advantech

Industry Watch—Advances in Wireless Connectivity Demystifying the 4G Phenomenon: Part 1 ................................ 50 Todd Mersch, RadiSys


IPv6 Gets Ready to Take the Stage


An RTC Group Publication


From ASIC to ASP to What’s Next? The Quest for the Ideal Embedded Device .................................................................. 6

Industry Insider

Latest Developments in the Embedded Marketplace................ 8

Small Form Factor Forum

Gamers COM Their System.................................................... 12

Products & Technology

Newest Embedded Technology Used by Industry Leaders...... 50

Editor’s Report—Advanced Memory Technology

1 Terabit on a Chip—New Memory Technology Rises to Challenge NAND Flasy............................................................................. 14 by Tom Williams

Technology in Context—OpenVPX in Commercial Applications Updated Attributes Bring VME Beyond Military with OpenVPX.... ............................................................................................. 18 Steve Gudknecht, Elma Electronic

CompactPCI Serial Challenges VPX as Embedded Shifts to Serial Point-to-Point Architectures......................................... 22 Barbara Schmitz, MEN Micro

Technology Connected—Industrial Networking

IPv6 Gets Ready for the Smart Grid and the Internet of Things ...28 David Ress, Sensus and Mark Grazier, Texas Instruments Incorporated The World Is Moving to IPv6: Are You and Your Product Ready? ..... ............................................................................................. 32 Thomas Volz, EBSnet

Technology in Systems—Machine-to Machine Systems

Machine to Machine - Intelligent Devices Talking to Each Other ...36 Bill Weinberg, and

Technology Deployed—Robotic Systems: Sense, Think, Act Simplifying Robot Software Design Layer by Layer................ 42 Meghan Kerry, National Instruments

Industry Watch—Wireless Networking Getting Familiar with Bluetooth 4.0 Low Energy ........................ 46 Michael Foley, Bluetooth SIG




The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

October 2011

November 2011




Networking Goes WIRELESS From Phone to Factory



Memories Advance in Speed and Nonvolatility

MicroTCA Pushes Against VPX in Military Apps

Energy Systems Gain Intelligence, Shed Waste

Security: A SystemsOriented Issue

Safety-Critical Systems: More than Reliability An RTC Group Publication


Steve Jobs ............................................................................. 6

Industry Insider

Latest Developments in the Embedded Marketplace................ 8

Small Form Factor Forum

When Did Legacy Become a 4-Letter Word?.......................... 12

Products & Technology

Newest Embedded Technology Used by Industry Leaders...... 50

Editor’s Report—Advances in Memory

Closing the Performance Gap: Making Memory Faster with Algorithms and Logic............................................................... 14 by Tom Williams

Technology in Context—Nonvolatile Memory Advances in Nonvolatile Memory Interfaces Keep Pace with the Data Volume ......................................................................... 18 Terry Grunzke, Micron Technology

Technology Connected—Network Processing

Getting What You Pay For: Optimizing PCIe Accelerator Card Designs ................................................................................. 24 Matthew Dharm, JumpGen Systems

Technology in Systems—Technologies for Energy

Intelligience The Smart Grid Built on Smart Objects Will Challenge Developers............................................................................. 28 Bill Weinbirg, Linux Pundit and The Olliance Group

The Smart Grid Tipping Point for Electric Vehicles: Closer than You Think...................................................................................... 32 Jim Zyren, Qualcomm Atheros

Technology Deployed—Designing Safety-Critical Systems Reducing the Cost of Developing Safe, Secure, and Resilient Industrial Control Systems..................................................... 36 Jim McElroy, Green Hills Software

Industry Watch—Wireless Networking Demystifying the 4G Phenomenon: Part 2 ................................ 40 Todd Mersch, RadiSys

Defining the Future of Multi-Gigabit Wireless Communications ....... ............................................................................................. 46 Ali S. Sadri,

Make The Best Choice Stackable vs. COM

Thunderbolt Bids for Serial Interconnect Solutions An RTC Group Publication


Fast Serial Interconnects—Will They Bypass Embedded or Bring it Along? . ...................................................................... 6

Industry Insider

Latest Developments in the Embedded Marketplace................ 8

Small Form Factor Forum

Auld Lang SFF....................................................................... 12

Products & Technology

Newest Embedded Technology Used by Industry Leaders...... 56

Editor’s Report—High-Speed Interconnects

Thunderbolt: A Potential High-Speed Multiprotocol Serial Interconnect............................................................................ 14 by Tom Williams

Technology in Context—Stackable vs. COM: What’s the Best Choice? An Aerial View of COMs vs. SBCs from 30,000 Feet ............. 16 Bob Burkle, WinSystems

Thinking (about What Goes) Inside the Box............................26 Martin Mayer, Advanced Digital Logic

Technology Connected—Flexible Circuits

Extending Electronic Functionality with Printed Electronics and Printed Memory ..................................................................... 32 Jennifer Ernst, Thinfilm Electronics

Technology in Systems—Video and Display Technology

Gets Smarter Video and Display Technology at the Intersection of Full Multimedia Immersion.............................................................................. 36 Peter Mandl, Advanced Micro Devices

Embedded Video Takes Airborne Surveillance to New Heights..... 42 Christian Steward, Curtiss-Wright Controls Embedded Computing

Technology Deployed—Security in Systems Four Key Steps to Address Security Threats in Embedded Systems................................................................................ 46 Dominic Tavassoli, IBM Rational

Industry Watch—MicroTCA Comes on Strong MicroTCA Challenges VPX-Based Systems for Military Applications . ............................................................................................ 50 Mark Leibowitz, Robert Saracino and Jon Leach, BAE Systems, Electronic Systems and Saeed Karamooz, VadaTech



products &

TECHNOLOGY FEATURED PRODUCTS SoC FPGAs Integrate ARM Processor and FPGA into 28nm Single-Chip Solution

Altera has introduced a family of what in these pages have been dubbed application services platforms (ASPs) and what it is calling SoC FPGAs. These are devices that integrate a hard-wired microprocessor and its most common peripherals onto the same die with an FPGA fabric to form a programmable and configurable system on chip (SoC). The new Altera family integrates a dual-core ARM Cortex-A9 MPCore processor with Altera’s 28nm Cyclone V and Arri V FPGA fabrics. Since the integration is on a single die, the ARM portion is produced in the same 28nm process. The devices include error correcting code (ECC) protected memory controllers and high-bandwidth interconnect. The CycloneV and ArriaV SoC FPGAs feature a processor system with a dual-core 800 MHz ARM Cortex-A9 MPCore processor, NEON media processing engine, single/ double-precision floating point unit, L1 and L2 caches, ECCprotected memory controllers, ECC-protected scratchpad memory and a wide range of commonly used peripherals. The processor system can deliver 4,000 DMIPS peak performance for less than 1.8 watts. The processor system and FPGA fabric are powered independently and can be configured and booted in any order. Once in operation, the FPGA portion can be powered down as needed to conserve system power. The ARM Cortex-A9 MPCore processor system and FPGA are interconnected by high throughput data paths, providing over 125 Gbit/s peak bandwidth with integrated data coherency. This level of performance is not possible in two-chip solutions because an integrated single-chip SoC FPGA allows board designers to eliminate the external I/O paths between a processor and an FPGA, eliminating latency and providing significant system power savings. The CycloneV and ArriaV SoC FPGAs are based on a low-power 28nm process (28LP). These families feature embedded transceivers that operate up to 5 Gbit/s and 10 Gbit/s respectively. The FPGA fabric includes variableprecision DSP blocks and up to three ECC-protected memory controllers. The CycloneV SoC FPGAs feature up to 110K logic elements (LEs) and provide low system cost and power along with performance levels that make the devices suitable for differentiating high-volume applications, including next-generation industrial drive on a chip, advanced driver assistance and video surveillance. The ArriaV SoC FPGAs balance cost and performance while delivering the lowest total power for mid-range applications. The devices feature up to 460K LEs and are suitable for meeting the higher performance requirements in applications that include remote radio heads, LTE base stations and multi-function printers. Altera’s SoC FPGAs enable both hardware and software teams to use common tools and development flows that support both the Cortex-A9 MPCore processor and the FPGA. Designers can create custom peripherals and



hardware accelerators using Altera’s Quartus II software and integrate them with the processor system using Altera’s Qsys system integration tool. Qsys accelerates the hardware design process by automatically generating interconnect logic to connect intellectual property (IP) functions and subsystems. Qsys automatically generates an FPGA-optimized network-on-a-chip (NoC) interconnect, delivering higher performance, enabling improved design reuse and providing faster verification. Qsys supports industry-standard interfaces including Avalon Memory-Mapped, Avalon Streaming and AMBA AXI from ARM, enabling users to leverage and reuse IP cores with multiple interfaces in a single design. Because SoC FPGAs are based on the standard ARM Cortex-A9 MPCore processor, they are compatible with the existing ARM software ecosystem. Embedded software developers can get started immediately writing device-specific application software targeting Altera’s SoC FPGAs leveraging the SoC FPGA Virtual Target, which is available for purchase now. SoC FPGA silicon will be available the second half of 2012 followed by reference designs and development boards. Pricing will start at less than $15 in high volumes. Altera, San Jose, CA. (408) 544-7000. [].


Dual HD PCI/104 H.264 Compression Card for Advanced Video Capture

A low-latency H.264 encoder implemented on a single PCI/104 form factor board allows system builders to easily add high definition analog and digital video capture with H.264/MPEG-4 AVC (Part 10) encoding to their embedded PC equipment designs. The H264-HD2000 encoding engine from Advanced Micro Peripherals supports ultra low latency full frame rate encoding of two HD video sources at up to 1080p30. The H264-HD2000 also supports single channel encode at full 1080p60 and perform stream duplication of the Digital Video input to provide multiple encodings of the same input. This allows streams to be created at different resolution, compression settings dependent on requirements and available bandwidth. Key features include dual channel encoding at up 1080p30 and single channel encoding at up to 1080p60. The compression card supports analog HD input (YPbPr, VGA, RGB), digital HD input (DVI, HDMI) and has an H.264/MPEG-4 AVC (Part 10) encode. It can perform multiple encodes of same input with different settings and is capable of motion detection and video masking. Drivers are available for WinXP-E and Linux. Advanced Micro Peripherals, New York, NY. (212) 951-7205. [].

USB Data Acquisition: Up to 2M Samples per Second per Channel

A data acquisition system incorporates a high-speed sampling mode of up to 2M samples per second for each channel and is CE compliant, making it suitable for applications in the European Union and worldwide. The xDAP 7420 Data Acquisition System from Microstar Laboratories is also compatible with both North American and European power standards, requiring no switching or reconfiguration. Each xDAP 7420 provides eight parallel 16-bit analog-to-digital converter channels and can support the eight million samples per second sustained transfers to an application on a PC-workstation or laptop host. These are clocked simultaneously and run at configurable rates of up to two million samples per second. The aggregate sample transfer rate limit is eight million samples per second, with transfers to the host continuously sustainable across the USB interface at this rate. For host applications that cannot sustain this pace, there is enough local buffer memory to record a full minute of activity without any concurrent transfers. xDAP 7420 features an embedded 2.0 GHz Celeron processor that manages all of the real-time aspects of acquisition hardware management and data buffering. On the host side, xDAP 7420 application software uses the same “channel architecture” driver and server software, provided at no extra cost—it is the same interface software that all of the other DAP products use as well. The xDAP 7420 is priced at$6995. Microstar Laboratories, Bellevue, WA. (888) 678-2752. [].

Ad Index Get Connected with technology and

Fanless Dual-Core Computing USBsolutions 3.0 Come companiesand providing now to Get Connected is a new resource for further exploration Thin Embedded Devices

into products, technologies and companies. Whether your goal

A new Em-ITX form is to research the latest datasheet from a company, speak directly factor board combines with anrich Application Engineer, or jump to a company's technical page, the I/O with advanced multimegoal of Get Connected is to put you in touch with the right resource. dia capabilities. Partnered Whichever level of service you require for whatever type of technology, GetchasConnected will help you connect with the companies and products with a new industrial you are searching for. sis kit, the VIA EITX-3002 from Via Technologies provides a solution for a wide range of durable and fanless next generation devices in medical, healthcare, industrial and building automaGet Connected with technology and companies prov tion, digital signage, kiosk, POI/POS, gaming and surveillance applications. Get Connected is a new resource for further exploration into pro datasheet from a company, directly with anform Application Engine The VIA EITX-3002 is based on the 17 cm speak x 12 cm Em-ITX in touch with the right resource. Whichever level of service you requir factor, and is powered by a choice of a 1.2 GHz VIA Nano X2 E-Series Get Connected will help you connect with the companies and produc or 1.0 GHz VIA Eden X2 dual core processor. The VIA EITX-3002 takes advantage of the VIA VX900H media system processor, a feature packed all-in-one digital media chipset that brings excellent hardware acceleration for the latest HD video formats including MPEG-2, H.264, VC-1, WMV9 and HDCP for Blu-ray content protection in stunning 1080p display. The VIA EITX-3002 supports dual independent display, allowing different content to be shown in different resolutions for superior digital signage displays. The unique design of the Em-ITX form factor places the VIA processor and VIA VX900H MSP on the reverse side of the board, optimizing the available real estate for a rich I/O configuration and facilitating slim fanless chassis designs. The VIA EITX-3002 includes an onboard DC-to-DC converter supporting both AT and ATX power modes, Get Connected with companies and and power products input voltages DC 7V to DC 36V. An onboard built-in featured inofthis section. 5-wire/4-wire USB Touch interface makes the EITX-3002 highly suited for high-end interactive touch screen multimedia applications.


VIA Technologies, Fremont, CA. (510) 683-3300. [].

Get Connected with companies and products featured in this section.




Small Form Factor Series with Transportable, Rugged Computing Module

The initial two products of a series of performance- and mission-critical embedded computing platforms are targeted for deployment in harsh environments. 760 Series Mupac Small Form Factor Line from SIE includes an IP67 NEMA Rated Version and IP50 NEMA Rated Version. In addition to the standard offerings, the Mupac Small Form Factor line can also be customized for a wide variety of unique specifications. The 760 Series is rated to operate in temperatures ranging from -10˚to 60˚C. These highly configurable Small Form Factor compute platforms can be quickly deployed with Intel Core i3/i5/i7 multi core processors with up to 4 Gbyte RAM, allowing the 760 Series to bring high-end compute-class performance into harsh industrial and military environments where extreme temperatures, air particulates, liquids and vibration prevent the use of standard commercial computers. Deploying high-end, multi core compute-class performance in any harsh environment is further facilitated by the 760 Series’ small size. Standard sizes start at 3.25”H x 6.5”W x 8.5”D and 5.25”H x 6.5”W x 8.5”D, with custom configurations available. Standard I/O includes dual DVI display: one DVI-I (DVI-D+VGA) and one DVI-D; GbE Ethernet Port, 8 x USB 2.0, 2 x RS-232, 2 x SATA 3Gb/s with RAID 0, 1 support; and 1 x 6-pin header for KB/MS along with Realtek ALC888 HD supported Audio. The 760 Series’ configurability is enhanced by its Mini PCIe Expansion Slot that can be configured by SIE for video capture, DOM, wireless and many other functions. SIE Computing Solutions, Brockton, MA. 401-490-9700. [].

Pico-ITX Mainboard with Dual-Core x86

A Pico-ITX board incorporates dual core processing. Featuring a 1.0 GHz VIA EdenTM X2 CPU along with the VIA VX900H Media System Processor, the EPIA-P900 from VIA Technologies offers multitasking and multimedia capabilities, including improved HD video rendering. With its incredibly small footprint, the EPIA-P900 provides an attractive platform for a wide array of next generation ultra compact devices for applications ranging from healthcare, logistics, fleet management and other vertical market segments to digital signage displays and kiosks. Based on the ultra compact Pico-ITX form factor measuring only 10 cm x 7.2 cm, the EPIA-P900 combines a 1.0 GHz EdenTM X2 CPU and the latest VIA VX900H MSP. The EPIA-P900 supports up to 4 Gbyte of DDR3 memory, HD audio, HDMI, VGA and LVDS display connectivity as well as a high-performance hardware HD video decoder in the shape of the latest VIA ChromotionHD 2.0 video engine. The VIA ChromotionHD 2.0 engine provides advanced filtering and post-processing to perform smooth decoding of H.264, MPEG-2, VC-1, WMV9 and HDCP for Blu-ray content protection providing smooth playback of multimedia titles at resolutions up to 1080p without incurring a heavy CPU load. Onboard pin headers provide support for an additional five USB 2.0 ports, an LPC connector, SMBus connector, PS/2 support, audio jacks, LVDS, four pairs of DIO and two UART ports. Rear I/O includes one HDMI port, one VGA port, two USB 2.0 ports and one GigaLAN port. VIA Technologies, Fremont, CA. (510) 683-3300. [].



KVM Extenders to Support New Linux Distributions for MultiDisplay

A new generation of kernel-based virtual machine (KVM) extenders now supports a broader range of Linux operating systems, and showcases a new degree of remote multi-display flexibility using a minimum of fiber-optic cabling. The Extio product line from Matrox Graphics extends keyboard, mouse, USB, audio and multi-monitor functionality from the host computer by up to one kilometer (3280 feet), and enables new capabilities including cloning, stretched desktops, multi-GPU and multi-unit support. Users can now install two Matrox interface cards, two Extio KVM extenders, Extio F2208 and Extio F2408, and Extio F2408E Expander units to remotely drive any combination of 2, 4, 6, 8, 10, 12 and 16 displays in such mission-critical environments as process control, operations control centers, emergency dispatch and transportation management deploying a variety of desktop configurations with minimal cabling. This enables the ability to combine two PCIe interface cards with two Extio F2208 or F2408 KVM extenders or one of each, and the ability to upgrade one or two Extio F2408s with Extio F2408E Expander units. In the latter configuration, Extio is capable of driving up to 16 DisplayPort and/or DVI displays, a USB keyboard, USB mouse, audio, plus eight additional USB 2.0 ports by up to one kilometer from the PC. Matrox Graphics Dorval, Quebec. (514) 822-6000. [].


RTOS Adds Real-Time SMP Support for ARM MPCore

The ThreadX RTOS from Express Logic has been adapted for ARM’s MPCore multicore processor architecture. ThreadX/SMP, an enhanced version of ThreadX, provides synchronous multicore support that preserves real-time responsiveness. ARM MPCore achieves a significant performance boost by sharing the processing load over the multiple processor cores of the MPCore, while maintaining the real-time responsiveness critical to demanding embedded applications. The ARM MPCore offers up to four processors, with a unified shared memory accessible by all. Express Logic uses this shared memory to design a symmetric multiprocessor (SMP) version of the ThreadX RTOS that runs concurrently on all processors from a single copy in shared memory. Application processing is automatically distributed across the processors as processing demands dictate, based on available processor cores, without the developer needing to be concerned about managing multiple processors. Because of this, programming MPCore is as straightforward as developing an embedded application for a single-core processor with the benefit of multicore performance. ThreadX/SMP achieves a high degree of ease of use by enabling multicore applications to be developed without needing to know the details of the MPCore architecture. ThreadX/SMP efficiently allocates and manages hardware resources to maximize application thread efficiency. ThreadX/ SMP transparently maps application threads to individual cores within the MPCore, providing automatic load balancing. Optionally, the developer efficient thread-to-core allocation can directly manage the use of cores for individual application threads. The low overhead of ThreadX produces GetanConnected with technology and and assignment—a feat that can be difficult for larger RTOSs and OSs to achieve. ThreadX/SMP is available in full source-code form, royalty-free, companies providing solutions now with project license prices starting at $15,500. Get Connected is a new resource for further exploration

Ad Index

Express Logic, San Diego, CA. (858) 613-6640. [].

Digital Recorders Take up to Two 10 Gbit Ethernet Streams with Zero Loss

A new family of COTS turnkey high-speed digital recorders can continuously record up to two 10 Gigabit Ethernet (10GbE) data streams to a RAID array without data loss. The Talon RTS 2715 from Pentek is available with either magnetic or solidstate disk drive arrays. The RTS 2715 can capture one or two simultaneous 10GbE data streams, guaranteeing zero data loss with an aggregate recording rate up to 2 Gbyte/s. It accepts either TCP or UDP data packet protocols and stores data to files on a RAID disk array. The RTS 2715 can also play data back from its drives, streaming it over the 10GbE channels using either protocol. An optional GPS module provides time and position stamping during data capture. The RAID drives are hot-swappable, allowing virtually unlimited data capture capacities. Because the files are stored in a NTFS (new technology file system) format, users can read the files on a standard Windows-based computer system, eliminating the need for file format conversion. Two Gigabit Ethernet ports, four USB ports and a built-in optical disk drive provide alternatives for off-loading data. Single-channel recorders are available in 5 Tbyte, 10 Tbyte and 20 Tbyte versions using up to 24, 3.5” hard disk drives (HDD). A 2 Tbyte version uses up to eight solid-state drives (SSD). Dualchannel recorders include 10 Tbyte and 20 Tbyte HDD and 3 Tbyte SSD versions. Both 4U and 5U rack mount chassis configurations are offered. The RTS 2715 is built on a server-class Windows 7 Professional workstation with a 1.8 GHz Intel Core i7 processor and 2 Gbyte of SDRAM. This workstation comes pre-loaded with Pentek’s SystemFlow Recording Software, which provides a simple and intuitive GUI (graphical user interface) for system configuration and control that shares the look and feel of other Pentek Talon recording systems. Pricing starts at $19,995 for the single-channel, copper interface version. Pentek, Upper Saddle River, NJ. (201) 818-5900. [].

into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal ofSupport Get Connected is to Points put you in touch with the right resource. Remote TTL Card 48 I/O Whichever level of service you require for whatever type of technology, A remote 48-point Get Connected will help you connect with the companies and products TTL I/O card is designed you are searching for.

for fast real-time PC-based control systems. The 7I69 from Mesa Electronics communicates with the host with a robust RS-422 link with up to 100 ft link length. Standard CAT5Get Connected with technology and companies prov cables are used for wirGet Connected is a new resource for further exploration into pro ing convenience. The 7I69datasheet from a company, speak directly with an Application Engine is supported by Mesa’s in touch with the right resource. Whichever level of service you requir low-cost FPGA cards that Get Connected will help you connect with the companies and produc present a parallel register interface to the host, with all protocol details handled by the smart interface. One FPGA card can support up to 32 external devices and up to 3072 control points while still maintaining 10 kHz service rate for all points. The 7I69 provides 48 open collector TTL compatible I/O points. I/O connectors are two 50 pin headers I/O module rack compatible pinouts, allowing the Get with Connected with companies and products in this 7I69 to drive two featured 24 point I/Osection. module racks. 7I69 is suited for performance industrial automation and machine tool applications. Price in quantity 100 is $50.


MESA Electronics, Richmond, CA. (510) 223-9272. [].

Get Connected with companies and products featured in this section.




Freescale-Based Desktop Platform with Optional Wi-Fi Support

A compact network platform designed for Internet security applications is just 9.4 inches wide and is suitable for the SOHO (Small Office, Home Office), SMB (Small Medium Business) and ROBO (Remote Office, Branch Office) markets. Optional Wi-Fi support is provided. Powered by a Freescale P1015E/P1024E processor, the unit supports DDR3 onboard memory; two Atheros AR8033/AR8035 GbE Ethernet LAN ports with bypass function; and four GbE Switch ports. Each Ethernet interface has LED indicators for monitoring activity and data transfer rate. In addition to the GbE LAN ports, the back panel features a USB 2.0 and console port. A bay is provided for an optional slim-type 2.5â&#x20AC;? SATA HDD; and there is one mini-PCIe slot for enabling support for a wireless Ethernet module. Four standard configurations are offered and customization of the unit is possible in OEM quantities. PL-80380 is FCC and CE compliant. WIN Enterprises, North Andover, MA. (978) 688-2000. [].

Software Systems Collaborate on Security and Resilience for Cloud Deployments

LynuxWorks and TransLattice have announced that they have ported the TransLattice Application Platform 2.0 onto the latest version of the LynxSecure separation kernel and hypervisor. This combination of the LynuxWorks highly secure virtualization solution and the TransLattice distributed computing platform, offers new levels of security, availability, scalability and resilience for migration of data and applications to the cloud. LynxSecure makes it possible to securely run multiple guest operating systems and their applications on a single platform. It does this by isolating applications into separate partitions to prevent unintended or dangerous software interactions. Any communication between the secure partitions is controlled by security policies defined by the system administrator and enforced by LynxSecure. The TransLattice Application Platform provides exceptional system resilience and data control, while significantly reducing costs and deployment complexity. Underlying the platform is a geographically distributed relational database. The platform aggregates physical appliances and cloud instances into a network of distributed computing resources that cohesively run enterprise applications. There are two types of policy rules that dictate how and where data can be stored. Redundancy rules define how many copies to store of a specific set of data. Location rules define where a specific set of data can or cannot be stored. By having separate instantiations of the TransLattice Application Platform residing in separate LynxSecure partitions on a single hardware platform, a new level of secure multi-tenancy and server utilization is realized. This multi-tenancy could be for different classification levels for applications and data, or even for multiple departments or entities sharing a single cloud infrastructure. This secure multi-tenancy could be applied to all the distributed nodes of a TransLattice system. LynuxWorks, San Jose, CA. (408) 979-3900. []. TransLattice, Santa Clara, CA. (408) 749-8478. [].



Ultra Small Embedded Computer Features AMD Fusion APU, Customizable I/O

A compact embedded computer is designed around a Nano-ITX motherboard featuring the 1.6 GHz AMD T56N embedded Gseries Fusion APU. Pairing energy-efficiency with graphics performance, the Fusion APU provides the NC108-HD from Logic Supply with HD acceleration and DirectX 11 support in a tightly integrated, compact platform. Lightweight and discreet with an industrial look and feel, the NC108-1HD is suitable as a commercial media player. With the T56N APU, the NC108-1HD provides processing power on par with Intelâ&#x20AC;&#x2122;s D525 dual core Atom CPU, while delivering discrete-class graphics performance. Combined with a small footprint, solid state storage and multiple high-speed wireless networking options, it is ideal for digital signage and kiosks with centralized content storage. The standard configuration includes four USB 2.0 ports, HDMI and Gigabit Ethernet, and audio in/out. In addition, there are two DB9 punchouts; customers can opt for VGA or RS-232 ports without any customization. Project customers can opt for dual HDMI and dual VGA outputs as well. Logic Supply South Burlington, VT. (802) 861-2600. [].


Options Enable Extending NI RIO Platform with Custom Electronics

A new version of the CompactRIO Module Development Kit (MDK) from National Instruments, along with the introduction of the RIO Mezzanine Card (RMC) specification for NI Single-Board RIO, expands the options for adding specialized or custom I/O to packaged and board-level embedded control and monitoring systems. With these technologies, system integrators and OEMs now can fully integrate custom electronics with the proven NI reconfigurable I/O (RIO) hardware systems. Incorporating updates based on customer feedback, version 2.0 of the CompactRIO MDK provides engineers and scientists additional resources that simplify the processes of creating any custom module. The 2.0 version features a new field-programmable gate array (FPGA) communication core that automatically implements NI technology best practices and low-level housekeeping tasks. These include module detection, identification, data transfer and other common functions. By starting with the NI communication core, engineers can access years of NI research, development and optimization to accelerate their design process and maximize compatibility of custom modules within the RIO ecosystem. The new MDK also includes slot-agnostic code generation and an elemental I/O node paradigm, making it possible for module designers to provide the same user experience whether engineers and scientists use third-party modules or NI modules. An integral part of the NI graphical system design approach, NI RIO technology combines NI LabVIEW system design software with commercial off-the-shelf hardware to simplify development and shorten time-to-market when designing advanced monitoring test systems. Getcontrol, Connected withand technology and NI RIO hardware, which includes CompactRIO, NI Single-Board RIO, R Series boards and PXI-based NIcompanies FlexRIO, providing features an architecture solutions now with powerful floating-point processors, reconfigurable FPGAs and modular I/O. All NI RIO hardware components are programmed LabVIEW Get Connected is a newwith resource for furtherto exploration give engineers the ability to rapidly create custom timing, signal processing and control for I/O withoutinto requiring expertise in low-level hardware products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly description languages or board-level design.

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National Instruments, Austin, TX. (800) 258-7022. [].

Pseudo-Differential Serial SAR ADC with 96.5 dB SNR Performance & 18 mW Power

A serial 18-bit, 1.6 Msample/s pseudo-differential SAR analogto-digital converter (ADC) achieves 96.5 dB SNR and -120 dB THD while supporting a 0V to 5V unipolar input range. The LTC2369-18 from Linear Technology with its pseudo-differential input simplifies the ADC driver requirement, enabling single-ended drive while benefiting from the reduction of unwanted signals common to both inputs. This reduces complexity and lowers the power requirements in the signal chain. Operating from a 2.5V supply, the LTC2369-18 consumes only 18 mW, with a low power shutdown mode that consumes just 2.25 µW. When used in combination with the recommended single-ended ADC driver LT6202, the combined power dissipation is a mere 53 mW, a 40% reduction from a fully differential drive circuit. The LTC2369-18 is the industry’s highest performing 18-bit pseudo-differential SAR ADC, featuring a maximum INL of ±2.5 LSB with no missing codes and guaranteed specifications over the -40°C to 125°C temperature range. Linear Technology, Milpitas, CA. (408) 432-1900. [].


with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect the companies PC/104-Plus Module Based on with Atom E600 and products you are searching for.

An extreme ged PC/104-Plus Single Board Computer (SBC) is based on the Intel Atom Processor E600 series from 600 MHz up to 1.6 GHz . The CoreModule 720 from Get Connected with technology and companies prov Adlink Technology is Get Connected is a new resource for further exploration into pro a PC/104-Plus stack- datasheet from a company, speak directly with an Application Engine in touch with the right resource. Whichever level of service you requir able form factor that al-Get Connected will help you connect with the companies and produc lows customers to build low-power solutions for space constrained, extreme rugged environments. The CoreModule 720 PC/104-Plus SBC features PCI and ISA bus connectivity and provides an integrated 4 Gbyte SSD, CAN bus, SATA and a broad range of peripheral I/O support. Additional features of the CoreModule 720 include support for up to 2 Gbyte soldered DDR2 SDRAM at 600/800 MHz and 24-bit LVDS and SDVO graphics. The Intel Platform Controller Hub EG20T accommodates a wide range of common I/Os, such as USB, SATA, GbE, SDIO, Serial and CAN bus. Designed to meet stringent shock and vibration requirements, Get Connected with companies and the CoreModule uses in50% thicker printed circuit board (PCB) and products720 featured this section. supports extended temperature range of -40° to +85°C.


ADLINK Technology, San Jose, CA. (408) 360-0200. [].

Get Connected with companies and products featured in this section.




Compact Fuel Gauge Increases Li+ Battery Runtime

A fuel gauge for single-cell Li+ battery packs features a new proprietary ModelGauge m3 algorithm. The MAX17047 from Maxim Integrated Products is a coulomb-counting fuel gauge that does not suffer from the abrupt corrections that occur with traditional coulomb counter algorithms. Compared to other coulomb counters, this ModelGauge m3 IC uses a smaller current-sense resistor and fewer external components. This saves both space and cost. ModelGauge m3 technology overcomes the limitations of the currently available fuelgauging techniques. It combines the short-term accuracy and linearity of a coulomb counter with the long-term stability of a voltage-based fuel gauge. ModelGauge m3 cancels offset accumulation error in the coulomb counter, while providing better short-term accuracy than any only-voltage-based fuel gauge. This algorithm makes tiny corrections continually over time, so it does not suffer from the abrupt corrections that normally occur in coulomb-counter algorithms. The MAX17047 also automatically compensates for aging, temperature and discharge rate. It provides accurate remaining capacity in mAh or SOC % and time-to-empty over a wide range of operating conditions. It uses 75% less power than the competition, even adapts to changes in the battery over use and time, and warns of abnormal battery conditions. The device provides two methods for reporting the age/health of the battery: reduction in capacity and cycle odometer. Maxim Integrated Products, Planegg, Germany. +49 89 85 799-561. [].

150 Watt 2 x 4” Power Supplies with Level V Efficiency Compliance

A series of 150 watt switching power supplies (120W convection cooled) is built in a high-density 4.00 x 2.00 x 1.28” open-frame package featuring high efficiency operation, low standby power consumption for compliance with Level V Efficiency Standards, and compliance to Medical or ITE Safety approvals. The SNP-G12 series from PowerGate consists of seven models with single output voltages ranging from 12 to 48 VDC and an auxiliary output of 12V @ 200mA. All models feature universal AC input (90-264 VAC) with active power factor correction; high efficiency operation up to 91%; low standby power consumption <0.5W; peak loads up to 200 watts; full load operation with 8 cfm airflow up to 50°C; and Reliability in >180k hours. Models are approved to UL/cUL 60601-1 or UL/cUL 60950-1 with CB Report and CE Mark (LVD). Evaluation quantities are available now with standard lead times of 10 weeks. The 500 piece price starts at $65. PowerGate, Sunnyvale, CA. (408) 588-1750. [].



ARM Development Kit for Rich Media Applications

Premier Farnell’s global online eCommunity for electronic design engineers, has announced availability of the DM3730 ARMbased development kit, a complete embedded development system that accelerates time-tomarket for media-rich, portable applications. The kit provides developers with an ARM-based TI DaVinci digital media processor tailored for digital audio, video, imaging and vision applications. The DM3730 device includes a general purpose processor, video accelerators and C64 DSP, and is tailored for a range of applications like Portable Data Terminals, Navigation, Auto Infotainment, Gaming, Medical Imaging, Home Automation, Human Interface, Test and Measurement and Industrial Control. The kit, available via element14 at a promotional price while supplies last, provides easy access to ARM Cortex-A8 Core-based MCU design, enabling engineers to design their applications with high-quality graphics and video apps with low power consumption. The kit is supported by multiple hardware peripherals including LCD touch screen interface and works with Android, Microsoft Windows CE and Linux operating systems. element14 Singapore. +65 6788 0200. [].


High-Speed Data Acquisition XMC Module with Two 1 GSPS 12-bit A/Ds, Four 1 GSPS 16-bit DACs

A new XMC module integrates high-speed digitizing and signal generation with signal processing on a PMC/XMC I/O module for demanding DSP applications. The tight coupling of analog I/O to the Virtex-6 FPGA core dramatically simplifies SDR, RADAR and LIDAR implementations. The X6-1000M from Innovative Integration uses a PCI Express interface that sustains transfer rates over 2.8 Gbyte/s for data recording applications and integration within real-time systems. The X6-1000M features two 12-bit 1 Gsample/s A/Ds and four 16-bit 1 Gsample/s DACs. Analog input bandwidth of over 2 GHz supports wideband applications and RF under sampling. The DACs have features for interpolation and coarse mixing for up conversion. The onboard, low-jitter PLL or an external input may drive the sample clock. Multiple cards are guaranteed to start and process synchronously for sampling and down-conversion. A Xilinx Virtex-6 SX315T (LX240T and SX475T options) with four banks of 1 Gbyte DRAM provides a very high-performance DSP core with over 2000 MACs (SX315T). The close integration of the analog I/O, memory and host interface with the FPGA enables real-time signal processing at extremely high rates. The X6-1000M power consumption is 19W for typiGet Connected with technology and cal operation. The module may be conduction cooled using companies providing solutions now VITA20 standard and a heat spreader. Ruggedization options for wide-temperature operation fromGet -40° to +85°Cis aoperation and g2/exploration Connected new resource for 0.1 further Hz vibration. into products, technologies and companies. Whether your goal is toLogic research the set. latestThe datasheet from a company, speak directly The FPGA logic can be fully customized using VHDL and MATLAB using the FrameWork tool MATLAB BSP supwith an Application Engineer, or jump to a company's technical page, the ports real-time hardware-in-the-loop development using the graphical block diagram Simulink environment with Xilinx System Generagoal of Get Connected is to put you in touch with the right resource. tor. IP cores for many wireless, DSP and RADAR functions such as large-scale preintegrator, DDC, PSK/FSK demod, OFDM receiver, Whichever level of service you require for whatever type of technology, correlators and large FFT are available. Software tools for host development include C++ libraries and Windows, Linux and Get Connected willdrivers help you for connect with the companies and products VxWorks. Application examples demonstrating the module features are provided. you are searching for.

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Innovative Integration, Simi Valley, CA (858) 578-4260. [].

EPIC SBC with Latest Generation Core Processors

A rugged EPIC form factor SBC boasts 2nd Generation Intel Core i7/ Connected with technology companies prov i5/i3 and Celeron processors. TheGet ReadyBoard 910 EPIC SBC fromand Adlink Get Connected is a new resource for further exploration into pro Technology also features an onboard Solid State Drive (SSD) and provides a datasheet from a company, speak directly with an Application Engine compact form factor suitable for applications in harsh environments such as in touch with the right resource. Whichever level of service you requir transportation, self-service, digital signage and video surveillance. Get Connected will help you connect with the companies and produc The ReadyBoard integrates the 2nd Generation Intel Core i7/i5/i3 and Celeron processors (Socket G2) and mobile Intel HM65 Express chipset, onboard SSD and robust I/O in a compact EPIC form factor. The module supports three display interfaces, including analog VGA, LVDS and DVI-D, and features dual Gigabit Ethernet, SuperSpeed USB 3.0 with 5 Gbit/s data transfer rate, PCI Express Mini Card socket and PCI-104 expansion. ADLINK’s Extreme Rugged boards and systems are designed for harsh environments from the ground up. Robust test methods, including Highly Accelerated Life Testing (HALT), ensure optimal product design phases and meet stringent requirements, such as -40° to +85°C operating temperature range, MIL-STD, shock and vibration, and long-term reliability. The Rugged product line achieves a middle ground between industrial and Extreme Rugged applications that experience less shock and vibration and operate within a -20° to +70°C temperature range.


ADLINK Technology, San Jose, CA. (408) 360-0200. [].

Get Connected with companies and products featured in this section.

Get Connected with companies and products featured in this section.



with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

Advertiser Index Get Connected with technology and companies providing solutions now Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.




Advanced Micro Devices, Inc...................... 66..........................................




MSC Embedded, Inc...................................

Agilent Technologies, Inc............................

One Stop Systems, Inc............................... End of Article

Arrow Electronics, Inc.................................. 7.........................................

Pentek, Inc..................................................


Get Connected with companies and

Get Connected

products featured in this section. DRS Defense Solutions, LLC....................... 65.......................................

with companies mentioned in this article. Phoenix International................................... 4.....................................

Elma Electronic, Inc....................................

Prism Computer Solutions.......................... 45.....................................

Get Connected with companies mentioned in this article.

Get Connected with companies and products featured in this section.

Extreme Engineering Solutions, Inc............. 11...................................... RTECC....................................................... 37.........................................

Innovative Integration.................................. 16...........................

Solid State Drives Showcase....................... 25.................................................................

Intel Corporation................................... 22, 23,

Super Micro Computer, Inc......................... 13................................

LeCroy Corporation..................................... 35........................................

The MathWorks, Inc.................................... 2.................................

Logic Devices, Inc......................................

USB Showcase........................................... 36.................................................................

Logic Supply, Inc........................................ 10................................

Measurement Computing Corporation.........

Medical Electronic Device Solutions............ 37..........................


A seasoned embedded technology professional? Experienced in the industrial and military procurement process? Ever thinking about writing as a career?

MEN Micro, Inc.......................................... 31.............................................


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Learn more about new levels of performance in a compact BGA package at: © 2011 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD Arrow logo, ATI, the ATI logo and combinations thereof are trademarks of Advanced Micro Devices, Inc. Other names are for informational purposes only and may be trademarks of their respective owners. Features, performance and specifications may vary by operating environment and are subject to change without notice. Products may not be exactly as shown. PID# 50599C

RTC magazine  

December 2011

RTC magazine  

December 2011