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The magazine of record for the embedded computing industry

September 2011



Will OpenVPX Move into the Commercial World? Robotic Systems: Sense, Think, Act Machine-to-Machine Systems: Tying the World Together An RTC Group Publication




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IPv6 Gets Ready to Take the Stage

50 Series of SSDs Provides Optimized RAID Support for Higher Data Transfer Rates

52 Xeon-Based Server Comes in a Mini-ITX Form Factor


55 Embedded FPGA Development Environment Based on AXI4 Interface Protocol



Technology in Context


OpenVPX in Commercial Applications

Machine-to-Machine Systems

Updated Attributes Bring VME Machine to Machine – Intelligent 6Editorial 36 From ASIC to ASP to What’s Next? The Beyond Military with OpenVPX Devices Talking to Each Other Quest for the Ideal Embedded Device 18 CompactPCI Serial Challenges Insider as Embedded Shifts to Serial 8Industry Latest Developments in the Embedded TECHNOLOGY DEPLOYED Point-to-Point Architectures 22 VPX Marketplace Steve Gudknecht, Elma Electronic

12 & Technology 50Products Newest Embedded Technology Used by Industry Leaders Small Form Factor Forum Gamers COM Their System

EDITOR’S REPORT Advanced Memory Technology


1 Terabit on a Chip – New Memory Technology Rises to Challenge NAND Flash

Barbara Schmitz, MEN Micro

TECHNOLOGY CONNECTED Industrial Networking

28 32

IPv6 Gets Ready for the Smart Grid and the Internet of Things David Ress, Sensus and Mark Grazier, Texas Instruments Incorporated

The World Is Moving to IPv6: Are You and Your Product Ready? Thomas Volz, EBSnet

Bill Weinberg, and

Robotic Systems: Sense, Think, Act

Robot Software Design Layer by Layer 42Simplifying Meghan Kerry, National Instruments

Industry watch Wireless Networking

Familiar with Bluetooth 46Getting 4.0 Low Energy Michael Foley, Bluetooth SIG

Tom Williams

Digital Subscriptions Avaliable at RTC MAGAZINE SEPTEMBER 2011



SEPTEMBER 2011 Publisher PRESIDENT John Reardon,

Editorial EDITOR-IN-CHIEF Tom Williams, CONTRIBUTING EDITORS Colin McCracken and Paul Rosenfeld MANAGING EDITOR Sandra Sillion, COPY EDITOR Rochelle Cohn



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The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

Free Online Spotlighting the Trends and Breakthroughs in the Design, Development and Technology of Embedded Computers. Search Archived Editions along with the Latest News in the Embedded Community. An RTC Group Publication



To Contact RTC magazine: HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, Editorial Office Tom Williams, Editor-in-Chief 1669 Nelson Road, No. 2, Scotts Valley, CA 95066 Phone: (831) 335-1509

Published by The RTC Group Copyright 2010, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.

X-ES 2nd Generation Intel® Core™ i7 Processor Solutions: Delivering Innovation In 2010, Extreme Engineering Solutions, Inc. (X-ES) developed more Intel® Core™ i7 processor products based on VPX, CompactPCI, VME, CompactPCI Express, and XMC form factors than anyone in the industry. This year, X-ES has added solutions based on the 2nd generation Intel Core i7 processor. Providing products customers want, when they want them – that truly is innovation that performs. X-ES offers an extensive product portfolio that includes commercial and ruggedized single board computers, high-performance processor modules, multipurpose I/O modules, storage, backplanes, enclosures, and fully integrated systems. 2nd generation Intel Core i7 processor solutions available in a variety of form factors. Call or visit our website today.


From ASIC to ASP to What’s Next? The Quest for the Ideal Embedded Device


n the process of system optimization, “all roads lead to silicon.” However, there are many roads and they take many and varied routes. Taking the road to silicon actually means that developers would ideally like to have for every application a device the size of a quarter that costs seven cents, draws 4 mW and has unlimited memory capacity. In all such fantasies, this is envisioned as some kind of silicon device. Meanwhile, on this side of the rabbit hole, efforts are neverending to get as close to that ideal as possible within the constraints of budget, the laws of physics, time-to-market and other mundane issues. At the same time, the idea of what that mythical silicon device might actually be has been changing rapidly. Let us consider the venerable ASIC. Its very name is “application-specific IC” which means that the design of the device was dictated entirely by the needs of the application. It has long been a truism that the only way to justify the design, prototyping, verification and production of an ASIC was to have a very high volume application so that the costs could be amortized over the volume. The opposite of an ASIC would be software running on a microprocessor with peripheral devices appropriate to the application either attached to or built into the processor. A similar device, the system on chip (SoC), incorporates a processor with application-specific peripherals and memory (cache, Flash, etc.), Ethernet interfaces, PCIe, CAN, you name it. Here again, the SoC design, while somewhat more flexible due to the programmability of the processors, was a fixed piece of hardware. The push is to get to a highly integrated device that can be manufactured in volume yet serve a wide range of application demands. FPGAs have definitely contributed to this quest led by arch rivals Altera and Xilinx. Xilinx still offers Virtex FPGAs with hard processors embedded in the programmable fabric. Altera provides a path that lets a design be implemented in an FPGA, and then as it is proven and the volume ramps up, can lead to moving that design to an actual ASIC. Both are also actively engaged in the latest trend, which we have called the application services platform (ASP), where a processor core, its peripherals and a programmable fabric are brought together in a single device that is both programmable and configurable.



Tom Williams Editor-in-Chief

Acknowledgment as the pioneer of this approach must go to Cypress Semiconductor, the developer of what it has named the programmable system on chip (PSoC). The PSoC consists of a processor core, a number of configurable analog and digital blocks and programmable interconnects. Using a graphical configuration tool, the developer can set up a selection of peripherals and functions appropriate to the application and then program the processor in the normal way. Cypress seems to have been quite successful with this idea since it has just announced that it has now shipped over a billion units of its 8-bit 8051 and 32-bit ARM Cortex-based products. The next logical step has been taken by Xilinx and Microsemi and with a collaboration between Altera and Intel. That is the integration of an embedded processor with its standard peripherals in hardware along with an FPGA fabric. The SmartFusion device from Microsemi and the Zynq family from Xilinx integrate the CPU, peripherals and programmable fabric on a single die. The Intel Stellarton device puts an Atom processor and an Altera FPGA onto a small mini-board, but their purpose is the same. Rumors abound but no confirmation is forthcoming as to if or when these two devices will be integrated on a single die. With these ASP devices we are getting closer to the idea of a single device (of course, there will be families of devices for different levels of applications) that can be manufactured in volume yet be programmable and configurable enough to offer a single device that can address the needs of a very large range of applications. As with any new technology, cost is probably still an issue. If experience is any teacher, that will not last as economies of scale make such solutions more attractive. But let us not get too complacent. Just as what looks like a solution appears on the horizon, there are new things we will want to integrate—things like USB 3.0 and PCIe Gen3. So far we haven’t seen any processors that incorporate these interfaces and new connectors are just starting to appear. Oh, that’s right. These devices, no matter how small or how integrated, still have to connect to the outside world. And that brings up a whole different set of issues. So while there are many roads, they also keep changing the route. And that keeps life interesting.

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INSIDER SEPTEMBER 2011 Google Buys Motorola Mobile In a move that has unleashed endless speculation, Google has bought Motorola Mobile, the electronics giant’s cell phone handset division. Some are predicting that this represents a major transformation of the search engine giant into a manufacturer of phones, tablets and other devices, while others see it as a move in an ongoing saga of patent wars to shield itself from an endless barrage of intellectual property suits. Part of the deal brings in some 17,000 patents with thousands more pending. What the acquisition most certainly does is pit Google one-to-one against Apple as a company that has control of both its operating system software in the form of Android and its hardware, which can now be more finely tuned to work together. It also raises fears among now-competitive Android licensees that Google is going into competition with its “customers.” Google has gone to some lengths to play down those fears and says that control of OS and hardware will allow development of future devices along the lines that correspond with the company’s vision. This is, of course, what Apple has been doing all along as well. For all its assurances, the Google move still carries the risk of fragmentation of Android if it decides to develop some features that will be kept proprietary, thus giving it a market advantage over a “second tier” of Android-based products. All this, of course, is still speculation and developments in the next few months should reveal what direction it will actually take. What is currently going on behind the scenes is undoubtedly much more intriguing than what is being said in public.

Hewlett-Packard Bails on the PC Market

As if the move by Google were not enough, Hewlett-Packard has just let it be known that it is getting out of the business of making PCs, laptops, desktop PCs and tablets. This move comes after very disappointing sales of HP’s entry into the tablet arena with its webOS-based TouchPad. At the time of this writing, TouchPads originally priced at $399 are being dumped for $99. Apparently, the company is disappointed with the consumer end of the computer business and will be focusing on enterprise computing and services. One sign of this is that HP is not going to be discontinuing its manufacture of printers. It is interesting to note that where a company like Google (above) is charging full-



bore into the fastest growing area of consumer electronics—mobile devices—Hewlett-Packard is not even attempting to compete on that stage. It also apparently sees the traditional laptop and desktop PC market in trouble precisely due to such devices as the smart phone (read iPhone) and the tablet (read iPad). Such a move by such a major player begs the question as to whether the rise of the Tablet, and let’s face it, specifically the iPad, has begun a transformation of the way people approach the digital device experience. If that is so, it would relegate the desktop and laptop computers to an office or home work environment while everybody lived the rest of their lives by way of tablets and smart phones. While HP can probably bail out of the phone and tablet market fairly easily because they

do not have a huge investment in those areas, the PC arena is another matter. It remains to be seen if HP will try to sell its very substantial PC operation and if so, to whom. [Update] Hewlett-Packard’s move may have produced dire unintended consequences. A few days after the above announcement, the company had dropped 20% in value and speculation was abroad that it might be ripe for a potential takeover or (worse yet) being picked apart by vultures. For example, according to some analysts, if Oracle were to buy the now-vulnerable HP for its server unit, it would make Oracle the biggest ape in that particular jungle. The printer division is profitable as well but might now be exposed to acquisition by private equity firms.

Zigbee Alliance Unanimously Approves Draft 0.7 Smart Energy Profile Version 2.0

The ZigBee Alliance has announced the Smart Energy Profile version 2.0 draft 0.7 was unanimously approved in the latest Smart Energy Working Group letter ballot. This successful vote is a major milestone in the completion of the Smart Energy 2.0 standard and keeps it on schedule. While work remains resolving comments received during the letter ballot process and from the public, the 0.7 draft is now implementable and enters a testing phase. Over the next several weeks, the Working Group may conduct a series of quick recirculation ballots to approve technical changes made to integrate comments received during the letter ballot process. Integrating comments increases the level of overall consensus on the draft

standard by ensuring the needs of the broadest stakeholder community are met when the standard is completed. All materials for Smart Energy 2.0 can be found at www. The Alliance will announce future public comment periods based on the successful completion of future development milestones. Smart Energy 2.0 will provide an IP-based energy management solution capable of running on a variety of both wired and wireless communication protocols, including those supported by the HomeGrid Forum, the HomePlug Powerline Alliance, the WiFi Alliance and the ZigBee Alliance. Smart Energy 2.0 already has attracted strong support from leading smart meter manufacturers, device and appliance manufacturers, utilities, energy service providers and various government and standards organizations around the world.

Machine Vision Revenue Growth Slowing

“The growth in machine vision revenues shows signs of slowing,” says John Morse, senior analyst at IMS Research. He continued that this was not entirely unexpected following the dramatic recovery during 2010 from recession. Quoting from IMS Research’s Machine Vision 2011 report, he said that he had estimated that during 2010 global revenues grew by nearly 40%, fully recovering from the devastating fall during 2009. Morse further commented: “This leveling of growth rate is no surprise and was forecast in the latest edition of the report, published in February this year. What is a bit surprising is the sharp decline detected in the first half year results from the IMS Research machine

vision quarterly market tracker, particularly in the Americas and Asia. EMEA seems to be holding up better at this time. The completion of restocking following the downturn is a likely factor contributing to this slowing of growth rate. Global revenues are still projected to grow about 10% in 2011, compared with IMS Research’s estimate for global industrial activity, which is projected to grow 7-8%. The longer term prospects

for machine vision are forecast to be better, but the warning signs suggest there is no room for complacency. We will continue to monitor the situation closely through our tracking activities.”

Parvus Supports VxWorks Across MIL/COTS DuraCOR Product Line

Eurotech subsidiary Parvus has announced support for Wind River’s VxWorks Real-Time Op-

erating System (RTOS) across its entire rugged MIL/COTS DuraCOR mission computer product line. VxWorks is increasingly used by aerospace and military prime contractors where deterministic, high-performance operation is required. Parvus now extends VxWorks support to all of its MIL-qualified x86-architecture Commercial off the Shelf (COTS) DuraCOR subsystems to reduce time to deployment and integration costs for its custom-

ers. Parvus is part of the Eurotech Group, which is a Wind River Strategic Hardware Partner. Parvus has developed Board Support Packages (BSPs) for VxWorks 6.8 to support Intel Core 2 Duo, Intel Pentium M and Intel Atom-based DuraCOR mission computer products. These BSPs were made using Wind River’s Workbench 3.2 development environment. Parvus’ DuraCOR Vehicle Mission Computer platform is a

672.68 (1.481%) This data is as of March 29, 2011. To follow the RTEC10 Index in real time, visit COMPANY






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Interphase Corporation

















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Market Intelligence & Strategy Consulting for the Embedded Community Complimentary Embedded Market Data Available at: RTC MAGAZINE SEPTEMBER 2011



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The PSoC 3 and 32-bit ARM Cortex-M3-based PSoC 5 families, which deliver unparalleled integration and flexibility across 8-, 16- and 32-bit applications, dramatically expand the served available market for PSoC products to applications such as industrial products, automotive, medical and more.

Cypress Ships 1 Billionth PSoC Programmable System-on-Chip

Lantronix has announced that Quadlogic has selected Lantronix’ UDS1100 Ethernet device server to enable serial-to-Ethernet conversion in its metering systems. As a result, Quadlogic can now offer remote access, monitoring and control of its energy metering technology over Ethernet, dramatically improving communication and reducing support costs for its customers. Quadlogic provides its residential and commercial customers access to timely and accurate metering data—especially important due to rising energy costs, deregulated markets and complex energy pricing. The company needed a quick, convenient and reliable way to network-enable its equipment and bring the advantages of remote management to its customers. The UDS1100 enables Quadlogic to meet the growing demand for serial-to-Ethernet conversion, which allows the company to network its metering devices in minutes, and provide its customers with instant control and access to equipment. The UDS1100 uses serial tunneling to encapsulate serial data into packets and transport it over Ethernet. The device’s built-in web server enables Quadlogic to access and configure the UDS1100 from a standard web browser using Lantronix’ development tools to customize the product for unique applications.

Cypress Semiconductor has announced that it has shipped the billionth unit of its PSoC programmable system-on-chip. The billionth unit went to General Electric for a medical application that takes advantage of PSoC’s programmable analog and digital resources for multiple functions. PSoC combines analog and digital peripheral controllers with memory on a single piece of silicon, maximizing designers’ flexibility. The PSoC ramp is among the fastest in the history of embedded systems, and continues to accelerate. Commercial-scale shipments began in 2002, and Cypress shipped its 100-millionth unit in 2006. Cypress reached 250 million units in 2007, 500 million units in 2009, and 750 million in the fourth quarter of 2010. PSoC’s architecture of programmable analog and digital resources integrated with a microcontroller delivers a number of important benefits to system designers, including time-to-market, the ability to react to change, reduced components due to integration, power savings, inventory reduction and supplier consolidation. All of these benefits are important factors in PSoC’s growth story. The PSoC architecture is also at the core of other Cypress offerings, such as the TrueTouch touch screen solution, CapSense touch-sensing and PowerPSoC controllers for LED lighting.

Lantronix to Network-Enable Quadlogic’s Power Line Metering Technology


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Gamers COM Their System


lobal Gaming Expo (G2E) is just around the corner, and gamers everywhere are making their annual pilgrimage to Las Vegas. Eye-popping graphics, large LCDs, multicore processors, custom motherboards, secure BIOS... what can this possibly have to do with small form factors? Since most embedded SBC manufacturers haven’t a prayer of meeting the price targets necessary to supply motherboards into this market, these vendors are rolling the dice on their COM Express lineups as a cost-effective gaming solution. COM stands for Computer-on-Module, splitting the traditional Single Board Computer into a module and a custom carrier. After all, COMe has a PCIe x16 interface to the carrier board, so the system manufacturer can design a carrier board to use a cheap, high-performance consumer graphics card. And COMe is certainly an SFF, so SF3 will put our chips on the table and place our bets. To the casual observer, the various slot machines tend to resemble gaming versions of consumer PCs. Inside the cabinet, you can envision something like a desktop tower PC with all the bells and whistles—SATA 3.0 disk drives, power supply, ATX motherboard, RAM, desktop processor and commodity CPU cooler (fansink). This is the lowest-cost configuration, yet it is extremely flexible in terms of the wide range of consumer processor SKUs available for the motherboard socket. After the processor goes EOL, simply shift production to a newer ATX motherboard. Except for the time required for gaming certifications, of course. In most cases, however, embedded processors are needed to achieve longevity of the design (5-7 years instead of 12-18 months). Cha-ching. Maybe the system is too large. Mobile chipsets and processors are easier to cool and the fans on the custom extruded fansink are quieter. And reducing the power consumption and electricity cost of 40 thousand slot machines is not chump change. How long can Hoover Dam keep up, and can green tech ever come to the rescue? Cha-ching, cha-ching. Finally there’s the longevity of the consumer graphics card. Yet another cost increase above the ATX baseline. Your stack of chips ain’t so tall after you’ve given away all of your winnings to the “dealer.” Ignoring the cost of their solution, COM advocates talk about interoperability and future upgradability. Double down, for sure. Bet all the chips on one number—that the x16 interface will still be there in processor generations to come. Ahhh, but which



PCIe generation (2.0 or 3.0) and how will the signal integrity be through the connectors as bus speed grows? Study your dealer’s face to see if he/she is bluffing. COMs provide an entire CPU subsystem on a single tiny module. After all, size is everything in the ever-shrinking COM game. You get processor, chipset, firmware, RAM, GigE LAN controller, along with a custom thermal solution consisting of either a fansink or heat transfer plate / spreader. How about those 14 billion transistors? The integrated graphics in the latest Intel Sandy Bridge platform are spectacular, with better AVX extensions and Turbo Boost and video+RAM+FPU+multiple cores on a monolithic die. AMD’s integrated ATI fusion graphics are quite impressive as well. Entrylevel gaming without a x16 graphics card. Certainly solves the lifecycle problem of using a consumer graphics card. Now take this up a notch from the mobile (notebook) class QM67 chipset to the desktop class Q67 chipset, with pin-compatible C206 server class chipset and long lifecycle Xeon E3-1220L dual core 2.20 GHz server processor below $200 and AT ONLY 20 watts. There isn’t a digit missing. Maybe it’s time to apply the Limit Theorem. The limit as i (integration) goes to infinity… everything on the COM module ends up on a single chip six years from now—no fiberglass, no expensive signal integrity-killing connectors—with performance that runs circles around today’s mobile 2-chip Core i7. Look at how far integrated graphics have come since the initial COM Express high-end embedded 3-chip platform (915 chipset) six years ago. SoCs already took over cell phones. They’re easy to lay down on a board, per the reference design. Tick-tock, tick-tock… Moore’s clock keeps on ticking, ticking, ticking into the future. Will we be once again back to customized SFF SBCs across the entire market by 2017? By then, COMs might be roadkill, with all various pinout types strewn along a dark desert highway to Vegas. Fire up the DeLorean, we’re going back to the future. Simply expressed as a math formula: lim COM(i) = SoC i→ ∞ Know when to fold ’em. Know when to walk away. Know when to run. As usual, comments about this topic can be mailed to

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editor’s report Advanced Memory Technology

1 Terabit on a Chip – New Memory Technology Rises to Challenge NAND Flash Memory devices without transistors but based on the migration of oxygen ions under an electrical field promise low-cost memory speeds and densities well beyond what is now available. by Tom Williams, Editor-in-Chief


new nonvolatile memory technolo- ing metal oxide and the other is a conducgy is gearing up to challenge high- tive metal oxide. The exact composition of density NAND Flash memory in these two materials is Unity’s key intellecboth commodity mobile devices as well as tual property. The conductive metal oxide in enterprise storage. It is being developed (CMO) acts as a reservoir of oxygen ions by Unity Semiconductor and is called that are pulled into and out of the insulatconductive metal oxide (CMOx). It is built ing metal oxide (IMO) under control of around memory cells that are connected an electrical field. The atoms themselves in a cross-point array and are not based obviously do not move, but the transfer on transistors, but rather a technology that of electrons causes the net charge on the uses the movement of ionic charge under atoms to shift. The shift of ions back and nies providing solutions control of annow electric field. The immediate forth from the IMO changes the resistivion into products, technologies andthat companies. Whether yourimplegoal is to research latest ity ofthethe cell. The IMO acts as a tunnel advantages are in the initial ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you barrier to limit current flow through the mentation, four layers of 2-bit multilevel you require for whatever type of technology, device. make it possible for the die to be aland productscells you are searching for. To read the cell, a small voltage of most three times as dense as a NAND die 1.0V is applied across it and the current of the same size, and it is based on a cell flow is measured to determine the “data” size that starts smaller than NAND and content of the cell. In the erased state, oxywill continue to be reduced in size. gen ions are distributed in the CMO layer The basic technical breakthrough of and the IMO layer is relatively free of oxyCMOx is that bits are stored in terms of moving ions rather than electric charges. gen ions. In this state, the tunnel current is A CMOx cell consists of a two-terminal relatively high so the read current through memory element between two electrodes the cell is high. To program the cell, an (Figure 1). One of these is a thin insulat- electric field of a higher voltage (2.5V) is put across the cell causing a migration of oxygen ions into the IMO with the result Get Connected of lowering the read current through the with companies mentioned in this article. cell. One of the tricks of this technology

End of Article



Get Connected with companies mentioned in this article.

is to be sure that the read voltage does not cause a migration of oxygen ions but that such migration will occur under the program/erase voltage of 2.5V. Erasing the cell simply involves putting a reverse 2.5V field across it driving the oxygen ions back into the CMO layer. The effects of these voltages on the migration of ions and hence on the amount of read current are quite nonlinear, and Unity has discovered that by changing the program/erase voltage, they can control the number of ions that migrate and thus can establish multiple read current levels at the same 1.0V read voltage. Since the effects are nonlinear, Unity has been able to determine thresholds on the current curve that reliably represent two levels, resulting in the ability to store two bits per cell. NAND is currently able to store up to three bits per cell, but COE Dave Eggleston indicates that given the other density and performance advantages of CMOx, he is currently happy with two bits per cell. That is not an idle decision given the fact that the initial commercial implementation of CMOx memory cells will be in a four-layer array (Figure 2) with FET decode logic underlying the cell arrays. The CMOx memory is not byte addressable like DRAM and PCM, but rather data is written and read as 4 Kbyte pages streaming at 200 Mbyte/s for write and 500 Mbyte/s for read. At the projected speeds and densities, Unity is developing a 1 Terabit chip arranged in 2 Mbyte tiles in a hierarchical architecture shown in Figure 3. With the MLC capability of two bits per cell, the capacity adds up to a Terabit on a single chip.

Moving to Commodity

The business model that Unity is following is almost as intriguing as the technology story because both are strategically aimed at making CMOx a commodity technology that will be produced by major semiconductor manufacturers, not limited to a proprietary process totally owned by and exclusive to Unity. That involves a strategy of joint process development and IP licensing aimed at a specific

editor’s report




(read Iread (pgm) ers)

vision of a mass market. That mass market turns out to be cloud computing that is accessed primarily by mobile devices, and bringing memory costs down to cents per gigabyte. According to Eggleston, the Cloud represents a huge potential memory market but one with quite different requirements on memory capacity and performance than today. When seen as an extension of mobile devices—both consumer, such as smart phones and tablets and more specialized mobile devices—the Cloud has the potential for petabytes of fast storage. But the emphasis is on fast, as in read/write speed, and also for fast search ability. Consumers especially will see the Cloud simply as an extension to their mobile devices, which today are capable of something like 8 to 64 Gbytes of internal memory. The experience of interacting with the Cloud should feel similar to their interaction with their devices. “Consumer expectations must be met,” Eggleston says, “or they’ll reject the notion of cloud computing. NAND is not a solution and that creates an opportunity.” Unity is therefore moving to leverage its patented technology in partnership with really big players, the first of which is Micron Technology. Having done years of basic research and development and accumulating some 120 awarded and pending patents, Unity has entered into a joint development partnership with Micron. The attraction to a commodity memory vendor is the idea that basically the same fab equipment can be used to produce a technology that will at least double if not triple the bit output per wafer of the fab facility. Under the partnership agreement, Micron is adapting the “recipe” to its fab equipment to be able to manufacture the devices. Micron has a two-year exclusive head start, has acquired an ownership stake in Unity and will receive very favorable royalty rates. The commercialization stage will see other license agreements with large memory players such as Samsung and Toshiba. Eggleston emphasizes, “To be successful, it’s got to be a commodity. We’ve never seen a memory technology successful

Program Voltage = +2.5V


BE -1.25V

Figure 1 In its unprogrammed state, the CMOx cell is passing a relatively high read current due to the fact that there are no oxygen ions in the tunnel barrier insulating the metal oxide layer. When a programming voltage totaling 2.5V is applied, ions will be driven into the IMO layer increasing resistivity and resulting in a lower read current. To reprogram (erase) the opposite programming voltage is applied.


L3 X1

L2 Y1

L1 X0


Figure 2

CMOx Memory Cell TE (anode) IMO (on top) CMO (on bottom) BE (cathode)

The first commercial implementation of CMOx memory foresees a four-layer structure with each cell capable of storing two bits. CMOS decode logic will underlay the cross-point memory array.

where only one company has it.” So CMOx is going to be going after the NAND markets not only in mobile handsets and tablets but also in mass storage systems like enterprise SSDs as well as in what seems

to be the Holy Grail, Cloud computing. In addition, it is to be presumed that licensees of the scale of those being targeted will not simply remain customers but will also develop innovations based on the underlying RTC MAGAZINE SEPTEMBER 2011


editor’s report

CMOx Storage Chip (4k x 128 x 4) x 128 =256Mb per Brick

[ (4k x 128 x 4) x 128 ] x 16 = 4Gb per Sub-Plane

Memory Tile

Page is 1 row of cells across 16 Tiles/Bricks

ÂľC Ana 125MB/s

Plane 2

Plane 1

Plane 3

“Erase� Block is 1 row of Tiles across 16 Bricks Plane 0 (32 Sub-Planes)

Brick = 128 Tiles

Sub-Plane = 16 Bricks

(4k x 128 x 4) x 128 x 16 x 32 = 128Gb per Plane x4 = 512Gb x2 (MLC)


ÂľC Ana 125MB/s




ÂľC Ana 125MB/s


Master ÂľC

ÂľC Ana 125MB/s

PB/$ I/F

>500 MB/sec Read >200 MB/sec Write

technology. Unity already expects, once the commodity business appears to be on track, to begin developing specialty chips based on CMOx technology. If CMOx really is successful in its targeted applications and markets, it will mean that further developments will undoubtedly be the most fascinating to watch. Also, the prediction here is that it will be subject to the Williams Law of Technology Utilization, which clearly states, “The original inventor of a new technology never has the faintest idea of how it will ultimately be used.� Stay tuned. Unity Semiconductor Sunnyvale, CA. (408) 737-7200. [].

≼500MB/s I/F

Figure 3 The first CMOx storage chip will be a one Terabit device built up of a hierarchical architecture of memory tiles, bricks and planes. 4 Kb page-based operation will be able to write data at about 200 Mb.

Micron Technology Boise, ID. (208) 368-4000. [].

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Untitled-8 1



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Technology in


Open VPX in Commercial Applications

Updated Attributes Bring VME Beyond Military with OpenVPX Size, power and weight; flexibility, ruggedness and cooling—all have improved with the VPX specification. While the new spec appears to be gaining solid ground with the military, there are also plenty of commercial applications that can make good use of its attributes. by Steve Gudknecht, Elma Electronic


ITA 46, more commonly known as VPX, was developed to improve the performance of VME technology and bring it in line with more advanced standards to ensure its longevity. Initially developed in 2004 through VITA, VPX has blossomed to not only include readily available products and systems, but also movement of this technology into markets not traditionally associated with its predecessor, VME. That’s not to say VME has gone by the wayside. In fact, a main goal in VITA’s development of VPX was to ensure support for the traditional parallel VMEbus. With as large of an installed base as legacy VME has, a nextgeneration version of this technology needed to embrace that structure, while making inroads into the technology path for the future. While bridging schemes built into VPX provide a solid migration pathway, VITA has also mandated the following attributes be included in the VPX specification: • 3U and 6U formats • 7-row high-speed connector rated up to 6.25 Gbit/s • Choice of high-speed serial fabrics • PMC and XMC mezzanines • Hybrid backplanes to accommodate VME64, VXS and VPX boards By including some key parameters of VME, proven to withstand the test of time and the rugged environments of military and



aerospace applications, along with the upgrade of this specification, VPX is poised not only to maintain its stake in its markets, but also to find a new home in additional ones.

Origins of the Initiative

Large organizations and government agencies with a significant stake in VME themselves, including the U.S. Department of Defense, mandated an improved implementation of open standards and interoperability. VITA 46 itself was left too open ended in terms of how individual suppliers could interpret various portions of the specification. Having gone through this chain of events in the past, where great concepts fall short in the implementation by supplier fragmentation and lack of compatibility, the embedded community took a proactive stance. OpenVPX, or VITA 65, was established within the VME community to further define the interoperability of the VPX standard. This was done in terms of module and backplane designs, including defining pin outs, and setting interoperability points within VPX, while maintaining full compliance with VPX itself. What this also did was set the stage for OpenVPX to be used in a broader range of applications.

Opening a New Door

In addition to setting a framework for interoperability among VPX boards and

components, OpenVPX has introduced new concepts in the VITA fabric-based system architecture, most notably concepts initially introduced in VXS (VITA 41) and ATCA (PICMG 3.0), which include splitting the data and control planes used in backplane networks between blades. OpenVPX provides a set of constructs and serial interconnect lane definitions that allow a description of the module pin-out and protocol, slot pin-out and backplane interconnects, known as profiles. Various lane topologies, defined as pipes, are groupings of bidirectional differential pairs that can be connected point-to-point or run to, and through, switches. Pipes have different widths, from ultra thin (UTP), thin (TP), fat (FP) and double fat (DFP) to quad fat (QFP) and octal fat (OFP), which allow higher interconnect bandwidths (Figure 1). The interconnect scheme is protocol agnostic until the protocol is defined within the module profile, a critical component of OpenVPX that provides the first-order check of operating compatibility between modules and slots as well as between multiple modules in a chassis. Geared toward VPX-based component and system interoperability, this new approach to backplane and system design provides a higher degree of flexibility than in the past, but it also adds new areas of consideration for the systems integrator.

technology in context

BKP3-CEN-15.2.2-n 1 Switch + 5 Payload or Peripheral

Meeting Current Data Demands

When considering data storage, sometimes it’s unclear as to what is more critical: the need to store more information or the ability to store more information using the latest high-capacity storage solutions. In some applications, the same may be said regarding I/O bandwidth and data processing. OpenVPX and the system architecture it enables, brings with it the ability to transport and process more information than ever before. In military applications involving multi-sensor, high-definition real-time data processing, however, it’s clear that need drives the performance. This is especially true in a time of shrinking military budgets and increasing political pressures that continually reduce the number of troops on the ground. Although troops are pulled out, the threat remains and technology is left to fill the gap. As a result, VPX systems are turning up in sophisticated military hardware—in both manned and unmanned systems— operated locally or half a world away. So what becomes of VPX and all its capabilities when considering non-military applications? How can OpenVPX add value to existing non-military application spaces such as medical, industrial, transportation and communications?

Size Considerations

While providing the same benefits that have enabled VME to proliferate throughout several decades of deployment, OpenVPX offers high levels of tolerance to environmental extremes, especially regarding temperature, shock and vibration. However system size, in relation to computing power per unit area, may be the single most important factor in the adoption of OpenVPX for non-military applications. OpenVPX offers the promise of increased processing power in tighter spaces, which ties in with an environmental advantage of this specification. Namely, the 3U form factor in OpenVPX allows designers of non-military systems to scale down from larger 6U VME

Payload Slots Slot numbers are logical, physical slot number may be different

Switch/ Management






Expansion Plane (FP)

Expan Plane

Expan Plane

Expan Plane

Expan Plane

Expan Plane

Data Plane (FP)

Data Plane

Data Plane

Data Plane

Data Plane

Data Plane

Data Switch


Control Plane (UTP)

Contrl Plane

Contrl Plane

Contrl Plane

Contrl Plane

Contrl Plane

Contrl Switch


Management Plane (IPMB)








Utility Plane Includes Power Figure 1 Sample backplane profile showing fat pipes and ultra thin pipes.

systems while improving processing capability, decreasing system footprint and improving environmental performance. Industrial PC users, already used to small form factors, will benefit from longer life cycles expected in VPX-based board products. Reducing the system footprint in these space-constrained, harsh applications may solve other problems related to a particular application, such as overall equipment cooling and maintenance, while guaranteeing an upgrade path by using the latest boards available. Advances in FPGA technology also help reduce OpenVPX system size, further advancing its wider adoption in rugged commercial applications. OpenVPX’s extremely high I/O bandwidth drives the need for

FPGA solutions, necessary to avoid processing overload with the new data flow capability. As a result, FPGA development is at an all time high with new products integrating everything from CPU cores to I/O controllers. This accelerated integration pace enhances system footprint reductions, putting more capability into smaller, rugged boxes.

Implementations Beyond the Traditional

Applications requiring operation in rugged environments will be among the first non-military adopters of OpenVPX. Industries such as oil exploration and mining can benefit from OpenVPX, since they share many common concerns with military applications, such as the need for realRTC MAGAZINE SEPTEMBER 2011


technology in context

Figure 2 Example of a 3U VPX dual-core SBC used in large mesh designs or for sending heavy traffic on particular backplane segments.

time multi-sensor processing in demanding environments. Improved safety and better, more efficient exploration techniques in both industries boost the number and quality of sensors and sensing equipment used to manage work sites (Figure 2). OpenVPX and its processing prowess will encourage the use of improved sen-


Untitled-13 1


sors for higher quality signals as well as the use of more of them. To think otherwise is to say that the current technologies in rugged commercial industries, such as mine and oil exploration, are “good enough.” In reality, it’s almost inevitable that the capabilities of VPX, and similar advancements, will find application in

these industries, when the performance and ruggedization benefits are realized. Commercial satellite communications are another area that can benefit from OpenVPX’s traits, for largely the same reasons. Satellite communications have as much, or even more, in common with many military applications. Additionally, cellular technology and the rapid proliferation of worldwide connectivity drive the need for faster processing capability in smaller packages. Early detection and diagnosis of cancer and other diseases in medical screenings is critical to the treatment and survival of patients. Improvements in image quality and scan time enable doctors to react as quickly and precisely as possible. And, better quality images help reduce re-scanning made necessary due to inadequate data derived from the initial scan and thereby limiting a patient’s exposure to unhealthy radiation levels. This higher resolution imagery drives higher bandwidths in MRI machines and CT scanners, and OpenVPX provides the capability for handling, storing and disseminating that extra data flow. Given the

3/31/11 4:26:15 PM

technology in context

higher level of integration afforded by the OpenVPX architecture, and the resulting reduced footprint, the size of imagery equipment can be decreased as well. The proliferation of mobile medical equipment can also benefit from VPX, since the architecture was designed from the beginning for rugged environments. In addition to being well suited for the rigors of mobile applications, the 3U form factor enables designs that will fit into smaller packages, yet deliver the performance necessary for scanning and diagnostic purposes.

system integration is now an even more critical factor. For the design engineer, the task of specifying a backplane may seem to have become a bit more complex, as it will require an understanding of module, slot and backplane profiles as well as an understanding of interconnect topologies. But with its multiple fabrics, protocols and higher speeds, OpenVPX has put the legacy of VME and the flexibility of best-in-class computing architecture back

in the embedded computing driverâ&#x20AC;&#x2122;s seat. Any application requiring rugged electronics, high-speed architecture and flexible configurations will find OpenVPX a welcome next-generation version of a tried and true technology platform. Elma Electronic Fremont, CA. (510) 656-3400. [].

On the Horizon

As designers embrace the new OpenVPX standard, specific interconnect concepts and constructs defined by OpenVPX must be adhered to in order to build an extensible set of defined topologies for not only military and aerospace applications, but also for a larger base of rugged embedded systems. Although the fabric topologies may not look recognizable to the system architect familiar with previous VME standards, the COTS ecosystem for VPX will remain a critical aspect of this new VITA architecture. The VPX backplane architecture defines mesh and star topologies and allows for hybrid topologies. The VITA 65 document defines a number of central switched dual star architectures to be implemented in a 6U VPX Eurocard form factor, eliminating the connector-hungry parallel bus architecture, yet offering a far greater data bandwidth. For users who know PICMG 2.16 or PICMG 3.1 (Ethernet over cPCI or ATCA), the dual star fabric will be familiar. In the new architecture, interconnect is point-to-point, or done through a fabric switch. The notion of standard backplanes and a single fixed fabric topology has now been replaced by a set of backplane profiles that implement a set of flexible architectural features.

Gearing up for Better Computing

Higher performance comes with the new connectors, multiple fabrics and differential signaling. OpenVPX boards that support popular fabrics such as 10G Ethernet, PCIe Gen 1 and 2 as well as Serial RapidIO are now readily available. With the growing complexity of data needs and processing demands, overall Untitled-3 1


2/16/11 9:49:01 AM RTC MAGAZINE SEPTEMBER 2011

ploration your goal k directly age, the source. ology, d products

Technology in


Open VPX in Commercial Applications

CompactPCI Serial Challenges VPX as Embedded Shifts to Serial Pointto-Point Architectures The last few years have seen the parallel PCI bus technology incorporate an increasing number of fast serial point-to-point connections, slowly changing the structure of computing systems. Bus-based systems have morphed into ones using star topology connected by serial point-topoint connections, but modular computers are still needed in industrial environments. by Barbara Schmitz, MEN Micro


considerable number of new serialbased standards have been created, which—unfortunately—were optimized for special markets or applications (a) (b) during their initial development. Only two of the more recent standards have embraced the proven 19-inch technology and the single or double Eurocard format to create a migration path from legacy technies providing solutions now serial interfaces: Comnology to current ion into products, technologies and (PICMG companies. Whether your goal is to research the latest pactPCI Serial CPCI-S.0) and ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you VPX (ANSI-VITA 46.0). you require for whatever type of technology, Figure 1 Assearching early as and products you are for. 1981, the Versa Module Connector scheme and backplane. Eurocard bus (VMEbus) was developed by a consortium lead by Motorola and Philips, then standardized as ANSI/IEEE ing, telecommunications, aerospace and contested choice for robust, modular bus1014-1987 by the IEC. It was originally especially in military engineering. As the based systems with a passive backplane. Some 15 years later, around 1994/95, conceived to be used with the 68000 PCI bus was not yet known, communicaZiatech and Pro-log presented a concept tion on the backplane was developed from Motorola processor family in control for modular computers based on PCI bus scratch. systems. Soon, VMEbus supported both plug-in cards in a Eurocard format conThe original VMEbus was equipped RISC (e.g., PowerPC) and CISC (e.g., x86) architectures and established itself in with a 16-bit data bus and a 24-bit address nected to a passive backplane. The conindustrial automation, medical engineer- bus; the advanced VME64, which fol- cept was called CompactPCI (PICMG 2.0) lowed next, offered a bus width of 64 bits and soon more companies like Motorola, with 80 Mbit/s while VME320 (2eSST) Radisys, Intel and Lucent showed interest, Get Connected then provided a higher data rate of 320 participating in the standardization—one with companies mentioned in this article. Mbit/s. VMEbus had long been the un- of the first ever PICMG standards.

End of Article



Get Connected with companies mentioned in this article.

technology in context

Up to 600Gb/s

Backward compatibility across platforms 10..25Gb/s 1Gb/s





PCI 64-bit PCI 32-bit

PCI 64-bit PCI 32-bit



PICMG 2.0 (1999)

PICMG 2.0 PICMG 2.16 (2001)

4x1 PCI-E PCI 32-bit


up to Gen2

6x4 PCI-E up to Gen3 PCI 32-bit

2x8 PCI-E up to Gen3

“CompactPCI Plus I/O”

“CompactPCI Serial”

PICMG 2.30 (2010)

PICMG S.0 (2011)

Up to 4xGE Up to 10xGE




Figure 2 CompactPCI Serial Roadmap and specs comparison.

The success of the CompactPCI bus enabled a high market penetration for industrial, reliable systems. It became the most important standard in the telecommunications industry. But it also soon moved into markets traditionally occupied by the STD bus or the VMEbus, such as medical, engineering, measurement and transportation. CompactPCI was cleverly based on the IEC 1101 mechanical standards for Eurocards and 19-inch systems known and proven from the VMEbus. Finally, conductive cooling solutions were also included, so that even military applications could benefit from CompactPCI.

Hybrid Solutions – CompactPCI PlusIO and VXS

With the increasing use of fast serial point-to-point connections in peripherals and functions, different interface standards have been taking root. For example, SATA and SAS are interfaces for mass storage devices like hard disks, and USB has established itself for Wi-Fi components as well as for loosely coupled peripheral devices, including keyboards, touch screens and external hard disks. Besides traditional network technology, Ethernet is also used as an interface for multiprocessing and as a fieldbus for decentralized I/O, while PCI Express is used for connection of closely coupled computer peripherals. These interfaces



coexist, each with its own special range of applications. A modern computer needs all of them. Unlike in the past, however, they are not connected to separate controller chips by way of a bus. In modern chipsets, all these interfaces are directly available at the chipset. This is where that transformation from a bus-based system to a system with a star topology connected by serial point-to-point connections takes place. But how are these technologies applied to industrial systems and how can you keep their modularity? What’s more, many applications require a smooth migration because of the large inventory of systems already in the field—in other words, an evolution instead of a revolution to preserve existing hardware and software investments. For VMEbus, VXS (VITA 41) ensures backward compatibility, i.e., VXS boards are mechanically (19-inch and Eurocard format with 0.8” board distance) and electrically (P1 and P2 connectors are maintained) compatible to VME and VME64 systems. Using a 7-row multigig RT2 connector, they offer fast serial communication via InfiniBand, Serial RapidIO, Aurora, PCI Express and Gigabit Ethernet. The theoretical bandwidth is up to 3 Gbit/s per slot. CompactPCI uses the same newly defined connector in its PICMG 2.16 extension—calling it J3, while VXS calls

it P0. However, this extension is limited to 6U boards for VXS and PICMG 2.16, so compact solutions cannot be implemented. In addition, SATA and USB are excluded, since Ethernet and PCI Express are the widely used serial interconnects in the PC world. VXS systems also need a switch board or a corresponding slot at the backplane, with star and double star configurations differentiated. Figure 1(a) shows the CompactPCI PlusIO—left white connector is CompactPCI 2.0, right black connector is CompactPCI 2.30 (3M). It plugs into a standard CompactPCI 2.0 backplane slot, this is why you don’t see a difference between the backplane connectors. Reason: The serial interconnects of PICMG 2.30 occupy the free (user-definable) pins of PICMG 2.0. The black connector is the same 2 mm connector as the white one, but heavier. It has metal layers inside to support the much higher frequencies of the serial interfaces. The hybrid backplane example (Figure 1b) comes with 1x CompactPCI 2.30 system slot in the middle, 3x CompactPCI 2.0 peripheral slots to the left, 4x CompactPCI Serial peripheral slots to the right. For 3U boards, PICMG is at least three steps ahead. Although CompactPCI Express (PICMG EXP.0) was introduced some years ago, the adoption of CompactPCI PlusIO (PICMG 2.30) that followed in 2010 quickly superseded this interim specification. While CompactPCI Express was limited to a single serial interface type—PCI Express—and not compatible with CompactPCI due to new connectors, CompactPCI PlusIO has learned its lesson from the standards of the early 2000s. As the name suggests, PICMG 2.30 is an extension of the original PICMG 2.0, fixing the pin assignment of the J2 connector that had been free before, while providing four PCI Express, four USB, four SATA and two Gigabit Ethernet interfaces. The new, perfectly shielded connector supports differential signals with over 2.5 Gbit/s, while being 100% compatible with the previous 2 mm connector, making CompactPCI PlusIO backward compatible to CompactPCI and supporting all current serial interfaces. In addition, it can be used both for 3U and 6U board formats.

technology in context

Since CompactPCI PlusIO needs no switch boards in the system, and the highspeed connector is low cost, it is an extremely economical option. CompactPCI PlusIO system slot boards can be used in both CompactPCI and hybrid systems with CompactPCI Serial peripheral slot boards. It’s an independent concept for applications with mixed parallel and serial communication requirements, in contrast to VXS.

not yet officially adopted by VITA. VPX not only works with different interconnects, but also with different communication architectures requiring certain switches or bridges depending on the overall system build-up—except for some mesh configurations, which can do without a central switch. OpenVPX (VITA 65, adopted in 2010) now tries to lift the separate parts of the VPX specifications from the board level to the system

level in an attempt to rectify the multiple interoperability problems. OpenVPX defines a system architecture that manages and limits board and backplane designs, including the definition of pin assignments, physical addressing, line definitions for serial communication (corresponding to PCI Express links x1 to x16), structure and hierarchy profiles, levels for utility, management, control functions, data and extensions. Accordingly,

Arriving at a Serial Destination – CompactPCI Serial and VPX

“Pure” serial system standards for the industry do exist, and they’ve arrived just in time for data-hungry applications with high visualization, image capture, memory and multiprocessing requirements. However, only two are modular and robust enough for harsh environments without limits: VPX from 2007 and the recent CompactPCI Serial from 2011. Both rely on the proven IEEE 1101 mechanics—single and double Eurocards and 19-inch technology—that provide important functions for safety and reliability such as hot-plug/hot-swap and good heat dissipation, including conductive cooling. To be successful, a specification must inherently include modularity and robustness, not implemented as an afterthought, as in standards such as ATCA and MTCA. VPX, based on VMEbus, is the successor of VXS with the robust 7-row multigig RT2 connector as its most striking innovation. For 6U boards, VPX provides 464 signal pins, 32 of which are differential pin pairs for serial interconnects and 128 pin pairs for customer-specific I/O. The complex connector, built up in a 16-layer wafer technology, supports transfer rates of up to 6.25 GHz with less than 3% crosstalk. Although VPX supports a whole string of fast serial fabrics, they are described in extra specifications separate from the base specification, which only defines the mechanics and electrics of standard VPX. In addition to PCI Express and (10) Gigabit Ethernet, Serial RapidIO, Fibre Channel and the signal routing for rear transition modules and for PMCs or XMCs are all described separately. And many of these auxiliary specifications are Untitled-4 1


8/10/11 4:54:44 PM RTC MAGAZINE SEPTEMBER 2011

technology in context

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Untitled-5 1


8/3/11 9:58:27 AM

G20, MEN’s first SBC is based on the newly ratified PICMG CPCI-S.0 CompactPCI Serial specification. It uses the 64-bit Intel Core i7 with a base processing speed of 2.53 GHz that supports Intel Turbo Boost Hyperthreading technology to provide a maximum speed of 3.20 GHz.

there are backplanes with topologies that are branched, distributed or managed via a central switch. And, there are different pin assignments for the system slot (“payload slot”), peripheral slot and switch slot. The base specification and the notyet-adopted sub-specifications (i.e., VITA 66, 67 and 68) also deal with extensions and additions to the original VPX standard (VITA 46). Even though VPX is not backward compatible to VMEbus, customer-specific hybrid backplanes allow connection with VME64 and VXS. CompactPCI Serial has been developed in parallel with CompactPCI PlusIO for hybrid systems based on CompactPCI. Here, too, a more dense connector with 184 pin pairs (368 pins) per 3U board (AirMax from FCI or Amphenol TCS) guarantees transfer rates of up to 12 Gbit/s and more, with less than 3% crosstalk (Figure 2). The new codable connectors resemble the old 2 mm types, but up to six connectors per 3U board can be used. And, with their own walls, they’re much more robust and protected against incorrect plug-in that damages the connectors. Headers placed on the board avoid twisted pins on the backplane, and the board dissipates up to 60W with a voltage supply of +12V. In addition to mezzanine boards, such as PMC and XMC, used with Com-

pactPCI Serial, special mezzanines can be plugged directly into the backplane via AirMax connectors that are turned 180°. The base CPCI-S.0 specification explains the complete system architecture including rear connection, the build-up of transition modules and the mechanics for systems with conductive cooling. Compared to VPX, CompactPCI Serial is a very simply implemented architecture, being plug-and-playable in every sense of the word: a star for PCI Express 1 and 2 (optional SRIO) as well as SATA/SAS and USB 2.0/3.0 combined with a full mesh for Ethernet based on the 100/1000/10GBase-T standard. CompactPCI Serial does not require any switches or bridges in systems with up to nine slots, and up to 21 slots can be implemented in a 19-inch housing with a bridge. The pin assignment of all peripheral slots is 100% identical. The system slot supports a total of six PCI Express links with up to four lanes each, two links with up to eight lanes, eight SATA/SAS interfaces, eight USB ports, eight Ethernet interfaces and a number of signals for supporting these interfaces and for general system management (reset, IPMB, hot plug, geographical addressing, etc.). Accordingly, there is one PCI Express, SATA/SAS and USB on every peripheral slot, each supporting up to eight Ethernet interfaces. All interfaces are always simultaneously available. For standards like Mini PCI Express, which expects USB as well as PCI Express support, this is an important attribute. The system slot CPUs can also be plugged into any peripheral slot and used to build multiprocessor systems without additional overhead. Communication is done via Ethernet (star or mesh). Physical addressing—defined for VPX by the separate OpenVPX specification—is simple and convenient for CompactPCI Serial. It uses the automatic configuration mechanisms of SATA, PCI Express and Ethernet and is compatible with standards like SFF-8485 for hard disk RAIDs. To ensure compatibility among different manufacturers, CompactPCI Serial defines the order in which interfaces must be implemented on the system slot, if all eight are not supported. Looking ahead, CompactPCI Serial

technology in context

will correspond to the chipset architecture in the mobile and server markets in the coming years. System configuration can then always be done in an optimal and cost-effective way, based on a wide range of COTS components. Equally, a wide range of applications, from a simple industrial PC via I/Ointensive data acquisition and processing up to highly complex computer clusters, can benefit from this structure. Independent of any market, CompactPCI Serial is at home where robust computers have to perform their tasks reliably, and where safe equipment is required for the protection of life and the environment.

The Choice for Each Industry

Both the CompactPCI Serial and VPX standards are the best that the market has to offer at the moment regarding robustness and reliability. However, potential users should carefully consider which system features are needed, and at what cost. There might very well be some industrial or civilian applications, where the higher costs of a VPX system are justified, especially when the NRE purchase costs are too high anyway. In that case, however, enough time should be scheduled to familiarize oneself with VITA 46, 48, 65-68 and all the sub-specifications— while CompactPCI Serial only consists of a single base specification. Even at the board level, higher costs are incurred due to the complex VPX connector, which provides fewer signals and offers no advantages regarding speed, safety or robustness compared to the CompactPCI Serial connector. On the other hand, CompactPCI Serial offers no special interconnects such as Serial RapidIO or Aurora—but does offer the whole range of serial interfaces just like any PC. Management controller hubs, switches and bridges not only cost money, but make systems more complex as well. In other words, more expensive to maintain. Whatever their purpose, such as connecting a slot with the right interface, CompactPCI Serial can completely do without these components, even in a complex multicomputer system. CompactPCI Serial doesn’t require additional overhead for software adaptations, either (Figure 3).

The high number of possibilities when configuring VPX systems eventually causes problems with interoperability, which OpenVPX tries to reduce. Nonetheless, the multitude of options makes it almost impossible to exchange plug-in boards of different manufacturers one-to-one, and application-specific backplanes versus standard backplanes are the rule rather than the exception. The strictly standardized pin assignment of CompactPCI Serial, on the other hand, enables most applications—simple or complex— to be built of mainly standard boards and backplanes with no or very small NRE costs. As effective cooling is also required from time to time in civil applications, such as planes, trains, buses and mobile machines, CompactPCI Serial also specifies a CCA frame for boards and the corresponding infrastructure for conductive-cooling systems. And to save costs, standard assemblies do not have to be redesigned for a conductive-cooled environment, which would reduce available space on the PCB. Instead, they are equipped with a CCA frame. The last cost factor is the power supply unit (PSU). For its 5V/12V/48V strategy, VPX also needs more complex PSUs, but CompactPCI Serial defines a single 12V supply and can use COTS PSUs. VPX and CompactPCI Serial: two solid standards with many things in common, but two different worlds regardless, separated by cost and complexity. What is suitable for military and defense applications may not necessarily be right for other cost-conscious markets. Any complex computing architecture will cost money, but CompactPCI Serial’s price/ performance ratio is a critical factor in evaluating its use in a variety of embedded applications. MEN Micro Ambler, PA. (215) 542-9575. [].

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Untitled-13 1



9/7/11 8:56:20 AM


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IPv6 Gets Ready for the Smart Grid and the Internet of Things As intelligent devices proliferate into diverse and special-purpose networks, the enhanced address space, routing and security features of IPv6 will be required for universal connectivity. by David Ress, Sensus and Mark Grazier, Texas Instruments Incorporated

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f all the global protocol standards, not completely issue free, the results IPv6 for the Smart Grid Connected and were promising, with withtechnology major participants IP remains the single unifying Get The most commonly referenced modcompanies providing solutions now reporting no significant problems. Along els of the Smart Grid (SG), such as those layer that enables any device anyConnected a new resource further network exploration with severalis examples offorIPv6 where to identify and communicate with Get defined by the OpenSG and IEEE P2030, into products, technologies and companies. Whether your goal deployments on smaller scales, these reanother. Unfortunately IPv4, which has depict a series of interconnected networks is to research the latest datasheet from a company, speak directly sults suggest thatto the technology ready been serving the Internet for over including Field Area Networks (FAN), withthree an Application Engineer, or jump a company's technicalispage, the of Get Connected is tolarge-scale put you in touchmigration with the rightover resource. to support the Advanced Metering Infrastructure (AMI), decades, has nearly exhausted its goal address Whichever level next of service you require for whatever type of technology, several years. Additional informa- Home Area Networks (HAN), substaspace. At the same time, the emergence Get Connected will help you connect with the companies and products tion on IPv6 Day including the list of tion networks, and even the Internet. The of smart sensor networks comprising the you are searching for. participants is available via the Internet â&#x20AC;&#x153;Internet of Thingsâ&#x20AC;? (making everyday, breadth of such a network demonstrates ordinary objects smarter and connected) Society and the World IPv6 Day entry on the value of IP as the common network is introducing millions of new IP con- Wikipedia. layer. IPv6 has emerged as the standard In addition to core IPv6 maturity of choice across industry consortiums and nected Smart Objects commanding an explosion in demand for IP addresses. across the Internet, the IETF and other standards bodies addressing the Smart With a theoretical address space of 340 groups are driving contributions that Grid. Utilities are embracing this new diGet Connected technology companies providing solutions now through plans to enhance make IPv6with viable for and resource-conundecillion (or 3.4x1038) and additional rection as shown Get Connected is a new resource for further exploration into products, technologies and companies. Whether(DA) your goal is to research th strained smart objects and the low power benefits such as stateless auto configuratheir Distribution Automation and datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connect and lossy networks (LLNs) that connect tion, simplified header structure, incluAMI networks to become IPv6-enabled in touch with the right resource. Whichever level of service you require for whatever type of technology, them.willThe IETF working sion of multicasting as a base capability, and through the identification of Get Connected help you connect6LoWPAN with the companies and productsSUNs, you are searching for. and mandatory support of IPsec, IPv6 is group is defining mechanisms for header key new applications and services that well suited to take the helm from IPv4 as compression and fragmentation in sup- will leverage this core technology. the principal networking layer. Despite port of these objects and LLNs that are seeing limited deployment since its in- often just referred to as 6LoWPANs. Smart Grid Applications on the troduction in 1998, it may now be ready Additionally, the IETF Core working SUN group is providing a framework to enable for prime time. According to Dan Nordell of XCel On June 8, 2011, a day commonly RESTful web services to work efficiently Energy, we should expect IP to pave the known as World IPv6 Day, the Internet on 6LoWPANs, and the IETF ROLL way for utilities to create more distribSociety organized a global scale trial working group is defining route proto- uted intelligence in the networks. This is of IPv6 across more than 400 forward- cols for use in mesh-based LLNs. Mean- in contrast to the centralized master-slave looking organizations including search while, the IEEE 802.15 working group is layer 1 and layer 2 standards apengine companies, socialGet network web- with defining Connected companies and Get Connected plicable to smart utility networks (SUNs) sites, Internet backboneproducts providers featuredand in this section. with companies mentioned in this article. content distribution companies. Although and 6LoWPANs.


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models that dominate the industry today. Peer-to-peer communications between intelligent endpoints in DA networks can enable rapid corrective action procedures to be implemented by Intelligent Electronic Devices (IEDs) in response to fault conditions. For example, a fault near the feeder relay of substation A shown in Figure 1 could trigger an IPv6 dialog on the FAN between the recloser control and tie switch control, which could effectively first isolate the fault and second restore service by enabling the secondary feed (substation B) to provide power. IED SUN Head-end


other prime example where applications will benefit from use of IP as a ubiquitous network layer.

Addressing Plans for SUNs

Certainly the 128-bit address space of IPv6 appears to accommodate the vast addressing needs of the Smart Grid, Internet and private enterprise alike. IPv6 theoretically has an address space sufficient to assign hundreds of thousands of addresses to every ant in the world and still have enough left over for people to get a few thousand each too. In practice, Utility NoC


Third Party Application Providers

Demand Other Smart Other Smart Energy DMS Response Energy

Wide Area Netowrks Substation Gateway

DA Field Area Network

Substation A Network Regulator Control


Relays Voltage Regulator

Smart Utility Networks

collector collector


collector collector AMI Network


Substation B Network

97 76 $125

Feeder Relay

Substation A

Recloser Control

Tie Switch Control

Recloser Control

Remote IEDs


Meters, ESIs

Voltage Regulator

Substation B


97 76 $125


HW Bridge


Home LAN

Figure 1 AMI and DA FAN Networks are evolving to become IPv6-enabled SUNs, which are an integral part of the IPv6 Connected Smart Grid.

vendors have taken note and are delivering IP-enabled IEDs for remote deployment on FANs. Nordell is interested in going even further with peer-to-peer applications and envisions similar services between electric meters. Peer-to-peer communication is certainly not the only new application model available to utilities operating an IPv6 SUN. Applications hosted in an operations center can be designed to interact directly with smart objects on the SUN. For example, a demand response application may communicate over IP directly with a load control module to perform a load shed event or could even use IP multicast signaling to efficiently distribute a load shed event en masse. The emergence of plug-in electric vehicles (PEVs), which by nature are nomadic and could appear at any point in time on different network segments within the Smart Grid, is an-



however, IPv6 may not yield the address space expected without some tricks, and utilities will need to provide due diligence in deciding how to organize their address space. Consider the default organization of the IPv6 address. The 128 bits are sliced in half with the upper 64 serving as the general network prefix and the lower 64 as the interface identifier. Of the upper 64 bits, 16 were intended to be used for subnetting with customers such as utilities typically receiving a /48 network prefix supporting as many as 65,536 subnets. In theory, a utility could assign a single subnet to a SUN and never possibly deploy enough meters, remote terminal units (RTUs) or other endpoints to consume the whole space. A potential challenge however is that endpoints on a SUN network may actually serve as IP gateways (routers) to subtended networks. An RTU

may have multiple IEDs behind it while a home area network (HAN) may subtend a meter on the AMI network. In such cases, each SUN endpoint would require a subnet prefix in order to provide IPv6 routing to subtended endpoints. At one subnet per HAN then, the typical /48 address space effectively only addresses 65,536 consumers. Borrowing a few bits from the remaining 48 dramatically improves the situation, however, as a /46 offers over a million subnets and /44 over 16 million. At present, this addressing prefix dilemma has received little attention for a couple of reasons. For one, DA networks tend to consist of a few thousand rather than a few million endpoints. Secondly, the ZigBee Alliance Smart Energy specification, which is the prevalent model for supporting services to consumers on HANs today, does not expose individual HAN endpoints as globally routable. Instead, an energy services interface (ESI) acts as an application gateway between the HAN and the AMI network and effectively isolates the HAN from the address space of the SUN. The ESI-centric model for bridging the SUN and the HAN is presently well established throughout the industry. However, with end-to-end IPv6 connectivity becoming ubiquitously available across the SUN, history would suggest that competing models will emerge that embrace the end-to-end IP application philosophy. On the DA front, the introduction of costeffective IPv6-enabled line sensing and distribution transformer monitoring devices could increase the number of endpoints by an order of magnitude. These possible evolutionary paths for HANs and DA suggest that initial addressing models may be revisited and should maintain some flexibility for future growth.

Security in the SUN

As with any Smart Grid application, security is paramount. Nordell and other industry security experts such as Sandy Bacik of EnerNex, agree that while SG Cyber security requirements are progressing and improving, we still have a long way to go to evaluate the risks and complete the security suite. While IPsec is explicitly included as a component of

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IPv6, it has not presently garnered much attention for securing either the HAN or the SUN. Link layer and application layer security tend to be favored presently and are sufficient for most current applications, which tend to be designed around this kind of security model. IPsec should not be dismissed just yet, however, as the nature of utility applications is set to evolve with the availability of globally routable IPv6 capabilities on the SUN. IPsec transport mode could become an effective way to provide twoway authentication and encryption for end-to-end IP applications that traverse several layer 2 sub networks across the Smart Grid. While the upside of the IPsec security model is compelling, challenges associated with key management and key exchange are not trivial, and to date there has not been deployment on any large scale on either IPv4 or IPv6.

Remote Server Internet

Local Server Backbone Link

Backhaul Link

Edge Router R


Edge Router R



Edge Router R










Simple LoWPAN


Extended LoWPAN




Application Protocols for the SUN

IP offers developers many choices of application protocols in delivering new services. When building new applications developers are often eager to turn to a RESTful web service approach leveraging the established web standard for applicationsâ&#x20AC;&#x201D;HTTP. Supporting HTTP on SUNs may present performance and scale challenges that must be factored into application designs. Fortunately, the IETF Constrained RESTful Environments (CORE) working group is developing an architecture and application protocol (CoAP) to extend the benefits of RESTful application development to constrained environments. Hence, it is possible for CoAP to emerge as a serious application protocol option for Smart Grid applications while preserving the benefits and practices of developing applications using HTTP tools and methods. There are plenty of other application protocol candidates as well, so there is no need to choose just one. For example IEC 61850, originally introduced as a substation automation protocol, has emerged as a candidate for peer-to-peer communications in DA networks. On the AMI side, C12.22, which was designed to support C12.19 table reads over network layer protocols such as IP, has shown limited suc-





Figure 2

Ad-hoc LoWPAN

6LoWPAN enables resource constrained devices on low power and lossy networks to seamlessly participate in the IPv6-enabled Internet.

cess but is in demand in certain markets. DLMS-COSEM, which also supports IP as one of its transport options, is enjoying some success in Europe and is a candidate to become the smart metering application protocol standard in the UK. Lighting control systems are an exemplary use case for 6LoWPAN. Intelligent lighting systems are adding smart sensors as a means to monitor, report and manage energy consumption to reduce total energy usage by 20% by the year 2020. Adding daylight and proximity sensors to a lighting control system can balance the contribution of daylight to reduce the lightâ&#x20AC;&#x2122;s lumen output or turn off the light when there is no one in the area. Until now, those sensors had to be hardwired together, which required a costly installation to pull wiring through walls, reducing the ROI for the sensor network. With the introduction of 6LoWPAN wireless systems, lights can be grouped independent of wiring, resulting in scalable, flexible

control as each end device has a unique address (Figure 2). With the availability, maturity and stability of IPv6-enabled equipment, services and networks, and in conjunction with innovative solutions for enabling IPv6 on LLNs emerging from the IETF and other consortiums, IPv6 is indeed poised to emerge from its 13-year hibernation as the networking technology of choice for the Smart Grid, SUNS and the Internet of Things. Sensus NA Raleigh, NC. (800) 638-3748. []. Texas Instruments Dallas, TX. [].




connected Industrial Networking

The World Is Moving to IPv6: Are You and Your Product Ready? The transition to IPv6 is more than just a move to an expanded address space. It involves a system of routing and address formats that will make the Internet more versatile. Compatibility with IPv4 is not automatically assured, and a rigorous program of certification is needed to ensure interoperability. by Thomas Volz, EBSnet


n February 3, 2010, in a ceremony broadcast live over the Internet from a Miami Hotel, the last blocks of available IPv4 addresses were allocated to the Regional Internet Registries. Experts anticipated these blocks would be used up by the Regional Registries within a few months. IPv4 has finally hit its address Figure 1 space limitation. The future growth of the IPv6 Ready Logosâ&#x20AC;&#x201D;Phase-1 Internet will come through the transition Silver logo, Phase-2 Gold logo. to the next generation IPv6 protocol. One of the main design goals of IPv6 was to increase the limited size of the nies providing solutions nowpool available to network IPv4 address ion into products, technologies and companies. Whether goaladis to research the latest connected nodes. To this end theyour IPv6 ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you dress size was increased from 32 to 128 you require for whatever type of technology, and along for. with new features and enand productsbits, you are searching Figure 2 hancements to the IP protocol itself, it is a IPv6 Ready Logos for the Phase-2 more efficient and interoperable network Extended categories. architecture than IPv4. The IPv6 address structure is much more than just an extension of IPv4â&#x20AC;&#x2122;s classless inter-domain rout- addressability for any network node intering (CIDR) structure. It uses the increased face. It is not however intended to enable size in a very flexible way that preserves worldwide global addressing for every inmany of the CIDR concepts, can encapsu- terface. In fact network nodes bound to a late existing IPv4 addresses, and can even local subnet for a dedicated purpose may accommodate unique worldwide global derive no benefit at all from IPv6. But when considering the need or the possibilities from a greater network visibility Get Connected and interaction, IPv6 offers many imwith companies mentioned in this article. provements over IPv4.

ploration your goal k directly age, the source. ology, d products

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Get Connected with companies mentioned in this article.

Since the address size and structure play such an important role in the overall IPv6 functionality, it is definitely worth a closer look. IPv6 nodes can and often do use multiple addresses simultaneously for a variety of purposes. In general, the 128-bit address is comprised of two major fields, the subnet prefix and the interface identifier. Addresses are interpreted from left to right starting with the subnet prefix. This prefix may be any length, with the interface identifier represented by the remaining number of the least significant bits. Within this architecture there are many reserved prefix patterns that serve to define some commonly known address structure formats. However, as long as there is no conflict with one of the predefined formats, an address need not imply any structure at all or may be interpreted privately within a local network. The general 128-bit IPv6 address format is: Prefix Interface Identifier (n bits) (128-n bits) Among the reserved prefix patterns mentioned above there are three types that are essential for interoperability within the general IPv6 framework: multicast, link local and global.

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RFC 2460 (Phase-1, Phase-2) Internet Protocol,Version 6 (IPv6) Specification

RFC 4862 (Phase-1, Phase-2) IPv6 Stateless Address Autoconfiguration

RFC 4291 (Phase-1, Phase-2) IP Version 6 Addressing Architecture

RFC 4443 (Phase-1, Phase-2) Internet Control Message Protocol (ICMPv6) for the Internet Protocol Version 6 (IPv6) Specification

RFC 4861 (Phase-1, Phase-2) Neighbor Discovery for IP version 6 (IPv6)

RFC 1981 (Phase-2) Path MTU Discovery for IP version 6

TABLE 1 The IPv6 Core Protocols testing covers the following RFCs. UNH-IOL (US)

TTA (Korea)

IRISA (France)

BII (China)

JATE (Japan)

CHT-TL (Taiwan)

TABLE 2 Approved labs in the IPv6 Ready Logo program.

IPv6 Multicast Address

In IPv6 the multicast address type is used extensively and is required. There is no broadcast address that is often used in IPv4. The multicast prefix is identified by a leading hexadecimal 0xff with the next eight bits defining the address scope and flags. Combined, these eight bits specify several potential sub formats embedded within the remaining 112 bits, the multicast group identification field. The scope bits generally relate information to potential router nodes while the flags indicate the format interpretation. Multicasts are used by a node to establish and validate its primary local address, validate any intended additional addresses, locate other directly addressable IPv6 nodes, and to discover resources such as routers, servers and their capabilities. IPv6 Multicast Address Format 0xFF Flags Scope Group (4 bits) (4 bits) Identifier (112 bits)

IPv6 Link Local Address

A link local IPv6 address prefix is indicated with the leading hexadecimal 0xfe8/10 bit pattern. The next 54 bits must be zero and the remaining 64 bits are the interface identifier, which must be unique within a local network link. The interface identifier is typically derived from its network hardware’s MAC address but this is not required. These addresses are never forwarded by routers; they are intended



to be used between peers in a link and between a node and its locally connected routers and servers. Each IPv6 node is required to have at least one link local address but may have as many as desired for other on link special purposes, providing each one is unique within the link. IPv6 Link Local Address Format 0xFE8 All Zeroes Interface (10 bits) (54 bits) Identifier (64 bits)

IPv6 Global Unicast Address

An IIPv6 global address uses a variable length prefix that includes a global routing prefix and a subnet identifier. These address types are routed beyond the local link. Global address identification may be easier thought of as those addresses that are not one of the multicast, local, or a variety of other specialized and well defined types. At present there are two general categories of global addresses, those beginning with a three bit binary 000 and those that do not. Again, these addresses may not overlap the other predefined types after considering any additional bits beyond the first three. Essentially the 000 bit prefixed addresses may be considered unstructured by conventional specifications. The others comply with an assignment and management structure similar to IPv4. These managed types are defined below. The interface identifier must be 64 bits, but the routing prefix and subnet identifier are variable

given that they must total to 64 bits. IPv6 Global Unicast Address Format Global Subnet Interface Routing Identifier Identifier Prefix (64 bits)

Focus on Interoperability

While IPv6 has been in development for some time, there is anxiety among the engineering community about just how smoothly the transition will unfold, especially with regard to an existing IPv4 node’s ability to co-exist with its new IPv6 neighbors and how well new IPv6 applications will perform. The consortium of Internet steering organizations has had a technical roadmap for the transition in place for some years. To address these issues, the IPv6 Forum launched a formal Certification program in 2002, called The IPv6 Ready Logo program. The goals for the program, as stated officially on the Forum website, are three-fold: • To verify protocol implementation and validate interoperability of IPv6 products • To provide access to testing tools • To set up a network of IPv6 Ready Logo testing labs around the world to assist with testing The scope of the IPv6 Ready Logo testing program has steadily evolved over the years: from the Phase-1 Silver logo program, which covered Core IPv6 Protocols with only 170 tests, to the current Phase-2 Gold logo program, featuring a much broader coverage of some 450 tests for Core Protocols, as well as additional, extended protocol categories (Table 1). Tests are designed to verify an IPv6 implementation’s conformance against the Internet Engineering Task Force’s (IETF) RFCs. The IETF is the internationally recognized organization responsible for maintaining the Internet Protocol specifications and standards. They use a system of Request for Comment (RFC) technical documents to organize and catalog the multitude of IP protocol specifications. Literally thousands of RFCs combine to specify the Internet Protocol as we know it. Upon successful completion of the test programs, an IPv6 network stack implementation may use and display the Ready Logo as a testament to its capability to

technology connected


As of February 28, 2011



400 350 Core









100 50


0 Apr.05 Jun.05 Aug.05 Oct.05 Dec.05 Feb.06 Apr.06 Jun.06 Aug.06 Oct.06 Dec.06 Feb.07 Apr.07 Jun.07 Aug.07 Oct.07 Dec.07 Feb.08 Apr.08 Jun.08 Aug.08 Oct.08 Dec.08 Feb.09 Apr.09 Jun.09 Aug.09 Oct.09 Dec.09 Feb.10 Apr.10 Jun.10 Aug.10 Oct.10 Dec.10 Feb.11

properly interact in an open network environment (Figure 1). To illustrate the depth and the amount of the testing involved, the RFC 2460 test section alone includes 54 individual tests against different sections of this RFC, and each test may include dozens of test packet scenarios multiple test/response sequences. All told, a complete test run takes many hours using a test target with three or more known testing hosts. On top of the Core Protocols testing, the Phase-2 Gold logo program covers the extended IPv6 test categories, which include IPsec, IKEv2, MIPv6, NEMO, DHCPv6, SIP and SNMP-MIBs. The steering committee of the IPv6 Ready Logo program recently introduced a set of individual logos to mark the successful completion of the respective protocol section of the testing program (Figure 2). To obtain either phase of the IPv6 Ready Logo certification, applicants need to complete the tests with the product passing 100% each of the appropriate conformance and interoperability test requirements. The self-testing tools and interoperability test scenarios, which need to be executed against the product being tested, are made available for download on the IPv6 Ready Logo website Alternatively, you can submit the product for testing to one of the approved labs in the IPv6 Ready Logo program, which typically requires joining their membership at hefty annual fees well into five figures (Table 2). As the pressures related to impending depletion of the IPv4 address space have been publicized in the media, it’s no wonder that the pace of new applications for the IPv6 Ready Logo has dramatically picked up in the past two years. Figure 3 illustrates the trend well. The sheer amount of testing required to meet the requirements of the IPv6 Ready Logo program makes achieving certification a daunting task, especially for smaller development teams. Fortunately, the committee administering the program reserves a provision called OEM Licensee clause. The clause stipulates that OEM manufacturers can attain the IPv6 Ready Logo Certification without doing actual testing, so long as there is a “one-

Figure 3 Total Applications approved for IPv6 Ready Logo certificate, including OEM licenses (source: IPv6 Forum).

to-one IPv6 stack transfer certified by the OEM Licensor.” Applicants taking advantage of the clause must specify the original product name and Logo ID on their application.

Additional IPv6 Transition Challenges

Yet another challenge inherent in the transition to an entirely new IP protocol is that application developers and system integrators must devise plans on how newly deployed IPv6-enabled applications will continue supporting legacy IPv4 traffic. This is not a trivial task to address, as the IP protocol header got a dramatic makeover in the IPv6 version and is not directly compatible with IPv4. A number of techniques and approaches have been put forward by the industry to address the issue. While comprehensive coverage of various technology options providing a bridge between IPv4 and IPv6 network applications available or in the works would be beyond the scope of this article, one commonly used approach employs the use of a dual IPv4/IPv6 stack in the application. The approach, first described in the RFC 4213, is defined as a technique providing complete support for both Internet protocols— IPv4 and IPv6—in the hosts and routers. In this type of implementation network nodes will have the ability to send and re-

ceive both IPv4 and IPv6 packets. They can therefore directly interoperate with IPv4 nodes using IPv4 packets, and also directly interoperate with IPv6 nodes using IPv6 packets. A variation of the concept is sometimes referred to as a dual-mode IPv4/ IPv6 stack, which provides application developers with a facility to dynamically switch on and off either of the dual-stack layers, providing for operational efficiency. Yet another important transitional mechanism is a tunneling of IPv6 over IPv4. This technique provides for encapsulating IPv6 packets within IPv4, so that they can be carried across the existing IPv4 routing infrastructure. EBSnet Littleton, MA. (978) 486-4000. [].



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Machine-to-Machine Systems

Machine to Machine – Intelligent Devices Talking to Each Other An increasing phenomenon is the connection of autonomous nodes comprising sometimes vast systems and moving huge amounts of data with relatively occasional human intervention. The development and use of M2M systems involves a variety of opportunities and options. by Bill Weinberg, and


ost end-users and indeed most engineers have a very humancentric view of Internet—people using computers to view web pages, send email, download content, transact business, etc. Equally valid and increasingly pervasive is using the ’Net and attached (non-TCP/IP) networks to facilitate communication among machines, with little or no human intervention. This machine-to-machine or M2M paradigm involves collection and transmission of event-level data (called telemetry in older systems) from end-nodes—various types of intelligent devices—varying degrees of consolidation, aggregation and analysis en route, and eventual delivery to servers or workstations upstream for analysis and action. M2M data can travel via wired or wireless transport and involve minimal/trivial payloads (e.g., current temperature, location data or simply node ID) over long intervals, or massive data sets and latency-sensitive high-frequency data streams (e.g., audio and video signals). M2M deployment is steadily growing in size and scope and is on course to outpace human Internet users and traffic: Industry analysts forecast 25 billion connected devices by 2015 (3-4 times the entire human population), with M2M traffic expected to grow by 258 percent.






IP-based LAN All-IP Hybrid


Mobile Wireless Network








Node Mesh Node





Network Node



Figure 1 A Simplified Typology of M2M Architectures

Example M2M Applications

As all classes of intelligent devices become networked (or at least networkable), M2M applications follow. To date, there have been certain sweet spots and more obvious applications: Smart Energy: The emerging Smart Grid is practically the poster child for M2M. The most familiar smart energy application lies in smart meters that monitor premises energy usage and relay kilowatt/hour data up-

stream to utility companies for billing. Other Smart Grid M2M nodes include upstream aggregation points (mesh routers) for Smart Meters, substation and transmission line monitors; downstream are high load premises devices like HVAC systems, pool pumps and large white box appliances that utilities would like to manage during peak loading hours. Manufacturing and Inventory Control: Today, factories and warehouses increasingly use smart labels and RFID tags to



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Unstructured Data

Data Analytics & Use

Tech In Systems

Figure 2 Unstructured data from M2M as an input to Big Data (Courtesy Karmasphere).

track goods through the manufacturing process and out the door into distribution channels. While RFID devices are mostly passive, data from scanners is passed upstream to servers, helping to monitor production yields, inventory turnover and leakage, and to monitor the provenance of health-critical goods like medicine and contaminated foodstuffs. A related M2M application is monitoring inventory levels at points of sale, especially mechanical vending machines. Environmental Monitoring and Animal Tracking: Systems that “Take the temperature” of the globe through sensors that measure heat, light, seismic activity, wind speed, ocean currents, air quality, position and other physical attributes of our planet are typical M2M targets. In some cases, data gathered reflects natural phenomena, like volcanic activity and El Niño current variations; in others M2M systems are called upon to monitor crop yields or shock waves from weapons detonation. A related set of applications involves tracking the movements of animals, both domestic— herds of sheep and cows, and in the wild— sea turtles, migratory birds, etc. In-Vehicle Systems: Connected in-vehicle systems and data from them are multiplying rapidly. Systems like GPRS radio (e.g., OnStar), BlueTooth and other wireless media relay vehicle status information, with more types of data becoming increasingly accessible to dealers, repair shops and also insurance companies—including maintenance information, global positioning co-



ordinates, wireless payment for tolls and gas pumps, and data from “black boxes” on speed and driving habits of personal, commercial and also racing vehicles. Smart Signage: Digital signs on the highway and at transportation centers, programmable billboards and flat panel advertising displays (a.k.a. Digital Out-ofHome “DOH” advertising) are the recipients of M2M data streams as automated warning systems and ad brokering servers provision and update them with up-to-theminute content. Conversely, the signage reports back on device health and sometimes on local conditions as well. Mobile Data: An application not usually considered M2M is collection and analysis of usage and local information collected from mobile phones and other wireless devices. While the human user interacts with the device for voice and text communication, playing media and running mobile apps, the phone itself registers myriad data points about user behavior, most notoriously, location data. These diverse applications and others share a set of attributes common to the M2M paradigm: • Endpoints (and other nodes) operating without human intervention • Fan-out from/to increasingly numerous nodes of varying intelligence and provisioning • Communication over a mix of TCP/IP networking and other protocols with a range of physical transport types

• Some degree of data consolidation / aggregation from endpoints to infrastructure

M2M Architecture and Ecosystem

There is no universal, one-size-fitsall architecture for M2M. Most M2M designs fall into two broad categories: all-IP and hybrid. In the past, all-IP designs were considered “high end”—only better-provisioned nodes boasted embedded CPUs with sufficient horsepower to run TCP/IP stacks and bills of material robust enough to include Ethernet or Wi-Fi. Today, TCP/ IP availability is descending into more modest hardware, through cheap all-inone networking chips and from migration to an increasing interoperability with IP communication within industrial networking standards like ZigBee. All IP-designs have the advantage of just “plugging in” to available Wi-Fi or Ethernet. Disadvantages include higher node costs, potential mismatch between latency requirements and network characteristics, and the need to worry about device security. There is also the challenge of accommodating IPv6. IP-capable devices are today mostly enabled for IPv4—no problem when deployed on IPv4 subnets. However, with the emerging IPv4 address famine and imminent transition to IPv6, the projected billions of M2M nodes will be well served by adopting IPv6 sooner rather than later. Hybrid designs involve M2M nodes that for various reasons cannot accommodate standard networking interfaces— they are too small, too power-sensitive, too remote or just too “weird.” Examples include devices on mountaintops, sensors buried deep in the earth or inside the human body, tracking devices on birds and other animals or devices deployed in outer space. Hybrid designs accommodate legacy telemetry-type systems and low-end M2M device nodes, including mostly passive sensors like RFID tags, low frequency devices like environmental sensors, and one-time use devices like sensors for massive seismic events and weapons testing. A hybrid M2M system entails deployment of terminal nodes that communicate via non-IP digital and also analog signals, either among themselves in a mesh network or directly with a gateway

tech in systems

controller. The gateway consolidates and aggregates the signals from/to the devices and connects upstream to IP networks. In some cases, the gateway also performs local signal conditioning, filtering, logging and other processing before passing data onward and upward for analysis. Hybrid doesn’t necessarily mean legacy or non-standard. Many M2M designs employ mobile telephony for transport, sending packets over GSM or CDMA networks to reach Internet gateways and ultimately data centers and workstations for analysis. Similarly, other M2M designs rely on wireless mesh networking standards like Zigbee or build on Bluetooth or Zwave for monitoring and control, as is common in Smart Grid premises equipment (Figure 1).

Transport Options

While a detailed discussion of M2M transport mechanisms is beyond the scope of this article, some communications mechanisms merit brief examination here. Some definitions of M2M assume that terminal nodes will build on mobile/wireless networking (as with Telenor, Jasper Wireless and others). While this may seem counterintuitive—why embed the equivalent of an entire mobile phone in a sensor or other dedicated device?—their use of General Packet Radio Service (GPRS) differs greatly from conventional handset applications. First, M2M ecosystem suppliers have developed special versions of wireless chipsets and SIMs to serve this market, with price points and specifications targeted at M2M terminal nodes. Second, most M2M devices don’t need voice or even full (3G) IP communications capabilities—they make do by piggybacking on SS7 networks and actually using SMS to communicate upstream despite lack of guaranteed delivery, security, etc. Mesh networking is ideal for connecting moderate to large numbers of peer-level terminal nodes, as in Smart Grid premises monitoring, industrial control and environmental monitoring. For developers, it is important to understand the complexity of working with mesh networks. While literature and resources for building terminal nodes is plentiful (especially for Zigbee), less available is information about building mesh controllers and establishing, joining and managing mesh networks over time. Moreover, while standards like Zigbee are

well documented for low-level communications, higher-level profiles and best practices for interoperability are less mature. Another mechanism is RFID, which strictly speaking is not a transport mechanism. RFID-tagged objects depend on scanners or physical portals (at the entrances to warehouses, etc.) to energize the tags, retrieve identity codes and other payloads stored on them, add data if needed, and log or transmit the scanning event

upstream. Nonetheless, RFID participates in the M2M paradigm and is a source of M2M data—the functionality otherwise associated with a single node is just spread between the tagged item, the tag and the scanner (e.g, location information).

Responding to the M2M Data Deluge with Big Data

With billions of devices delivering telemetry from endpoint to infrastructure,

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9/10/11 10:10:17 AM RTC MAGAZINE SEPTEMBER 2011

Tech In Systems

M2M implies generation, storage and processing of gigabytes, terabytes and even petabytes of data on a monthly, weekly or even daily basis. Today, much of that data still drops into the bit bucket, but companies are increasingly realizing the value of “mining” it for insight. M2M was born into a world where large data stores were processed by relational databases and archived into data warehouse. Today, the ever-growing deluge of device-generated


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data is outstripping these legacy stores in complexity, volume and velocity. An emerging response to the data deluge is called “Big Data”—massive scalable data management clusters built from commodity blades/servers that distribute terabyte or larger data sets across distributed file systems and run Google’s MapReduce algorithm and analytics programs to make sense of unstructured and semi-structured M2M event data and telemetry (Figure 2).

7/6/11 6:12:18 PM

The leading Big Data technologies build on Apache Hadoop and related open source projects (HDFS, Hive, Mahout, etc.), with vendors such as Cloudera, HortonWorks, Amazon, Karmasphere and others offering commercial Hadoop distributions, Cloud-based Hadoop implementations and analytics tools.

M2M Implementation Resources

Embarking upon an M2M project is no more daunting than starting other types of embedded design. In fact, many conventional intelligent device types, augmented with connectivity, fit by definition into the M2M networking paradigm. However, there are attributes and requirements unique to M2M, and resources dedicated to M2M development, especially written in and for Java: aJile ( aJile Systems provides an RTOS and standard JME platform for M2M applications and ready-to-embed implementations of its software in silicon. aJile features support for multiple OSGi profiles and Java CDC, CLDC and MIDP runtimes. BITXml ( offers an XML-based protocol for M2M communications that covers syntax, semantics and formal definitions for devices and gateways and associated events, commands and payloads. There are also open source implementations of BITXml in Java ( bitxml-java/) and for .NET ( CEP ( overview/) a.k.a. Complex Event Processing is Oracle’s M2M platform for building applications to filter, correlate and process events in real time to feed upstream applications and SOA systems. CEP provides capabilities for designing, defining and implementing event processing for both enterprise and embedded applications and builds on standard SQL, Java, Spring DM and OSGI. Cinterion TC65I ( is an M2M module running Java. It’s a great starting point to prototype M2M applications and boasts built-in GPRS, TCP/IP over AT and a Java IMP-NG virtual machine. COOS ( the “Connected Objects Operating Sys-

tech in systems

tem” is not an M2M OS, but rather an open source, modular, pluggable and distributable, middleware platform. Written in Java, COOS supports connecting, monitoring and managing services and device objects using messages. M2MXML ( is another XML-based M2M protocol with open source implementations in Java and in C. Motorola G24 ( is a Java-powered wireless controller targeting M2M applications. Its feature set includes messaging, secure Internet connections and support for MQTT M2M protocol. MQTT ( is an M2M protocol featuring lightweight publish/ subscribe messaging. MQTT is ideal for remote sensors communicating to a broker via satellite link, applications using dial-up connections and in a range of home automation and small sensor device scenarios. It offers small footprint, low power usage, minimal data packet size, and efficient distribution of information to one or many receivers. OSGi ( the Open Source Gateway Initiative (now OSGi Alliance) and the OSGi Platform provide standardized primitives for small, reusable and collaborative application components and functions to change device composition dynamically on a variety of networks using a service-oriented architecture (SOA). OSGi includes standard interfaces for HTTP servers, configuration, logging, security, user administration, XML and a framework for managing the life-cycle of software components, services and devices. Sunspot ( SPOTs are small, Java-based, wireless devices originally developed at Oracle Labs. The SPOTs project hosts development of open source code for building actual devices, including system code, application frameworks, demonstrations and applications. Viewbiquity ( offers a Cloud-based M2M platform to connect devices, processes and applications. The Viewbiquity Cloud Interface (VCI) features a scripting interface and support for reliable connectivity, application control, device configuration, automated database logging capabilities, redundancy and backup.

Embracing M2M is not really a matter of embarking on a new class of embedded design. It’s more about enabling existing classes of intelligent devices to communicate upstream with back office systems and data centers as part of larger, more comprehensive end-to-end applications. M2M is a mindset—in today’s world of ubiquitous networking, no device can afford to be an island. Whatever type of device your organization is specifying

and implementing today should include support for M2M protocols, connectivity and capabilities, because it’s likely to find deployment by your channel partners and customers in a larger context of M2M systems and software. Bill Weinberg (408) 568-2492. [].

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9/12/11 2:35:37 PM RTC MAGAZINE SEPTEMBER 2011

technology deployed Robotic Systems: Sense, Think, Act

Simplifying Robot Software Design Layer by Layer

data across different layers of the software stack would be a good idea, but often not worth the integration pain. Each participant brings a different view of the world, and an architecture that works well for the computer scientist may not work well for the mechanical engineer, for example. The proposed software architecture for mobile robotics, shown in Figure 1, takes the form of a 3-4 layer system represented by the graphic. Each layer in the software There are many approaches to designing the software depends only on the specific system, hardware platform or end goal of the robot and architecture for mobile robotics. However, an effective remains completely blind to the contents of design requires planning. A layered approach allows the layer above or below it. A typical robot’s software will contain components in developers to work in parallel by using partitions with wellthe driver layer, the platform layer and the exploration defined interfaces. algorithm layer; however, only applications r your goal with some form of user interaction will eak directly by Meghan Kerry, National Instruments include the user interface layer. For fully page, the resource. autonomous implementations, this layer hnology, might not be needed. nd products In this specific example, the architecture obot software architectures are typically a hierarchi¬cal represents an autonomous mobile robot with a manipulator that set of control loops, representing high-level mission planis designed to execute tasks including path planning, obstacle ning on high-end computing platforms, all the way down avoidance and mapping. This type of robot might be used in to motion-control loops closed with field pro¬grammable gate arseveral real-world applications, including agriculture, logistics, rays (FPGAs). In between, there are other loops controlling path or search and rescue. The onboard sensors include encoders, an planning, robot trajectory, obstacle avoidance, and myriad other IMU, a camera, in addition to several sonar and infrared (IR) responsibilities. These control loops may run at different rates on panies providing solutions now differ¬ent computing nodes, including on desktop and real-time ation into products, technologies and companies. Whether your goal is to research the latest operating systems, and on custom processors with no operating User Interface Video TeleRobot Status cation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you ... system. Too often, robot software designers and robot hardware Layer Display operation Health Feedback ce you require for whatever type of technology, designers prematurely design their architectures in a way that imes and products you are searching for. poses a specific mapping of software to computing nodes. Robots, by their very nature, are built by engineers who come from several different engineering disciplines. It is tempting for these engineers to work in their own areas and ignore, to as large an extent possible, the other disci¬plines. For example, Path Obstacle Task Algorithm ... a mechanical engineer may focus on the physical platform—perPlanning Avoidance Mapping Definition Layer haps optimizing size, weight, ruggedness and agility. The robot platform may include a rudimentary microcontroller and a bit of software for moving the robot around. Meanwhile, a computer Platform Steering Sensor Image Arm sci¬entist might be developing much higher-level autonomy or layer Fusion Processing Kinematics ... “mission” software in a simulator—software that will eventually direct the platform to do something interesting and useful. Get Connected At some point, thementioned pieces of thearticle. system have to come together. with companies in this Often, this is accomplished by predetermining very simple Driver Actuator Sensor PID Motor ... faces between software and platform—perhaps as simple as just Layer Interface Interface Control controlling and monitoring heading and speed. Sharing sensor


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Figure 1 Robotics Reference Architecture.

Technology deployed

Sonar loop

Sonar1 Sonar trigger 1 TF



Sonar 1 (in)




Sonar1 trigger 5V


Sonar trigger 2 TF

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Sonar2 ?


Sonar 2 (in)



Sonar2 trigger



Figure 2 Mobile robots designed by SuperDroid Robots.

sensors. Sensor fusion is used to combine the data from the encoders and IMU for localization and to define a map of the robot environment. The camera is used to identify objects for the onboard manipulator to pick up, and the position of the manipulator is controlled by kinematic algorithms executing on the platform layer. The sonar and IR sensors are used for obstacle avoidance. Finally, a steering algorithm is used to control the mobility of the robot, which might be on wheels or treads. The NASA robots shown in Figure 2, designed by SuperDroid Robots, are similar to a robot that might be described by this architecture. These layers will be described in more detail as they might be implemented for a mobile robot platform within the NI LabView graphical development environment. A commonly used hardware platform for robotics is the NI CompactRIO, which includes an integrated real-time processor and FPGA. The LabView platform includes built-in functionality for communicating data between each layer, and for sending data across a network and displaying it on a host PC.

Voltage readings


IR read loop


24V Rear IR


Rear IR (volts) FXP











Figure 3 The driver layer interfaces to sensors and actuators.

Driver Layer

As the name suggests, the driver layer handles the low-level driver functions required to operate the robot. The components in this layer depend on the sensors and actuators used in the system as well as the hardware that the driver software will run on. In general, blocks in this level take actuator set points in engineering units (positions, velocities, forces, etc.) and generate the lowlevel signals that create the corresponding actuation, potentially including code to close the loop over those set points. Similarly, this level contains blocks that take raw sensor data, turn it into meaningful engineering units, and pass the sensor values to the other levels of the architecture. The driver level code shown in Figure 3 is implemented in LabView FPGA and executes on an embedded FPGA on an NI CompactRIO platform. The sonar, IR and voltage sensors are connected to digital input and output (I/O) pins on the FPGA, and the signals are being processed within continuous loop structures that execute in true parallelism on the FPGA. The data output by these functions is sent to the platform layer for additional processing.

Figure 4 An environment simulator should be implemented at the driver layer if simulation is required.

The driver layer can connect to actual sensors or actuators, or it can interface to simulated I/O within an environment simulator. A developer should be able to switch between simulation and actual hardware without modifying any layers in the system, other than the driver layer. The LabView Robotics Module 2011, show in Figure 4, includes a physics-based environment simulator that allows users to switch between hardware and simulation without modifying any code other than the hardware I/O blocks. RTC MAGAZINE SEPTEMBER 2011


technology deployed







!? Rear IR (vots)



Calibration Parameters -0






4 Calibrate IR? TF


Beyond IR range TF IR distance chart DBL

Rear distance (m) GP2D12 V


Figure 5 The platform layer acts as a translation between the driver layer and algorithm layer.

Figure 7 The user interface layer allows a user to interact with a robot or display information.

Figure 6 The algorithm layer makes control decisions based on feedback.

Platform Layer

The platform layer contains code that corresponds to the physical hardware configuration of the robot. This layer frequently acts as a translation between the driver layer and the higher level algorithm level, converting low-level information into a more complete picture for the higher levels of the software and vice versa. In Figure 5, we are receiving the raw IR sensor data from the FPGA and processing it on the CompactRIO realtime controller. We are using functions in LabView to convert the raw sensor data into more meaningful dataâ&#x20AC;&#x201D;in this case, distance. We are also determining whether or not we are outside the range of 4-31 meters.

Algorithm Layer

Components at this level represent the high-level control algorithms for the robotic system. Figure 6 shows how blocks in the algorithm layer take system information such as position, velocity or processed video images and make control decisions based on all of the feedback, representing the tasks that the robot is designed to complete. This layer might include components that map the robotâ&#x20AC;&#x2122;s environment and perform path planning based on the obstacles around the robot. The piece of code in Figure 6 shows an example of obstacle avoidance using a vector field histogram (VFH). In this example, the VFH block receives distance data from a distance sensor, which was sent from the platform layer. The output of the VFH block contains path direction, which will be sent downwards to the platform layer. In the platform layer, the path direction will be input into the steering algorithm, which will generate low-level code that can be sent directly to the motors at the driver layer. Another example is a robot that might be tasked to search its environment for a red spherical object that it needs to pick up



using a manipulator. The robot will have a defined way to explore the environment while avoiding obstaclesâ&#x20AC;&#x201D;a search algorithm combined with an obstacle avoidance algorithm. While searching, a block in the platform layer will process images, returning information on whether or not the object has been found. Once the blob has been detected, an algorithm will generate a motion path for the endpoint of the arm to grasp and pick up the sphere. Each of the tasks in the example provides a high-level goal that is independent of the platform and the physical hardware. If the robot has multiple high-level goals, this layer will also need to include some arbitration to rank the goals.

User Interface Layer

Not always required in fully autonomous applications, the user interface (UI) layer allows a human operator to interact physically with the robot via relevant information displayed on a host PC. Figure 7 shows a graphical user interface (GUI) that displays live image data from the onboard camera, and the X and Y coordinates of nearby obstacles on a map. The Servo Angle control allows the user to rotate the onboard servo motor that the camera is attached to. This layer can also be used to read input from a mouse or joystick, or to drive a simple text display. Some components of this layer such as a GUI could be very low priority; however, something like an emergency stop button would need to be tied into the code in a very deterministic manner. Depending on the target hardware, the software layers could potentially be distributed across multiple targets. In many cases, all of the layers will be running on one computing platform. For non-deterministic applications the software will target a single PC running Windows or Linux, and for systems that require tighter timing constraints, the software should be targeted to a single processing node with a real-time operating system. Due to their size, power requirements and hardware architecture, the NI Compact RIO and NI Single-Board RIO make excellent computing platforms for mobile applications. The driver, platform and algorithm layers can be distributed across the realtime processor and the FPGA, and if required the UI layer can run on a host PC, as shown in Figure 8. High-speed components

Technology deployed

Embedded Real-Time Processor Algorithm Layer

path planning, obstacle avoidance, mapping

Platform Layer

steering, sensor fusion, vision, kinematics



Host PC User Interface Layer

Embedded FPGA Driver Layer

motor interface, sensor interface

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Figure 8 Mobile robotics reference architecture overlayed onto an NI CompactRIO or NI Single-Board RIO Embedded System.

such a motor drivers or sensor filters can run deterministically in the fabric of the FPGA without tying up clock cycles on the processor. Mid-level control code from the platform and algorithm layers can run deterministically in prioritized loops on the RT processor, and the built-in Ethernet hardware can stream information to a host PC to generate the UI layer. A generalized answer to the problem of how to structure a mobile robot’s software shows that any design will require forethought and planning to fit into an architecture. In return, a well-defined architecture allows developers to easily work on projects in parallel by partitioning the software into layers with well-defined interfaces. Furthermore, partitioning the code into functional blocks with well-defined inputs and outputs allows components of code to be reused in future projects. National Instruments Austin, TX. (512) 794-0100. []. SuperDroid Robots Raleigh, NC. (919) 557-9162. [].

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Wireless Networking

Getting Familiar with Bluetooth 4.0 Low Energy Bluetooth 4.0, with the hallmark feature of Bluetooth low energy wireless technology, is ready to roll. The Bluetooth SIG formally adopted the radio and host layers of the specification, and opened qualification for new products in July of last year. by Michael Foley, Bluetooth SIG


luetooth low energy is designed to enable new markets requiring low cost, low latency, low duty cycle, low data rate and low power consumption devices. These markets—healthcare, fitness, proximity, automotive, smart grid— may contain device categories that are completely new to Bluetooth technology, or which will use multiple features—low energy and high speed, for instance—of Bluetooth technology within the same device. This is an exploding area of opportunity. The industry analyst firm Gartner listed Bluetooth 4.0 as one of its top 10 technologies to watch through 2011.

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Broadcaster – A device that supports the broadcaster role is only required to have a transmitter and perform advertisement broadcast to other devices. Observer – A device that supports the observer profile role is only required to have a receiver and listen for advertisements from devices broadcasting advertisements. Peripheral – A device that supports the peripheral profile role is required to have both a transmitter and receiver. The device is required to support broadcasting advertisements and connecting with other devices and serve as a slave in the connection. Central – A device that supports the central profile role is required to have both a transmitter and receiver. The device is required to support listening for broadcast of advertisements and the ability to initiate connections and serve as a master in the connection.

TABLE 1 The four profiles of devices for Bluetooth low power are broadcaster, such as a temperature sensor; an observer, such as a temperature display; a peripheral, such as a printer; and a central, such as a laptop or a mobile phone.

ion into products, andof companies. Whether your goal is to research the latest Newtechnologies Classes Bluetooth ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you Devices devices without low energy you require for whatever type of technology, With the for. introduction of Bluetooth though this may initially be and products you are searching

4.0 with low energy, several new classes of devices in the Bluetooth ecosystem will exist: Bluetooth low energy only devices, Bluetooth devices plus low energy support, and Bluetooth devices without low energy support. Some combination of devices will not be able to communicate with each other. For instance, Bluetooth low energy only devices will not be able to communicate with traditional Bluetooth

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support. Alconfusing to users who are accustomed to all Bluetooth devices having the ability to interact with other Bluetooth devices at a basic level, it does allow for much lower cost and single purposed devices to be manufactured for very specific markets containing only the Bluetooth low energy feature. For markets that are not as cost sensitive and/or devices that are multifunctional, the incremental cost of adding Bluetooth low energy technology to an existing Bluetooth device is extremely low. This is due to the amount of reuse of the existing Bluetooth wireless technology implementations. Due to the


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low incremental cost, the attach rate of Bluetooth devices plus low energy is expected to be significant. Bluetooth low energy was optimized for occasional connections that allow for longer sleep times between connections, small data transfers, very low duty cycles and simpler topology while Classic Bluetooth technology devices are optimized for connection-oriented applications where the connection is always on or present, highly secure and with more complex topologies. There are numerous basic characteristics of the Bluetooth low energy feature that should be considered when determining if a new application


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Figure 1 In a personal network, Classical Bluetooth devices, such as the phone and the earpiece, could play their traditional roles, but with the phone also acting as the central device for Bluetooth low power sensors such as thermometer, pedometer and heart rate monitor, which play the role of broadcasters.



can best leverage the strengths of Bluetooth low energy technology. In terms of latency, Bluetooth low energy can support connection setup as low as 3ms, which allows an application to quickly form a connection, transfer its data, and then quickly tear down the connection. In order to support such low latencies the remote device needs to be continuously broadcasting at a high duty cycle for a very limited period of time. This scenario is workable if the scanning device is plugged in since it needs to be continuously scanning for devices that may be using this broadcasting method. For this scenario, connection setup is highly optimized, and the need to stay connected to service low latency applications is not necessary. A typical application for this scenario is a remote control for an audio/video device. However, applications between battery-operated devices will typically have higher connection latencies in the range of 20ms to 10.24s (nominally around 1.28s). For special situations a fast connection is possible, but the frequency of use for battery-operated devices should be low. Bluetooth low energy supports very short data packets (8 octets minimum up to 27 octets maximum) and is optimized to transmit commands and data in single packets. Packets of this size are not optimal for transmitting large amounts of data (hundreds of octets) frequently or continuously for extended periods of time. It is likely to be more efficient to use Classic Bluetooth wireless technology when data packets averaging hundreds of octets are necessary. The use of the term “octet” here may seem synonymous with “byte,” but it is preferred for expressing 8-bit quantities in network protocols because it avoids some legacy ambiguity that has been associated with “byte.” The greatest benefit in power savings with Bluetooth low energy is from having the controller and host sleep for longer periods of time. It is extremely important for applications that wish to take full advantage of these power savings not to require that the connections exist between devices for long periods of time. Virtual connections may be used to handle situations where maintaining state information

is desired in place of a full-time connection. Duty cycles in the 1% or less range are recommended. There are also differences in terms of security. While Bluetooth low energy shares many of the security traits of Classic Bluetooth wireless technology, it currently lacks the ability to perform the numeric comparison used in secure simple pairing (SPP) defined in Bluetooth wireless technology v2.1 or later. SPP is a method where the user compares two numbers displayed on each device’s screen. SPP may be added in the next version of the Bluetooth low energy specification. Instead, pass key entry is necessary if man-in-the-middle protection is desired. Bluetooth low energy also permits the use of authentication of a remote device without requiring an encrypted link between the devices. The authentication key generation needed for pass key entry in Bluetooth low energy uses a different algorithm than Classic Bluetooth wireless technology. Bluetooth low energy places a significant amount of intelligence in the controller, which allows the host to sleep for longer periods of time and only be awakened by the controller when the host needs to perform some action. This allows for the greatest savings in current since the host is assumed to consume more power than the controller. Applications for which the host needs to have greater control may not benefit from the current savings Bluetooth low energy enables. For example, in Bluetooth low energy, the controller will ignore or accept connection requests without involvement from the host. There are also somewhat more limited options for connection topology. Bluetooth low energy is currently optimized for one-to-one connections while allowing one-to-many connections using a star topology. Complex networks like mesh and scatternets are not supported in the initial release of Bluetooth low energy. With the use of quick connections and disconnections, data can move in a mesh-like topology without the complexities necessary to maintain a mesh network. Bluetooth low energy devices can be asymmetric in that they are not required to support both the master and slave roles. In some cases,


a Bluetooth low energy device will only support a single topology role. The topology roles are also fixed at the time of connection creation. Switching topology roles requires the connection to be terminated and recreated with the new topology role. An example of a typical mix of devices is shown in Figure 1.

Bluetooth 4.0 with Low Energy: The Technology Basics

Devices utilizing the low energy feature of Bluetooth 4.0 differ from those built upon Bluetooth 3.0 or earlier versions in a number of ways. First and foremost is the lack of symmetry between peer devices. Strictly optimized for low cost and low power, Bluetooth low energy devices are permitted to support only unidirectional communication (transmit only or receive only). Bi-directional communication may still be supported but, unlike existing Bluetooth devices, Bluetooth low energy devices do not support masterslave role changes while in a connection at the present time. This means that application profiles need to specify which device in a profile role will be master and which will be slave to avoid a two-master or two-slave situation. The other most significant difference is in device discovery and connection setup. Bluetooth low energy uses a push model instead of the pull model used in traditional Bluetooth wireless technology. Devices that wish to be discovered by other devices use broadcast advertising (or beacons) in an area to devices listening for such broadcasts, whereas traditional Bluetooth wireless technology places devices wishing to be discovered by other devices in a listening mode for broadcasts from inquiring devices before sending device information. In Bluetooth low energy, advertising broadcasts are also used as a method for a device to indicate to surrounding devices that it is connectable with other devices or a specific device. Devices listening for advertising broadcasts may also be in an exclusive connectable mode where they respond only when receiving connectable advertising broadcasts from devices wishing to connect to another device. Due to the lack of symmetry and fixed

discovery and connection modes, it was necessary to establish specific profile roles that represent these various combinations of capabilities. It is extremely important that profile roles are clearly established to enable Bluetooth low energy devices to communicate with one another when both devices support the same profile. The profile roles are described in Table 1. A device may support multiple profile roles as long as the required functionality is supported while operating in that profile role. Each profile role is optimized for certain types of applications. If the application is only transmitting small amounts of information on a periodic basis and does not require bi-directional communication (e.g. data reception acknowledgement) then the broadcaster and observer profile roles should be considered. Even in these cases, the application may change into the peripheral and central profile roles under particular circumstances, such as device configuration, but operate most of the time in just the broadcaster and observer profile roles. Some applications will require the

additional capabilities of the peripheral and central profile roles. The important consideration will be which higher layer profile role is best suited for the peripheral profile role or the central profile role. The Bluetooth SIG publishes all specification documents on the main website, The Bluetooth 4.0 specification can be found in the section Get Technical/Building with Bluetooth Technology. Membership in the organization is recommended to all and required for the qualification of products and the licensing of the brand. To become a Bluetooth SIG member, visit www.bluetooth. org. Bluetooth SIG Kirkland, WA. (425) 691-3535. [].

Condition Monitoring by LEMT

Do you need to know, on-line and immediately, what is happening with your remote system? „LEMT is for you.”

If your Embedded PC system must be secure, For example, you can stable and running at optimum performance, Continuously keep the optimum constant monitoring is crucial. LEMT, being balance between Power and perupward compatible with eAPI, provides this formance in battery-powered Condition Monitoring for your COM Express, systems. CoreExpress®, PC/104 and EPIC boards. Optimize maintenance of often problematic stand-alone devices. LEMT - Condition Monitoring gives you a constant overview of the device´s status and thus allows high uptimes. Keep repair costs and downtime low. LEMT helps here providing error codes and storing relevant data for analysis and repair. LiPPERT Embedded Computers Inc. 2220 Northmont Parkway Suite 250 Duluth, GA 30096 Phone +1 (770) 295 0031 · Fax +1 (678) 417 6273 · Untitled-10 1

Toll Free (866) 587 8681


7/25/11 10:48:03 AM RTC MAGAZINE SEPTEMBER 2011

products &

TECHNOLOGY System-on-Module Packs Performance into Ultra-Small Form Factor

A new system-on-module (SoM) is implemented in an ultra-small form factor of only 15 x 27 x 3.8 mm using the Texas Instruments DaVinci DM3730 and Sitara AM3703 processors running at up to 1 GHz. The Torpedo SoM from LogicPD can also enter a suspend state in which it consumes less than 5 mW. The DM3730 Torpedo is available in several configurations, including TI’s Sitara AM3703 version of the ARM Cortex-A8 microprocessor. It is also footprint compatible with LogicPD’s existing OMAP35x SoM to extend the roadmaps of existing products. The Torpedo includes a programmable color LCD controller that supports XGA 1024 x 768 with 24-bit color along with 256 Mbyte of Mobile DDR and 512 Mbyte of NAND Flash memory. Additional interfaces include a parallel camera interface, audio codec, one USB 2.0 port, serial I/O in the form of UARTs, SPI and I2C. There is also a 40-pin debug connector on the top side, which supports JTAG and ETM. Software support includes a boot loader/monitor and board support packages for Android, Linux and Windows CE. In addition, the Zoom DM3730 Torpedo development kit includes all the needed accessories to begin development. LogicPD, Minneapolis, MN. (612) 672-9495. [].

Series of SSDs Provides Optimized RAID Support for Higher Data Transfer Rates

A series of industrial grade solid state drives (SSDs) features a SATA 6 Gbit/s (SATA III) interface with fastest read/write speeds. The ASD Series from Adlink is available in 2.5”, 1.8” and JEDEC MO-297 (Half-Slim) form factors. Product highlights include low latency with less than 1 ms access time, power consumption as low as 2 watts, high reliability and high storage capacity. SSDs use NAND flash for data storage and have no moving parts, providing faster access times and higher reliability than conventional

Next-Generation USB 3.0 to NAND Flash Controller

A second-generation single-chip solution for USB 3.0 flash drives offers enhanced performance using today’s popular flash memories. The VL751 from Via Labs has been certified by the USB Implementers Forum (USB-IF) for SuperSpeed operation, ensuring high-quality, seamless interoperability, and effortless backward compatibility. The Via Labs VL751 features a four-channel NAND interface, doubling or even quadrupling maximum throughput over single or dual-channel designs. The second generation controller offers improved parallelization and higher efficiency through integrated pre-read and pre-write buffers, better support for popular flash memories, and a pipelined ECC engine. Cumulatively, these enhancements translate into a nearly 100% performance boost over the Via Labs VL750 with no increase in power consumption. The Via Labs VL751 features USB mass storage class “Bulk-Only Transport” for universal compatibility across platforms such as Windows, Mac OSX and Linux without the need for additional drivers. Featuring a 4-channel memory controller with interleaving support, blistering fast data transfer speeds of 120 Mbyte/s or more are within reach. Via Labs VL751 is fully compliant with the USB 3.0 specification, and is also backwards compatible with USB 2.0 and 1.1 standards, offering class-leading performance in USB 2.0 mode with transfer speeds of up to 35 Mbyte/s. In addition to high performance, the Via Labs VL751 is also designed for ease of implementation and support. Powered by advanced in-house PHYs, Via Labs VL751 is a single-chip solution that offers outstanding signal integrity characteristics while supporting popular 2X-3X nm flash memories. VIA Labs, Taipei, Taiwan. 8666-2-2218 8924. [].



hard disk drives and eliminating the risk of mechanical failure, making them ideal for use in harsh environments. The Adlink ASD Series of SSDs is designed for use in rugged embedded applications, supporting a wide operating temperature range from -40° to 85°C and with shock and vibration tolerance to 1,500 G, 0.5 ms duration and 3.08 Grms, 7-800 Hz, respectively. In addition, the Adlink ASD Series supports firmware optimized RAID function and TRIM commands to maximize overall data transfer rates and minimize performance degradation over the life of the product. The ADLINK ASD Series offers significant increases in read/write speeds over HDDs, allowing for faster system boot, application load and data access. RAID arrays of two or more ADLINK SSDs are capable of optimizing utilization of available data transfer bandwidth and maximizing system performance. ADLINK, San Jose, CA. (408) 360-0200. [].


Quad Channel 500 MSPS FMC with 14-Bit Analog Input

A new rugged FPGA Mezzanine Card module is a quad-channel 500 MSPS 14-bit analog input card. The FMC-518 from Curtiss-Wright Controls Embedded Computing features Intersil’s new ISLA214P50 14-bit, 500 MSPS analog-to-digital converter, and enables I/O devices to be directly coupled to a host FPGA. By providing direct ADC connection to the host FPGA, this compact card ensures maximum throughput and enables multiple channels and boards to be synchronized. The FMC-518 speeds and simplifies the integration of FPGAs into embedded system designs. The low-latency, high-bandwidth module eliminates data bottlenecks. The card is designed for use in demanding military applications such as Signal Intelligence (SIGINT), Direction Finding (DF) and Radar that require highspeed, high-resolution ADC components as part of a digital receiver. FMC format (VITA 57) is supported on a wide range of CWCEC FPGA-based host boards, with or without local CPUs, which are designed to process the FMC-518’s I/O data with high-bandwidth, low-latency paths. The host FPGA, CPU and high-performance I/O is a suitable platform for the next generation of digital receivers. The FMC-518’s four ADC devices connect through the module’s high-bandwidth FMC connector to an FPGA-based host board to maximize data throughput and minimize latency. The FMC-518 supports an onboard programmable sample clock generator as well as an external reference input. Multiple FMC-518 boards can be synchronized to increase the number of input channels through the use of trigger input/output signals directly under the control of the FPGA, so not only are ADC devices synchronously sampled, but the data pipeline is coherent too. The FMC-518 supports four analog inputs through its 50Ω MMCX type front panel connectors. The analog inputs are single-ended and are Get Connected with required technology coupled to Intersil ISLA214P50 ADCs using a balun for AC coupling configuration to produce the broadband differential input byand the companies providingonto solutions now devices. The FMC-518, available in both air-cooled and conduction-cooled rugged versions, is easily and quickly integrated open standardsGet Connected is a new resource for further exploration based FPGA host boards.

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into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products Board for the New LPC1800 Family you are searching for.

Curtiss-Wright Controls Embedded Computing, Ashburn, VA. (613) 254-5112. [].

COM Express Compact Module Targets Low Power Performance Applications

A low-power COM Express compact module is powered by the Intel Atom processors 400 and 500 Series. The new SOM 6763 B1 from Advantech B1 with Intel Atom processor N455 (512K Cache, 1.66 GHz) and Intel Atom processor D525 (1M Cache, 1.80 GHz) migrates its memory from DDR2 to DDR3 along with both 18-bit and 24-bit LVDS. The SOM-6763 B1 is suitable for portable devices, medical equipment and rugged applications. The SOM-6763 B1 complies with COM R2.0 type 2 specification for customers targeting lower power consumption, higher performance applications. The compact design (95 x 95 mm) is suitable for applications such as portable POS, transportation, entry-level gaming machines, patient monitoring and factory automation. SOM-6763 B1 allows customers to choose from 18-bit or 24-bit LVDS, which makes available a greater variety of displays to choose from. Advantech iManager provides a valuable suite of programmable APIs such as Multi-level Watchdog, Hardware Monitor, Smart Fan and more; all with user friendly interfaces following the EAPI 1.0 standard. Since this is a built-in solution on chip, iManager ensures functions operate even if the OS fails. It also helps enhance system stability and compatibility with power sequence control, and reduces effort on carrier board design and platform migration.


For NXP’s new Cortex-M3-based LPC1800 microcontrollers, tex has introduced the Evaluation Board LPC1850 ensuring an easy evaluation of the LPC1800 family’s main features. The evaluation board is equipped with a LPC1850 operating at 150 MHz and offers some special features such as 64 Mbyte SDRAM, 32 Mbyte Parallel Flash, 512 Kbyte SRAM and serial EEPROM. It can Get as Connected be operated over USB as well using an with technology and companies prov Get Connected external power supply or power-over-Eth- is a new resource for further exploration into pro from a company, speak directly with an Application Engine ernet. For debugging the datasheet board contains in touch with the right resource. Whichever level of service you requir a JTAG and also a 20-pin Debug Get Cortex Connected will help you connect with the companies and produc Connector with ETM. All communication channels (USB, Ethernet, OTG, UART and CAN) are provided. An iPod interface cable is available as an option. Application samples show how to control the iPod. With the DSP functionality, the conversion and output of the audio signal over the onboard Class-D audio amplifier is possible. Hitex Development Tools, Irvine, CA. (949) 863-0320. [].


Get Connected with companies and products featured in this section.

Advantech, Irvine, CA. 949-789-7178. []. Get Connected with companies and products featured in this section.




Xeon-Based Server Comes in a Mini-ITX Form Factor

A new small server in a Mini-ITX form factor is based on Intel's C206 chipset and Xeon processor E3-1200 series and Core i7/i5/i3 processors, and uses the Mini-ITX form factor to provide a very small server board. The WADE-8011 from American Portwell is designed to provide high performance with greater power efficiency and is suitable for applications such as network security, storage server, POS, lottery, medical, gaming, high-resolution digital signage, surveillance security monitoring and kiosk applications. WADE-8011's main features include: two DIMM support dual channel ECC/UNB or non-ECC DDR3 SDRAM up to 32 Gbyte; dual display via VGA/DVI/ HDMI; Intel HD Graphics 3000; two SATA 3.0 connectors (up to 6 Gbit/s) and four SATA 2.0 connectors (up to 3 Gbit/s), and RAID 0, 1, 5, 10; one PCIe x16 and one PCIe x1 plus USB 2.0 via SDVO connector (PCI x16 can directly split into two PCIe x8 via riser card without add-on PCIe switch); dual GbE based on PCIe x1 high bandwidth I/O interface; and Intel Active Management Technology (Intel AMT) 7.0. The very small WADE-8011 is capable of providing features required by high-end servers, such as power savings and maximum utilization of space, says Robert Feng, product marketing manager at American Portwell Technology. Network security applications require high-performance PCIe x8 speed and WADE-8011 provides two Gen 2 PCIe x8 channels without the need to add on a PCIe switch. This is twice as fast as the PCIe Gen 1 and gives the user multi-GbE, and a 10G or higher Ethernet platform that is cost-effective and has unbeatable performance. American Portwell, Fremont, CA. (510) 403-3399. [].

CANopen Electronic Data Sheets Now in XML

Electronic data sheets are formalized device descriptions, which are used as exchange format for software tools, too. In the early days of CANopen, there was just a textual format standardized (CiA 306). The XML format introduced in 2007 has not been accepted that well, due to the limited advantages compared to the ASCII format. With version 1.1 the XML schema definition (CiA 311) is improved: It is now possible to describe modular CANopen devices as well as “field.” “Fields” are sub-structures of parameters and sub-parameters (used in Arrays and Records). Still missing are description possibilities for finite state automata (FSA) and constraints between parameters and sub-parameters. The CiA 311 conformant XSD files describing the communication and application behavior of a CANopen device could be generated by means of tools and also be proofed by tools. The XSD files are suitable for device design, device configuration, system integration and diagnosis. Many CANopen tools will understand XML files. If not, there are also parsers available, which translate the ASCII format into XML format and vice versa. “The acceptance of the XML format will increase significantly due to the additional functionality,” said Thilo Schumann, XML expert in the CiA office. “In this fall, we will see the first tools supporting the improved XML-Schema.” The CANopen XML schema is downloadable free of charge. CAN in Automation, Nuremberg, Germany. +49-911-928819-0. [].



CCPMC Ethernet Switch Card for Tough Military and Aviation Applications

A new 10-port managed/ unmanaged Ethernet switch PMC for embedded use in the aerospace and defense industries features advanced management functions, health monitoring, onboard magnetics, and an integrated Ethernet controller (NIC). The MPR-ES-1 from Ballard Technology includes two Gigabit ports and eight 10/100 Mbit/s ports. One Gigabit port routes directly to the integrated

Ethernet controller and provides the host computer with a direct connection to the switch for easy system expansion. The second Gigabit port can act either as a straight 1 Gbyte path for the host single board computer, as a high-speed uplink to other switches, or as a standard 10/100/1000 Mbit/s port. The CCPMC form factor allows easy integration with modern embedded computers, including VME, VME-64, cPC, and VPX systems. The MPR-ES-1 combines an advanced Marvell switch controller with onboard magnetics for high performance and reliable operation. It provides IEEE 802.1X MAC-based authentication and support for up to 8K MAC address entries with automatic learning and aging. Management functions include VLAN, QOS and ingress/egress limiting. In addition, the switch includes health monitoring and diagnostic features such as Built-in Test (BIT), temperature monitoring, port mirroring and Virtual Cable Tester. Low power consumption and high MTBF ratings make the MPR-ES-1 an ideal choice for rugged, high-availability systems. The MPR-ES-1 is suitable for both conduction- and convection (air)-cooled systems. Ballard Technology, Everett, WA. (800) 829-1553. [].


Rugged, Battery-Powered Server Brings Local Cloud Computing to the Field

A new rugged portable server solution for forward deployed military environments or any remote location that requires enterprise computing resources is able to run on its own internal power for up to 4 hours. The Vigor EX-B from NextComputing is designed to support tactical operations centers and other mission-critical environments. The Vigor EX-B is a suitable platform for delivering virtualized “local cloud” computing services to multiple users in a remote setting. The Vigor EX-B system is designed for portability, reliability and performance. The rugged anodized aluminum chassis with both interior and exterior rubber shock absorbers ensures that the system will hold up to the rigors of field use. With its integrated Lithium-ion battery, the unit is able to run for up to 4 hours on battery power alone. The Vigor EX-B is also based on Intel Virtualization Technology, including full support for VMWare and other hypervisor platforms. Lastly, to ensure security of sensitive data, the system supports Intel’s Trusted Platform Module (TPM) technology, a growing requirement for many defense and intelligence programs. Key features include dense, small form factor, rugged chassis (7.92” D x 17.53” H x 19.75” W) weighing less than 35 lbs. with easy access to internal components for field service and upgrades. The unit has a 320W power supply with removable Lithium-ion battery pack. The processor is a Xeon E3-1200 series Quad-Core processor with up to up to 32 Gbyte DDR3 memory. There are four full-length, full-height PCI Express and PCI expansion slots for supporting off-the-shelf Gigabit, 10G, or InfiniBand networking cards. The unit is available with or without a built-in 17-inch wide screen, high-resolution (1920x1200) LCD monitor and can come with integrated Intel HD Graphics or discrete professional graphics solutions from NVIDIA and AMD. There are up to 6 terabytes (TB) of fixed or removable Get Connected with technology storand companies providing solutions now age with multiple RAID options.

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Next Computing, Nashua, NH. (603) 886-3847. [].

Wind River Unveils Graphics-Rich Linux Platform

The latest Linux 4, Update Pack 2, is the latest release of Wind River’s commercial embedded Linux runtime and development platform. The company says it is the first commercial embedded Linux to provide a fully integrated graphics software stack, from the board to the user interface framework level, for the latest Intel and Texas Instruments processors. The pre-integrated graphics stack within Wind River Linux includes GTK, Qt, X.Org and the Wind River Tilcon Graphics Suite. It works out of the box using the latest hardware and graphics drivers, including Intel Embedded Media and Graphics Driver on Intel Atom processor with OpenGL and PowerVR driver on Texas Instruments’ (TI) AM35x, AM37x, AM389x TI Sitara ARM microprocessors and OMAP35x processors with OpenGL ES. This stack bundles the latest versions of popular graphics applications and is optimized for embedded development. In addition, Linux Standard Base (LSB) certification assures compatibility with all LSB-compliant third-party applications. Other key features of Wind River Linux 4, Update Pack 2, include the Web 2.0 Cross Web Development Toolkit that enables developers to debug, deploy and test directly on targets using HTML/Javascript and web page rendering languages. In addition, there is the Qt Development Toolkit, which is optimized for embedded development and can significantly increase productivity, reduce costs and shorten time-to-market. New security features include strongSWAN, an open source VPN solution that improvesIP security; and a new SEEdit feature that gives users simplified language for creating and editing the security policies that keep systems safe. There are also a number of Workbench enhancements and new tools for Linux developers for streamlined Linux development. Wind River Systems, Alameda, CA. (510) 748-4100. [].

Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly 3.5 Tbyte of Solid Storage Rugged ½ ATR with anState Application Engineer, orinjump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. NAS Whichever level of service you require for whatever type of technology, A natural convection-cooled sub-½ ATR supports between Get Connected will help you system connect with the companies and products 1 Tbyte and 3.5 Tbyte ofsearching rugged for. solid state storage. The XAct3000 you are

from Extreme Engineering Solutions is a turnkey NAS; by simply figuring the JBODs or RAID units and connecting it to an Ethernet network, customers can start storing and retrieving files. The XAct3000 supports ATA secure erase and meets the erase requirements of the DoD NIS- Get Connected with technology and companies prov POM 5220.22 and NSA/ Get Connected is a new resource for further exploration into pro CSS 9-12 specifications. datasheet from a company, speak directly with an Application Engine The rugged Network At- in touch with the right resource. Whichever level of service you requir tached Storage (NAS)Get sys-Connected will help you connect with the companies and produc tem supports NFS, SMB/CIFS, FTP, SFTP and HTTP protocols. Data encryption is also available for the system. The XAct3000 features include up to 3.5 Tbyte of solid state storage with storage declassification and ATA secure erase. Possible configurations include JBOD, RAID 0, RAID 1, RAID 5 and RAID 6. The drives have optional 256-bit AES encryption and use NFS, SMB/CIFS, FTP, SFTP and HTTP protocols. The box supports two 10/100/1000BASET Ethernet ports and has physical dimensions of 4.88 in. (W), 5.65 in. (H), 10.30 in. (L) weighing less than 12 pounds. The chassis is Sub-½ ATR natural convection-cooled or conduction-cooled (reduced height and length). Get Connected with companies and Extreme Engineering Solutions, Middleton, products featured in this section. WI. (608) 833-1155. [].


Get Connected with companies and products featured in this section.




Low-Cost Bluetooth Modules for Short Distances

Two new Bluetooth modules are targeted for OEM integration for short-range wireless data connectivity. Manufactured to fulfill OEM needs for embedded short-range communication in products, the low-cost RB4000 and RB4000HM modules from Radicom Research act as RS-232 cable replacement and offer an affordable, easy alternative for wireless point-to-point communication across distances up to 60 feet. Featuring Serial Port Profile (SPP), the RB4000 Series is a full Bluetooth system solution with an integrated controller, antenna and Bluetooth transceiver. Utilizing the BlueCore4-External Chipset from CSR, these Class 2 modules are Bluetooth V2.0 + Enhanced Data Rate (EDR) compliant for increased throughput, reduced battery consumption and improved security. The result is faster pairing and superior performance, even in the presence of interference from 802.11 (Wi-Fi) wireless devices or other 2.4 GHz radios. Designed for integration in barcode readers, medical devices and other monitoring systems, the RB4000’s low power consumption and extreme operating temperature range (-40° to +85°C) provide flexibility across a number of industries and situations. Model RB4000 (surface-mount PCB module with onboard antenna), RB4000HM (through-hole module) and RB4000HM-c (built-in U.FL connector) are available now with prices starting at $9.00 for the RB4000 in quantities of 500 pieces. Bulk discounts are available for higher OEM volume requests. Customized OEM specifications and private labeling are welcome. Radicom Research, San Jose, CA. (408) 383-9006. [].

OpenComRTOS for Freescale PowerPC Processors Integrated into Designer Suite

For applications where performance is paramount, using less memory means higher performance and less energy consumption. The small code size of OpenComRTOS from Altreonic frees a lot more of the L1 cache for the user applications than traditional monolithic RTOS. If it is possible to reduce the clock frequency, even more power can be saved. A full kernel with all services only requires between 7.9 to 10.4 Kbytes for program memory and less than 6 Kbytes of data memory, depending on the compile time options and services used. This was measured by compiling a minimal application for an e600 target with Altivec support and comparing the results using a mapfile analyzer. Nevertheless, this is still a complete prioritybased preemptive scheduling RTOS with support for distributed priority inheritance. Besides task scheduling, services provided are: events, semaphores, resources, port hubs, FIFOs, packet and memory pools in blocking, non blocking, blocking with timeout and asynchronous semantics. Porting to the PPC has been swift and efficient. The picture shows the block diagram of the Freescale e600 core-based MPC8640D dual-core processor chip. With OpenComRTOS one can transparently program a multiprocessor architecture and distribute the application over multiple cores, multiple multicore chips on a single board, and over multiple boards even when geographically distributed. Simultaneously, one of the nodes can be running a classical host-OS like Linux or VxWorks transparently integrating with it. The latter allows any node full access in a transparent way to all host services like file I/O, Human Interface devices and network I/O. The OpenComRTOS Designer suite consists of a high-level visual development environment (OpenVE) in which the user specifies independent application and target topology allowing simulation of the application on the development PC. Code generators then generate most of the target-specific C code and the build system. A new task level debugger and the visual OpenTracer allow examining and profiling the application at runtime. OpenComRTOS Designer also imports platform descriptions for complex boards, e.g., using the e500-based P4080 with all its I/O and communication options. Altreonic, Liden, Belgium, +32 16 20205 9. [].



HD Video Streaming Appliance Is Rugged, Small, Lightweight, Powerful and Flexible

A rugged streaming network appliance is designed in response to the growing requirement for unmanned vehicles to capture, process and transmit increasing quantities of video information at increasing resolutions. The daq8580 from GE Intelligent Platforms is a complete, standalone, application-ready solution that delivers flexibility, high performance and excellent cost-effectiveness. With dimensions of 10.1” long by 7.3” deep, weighing only 5 lbs and consuming only 25 watts, the daq8580 is suited for deployment in environments that are constrained in size, weight and power (SWaP). The rugged

nature of the daq8580 means that it is highly resistant to the shock, vibration and other hostile characteristics typical of deployment in an unmanned vehicle. Its 28V power supply is designed to meet MIL-STD-704E and MIL-STD-1275B, making it suitable for aircraft as well as ground vehicle operations. The daq8580 can acquire two parallel streams of HD (1,920 x 1,080) at 30 frames/ second or up to four channels of standard definition (SD) video. It can also support DVI or VGA modes up to 2,048 x 2,048 pixels. It then processes these streams using an Altera Arria II GX FPGA combined with Texas Instruments media processors. The video streams are encoded to the H.264 industry standard prior to transmission, ensuring the optimum trade-off between image quality and required bandwidth High-speed ADC devices provide input digitization of the various supported analog video formats. The embedded Altera FPGA controls data capture and routing and can be used for a variety of image processing tasks. The TI DSP co-processors provide efficient and streamlined video data processing. When necessary, the daq8580 can be loaded with custom FPGA and DSP code to perform a broad range of video processing functions on the video input streams. GE Intelligent Platforms, Charlottesville, VA. (800) 368-2738. [].


Embedded FPGA Development Environment Based on AXI4 Interface Protocol

A Xilinx Virtex-6 based XMC module supports pluggable daughter cards for customizable I/O. In conjunction with the XPedite2300, introduced by Extreme Engineering solutions, is an embedded FPGA development environment based on the AXI4 interface protocol, the XPedite2300 FPGA Development Kit (FDK). The FDK simplifies the development of high-performance, real-time, streaming data applications that run on the XPedite2300 FPGA board. The FDK includes IP blocks, example FPGA designs, and software to control and communicate with FPGAs. All of the IP blocks included in the FDK interface to the industry-standard AXI4 interconnect. Xilinx supports the AXI4 interface standard in the Virtex-6 to facilitate plug-and-play FPGA design with the goal of shortening time-to-market for customers. The AXI4 interface standard finally brings true reuse to the FPGA industry. Customers can easily integrate FPGA logic based on the AXI4 interconnect from X-ES, Xilinx and other third-parties without having to make any modifications, making it much easier to create working FPGA designs. The use of the AXI4 interface standard has made reuse of IP blocks simple and straightforward for developers. The XPedite2300 is a conduction-cooled XMC module well suited to data streaming applications that require real-time signal processing, such as video surveillance, signals intelligence and infrared threat detection. It supports the Virtex-6 LX130T, LX195T, LX240T, LX365T, SX315T and SX475T FPGAs. There are initially two daughter cards that can be mounted on the module: a 10-bit, dual, 1.5 GSPS (or single 3.0 GSPS) A/D daughter card and a 14-bit, dual, 2.5 GSPS D/A daughter card. The XPedite2300 features include two channels of DDR3 SDRAM, up to 1 Gbyte (512 Mbyte each), volatile and non-volatile FPGA configuration flash plus 128 Mbyte of flash. Interfaces include a 180-pin, high-density, daughter card header for expandable I/O and a 40-pin daughter card Get Connected with technology and companies providing solutions now header for high-speed serial links. There is front and rear panel I/O support and a x8 PCI Express XMC interface on the Pn5 connector.

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Extreme Engineering Solutions, Middleton, WI. (608) 833-1155. [].

48-Channel PWM Generator with 12-Bit Resolution

A pulse width modulation (PWM) generator supports 48 independent channels and each channel has an individually adjustable 12-bit (4,096 steps) PWM register and a 6-bit (64 step) ±50% correction register. All controls are programmable via a simple TTL/CMOS 50MHz serial data interface. The LT8500 from Linear Technology can be used in a wide variety of PWM-intensive applications such as LED control, as well as industrial and robotic applications. For example, the LT8500 can be used with three LT3595As, 16-channel LED drivers, to deliver 48 independently dimmed LED strings for locally dimmed LED backlighting for large LCD displays. The correction resister allows matching light output of each LED string. The LT8500 operates from a 3V to 5.5V input range, enabling it to operate from a wide range of standard power buses. For LED applications, each channel has individual 6-bit dot correction current adjustment and 12-bit gray scale PWM dimming. The 40 ns on-time of the LT8500 offers very wide dynamic contrast ratios. Both correction and gray scale dimming are accessible via a serial interface in TTL/CMOS logic. The LT8500EUHH is available in a 56-lead 5 mm x 9 mm QFN package, priced starting at $2.95 each, in 1,000-piece quantities. The extended temperature version, the LT8500IUHH, or I-grade, is also available, priced starting at $3.25 each in 1,000-piece quantities.

camera, audio, USB, Wi-Fi, Bluetooth and a powerful graphics capability. The RE2 from Blue Chip Technology targets, among others, use in telematic systems, access control and public media systems. The RE2 uses the ARM Cortex A8 and a Texas C64x DSP, enabling it to handle high-quality graphics such as moving media or 3D, while also managing complex tasks and a broad range of peGet Connected with technology and companies prov ripherals. The RE2 is Get Connected is a new resource for further exploration into pro currently available datasheet from a company, speak directly with an Application Engine with support for in touch with the right resource. Whichever level of service you requir Embedded Win- and produc Get Connected will help you connect with the companies dows and Linux, with support for other operating systems available on request. The board is also available in an “extended temperature” version, making it suitable for rugged industrial and scientific applications. Although the RE2 is available off-the-shelf in its standard form, Blue Chip also offers a customization service, enabling it to provide hardware specific to the needs of its customers. Blue Chip Technology also offers extensive software support and a complete product manufacturing and testing service.


Blue Chip Technology, Cheshire,with UK.companies +44 (0) and 1829 772000 Get Connected products featured in this section. [].

Linear Technologies, Milpitas, CA. (408) 432-1900. []. Get Connected with companies and products featured in this section.




New Levels of Hardware Integration with LabVIEW 2011

National Instruments has unveiled NI LabView 2011, the 25th-anniversary version of its award-winning system design software. LabView accelerates the productivity of engineers and scientists who develop and deploy measurement and control systems to solve some of the world’s greatest engineering challenges. LabVIEW 2011 can dramatically increase development efficiency through new engineering-specific libraries and its ability to interact with almost any hardware device or deployment target, including the new multicore NI CompactRIO controller and the NI PXIe-5665, one of the highest performance RF vector signal analyzers. It also supports assemblies built in the latest Microsoft .NET Framework and includes numerous features driven directly from user feedback. With these and other advantages, LabVIEW 2011 helps engineers integrate individual system components into a single, reconfigurable platform so they can do their jobs faster, better and at a lower cost. LabVIEW 2011 makes it possible for engineers to achieve significant productivity gains in a variety of tasks, including the following time-saving functions: • Quickly develop visually striking, contemporary user interfaces with a new Silver palette of controls and indicators • Reuse code with support for the latest .NET assemblies, .m structures and new Xilinx IP for the LabView FPGA Module • Achieve up to five times faster loading, wiring, editing and compiling of FPGA code • Programmatically build and distribute executables to targets • Spawn asynchronous threads to create multithreaded applications more quickly with a new communication API With its stability for mission-critical applications, as well as its simplified integration with hardware from many industry leaders, LabVIEW 2011 gives measurement and control system designers the confidence to innovate efficiently within a proven support infrastructure. When combined with modular hardware, LabVIEW 2011 is the centerpiece of the NI approach to graphical system design, which provides a unified platform for designing, prototyping and deploying applications with maximum efficiency. Engineers and scientists in virtually every industry are using graphical system design, from basic measurement applications to the most complex, advanced research projects. National Instruments, Austin, TX. (512) 794-0100. [].

Rugged Miniature Image Stabilizer Reduces Size, Weight and Power Consumption

A miniature image stabilizer from GE Intelligent Platforms complements the recently announced ADEPT3000 Miniature Video Tracker: like the ADEPT3000, the rugged MIP3ES is designed for demanding military/aerospace applications in which size, weight and power (SWaP) are highly constrained. The MIP3ES measures only 34 mm x 24mm—approximately the size of a microprocessor—is light in weight at around six grams, and consumes minimal power (approximately 1.5 watts) making it suitable for deployment in cramped, harsh conditions such as are found in small unmanned aerial vehicles, video gimbals and man-portable devices. Despite its extremely small size, the MIP3ES offers high performance stabilization of realtime video images with any standard definition analog video signal. It incorporates onboard serial links allowing it to interface to most platforms and is designed for easy configuration and device control with intuitive web-based software. GE Intelligent Platforms, Charlottesville, VA. (800) 368-2738. [].



Type 6 COM Express Module Features ECC RAM Support for New Carrier Board Designs

A new Type 6 COM Express embedded computer module uses Intel’s second-generation quad-core and dual-core Intel Core i7/ i5 processors. The PCOM-B217VG-VI-ECC from American Portwell has a Type 6 connector pin assignment, which is the successor to Type 2. It adds the DisplayPort and highspeed USB 3.0 peripheral support contained in the latest high-performance processors and chipsets in place of parallel PCI and IDE interfaces that are no longer present in most new chipsets. The PCOM-B217VG-VI-ECC module features an error-correcting ECC memory controller for higher system and data reliability, and Turbo Boost Technology 2.0 which dynamically increases the operating frequency of processor cores beyond baseline levels—even beyond 3GHz—according to workload and real-time power and temperature measurements. This frequency increase is complementary to hyper-threading, which raises the performance of multi-threaded and single threaded applications. The processor-integrated graphics engine supports high-end media/graphics capabilities and delivers greater graphics performance while reducing overall platform power requirements. Expansion options on the developer PCOM-C210 COM Express Type 6 carrier board include: More PCIe 2.0 add-on cards and devices are supported with one PCIe x16 2.0 (configurable as two x8 or two x4 and one x8), and six PCIe x1 2.0 (configurable to one x4); LPC interface; SMBus/12C interface; and high definition audio interface. The faster x16 interface improves the performance of commercial market graphics cards (GPUs) for gaming, imaging and surveillance applications. American Portwell, Fremont, CA. (510) 403-3399. [].



Market-revealing keynote speakers Technically focused embedded seminars and workshops Vendors demonstrating newest technologies Network with the brightest engineers Can you afford to miss it? FREE admission, lunch, parking and prize drawing entries at each event. RTECC is your best opportunity to discover a new world of possibilities within the embedded market.

Scan this QR code with your smartphone and REGISTER TO ANY UPCOMING RTECC EVENT INSTANTLY! Go to for more information on QR codes.

UPCOMING LOCATIONS Portland, OR 10/11/11 Seattle, WA 10/13/11 Toronto, ON 10/28/11 Albuquerque, NM 12/06/11 Phoenix, AZ 12/08/11

with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

Advertiser Index Get Connected with technology and companies providing solutions now Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.




Advanced Micro Devices, Inc............................................................................................. 60................................................................................................................. BittWare, Inc..................................................................................................................... Cogent Computer Systems, Inc.......................................................................................... 16.......................................................................................................... End of Article Products Elma Bustronic Corporation............................................................................................... 25.......................................................................................................... Extreme Engineering Solutions, Inc.....................................................................................

Get Connected with companies and Innovative Integration......................................................................................................... 40.................................................................................................. Get Connected products featured in this section. with companies mentioned in this article. Interface Concept.............................................................................................................. ISI Nallatech...................................................................................................................... Jayco Panels.....................................................................................................................

Get Connected with companies mentioned in this article. JumpGen Systems, LLC.................................................................................................... LiPPERT Embedded Computers, Inc...................................................................................

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Logic Supply, Inc............................................................................................................... Measurement Computing Corporation................................................................................ 26............................................................................................................ MILESTONE...................................................................................................................... 47.................................................................................................. MSC Embedded, Inc.......................................................................................................... Netrino, LLC...................................................................................................................... One Stop Systems, Inc...................................................................................................... Pentek, Inc......................................................................................................................... Phoenix International.......................................................................................................... 4............................................................................................................ Portwell, Inc...................................................................................................................... 59............................................................................................................ RTECC.............................................................................................................................. 57................................................................................................................ Rugged SBC & Linux and Java Showcase........................................................................... 45........................................................................................................................................ Tech Design Forum............................................................................................................ 17............................................................................................. Themis Computer.............................................................................................................. 41.............................................................................................................. WDL Systems..................................................................................................................... XTech...............................................................................................................................

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AMD is ushering in a new era of embedded computing. The AMD Embedded G-Series processor is the world’s first integrated circuit to combine a low-power CPU and a discrete-level GPU into a single embedded Accelerated Processing Unit (APU). Unprecedented level of graphics integration High performance multi-media content delivery Small form factor and power efficient platform Learn more about new levels of performance in a compact BGA package at : Stop by AMD’s booth (#801) at ESC Boston to learn first-hand about this new APU (accelerated processing unit) architecture and how it can be leveraged to help you deliver innovative low-power and value-oriented solutions for a variety of embedded applications. ©2011 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD Arrow logo and combinations thereof are trademarks of Advanced Micro Devices, Inc. DirectX is a registered trademark of Microsoft Corporation in the United States and other jurisdictions. Other names are for informational purposes and may be trademarks of their respective owners.

RTC magazine  

September 2011

RTC magazine  

September 2011