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The magazine of record for the embedded computing industry

June 2010



Low-Power CPUs: Make Them Really Work in Small Spaces CompactPCI Can Team with PXI Tight Integration for Better Motor Control An RTC Group Publication

Stroke of Genius

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Hypervisors and Operating Systems for Multicore

42 Atom N450 on an Extreme Rugged PC/104-Plus SBC

45 FeaturePak Module Features 96 Programmable Digital I/O Lines


47 High Bandwidth Gigabit Ethernet Switch Supports Failsafe Operation

JUNE 2010


5Editorial Cyber War—Coming to a Nightmare near You. Insider 6Industry Latest Developments in the Embedded Marketplace

9 & Technology Newest Embedded Technology Used 42Products by Industry Leaders Small Form Factor Forum Small Form Factors Forever



Intel’s “Tunnel Creek”—A New Thrust for the Atom into Embedded

Technology in Context


Low-Power CPUs

Hypervisors and OSs for Multicore

Call to ARMs: Auto Industry Hypervisors Ease the World of 12 AQuality 26 Standards Provide Path to Multicore Processors SWaP-C Reduction David Jedynak, Curtiss-Wright Controls Electronic Systems

Cool as Low-Power CPUs Bring Intelligence into Small 16 Keeping Spaces Ciaran MacNeill, VIA Technologies



CompactPCI and PXI Enable Advanced Measurement and Control in Embedded Applications Patrick Webb, National Instruments

Robert Day, LynuxWorks

Before You Leap: Hypervisors 30Look Present New Design Challenges for Embedded Developers Yi Zheng, QNX Software Systems

Leverage Multicore 34Hypervisors Processors for Embedded Systems Kim Hartman, TenAsys Corp.

TECHNOLOGY DEPLOYED Motor and Motion Control

Integrated Devices Yield 38Tightly More Efficient Motor Control Yvonne Lin, Actel

Tom Williams

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EDITOR-IN-CHIEF Tom Williams, CONTRIBUTING EDITORS Colin McCracken and Paul Rosenfeld MANAGING EDITOR Marina Tringali, COPY EDITOR Rochelle Cohn

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The magazine of record for the embedded computing industry


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Free Online Spotlighting the Trends and Breakthroughs in the Design, Development and Technology of Embedded Computers. Search Archived Editions along with the Latest News in the Embedded Community. An RTC Group Publication



To Contact RTC magazine: HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, Editorial Office Tom Williams, Editor-in-Chief 245-M Mt. Hermon Rd., PMB#F, Scotts Valley, CA 95066 Phone: (831) 335-1509 Fax: (408) 904-7214

Published by The RTC Group Copyright 2010, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.


Tom Williams Editor-in-Chief


Cyber War—Coming to a Nightmare near You.

ever mind the “living dead” movies, reconstituted gruesome remakes of H.P. Lovecraft or endless iterations of Freddy Krueger. If you want to be scared, pick up a copy of Cyber War by Richard Clarke and Robert Knake. In it, the authors describe, in language a lay person can understand, the kinds of dangers that are being hatched by hostile powers via the Internet. These are not 37-year old hackers living in their mother’s basement. These are real threats being concocted by PhD computer scientists specially trained and backed by the budgets of nation states like Russia, China, Iran and who knows where else. What emerges from the first part of the book is a picture of how we have become totally dependent on the Internet for commerce, information, communication, entertainment, education and many more vital things like electrical power, manufacturing, finance, transportation . . . and national security in terms of military capabilities and intelligence. With such increasing dependence comes increasing vulnerability because the Internet is so vast, the interconnections so pervasive and the software— with operating systems alone comprising 30 to 50 million lines of code—so complex and filled with errors that no security system can even hope to be completely confident. Over the past two decades this has all built up, rather like the British Empire, “in a fit of absentmindedness.” What started out as some academics linking up via a limited number of universities and government research facilities has grown into something like a global nervous system. What was created by some idealistic specialists who saw only good coming of it, has opened the path to sinister forces bent on waging asymmetric warfare in which the vast military might of a power like the United States can be countered by stealth attacks on the information infrastructure. And still the complexity, our dependence on it and our vulnerability continue to grow day by day. One of the most unnerving manifestations of this is the move to the Smart Grid. On the one hand, the Smart Grid is absolutely necessary because so much of our electrical energy is wasted in transmission and inefficiencies. On the other hand, the present grid is already dangerously vulnerable to attack and compromise. In fact, we have seen examples of how large portions of it can be

brought down—and we haven’t even considered what might happen if the attackers hit the frequencies of large generators and brought them to a fiery halt. It is fairly well assumed that hostile powers have already placed strategic “logic bombs” in crucial places in the nation’s infrastructure. Some have been discovered, but it’s the undiscovered ones that are the real worry. The U.S. now has its own Cyber Command, and in the digital shadows there is an ongoing conflict taking place between those attempting to penetrate the vital Web sites and those trying to defend them, as well as between U.S. offensive moves being countered by foreign defensive moves. All this will not come to light unless there is an actual conflict. What we have seen to date is the result of test runs and the countermeasures taken against attempts that were discovered. Mitigating the outbreak of full cyber conflict somewhat is the mutual dependence that all parties have on the commercial infrastructure provided by the Internet and its reach into the worldwide global market. Hampering the U.S. defensive capability is the fact that while the Cyber Command is very concentrated on protecting U.S. military and government assets on the Web, there is little or no provision for it to protect private industry. Of course, it is private industry—in the form of power companies, transportation systems, manufacturing facilities, etc.—that comprises the bulk of the U.S.’s vital infrastructure. That infrastructure in its present form cannot be securely defended. Clarke proposes breaking the Internet into a public Internet with its commerce, research, entertainment and other public functions, and a variety of more secure intranets for government, transportation, electrical and other vital industries that would use different protocols and be separate from the general Internet. Just how this would be accomplished, what it would cost and how secure it would be are by no means clear. Where would the lines be drawn? Where really are the boundaries between public and private, vital and more accessible? Who gets to decide? Or will we go to a huge effort thinking we have made ourselves safe only to wind up like the pathetic creature in Kafka’s fable, The Burrow, with that nagging hissing sound ever present and in spite of all efforts at escaping it in the confines of its burrow, ending with the line, “But all remained unchanged.” RTC MAGAZINE JUNE 2010



INSIDER JUNE 2010 Curtiss-Wright to Acquire Hybricon Curtiss-Wright has announced that it has signed a definitive purchase agreement to acquire Hybricon for $19 million in cash. Hybricon is a leading supplier of high-performance electronic packaging for the aerospace, defense and commercial markets, and provides electronic subsystem integration expertise, which generates more efficient product development and reduced design and manufacturing risk for its customers. The transaction is expected to close by June 1, 2010. Hybricon, based in Ayer, MA, designs and manufactures custom and standards-based enclosures and electronic backplanes for defense and commercial applications. They are a leading supplier for the most popular embedded commercial-off-the-shelf (COTS) system architectures including OpenVPX, VPX, VXS, VME64X, CompactPCI and MicroTCA. In 2009, they had sales of approximately $17 million, including an 85% concentration in the defense market. Hybricon will operate in Curtiss-Wright’s Motion Control segment, within the Electronic Systems division.

Kontron Acquires AP Labs Group

Kontron has acquired 100 percent of AP Labs Group, which is based in San Diego, CA. The group, which has two operating companies, is a major system integrator in the areas of defense and aerospace. Since its inception in 1984, the company has established itself on the market for the development and series production of highly complex and robust computer systems, as well as specialized applications. Kontron anticipates that both new subsidiaries will make an annual revenue of $30 million. Kontron intends to integrate AP Labs with its North American headquarters, which is also based in San Diego. Kontron has access to cost-efficient, local production capacities as the result of the company AP Parpro Inc., which also forms part of the group and is located in Mexico, close to Kontron’s NA headquarters. With its most recent purchase, Kontron intends to further expand its position as a provider of complete solutions for the se-



curity area, thereby pursuing its new strategy of concentrating on high-margin core embedded systems. AP Labs’ strengths in the engineering area are also expected to help Kontron further optimize both future development costs and times to product launch. Time-to-market will also be reduced significantly as a result of the complete solutions product range.

The ZigBee Alliance and IPSO Alliance Collaborate on ZigBee IP and ZigBee Smart Energy 2.0

The ZigBee Alliance, and the IP for Smart Objects (IPSO) Alliance, have announced an agreement to collaborate on wireless home area networks (HAN) using the ZigBee IP specification and the ZigBee Smart Energy version 2.0 standard. The two alliances will collaborate on expanding HANs by using IP technology. The ZigBee Alliance is a global ecosystem of companies creating wireless solutions for use

in energy management, commercial and consumer applications, and the IPSO Alliance promotes the use of Internet Protocol (IP) in smart objects. ZigBee Smart Energy is the market-leading wireless HAN standard with more than 40 million smart meters being installed around the world. Common HAN devices include utility meters, thermostats, pool pumps, water heaters, appliances and plug-in electric vehicles. It was developed by industry-leading utilities, suppliers and technology companies to connect those everyday household devices to the Smart Grid. Last year, it was selected by the U.S. Department of Energy and the National Institute of Standards and Technology (NIST) as an initial interoperable standard for HAN devices. IPSO is the latest organization to collaborate on ZigBee Smart Energy. Four other organizations are working to expand this standard for HANs, including DLMS, EPRI, ESMIG and HomePlug Powerline Alliance.

Enomaly and Geminare Partner to Deliver Cloud Infrastructure and Recovery

Enomaly and Geminare have announced a strategic partnership to further enhance their offerings in the Cloud services market. The joint Enomaly and Geminare solution lets service providers offer their customers a real-time disaster recovery failover solution in the cloud, alongside a complete, secure and award winning IaaS cloud service platform. Enomaly’s Elastic Computing Platform (ECP) is a multitenant cloud service delivery platform that enables service providers to operate their own feature-rich revenue-generating cloud infrastructure. Geminare’s

Server Replication RaaS offering is a white-labeled multi-tenant cloud service platform that provides customers with server replication services enabling automatic failover and failback for their mission-critical applications like MS Exchange, SharePoint, SQL, BlackBerry Enterprise Server, IIS and Oracle databases. In the event of a server failure, service is automatically redirected to the cloud replica server and it is business as usual with zero capital investment and no onsite hardware required. This in turn gives Cloud Service Providers an instant turn-key disaster recovery solution for their customers while increasing their revenue per hosted server. Through integration and deployment of Geminare’s Server Replication RaaS platform on the Enomaly ECP IaaS Platform, service providers can change the way disaster recovery, business continuity and server replication services are delivered through the Cloud, providing their customers with dynamically allocated, burstable IaaS infrastructure combined with a cost-effective way to manage and monitor their cloud recovery server infrastructure from anywhere, at any time.

Cypress Launches Online Design Community for PSoC Platform and Other Technologies

Cypress Semiconductor has introduced a new online community for designers to share design tips, ask questions and find in-depth information on a wide range of Cypress products, including the PSoC programmable system-on-chip. The new Cypress Developer Community website, now available at www.cypress. com/go/community, includes forums organized by product type

where users can interact. It also includes a video library, blog entries from Cypress technical experts and tweets from the company’s Twitter account. To celebrate the launch, Cypress will hold monthly drawings to give away an Apple iPad to new registrants. The Cypress Developer Community includes forums focused on the company’s flagship PSoC programmable system-onchip devices, including the new PSoC 3 and PSoC 5 architectures and the supporting PSoC Creator software. Design engineers can post questions and comments in sections dedicated to device programming, solutions to design

problems, and on the programmable analog and digital resources and applications for each of the architectures. Additional product forums focus on USB controllers, memory, clocks and buffers, along with forums on a range of applications and Cypress’s University Alliance.

eNsemble Multi-Core Alliance to Drive Platform Innovations for Next Generation

NetLogic Microsystems has announced the launch of the eNsemble Multi-Core Alliance to

drive best-in-class innovations in multicore parallel processing platforms and software development for next-generation enterprise, telecom and data center networks. Supported by a broad base of world-class hardware and software providers, the eNsemble Multi-Core Alliance serves as the foundation upon which original equipment manufacturers (OEMs) can more effectively and more efficiently develop high-performance networking equipment using industry-leading multicore processors. As a founding member of the eNsemble Multi-Core Alliance, NetLogic Microsystems is com-

mitted to an open programming model for its family of marketleading multicore, multithreaded processors to allow greater access and tighter coupling between networking software and the XLR, XLS and XLP multicore processors. This enables significant improvements in the application development efficiency of software code and overall system performance. In addition, this enables the development of new enhanced services and applications for nextgeneration Internet networks that are highly optimized for multicore, multithreaded processors.

RTEC10 is an index made up of 10 public companies which have revenue that is derived primarily from sales in the embedded sector. The companies are made up of both software and hardware companies being traded on public exchanges. All numbers are reflected in U.S. Dollars. Learn more at Closing Price 52 Week Low 52 Week High Market Cap

RTEC10 Index



Adlink Technology



















Interphase Corporation










Mercury Computer Systems





Performance Technologies





PLX Technology





RadiSys Corporation





Company Market Performance

Elma Electronic

Market Intelligence & Strategy Consulting for the Embedded Community Complimentary Embedded Market Data Available at: RTEC10 involves time sensitive information and currency conversions to determine the current value. All values converted to USD. Please note that these values are subject to certain delays and inaccuracies. Do not use for buying or selling of securities.




Microchip Technology Sells NAND Drive and Other Assets to Greenliant Systems

Microchip Technology has announced the consummation of the sale of certain non-core assets from its Silicon Storage Technology (SST) subsidiary. The product lines sold included NAND Drives, NAND controllers, Smart Card ICs, Combo Memory, Concurrent SuperFlash, Small-Sector Flash and many-time Programmable Flash memories. The buyer, Greenliant Systems Ltd., is a new company founded by Mr. Bing Yeh, the exchairman and CEO of SST. The sale included inventory, equipment, intellectual property and certain other assets and liabilities associated with the product lines. Approximately 100 employees (18% of SST’s work-

force) transferred to Greenliant as part of this transaction. SST also agreed to provide certain transition services to Greenliant for up to 90 days. The terms of the transaction were not disclosed. The transaction involved employees as well as assets in Sunnyvale, California; Hsinchu, Taiwan; and Shanghai and Beijing, China.

GE Intelligent Platforms Integration Program for Commercial and Communications Applications

GE Intelligent Platforms has announced its Premier Integration Program, designed to enable customers to acquire complete, integrated systems while reducing development expense and

minimizing time-to-market. The first two members of the program are Elma Electronic Inc. and NEI, who bring substantial design, development and integration skills and experience to the commercial/MicroTCA and telecommunications/AdvancedTCA markets respectively. Modular system design has become the standard in commercial and telecommunications markets, since this is an effective means to reduce development expense and optimize time-tomarket. These modular systems designs rely on COTS (commercial-off-the-shelf) solutions that can offer leading-edge price/performance while protecting hardware investments; as technology advances, new modules can be plugged in without replacing the entire system. Modularity also encourages the growth of a multivendor ecosystem that increases

competition and decreases costs. However, integrating multi-vendor systems can be difficult, adding risk, time and expense. Elma Electronic and NEI will focus on the North American market. Over time, GE expects to add further affiliates in North America and also in the Europe, Middle East and Africa and Asia Pacific regions. The program may also be extended beyond the commercial and telecommunications markets.

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6/18/10 10:10:27 AM



Colin McCracken & Paul Rosenfeld

Small Form Factors Forever


id you hear about the hot venture-funded embedded board startup? No? Not surprised. There isn’t one. Hasn’t ever been one. While several embedded board companies have made it to the ranks of public companies, the embedded board (small form factor) market is populated by small, owner-managed companies—many with a track record of success, or at least sustainability over ten to twenty years or more. Why? It’s not what you might think. It’s not the lack of interest in the business-to-business technology sell. There have been plenty of hot companies in the semiconductor and embedded software (read RTOS) businesses. Those companies have one significant advantage over the embedded board market—they sell a substantial amount of product for use in high-volume consumer electronics. Embedded board companies slog away with many low to medium volume customers in military, medical, transportation, instrumentation and general industrial applications. And it takes a ton of them to make a big company. Even worse, the support costs eat up much if not all of the profit for the smallest of customers. Embedded board companies live under a kind of “glass ceiling” that has nothing to do with race, gender or creed. It is based on customer volume—that magic line beyond which the OEM finds it cheaper to design the board in house and build at a contract manufacturer. There are no secrets or intellectual property barriers that prevent virtually any OEM from going this route. Standard time-to-market and lifecycle arguments aside, there is a point beyond which OEMs will simply not consider an off-theshelf board purchase. We can argue about where that point is till the cows come home. It’s different for every OEM and every application. The meteoric growth of the Computer-on-Module market over the past decade has shifted this line to higher volume levels (opening up dozens of new opportunities that would have gone custom)— but has not eliminated it. COMs allow an OEM to buy the generic CPU components off the shelf while developing custom I/O on a carrier board. CPU prices in this arena get down and dirty very fast. We spent years going goo-goo-eyed at potential 10,000-unit deals only to watch the deals fade with a puff of

smoke as the OEM realized the financial equation required a custom solution. A typical company serving the small form factor board market has somewhere between 500 and 2000 customers buying an average of 10 to 25 boards each per year. In a good year, sales can grow 10-15%. In a bad year, sales can decline 10-20%. Customers take one to three years to develop systems based upon new board products, with trials, certs and so on. Not the kind of profile to attract venture capital or stock analysts. What this profile does attract is a set of solid, creative entrepreneur/engineers who made a commitment to this business and have stuck with it over the years. So we’re missing the glamour associated with cell phones, plasma TVs or even the Android operating system. We suffer through quizzical looks when we explain to our spouses or friends that we supply computer technology for embedded equipment. None of us is going to get rich in the sense of a Steve Poizner or Meg Whitman. (Although at least one of our colleagues ran for Governor of California before they did.) If you spend your career addressing the embedded market, you get up and go to work every day because it’s just damn fun. Veterans in this business can rattle off their favorite five or ten applications over the years. Equipment, ranging from blood analyzers to unmanned airborne vehicles, just couldn’t exist without the products that the small form factor suppliers bring to the table. We offer a special salute to the half dozen or so individuals who created the small form factor business by founding their companies over twenty years ago, and who don’t have much to show for all their work except well-deserved pride in what they’ve accomplished and perhaps a pretty nice standard of living for their families. For, just as investors are hard to find to do a small form factor embedded board start-up, buyers with sufficient cash and a fundamental understanding of the business are also rare when it comes time to hang up the spikes. ESC is always a shock as we see a few more grey hairs and a few more wrinkles as the veterans in this business age. However, I expect we’ll be seeing many of you for many more years to come. Sure as the sun will rise, this market ain’t goin’ away. RTC MAGAZINE JUNE 2010


editor’s report

Intel’s “Tunnel Creek”—A New Thrust for the Atom into Embedded By eliminating the Southbridge and partitioning functionality, Intel hopes to make its latest Atom-based offering both flexible and cost-effective for embedded as well as providing increased processing density. by Tom Williams, Editor-in-Chief


hat is a system-on-chip? Maybe we thought we knew, but the definition seems to be shifting and that has some interesting implications for the embedded space. Time was, an SoC was assumed to be a pretty custom design on a single piece of silicon that included a processor core, a set of applicationspecific peripherals and interfaces and perhaps some flash memory. All of this added up to a fairly expensive and hence high-volume proposition. Since then we have seen the advent of programmable and/or configurable devices that also include CPU and peripherals along with a complement of programmable logic to make the single device more flexible and hence more applicable to a wider range of applications. Now along comes Intel that seems to be claiming that it’s an SoC if you can boot and run an operating system like Windows on a single device. Only in this scenario you need at least one other chip alongside it to actually implement an application. Iconoclastic as that may sound, Intel may well have a point and is in the process of making that point with a new incarnation of the Atom processor it has currently code named “Tunnel Creek.” Still to be announced as an actual product, Tunnel



Creek is characterized by a shift in emphasis in terms of partitioning functionality to increase flexibility. Gone is the proprietary Intel front side bus. It has been replaced by a PCI Express interface of four x1 lanes. 3D Graphics and video processing, display control, audio processing along with SPI/LPC and the memory controller have all been moved onto the processor die leaving only the PCIe interface to communicate with the outside world (Figure 1). Now how exactly is Intel able to claim that this is a system-on-chip? Well, you can, in fact, boot and run a complete operating system such as Windows on Tunnel Creek and run it—if all you need is a PCIe interface. This is not an attempt to appear ironic. It leads into Intel’s rethinking the issue of partitioning functions for embedded applications. According to Jonathan Luse, Intel’s director of marketing for lowpower embedded products, “Tunnel Creek was designed specifically and only for embedded.” It may qualify by definition as a system-on-chip, but it is not envisioned as a single-chip solution. And that may actually turn out to be an advantage. Intel’s partitioning strategy appears to put the common elements inside the Tunnel Creek device—those being the

most commonly used functions such as listed above. The idea is then to leave the more market-specific functions to be implemented on what Intel calls the I/O hub (IOH). The IOH, it turns out, is the element that can offer both flexibility and cost savings in terms of the functions it actually supports. In fact, almost any device that can bolt onto PCIe can theoretically be used as an application-specific interface device. In rare instances maybe PCIe is all that would be needed. Intel is currently developing its own IOH, which will incorporate a number of interfaces widely used in embedded applications like industrial control, home control, gaming, PoS and medical. At the same time, Intel is working with several partners to develop more market-specific IOHs for areas like in-vehicle infotainment, IP media phones and other areas. There is also no reason why independent silicon manufacturers could not identify market-specific I/O needs and create devices to meet them by producing and independently marketing their own IOHs. To that possibility, Luse says, “I would absolutely consider that a great success.” The combination of the Tunnel Creek processor with an I/O hub is being dubbed by Intel as the “Queens Bay” platform (Figure 2). The context in which the advent of Tunnel Creek is taking place appears to be one of competition to integrate as much functionality on an embedded platform as possible in order to lower costs, conserve power and deliver a straightforward development environment. The Tunnel Creek approach stands in contrast to two other efforts by Actel and Xilinx that have been reported on here (see RTC April 2010, The Application Services Platform: A New Class of Device for Embedded Development and Systems). In these approaches, the companies have integrated a 32-bit CPU—different versions of the ARM architecture—along with a rich selection of widely used peripherals onto the same piece of silicon with an FPGA array and analog circuitry. While this does appear to offer a “one stop shop” for an embedded development platform, it also includes a large number of functions that may or may not be used in a given applications,

editor’s report

Graphics & Video

Audio SPI/LPC Memory Controller

PCI Express* 4x1

Target segment Discrete PCIe Device


Processor Core

Display Controller

Discrete PCIe Device


Tunnel Creek

Segment requiring standard, minimal I/O e.g. IP Camera

Target segment

Proprietary ASIC

Customer with existing proprietary ASICs e.g. Print Imaging, PLC

Target segment


Segments with diverse I/O requirements e.g. Industrial Automation

I/O Hub (IOH)

High volume segments with uniform I/O e.g. IVI, Media Phone, Premise ServiceGateway

Target segment


Figure 1 The Tunnel Creek processor integrates a large amount of more commonly used functionality onto the processor die with a 4 x1 PCIe interface to the outside, which actually offers a large range of opportunities for market-specific I/O devices.

To BIOS or Not to BIOS




General Embedded: Industrial, Home Control, Gaming, PoS, Medical, etc


In-Vehicle Infotainment






GbE Switch
































With the advent of Tunnel Creek, Intel has made another step specifically aimed at the embedded arena. In addition to the standard range of custom and standard BIOS offerings that are available for every Intel processor, there will also be a boot loader development kit available that will let developers integrate an RTOS of their choice or a custom OS without the need for a BIOS. The ability to roll one’s own initialization code and create a boot loader will eliminate the discovery process involved with a BIOS. Of course, it will also mean that the system being developed will be more fixed in its functionality without the ability to switch out peripherals and drivers unless one goes in and tweaks the operating system. Of course, that is exactly the option that a lot of embedded developers want. Many of them work under memory constraints and do not want to wait 25 seconds or longer for their system to come up; they want it up in 500 ms or better . . . like NOW! For those who need and want to go in and tweak the underlying system software, and who want a specific operating system tuned to their needs, that option will be available. In the area of performance, Intel is also claiming gains, citing a 50 percent improvement in graphics performance over the Atom Z5xx line and an average of 12 to 15 percent gain in Spec 2K performance per watt. The package size in

{ { {

Discrete PCIe* Device


meaning that developers may be paying for unnecessary functions. As with every technical solution there are trade-offs. The Queens Bay platform sacrifices the single-chip solution in favor of letting the developer select the needed functions in a second chip, or in the case of very special needs, a third chip. If you need an FPGA, you can connect one as long as it has a PCIe interface. And one day there may be an IOH available that includes a programmable array along with analog converters. More specialized IOH devices could appear that would support such things as field buses, printer functions and a range of specialized needs as the market determines. That is the chance that Intel is taking with this approach.

IP Media Phone

Premise Service Gateway

Figure 2 The Queens Bay platform teams the Tunnel Creek processor with a choice of Intel or third-party I/O hubs that offer interfaces selected for various specific application areas. Intel’s hope is that the market will encourage the development of more third-party hubs.

comparison to the Menlow-XL had been reduced from 1890 mm2 for the processor and chipset to 1013 mm2 for the Tunnel Creek and IOH combination. Intel has not yet released actual power consumption figures. The quest for the ideal embedded platform continues and will always be marked by trade-offs and alternatives. As silicon vendors pursue this quest, they must consider the needs of customers and

developers and will come up with different alternatives in the area of what RTC has named the Application Services Platform (ASP). As this process continues, developers will also have more choices and more decisions to evaluate. Intel Santa Clara, CA. (408) 765-8080. [].



Technology in

context Low-Power CPUs

A Call to ARMs: Auto Industry Quality Standards Provide Path to SWaP-C Reduction For a whole new emerging class of rugged and mobile systems where power, heat and compact size are critical considerations, the ARM architecture offers a wide range of flexibility for use in SoCs that can meet the tough demands of such applications. by David Jedynak, Curtiss-Wright Controls Electronic Systems


ize, Weight, Power and Cost are always concerns in rugged and mobile applications. However, the level of emphasis varies dramatically between the types of applications. In the ground vehicle market, applications range from highly armored tracked vehicles, such as Abrams or Bradley, to highly flexible and mobile tactical wheeled vehicles, such as the HMMWV and coming Joint Light Tactical Vehicle (JLTV). This applies as well to rugged civilian applications such as vehicles used in oil exploration and heavy industrial applications. Vehicle electronics and the required core processing is not a one-size-fits-all approach—what works for a tank is not necessarily what works for a truck. With regard to processing and vehicle electronics, a close look needs to be given to the automotive industry and how it is solving the challenge of bringing more and more electronics into the vehicle. The demand for navigation, situational awareness, new radio technologies and media storage/playback has helped drive the success of ARM-based processors in the automotive market. Ranging from “bolton” aftermarket dash-top portable navigation devices, back-up cameras, satellite radio receivers, Bluetooth integration kits,



3G wireless hotspots and portable media playback (e.g. iPod) to factory installed built-in “Infotainment” systems such as the Microsoft Sync system in Ford Vehicles, low-power ARM-based processors are a vital enabling technology. Despite a limited 12-volt power system, no specialized in-cabin electronics cooling systems, and limited space and weight allocations for electronics (driven by both comfort based industrial design and technical performance such as fuel economy), automotive vehicle electronics designers are able to design high-performance systems around ARM-based cores at reasonable cost. In heavy military vehicles, Intel processors and Power PC processors—often no different from desktop or laptop processors found in PCs or Macs—are the standard. Although of some importance in laptops, power consumption in desktop and servers has been of low importance compared to raw processing power. Operating in generally climate-controlled environments (0-55°C consumer environments), little optimization for environmental conditions and constrained SWaP-C has been performed. Just as in the automotive as well as mobile device markets, these types of processors have

not provided a path to SWaP-C optimization in Light Tactical Vehicle space, often overburdening both crew and vehicle in terms of such things as suspension, power and fuel efficiency. In contrast, ARM-based processors are focused on SWaP-C constraints, enabling the vast majority of mobile devices—phones, media players, cameras, handheld game systems—as well as automotive-specific electronics like navigation devices, media playback and infotainment. ARM is a licensed core, not a complete processor such as is traditionally provided by Intel. In the traditional model, a complete processor is placed on a motherboard along with supporting chipsets (Northbridge & Southbridge) for memory access, video, USB/serial, audio and peripheral buses, such as PCI/PCIe, to create a complete system. ARM is different, as it provides a processor core that silicon manufacturers can license to use as the basis for creating purpose-specific System-on-Chip (SoC) devices. These SoCs integrate many of the traditional chipset features along with applicationspecific intellectual property blocks into a single die, allowing a tightly integrated SWaP-C optimized product. An example

technology in context

of this was fabless startup Centrality, acquired by SiRF Technology, which created ARM-based SoCs designed specifically for the portable GPS device market, integrating core technologies required for that product space, enabling product designers a highly integrated and costeffective platform upon which to build products with minimal NRE and design time. Another example is Apple’s iPhone. Now being used in demanding military environments in Iraq and Afghanistan, the iPhone is an ARM-based design with lineage back to the first iPod developed with low-end ARM cores. Apple’s latest ARM-based design is the iPad, integrating an Apple-designed ARM-based SoC running at 1 GHz. Mobile handsets built around Google’s Android Operating System (Linux plus middleware) running on ARM-based SoCs have now surpassed the iPhone in market share after Q1 2010 according to NPD. To address the growing interest in low-power optimized processors, Intel has recently launched the Atom chipset. The combination of high performance and low power provided by the Atom has helped drive the great growth of the low-cost Netbook market, in which a number of ARMbased designs also compete. Although not a complete SoC as it is still a two-chip solution (processor and Southbridge), the Atom represents a significant move by Intel toward the ARM-dominated market. More recently, in May 2010, Intel released a new generation of Atom processors, designed with decreased power requirements to target the ARM dominated mobile phone market. Freescale, maker of PowerPC processors common in the Military market, also offers a family of ARM-based SoCs focused on automotive, portable, industrial and medical markets. Freescale’s iMX31 ARM-based SoC is the heart of the Microsoft/Ford Sync system in automobiles, providing rich multimedia experiences with both voice recognition and voice synthesis, as well as navigation,

Maximum Power Consumption (W) for Processor and Peripheral Interfaces (Chipset/SoC) 25 20 15 10 5 0

Intel Core 2 Duo Mobile U7500 1.06 GHz with 3100 Chipset

Intel Atom Z5xx 1.1GHz and Freescale MPC7447A 1GHz System Controller Hub PowerPC SoC

Freescale iMX31 532MHz ARM11 SoC

Figure 1 A comparison of the power consumption of popular desktop/server processors with the recent low-power offerings in terms of watts from both Intel and ARM shows a significant advantage of the latter for low-power, rugged applications.

vehicle health monitoring and emergency post-crash 911 calling services. A comparison of the power consumption of this class of devices with popular PC/server processors is shown in Figure 1. The growing availability of ARMbased SoCs provides a new opportunity for rugged and mobile system designers. A challenge is to ensure that ARM-based SoCs can meet certain specification ratings appropriate for use in the harsh environments found in these applications. The good news is that ARM-based SoCs are already qualified for harsh environments using the certification ratings developed by the Automotive Electronics Council’s (AEC) Component Technical Committee. In the past, the automotive industry had employed semiconductor MIL standards to identify suitable components for use in demanding automotive environments, but when the MIL standards were retired, the automotive industry collaborated to establish a replacement set of standards. Similar to MIL-STDs, the AEC standards provide common sets of qualification and testing levels for components, providing product and system designers assurance in environmental design.

The AEC-Q100, Q101 and Q200 standards provide stress test qualification for ICs, discrete semiconductors and passive components, with multiple grades. At the highest level (Grade 0, generally intended for engine compartment), temperatures range from -40° to +150°C. At Grade 3, the range is -40° to +85°C, temperatures experienced in the passenger compartment. The Freescale iMX31 ARM-based SoC in the Microsoft/Ford Sync system is an example of an AECQ100 Grade 3 component, as it needs to function reliably in a vehicle cold-soaked at 4 AM in a Maine winter and hot-soaked at 1 PM in an Arizona summer, as well as in post-crash situations for emergency services calling. The AEC standards leverage existing Military testing standards (e.g. MIL-STD-883) as well as industrial standards (JEDEC, EIA, UL) including JESD89 for radiation-induced soft errors in integrated circuits. The automotive industry uses stringent reliability standards because, while they don’t see the extreme ballistic shock and tracked vehicle vibration conditions of heavy vehicle military applications, they do endure the wide performance temperature ranges and rough RTC MAGAZINE JUNE 2010


technology in context

conditions of the automotive environment. The auto industry is providing a crucible to drive ARM-based SoCs to highest quality with low failure rates. On top of safety concerns, every customer service event in the auto industry eats into profits, driving a financial need for high reliability. At the higher end of processing requirements, applications such as sensor fusion and data fusion demand significant processor capability. These applications

frequently use software developed under Windows or Linux, and will continue to demand the highest performance desktop/server processors available from Intel and Freescaleâ&#x20AC;&#x2122;s PowerPC products. For the other classes of applications, such as Smart Displays, network devices and wearable computers, designing with lowpower ARM-based SoCs could be ideal for SWaP-C optimization. The use of ARM cores in rugged and mobile applica-

tions should be explored for use not just in traditional microcontroller applications (motor controllers, etc.), but as processors employed for specific highly optimized uses, much like it is used in consumer, industrial and automotive markets. In addition to commonly used Real-Time Operating Systems for rugged and mobile applications, the increasingly popular Linux operating systems is very common on ARM-SoCs, and has in fact been a significant driver in the popularity of ARM for rapid product development in the consumer and automotive environments. Applications developed in Linux for Intel and PowerPC architectures can move to lower-power ARM-based SoCs with often no changes except recompilation into an ARM-compatible binary. High-performance desktop/server processors require advanced cooling approaches such as conduction cooling, forced air, cold plate or liquid. These cooling provisions, along with larger power supplies, result in significant weight and size penalties to light tactical vehicles, which canâ&#x20AC;&#x2122;t always afford the power dissipation and price associated with these larger, high-end computing devices. Lowpower processors, such as automotive AEC-Q100 qualified ARM-based SoCs, can provide a significant path to SWaP-C optimization. Lower power reduces the need for large power supplies and associated cooling methods, providing significant advantages in size, weight and power, as well as associated costs. Given the similarities between the automotive market and the light tactical vehicle market, leveraging the adjacent industry experience and qualification of these low-power processors is viable. The time is right to start looking at this new generation of smaller, low-power devices and how they can drive a whole new class of rugged and mobile applications. SiRF Technology San Jose, CA. (408) 467-0410. []. Curtiss-Wright Controls Embedded Computing Leesburg, VA. (613) 254-5112. [].


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©2010 National Instruments. All rights reserved. LabVIEW, National Instruments,, and NI TestStand are trademarks of National Instruments. Other product and company names listed are trademarks or trade names of their respective companies. 1870

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Technology in

context Low-Power CPUs

Keeping Cool as Low-Power CPUs Bring Intelligence into Small Spaces More compute power is squeezing into ever smaller spaces. Even at lower power and smaller size, these CPUs still generate heat that must be dealt with. by Ciaran MacNeill, VIA Technologies


86 processors run a huge variety of software, providing designers choices including Microsoft Windows, Linux and many real-time operating systems. These OSs are evolving and adding new features. The upcoming Windows 7 Embedded for example is expected to include Windows Vista and Windows 7 features such as Aero, SuperFetch, ReadyBoost, BitLocker Drive Encryption, Windows Firewall, Windows Defender, Address space layout randomization, Windows Presentation Foundation and Silverlight 2 among several other

Figure 1 Heat Spreader with copper center connecting directly to CPU and chipset for improved dissipation.



packages. On top of the OS there is often a third-party layer of software that comes between the platform and the developer such as Adobe Flash. Although Flash has recently added support for H.264, the video on almost all Flash Web sites currently requires an older generation decoder that is not implemented in mobile chips and must be run in software. This

poses a problem for developers wishing to use low-power small form factor (SFF) embedded systems targeting small spaces and small applications where it is still necessary to manage the power consumption as well as the heat that is still dissipated by these low-power devices. A good rule of thumb for the power consumption of an x86 processor on a

Figure 2 Adjustable thermal pads connected to the copper core accommodate various locations for CPU and chipsets.

technology in context

VME Single Board Computers Attract Growing Share of Low-Power CPUs by Eric Hiekkila, Venture Development Corporation The embedded military COTS market, and by extension the VME market, has always been one where low-power processors were of extreme importance. This is the reason that Power architecture processors, a very power efficient architecture, have long dominated the VME single board computer market. Density—along with size, weight and power (SWaP) reduction—are the dominant themes in the discussion of next-generation defense networks. One need look no further than at the growth in high-density platforms such as UAV, UGV, UUV (unmanned air, ground and underwater vehicle) programs. But it is not just new platforms driving demand. Mobile C4ISR systems for a wider range of ground vehicles, including combat, tactical and support, will drive persistent demand for low-power solutions as the deployed fleet is refurbished and upgraded. Therefore, demand for VME SBCs that feature low-power processors is likely to increase even more in the near future. Table 1 is taken from VDC’s recently released 2010 research on the SBC market and displays the processor architectures used on VME SBCs in 2009 and forecast for 2012. The numbers reveal the momentum of the demand for low-power processor architectures. Low-power architectures play a very important role in the 2012 market forecast with Power architecture maintaining close to 50% share, and the various product categories of Intel’s low-power Core family of processors making substantial share gains. Also, Intel Atom begins to appear in the VME market in the 2012 numbers, and Atom’s share of the VME SBC market can be expected to increase beyond 2012.

VME Single Board Computers, CPU Types, 2009 & 2012 (% of Dollar Volume Shipments) 2009 Total: US$ 379 Million Intel Core 2 Duo

2012 Total: US$ 515.4 Million 13%

Intel Core 2 Duo


Intel Core Duo Quad


Intel Core Duo Quad


Intel Core i5


Intel Core i5


Intel Core i7


Intel Core i7


Intel Pentium, Pentium M, Pentium IV


Intel Pentium, Pentium M, Pentium IV


Intel Atom


Intel Atom


Intel Xeon


Intel Xeon


Power Architecture, 32-bit


Power Architecture, 32-bit


Power Architecture, 64-bit


Power Architecture, 64-bit






Nvidia GPU


Nvidia GPU


Table 1 small form factor (SFF) board depends on what the design needs to achieve—its thermal design power (TDP). As the name implies, this is the wattage to which the thermal design is sized. Board technology, cooling techniques and power supply selection are driven by this figure. For SFF boards many designs have only passive cooling, and more power becomes problematic in fanless designs. Ten to fifteen watts is normally considered the limit to passively cool SFF systems. Manufacturers of x86 processors have recognized this and are creating pro-



cessors at lower power points specifically more suited for smaller designs with more processing power and better performanceper-watt than the previous generations. To address these problems Via released the Nano 3000E processor, the latest embedded version of its Nano Processor based on the 64-bit superscalar “Isaiah” architecture, which allows flawless playback of high bit rate 1080p HD video. At speeds from 800 MHz to 1.8 GHz, Nano 3000 Series processors deliver up to 20 percent higher performance using up to 20 percent less power than earlier Nano processors.

The Nano 3000E also supports CPU virtualization technology, SSE4 and security capabilities integrated in the Via PadLock Security Engine. The CPU TDP is usually the most important component affecting system cooling. To help achieve low thermal design power and/or long battery life, the more features that can be moved from software to hardware such as AES hardware encryption (FIPS 197 certified) or H.264 decoding using the latest integrated chipsets, helps lessen the CPU utilization and can help lower the overall board or system level TDP. Standby or idle power is also important; obviously, designs include an off switch that takes power consumption to zero. But many designs retain data while idling in standby with a minimum complement of functions powered. This is becoming an increasingly important figure for battery-powered devices as they spend most of their time in standby. Standby usage also has the benefit of allowing a rapid power-up to full operation for a better user experience. For even more processing power in the future, it is important to take advantage of the continuous ongoing improvements to transistor and other submicron technologies to deliver the additional performance customers are asking for. The fabs’ incremental improvements to their process technology will allow new CPUs to offer faster or multicore processors while remaining within similar thermal envelopes. For the small form factor board-level market there have been a number of innovative open reference design motherboards, the most notable and widely adopted being Mini-ITX back in 2002. Mini-ITX boards can often be passively cooled due to their low power consumption architecture, which makes them useful for extremely quiet PC systems, where fan noise can detract from the user experience or the fan can be seen as an additional potential point of failure. Following on the heels of the MiniITX, the industry is going to even smaller platforms, sometimes halving the overall size for even smaller form factor embedded systems. To passively cool each of the motherboards usually involved developing a heat pipe from the CPU and chipset

technology in context

to the chassis, which would provide additional heat dissipation (Figures 1-3).

Creative Solutions

Designing different heat pipes is difficult when the size and location of the CPUs and chipset are continually changing, along with fact that the other components need to be designed around to ensure good contact for heat dissipation. For example, the Embedded ITX form factor Em-ITX line (17 x 12 cm) places the CPU and chipset on the bottom side of the motherboard. This makes it a lot easier for system designers to passively cool the main hot components on the motherboard as there are no components in the way when designing into a cooling solution. The Em-TX form factor was designed for ultra-thin embedded applications and can withstand temperatures ranging from -10째C up to 70째C. Longer dual I/O coastlines provide space for an array of I/O options that OEMs demand such as LVDS, VGA, Gigabit Ethernet, ample USB 2.0 and COM ports. Having the I/O built into the coastline rather than using headers, allows for a cableless system assembly and better internal airflow as there are no cables to restrict airflow. The growing digital signage market, including POS, Kiosks, Digital Signage and Panel PCs, presents other challenges. Faced with limited airflow, they must deliver sophisticated features such as onboard touchscreen control and 1080P and H.264, and offer the required 7-year embedded lifecycle. OEMs must look for platforms that offer built-in hardware acceleration, a variety of video I/O and resistive touchscreen control, which allow digital displays to achieve their purpose yet work in tight spaces such as gaming systems, back-ofseat transportation entertainment, or hospital patient entertainment systems. Reducing size and TDP has typically been an aim for many new computing platforms. More powerful CPUs at similar TDP levels coupled with new integrated chipsets will broaden the target applications for embedded computing. However, many embedded developers do not need fanless as their systems are in controlled environments. Developers are not just looking for smaller and lower TDP fanless

Figure 3 Aluminum extrusion chassis design along with the internal heat spreader helps ensure correct contact and pressure to CPU and chipset and helps lower the internal ambient temperature by providing additional heat dissipation.

Em-ITX Form Factor Board

Rear I/O connector coastline

Em-IO Interface connector

Other Heated Component (On Solder Side)

System Chipset


(On Rear/Solder Side of board)

(On Rear/Solder Side of board)

120 mm

(Heatsink on the PCB rear/solder side of the board, to cover major heated components and transfer the heat out) Front I/O connector Coastline 170 mm

Figure 4 Placing the more heat-generating components on the solder side of the board leaves room for designing a more effective cooling solution.

offerings. New features like High Definition and 3D are requiring board designers to embed GPUs on board for additional display capabilities. The addition of onboard GPUs gives powerful and feature-rich mid-level topto-bottom solutions, especially for graphics-intensive applications such as digital signage where manufacturers want to integrate the processing solution into the back of the display and need high-quality and high-performance graphics in a small space. Companies can design systems that disable the GPU when all the features are not required, and can switch back to the integrated chipset and improve battery life or lower the chassis thermals to increase MTBF. In the future, more and

more features now seen only in systems utilizing GPUs will be included in more powerful integrated chipsets for improved thermals and cost Embedded system designers focusing on their next-generation products will have more options on Silicon, board and chassis design, and will continue to see benefits commonly associated with industry-standard x86 processors and boards including streamlined fanless design capability, a large software ecosystem and fast time-to-market. VIA Technologies Fremont, CA. (510) 683-3300. [].




connected Using CompactPCI and PXI

CompactPCI and PXI Enable Advanced Measurement and Control in Embedded Applications The instrumentation extensions to PCI are embodied in PXI modules, which can coexist with a wide world of CompactPCI modules on a combination backplane.

by Patrick Webb, National Instruments


ompactPCI and PXI have become increasingly popular standards in the industrial and test and measurement spaces. Because of the significant adoption of these standards, a wide variety of interchangeable modules have become available over the past decade. A growing number of embedded applications have found the standards as suitable platforms for high-performance, reliability and rugged installations. CompactPCI was created by the PCI Industrial Computers Manufacturers Group (PICMG) in the late 1990s by taking the desktop PCI specification and designing an industrial Eurocard-based form factor around it. This enabled the benefit of the PCI bus while providing a form factor that is suitable for industrial computing applications (Figure 1). The PCI eXtensions for Instrumentation (PXI) combine the Peripheral Component Interconnect (PCI) electrical bus with the rugged, modular Eurocard mechanical packaging of CompactPCI and add specialized synchronization buses and key software features. These systems serve applications such as manufacturing



Figure 1 PXI combines the PCI electrical bus with rugged, modular Eurocard mechanical packaging of CompactPCI and adds specialized synchronization buses.

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technology connected

The future of CompactPCI ® is serial...

test, military and aerospace, machine monitoring, automotive and industrial test. Currently, PXI is governed by the PXI Systems Alliance (PXISA), a group of more than 50 companies chartered to promote the standard, ensure interoperability and maintain the PXI specification. Because PXI is a superset of CompactPCI, both PXI and CompactPCI modules can reside in the same PXI system without any conflict because interoperability between CompactPCI and PXI is a key feature of the PXI specification.

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100% compatible with parallel CompactPCI® PCI Express®, Ethernet, SATA, USB Support of 4 peripheral slots Fast 5 Gb/s connector

CompactPCI ® Serial PICMG CPCI-S.0 ■ ■ ■ ■ ■ ■

Figure 2 The NI PXI-1031 backplane provides a system controller slot and three peripheral module slots, which accept PXI and CompactPCI modules.

Star architecture Full Ethernet mesh No bridges, no switches Support of 8 peripheral slots Fast 12 Gb/s connector Proposed CPCI-S.0 CompactPCI® Serial specification currently under development

Thousands of Modules Available

From industrial bus interfaces to high-speed measurement I/O, you can find just about any I/O imaginable on the PXI and CompactPCI form factor. Data acquisition, instrumentation, hard drive carriers, motion control interfaces and image acquisition are just a few of the many categories of modules available. National Instruments offers enhanced functionality for modules within a given family. For instance, many of the modular instruments NI offers, including digitizers, DMMS and high-speed digital offer tight synchronization and integration through software. NI Data acquisition devices offer similar features, enabling scalable medium to large channel count embedded systems. If an engineer or scientist is looking for a module that is not available they should not be concerned. Because CompactPCI and PXI are open standards, anyone can design their own module. This is easy because of the availability of ICs to interface to PCI and PCI Express as well as the standardized connector and other I/O components.

Form Factor

CompactPCI and PXI systems come in a variety of sizes. If an engineer or scientist cannot find the form factor they are looking for, they can design the back-

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Figure 3


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5/13/10 3:34:59 PM

There is a variety of slot configurations and controller options for PXI and PXI Express.

technology connected

Many of the backplanes that are available can be powered simply with direct connection to the ATX style power connector on the backplane. Power supplies can be de-

signed to accommodate the power needed for the modules in an individual system. Off-the-shelf supplies exist or engineers and scientists can provide the power rails 100 MHz Differential CLK


Star Trigger

SYNC 100

PXI Express

PXI-1 Peripheral

Hybrid Peripheral

SYNC Control

PXIe Peripheral

PXIe System Timing Controller

10 MHz CLK

PXIe System Controller

plane into their own custom mechanical form factor. National Instruments offers all of its CompactPCI/PXI systems as a backplane only without a card cage. Because the backplanes use standard spacings and components for card guides, it becomes relatively straightforward to design CompactPCI/PXI into an embedded application. Backplanes with as few as four slots are available all the way up to eighteen slot configurations. In addition, there are 3U and 6U form factors available (Figure 2). Depending on their environment, an engineer or scientist can design for the appropriate amount of vibration isolation, cooling, electrical power, etc. Some environments may require enhanced cooling or even pressurization, while others may require little cooling and limited mechanical vibration isolation. Selecting a PXI or CompactPCI backplane provides the flexibility to design in the specifications needed without being burdened by specifications an engineer or scientist may not want in a particular off-the-shelf chassis or card cage (Figure 3).

Differential Star Triggers

PXI Trigger Bus (8 TTL Triggers)

Figure 4 PXI and PXI Express Timing and Triggering Buses—PXI combines industrystandard PC components, such as the PCI bus, with advanced triggering and synchronization extensions on the backplane.

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Intel® Core™ i7-620LE/ 620UE EPIC Module with Intel® QM57 Chipset Onboard LV/ ULV Intel® Core™ i7 Processor Intel® QM57 Chipset One 204-pin SODIMM Up to 4GB DDR3 800/ 1066 SDRAM, Non-ECC Dual View, 2-CH LVDS, DVI-I Dual Intel® Gigabit Ethernet 1 CF, 4 SATA, 2 COM, 8 USB, 16-bit GPIO Options: Express Card/ 34mm, Built-in Touch Screen Interface Support iAMT 6.0, RAID 0/ 1/ 5/ 10

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technology connected

from an existing power system designed in their application. Modules can consume from a few watts to up to 38.25 watts for high-speed or high-density modules. CompactPCI and PXI leverage industry standard components. First, standard Eurocard connectors and card guides allow for ease of design of mechanical installation. Second, standard chipsets are offered from a variety of vendors to communicate over PCI and PCI Express.

Additionally, many backplanes offer standard connectivity to ATX power supplies. Finally, leveraging standard components enables fast and low cost development of CompactPCI and PXI embedded systems.

PCI Express and Advanced Timing Features

Both the CompactPCI and PXI specifications have evolved to incorporate PCI Express (PCIe). PCI Express technology

can be integrated into the backplane while preserving backward compatibility with the large install base of existing systems. The system controller slot is capable of supporting up to x16 PCI Express links in addition to x1, x4 and x8 links, which provide up to 6 Gbytes/s bandwidth to the PXI Express backplane. By taking advantage of PCI Express technology, PXI Express increases the available bandwidth from 132 Mbytes/s with PXI to 6 Gbytes/s. This makes for a more than 45X improvement in bandwidth while still maintaining software and hardware compatibility with PXI and CompactPCI modules. One of the key features that differentiate PXI from CompactPCI is the timing and synchronization architecture of PXI and PXI Express. PXI offers an onboard 10 MHz crystal oscillator to enable a stable clock reference for modules. In addition, PXI offers a trigger bus that enables modules to send and receive triggers. Finally, PXI offers a star trigger bus, allowing engineers and scientists to send a trigger to all modules with less than 1ns of skew between modules (Figure 4). Building on PXI capabilities, PXI Express provides the additional timing and synchronization features of a 100 MHz differential system clock, differential signaling and differential star triggers. By using differential clocking and synchronization, PXI Express systems benefit from increased noise immunity for instrumentation clocks and the ability to transmit at higher frequency rates. The small form factor, rugged mechanicals, advanced communication and timing and synchronization architecture make CompactPCI and PXI ideal for high-performance embedded applications. With both standards growing strong in their second decade, an increasing number of modular instruments and I/O vendors are designing a variety of products. If an engineer or scientist is looking for a scalable and flexible backbone for their next embedded application, they should consider CompactPCI and PXI as an attractive option. National Instruments Austin, TX. (512) 794-0100. [].


Untitled-5 1


6/15/10 2:38:00 PM

technology in


Hypervisors and OSes for Multicore



tech in systems

Hypervisors Ease the World of Multicore Processors Making the move to a multicore architecture involves some challenges for software developers. Some interesting technologies are becoming available that can aid in this transition. by Robert Day, LynuxWorks


n the realm of high-performance embedded 32-and 64-bit devices, it is becoming increasingly difficult to buy a single core processor. This means that systems that have been traditionally based around unicore processors are now facing a move to a multicore part. This has created some interesting challenges for the hardware developers, but even more for software engineers, as a large part of hardware change involves the migration of legacy software, often having been designed and optimized to run in unicore systems. The majority of 32-bit and above embedded systems use real-time operating systems (RTOS) to help with the different functions that need to take place on the device. The RTOS will help with accessing peripherals, will offer communication and networking stacks and disk access routines, all of which allows the software engineer to really focus on the applications that are specific to the embedded device that he is building. When moving to a multicore device, there are a number of ways that the use of the legacy RTOS can help with software migration. Having to rewrite applications to use another OS can be a laborious and risky process, and so having options to reuse the legacy RTOS is appealing. There are a number of options open to developers when faced with new multicore hardware and maintaining the existing RTOS API for the legacy applications.

App 1

App 2

App 3

RTOS Unicore processor Core 1 Traditional Unicore; System

App 1

App 2


App 3


Multicore processor Core 1

App 1

Core 2

AMP multicore solution, two copies of the RTOS and manual provisioning of apps across cores

App 2

App 3

RTOS Multicore processor Core 1

Core 2

SMP multicore solution, one copy of the RTOS that dynamically runs apps across cores

Figure 1 AMP vs. SMP on a multicore platform.

Option one is to simply use the multicore chip as a single core device. Although this seems a little crazy, it is commonly being done if either each core in the multicore CPU is equivalent in performance to the legacy unicore processor, or if the original system had enough performance bandwidth to run fine even with a decrease in processor performance of the individual core in the multicore processor. The RTOS and applications will run as if they were running in a single core system and ease the migration of the RTOS and applications dependent on it. The second option is to run multiple copies of the original RTOS on the different cores. This is not as simple as if they were discreet processors, as much of the internal peripherals and memory are shared. So, having an RTOS that has been

specifically designed to run in an asymmetric multiprocessing mode (AMP) will actually make this task easier, although there is still new work required to configure the RTOS onto the cores and across the shared resources. Even when this has been accomplished, there are still issues with the sharing of the applications across the two distinct copies of the RTOS, as decisions now need to be made about which application, task, process or thread needs to be moved from the original CPU to the second core, and then how those components will communicate and synchronize with those running on the first core. A more interesting but less commonly available approach is to use a symmetric multiprocessing (SMP) version of the original operating system. An SMP implementation typically requires that the RTC MAGAZINE JUNE 2010


Tech In Systems

multicore processor have multiple functionally identical cores that all utilize a single physical RAM, and that access to all regions of RAM is equally fast for all cores. It also requires that all the cores be completely or mostly (in multicore packages) independent and have no hierarchy between the cores. The advantages of the SMP approach over AMP are that the partitioning of the applications or processes is largely taken care of by the OS, as is the use of shared devices and memory; the RAM footprint for the OS is reduced as only one copy of the OS is running, and better performance and load balancing across the multiple cores is achieved (Figure 1). A separation kernel/embedded hypervisor is a new type of software technology that has emerged as a very interesting alternative or complement to the AMP/SMP RTOS when moving to a multicore environment. The separation kernel is a small operating system that runs on multicore hardware and partitions or separates the resources (processors, memory and peripherals) for the applications to use. When the separation kernel also contains hypervisor technology, these partitions can now run “guest” operating systems rather than just applications each having access to the resources available to their own partition. This allows for a flexible AMP/SMP combination, but more importantly, it allows for different guest operating systems to be run on the same multicore hardware system. So, legacy OSs and applications can be run in one partition, and new OSs and/or applications can be run in other partitions. This technology provides a virtualized hardware environment for the guest operating systems, and presents each partition with a processor, memory and peripherals as if they were the only physical parts of system. This allows for some very creative division of the physical hardware (including the multicore processors) into multiple virtual domains. It also leads to a new concept in the embedded device space, that of using a desktop OS and a traditional RTOS on the same hardware. In the past, the desire to have desktop functionality on an embedded device has leaned toward using the “embedded” versions of OSs like Windows and Linux, which has often led to a compromise in




multiple guests sharing single core RTOS

guest with processor affinity LINUX









Figure 2 A modern separation kernel and hypervisor offer the most flexible use of a multicore device.

real-time performance and determinism, or a compromise or cut-down in desktop functionality. Now using a separation kernel with an embedded hypervisor, a “true” and fully featured desktop OS can run in one partition, maybe utilizing multiple cores in a device that has more than two cores, and a true RTOS can run in its partition. This scenario relies on the fact that the underlying separation kernel and hypervisor have real-time performance and determinism, and if that is the case then this new hybrid embedded system will have all the functionality, connectivity and applications found on a traditional desktop system, but will also offer the real-time characteristics of a true RTOS. This definitely shows a real advantage to using multicore parts, and actually allows the consolidation of multiple physical systems down into one. A fully featured separation kernel and hypervisor can enable a number of different scenarios for the use of guest operating systems. The first is to allocate a dedicated core for the guest operating system, effectively offering a supervised AMP environment. Advantages over a normal AMP solution include the ability to partition shared memory and resources easily and effectively for each guest OS, the ability to utilize inter-partition communication to allow the different guests and their applications to communicate with each other

without having to using external communication devices, and also to have different types of guest operating systems with different resource requirements to effectively coexist on the same hardware. The second scenario is to allow multiple guests to share a single core. This offers the same ability to partition resources as the supervised AMP, but now allows OSs and applications that don’t need all of the processing power of the core to share with another OS and application. This configuration is particularly useful when moving a system or systems to a more powerful processor. The final configuration is to allow guest operating systems to run in SMP mode across multiple cores in the system. The number of cores and the resources allocated are still defined by the hypervisor, but the SMP guest OS can now take advantage of extra processing power when needed. This last scenario is very useful when moving a dual-core SMP system to a 4-core or above processor. All of these configurations help provide a very flexible implementation on multicore hardware, but where it gets really cool is when all of them can be implemented simultaneously on the same system. So an SMP guest could share two cores with a small guest OS, and on the same system a unicore guest could be given its own dedicated core. Figure 2 shows a conceptual system configuration on a 4-core system.

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Embedded developers are always worried about the performance hit of running extra software in the system, and hence are naturally interested in what the potential performance downside of running an extra hypervisor layer would be. There are a number of optimizations that can be made to a hypervisor to make it less intrusive. The first is to take advantage of hardware virtualization capabilities that are built into many new processors. These have been designed to allow hypervisors to run guest operating systems very efficiently. The second is to make modifications to the guest operating system to optimize its running on the hypervisor, in a technique known as paravirtualization. This obviously requires access to the source and the low-level parts of the guest operating system, but this is often available for either RTOS or open-source desktop OSs. The results that have been studied for LynxSecure separation kernel and hypervisor from LynuxWorks have shown less than 5% performance degradation (typically less than 2%) for a paravirtualized guest OS verses a native version without LynxSecure running on the same hardware. The final interesting application for a separation kernel and embedded hypervisor is also a driving factor in the design and implementation of some of these technologies—the area of security. Being able to partition processors and resources on the same system allows developers to securely isolate the applications and data in one partition from other partitions. In the defense world there have been requirements to host multiple systems on the same hardware that contain information or communications running at different levels of security classification, commonly known as multiple independent levels of security (MILS). A secure separation kernel provides the partition and domain isolation, and the hypervisor adds the ability to run different OSs within those partitions. This allows OSs with no inherent security features to be run in a secure system, with the separation kernel isolating them away from the other “trusted” components that are resident on the same hardware. Requirements for security are not limited to the defense industry. Many devices that are “connected” to the internet also need to offer protection against ma-

licious attacks. The separation kernel not only helps those devices utilize multicore hardware, but at the same time add security functionality to their system. Modern operating systems can aid the migration of legacy embedded software from a single core to a multicore device. The use of a separation kernel and embedded hypervisor allows the migration of legacy applications and also their original operating systems with minimal

overhead, while at the same time allowing the system to be securely partitioned. This new technology offers the most flexible approach and allows for easy future integration of more cores or more features into the embedded system. LynuxWorks San Jose, CA. (408) 979-3900. [].

Extreme performance across the board. NEW! XV1™ (Quad-Core Intel Xeon-based VME SBC) • Quad-Core Intel® Xeon® 2.13 GHz processor • Up to 8 GB ECC DDRII SDRAM memory • CompactFlash™ slot • Up to two mezzanine slots on board • Up to three Gigabit Ethernet ports • Four USB ports and three SATA II ports • VITA 41 compliant • Solaris™ 10, Linux® and Windows® support • Up to 30G shock

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Transformational. © 2008. Themis Computer, Themis, Themis logo, TC2D64 and XV1 are trademarks or registered trademarks of Themis Computer. All other trademarks are property of their respective owners.

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2:13:33 PM RTC MAGAZINE 5/12/09 JUNE 2010

technology in


Hypervisors and OSes for Multicore

Look Before You Leap: Hypervisors Present New Design Challenges for Embedded Developers Hypervisors are becoming the tool of choice for bringing out the potential of multicore processors. But not all hypervisors are the same. The differences become particularly critical in the case of embedded and especially realtime designs. by Yi Zheng, QNX Software Systems


ncreasingly, hypervisors are being touted as a solution for consolidating multiple systems or applications onto a single piece of hardware. Using a hypervisor offers several potential benefits, including lower hardware costs, lower power consumption and reuse of legacy code. But it also poses new challenges to system architects and designers, especially when used in real-time applications. To deploy a hypervisor successfully, system designers must weigh several factors, including resource allocation, performance and ease of implementation; they must also evaluate whether a hypervisor is, in fact, the most effective tool for achieving their design goals. Hypervisors may be relatively new to embedded systems, but they have a long history in general-purpose computing. For instance, VMWare, a hypervisor for x86 systems, first appeared in 1999. Hypervisors for mainframes appeared even earlier, in the late 1960s. Hypervisors come in two basic forms: Type 1 and Type 2. Some VMWare products, including VMWare Workstation and VMWare Server, fall into the Type 2 category. As Figure 1 illustrates, a Type



App 1

App 2


Operating system 2 (guest)



App 3

App 4


Operating system 1 (host) Hardware

Figure 1 A Type 2 hypervisor runs as an application on the host OS and presents a full set of virtual hardware resources to the guest OS.

2 hypervisor runs as an application on an operating system (OS) and provides an environment for another OS, commonly known as the guest OS. Using this approach, a software programmer who, say, uses Windows for corporate applications and Linux for code development, can run both environments on the same PC and switch between them at will. Type 2 hypervisors are easy to use, as they typically require no modification

to the guest OS. For instance, VMWare Workstation emulates the underlying hardware and presents a full set of virtual hardware resources (mapped to physical resources) to the guest OS. If the guest OS can run on an x86 machine, it can run on a Workstation without modifications. Still, this convenience comes with a trade-off: added processing overhead that can compromise performance. Because a Type 2 hypervisor must

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translate all communication between the guest OS and the hardware, applications run slower. This performance degradation poses little problem for most generalpurpose applications—after all, few users would notice that reading some data from a device takes, for example, four milliseconds instead of two. Nonetheless, a twomillisecond increase can mean a world of difference to a real-time application. Therefore, real-time developers rarely use Type 2 hypervisors in their designs. A Type 1 hypervisor, or bare-metal hypervisor, has one less layer than a Type 2 hypervisor and sits directly on the host hardware (Figure 2). Amazon’s well-known Elastic Compute Cloud (EC2) is a Web service enabled through a Type 1 hypervisor. Using a Xen hypervisor on top of powerful servers, Amazon can offer “slices” of scal-

App 1

hardware that has virtualization capabilities. Examples include Intel’s VT, Freescale’s embedded hypervisor technology and ARM’s TrustZone. As a result, some hardware vendors have joined the hypervisor movement to promote Type 1 hypervisors optimized for their hardware platforms. This approach offers an attractive alternative for systems that demand higher performance. On the other hand, it poses constraints on choice of hardware.

Clean Separation

The rapid evolution of microprocessors, especially multicore processors, is driving demand for hardware consolidation. The ideal solution allows applications traditionally deployed on two or more discrete systems to run on just one single-core or multicore processor, with-

App 2


App 3

Operating system 1

App 4 Operating system 2

interfering with one another. Although a hypervisor can allow a developer to partition applications, other options are often easier and cheaper to adopt. For example, in a microkernel OS such as the QNX Neutrino RTOS, applications, drivers and other system services run in separate address spaces. A malfunction in one application or driver doesn’t affect other processes, and more importantly, doesn’t interfere with the most critical component of the entire software system—the OS kernel. This ability to protect applications through partitioning is key to safety- or security-critical applications, where the system designer must provide strong evidence that applications operate as expected, even when neighboring programs run amok on the same hardware.

... ...

Hypervisor Hardware

Figure 2 A Type 1 hypervisor sits directly on the host hardware and typically requires modifications to the guest OS.

able computing power to its customers and allow each slice to operate in a virtualized independent environment. A Type 1 hypervisor may be thinner than its Type 2 counterpart, but it typically requires modifications to the guest OS. Thus, the embedded developer must often use a variant of the guest OS created specifically for the hypervisor. Creating this variant is similar to creating a variant of the OS for a new hardware platform; it demands access to the OS source code and in-depth knowledge of the OS architecture. Many Type 1 hypervisors rely on

out extensive software modifications. In the real-time embedded world, the solution must achieve this goal without compromising the existing capabilities and performance of each application. The key to achieving this goal is intelligent partitioning, and the first ingredient of intelligent partitioning is effective separation of applications or operating systems. The Amazon EC2 service, with its need to support multiple simultaneous customers from the same server, illustrates this requirement. Similarly, in the embedded space, the system designer must partition applications to prevent them from

Resource Allocation

Compared to the desktop, most embedded systems have limited computing resources, including CPU cycles, memory space and storage. Hence, an effective virtualization solution must allow the embedded system designer to allocate these resources efficiently, in a manner appropriate to each application. Resource allocation becomes critical for real-time applications that must complete operations within a bounded time interval. For such applications the virtualization technology must be near-transparent, providing resource allocation with little or no overRTC MAGAZINE JUNE 2010


Tech In Systems

head. For example, if a real-time machine control application and a graphical display coexist on the same piece of hardware, the hypervisor must ensure the machine control application executes with minimum latency. Consequently, the real-time application must have privileged access to kernel calls, interrupts, message queues, selected hardware components and other resources. Nonetheless, it isnâ&#x20AC;&#x2122;t unusual to observe a 200% increase in latency when applications access such resources through a hypervisor. The degree of added latency, then, is what sets a good hypervisor above the rest. The question is, how much of an increase can the real-time application tolerate? Knowing the hard constraint is the first step to choosing a suitable virtualization solution. Some hypervisor vendors try to address this problem by giving the real-time OS direct access to the hardware. For example, the hypervisor from Real-Time Systems lets the user configure the system before runtime by specifying one OS as the real-time OS. By

giving that OS direct access privileges, the RTS hypervisor can demonstrate performance benchmarks comparable to those measured in a non-virtualized environment. Many hypervisors offer mechanisms that allow applications running on different partitions to communicate with one another. These mechanisms include virtual networking, which simulates a traditional data communication environment, such as a TCP/IP stack. Although this method allows reuse of existing APIs, shared memory is a more efficient form of communication for many real-time applications. That said, developers must pre-configure shared memory carefully to prevent illegal access or accidental corruption. Hypervisors are growing in popularity, but their use in embedded systems still requires careful investigation. The choice of hardware (possibly with support for virtualization technology), the choice of hypervisor (which should have minimal impact on real-time performance), the con-

figuration of the hypervisor (to ensure realtime access to hardware resources), the ease of implementation, the need for interapplication communication, and even the availability and usability of tool chains for the hypervisor, are all important questions that system designers must address. QNX Software Systems Ottawa, Ontario, Canada. (613) 591-0931. []. VMWare Palo Alto, CA. (877) 486-9273. []. Real-Time Systems Ravensburg, Germany. +49 (0) 751 359 555 0. [].

The New Standard in Low-Power Networking Engines The CSB1725, based on the Marvell MV78200 Dual Sheeva Core SoC, is a highly integrated System On a Module (SOM). The CSB1725 provides an ultra small, powerful, flexible engine for low-power 10/100/1000 Ethernet based networking systems. The main features include: 1GHz Dual Superscalar ARMv5TE Cores w/512KB L2 Cache 512MByte 64-Bit Wide DDR2-667 Memory with 8-Bit ECC 64MByte NOR with Secure ID, and 512MByte SLC NAND Two PCIe x4 Port (or one x4 and four x1's) Two 10/100/1000 ports via 88E1121R RGMII to Copper PHY Two SATA Gen 2 (1.5Gbit or 3.0Gbit/sec) Channels Two 480Mbit USB 2.0 Host Ports <6W Typical, 10W Maximum, Both Cores Enabled 70mm x 75mm x 5.2mm (on 4.3mm Low Profile MXM Socket) Uboot and Linux 2.6.x BSP

COMING SOON - Freescale P2020 Dual Core The CSB1725 is manufactured in our in-house state of the art, lead-free surface mount manufacturing line. All products carry a 1-year warranty and are offered in commercial and industrial temperature versions. Cogent also offers standard and custom carrier boards, plus royalty free licensing options for the CSB1725.



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Cogent Computer Systems, Inc. 17 Industrial Drive, Smithfield RI 02917 tel: 401-349-3999, fax: 401-349-3998, web: 5/13/10 4:32:36 PM

COM Express & Multicore Board Showcase Featuring the latest in COM Express & Multicore Board technologies

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Up to Intel Core i7 Processors 2.66 GHz speed Intel Turbo Boost up to 3.33 GHz User friendly congatec embedded BIOS with API for easy software development 2 - SODIMM sockets for up to 8 GB DDR3 memory High end graphics performance Dual independent display supported ACPI+ battery support

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Freescale QorIQ P2020 dual-core processor Two e500 Power Architecture cores running at 1.2 GHz 95mm x 95mm module based on the COM Express form factor On-board XGI Z11M Graphics Processor Unit Supports up to 2GB DDR3 SOUDIMM MicroSD card slot for on-board storage

Combines dual-core processing power and flexible high-bandwidth I/O Fully compatible with both ATCA and MicroTCA® platforms Freescale™ MPC8641D processor delivers up to 15 GFLOPS Switch-fabric communications can use either RapidIO or PCI Express Four Gigabit Ethernet connections

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USB modems, in module or standalone form factor Linux, Windows and Mac O/S support -40C to +85C operating temperature (Module) Compact size: 1” x 1” x 0.2” (Module) USB 2.0 compatible up to 56K bps data rate, fax and voice AT command Transferable FCC68, CS03, CTR21 telecom certifications Global safety: IEC60950-1, IEC606011 (Medical) approved CE marking E-mail: Web:

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Xembedded LLC Phone: (734) 975-0577 Fax: (734) 975-0588

The Xembedded XVME-6050 is a versatile 6U VME SOM Carrier board that provides the ultimate in system configuration capability. The processing components (including memory and BIOS) are all mounted on a system-on-module (SOM) that can be replaced as necessary. It has PMC and XMC expansion sites (shown with optional hard drive) along with several high-speed comm ports. It is an excellent processor platform that can be configured as necessary and field upgraded as needed. The base board comes with a low-power Intel Atom-based SOM. E-mail: Web:

technology in


Hypervisors and OSes for Multicore

Hypervisors Leverage Multicore Processors for Embedded Systems The ability to run an RTOS with real-time control processes on the same multicore processor as a human interface OS like Windows, is made possible by an embedded hypervisor working in conjunction with on-chip virtualization technology. by Kim Hartman, TenAsys Corp.


he newest multicore processors contain hardware-assisted virtualization features that enable hypervisors to be constructed in such a way that they can support multiple operating systems of different types to be hosted on an embedded system platform. Now real-time OSs can readily be hosted along with general-purpose OSs on the same platform. This has huge positive implications on the embedded computing industry because applications that previously required multiple processor platforms in order to guarantee determinism (typically a PC-compatible processor and another real-time computer that may or may not be PC-compatible), can now be implemented with greater ease on a single platform. Besides enabling lower system costs, the consolidation of platforms can also increase system performance and reliability by removing inter-platform communication bottlenecks that may have existed in multi-platform implementations. Running multiple operating systems on the same processor/platform requires software, sometimes called a hypervisor or virtual machine manager (VMM),



Old Two-Box System Embedded PC “brick” Real-time applications QNX

Control functions

(control of hoppers, mixers and truck loading)

Desktop PC Ethernet

Windows applications Windows

Human-directed functions

(Order processing, production and financial reporting)

New One-Box System Single PC-Compatible platform with multicore processor Windows applications

Real-time applications QNX

Control functions

eVM for Windows


Human-directed functions

Figure 1 Command Alkon was able to use an embedded virtualization manager (eVM) to consolidate two computer platforms into one in order to simplify system maintenance and reduce component count while maintaining reliability.

which implements virtualization of the platform, whereby each operating system is presented with its own separate version of the underlying machine’s software architecture. Traditional virtualization consisted of virtualizing the entire machine, including its I/O for each OS, but this

causes serious performance limitations in embedded applications that have realtime constraints. It may still work in office and server applications that don’t have real-time processing requirements, but for real-time functions, this virtualization approach is impractical.

tech in systems

What has worked instead in real-time applications is a technique called embedded virtualization, whereby using an embedded virtualization manager (eVM), each operating system is presented with a software interface that is similar to the underlying machine, but is not identical. This is in order to allow each OS to access its I/O in a manner that serves the performance requirements of its applications. At first this was done with paravirtualization, a software-intensive technique that remaps the memory used by a particular RTOS to allow it to run in a system with another OS. The advent of new CPUs has simplified the implementation of multi-OS systems by remapping memory at runtime using hardware address translators. The latest Intel processors contain architectural features called VT-x and VT-d extensions that replace some of the paravirtualization techniques with hardware. Hardware-assisted virtualization features like VT-x do away with much of the complexity of software paravirtualization by providing hardware address translators built into the chipset that ensure that any memory address issued by a guest OS is automatically adjusted by a constant value called a load-offset. Likewise, the hardware assisted virtualization feature called VT-d automatically adjusts the memory accesses generated by DMA bus mastering I/O devices according to the load-offset of the particular guest. Some platforms feature processors supporting VT-x but don’t have chipset support with VT-d. In those cases, software paravirtualization techniques must still be used. There are instances where para-virtualization may still have to be implemented, such as the


Guest OS

F(s) shared memory


G(s) H(s)

Windows kernel

Guest kernel

virtual I/O devices eVM for Windows

real Windows I/O

real Guest OS I/O

Figure 2 The embedded virtualization manager enables multiple OSs to communicate via shared memory.

re-routing of interrupts serviced by the guest OS when sharing the platform with Windows. These need to be altered by the VMM at load time according to rules set up by the user prior to load time. Some embedded VMM implementations require that the guest operating systems, drivers and middleware be modified, or para-virtualized in order to work together. This is costly and risky since the customization work needs to be reimplemented and verified every time a new version of one of the OSs and/or a driver is released. To avoid the expense and risk of maintaining customized OS and VMM software environments, a better solution is to use an embedded VMM that can run standard OS and application software

without modification. To do this, the VMM should leverage the hardware virtualization support provided in Intel processors to enable PCbased RTOSs to run alongside Windows without requiring any modifications to Windows or the RTOS. It should dedicate a thread/core to each OS and use the processor’s VT-x feature to map the memory, making use of the processor’s VT-d extensions when the guest RTOS needs to interface directly to DMA bus mastering I/O devices. In addition, the optimal embedded VMM technology should enable users to work with an off-the-shelf copy of Windows that runs directly on the platform (bare-metal), supporting all of the latest RTC MAGAZINE JUNE 2010


Tech In Systems

devices and drivers that Windows employs. Since no modifications to the guest RTOS are required with this type of system, legacy application software will also run on the new platform without modification. The advantage of being able to preserve legacy code while consolidating platforms can’t be overemphasized. It can make or break the attractiveness of a new embedded system project. For example, Command Alkon of Birmingham, Alabama has millions of dollars invested in its control software for bulk construction materials plants. They have used the QNX 4 real-time OS since 1985 and have thousands of installations in place worldwide. The company is in the process of migrating from a dual-platform control system product that runs Windows on a PC and QNX on a separate real-time embedded PC “brick” to a single-platform system that runs both QNX and Windows on the same PC (Figure 1). “Combining the platforms was a natural evolution for us,” said Randy Willaman, senior manager of business expansion at Command Alkon. “We are able to simplify system maintenance and reduce the component count while maintaining reliability.” Before moving to a hypervisor, Willaman did a survey of available virtualization solutions. “One option that we looked at was virtualizing the entire machine and consequently, this solution couldn’t guar-


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antee that our real-time control software would maintain its deterministic responsiveness,” said Willaman. “Another alternative was to rewrite our I/O drivers in order to get the system to work, but we couldn’t get source code from our OS vendor and we didn’t want to pay the cost. In the end, we chose eVM for Windows from TenAsys Corp. of Beaverton, Oregon, which gave us the performance we needed without requiring us to change our QNX application code.” In the Command Alkon implementation, the embedded virtualization manager (eVM) partitions the machine to separate resources for exclusive use by each operating system. This is done by configuring Windows to limit the number of hardware threads and memory that it uses. Windows boots first and runs normally within remaining allocated resources. Since it’s running on the bare machine rather than on an emulating software layer, Windows tasks execute with maximum performance. After Windows boots, the RTOS and real-time application software are loaded into memory that has been allocated for the real-time portion of the application, and the RTOS is loaded from a Windows driver and begins executing application code in its dedicated hardware environment. With access to its own performance-critical I/O devices, the real-time application will run completely independent of Windows. So that the real-time en-

vironment may use resources such as native drivers, they are provided for that purpose. When Windows and real-time tasks need to communicate, or the real-time application needs to use Windows resources, the two environments communicate via emulated communications links in shared memory (Figure 2). The Command Alkon system described above uses an emulated virtual Ethernet channel, but an emulated serial interface could also have been used. Real-time I/O devices are configured via a generic device driver on the Windows side and real-time interrupts are configured to be delivered to the virtual machine manager and not to Windows. Command Alkon may be at the leading edge of the embedded system consolidation trend, but their experience will be shared by thousands of embedded system designers who will use the latest hypervisor technology to decrease system costs. At the same time, they will increase performance while improving system reliability by combining real-time and Windows platforms on the same multicore processor. TenAsys Beaverton, OR. (503) 748-4720. []. Command Alkon Birmingham, AL. (205) 879-3282. [].

11/11/09 3:45:15 PM

technology deployed Motor and Motion Control

Tightly Integrated Devices Yield More Efficient Motor Control

is conducting current, however, with very little voltage across it (1 to 3 volts); or 3) switching from either off to on or on to off, where the power electronic switches incur switching losses proportional to how fast they can switch the current and how fast the voltage falls and rises across them. All of these states are relatively very low loss states compared to the linear controller.

Applying Motor Control Algorithms

With today’s processing power, it should be clear that digital control is really the only choice. Today’s microcontrollers are more capable than the digital signal Truly efficient motor control requires a number of complex processors of just 10 years ago. These devices are designed for real-time embedded digital and analog operations. Now the emergence of fast, applications and include peripherals and highly integrated processing engines enables such control mechanisms to help ease the engineer’s job at applying them to control motors. to operate with the needed speed and accuracy. Unlike AC induction motors, where loss is created due to slip, permanent magnet synchronous motors (PMSM) are far more by Yvonne Lin, Actel efficient, as they are synchronous machines. PMSM fall into several categories that impact performance, value, speed, motor constant and power density. The leading motor otor controls are comprised of the power electronics types are surface magnet (SM), interior permanent magnet (IPM) that control the application of voltage and current to and axial flux, which can be either SM or IPM. The SM motor prothe motor. Digital motor controllers manage the power vides a robust platform that is relatively easy to control. electronics to achieve the target motion results such as speed or 100V torque at a system level. The control algorithms implemented 50% duty cycle 63% duty cycle within the motor controller significantly influence the overall on motor system efficiency. PWM Controller The most basic way to control a motor is by controlling voltoff age and current supplied. The most simple and primitive motor drivers use a linear amplifier that regulates the voltage supplied 70V M to the motor in a linear fashion. For example, if it is desired to deliver 10 amperes of current across a motor at zero speed that has only 1 ohm of phase-to-phase resistance, then only 10 volts is needed from the motor controller. If the linear motor controller Figure 1 is supplied with 50 volts, for example, then 40 volts multiplied Using PWM to control motor power by 10 amperes, or 400 watts is dissipated in the controller. Very few applications implement linear controllers because they are terribly inefficient. The IPM motor has the permanent magnets buried within Pulse Width Modulation (PWM) schemes, on the other hand, the rotor structure, which is made up of iron laminations stacked depend on motor inductance and overall reactance to pulse the along the rotor. The introduction of the iron laminations adds entire supply voltage across the motor at high speeds with duty rotor inductance that can be utilized to more effectively control cycles proportional to the average voltage they wish to produce the motor and effectively manipulate its characteristics and pa(Figure 1). While PWM controllers introduce eddy-current losses rameters. This added measure of control, however, comes with a in the motor, those losses are significantly lower than the improve- price of control complexity when compared to SM motor control ment in efficiency gained within the controller using PWM tech- algorithms. niques. The PWM controller has essentially three power states: The control algorithm of choice for most permanent magnet 1) Off, where the output power electronic switch is not conduct- motors today is the field-oriented control (FOC) algorithm. This ing any current; 2) On, where the output power electronic switch algorithm “componentizes” the id and iq current and voltage vec-




Technology deployed

tors and closes the control loop around them after they have been subjected to coordinate transforms that reference them to the rotor’s angular position. Permanent magnet motors coupled with effective control algorithms are the most efficient combinations available today. Ki

Ki Kp Kd Velocity PID

Target Velocity

T Target

Iq/Id Calculator

Target_Iq Target_Id






Ki Kp Kd Target Velocity

Vq Vd



Inverse Park

Ia Iß


Va Vb Vc



Park Transofrm 0

Digital Control

ia iß

Clark Transform Critical Faults

ia ib ic

Current Sensing

Motor Sensor

ia ib

Voltage Sensing Angle Calculation

Hall Effect/ Encoder

Figure 2 Block diagram of the field oriented control for PMSM.

Figure 2 shows the block diagram of field-oriented control for a PMSM. Three measurements are taken as feedback from the motor: phase currents and position of the rotor. There are many ways of obtaining feedback to calculate position, such as a Hall effect sensor, encoder or sensorless using back emf. By measuring only two phase currents (ia and ib), the stator current vector, which is comprised of three components (ia, ib and ic) can be constructed; this is because ia + ib + ic = 0. The Clarke transform is used to convert these three current components into orthogonal, 2-axis coordinates, iα and iβ. Based on the position of the rotor, the angle θ can be calculated and is used to bias iα and iβ within the Park transform to essentially null the effect of rotor angular change, making the output of the Park transform a DC component relative to shaft angle. The resultant current vector is mapped into a d-q axis as shown in Figure 2. These values are fed back into a PI (Proportional + Integral) controller as current error. The output of the PI regulator is a command for voltage. However, it is referenced to the rotor’s angular position. Before we can output voltage to the stator, we must now reference the voltage back to the stator, which is stationary. The Inverse Park transform accomplishes this by doing the inverse of the Park transform, just as the name suggests. The transform takes the rotor’s angle and offsets the id and iq voltage vectors into iα and iβ voltage vectors that now include amplitude components for the rotor’s angle. Finally, a Space Vector Pulse Width Modulator (SVPWM) converts iα and iβ into three voltage vectors, Va, Vb and Vc. As shown in Figure 3, an FOC control system is designed to keep id and iq orthogonal, which helps to ensure optimal angle control and better current utilization in producing torque. In order

to ensure perpendicularity between these vectors, the algorithms must be computed quickly to minimize computational delays. Delays essentially obsolete the voltage vectors and decrease the effective efficiency because the ideal 90 degree angle between id and iq is not maintained. In the past, because of the unavailability of fast controllers and digital devices, implementing FOC algorithms was only possible through the use of expensive, high-end DSPs or with assembly language. This constraint and the added cost of sensors have deterred designers from adoption in many applications that could benefit from the gains in torque management, control and efficiency. However, with the introduction of many complex and integrated electronic devices such as MCUs, lower cost DSPs and FPGAs, computational power and cost have come a long way in providing the power to make these methods available to even simple control applications. Implementing many of the control structures in hardware description language (HDL) in tandem with lower cost processors provides an excellent opportunity to segment the computing tasks into pieces appropriate for the subsystems in today’s SoCs. Figure 4 shows how this might be implemented. For example, placing the Clarke, Park, PI controller and SVPWM in HDL would allow an MCU to pass off these calculations to hardware algorithms that can quickly crunch the numbers and spew back results, minimizing computational delay and reducing processor costs and computational requirements. In addition, hardware-based actions that are clock driven provide faster system-level protection for high-speed fault monitoring and protection schemes, making products more robust in even the harshest of environments. q-axis

Stator Current (IS)

Torque Component (Iq) d-axis

Flux Component (Id)

Figure 3 Stator current vector mapped into d-q map.

Implementing FOC on Intelligent Mixed Signal FPGA

SmartFusion devices integrate the three components essential to implementing motor control on a single device: an FPGA, ARM Cortex-M3 microcontroller and programmable analog subsystem. An analog-to-digital converter is used to capture motor feedback, such as phase current or back EMF voltage, while the Cortex-M3 microcontroller is used to manage various tasks such as sampling RTC MAGAZINE JUNE 2010


technology deployed

Introducing the free Arium Linux kernel and complete tool chain for your next Intel速 Processor-based applications.

Single/Multi Die Substrate MCU PWM Real-time Interrupt State Machine ADC Sampling PID Algorithm Background Tasks PowerLink Protocol Stack ModBus Protocol Stack CANOpen Protocol Stack 40

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3/15/10 11:38:03 AM

FPGA Fabric High-Speed Phase Current Comparator Fault Logic Park Transform Clarke Transform Inverse Clarke Transform Space-Vector PWM + 3rd Harmonic Injection PWM Output Latches

Figure 4 MCU/FPGA Partitioning across a high-speed bus with operations assigned to the MCU or FPGA as appropriate for the needs of the application.

and communications. The FPGA enables implementation of algorithms in hardware, especially those that are system and time critical. When implementing for motor efficiency, a user can partition the FOC algorithm between hardware and software. For example, system-critical components that require instantaneous response, such as critical fault detection and other supervisory functions, should be placed within the FPGA fabric. Any tasks that are computationally intensive and iterative, such as PWM generation, should also be placed in the FPGA fabric. Because these three components work across a high-speed 32-bit bus, off-chip delays are eliminated, yielding fast and flexible motor control implementation. The convergence of MCU systems on the same die with a programmable logic fabric provides system-level benefits that make it possible for engineers to incorporate sophisticated control techniques. These techniques add significant value to products by making them more energy-efficient and more exacting in their control mechanisms and results. Intelligently partitioning tasks will allow engineers to decide which tasks are computationally better served by faster programmable logic, passing results back to the MCU for further processing or directing to output devices. Additionally, the clock-driven logic inherent to programmable logic devices allows engineers to include robust and fast fault detection logic that ultimately delivers better, more reliable products to their customers. In the end, it is possible to deliver better control, higher efficiency and more reliable products to markets hungry for them. Actel Mountain View, CA. (650) 318-4200. [].

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High-Speed 32-bit Bus

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TECHNOLOGY Atom N450 on an Extreme Rugged PC/104-Plus SBC

A small form factor rugged SBC is a PC/104-Plus module based on the Intel Atom processor N450, running at 1.66 GHz. The CoreModule 740 from Adlink Technology takes advantage of the Atom’s two-chip solution architecture with integrated memory and graphics controllers, balancing performance with very low power requirements, thus making conduction-cooling easy to implement for small sealed enclosures. Rugged by design, the CoreModule 740 combines a wealth of legacy I/O interfaces including ISA, IDE, serial and parallel ports, with onboard video, 1 Gbyte of soldered RAM, USB 2.0 and PCI bus, all in a 90 x 96 mm footprint. The PC/104-Plus stackable form factor allows OEMs in military, avionics, transportation, data logging, portable computing and other rugged markets to add a state-ofthe-art Intel Architecture controller to their systems without the need for a custom carrier board. The CoreModule 740 also provides an upgrade path for the broad base of existing PC/104 system designs. The CoreModule 740 is available with QuickStart Kits that include board support packages (BSPs) for many popular operating systems including VxWorks, Windows CE, Windows XP Embedded, Linux and QNX. Pricing starts at around $400 in OEM quantities. ADLINK Technology, San Jose, CA. (408) 495-5557. [].

PXI/CompactPCI Backplanes for Embedded Test and Control OEMs

More than 10 new 3U and 6U PXI/ CompactPCI backplanes offer from 4 to 18 slots and work with PXI, PXI Express, CompactPCI and CompactPCI Express modules. Engineers can design custom installations and enclosures around the backplanes while integrating more than 1,500 existing PXI modules—from data acquisition to FPGA-based I/O modules, to high-end instruments such as signal generators and RF signal analyzers, as well as a variety of bus interface modules including serial, MILSTD-1553, IEEE 1588, Profibus and DeviceNet. With the new backplanes from National Instruments, they also can use the NI LabVIEW graphical system design platform to design, prototype and deploy all aspects of their system, increasing productivity and reducing time-to-market. PCI eXtensions for Instrumentation (PXI) is an open specification governed by the PXI Systems Alliance ( that defines a rugged, CompactPCI-based platform optimized for test, measurement and control. National Instruments, Austin, TX. (512) 794-0100. [].



8051-Based ASP Family with Integrated Low-Power Programmable Digital Logic

Optimized for applications requiring programmable digital peripherals, a new family of application services platforms (ASPs)—the PSoC3 architecture from Cypress Semiconductor—enables the integration of digital peripherals including PWMs, Timers, Counters, UARTs, glue logic and state machines. Additionally, the CY8C32xxx Programmable Digital PSoC 3 family offers customizable digital functions and interfaces lowering overall system power by migrating traditional CPU functions to programmable digital logic. The CY8C32xxx devices address a broad range of applications including interface bridging, I/O expansion, power-up sequencing and peripheral control. These applications are common in end markets such as communications equipment, servers and motor control. The Programmable Digital Family is now sampling along with the original three PSoC 3 families: the CY8C38xxx Precision Analog Family, the CY8C36xxx Performance Analog Family and the CY8C34xxx Analog Lite Family. The new CY8C32xxx family is powered by up to 24 Universal Digital Blocks (UDBs) each consisting of a combination of uncommitted logic (PLD), structured logic (8-bit datapath) and flexible routing to other UDBs, I/O or peripherals. The UDBs can be programmed with a large library of pre-characterized digital peripherals, and can also be customized using Verilog code to implement uncommon functions and interfaces that traditionally require a low-power CPLD. The programming and customization is simplified through the PSoC Creator integrated development environment (IDE). PSoC Creator provides fully tested, pre-packaged analog and digital peripherals easily customizable through user-intuitive wizards and APIs to meet specific design requirements. Additionally, the CY8C32xxx family includes basic analog peripherals such as a 12-bit Delta-Sigma ADC, internal voltage reference, two comparators and an 8-bit DAC to enable easy interfacing to analog signals. Samples of the four PSoC 3 families are available today, with full production expected in the third quarter of 2010. Package options include 100-pin TQFPs, 48- and 68-pin QFNs and 48-pin SSOPs. Cypress Semiconductor, San Jose, CA. (408) 943-2600. [].

Fanless Panel PCs Balance Performance and Power Consumption

Two new fanless panel PCs are powered by Intel Atom N270 processors. The PPC-L128T and PPC-L157T from Advantech are 12.1” and 15” fanless panel PCs that deliver high performance while consuming low power. They operate with low noise levels and provide display resolutions up to 1024 x 768 (XGA) pixels. The PPC-L128T and PPC-L157T PCs are both equipped with dual Gigabit Ethernet connectors that support either failover or LAN teaming. Advantech’s customization services and optional accessories such as wireless modules, battery packs and SATA optical devices allow system integrators to design tailor-made solutions for a variety of industrial applications. The PPC-L128T optionally supports a sunlight-readable display, making it suitable for outdoor use. The PPC-L128T and PPC-L157T are designed with the Atom 1.6 GHz N270 processor combined with 945GSE + ICH7M chipsets. The chipsets are rated at 2.5W, 4W and 1.5W respectively. The system’s fanless design provides passive cooling, and its low noise operation makes the PPC-L128T and PPC-L157T suitable for many environments. Examples include admissions areas or other public locations such as hospitals. The industrial-grade panel PC front bezels are IP65 and NEMA4 compliant, and the systems are tested up to 1G for vibration. The PPC-L128T and PPC-L157T Panel PCs are both capable of displaying XGA resolutions, and are capable of displaying standard SVGA resolutions at 800 x 600 pixels. The PPC-L128T and PPC-L157T both support LAN teaming and failover configurations using dual Gigabit Ethernet LAN connectors. With teaming, the two physical NICs can be configured as one logical connection, effectively doubling throughput. With failover, the two physical NICs can be attached to separate network switches, allowing for continued operation and redundancy in the event of failure of one network path. System integrators can make the choice based on their application needs. Advantech, Irvine, CA. (800) 866-6008. [].

Low-Power, 8-bit Microcontrollers with 5V Operation, 20 nA Sleep

A line of low-power, high-performance 8-bit microcontrollers provides features such as operation from 1.8 to 5.5V, numerous communication channels, 8 to 128 Kbyte flash memory and peripherals for capacitive touch-sensing applications. Other features included in the PIC18F “K22” family from Microchip Technology are a 12-bit Analog-to-Digital Converter (ADC), multiple PWMs and additional timers. All of the new MCUs feature nano-watt XLP technology for eXtreme low-power operation, with industry-leading sleep currents down to 20 nA. Additionally, the MCUs provide a greater than 50% improvement in active current over previous generations. The feature set of the PIC18F “K22” MCUs allows this family to be used in a wide variety of applications. The 5V capability of the family is ideal for applications that typically require robust operation or noise immunity. Battery-powered applications benefit from nano-watt XLP technology, which reduces current draw and therefore extends battery life. Example applications include those in the industrial (e.g. metering, electronic door locks, cargo tracking, lighting, alarm systems); appliance (e.g. smart energy, dishwashers, refrigerators, HVAC controls); medical (e.g. diagnostic devices, portable medical meters); and automotive (e.g. lighting, dashboard instrument clusters, keyless entry, interior controls, garage-door openers) markets, among others. A summary of the features is shown in Table 1. Plug-In Modules (PIMs) for the PIC18LF45K22 and PIC18F87K22 MCUs are also available. The PIMs can be used with the PIC18 Explorer Board. Designers can also use Microchip’s complete suite of standard development tools, including the free MPLAB IDE and corresponding suite of emulators, programmers and development boards, along with the MPLAB C18 or HI-TECH C compilers for PIC18 MCUs. The PIC18FXXK22 MCUs are available in PDIP, QFN, SOIC, SSOP and TQFP packages of various sizes, in pin counts ranging from 20 to 80. Prices start at $0.60 each in high volume. Microchip Technology, Chandler, AZ. (480) 792-7200. [].




Multicore Trace Tool Enables Event Analysis

A new multicore-enabled development tool enables embedded developers to visualize and better understand the behavior of their real-time systems by showing thread and core activity graphically across a common timescale. With TraceX/MC from Express Logic, system events like interrupts and context switches that occur out of view of standard debugging tools can be seen clearly on each core. TraceX/MC introduces the ability to identify and study these events, and to pinpoint the timing and core on which they occurred. By offering such visibility into the overall system operation, TraceX/MC enables developers to resolve programming problems more easily, reducing the inordinate time typically spent debugging a multicore application. Designed to work with Express Logic’s ThreadX RTOS, TraceX/ MC creates a database of system and application events on the target system during run-time. Events such as thread context switches, preemptions, suspensions, terminations and system interrupts, typically escape detection in a standard debugging environments. Such events are logged in a target-resident circular buffer by ThreadX, with time-stamping and active core-thread identification so they can be displayed later in the proper time sequence for the appropriate core. Event logging may be stopped and restarted by the application program dynamically when, for example, an area of interest is encountered. This approach avoids cluttering the buffer and using up target memory when the system is performing correctly. Trace information may be uploaded to the host for analysis at any time whether at post mortem or on encountering a breakpoint. A circular buffer enables the most recent “n” events to be stored at all times, and to be available for inspection upon the occurrence of a system malfunction, breakpoint, or any other time the system is halted. Once the event log has been uploaded from target memory to the host, TraceX/ MC graphically displays the events on a time-based horizontal axis, with the various system cores and associated application threads and system routines represented on the vertical axis. TraceX/MC is available for use on Windows PCs, at a license price of $1,000 per developer seat, with no license keys required. Express Logic, San Diego, CA. (858) 613-6640. [].

Power-over-Ethernet Compact Vision System

A new compact vision system is based on the Intel Core2 Duo P8400 processor. The EOS-1000 from Adlink Technology provides four independent Power over Ethernet (PoE) ports with data transfer rates up to 4.0 Gbit/s and combines high computing power and multi-camera imaging— suitable for applications such as 3D vision robotic guidance. The EOS-1000 is a compact-size 7.8” W x 6.5” D x 3.3” H (200 x 165 x 85 mm) vision system designed for demanding industrial environments and mission-critical applications. It has undergone harsh vibration and shock testing during its design to ensure durability up to 5G. Long-life embedded components were selected and system monitoring components were incorporated to monitor CPU temperature, fan speed and system responsiveness to further provide a very robust and reliable platform. The PoE technology feature allows power to be supplied through the Ethernet cable. Vision applications will greatly benefit by the extended cable distances of up to 100m. Such PoE solutions can simplify system installation and lower the maintenance costs. The EOS-1000 also provides an auto detection function to ensure compatibility with both PoE and conventional non-PoE devices. The EOS-1000 also features multiple I/O options, including two RS-232/485, four USB, 32 isolated digital lines and dual storage options (HDD and CompactFlash) for a ready-to-use vision system. The EOS-1000 is currently available for a list price of $1,635. ADLINK Technology, San Jose, CA. (408) 495-5557. [].




Low-Power 8-bit MCUs Feature LCD Driver, 5V and On-Chip 12-bit ADC

FeaturePak Module Features 96 Programmable Digital I/O Lines

A new low-power, 5V 8-bit microcontroller (MCU) family includes an on-chip LCD driver module and 12-bit Analog-to-Digital Converter (ADC). The PIC18F “K90” family from Microchip Technology features nano-watt XLP technology for eXtreme low-power consumption, with sleep currents down to 20 nA. The family comes in 64- and 80-pin packages, with memory options that range from 32 Kbyte A new digital I/O module is compatible with to 128 Kbyte of flash the recently introduced FeaturePak embedded memory, up to 4 Kbyte I/O expansion standard. Despite its diminuof RAM and 1 Kbyte tive size (smaller than a credit card), the FPof on-chip EEPROM. GPIO96 from Diamond Systems integratesand 96 Get Connected with technology With 24 channels of buffered, programmable I/O now lines with companies providingdigital solutions mTouch capacitive byte-wide and bit-wide Get Connected is aport new direction resource forcontrol, further exploration touch sensing, these eightinto 32-bit counter/timers, four 24-bit pulseproducts, technologies and companies. Whether your goal MCUs enable higher width modulation circuits with 0-100% dutyspeak directly is to research the latest datasheet from a company, with ancycle, Application or jump to awith company's technical system integration— and aEngineer, watchdog timer system reset page, the goal ofcapability. Get Connected is to put to youhost in touch with the combining the capaIt interfaces systems viaright theresource. Whichever level of service you require for whatever type of technology, bility to sense a large FeaturePak host interface’s high-speed PCI Get Connected will help you connect with the companies and products number of cap-touch sliders, buttons and keys with the ability to drive large, segmented LCDs. Express bus interface. you are searching for. According to Microchip, the PIC18F “K90” family represents a significant expansion The FP-GPIO96 is shipped in a standard their high-end 8-bit LCD microcontroller offerings into the 5V operating range. These products configuration, based on the “personality” are suitable for customers wanting to drive large, segmented LCDs, while consuming very low pre-programmed into its onboard FPGA. amounts of power for longer battery life. With this combination of features, these MCUs are well Alternate personalities may be downloaded suited for applications in the home automation (e.g. thermostats, security systems, in-home disat no charge from Diamond’s website and plays), appliance (e.g. coffee makers, ranges, refrigerators); industrial (e.g. electronic door locks, programmed into the board using a Diamondmetering, HVAC controls); medical (e.g. pulse oximeters, glucometers, digital thermometers, supplied software utility. Get Connected with technology and companies prov portable health-monitoring devices); and automotive (e.g. alarm systems, keyless entry, dashFP-GPIO96 also supports -40° exploration into pro Get The Connected is a new resource for further board and center-stack displays) markets, among others. a company, speak directly with an Application Engine todatasheet +85°C from extended temperature operaA Plug-In Module (PIM) for the PIC18F87K90 MCU was also announced, today. The PIM in touch with the right resource. Whichever level of service you requir tion. Diamond supplies a Universal Driver Connected will help you connect with the companies and produc can be used with the PICDEM LCD 2 Demo Board or stand-alone in a custom application. Get software toolkit at no extra charge with the Designers can also use Microchip’s complete suite of standard development tools, the FP-GPIO96 digital I/O FeaturePak module, user-friendly and free MPLAB IDE and corresponding suite of emulators, programmers and to ease the task of supporting its data acquisidevelopment boards, along with the free MPLAB C or HI-TECH C compiler for PIC18 MCUs. tion functions in applications under Linux, The PIC18F “K90” MCUs are available in 64- and 80-pin TQFP and 64-pin QFN packages, with Windows XP, Windows Embedded Standard prices starting at $2.42 each in 10,000 unit quantities. and Windows Embedded CE. The toolkit also includes demo programs and example code Microchip Technology, for each supported OS, to further accelerate Chandler, AZ. application development. (480) 792-7200. Diamond Systems, []. Mountain View, CA.

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(650) 810-2500. Get Connected with companies and []. products featured in this section.

Get Connected with companies and products featured in this section.




Touch Solution Enables High-Resolution Screens, Unlimited Touch

A new set of touch screen solutions now supports large touch screens up to 15 inches for emerging products including touch-enabled tablets, smartbooks, mobile Internet devices (MIDs), netbooks, PC notebooks and a range of industrial applications. The maXTouch technology from Atmel is targeted to enable exciting new applications and user interactions on one screen. The chip technology, combined with proprietary algorithms, will offer higher performance and faster response times to provide a better user experience. The larger screen solution is an enhancement of existing maXTouch products that provide configurability to exceed today’s user interface requirements. Advanced touch screen functionality includes unlimited touches and rejection of unintended touches; stretch/pinch and rotate gestures; stylus support; handwriting and shape recognition, including face detection on mobile phones; grip suppression and palm rejection on MIDs and netbook screens. The lower power consumption of the maXTouch solutions enables longer battery life for portable devices to provide users more productivity and convenience. Based on the touch accuracy and linearity in maXTouch solutions, users can draw more accurately with a stylus or their fingers on touch-enabled tablets and other touch applications. These solutions come complete with a full suite of software drivers and advanced touch functionality for finger pinch to expand a screen, stylus support for character writing, and gesturing to turn pages for eBooks and multi-page applications. Atmel, San Jose, CA. (408) 441-0311. [].

RISC Embedded Computer Offers Rich I/O and Windows CE 6.0

Packed with a wealth of I/O features and using the latest embedded software environment, a new compact system is based on the Atmel AT91SAM9263 processor boasting a 32-bit ARM instruction. The Relio R9 from Sealevel Systems is a platform targeted for embedded applications requiring small size, wide operating temperature range and flexible I/O connectivity. Available with up to 256 Mbyte RAM and 256 Mbyte flash memory, the I/O features of the Relio R9 extend the possible uses beyond traditional ARM applications. Standard I/O includes Ethernet, serial, USB, CAN Bus, digital and analog interface. For local or remote I/O expansion, the Relio R9 connects to Sealevel SeaI/O modules via the dedicated RS-485 expansion port and communicates via RS-485 Modbus RTU. To provide the fastest time-to-market, the Windows CE 6.0 BSP binary and low-level drivers for system I/O are included. Additionally, the R9 software package is equipped with the Sealevel Talos I/O Framework, which offers a high-level object-oriented .NET Compact Framework (CF) device interface. This interface provides an I/O point abstraction layer with built-in support for the specific needs of analog and digital I/O such as gain control and debouncing. The Relio R9 is housed in a rugged, small enclosure suitable for mounting almost anywhere and is rated for a full -40° to +85°C operating temperature range. The Relio R9 is priced from $599, and a QuickStart Development Kit is available. For applications with specialized hardware requirements, system designers can use the Relio R9 as a platform for application development while a customized target system is designed for specific application requirements. Sealevel Systems, Liberty, SC. (864) 843-4343. [].



FeaturePak Embedded I/O Comes to SUMIT-ISM Stacks

A new adapter board allows the use of FeaturePak I/O expansion modules in systems that provide SUMIT-ISM expansion stack locations. The FeaturePak socket on the SUMIT/ FP Adapter consumes a single PCI Express x1 lane from the SUMIT-A bus connector on the SUMIT-ISM module. The adapter provides a pair of 50-pin I/O header connectors for convenient access to all FeaturePak I/O. In addition, it includes pass-through connectors for the SUMIT-ISM stack’s SUMIT-B bus and PC/104 (ISA) bus. An extended operation temperature range of -40° to +85°C is supported. The FeaturePak specification defines tiny, application-oriented personality modules— three-fifths the size of a credit card—that snap into low-cost, low-profile, reliable sockets on single board computers (SBCs), computer-onmodule (COM) baseboards and full-custom electronic circuit boards. FeaturePak modules interface to the host system via a single lowcost, high-density, 230-pin connector, which carries PCI Express, USB, I2C and several other host-interface signals, plus up to 100 points of application I/O per module. The FeaturePak host interface is CPU agnostic and is compatible with both Intel- and RISC-architecture systems. Additionally, the modules can easily be integrated into embedded designs along with Qseven, COM Express, Mobile-ITX, SUMIT, PCI/104-Express, EBX and EPIC. Small quantities of the SUMIT/FP Adapter are available in 60 days, priced at $190. Diamond Systems, Mountain View, CA. (650) 810-2500. [].


High-Bandwidth Gigabit Ethernet Switch Supports Failsafe Operation

A 6U CompactPCI 24-port Gigabit Ethernet switch is designed for challenging applications in telecommunications, industrial and military systems. The NETernity CP921RC-30x from GE Intelligent Platforms is a fully managed Layer 2/3+ switch with support for “future-proof” IPv6 switching and routing. The new functionality included is in the form of Failover Groups (FOG), a feature that is part of GE’s OpenWare switch management environment. Responding to the need for very high-availability networks, FOG is designed to support redundancy at different levels—redundant links across backplanes from nodes to switches, redundant switches, and redundant links to external networks. This provides fast, application-independent, failover capabilities, suitable for a wide range of network configurations, from the simple to the very complex. This unique combination of innovative hardware and software technologies delivers leading-edge functionality, flexibility and availability. The CP921RC-30x is optionally available with two front panel 10 Gigabit Ethernet ports and two Gigabit Ethernet ports capable of supporting SFP+ and SFP transceivers (which can be copper or fiber) respectively for greater configuration flexibility. These ports are invaluable for very high external bandwidth traffic aggregation environments. The OpenWare software environment, designed specifically for the NETernity range of switches, provides an improved user experience for application development and support. Additional functionality or customization can be simply incorporated within OpenWare according to customer requirements. The OpenWare switch management environment provides a full and robust set of configuration and management functions including VLANs, Quality of Service, Link Aggregation, SNMP, MSTP, Multicast and so on; these can be implemented via a serial console, Telnet or the Web. Connected with technology and PICMG 2.16 and RoHS compliant, the CP921RC-30x Ethernet switch supports high-availability hot swap Get as well as companies providing solutions now IPMI v1.5 to further improve availability, maintainability and manageability. As well as supporting Layer-2/3+ switching, it can support Layer 4-7 switching is a new resource for further exploration when required. A variety of rear transition boards is available to provide rear I/O configuration flexibility beyondGet the Connected flexibility delivered by the CP921RC’s into products, technologies and companies. Whether your goal optional front panel ports. The CP921RC-30x is also available in an extended temperature variant for demanding industrial applications.

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is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, 6.5-Inch and 15-Inch Touch Panel for and products Get Connected willScreen help you connect with PCs the companies you HMI are searching for. Next-Generation Applications

GE Intelligent Platforms, Charlottesville, VA. (800) 368-2738. [].

Rugged EPIC SBC with Dual-Core Atom and Hardware Video Decoder

A rugged EPIC single board computer integrates a dual- or single-core Atom Processor with ICH8M chipset, onboard SSD, H.264 hardware video decoder, networking and robust I/O in a small form factor. It is suitable for applications in harsh environments that require highend video performance such as vehicle computing platforms, self-service kiosks, digital signage and video surveillance. The ReadyBoard 740 from Adlink Technology features a 1.66 GHz dual-core Intel Atom D510 or singlecore Atom D410, one SO-DIMM for up to 2 Gbytes of 667 MHz DDR2 RAM, and a Broadcom Crystal HD H.264 video decoder. Graphics capabilities of the ReadyBoard 740 include VGA, LVDS, DVI output and efficient high-definition playback (1920 x 1080). Conducted transient emissions and immunity are well known critical phenomena for power supply in vehicular applications and other severe environments. The MiniModule PWR, an optional power protection module, allows the ReadyBoard 740 to meet the specific demands of in-vehicle power environments. With the MiniModule PWR, the ReadyBoard 740 supports a wide input voltage range, reverse battery protection, overvoltage protection (OVP) and DC/DC converter, making the ReadyBoardTM 740 an ideal solution for in-vehicle devices. The single unit list price starts at $410. ADLINK Technology, San Jose, CA. (408) 495-5557. [].

Two new touch screen panel PCs feature durability with IP65-compliant LED backlit panels that can withstand temperatures of -200° to 600°C. Device interactivity is assured with touch panel navigation, an integrated Get two Connected with technology and companies prov Get megapixel autofocus IP camera,Connected is a new resource for further exploration into pro microphone and speakers.datasheet The from a company, speak directly with an Application Engine in touch 6.5-inch VIPRO VP7806 andwith the right resource. Whichever level of service you requir Get Connected will help you connect with the companies and produc 15-inch VIPRO VP7815 Via VIPRO series from Via Technologies are placed for next-generation panel applications that include hospital patient terminals, home and building automation and advanced multimedia-rich security ecosystems. Both Via VIPRO VP7806 and VIPRO VP7815 are based on the Via ART 3000 embedded box PC, adding a high-quality touch screen display to one of the industry’s most flexible and complete embedded box systems. This uniquely modular design strategy offers customers faster time-to-market and design cycles compared to traditional panel PC designs. The Via ART 3000 combines a 1.3 GHz 64-bit Via Nano processor with the Via VX800 media system processor, bringing DX9 integrated graphics, crystal clear HD audio, Gigabit networking, four COM ports and four USB Get Connected with companies and ports. Both the Via VIPRO VP7806 and VP7815 support one external VGA products featured in this section. port plus a 24-bit LVDS signal through DB-26 connector. Via VIPRO products use high-quality 700 cd/m2 luminous backlit LED displays that are fully IP65 compliant against water and dust, providing 800 horizontal and 700 vertical viewing angles.


Via Technologies, Fremont, CA. (510) 693-3300. []. Get Connected with companies and products featured in this section.




Rugged XMC Module Targeted for Video Streaming from Unmanned Vehicles

Responding to the rapid growth in unmanned vehicles and their requirement to deliver highquality mission video over links that are often bandwidth-constrained, a rugged video streaming XMC is designed to be a simple, plug-and-play solution that requires minimal integration or software development. The ICS-8580 from GE Intelligent Platforms is small, lightweight at 100 grams/3.5 ounces and consumes little power—typically 10 15 watts. Its flexibility is further enhanced by its ability to support numerous video formats with either two channels of high definition video or four channels of standard definition video. The ICS-8580 features the ultra-efficient, industry standard H.264 video compression codec, but is software-reconfigurable to enable it to support alternatives such as JPEG2000. The ICS-8580 provides input support for HD/ED/SD analog input signals, analog RGB formats from VGA to UXGA, as well as digital input formats such as 3G-SDI, DVI, and HDMI up to a maximum resolution of 1,920 x 1,080 or 1,600 x 1,200 pixels. Two TI TMS320DM6467 DSPs provide processing capability to achieve two streams of up to 1080p H.264 (or JPEG 2000) encoding. Up to four streams of SD input data can be compressed in parallel. The encoded bit stream can be accessed via PCI Express, or output directly as Gigabit Ethernet RTP/UDP packets. High-speed A/D devices—supporting resolutions up to 1,600 x 1,200 for graphics type inputs and 1,920 x 1,080 for HD video inputs— provide input digitization of the various supported analog video formats. The Altera FPGA controls data capture and routing and can be used in a variety of ways, while the TI DSP coprocessors provide efficient and streamlined video data processing. If required, the system can be loaded with custom FPGA and DSP code to perform a broad range of video processing functions on the video input streams. GE Intelligent Platforms, Charlottesville, VA. (800) 368-2738. [].

MicroTCA Robust Platforms for Multi-core Processing and 10 Gbit/s Switching

Two new, robust MicroTCA platforms, which conform to MTCA.1, are specifically designed for high-end AdvancedMCs and feature a 10 Gbit/s Ethernet switched backplane enabling the highest data flow rate. In their maximum configuration, both systems can be fitted with up to 36 Intel XEON processor cores and a full 216 Gbytes of RAM. The modular 19-inch 6U OM6090D and OM7090D MicroTCA platforms from Kontron are redundant and specifically designed in compliance with the MTCA.1 specification for applications with the highest demands for robustness, availability and performance. The platforms are based on the same compact chassis (266 x 428 x 365 mm), which is equipped with four rear-mounted extraction fans. Both MTCA.1-compliant platforms provide nine double-width slots for AdvancedMC modules and two slots for redundant MicroTCA Carrier Hub (MCH) configurations (up to 80 watts). The Kontron OM6090D supports up to three pluggable AC-PSUs offering load balancing. For redundant power management, the Kontron OM7090D can be configured with two (one active + one standby) or three (two active + one standby) power management modules. Equipped with Kontron AdvancedMC modules, OEM customers are able to obtain pre-validated application-ready platforms from Kontron at any time and all from a single source, which drastically reduces their time-to-market. Dedicated modules for the platforms are the Kontron MicroTCA Carrier Hub AM4910, which supports 10 GbE Ethernet switching and CPU modules such as the Kontron AdvancedMC processor module AM5030 (Intel Xeon processor LC5518) or the Kontron AdvancedMC processor module AM5010 (Intel Core2 Duo). The AMC slots can also accommodate Kontron’s AdvancedMC storage module AM5500, a MTCA.1 module with up to 1 Terabyte storage capacity that can also be fitted with extremely robust solid-state drives (SSD) as an alternative to two 2.5” SATA HDDs. Kontron, Poway, CA. (888) 294-4558. [].




Two or Six Channel 12-bit ADC with up to 3.2 GSPS per Channel

A new 12-bit ADC supports either two 12-bit analog-todigital converter (ADC) channels at 3.2 GSPS (Gigasamples per second) or six channels at 1.6 GSPS. The Calypso-V5 from Tekmicro is compatible with legacy VME systems as well as newer ANSI/VITA 41 VXS-based systems and combines highdensity FPGA processing with the ultimate in ultra wide band ADC signal acquisition. Calypso-V5 is based on the latest National Semiconductor ADC device that supports either a pair of channels in non-interleaved mode or a single channel using 2:1 interleaved sampling. Calypso-V5 contains four ADC devices, supporting a total of either six channels plus trigger at 1.6 GSPS or two channels plus trigger at 3.2 GSPS. In all modes, the converters provide 12-bit resolution and open analog bandwidth exceeding 2 GHz. This allows Calypso-V5 to be used as a 3.2 GSPS converter for 1st Nyquist applications or as a high-density multichannel building block for Get Connected with technology and companies providing solutions now lower bandwidth applications using either 1st or 2nd Nyquist Get Connected is a new resource for further exploration sampling. Calypso-V5 also includes sample-accurate trigger into products, technologies and companies. Whether your goal synchronization in all modes, allowing coherent processing of is to research the latest datasheet from a company, speak directly multiple input channels both within a single card and across with an Application Engineer, or jump to a company's technical page, the multiple cards. This allows applications of up to 108 channels to be supported within a single chassis. goal of Get Connected is to put you in touch with the right resource. The Calypso-V5 contains four separate ADC devices, with each pair of devices assigned to Whichever its own front FPGA signal the level end of service youfor require for processing. whatever typeIn of technology, QuiXilica-V5 family, the front end FPGA is typically a Xilinx Virtex-5 SX95T-2 device. FutureGet QuiXilica products in 2010with will higher Connected will helplater you connect theoffer companies and products you end are searching density Virtex-6 FPGA options including LX240T, SX315T and SX475T devices. The two front FPGAs for. are supplemented with a “backend” FPGA that can be used for additional processing or for backplane or front panel communications. In the QuiXilica-V5 family, the backend FPGA can be configured with a range of Xilinx Virtex-5 FPGA options, from the standard LX110T-2 up to a LX330T, FX200T, or SX240T, depending on application requirements.

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Tekmicro, Chelmsford, MA. (978) 244-9200. [].

Energy-Efficient Processor Family Targets 1-Watt Video-Enabled Devices Get Connected with technology and companies prov

A product family of energy-efficient embedded processors provides a small form factor for Power Get Connected is a new resource for further exploration into pro Architecture-based performance and a broad range of peripherals energy-efficient consumer dedatasheet fromfor a company, speak directly with an Application Engine vices ranging from gateways, control panels and energyin meters tothe network attached storage systems, touch with right resource. Whichever level of service you requir Connected help you connect withEach the companies consumer Wi-Fi access points, IP phones, residentialGet gateways, andwill connected displays. of the and produc System-on-a-Chip (SoC) devices in the APM8018x family from Applied Micro is designed to deliver server-class processing performance in embedded systems that require less than 1W of operating power and low bill-of-material cost. Dramatic increases in volume for user-generated content (UGC) such as photos, music and video require large amounts of storage space and networking performance. Additionally, digital televisions and displays require direct Internet connections for IP content download and streaming of HD video. End-users are sensitive to ease-of-use issues and manufacturers for newly enabled Over-the-Top (OTT) features such as Hulu, YouTube, or Netflix. The APM8018x family is designed to deliver the performance that enables new applications. In connected displays for example, the APM8018x family serves as network co-processor to a video processing subsystem for Internet downloads. The APM8018x family supports CPU frequencies up to 800 MHz. High-speed inter-chip and networking with companies andfamily member is enabled connectivity is key to the SoC’s delivery of high performance atGet lowConnected power dissipation, and each productsand featured this The section. with a number of high-speed interfaces such as PCIe, SATA, GigE, SDIO, TDM USBin2.0. high integration and small footprint help drive minimal bill-of-material costs for embedded platforms. Estimated performance is 912 Dhrystone MIPS and typical power consumption is 0.3 watts in standby mode, and up to 1.5 watts at 600 MHz. The AppliedMicro APM8018x family will come in three variants: 8018x-400, the 8018x-600, and 8018x-800 and will be available in two different packages in 10x10mm BGA and 14x14mm BGA. Samples of the processor are expected in June 2010 and full production quantities are scheduled for the third quarter. Pricing is under $10 for 10,000-unit quantities. Get Connected with companies and products featured in this section. AppliedMicro, Sunnyvale, CA. (408) 542-8600. [].




with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

Advertiser Index Get Connected with technology and companies providing solutions now Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.




Advanced Digital Logic................................


Advantech Technologies, Inc....................... 14.................................

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Extreme Engineering Solutions, Inc............. 21......................................

End of Article MEN Micro, Inc.......................................... 22..................................

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products featured in this section. AMD........................................................... 8...........................................

with companies mentioned in this 37. article. Mentor Graphics. ........................................

American Portwell Technology, Inc..............

Get Connected with companies and products featured in this section.

Microsoft Windows Embedded.................... 52................. Get Connected with companies mentioned in this article.

Arium......................................................... 40........................................

National Instruments.................................. 15..............................................

AVAGO....................................................... 51.................

One Stop Systems......................................

Avalue Technology...................................... 23................................

Pentek, Inc..................................................

Cogent....................................................... 32...................................

Phoenix International................................... 4.....................................

COM Express & Multicore Board Showcase....33..............................................................

Red Rapids, Inc.......................................... 36...........................................

ELMA Components Div...............................

Themis Computer.......................................

RTC (Issn#1092-1524) magazine is published monthly at 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673. Periodical postage paid at San Clemente and at additional mailing offices. POSTMASTER: Send address changes to RTC, 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673.



Imagine... Optimal Performance in any Environment Your Imagination: Having your equipment perform without fail in mission critical situations, despite subfreezing or blistering hot temperatures; swirling dust or driving sand; debilitating humidity or a corrosive salt atmosphere; exposure to prolonged vibration or high acceleration loads. Our Innovation: Avago Technologies has supplied state-of-the-art DoD qualified high reliability hermetic optocouplers for over two decades to withstand extreme levels of environmental stress and exposure over extended periods of time. Avago delivers: • DSCC standard microcircuit drawings • Space certified • Commercial grade versions • Radiation tolerant devices • DSCC certified 3.3V hermetic optocouplers • Standard hermetic COTS devices If a commitment to technical excellence and innovative solutions in Military and Aerospace System applications is critical to your design contact Avago for a free sample.

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RTC magazine June 2010

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