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The magazine of record for the embedded computing industry

January 2010

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WIRELESS DATA ACQUISITION GOES LOW POWER

FPGAs Link PCIe to Specialized I/O Color Machine Vision: Eyes for Quality Programmable Automation Controllers Merge PLC and PC An RTC Group Publication


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WIRELESS DATA ACQUISITION GOES LOW POWER

56 Conduction-Cooled PrPMC/XMC Module Targets DualCore QorIQ P2020

58 Rugged Single Slot Graphics Solution for Demanding Applications

TABLEOF CONTENTS

61 Maintenance-Free Ethernet Switches Target Rugged Applications

JANUARY 2010

Departments

Technology in Context

Technology Deployed

FPGAs—Is Bigger Always Better?

Machine Vision in Factory Automation

PCI Express-Compliant Machine Vision—Untouched 7Editorial 16 Low-Cost Whither the Smart Grid? FPGAs Enable a Plethora of Peripherals by Human Eyes 40Color Insider 8Industry Latest Developments in the Embedded Technology Connected Industry Watch Marketplace Greg Lara, Xilinx

10

Small Form Factor Forum Have No Fear, Embedded World Is Here!

& Technology 56Products Newest Embedded Technology Used by Industry Leaders

Editor’s Report Advancing Advanced Technology Advances in Technology 12Advancing Tom Williams

Wireless Data Acquisition

Wireless Data Acquisition Brings Flexibility and 22 Low-Power Low Maintenance Daniel M. Dobkin and Lew Adams, GainSpan

technology in Systems Programmable Automation Controllers Automation 28 Programmable Controllers Bring Together the Best of PLCs and PCs

Ben Dawson, Dalsa Corporation

Programmable Devices

Processors Running General-Purpose Code Set 44Graphics to Revolutionize Embedded Computing

Simon Collins, GE Intelligent Platforms

Digital Filtering on 50Embedded Programmable Mixed-Signal Devices

Kendall Castor-Perry, Cypress Semiconductor

David Crump and David Hill, Opto22

Energy Visibility to Energy 36 From Savings in Commercial and Industrial Buildings

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JANUARY 2010 Publisher PRESIDENT John Reardon, johnr@rtcgroup.com

Editorial EDITOR-IN-CHIEF Tom Williams, tomw@rtcgroup.com CONTRIBUTING EDITORS Colin McCracken and Paul Rosenfeld MANAGING EDITOR Marina Tringali, marinat@rtcgroup.com COPY EDITOR Rochelle Cohn

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JANUARY 2010 RTC MAGAZINE

To Contact RTC magazine: HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, www.rtcgroup.com EASTERN SALES OFFICE The RTC Group, 3310 Twin Ridge Drive, Charlotte, NC 28210 Phone: (949) 573-7660 Editorial Office Tom Williams, Editor-in-Chief 245-M Mt. Hermon Rd., PMB#F, Scotts Valley, CA 95066 Phone: (831) 335-1509 Fax: (408) 904-7214 Published by The RTC Group Copyright 2008, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.


EDITORIAL JANUARY 2010

Tom Williams Editor-in-Chief

Whither the Smart Grid?

O

ur present electrical grid—let’s just be honest—is based on technology from the 1920s that has been enhanced, expanded, improved and strengthened but not basically changed in its nature or concept since then. It is—to put it kindly—held together by sticks and bailing wire implemented by legions of heroic and dedicated engineers and technicians. Still, we have witnessed in recent years several immense failures that could easily have been much worse and portend real future disaster if fundamental redesign and overhaul are not undertaken on a massive scale. There is, of course, the movement toward the so-called Smart Grid that is starting to gain traction. The Smart Grid holds the promise of an Advanced Metering Infrastructure (AMI), automated meter reading (AMR), intelligent protocols for appliances that can select to turn on when rates are low, visualization technology for real-time load monitoring and pinpointing of trouble, the potential for load balancing, and much more that can result in a more modern, stable and efficient electricity distribution systems. While the Smart Grid is not identical to renewable energy resources like solar, wind, geothermal and others, it is conceived to accommodate them and to make them more able to contribute their share to the overall energy picture. Of course, there are also elements of resistance to the build-out of the Smart Grid. I am told by friends who have worked in the industry that the electrical power industry is extremely resistant to change, and one reason is the fear that this whole existing bailing wire infrastructure could come tumbling down. The counter to that is the argument that it will anyway if something is not done. We are already seeing the proliferation of intelligent and wireless metering, and in California plans are underway to build new power lines that will bring power from vast new wind farms and desert solar arrays to the cities. It turns out, however, that there is a choice that must be made and a debate is churning up that could actively involve the use of embedded technology. At its core, it concerns whether to continue the old model of utility-oriented power generation and distribution, or to modify that model with a large degree of decentralization.

There is growing resistance to placing huge solar arrays in the pristine deserts and then shipping the power over long lines to where it will be used. Far better, argue some, to decentralize and produce solar power where it is actually used—by putting panels on almost every rooftop—commercial or residential—in the state. This would, of course, be a boon for the sales of intelligent silicon because it would involve controllers that would transform the power to AC and either put it onto the grid or draw it off as needed while keeping track of the billing data. Many, many embedded devices would be needed to do that ($). There would also be numerous other advantages including reducing transmission losses and increased grid stability and security due to decentralization. It would also eliminate or reduce the expenditures needed for more actual transmission lines. Trouble is, photovoltaic solar power in urban centers would also pose a threat to the utility business model. Not surprisingly, there are also a number of non-technical objections due to this little fact. But a decision must be made. Whatever form the Smart Grid ultimately takes, it will heavily involve embedded intelligence and widely distributed embedded intelligence at that. It will also have to accommodate growing sources of renewable energy. At this point, it appears likely that the result will be some kind of intelligent hybrid. The utility model is certainly not going to go away. We will still have huge amounts of power coming from central generating plants. The question is, how will this system be made more efficient and more reliable and how will added capacity in the form of renewable energy sources be integrated into the new grid infrastructure? If a decentralized model is added to the existing centralized utility model, will it eventually come to dominate as older plants go offline? There are many factors all swirling into the eventual outcome, but there is no standing still. Inaction will ultimately bring disaster. Advancing the Smart Grid in the most effective way will provide a reliable source of increasingly clean power and will definitely be a major area of activity for the embedded industry. RTC MAGAZINE JANUARY 2010

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INDUSTRY

INSIDER JANUARY 2010 VITA Members Form VPX Marketing Alliance VITA has announced the formation of the VPX Marketing Alliance. Its purpose is to continue the work done by the OpenVPX Marketing Working Group in promoting OpenVPX and establishing an ecosystem of interested parties who will promote the VPX architecture and drive widespread adoption of the VPX specifications and technology. The alliance comprises VPX technology suppliers developing products based on the VPX family of specifications. The VPX Marketing Alliance is focused on the advancement of the VPX family of technologies, a family that includes VPX, VPX REDI, OpenVPX and other related activities on the VPX Technology Roadmap VPX roadmap such as fiber optics and RF. Work has been underway on the VPX family of specifications since its introduction in January 2004. The most recent achievement was the completion Connectivity of the work done by the OpenVPX WorkFiber optics: VITA 66 ing Group that developed the VPX SysAnalog/RF: VITA 67 Alternate connectors tems Specification, leveraging the work Viper: VITA 60 VITA 65 KVPX: VITA 63 of the individual VPX standards commitPower supply standard tees to create better interoperability. This VITA 48 VITA 62 specification was submitted to the VITA Compliance channel standard Standards Organization (VSO) on October VITA 46 VITA 68 19, 2009 as VITA 65 and it is undergoing final comment, ballot and ratification as an ANSI/VITA standard. Ratification of VITA 65 is expected to occur by the end of Q1 2010. VPX is a broadly defined technology utilizing the latest in a variety of switch fabric technologies in 3U and 6U format modules. OpenVPX is the architecture framework that defines system-level VPX interoperability for multivendor, multimodule, integrated system environments. The OpenVPX framework delineates clear interoperability points necessary for integrating module to module, module to backplane, and chassis. OpenVPX recommends but does not specify development systems to assist in VPX system evaluation, prototyping and development. OpenVPX will evolve and incorporate new fabric, connector and system technology as new standards are defined.

Machine-to-Machine Mobile Network Connections to See Rapid Growth Worldwide

According to a new research report from Berg Insight, 1.4 percent of the mobile network connections worldwide were used for wireless machine-to-machine (M2M) communication at the end of 2009. The shares in the EU and the U.S. were 2.4 percent and 4.3 percent respectively. In the next five years, the total number of wireless M2M connections is forecasted to grow at a compound annual growth rate (CAGR) of 25.6 percent to reach 187.1 million connections in 2014. By the same year M2M as a share of the total number of cellular connections is projected to reach 3.1 percent.

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“The global wireless M2M market has felt the impact of the economic downturn in the past year,” said Tobias Ryberg, Senior Analyst, Berg Insight. “Hardware manufacturers have suffered from shrinking margins as volume growth has flattened out at the same time as prices have continued to fall. Network service providers have fared better and still enjoy high growth for M2M connections even if the rate of increase has slowed down in several markets.” He points out that M2M is now starting to generate substantial revenue streams for large operators despite the typical monthly ARPU of just a few euros. Berg Insight anticipates that 2010 will be a positive year for the

global wireless M2M market with hardware shipments returning to growth and a continued increase in the number of network connections. New M2M initiatives launched by major mobile operator groups are expected to have a positive influence on demand, stimulating new large-scale projects. Regulatory developments are predicted to have a major impact on the telematics industry. The EU is expected to propose formal legislation for the introduction of eCall by 2014, but in Brazil the fate of Resolution 245 is more uncertain. Another significant development to watch will be the progress of the Dutch government’s plans to introduce a nationwide electronic road charging system for all motor vehicles.

Digi’s Spectrum Design and Qualcomm Collaborate for M2M Designs

Digi International has announced that Spectrum Design Solutions, Digi’s wireless consulting group, is developing machineto-machine (M2M) designs using Qualcomm’s Gobi modules and working with Qualcomm to promote such M2M designs and Qualcomm’s Gobi technology. Gobi technology provides global, multi-mode 3G connectivity for High Speed Packet Access (HSPA) and Evolution-Data Optimized (EVDO) networks in a single module. This enables a device such as an embedded gateway to support multiple cellular networks for data connectivity throughout the world and minimizes risk by allowing customers to support a different standard in the future than initially selected. Spectrum expects to help customers reduce time-to-market of Gobi-enabled wireless M2M products by up to 50 percent. Gobi modules provide affordable 3G connectivity for numerous applications including energy, industrial, agriculture, retail, financial and building automation. With more than 50 engineers and 500 collective years of embedded hardware, software and RF design experience, Spectrum has successfully enabled customers to build millions of cellular devices. Spectrum has the lab facilities, experience and equipment necessary to pre-scan custom cellular designs to make cellular certification easier, faster and more efficient.

Johnson Controls-Saft to Supply the Battery for Transit Connect Electric Vehicle

Johnson Controls-Saft has announced that it has been chosen as the Lithium-ion battery supplier for Azure Dynamic’s Force Drive integration on the Ford Transit Connect Battery Electric Vehicle (BEV). The all-electric van will be in production beginning in late 2010.


Commercial transportation in an urban environment accounts for 12 percent of total miles driven, yet is responsible for 25 percent of total greenhouse emissions. The Transit Connect BEV would eliminate gas costs and enable fleet owners to accurately forecast the cost of doing business. It has a targeted range of 80 miles on all-electric power, and is the first of four electric vehicles Ford plans to build in its global commercial vehicle program. In addition to its work with Azure, Johnson Controls-Saft is in production with the Mercedes S-Class hybrid, currently on sale in Europe and the United States. Johnson Controls-Saft also will supply the Li-ion hybrid batteries for the BMW 7-Series ActiveHybrid available in 2010 and Ford’s first plug-in hybrid electric vehicle available in 2012. The Transit Connect BEV will use the same battery technology that is currently installed in the Ford Escape test fleet of plug-in hybrid electric vehicles, also supplied by Johnson Controls-Saft. The Johnson Controls-Saft battery systems, including electronics, electrical and mechanical components, will be assembled at the company’s facility in Holland, MI. Azure Dynamics has not announced the manufacturing location for the Transit Connect BEV.

FTC Goes After Intel for Alleged Anti-Competitive Business Practices

The Federal Trade Commission has filed suit against Intel going after block pricing deals and other tactics the government claims the company has been using to stifle competition. The major accusation appears to be that Intel is trying to shut competitors out of the marketplace, which, the FTC claims, deprives consumers of choice and kills innovation. The FTC refers to “threats, bundled prices, or other offers to encourage exclusive deals,

hamper competition, or unfairly manipulate the prices of its products.” In regards to the major competitor, AMD, the charges include threats, bribes and unfair rebates and discounts to discourage OEMs from using AMD processors. Also named as injured parties are Dell, Hewlett-Packard and IBM. The FTC also said that Intel has secretly redesigned critical computer software to hinder the performance of other companies’ microprocessors, or CPUs. That could refer to the graphics processing unit (GPU) arena where the biggest players are Nvidia and AMD—actually, AMD’s ATI graphics products are a result of the purchase of that company by AMD. The FTC is claiming that Intel, which has been trying to break into the high-end GPU market for some time, is working to prevent Nvidia and AMD from connecting their GPUs to Intel’s latest devices. All this is, of course, going to result in a long, lawyer-infested battle with the case going to trial in September with Intel calling it “misguided” and AMD and Nvidia expressing pleasure at the development. Intel is also appealing a record $1.45 billion antitrust fine leveled by European regulators. In addition, it recently agreed to pay AMD a settlement of $1.25 billion over intellectual property disputes. In this case, rather than seeking monetary damages, the FTC is trying to force Intel to change its business practices, threatening fines for contempt of court if Intel is found guilty and fails to comply.

the Predator UAVs that have been shooting Hellfire missiles at them. Sure enough, fighters have used an online Russian software program called SkyGrabber, which can be purchased for $25.95 on the Internet. According to a report in the Wall Street Journal, for about the past year, insurgents have been able to regularly capture drone video feeds. They were aided in their endeavor by the failure of the military to properly encrypt the video data. At the time of this writing, the SkyGrabber server site is timing out due to traffic overload. The hackers were apparently able see the video but were not able to jam the electronic signals from the unmanned aerial craft or take control of the vehicles. A senior defense official seemed to think that saying this (which most of us in this industry already realize) would be reassuring. However, obtaining the video feeds can provide insurgents with critical information about what the military may be targeting, including buildings, roads and other facilities. Belatedly, now, the Defense Department is working to encrypt all of its drone video feeds from Iraq, Afghanistan and Pakistan, according to defense officials. With some 600 unmanned aerial vehicles along with thousands of ground stations to address, this could be quite a lengthy process. However, it does illustrate one basic truth about computer network security: In order to have security, you have to install the technology.

Insurgents Hack UAV Video Streams in Iraq and Afghanistan

CriticalBlue and MontaVista to Expand Multicore Development Solutions for Embedded Linux

Well, gangbangers on the street try to listen in to police scanners. Maybe someone should have assumed that insurgents in Iraq and Afghanistan might want to hack into the video feeds from

MontaVista Software and CriticalBlue have announced that CriticalBlue has joined the MontaVista partner program and will make their Prism product

available on MontaVista Linux 6 and MontaVista Linux Carrier Grade Edition products. Prism is an embedded multicore programming system that allows software engineers to easily assess and realize the potential of multicore processors without significant change to their development flow. Prism analyzes the behavior of code running on either hardware development boards or simulators. It allows engineers to take their existing sequential code, and without making any changes, explore and analyze opportunities for concurrency. Having identified the optimal parallelization strategy in this way, the developer will implement parallel structures and use Prism again to verify efficient and thread-safe operations. This announcement continues the broadening of Prism integrations with key players in the multicore software development ecosystem by adding support for an industrial strength, commercial quality Linux. MontaVista Linux is the first commercial Linux provider to be supported by Prism. The Prism Eclipse plug-in will be integrated into the MontaVista DevRocket integrated development environment (IDE), providing the most advanced embedded Linux development environment for multicore software on the market. MontaVista customers will now be able to quickly analyze the potential benefit of new, highperformance, multicore software platforms for their existing application code and develop new code and quickly tune it for operation on multicore processors, all within a single MontaVista DevRocket environment, and all in the familiar Eclipse framework. Prism is available today for ARM and MIPS cores with several other leading multicore processor architectures coming in Q1 2010.

RTC MAGAZINE JANUARY 2010

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SMALL FORM FACTOR

FORUM

Colin McCracken & Paul Rosenfeld

Have No Fear, Embedded World Is Here!

T

he arrival of winter reminds us to make our annual pilgrimage to Nuremberg, Germany to witness the latest small form factor product introductions at the Embedded World show during the first week of March. The Atom-ic age began here two years ago with small but mighty, low-power Qseven and CoreExpress modules. Yes, it’s time for SF3 to offer our fearless forecast about what’s hot and what’s not at the upcoming show. What to Expect? Easy—the usual barrage of announcements from the processor / chipset treadmill. Core this, Atom that, in 31 fun-form-factor flavors. Loyal, cast-of-thousands alliance partners will not dare disappoint their guru, lest they get handed a one-way ticket to the next lower alliance tier. Huddled in their vast shadow will be a lonely but brave all-in-one chip / board supplier with a new proprietary computer-on-module (COM) misnamed as an ITX motherboard. Things move fast here as if on the Autobahn. You won’t hear excuses of “there’s no ecosystem” in any language, as a means of justifying a lack of new products. Quite the contrary; it seems at times that any engineer who has not yet invented a proprietary form factor is not worth his or her salt. Along that vein, while it’s tempting to fall for the cutest ultra-small COMs, you probably should stick with mainstream, widely sourced components or risk getting stuck with an EOL flat tire a few kilometers down the road. Look for anxious North American board vendors walking the show trying to find out what they missed over the past couple of years while innovative new technology came first from Europe. You will recognize them by their jet-lagged expressions of shock and disbelief while inquiring (in English) in which hall the Biergarten is located… and muttering “what’s a COM?” between sips of a stein. You’d think the 15th century castles were located stateside, not the other way around. Some surprises await discriminating visitors in possession of press passes or armed with knowledge of the code names of unannounced but soon to be available processors and chipsets. Under tables or behind curtains lie valuable working prototypes and preliminary confidential datasheets, hidden since the early access board vendors aren’t allowed to publicly show their new

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wares until the official processor / chipset launch occurs. You may not find the parallel PCI bus proudly displayed anywhere. PCI Express solutions are requisite fare in Germany, and PCI devices (chips) are going EOL as Express replacements come on line. That train has left the Nuremburg station. Look for PCI Express switch chips used to extend the limited resources of the lowest power Atom Z-series platforms. As cost is often favored over low power in this COM-modity age, however, larger SBCs tend to favor the lower-cost Atom N-series designs without the need for bridges but at twice the power dissipation. As usual, be careful about designing baseboards that need more PCI Express lanes than are available in the chipsets, because not all vendors spring for switches on the modules. Watch for the usual “gotchas” in baseboard design—power sequencing, ACPI, power supply source impedance / current output ratings, and chipset behaviors that differ from one COM to the next, even those from the same vendor! If you believe that COMs built to loose standards are inter-operable, we have some waterfront property in Nevada to sell you. And don’t even think of asking about whether the next upgrade will just drop into the baseboard you’re about to spend 12 months designing. If you listen closely, you will hear the faint moans of the ISA vampires, which, as you recall, can’t be killed because they are already dead (and don’t have EOL chips on board). The most fearless forecast offered by SF3 is that the number of boards on display with PC/104 (ISA) connectors will continue to exceed those with PCI-104 (PCI, aka PC/104-Plus) connectors. These seems counterintuitive to desktop motherboard fans out there. But this is the embedded market, and PCI Express and COMs are the hares and PCI is the tortoise. And these hares ain’t sleepin’. We hold out hope that last month’s lambasting of I/O vendors will move them to heed the outcry for new industry leadership. The standards are written and the older technology is rapidly fading into EOL-land. The I/O and the corresponding software drive the application; CPU cores are commoditized. The time is now . . . It’s a bird… it’s a plane… no, it’s just another show week in Germany. Fasten your seat belts, and see you there!


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editor’s report Advancing Advanced Technology

Advancing Advances in Technology Sometimes taking a fresh look at “conventional wisdom,” no matter how advanced it is, can open even newer and more exciting possibilities.

by Tom Williams, Editor-in-Chief

T

wo innovative companies have different takes on what could be called “conventional advanced technologies”—graphics and wireless networks. Both highlight ways these slightly different approaches can potentially drive embedded technologies forward. They are Fluffy Spider technologies, with a unique approach to graphical user interfaces, and EnOcean, with a focused view on how to use wireless and wired networking in building management.

Decoupling UI and Application

The concept of an “autonomous” user interface is the brainchild of developers at the whimsically named company, Fluffy Spider Technologies. The idea behind an autonomous UI is to decouple the actual implementation and behavior of the screen presentation from the application code. Doing this has a number of implications for how a user interface can be designed, modified—even programmed—and expanded to suit the needs of users and new device capabilities without having to touch the underlying application code. For companies that are looking to offer a line or family of products, the ability to change and customize the graphic look and feel and even the behavior of the

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user experience can have a number of advantages—especially if it does not require modifying the actual application. Fluffy Spider’s latest effort is called FancyPants 3.0, which is a user interface that incorporates graphics and multimedia in such a way that it interacts with the application via an engine that lets the application developer specify the generic and abstract presentation of controls and widgets, the presentation of data and even content, but then lets the OEM or other downstream channel partners customize and brand the device for their own segments. This has a particular appeal because once the application code that has been exhaustively developed and tested has gone through the QA cycle, it can be left alone and need not be subjected to another run of QA simply because the user interface has been changed, because these changes do not affect the application code. FancyPants has at its heart an engine written in C that interacts with the application’s API and with the elements of the UI as well as with the Lua scripting language, which is used to specify the UI as well as to program its behavior at a high level. Lua is extensively used in the gaming world. Thus the programming of the presentation, the look and feel and the

behavior of the UI can take place independent of the application, which simply outputs and inputs to the UI engine. This decoupling not only allows customization, it also makes it possible for different applications running on different processors, different cores or in a virtualized environment on a single CPU to share the same physical display and to interact with each other. Not surprisingly, FancyPants has been found attractive by the cell phone and mobile device sector because these devices often use quite different processors, where one, for example, handles the most important tasks, which involve the actual communication connection. Another CPU would be running other applications on a smart mobile device. The different applications may need to interact, but there must be no compromise of the underlying communication. Using an autonomous user interface, such applications can share the same screen, but the data sent to the UI can also be used by the ability to program that UI to do interesting things. In Figure 1, there are two displays with a vastly different look and feel, but they are sitting on top of the exact same application. Also, the display on the right is showing additional information in the form of signal strength and battery life that might not be considered of interest to a user of the display on the left. Autonomy also opens the ability for the user experience to be enhanced with additional device capabilities, if they are added to an existing device, by way of operating system events. For example, if some mobile device comes out with additional hardware capabilities such as GPS, a compass or a thermometer, it is not necessary to modify the application to present that information to the user. The OS can present the data and the UI can be modified to present it. Naturally, if that data is to be used by the application in some new way, it will be necessary to go into the application code and modify it to do so. Nonetheless, different applications can achieve limited interaction via the UI. For example, the UI could be programmed to look for a given value from


editor’s report

one application and if it meets a condition, alert the user and present data from a different application that the user needs to know about. Alternatively, there can be different UI configurations to match the roles of individuals in operations that are based on devices that are actually running the same underlying application code. It would even be possible to bring up a detailed diagnostic or troubleshooting UI on a device that would only be meaningful to a technician but would be instantly available. The possibilities are vast. The freedom granted by decoupling the UI will also make it easier for thirdparty developers to create applications that can run on a device and share the same display, for different sales channels to customize and brand devices for their target customers. And eventually it could find use in all kinds of control and automation systems. In this incarnation, the Fluffy Spider FancyPants solution is unique and consists of the elements depicted in Figure 2. However, the idea of decoupling the UI from the application in such a way could easily catch on in other incarnations. The concept has definite potential in areas like SCADA systems where there are many devices and applications that need to present data and interact with the supervisor and are added and reconfigured constantly. Look for this idea to catch on.

Sensor Networks—Wireless and Wired

There is a great deal of activity these days in the area of wireless sensor networks. The Zigbee protocol is being widely adopted and some other proprietary mesh network protocols are cropping up in low-power sensors that are deployed in a vast number of applications such as agricultural and environmental monitoring, security, building management and more. Such wireless mesh networks eventually connect to larger nets based on TCP/IP and often on up to the Internet. At the level where sensor and actuator nodes are located in difficult and often remote places, the issue of power is paramount. No matter how long a battery may

Figure 1 Two FancyPants displays running on exactly the same underlying application with a completely different look and feel, with one displaying information not shown on the other—tailored to the perceived needs of the user. Embedded Applications FancyPants API FancyPants Graphics

FancyPants Media (optional)

FancyPants Canvas Server (optional)

New FancyPants Modules (optional)

FancyPants Operating System + Display Subsystem Abstraction Display Subsystem

Operating System Hardware

Figure 2 The FancyPants high-level architecture.

last, it eventually needs to be replaced. This can often involve expensive labor and unacceptable down times. One solution finding its way into the world of wireless sensor networks is energy harvesting—taking and storing small amounts of energy from the surroundings and using it to power the sensor nodes. The reason energy harvesting is practical at all lies in the commonly used duty cycles of the devices. Mostly, they are in sleep mode, waking only briefly to check for input and/or to transmit a very small packet of data. This allows small amounts of energy to trickle in over time and be used for the very short interval needed.

In the arena of building and facility management, there are unique conditions for which a German-based company, EnOcean—now expanding in the U.S.—is seeking to offer optimized solutions. In buildings, of course, there are tight and out-of-the way places where sensors, actuators and switches are needed. There are also convenient places where both line power and wired networking are available. The trick is to find the optimal mix to solve the facility management problem. EnOcean has its third generation of Dolphin wireless modules that either integrate with line power or can take advantage of energy harvesting and fit into a RTC MAGAZINE JANUARY 2010

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editor’s report

larger network to control a building. This requires not only sensors and switches to sense and decide and then to turn things on and off, it also requires line power to do things like open and close valves and control HVAC equipment. Finding the right mix is important. On the low-power wireless end, the Dolphin devices can make use of a variety of energy harvesting techniques to stay alive without battery power and to send the radio transmissions as needed. For example, the ECT 300 Perpetuum (Figure 3) is an energy harvester that uses a Peltier element that operates off of temperature differentials as small as a few degrees Kelvin. Depending on the actual differential, it can output about a milliwatt. A booster ups the voltage to about 3.5V, but at very low current. The output energy is stored on the device being powered in a capacitor to be available for use when the node wakes up and needs to transmit data. The data packets are very small, only 110 bytes and can be sent in under a millisecond. The user can adjust the duty cycle to determine how often to wake the device to either check for incoming messages or to transmit. A development kit is available to help analyze the power needs and set up the modules accordingly. Other types of energy harvesting devices are available including a motion converter with an induction coil that can con-

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vert energy from things like a button being pushed, a door being opened or vibration, depending on where it is installed. There are also solar cells available for places where they would be more appropriate. In order to help optimize the wake time (e.g., a device wakes up, finds no message, goes to sleep and ten milliseconds later there is a message sent) so data is not missed, EnOcean offers a line-powered Postmaster device that has mailboxes assigned to each module so that messages can be optimally received. This demonstrates EnOcean’s view that mesh networks are not mature enough for reliable operation and that there should be optimal connection between the wireless, low-power devices and the larger broadband network. According to EnOcean’s Eugene Yu, 99 percent of the applications get to the broadband network in one hop or use a repeater. This is why the Dolphin system does not use a mesh network, but endeavors to make a connection between the wireless

Figure 3 The EnOcean ECT 300 thermal energy harvesting device draws energy from temperature differentials.

device and the broadband network in one hop. This is also the reason that the Dolphin system uses lower frequencies than many other wireless sensor networks including Zigbee. Dolphin uses 868 MHz in Europe and 315 MHz in the U.S. because these lower frequencies are more able to penetrate walls, thus also reducing the need for multiple hops through a mesh. Fluffy Spider Technologies, Aptos, CA. (408) 916-1191. [www.fluffyspider.com]. EnOcean, Cottonwood Heights, UT. (801) 943-3215. [www.enocean.com].

11/11/09 3:45:15 PM


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ploration your goal k directly age, the source. ology, d products

Technology in

context

FPGAs—Is Bigger Always Better?

Low-Cost PCI Express-Compliant FPGAs Enable a Plethora of Peripherals Today’s FPGAs can act as a bridge between standard PCI Express links on embedded CPUs and specialized I/O for application-targeted embedded designs. Their flexibility and on-chip interfaces make them versatile components for fine-tuning the connectivity of embedded systems. by Greg Lara, Xilinx

F

PGAs play an important role in Optional embedded processing by enabling Display customized hardware for protocol bridging, signal processing acceleration LPIA Processor and real-time embedded control. Now, Sensors, Alarms Memory and I/O USB and Control Storage two independent trends in the electronics Depth industry are coming together to increase FPGA Distance USB SDIO w/RT-Ethernet ADC FPGA utility and enable a flexible, platSD Flash Temperature Security and FieldBus Pressure SPI form-based and scalable approach to emSPI Flash Sig Expansion LPIA bedded system design. Cond I2C Module Chipset SDRAM DDR nies providing solutions nowcontrol systems have been Memory RTC P/SATA Industrial Power AMT Buttons and GPIO Management ion into products, technologies and companies. Whether your goal is to research the latest SSD Flash shifting away from a programmable logic Keypads PCIe Indicator ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you Local Central controller (PLC) architecture toward LEDs you require for whatever type of technology, Device Monitoring platforms Interface Network and productsstandardized, you are searching general-purpose for. Legend based on industry-standard processor -------LAN Intel (802.3) 802.11 Sourced technology. One example of this trend toWixxx External ward processor-based control systems is UWB Source exemplified by the low-power Intel Atom Network processor and system controller hub chip Figure 1 set. The hub chip provides a memory controller, graphics controller and a number Typical Intel Atom processor platform uses a PCIe lane to connect to the FPGA in which specialized inputs have been implemented. of popular interfaces. It also facilitates easy I/O expansion via a pair of singlelane PCI Express ports. Meanwhile, ecosystem partners of the standard. In certain applications, within the ARM and MIPS communities for example, ARM processors are running have put a lot of effort into providing PCI some key applications for the sake of their Get Connected Express bridges and other IP to ensure power efficiency and the resulting longer with companies mentioned in this article. their platforms support the near ubiquity battery life alongside “WinTel”-based prowww.rtcmagazine.com/getconnected

End of Article

16

JANUARY 2010 RTC MAGAZINE

Get Connected with companies mentioned in this article.


technology in context

Programmable Logic

Figure 2

now delivering its performance, power and cost benefits in a wide range of nonPC applications. Supporting this trend are new low-cost FPGAs that provide built-in PCI Express-compliant interfaces with integrated serial transceivers and PCI Express endpoint blocks. The combination of embedded processors and FPGAs delivers a solution that is more flexible and scalable than the traditional CPU plus ASIC/ASSP model (Figure 1). PCI Express technology provides an ideal high-bandwidth link for connecting low-power processors to the latest low-cost FPGAs for creating specialized interfaces and custom peripherals. The flexible system architecture enables designers to implement optimum hardware/software partitioning for the best balance of performance, cost and power. The flexibility of FPGA hardware enables designers to break free from the confines of fixed functionality and to avoid the risk of component obsolescence.

Typical PCI Express Endpoint Implementation in Spartan-6 LXT FPGA.

Tying the System Together

Hardened IP LogiCORE Wrapper Block RAM (Tx)

Block RAM (Rx) Block RAM Interface

Transaction Layer Interface Physical Layer

GTP

Data Link Layer

User Application

Transaction Layer

PCIe Block

Configuration and Capabilities Module

Configuration Interface

Clock and Reset Interface

User Status

XPS-LL TEMAC

LocalLink TEMAC to DMA Bridge

GMII

GTP

PLBv46 Slave

1000BASE-X PCS PMA

Marvell PHY

User Space Registers

32-bit Streaming Interface

Xilinx IP

MIG User Interface

Virtual FIFO Layer

Third Party IP

Memory Controller Block

FPGA Logic

SDRAM

System to Card

DMA to TEMAC Bridge

PLBv46

MIG Wrapper

System to Card Card to System

32-bit Streaming Interface

DMA Register Interface

Card to System

32-bit Transaction Interface

x1 Endpoint Block for PCI Express v1.1 Wrapper for PCI Expres

x1 Link for PCI Express GTP Transceivers

User Data

PLBv46 Maser

RJ45

Control Plane Bridge

Target Interface

Integrated Blocks

Clock and Reset Block

SFP

Miscellaneous Logic

Packet DMA (32-bit)

Transceiver Interface

On SP605

Figure 3 PCI Express-to-Gigabit Ethernet Reference Design included in SP605 Connectivity Kit.

cessors. ARM has their Cortex-M3 32-bit processors, which have been specifically developed to provide a high-performance, low-cost platform for a broad range of applications including microcontrollers, automotive body systems, industrial control

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JANUARY 2010 RTC MAGAZINE

systems and wireless networking. Another trend is the rapid adoption of the PCI Express protocol, which was introduced by Intel in 2004 as the nextgeneration interconnect architecture for personal computers. The technology is

Packet-based serial communications technology was created for the telecommunications industry to facilitate highbandwidth, long-distance links. Variants provide high-speed box-to-box interconnection as well as board-to-board communication over backplanes. As FPGAs developed into indispensable elements of high-speed communications gear, the industry responded by integrating highspeed serial transceivers into high-end FPGAs, beginning with the Virtex-II FPGA family from Xilinx. Serial links with embedded clocking enable high-bandwidth chip-to-chip connectivity while reducing board complexity and power consumption and simplifying timing compared to busbased architectures. Until recently, serial I/O was seen as a complex technology used only in highend systems where performance requirements mandated the adoption of a new type of interconnect. Today, however, even mainstream electronic systems have performance requirements that justify the move to serial links. The FPGA industry is enabling this transition by integrating serial transceivers into low-cost FPGA families. Intel introduced PCI Express tech-


technology in context

nology in 2004 to address the requirement for higher bandwidth in the PC architecture while overcoming the limitations of a shared bus architecture, such as skew and bus contention, by implementing a pointto-point interconnect scheme using serial links. The PCI Express base specification v1.1 defines a 2.5 Gbit/s line rate. Factoring in the standard’s 8b10b coding scheme yields a theoretical maximum data rate of 2.0 Gbit/s (250 Mbyte/s). The standard enables multi-lane links for applications that require higher bandwidth, and subsequent revisions of the standard further increase bandwidth with line rates of 5.0 Gbit/s (base specification 2.0) and even 8 Gbit/s (base specification v3.0). However, a single lane PCI Express rev.v1.1 provides sufficient bandwidth for embedded system requirements with modest power consumption. The benefits of high bandwidth and small form factor make PCI Express technology a natural choice for FPGA-to-processor communication in an embedded system. Further reductions in cost, power and form factor can be delivered by integrating PCI Express technology into the FPGA base silicon. A new class of low-cost FPGAs delivers those benefits by integrating serial transceivers, PCI Express endpoint blocks and additional functionality to provide built-in PCI Express connectivity. These additions further increase system integration and provide an attractive solution for building customized peripheral solutions for embedded processing systems. Applications include connectivity where PCI Express-enabled FPGAs provide a flexible infrastructure for connecting to enterprise networks and implementing industrial control networks with real-time Ethernet protocols such as Profinet, EtherCAT, GigE Vision and SERCOSIII. In addition, FPGAs can implement hardware accelerators that offload complex algorithms such as PID for field-oriented control for driving motors. FPGAs also facilitate the integration of functions where they can enable more intelligence and efficiency in complex peripherals. Their flexible I/O structures support the integration of multiple sensors, and the parallelism inherent in their architecture enables efficient pre-processing

sensor data. One example is image processing in machine vision systems. Building reliable serial links requires some special skills that might not yet be part of the mainstream designer’s repertoire.

Integration Is Key

Requirements for implementing a PCI Express endpoint include serial transceivers plus logic to complete the physical layer, additional logic for implementing the data link layer and transaction layer, as well as memory for buffering transactions. Until recently, integrated serial transceivers were available only in the most expensive high-end FPGAs. However, the latest low-cost FPGA families now offer capabilities, capacity and performance that were once the exclusive domain of high-end FPGAs, including support for serial protocols via built-in multigigabit transceivers. These new devices enable designers to implement complex peripheral functions including hardware accelerators and offload engines with efficient high-bandwidth connection to the host processor via PCI Express links.

Soft IP cores provide a convenient solution for building PCI Express endpoints in FPGAs with integrated transceivers. An even better approach is to integrate PCI Express endpoint functionality into the FPGA silicon. A silicon-integrated endpoint reduces cost and power because it consumes fewer transistors than the equivalent function implemented in the programmable fabric. This leaves more of the logic fabric for designers to use for implementing complex functions more costeffectively. Once the exclusive domain of high-end FPGAs, the benefits of built-in PCI Express connectivity are available in the latest generation of low-cost FPGAs now as well. While silicon-integrated endpoint blocks are considered to be “hard” IP cores, they still offer significant flexibility via user-configurable parameters like maximum payload size, reference clock frequency, base address register decoding and filtering, and more. Development tools generate files necessary to complete the endpoint design by setting the configurable capabilities to the desired settings,

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technology in context

setting up the required clocking resources and memory buffers, and establishing the interface to the application-specific portion of the endpoint function.

Solutions for Creating Custom Peripherals

Software developers have long enjoyed the benefits of development platforms offered by processor vendors; now targeted development platforms are help-

ing FPGA developers with similar benefits. This platform approach makes it easy for designers to develop custom peripherals for embedded systems by combining advanced silicon, development tools, key IP and expandable evaluation boards. Targeted reference designs tie all these elements together to create a starting point from which designers can rapidly create customized systems. The low-cost Spartan-6 LXT family

from Xilinx provides built-in PCI Express connectivity along with the resources that enable power-efficient capabilities for creating CPU offload engines for timecritical processing tasks and custom hardware accelerators for compute-intensive functions (Figure 2). These devices incorporate low-power GTP transceivers and a silicon-integrated PCI Express endpoint block to provide one lane (x1) of Gen 1 connectivity. The endpoint block frees up 7,000 logic cells of capacity compared to a soft IP implementation. Xilinx has verified Spartan-6 LXT FPGA compliance to the electrical and interoperability requirements of the v1.1 base specification at compliance workshops hosted by the PCI Special Interest Group (PCI-SIG), the organization that created and shepherds the specification. As a result of passing those testing procedures, Spartan-6 LXT FPGAs and the related SP605 evaluation board are included in the PCI Express Integrators List.

Development Tools

The ISE Design Tool Suite simplifies the designer’s task by automatically generating customized LogiCORE IP for configuring the PCI Express endpoint interface. The CORE Generator tool provides a graphical user interface (GUI) to guide you through the process of setting key endpoint parameters, including the configurable parameters of the GTP transceivers and the PCI Express endpoint block, Block RAM for the necessary buffers, and clocking resources. It also integrates the interface with the applicationspecific portion of a PCI Express endpoint design (Figure 3). The ChipScope Pro Serial I/O Tool Kit provides the ability to evaluate link performance and fine-tune the adjustable EQ settings of the GTP transceiver. To facilitate system development, evaluation boards include a PCI Express edge connector that makes it easy to exercise the FPGA’s capabilities within a standard PC platform and then to begin creating your own design. To make it easy to expand the evaluation board with specialized connectors or additional circuitry, one FPGA Mezzanine Card (FMC) connector accepts daughter cards from Xilinx and third-party suppliers.

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technology in context

Targeted reference designs bring together all the elements designers need to quickly evaluate the capabilities of FPGA silicon and provide a convenient starting point for crafting a custom solution. The connectivity targeted reference designs address the requirements for building and verifying reliable serial links by providing source codes, implementation scripts, any software required to run the reference design (i.e., drivers, API, and GUI), and documentation. The connectivity targeted reference design is a fully operational bridge between the Gigabit Ethernet and PCI Express protocols, providing an efficient platform for evaluating the key integrated components in a Spartan-6 LXT FPGA (Figure 3). These include GTP transceivers, an integrated endpoint block for PCI Express and a memory controller block supporting DDR/DDR2/DDR3 SDRAMs and LPDDR. The connectivity targeted reference design also integrates a number of additional IP cores, including a Bus Mastering Packet DMA engine from Xilinx Alliance Program member Northwest Logic and the platform studio local link tri-mode Ethernet MAC (XPS-LL-TEMAC). The DMA engine works in conjunction with the integrated endpoint block for PCI Express to offload processor data transfer overhead, and enables high-speed data movement between the system memory and the FPGA. The PCI Express endpoint block provides an interface to the host system while the Gigabit Ethernet connection implements a network interface card. To make it easy to design PCI Express-enabled peripherals, Xilinx combines all of these elements in the Spartan-6 FPGA Connectivity Kit. Each kit comes preconfigured with the Spartan-6 FPGA connectivity targeted reference design loaded and verified on a Xilinx SP605 development board (populated with the Spartan-6 LX45T FPGA). The kit also includes the complete ISE Design Suite: Embedded Edition, device driver files, design source files and board design files. A key element of the kit is a full production license of the Northwest Logic packet DMA engine that enables efficient use of system memory multi-gigabit serial transceiver speed. All the necessary

software and files are loaded on a USB memory stick along with printed versions of the Hardware Setup Guide and the Getting Started Guide. This enables designers to bring their systems up quickly, begin evaluation, and start extending the design to build their application. In addition to kits from Xilinx, Avnet also offers a solution for building customized FPGA interfaces and developing embedded Windows software for systems comprising the

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Atom processor chip and Spartan-6 LXT FPGAs. Xilinx, San Jose, CA. (408) 559-7778. [www.xilinx.com]. Avnet, Phoenix, AZ. (480) 643-2000. [www.avnet.com].

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Technology

connected Wireless Data Acquisition

Low-Power Wireless Data Acquisition Brings Flexibility and Low Maintenance With the advent of low-power, low-cost CMOS-based radios and efficient protocols, data acquisition tasks that have traditionally employed analog or serial wired connections can now be implemented wirelessly. by Daniel M. Dobkin and Lew Adams, GainSpan

I

nstalling sensors for data acquisition has traditionally been a labor-intensive process, involving analog or network wiring from sensor locations to aggregation points. The high cost of installation, maintenance and configuration changes limits the use of such sensors to high-value applications. Recent progress in wireless technology has made it possible to replace these older wired networks with wireless sensor nodes. In wireless sensor networks, installation labor is limited to the placement of the sensors themselves; node configuration is largely automated and can be managed from a remote network server. Maintenance may consist only of battery replacement once every few years, in the case of battery-powered sensors. Sensors using energy harvesting techniques may require no scheduled maintenance at all. To implement such networks requires physically small, energy-efficient, computationally capable wireless devices. Today, such devices can be implemented at low cost using advanced System-on-Chip (SoC) designs, in which advanced microprocessors, SRAM and non-volatile memory, local data interfaces and fully capable wireless

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Antenna SPI/GPIO

SPI

UART/GPIO

UART

ADC

ADC

I2C/GPIO

I 2C

PWM/GPIO

PWM

GPIO

GPIO

JTAG

JTAG

Application Processor

Power Amplifier WLAN Transceiver 802.11

Optional External Power Amp PADAC RF Switch 44 MHz XTAL

ARM7 CPU

WLAN MAC ARM7 CPU

Power Control Wake UP

SRAM

Flash

RTC/ Power Mgmt

32 or 131 KHz XTAL

Figure 1 GS1011 SoC block diagram.

modems are combined on a CMOS chip. A complete sensor node can be constructed from the SoC, with the addition of the sensor itself, a battery or other power source, an antenna, and in some cases an optional RF power amplifier. As with any system based on digital communications, a protocol is required for such wireless nodes to communicate with back-end devices so that the data can

be collected and accessed. Today’s wireless sensor designs use both proprietary and standardized communications protocols. Popular choices for this purpose include IEEE 802.11, often referred to as Wi-Fi, and IEEE 802.15.4, often referred to as Zigbee, though that term should properly be reserved for the Zigbee adhoc networking layer that operates over the 802.15.4 physical and link layers.


technology connected

Sensor Network Design and Architecture

Wireless links are more flexible but more complicated than wires. The ability of two devices to communicate depends on a number of factors: • signal power sent by the transmitter • carrier frequency • signal power required at the receiver for reliable decoding • distance between transmitter and receiver • antennas and antenna configuration • the nature of any objects or obstructions in the signal path • interfering transmissions from collocated wireless devices • required instantaneous and average data rates • communications protocols in use For example, the GS1011 SoC CMOS transmitter (Figure 1) can deliver about 9 mW (9 dBm) of output power in the 2.4 GHz ISM band. In an outdoor line-ofsight environment with a moderate-gain receive antenna, this signal power is sufficient to maintain reliable links at distances of hundreds of meters. In a typical indoor environment, range is extremely dependent on the placement of the node and receiving antenna, and the exact layout of the building walls and interior objects: the same setup that yields a range of 300 meters outdoors may be limited to 30 meters indoors. The expected range determines how far sensor links can be from an aggregation device, such as an access point (Wi-Fi) or full-function device (802.15.4). Wi-Fi devices operate at 2.4 GHz. The 802.15.4 protocol allows for operation in the 868 and 915 MHz bands. Lower frequencies suffer less from absorption and

Start Join Process

Start Network Configuration YES

Active Scan? NO Listen for Beacons classic authentication

Open

Send Probe Request

Send DHCP Discover

LIsten for Beacons/Probe Responses

Get DHCP Offer Send DHCP Request

WEP

Get DHCP ACK for node IP

Request Association association

Broadcast ARP, node IP

Receive AID assignment RSNA authentication

WPA-PSK

WPA2-PSK

Gratuitous ARP, node IP

EAPOL

Transition to Power Save

NULL packet (PS mode)

Network Join Done 802.11

TCP/IP

Figure 2 Joining an IP-over-wireless network.

BSS

node

Data Server

node

Internet node

BSS

Access Point

Router

Local network

node

Config Server

Access Point

node

node

node

Figure 3 Sensor networks form Basic Service Sets (BSS) within an overall IP network.

RTC MAGAZINE JANUARY 2010

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technology connected

Insert battery

Operating Loop Warm boot: • DC converter on • high-frequency clock on • restore state info

Cold boot: • start low-power oscillator • (delay) DC converter on • high-frequency clock on • run boot code • start WFW, initialize configuration

wake-up timer or alarm input

Standby: • low-power oscillator runs • wakeup counters active • alarm pins active • RTC RAM preserved

Prepare for Standby: • schedule next wakeup • state info to RTC RAM respond to wakeup cause

Configuration: • send ConfigUpdate trap • get config cmds until: • 2 seconds OR • Config Complete

User Application: • wake sensors • take sample • process data • send packet • schedule next run

if needed: join a network • scan for SSID • associate • authenticate sucess: • join IP network (DHCP/ARP) loop

Linkup: • send LinkUp trap

Figure 4 Sensor node operational sequence.

diffraction by obstacles, but have correspondingly less bandwidth available for use. It is also more difficult to fabricate efficient small antennas when the wavelength of transmission increases. Interfering transmissions on the same or nearby bands may also limit the ability of a sensor node to communicate. Most interferers are time-dependent, so protocol adaptation may be used to communicate successfully in spite of interference. For example, the 802.11 protocol uses a carriersense multiple access with collision avoidance (CSMA-CA) approach. The modem tracks other received Wi-Fi transmissions and postpones initiating a transmission until it is expected that other stations have completed their messages, using the network allocation vector (NAV) contained in each packet. When the medium is believed to be clear, the node attempts to send a packet; if it does not receive an acknowledgement (ACK) from the destination, typically an access point, it waits a random backoff time

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JANUARY 2010 RTC MAGAZINE

and tries again. Wi-Fi can provide robust communications, except at very high traffic levels, and requires no central coordination or reservation system. The required average data rate determines how many sensor devices can be assigned to a single aggregation point. For many sensor network applications, average data rate is very low: for example, in many temperature-sensing applications a packet might only be sent every few minutes. This permits a large number of nodes to share a single aggregation device. On the other hand, the instantaneous data rate determines the actual transmit time needed to send a given amount of data. Typical sensor node packets are short: tens to a few hundred bytes. At data rates of hundreds to a few million bytes/second, the actual transmit time for a packet is a few tens of milliseconds. The duty cycle of the node is thus often much less than 1%. In order to operate efficiently, the node must be capable of using very little power when it is not ac-

tive, and rapidly enter an active state where it can send and receive messages. For example, in low-power applications, the GS1011 spends most of its time in an ultra-low-power standby state, with total power dissipation of around 10-15 microwatts. When a timer expiration or alarm input signals the need for an action, the processors are powered up and memory state restored in about 10 milliseconds, after which a measurement can be made or a transmission initiated. The SoC also supports a variety of clock-gate and sleep states, which allow power consumption to be minimized while still providing sub-microsecond latency.

Network and Node Configuration

In order to actually send data to a remote server, network configuration is required. In traditional analog sensor applications, configuration was performed manually, by wiring a given sensor to a known measurement port and manually recording the association. Modern wire-


technology connected

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power

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finish applications

10’s of mW 10 mW

• 4 front Giga ports (copper or ber) • 2 front 10 Gigabit Ethernet ports • 20 rear Gigabit Ethernet ports

save state

> 100 mW

Bit rs 10eG t Route

standby 5µW

Etheicrmng 2.16 & VPX

time

P

Figure 5 Sensor wakeup sequence with approximate power consumption. CCA = clearchannel assessment. Total time is on the order of 10 milliseconds.

less networks support self-registration and automated configuration. The process of joining a Wi-Fi-based network is summarized in Figure 2. The node must first discover what suitable networks can be heard. In 802.11, access points send special beacon packets at regular intervals, containing the information required by a Station that wishes to associate with their network. A Station can also send a probe request, which will cause any access point that receives it to send a reply with the needed information. The node must then request an association, with optional authentication. Note that authentication may be required as a result of network policies, even when the data sent by the nodes is not in itself proprietary. The authentication process also often involves exchange of information required to provide physical-layer security through encryption. Association alone allows only local communications within layer 2 of the OSI communications protocol reference model. An additional network configuration process is needed to support widearea or global communications (Figure 3). Wi-Fi-based nodes are capable of standard IP networking. A node undergoes

a conventional DHCP Discover process and message exchange, leading to the assignment of a locally or globally unique IP address. Once network configuration is complete, the node can communicate with a data server located in any reachable network segment, allowing a flexible network architecture not constrained by the physical sensor configuration. Network joining operations are relatively energy-intensive, but in most cases will occur only once or at long intervals, and thus do not materially shorten operating life. Once a node has joined the network, it can enter a low-power state from which it can awaken to send data and perform other operations. An example sequence is depicted in Figure 4. After power is applied and network joining operations are completed, the node enters a loop in which most of its time is spent in standby. The RTC block provides an always-on timer function that can be used for scheduled wakeup; alarm inputs can also initiate asynchronous bootup. A flexible sensor network should support changes in node configuration, but a network with a large number of low-cost nodes does not allow for practical manual configu-

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technology connected

ration. Remote management capabilities are therefore indispensable. In order to support remote configuration without excessive energy use, nodes can periodically waken and notify a configuration server that they are

ready for management messages. For example, if the Simple Network Management Protocol (SNMP) is used, nodes can send unsolicited trap messages to a configuration server; the server can respond with Set and

Get commands if a configuration operation is pending. Since reconfiguration is likely to be an infrequent event in most working installations, the time period between configuration operations can be hours or days, minimizing the average power devoted to node management while providing acceptable latency. It may also be necessary to send messages to maintain a network connection. In 802.11, access points may disassociate a station if they have not heard from it for some time; this behavior is not defined by the 802.11 standard, and varies from one commercial access point to another. DHCP leases may also terminate if not renewed. If data transmissions are not sufficiently frequent, the node may need to send linkup or heartbeat messages whose purpose is simply to maintain link and network connectivity.

Powering Sensor Nodes

Sensor nodes operating as described above use very little average power. For example, in the Standby state, a GS1011 SoC consumes about 15 microwatts. A typical AA Lithium battery can supply about 26,000 joules. If the remainder of the components constituting a node based on the SoC are turned off in standby, that’s enough to power the node in standby for about

Current batteries won’t last that long even with no load! If Standby power is low enough, energy consumption is dominated by wakeup events even when they are infrequent. A typical sensor wakeup is depicted schematically in Figure 5. The sensor spends a few milliseconds stabilizing the clock oscillator and booting up the firmware, at relatively lower power consumption. This is the stage where sensor data may be acquired or forwarded from offchip storage. Once the packet is assembled, the radio is turned on. The receiver first listens to see if any other device is

26

Untitled-5 1

JANUARY 2010 RTC MAGAZINE

2/17/09 4:47:07 PM


technology connected

transmitting—clear-channel assessment (CCA). If the channel appears vacant, a packet is sent. The radio may remain on for a short time to receive an ACK packet from the access point. After successful ACK, state information can be saved and an orderly return to Standby conducted. The whole process takes 10-20 milliseconds and consumes around 1-5 millijoules. Even using the worst-case values, a battery can support about

which is 10 years at 1 wakeup per minute. While achievable lifetimes are shorter than this due to battery leakage, power consumed by the actual sensor hardware, and other operations such as linkup and configuration messages, years of operation can be achieved from a battery. In some applications, battery cost may be prohibitive, or maintenance even at intervals of years may not be acceptable. Harvesting energy from the environment may be sufficient to power a sensor node, but applicability of this approach is highly sensitive to the specific environment in which the sensor is to be placed. In a lighted indoor environment, a 1 cm2 photovoltaic cell can produce about 10-30 microwatts. This is insufficient to support transmit power on an instantaneous basis; the energy must be stored in an ultracapacitor or other device. A cell of around 10 square centimeters area can support a transmission every few minutes when the ambient is lit. Outdoor sunlight can provide 10 times more energy. Mechanical energy can be substantial when vibration is continuous; harvested energy levels on the order of 1 milliwatt are achievable. Peltier effect elements (basically a thermocouple) can be employed to obtain energy from temperature differences—for example, if cold and hot process piping are located close to one another. Output voltages are very low and DC-DC boost is needed to produce volt-

ages sufficient for standard CMOS operation. Specialized devices with ultra-lowpower consumption have been developed for operation with harvested energy, but at the cost of simplified link-layer operation that sacrifices standard networking protocols. Wireless sensor networks can be readily constructed using commercially available components and standardized link and network protocols. Wireless link ranges of tens to hundreds of meters can be achieved depending on the environment and sensor configuration. Operation over standard networks allows the data architectures to be independent of the physical sensor arrangement. Sensor nodes can operate for years from a conventional AA battery; energy harvesting techniques can be substituted for battery power in some applications. GainSpan San Jose, CA. (408) 454-6630. [www.GainSpan.com].

RTC MAGAZINE JANUARY 2010

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technology in

systems

Programmable Automation Controllers

Programmable Automation Controllers Bring Together the Best of PLCs and PCs In a single compact controller, PACs offer many of the advanced control features, network connectivity, device interoperability and enterprise data integration capabilities found in most PLC- and PC-based automation controllers. by David Crump & David Hill, Opto22

I

mplementing a modern industrial application can present a challenging and sometimes daunting mix of requirements. For example, it is well understood that a typical control system must interface with signals from simple sensors and actuators. Yet for many modern applications this is merely the starting point. Advanced control features, network connectivity, device interoperability and enterprise data integration are all capabilities increasingly demanded in a modern industrial application. These modern requirements extend far beyond the traditional discretelogic-based control of input/output (I/O) signals handled by a programmable logic controller (PLC). Most PLCs are programmed using ladder logic, which has its origins in the wiring diagrams used to describe the layout and connections of discrete physical relays and timers in a control system. Applications that diverge from or expand beyond this model become increasingly hard to program in ladder logic. For example, mathematically complex applications such as proportional-integral-derivative (PID) loops used for temperature

28

JANUARY 2010 RTC MAGAZINE

control involve floating-point arithmetic. To perform these calculations, PLCs must often be enhanced with separate—and separately programmed—hardware cards. Using a PLC to meet modern application requirements for network connectivity, device interoperability and enterprise data integration presents other challenges. These types of tasks are usually more suited to the capabilities of a computer (PC). To provide these capabilities in a PLC-based application, additional processors, network gateways or converters, “middleware” software running on a separate PC, and special software for enterprise systems must often be integrated into the system. On the other hand, a PC packaged for industrial environments can provide many of the capabilities sought in modern applications, particularly those needed for networking and data communication. However, just as it is necessary to augment a PLC to accomplish PC-like tasks, an industrial PC that needs to perform PLC-like tasks, such as machine or process control, also requires expansion. For example, a PC may be using an operating

Figure 1 The Opto22 Snap Pac system is an example of a modular, integrated system of hardware and software for industrial control, remote monitoring and data acquisition applications.

system that is not optimized for high-performance and deterministic industrial applications. Additional I/O expansion cards or special extensions may need to be integrated into the PC’s operating system to provide the high-performance, deterministic or near-deterministic operation.

Introducing the PAC

Automation manufacturers have responded to the modern industrial appli-


technology in systems

cation’s increased scope of requirements with industrial control devices that blend the advantages of PLC-style deterministic machine or process control with the flexible configuration and enterprise integration strengths of PC-based systems. Such a device has been termed a programmable automation controller, or PAC. While the idea of combining PLC and PC-based technologies for industrial control has been attempted previously, it has usually only been done through the “add-on” type of approach described earlier, where additional middleware, processors, or both are used in conjunction with one or more PLCs. A PAC, however, has the broader capabilities needed built into its design. For example, to perform advanced functions like counting, latching, PID loop control and data acquisition and delivery, a typical PLC-based control system requires additional, and often expensive, processing hardware. Many PACs have these capabilities built in. PACs are also notable for their modular design and construction, as well as the use of open architectures to provide expandability and interconnection with other devices and business systems. In particular, PACs are marked both by efficient processing and I/O scanning, and by the variety of ways in which they can integrate with enterprise business systems.

Characteristics of a PAC

Most agree that industrial analyst ARC Advisory Group created the term “PAC.” ARC coined the term for two reasons: to help automation hardware users better define their application needs, and to give automation hardware vendors a term to more clearly communicate the capabilities of their products (Figure 1). According to ARC, a programmable automation controller must fulfill the following requirements: • Operate using a single platform in multiple domains, including logic,

Communication

Motion Control

Process Control

Sequential Control

Figure 2 PACs are flexible, multidisciplinary devices suitable for many types of industrial control.

motion, drives and process control. • Employ a single development platform using common tagging and a single database for development tasks across a range of disciplines. • Tightly integrate controller hardware and software. • Be programmable using software tools that can design control programs to support a process that “flows” across several machines or units. • Operate on open, modular architectures that mirror industry applications, from machine layouts in factories to unit operation in process plants. • Employ de facto standards for net-

work interfaces, languages and protocols, allowing data exchange as part of networked multi-vendor systems. • Provide efficient processing and I/O scanning.

Development and Functional Benefits of a PAC

The characteristics that define a PAC also describe the key advantages of deploying a PAC in an industrial application. These advantages include being able to independently meet the complex requirements that PLCs require extra components to do, and improved control system performance due to tightly integrated hardware and software. RTC MAGAZINE JANUARY 2010

29


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Technology In Systems

The integrated hardware and software also provides advantages when programming. The integrated development environment (IDE) used to program a PAC includes a single tagname database shared by all development tools. PACs use one software package to address existing and future automation needs, instead of multiple software packages and utilities from various vendors. Another benefit is the ease with

which PAC-based control systems can be upgraded. Modular processor hardware can be replaced without having to rip out existing sensor and actuator wiring. Plus, due to their compact size, PACs are able to conserve valuable cabinet space (Figure 2). Additionally, with their modern networking and communication capabilities, PACs make production information available in or near real time. This in turn makes the data collected more accurate

and timely, and thus more valuable for business use. PACs offer multiple financial advantages. The overall cost of the control system is lowered because hardware is less expensive, and less development and integration time is required. Purchasing a PAC is often more affordable than augmenting a PLC to give it similar capabilities. There is also a lower total cost of ownership due to PACs adaptability to a broader range of applications.

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716 Series Conduction Cooled ATR Enclosures

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LiPPERT Embedded Computers Inc. 5555 Glenridge Connector, Suite 200, Atlanta, GA 30342 Phone (404) 459 2870 · Fax (404) 459 2871 ussales@lippertembedded.com · www.lippertembedded.com


Technology In Systems

SCADA

PID loops

SQL database

Process control

Motion control

RFID OPC clients

PAC Discrete control

Operator interface Humanmachine interface

Figure 3 Modern industrial applications often include multiple tasks requiring I/O point monitoring and control, data exchange via OPC, and integration of factory data with enterprise systems.

The single PAC in Figure 3 is operating in multiple domains to monitor and manage a production line, a chemical process, a test bench and shipping activities. To do so, the PAC must simultaneously manage analog values such as temperatures and pressures; digital on/off states for valves, switches and indicators; and serial data from inventory tracking and test equipment. At the same time, the PAC is exchanging data with an OLE for Process Control (OPC) server, an operator interface and a SQL (Structured Query Language) database. Simultaneously handling these tasks without need for additional processors, gateways, or middleware is a hallmark of a PAC. In the factory example in Figure 3, the PAC, operator and office workstations, testing equipment, production line and process sensors and actuators, and barcode reader are connected to a standard 10/100 Mbit/s Ethernet network installed throughout the facility. In some instances, devices without built-in Ethernet connectivity, such as temperature sensors, are

34

JANUARY 2010 RTC MAGAZINE

connected to I/O modules on an intermediate Ethernet-enabled I/O unit, which in turn communicates with the PAC. Using this Ethernet network, the PAC communicates with remote racks of I/O modules to read/write analog, digital and serial signals. The network also links the PAC with an OPC server, an operator interface and a SQL database. A wireless segment is part of the network, so the PAC can also communicate with mobile assets like the forklift and temporary operator workstation. The PAC can control, monitor and exchange data with this wide variety of devices and systems because it uses the same standard network technologies and protocols that they use. This example includes wired and wireless Ethernet networks, Internet Protocol (IP) network transport, OPC and SQL. In another control situation, common application-level protocols such as Modbus, SNMP (Simple Network Management Protocol) and PPP (point-to-point protocol) over a modem could be required. The PAC has the ability to meet these diverse communication requirements.

In the factory example, the PAC exchanges manufacturing, production and inventory data with an enterprise SQL database. This database in turn shares data with several key business systems, including an enterprise resource planning (ERP) system, operational equipment effectiveness (OEE) system and supply chain management (SCM) system. Because data from the factory floor is constantly and automatically updated by the PAC, timely and valuable information is continually available for all business systems. A variety of industrial automation vendors now offer PAC or PAC-like products. In some cases, the product is more PLC-like, while in other cases the offering is more like an industrial PC. As described earlier, PACs integrate capabilities from both of these devices, so a device that emphasizes PLC or PC capabilities may or may not fit the application requirements. As with any product, some vendors have been in the game longer than others. While many vendors have recently introduced their new PAC or PAC-like offerings, a select few companies have demonstrated a successful track record of providing PAC functionality several years before the term “PAC� entered the mainstream. Opto22 Temecula, CA. (951) 695-3000. [www.opto22.com].


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technology in

systems

From Energy Visibility to Energy Savings in Commercial and Industrial Buildings Continuous monitoring of energy and environmental conditions with easily deployed IP-based wireless sensors can lead to sustained cost reduction.

by Malay Thaker, Arch Rock

M

ost of the claims made about the value of energy visibility in realizing energy reductions are based on studies of consumer behavior in residential buildings. Are these claims equally applicable in commercial and industrial buildings? How exactly does seeing energy usage data lead to energy savings? Does it take a qualified energy engineer to find the waste? Commercially available wireless energy monitoring systems can help building managers and process engineers identify and quantify energy savings opportunities in commercial buildings. A California company that manufactures board-level electronics spends $260,000 per year on electric power at its 45,000-square-foot facility. A 300,000-square-foot office building in the same area spends $140,000 annually on lighting alone. The local utility has just announced plans to increase electricity rates by five percent. This presents multiple challenges for the CFO, the facility manager or the process engineer. On one hand, they need to maintain critical facilities such as production lines with high availability and efficiency, as well

36

JANUARY 2010 RTC MAGAZINE

Figure 1 Wireless electric sub-meters installed in the building’s electrical room.

as a productive working environment. On the other, they must reduce energy use or stretch existing budgets farther without putting the services at risk. Where do they start? Utility bills show only the total usage per building per month. Energy audits provide a snapshot upon which to take action, but the resulting reductions and savings rapidly de-

grade without continuous monitoring at a detailed level.

Wireless Sensor Networks

Not surprisingly, embedded technology can help. The starting point for gaining detailed and real-time energy visibility on a building is an Internet-connected wireless sensor network (WSN) of “Smart


technology in systems

Figure 2 Examining the components and usage patterns of an office building’s lighting loads. Top: weekly profile of total lighting electric load. Middle: component loads over the same time period, showing wide variation by circuit as well as by time of the day and week. Bottom: Zooming in to the daily usage pattern for all lighting loads.

Objects”—circuit-level electric sub-meters, temperature, humidity, light or waterflow sensors in each facility, coupled with a Web-based portal for data aggregation, analysis and action. Qualified electricians can instrument a large building with wireless electric sub-

meters at key points within a day or two. The non-intrusive devices can be installed without requiring new communications wiring or de-energizing of the circuits, and are capable of measuring up to 600 volts and 6000 amp circuits in “Y” or “Delta” configurations. Figure 1 shows

an example deployment. Once installed, the wireless mesh network of sensors and sub-meters forms immediately and begins reporting data to the Web portal via an IP router. Starting from the one-line diagram of the facility’s electrical distribution, the user can pursue a strategy of installing sub-meters on each of the major expected loads: lighting, HVAC, manufacturing lines, IT rooms, etc. Another strategy may be to start with the known largest load in the building, such as HVAC and lighting. The data gathered after one week from measuring the lighting loads in a large office building may look something like Figure 2. Several insights can be gained from this weekly data. From the top graph, we can gather that there are five well-defined plateaus of lighting, consistent with the office building being occupied for the five workdays per week. The weekend lighting load is about 25 percent of that on the weekdays, indicating that some energysaving measures may already have been implemented. Can even greater savings be realized? The middle graph breaks down the total lighting load into its components, revealing substantial variation in the individual loads. Some of those loads have a substantial weekend component. The largest of these comes on at 6:00 p.m. and uses 25 kW for 12 hours on Saturday and on Sunday. This accounts for 600 kWh each weekend and 31 MWh annually, representing more than $3,100 per year in cost from this one circuit alone. If this turns out to be parking-area lighting, it can potentially be eliminated, or at least dramatically reduced, by closing off the parking areas to weekend use. Observing how this same load behaves during the work week is also revealing. A sharp peak seems to occur each workday at 6:00 a.m., and another at 6:00 p.m., each for less than 30 minutes. Where are the peak demands coming from, and can they be contributing to the company’s peak demand charges? The bottom graph of Figure 2 lets us continue the examination of the lighting RTC MAGAZINE JANUARY 2010

37


Technology In Systems

loads by zooming into the detail over the 24 hours of a weekday. In addition to the demand peaks already noted in two of the loads, this graph shows that the remaining loads are nearly constant for 18 hours out of 24, using anywhere from 20 kW to 45 kW. If these are indoor lights, setting the timers more selectively or with an investment in motion detection switches can better optimize their use. For example, the data shows that adjusting the timers to turn the lights on at 7:00 a.m. and off at 9:00 p.m. could save an average of 700 kWh per weekday or 180 MWh and $18,000 annually. These very simple examples of possible savings measures based on an examination of energy usage data have added up to $21,000 for the year, or a 17 percent reduction on the lighting cost alone. Even modest gains from the other loads, such as HVAC adjustments or time-shifting of heavy electric loads, could easily push the savings to more than 25 percent, making the monitoring instrumentation pay for itself in less than one year.

attributable to the “other” loads. The factory is currently instrumented to break out HVAC, lighting and the three production lines. All remaining loads—IT, plug loads, etc.—are lumped together in “other.” A closer look at these loads is warranted, possibly with additional sub-metering. The top panel provides further macrolevel insights, such as that the HVAC, lighting and “other” loads together ac-

count for a much higher percentage of total energy use than the production lines themselves. This would indicate that initial savings efforts should be focused on the former loads. The middle graph in Figure 3 shows energy use during the last month of the year. The graph confirms that the factory operates seven days a week, but average energy use during the weekends is 15 per-

Analyzing Industrial Installations

Another useful example is provided by an electronics manufacturing facility with multiple assembly lines, each consisting of a pick-and-place “chip-shooter” machine, a wave-soldering machine, a reflow-soldering machine and other associated machinery. Figure 3 shows some insights to be gained by instrumenting this building. The top graph reveals the macro trends in the factory’s energy use over nine months, showing total use (in blue) as well as component loads. We see that overall energy demand by the entire facility increased by 20 percent in August and September. Knowing this, the CFO might ask if the plant’s productivity or total output also increased at that time. The component graphs in the same panel show that the production lines’ energy usage remained steady throughout the nine-month period, possibly indicating that energy usage was not due to increased production. So where did the extra energy go? Examination reveals that the increase is

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Figure 3 Energy usage in an electronics board assembly plant. Annual usage with component loads is shown at the top and monthly usage in the middle. The bottom graph contrasts the startup energy cost of reflow soldering machines with steady-state use.


technology in systems

cent lower. The Christmas break, when the factory shuts down, shows a 50 percent lower energy use. The facility manager may wish to investigate why the weekend use is 15 percent lower and whether it can be applied to the weekdays. And the process engineer may have some insights to gain from the holiday shutdown. The bottom graph in Figure 3 zooms in and compares energy use by the components of the three production lines. During the break, reflow machines 1 and 3 were shut down, but machine 2 continued to be powered. What does this graph tell us? First, the startup energy of the reflow machines has a sharp peak up to 100 kW, while the steady-state energy demand of the machines is between 10-15 kW. The startup time of the machines (to reach steady-state) is about 25 minutes. This should prompt the process engineer to ask whether it is feasible to shut down the machines over night, or whether the machines may not be well suited to daily power cycling. If shut-down is feasible, the savings could amount to 300 kWh per day or 100 MWh annually. The same data also show that the peak and steady state energy use of the machines is not the same—one machine is using more energy than the others. Does that machine simply have higher capacity, or could it be out of tune? Figure 4 reveals a similar insight about the wave-soldering machines. Machine 3 has a smaller startup power peak and steadier power consumption during idle time than machines 1 and 2. The latter machines also seem to cycle much more in power consumption during idle time. Is this an indication of required maintenance or an inherent difference in the machines’ designs? These examples, taken from Arch Rock’s Energy Optimizer IP-based power-monitoring system, have shown how a wireless sensor network of smart sub-meters can quickly and easily provide insights into a building’s energy use and identify savings opportunities that could easily add up to 20 percent. Even greater savings may be possible by consulting an energy engineer and investing in explicit savings measures such as motion sensing

What is a Smart Object? The IPSO Alliance provides this definition: “Smart Objects are small computers with a sensor or actuator and a communication device, embedded in objects such as thermometers, car engines, light switches and industry machinery.” A Smart Object consists of an embedded MCU, a low-power radio, a battery or other means of energy independence, and a sensor or actuator. Its embedded software typically consists of a small-footprint RTOS, a networking stack and application software. The latest generation of Smart Objects is standards-based, using IPv6 over a secure MAC/PHY layer to communicate with cloud-based application servers using UDP or TCP. One example is Arch Rock’s IPpower Node, an IP-enabled wireless electric power sub-meter.

Figure 4 A comparison of energy use by three separate wave-soldering machines.

switches for lights, replacing HVAC static drive motors with variable-frequency drives (VFDs), or time-shifting the loads. Networks of Smart Objects are much better able to scale to multi-building and multi-site enterprise deployments when they are based on industry standards. The most pervasive, highly scaled, reliable and secure standard today is the IP protocol suite. The Internet Engineering Task Force (IETF) has recently standardized the use of the IPv6 protocol on low-power wireless personal-area networks (6LoWPAN), and is continuing this work with the standardization of routing over low-power and lossy networks (ROLL). At the lower PHY/MAC layers, the IEEE has taken the lead with the 802.15.4 standard. WSNs of Smart Objects are now be-

ing applied to the challenge of energy efficiency and greenhouse gas reduction across the world, in diverse applications such as data centers, commercial offices and manufacturing facilities, high-rise public housing and universities. Using these tools, facilities managers are getting instant feedback on enterprise energy use, enabling them to not only reduce their carbon footprint, but also to sustain those savings over time with active employee participation. Arch Rock San Francisco, CA. (415) 692-0828. [www.archrock.com].

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technology deployed Machine Vision in Factory Automation

Color Machine Vision—Untouched by Human Eyes

matches are called “metamers.” For example, light with a wavelength of 580 nanometers (nm) looks yellow, but a combination of green light at 540 nm and red light at 680 nm can also appear to be the same shade of yellow. Multiple narrow-band spectral sensors are used to distinguish between metamers in some industrial processes, such as judging moisture content or pigment matching, but most applications of color machine vision are satisfied with three, broadband sensor types that approximate the response of the “cone” sensors in our eyes. A color machine vision application requires controlling both the intensity and spectrum of the inspected object’s illumiThe real-time measurement and control of product color is nation. Incandescent light sources have a broad spectrum that makes color matching critical in many industries, including food, pharmaceutical easier, but suffer from spectral shifts with and automotive assembly. Color machine vision systems temperature according to Wien’s law. Most applications use fluorescent or “white” are replacing slow and unreliable human vision for LED lights. The spectrum from these lights inspecting colored objects, such as food or plastic parts. is quite uneven, typically with intensity peaks in the blue (short wave) end of the spectrum, but their spectrum is relatively constant over time and temperature. For example, Figure 1 shows a system for inspecting pills. Diffuse, white light by Ben Dawson, Dalsa Corporation illuminates colored pills in a blister pack while suppressing reflections off of the blister pack plastic. The leading edge of a card of pills is detected by the part-in-place uman perception of color is influenced by genetic factors, sensor and triggers image acquisition and analysis. Incorrectly experience, disease, age, adaptation, lighting and the colors colored pills (purple, in this example) are detected and rejected in the immediate environment. For example, a color can ap- downstream. Information on types and rates of errors are compear different when put next to another color or as the size of a municated to the plant’s quality control system. colored object changes. These factors help explain why people disA “reference patch” is usually included in the field of view agree about paint colors and why a painted wall doesn’t look like of the color machine vision (CMV) system. This is a neutral, difthat little color sample from the paint store. They also help explain fuse, white patch that reflects the illumination. The CMV meawhy we are not very reliable color measuring instruments. sures the spectrum of this reflected illumination and uses it to A photometer or other color measurement machine “sees” compensate for changes in the illumination spectrum. Regular color based on integrated products of the illumination, the ob- calibration and replacement of the illumination is also advisable. ject’s surface reflectance and the machine’s sensors. If we want The angle of the part or object with respect to both the light to use a machine to approximate human color response, then and the CMV system’s camera influences the measured color. the machine’s response is calibrated in terms of a “standard Diffuse objects, such as hamburger rolls, are less affected by anobserver”—an average of many people’s perceptual responses to gle changes, than surfaces with “depth,” such as painted surfaces. colors—such as the CIE color space. For most parts, you should present the objects or parts to be meaIn both machine and human color vision, it is common to sured to the CMV system in a known orientation to reduce the have three sensors (receptors) with broadband responses in the red effects of angle changes. (long), green (medium) and blue (short) wavelengths of light. ColThe color machine vision system consists of a color camera ors result from relative proportions of these three components. The or cameras, a processor and software to make color measurebroadband response of the sensors means that colors with differ- ments and communicate these to the manufacturing and process ent spectra sometimes cannot be distinguished; these unintended control systems. Most color cameras use a monochrome sen-

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hti ng

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Figure 1 Diagram of a color machine vision system for pharmaceutical inspection.

Figure 2 A baked goods inspection station for tortillas, by Montrose Technologies Inc.

sor overlaid with a pattern of red, green and blue filters, called a “Bayer Pattern” after the inventor, to get the three broadband sensor types. This reduces the camera cost but also reduces the camera’s spatial resolution. You therefore should be careful when trying to measure part dimensions using a Bayer Pattern color camera. Dalsa makes both Bayer Pattern cameras and cameras with three full-resolution sensors that are optically combined. The processor is typically a specialized computer that interfaces directly to the camera and has control hardware, and digital inputs and outputs. The control hardware and digital I/O are designed for easy integration of the processor into a production line. For example, the digital outputs are used to “kick” defective product off a conveyer line. Color machine vision software is specialized for making color measurements such as the location of objects based on

color, the extent of a colored object, and color textures. As noted, the software should also be able to compensate for changes in the lighting spectrum when using a “reference patch.” The CMV software can report colors in many different “color spaces,” that is, standard representations for colors. For many applications the red, green and blue values are sufficient, but when we want to approximate human perception, then reporting is usually in a color space related to the CIE color space, such as L, a*, b* (Lightness, and a, b color components). As a working example, consider the inspection of baked goods such as hamburger buns, English muffins, or tortillas (Figure 2). These baked products are sent by conveyer belt through an inspection station. At the inspection station a laser profiler measures the product’s three-dimensional structure and a bright light and a color camera are used to measure product color. The product moves quickly, so the bright light is needed to give the camera enough reflected photons to form an image. Because these products move smoothly through the inspection station, a color line-scan camera could be used. Dalsa makes both “tri-linear” line-scan cameras with a row of red, a row of green and a row of blue sensors, and line-scan cameras with Bayer Patterns. A red laser line is used for measuring 3D shape and a bright, bright white line is used for measuring color. The blue nozzles protruding from the box below the laser camera box are “air knives” that blow defective product down and out of the gap between this station’s conveyer belt and the next conveyer belt. The color image of the baked goods is examined to ensure that it exhibits the proper colors. Obviously incorrect colors, say green or orange, might indicate mold or contamination and must cause product rejection. More subtle are colors that suggest to us that the baked goods are properly cooked. Consider “toast marks,” on English muffins for example. English muffins are baked in tins and the heel (bottom) appears brown with black marks. The heel also has a dusting of farina or corn meal to prevent the muffin from sticking to the tin and to add taste and visual texture (Figure 3). After the muffin is cooked, a “toast mark” is applied to the top of the muffin by a continuous toaster or by briefly cooking it on a griddle. Without this “toast mark,” people think the product hasn’t been properly baked. In fact, the product could be pasty white (assuming no contamination now!) and still be properly baked. So these brown “toast marks” send the consumer a subliminal message that the product has been properly cooked. Interestingly, the quality inspection ensures that the color matches the consumers’ expectation, and has little to do with the intrinsic quality of the product. To be accepted, the “toast mark” has to be in a certain range of brown and a certain range of size. Too light and you might think the muffin is not baked. To dark and it looks burned. Brown is a difficult color to measure—it is a “non-spectral” color as there is no wavelength in the physical spectrum that is brown, and our perception of brown is strongly influenced by surrounding colors. Low intensity reds to orange wavelengths can be perceived as brown. On English muffins, the brown is measurable by a color machine vision system and so the “toast mark” can be quantified RTC MAGAZINE JANUARY 2010

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Figure 3 The heel or bottom of an English muffin is on the left, and the top of the muffin on the right. The toast mark is the irregular brown and black area on the top of the muffin.

by color and extent. These measures could be used to adjust the temperature of the upstream toasting to give the desired mark color and extent. Because we are matching human perception, color values are reported as L, a*, b* components. The vision software builds up the three-dimensional profile of the baked goods, checks the color and two-dimensional shape and might check for the presence of texture, decorations, etc. The software also has to deal with partial images of the product—say a bun that is just “entering” the image—by computationally separating and remembering individual product items. When defective product is found, the machine vision system signals a down-

stream mechanism to reject the product. For example, as English muffins come out of the inspection system, defective product is blown off the conveyer using one or more “air knives.” The results of inspections are sent to the plant’s process monitoring system. This communication is usually done over Ethernet, but older RS-232 protocols are also supported. These results help the manufacturer adjust the production process, signal production problems, and can be the basis for a database of vision “recipes” or “solutions,” that makes changing products on a line relatively easy. Using proper lighting, part presentation, processing and communications, a color machine vision system can take over human visual inspection of colored products. With easy-to-use color machine vision software and hardware designed for factory integration, subjective human color inspection can easily be automated. DALSA Billerica, MA. (978) 670-2050. [www.dalsa.com].

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Programmable Devices

Graphics Processors Running General-Purpose Code Set to Revolutionize Embedded Computing Originally designed to render graphics, today’s GPUs have become massively parallel devices that can also be programmed using a general-purpose C compiler to speed intense computational tasks that can execute in parallel. by Simon Collins, GE Intelligent Platforms

T

he quest for ever higher perfor- but in recent times this has slowed. A mance in embedded computing has primary reason is that power consumpseen successive generations of mi- tion increases exponentially with clock croprocessor come and go, with quad core rate. Although this can be mitigated to the latest to rise to the challenge. DSP some extent by decreasing the die geomand FPGA technology have been widely etry size, most silicon vendors are lookdeployed. New architectures, such as the ing at multicore as an alternative, with fabric-centric VPX, have gone some way dual and quad core processors recently introduced—and six and eight cores just to filling the need. And yet… The requirement still exists for even around the corner. For game-changing nies providing solutions now of processing capability performance, a different processing pargreater degrees ion into products, technologies and companies. Whether your goal is to research theis latest required—a shift from sequenfor sophisticated, mission-critical applica- adigm ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you tial to parallel processing. tions. At the same time, possible solutions you require for whatever type of technology, Enter general-purpose processing and productsare youincreasingly are searching for.compromised by the need on graphics processing units (GPGPU), to minimize space, weight and power for which can be seen as the latest in a line applications that are to be fielded in moof technologies (from the Transputer to bile—and even portable—platforms. That DSP, FPGA…) that can deliver a level of may be the most pressing requirement— but not far behind it follows the require- performance not possible with generalment to minimize time-to-market, and purpose processors. Current-generation the need to maintain maximum control GPUs can have 96, 128, even 256 cores. As a potential way forward, the ability to over cost. General-purpose processor clock run general-purpose code on a GPU has speeds used to increase every few months, been attracting growing interest over the last few years in a broad range of fields including medical research, science and Get Connected finance as well as in those areas that with companies mentioned in this article. might be more usually associated with www.rtcmagazine.com/getconnected

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Get Connected with companies mentioned in this article.

the technology such as signal processing and video processing. Feedback is universally positive. For the right applications, processing speed and productivity can be dramatically improved. Why is that? Simply because the architecture of a GPU is inherently highly parallel—an architecture that was used extensively for the most demanding supercomputing applications of ten and twenty years ago. The difference is that those supercomputers of the early 1990s cost millions of dollars—but a high-end GPU board for a benign development environment costs only a few hundred, and a rugged, field-deployable board only a few thousand. The fact is, there are classes of problems that lend themselves well to parallel processing—typically those that, like graphics applications, require substantial amounts of data to be processed (or smaller amounts of data to be repeatedly reprocessed), and where that data can be processed simultaneously, rather than sequentially. But GPUs have been around for many years—so why the recent surge in interest? The first GPUs were specifically de-


Main Memory

CPU 1 Copy processing data Instruct the processing 4

2 Copy the result

Memory for GPU Execute parallel in each core

GPU

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ment platforms around—the PC. While rugged, battle-ready CUDA-enabled platforms will inevitably be somewhat more expensive, the investment required in GPU-based hardware will be significantly less than that involved in FPGA-based platforms (or DSP-based platforms, come to that)—thus addressing a key concern in embedded computing. One problem that has been confronting engineers is how to move the applications successfully tested in the laboratory on commercial-grade GPUs to the harsh deployed world? One example of a product designed to bring the benefits of CUDA-based computing to military applications is the GE Intelligent Platforms rugged 3U VPX GRA111 graphics board. Featuring Nvidia’s GT240 GPU in combination with an Intel Core2 Duo processor, it is the first member of a planned family of CUDA-enabled products (Figure 2).

Figure 1 With CUDA, a ‘traditional’ CPU and GPGPU combine to deliver potentially dramatic improvements in performance.

panies providing solutions now signed to accelerate graphics applications,

It is largely in response to growing

ation into products, technologies and companies. Whether your goal latest interestthebeyond the company’s traditional intended for traditional raster-based en-is to research cation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you area of expertise in graphics that has led vironments. Today’s GPUs, however, are ce you require for whatever type of technology, Nvidia to introduce the Compute Unified fully programmable, massively parallel es and products you are searching for.

floating point processors with substantial flexibility. Nvidia’s first GPU was the NV1, and was introduced in 1995: it featured one million transistors. In 2006, Nvidia launched the GeForce 8 Series—with 681 million transistors. 2009 saw the introduction of the GTX280 with 1.4 billion transistors. Anyone who has seen the transition from early PC games like Wolfenstein 3D to the lavish and highly detailed photo-realism of Crysis, will be aware Get Connected of the difference a modern GPU makes. with companies mentioned in this article. GPU development has been driven by PC www.rtcmagazine.com/getconnected gaming—but the benefits are being experienced much more widely.

End of Article

Device Architecture, or CUDA (Figure 1), and to make the changes necessary that would enable the implementation of a C compiler—and thus open up GPU technology to a much wider potential application base. CUDA is described by Nvidia as a general-purpose parallel computing architecture that leverages the parallel compute engine in Nvidia GPUs, and includes the CUDA Instruction Set Architecture (ISA). Over 100 million CUDA-enabled GPUs have been sold to date, and thousands of software developers are already using the free CUDA software development tools. What’s more, they’re doing so on one of the most inexpensive develop-

Get Connected with companies mentioned in this article. www.rtcmagazine.com/getconnected

Figure 2 The GRA111 from GE Intelligent Platforms is a rugged, field deployable CUDA-based platform

There is more, however, to the costeffectiveness of GPU-based solutions than just the hardware platform. Two other key elements are developer productivity—and the cost of those developers. For many, FPGA is the technology of choice for solving challenging embedded computing problems. Good programmers who can be productive in the FPGA environment are, however, hard to come by, and their skills are more akin to those of a hardware or electronics engineer than a software engineer. CUDA has been described as “more accessible” to software programmers. The CUDA environment is widely taught in schools and universities, and is RTC RTCMAGAZINE MAGAZINEJANUARY MONTH 2010 2009

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INDUSTRY WATCH

Figure 3 Radar is one of many applications that can benefit from GPGPU technology.

extensively used in R&D labs around the world. As such, skilled programmers can be expected to be plentiful—and more affordable (Table1). Productivity and time-to-market are functions of the software development tools available for a target hardware environment. While these have become widely available for FPGA programming, the library of tools available for the CUDA environment has already surpassed their number. Nvidia provides extensive developer support for the CUDA environment. The CUDA Toolkit is a C language environment for CUDA-enabled GPUs, and includes the nvcc C compiler; CUDA FFT and Basic Linear Algebra Subprograms (BLAS) libraries; a profiler; the gbd debugger for the GPU; a CUDA runtime driver; and a CUDA programming manual. The fact that the development environment is based on the C language—a language with which virtually every software developer is familiar—is an important advantage. In addition to the extensive development and engineering support GE Intelligent Platforms is providing for developers of CUDA-based systems, third-party support is also becoming widespread. For example, Tech-X Corporation recently an-

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nounced GPULib. GPULib is designed to provide a library of mathematical functions that facilitate the use of high-performance computing resources available on modern GPUs. Tech-X Corporation says that GPULib allows users to access highperformance computing with minimal modification to their existing programs. By providing bindings for a number of Very High-Level Languages (VHLLs) including Matlab and IDL, GPULib can, according to Tech-X, accelerate new ap-

plications or be incorporated into existing applications with minimal effort. No knowledge of GPU programming or memory management is required. Another effort that will help unlock the capabilities of a GPU in a generalpurpose application is the OpenCL framework. Created by the Khronos Group, it features the participation of industry heavyweights such as Intel, NEC, IBM, Nokia, Freescale, GE and AMD. It is the first open standard for writing programs that execute across CPUs, GPUs and other types of processors, and includes a language for writing kernels (the functions that execute on OpenCL devices), defines APIs that are used to define and then control the platforms, and provides parallel computing using task-based and data-based parallelism. The Vector Signal Image Processing Library (VSIPL) is also acknowledged to be useful for exploiting the capabilities of GPUs, providing a high-level API for signal and image processing and explicit memory access controls. The converse is also true: GPUs are a good fit for VSIPL because they improve prototyping by speeding the testing of algorithms; their affordability means that more engineers can gain access to highperformance computing; and substantial increases in speed can be achieved without the need for explicit parallelism at the application level. Many existing MilAero applications are coded using VSIPL libraries that were optimized for

Figure 4 CUDA-based systems (right – 0.8 cubic feet, 10lbs, 200 watts, 574 GFLOPS peak) can reduce SWaP by a factor of ten compared with traditional solutions (left – 4 cubic feet, 105lbs, 2,000W, 576 GFLOPS peak).


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PowerPC/Altivec or Intel/SSE. These applications will port to CUDA very readily by using a VSIPL library that is optimized for CUDA. Georgia Tech Research Institute’s VSIPL is another example of the growing third-party support for CUDA development tools. Beyond these frameworks, tools and libraries, there is also a substantial—and growing—code base of examples available to aid the development process. Nvidia provides a number of these as part of the CUDA developer SDK. The latest version of the SDK provides support for Microsoft’s Visual Studio. Among the applications that will certainly benefit from the use of GPGPU technology are software defined radio, encryption, decryption and cryptanalysis, radar, sonar as well as video processing and stabilization, video compression and decompression, target tracking, image enhancement and sensor fusion. LIDAR (Light Detection and Ranging) is an optical remote sensing technology that measures properties of scattered light to find the range and/ or other information of a distant target. It is a technology that requires intense computation resources and can largely execute in parallel. Image processing filters for electro-optical sensors are also a good fit for a GPU, as are the FFTs and other core signal processing algorithms that feature heavily in radar applications. GPGPU technology can deliver significantly more capable detection systems, increase the autonomy of unmanned vehicles and provide a wide-ranging improvement in survivability across a broad spread of applications. To take one example: a major defense prime contractor has ported a radar application to the CUDA environment and achieved a 15x improvement in performance (Figure 3). In another case, the productivity of the CUDA environment is illustrated by the brief time—just over two weeks—it took another prime contractor to migrate an application to the CUDA environment. What difference can a GPGPU make? An Intel processor, operating on its own, can be expected to deliver peak performance around 16 GFLOPS; its power consumption of 60W delivers performance of

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CUDA Advantages over FPGA More complete software development environment Ready availability of affordable programmers Lower cost development platform Lower cost deployment platform Superior I/O Better performance/watt Better floating point performance More flexible, easier to work with Much quicker to prototype algorithms

table 1 CUDA advantages over FPGA.

0.27 GFLOPS/W. Add a GPGPU (unlike FPGA technology, a GPGPU will always be hosted by a general-purpose processor) and performance rises to 391 GFLOPS peak, or 3.76 GFLOPS/W. Doubling the number of GPGPUs delivers peak performance of 766 GFLOPS peak, equating to 5.18 GFLOPS/W. While power consumption is 2.5x, performance/watt rises by a factor of more than 20. In comparison, a Virtex 5 FPGA is rated at 192 GFLOPS by Xilinx. Note that the “sweet spot” in configuring GPGPU-based systems is held to be one GPU per CPU core: thus, a dual core Intel processor would ideally be configured with two GPUs for optimum performance. As a technology, it is highly scalable across many different form factors—from 19” rack high-performance computing (HPC) supercomputers using Nvidia’s Tesla GPU and the same company’s upcoming Fermi products through workstations using Nvidia Quadro technology to rugged 3U and 6U VPX implementations using GeForce. The real attraction of GPGPU technology for embedded applications lies in the fact that sophisticated, very highperformance applications can be deployed in a fraction of the platform size and weight, and with substantially less

power consumption/heat dissipation than would be required for a “traditional” solution. It is not unreasonable to believe that this reduction in size, weight and power (SwaP) could be by a factor of ten (Figure 4). The GPGPU—and, specifically, CUDA—is not the answer to every embedded computing need. For a number of applications, however, they represent a potentially high return solution that not only delivers dramatic potential performance improvements, but does so in a way that allows users to develop and deploy systems more quickly and more affordably than ever before. GE Intelligent Platforms, Charlottesville, VA. (780) 401-7700. [www.ge-ip.com]. NVIDIA, Santa Clara, CA. (408) 486-2000. [www.nvidia.com].


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Programmable Devices

Embedded Digital Filtering on Programmable Mixed-Signal Devices Programmable hardware resources that can run in parallel on the same chip with a CPU can make implementing mixed-signal solutions simpler, more cost-effective and flexible without interfering with other real-time tasks managed by the CPU.

by Kendall Castor-Perry, Cypress Semiconductor

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he increasing availability of afford- mixed-signal microcontrollers because able microcontrollers with analog- they make it possible to cost-effectively to-digital front ends continues to implement complex digital filtering in a change how embedded systems are being wide range of new applications. More addesigned. Often termed “mixed-signal vanced filtering allows engineers to offer microcontrollers,” these devices consoli- more capabilities—including higher predate both control and digital signal processing functionality onto a single device. V[ch1] V[ch2] 500mV Such programmable “system on chip” technology not only simplifies application 400mV nies providing solutions nowit accelerates development architectures, 300mV ion into products, technologies andthe companies. Whether your goal is to research the latest by eliminating need to communicate ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you between chips, and by enabling engineers 200mV you require for whatever type of technology, application code within a single and productstoyouwrite are searching for. 100mV development environment. One of the primary advantages of 0mV mixed-signal microcontrollers is that they -100mV can do much more than simply convert -200mV external analog signals to the digital domain. Data acquisition is not an end in it-300mV self but rather a first step before extracting -400mV the meaning behind acquired data, and deciding what to do with it. Many em-500mV 4.250s 4.255s 4.260s 4.265s 4.270s bedded developers are turning to newer

cision, better efficiency and lower power consumption—with which to differentiate their products. Bringing digital signal processing and control functionality onto the same device, however, does not come without V[ch3]

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Figure 1 Four sequentially multiplexed inputs of an ADC are fed the same signal...

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the reuse of IP through an ecosystem of blocks that can be shared across a design community to reduce development time and lower application cost. This level of flexibility also allows developers to support entirely new applications with their own custom IP blocks in a costeffective manner. Being able to embed signal processing into functional components at the block level ensures that the project’s management can be “forked” at the component design level. By adjusting the programmable hardware resources available to a particular function, developers can scale digital filtering algorithms independently of CPU software resources. This methodology ensures that signal processing load variations, which change as algorithms are modified during the design process, have no impact on other highly timing-critical tasks such as communications management.

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Figure 2 ...and the embedded polyphase interpolation filter eliminates the differences.

its own challenges. When an application requires extensive signal processing, it can become a challenge for the firmware engineer to perform such processing in real time when it is run on the same processor as all of the other housekeeping tasks the processor needs to support, including managing a screen, keyboard, storage and so on. Additionally, the architecture must be flexible enough to support changing application specs, as well as be able to scale functionality to meet different market requirements.

Balancing Hardware and Software Resources

Flexibility in an embedded architecture is important. Many embedded applications do not have the volumes to encourage silicon manufacturers to spin application-specific microcontrollers. Even for high-volume applications, application-specific chips appear on the market only after the functions they provide have become commoditized. In many cases, if developers want to implement advanced digital filtering, they have to rely upon controllers that are either general-purpose in nature or optimized for other applications. In addition, as with many embedded project developments, they go through frequent changes in scope, ambition and architecture. Keeping up with the impact this has on a monolithic coding project on a single core is challenging, especially

with today’s decentralized, multi-contributor design teams. Some newer mixed-signal controllers provide the necessary flexibility through programmable or configurable logic, implemented as integrated coprocessors or hardware blocks that can be programmed to execute independently, in parallel with the main CPU. These devices can implement compute-intensive algorithms with a high degree of efficiency, and at minimal cost. In addition, the decoupling of signal processing from the main CPU allows -9dB

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Embedding Digital Filtering

These advantages can be illustrated with some recent system designs employing a recently introduced mixed-signal microcontroller with an embedded filter coprocessor, the PSoC family from Cypress Semiconductor. Many filtering topologies can be coded effectively onto this structure. Combining programmable hardware and data path blocks enables developers V(vout3)

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Figure 4 High accuracy low-noise integrator by embedded IIR filtering (blue traces).

to marry the efficiencies of hardware with software in an optimal balance for their specific application. Data and coefficients are stored in dedicated local memories and are shared between programmable hardware and software resources via a system bus. Both sets of resources have access to sources and sinks of digital data. Tools are available for quickly configuring these systems-on-chip using a drag-and-drop interface, such as the PSoC Creator Integrated Development Environment from Cypress Semiconductor, which supports the newly introduced PSoC3 and PSoC5 architectures. Developers have the option of using or modifying a wide range of existing library elements, or creating new blocks such as custom filters. These elements are then converted into the necessary hardware and software components as dictated by the programmable systemon-chip architecture in use.

Accurate Electricity Meters

Consider first the example of an electricity meter that needs to compen-

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sate for the interchannel timing offset of a single delta-sigma ADC, into which several phases of voltage and current are multiplexed. If this time difference isn’t corrected, system accuracy will degrade rapidly for low-power factor loads as well as for the estimation of the power in the higher harmonics of the line frequency. In a recent implementation, we used embedded FIR structures to implement a polyphase interpolation filter with four channels of 20 taps each. This filter takes the multiplexed data stream from the single ADC, and “unpacks” it into four new data streams through channels whose signal delays differ by the correct fractions of a sample time needed to “realign” the data as if it had been captured by four simultaneously sampling ADCs. Figure 1 shows four data sets obtained by sequentially sampling the same (band-limited) signal with a four-input multiplexed converter. Figure 2 shows the four outputs from the interpolation filter system, showing that the underlying band-limited waveform has been correctly reconstructed in

both shape and timing. This technique enables a single high-quality ADC to service the very highest metering accuracy classes, at all relevant power factors and harmonic frequencies. It’s also widely applicable in other scenarios requiring effectively simultaneous sampling. To enable the accurate calculation of “classical” fundamental reactive power, we then deployed a computeroptimized phase-shifting filter. Most commercial metering chips use either a time delay or an integrator to deliver the required 90 degree phase shift. The former method has flat amplitude response but is inaccurate in phase shift when the line frequency is not at the correct value. The latter method has the converse error; the phase is always accurate but the amplitude varies with frequency, in a way that fails all but the least stringent metering classes. To solve this issue, we embedded a 6-pole IIR filter (Figure 3) that beats the most stringent reactive power accuracy requirements over the entire line frequency range, without having to resort to the very wasteful Hilbert Transformer approach that would have consumed the entire system processing power. The IIR filter also has a lowpass characteristic that strongly attenuates the harmonics in the current waveform, leaving only the fundamental for reactive power estimation. The ability to implement this function on the programmable system-on-chip not only reduces system complexity and cost, it provides better performance. The other critical frequency response shaping circuit in the modern electricity meter is the integrator needed to compensate the frequency response of a di/dt type of current sensor such as a Rogowski coil or Sentec “Mobius.” The rising low frequency response of such a circuit exacerbates the low frequency analog noise inherent in the front end. For standard active power measurements this is not an issue. Increasingly, however, customers are demanding wider dynamic range for current measurements so that apparent power and the effective dissipation in the electricity infrastructure can be calculated accurately. At very low currents, the integrator noise component leads to an inaccurately high current measurement. Because the rising of the gain can’t


INDUSTRY WATCH

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Figure 5 Frequency response for embedded splitting filters (60/73kHz SFSK; 2x n=8 IIR at 384ksps) designed for the Cypress PSoC 3 DFB for a common pair of mark/space frequencies.

be allowed to continue indefinitely—or else the gain would be infinite at DC— the integrator is “damped” to a lower limit frequency in conventional devices. This introduces a phase error that becomes noticeable at the highest accuracy classes. To support the use of di/dt sensors, we designed in another 6-pole IIR filter with a specific restricted low frequency response. This gives us 9-15 dB better integrated noise performance, depending on the front end. In addition, it still delivers the amplitude and phase response of an ideal integrator within the working bandwidth to an accuracy better than the “standard” metering chip we used as a reference (the green traces in Figure 4).

Communications Filters and Detectors

The IEC 61334-5 SFSK powerline communication standard, popular in electricity metering applications, uses Spread Frequency Shift Keying (SFSK), a variant of FSK in which the mark and space frequencies are much more widely separated than you’d expect from the data rate. If the incoming signal is split by a pair of sharp bandpass filters that only pick out the mark or the space frequency component, the data modulation can be extracted

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independently from either channel. This confers exceptional interference resistance, since a single-tone interferer can’t prevent the demodulation of both channels at once, if the filters’ frequency responses don’t overlap. Conventional correlatorbased FSK demodulators can’t deliver this interference resistance. Figure 5 shows the frequency response of a pair of filters designed for the Cypress PSoC3 for a commonly used pair of mark/ space frequencies. The filters can easily be reconfigured for different frequencies and bandwidths at any time. In a practical realization, the filter is fed from one of the main ADCs, preceded by an AGC circuit built around the analog programmable gain amplifier (PGA). To extract the data from the filtered signals, they are rectified by taking the absolute value of each signal, available trivially just by setting the appropriate control register bit. The rectified signals are then passed through lowpass filters also running on the embedded filter engine, and compared against a threshold value that tracks the signal level. In this implementation, which meets all of the interference rejection requirements of the spec, all of the signal processing is executed autonomously in programmable hardware on the relevant multiplexed

signals from the high-quality delta-sigma modulator, without intervention from the processor. Likewise, the SNR of each channel is estimated in hardware and the data passed onto a standard UART. Introducing a powerful digital filtering engine into embedded applications extends the value developers can deliver to their customers, and it reduces system cost, complexity and time-to-market. By making use of mixed-signal microcontrollers with programmable hardware signal processing resources, such as the PSoC3 device in these examples, it becomes possible to address the evolving requirements for complex signal filtering as they change during the design process. With them, developers can cost-effectively introduce a wide range of capabilities to enhance their products, from adding “stereo enhancement” functions, to decimation filters for digital microphones, and even advanced control algorithms for industrial sensor conditioning and medical applications. Cypress Semiconductor, San Jose, CA. (408) 943-2600. [www.cypress.com].


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products &

TECHNOLOGY Dual 10 Gigabit Ethernet XMC Mezzanine card for CompactPCI, VME or VPX systems

A new dual 10 Gigabit Ethernet mezzanine board extends all CompactPCI, VME, VPX, and custom boards offering an XMC slot by two 10 Gigabit Ethernet ports. Based on the Intel 82599ES 10 Gigabit Ethernet controller, the XMC401 Ethernet Switched Mezzanine Card from Kontron provides more than sufficient data throughput for the Ethernet networks of today and tomorrow. In addition to advanced processing performance, the new dual 10 GbE controller, which connects to the host computer via PCIe x8, efficiently reduces CPU load. Combined with the new capabilities and enhancements of the Intel 82599ES 10 Gigabit Ethernet controller such as checksum offload, TCP segmentation offload, and reduced interrupt operations, the Kontron XMC401 helps release processors from network I/O bottlenecks to unleash blazing performance in a variety of usage models. By supporting the latest Intel VT technologies, Kontron provides the platform foundation for virtualization and storage over Ethernet and opens up new possibilities for efficiently utilizing network connections. Offering the possibility of either one or two SFP+ channels as well as support for copper and/or optical transmission, the XMC401 allows for maximum flexibility. Furthermore, it has intelligent behavior through the operation of 1GbE direct attached copper or 1/10 GbE fiber network configurations. The Kontron XMC401 dual 10 Gigabit Ethernet mezzanine board supports Linux as well as the latest Windows operating systems. Kontron, Poway, CA. (888) 294-4558. [www.kontron.com].

Conduction-Cooled PrPMC/XMC Module Targets Dual-Core QorIQ P2020

A conduction-cooled PMC/XMC single-board computer based on Freescale Semiconductor’s dual-core QorIQ P2020 processor provides a high-performance, feature-rich solution for current and future generations of embedded applications. The XPedite5501 from Extreme Engineering Solutions operates with two 1.2 GHz PowerPC e500 cores, and supports up to 4 Gbytes DDR3-800 ECC SDRAM and up to 8 Gbytes of NAND flash and 256 Mbytes of redundant NOR flash. It has a 32-bit/33 MHz PCI (PMC interface) and PCI Express or Serial RapidIO (PCIe or sRIO XMC interface). In addition, it supports two Gigabit Ethernet ports. It also offers a choice of operating system support with board support packages for Green Hills Integrity, Wind River VxWorks, QNX Neutrino and Linux. The XPedite5501 is shipping today. Pricing varies from $1,995 to $3,595 depending on memory configuration and Level 1 to Level 5 ruggedization level. Volume discounts apply based on final configuration and yearly commitments. A PMC module with front panel I/O is also available. Extreme Engineering Solutions, Middleton, WI. (608) 833-1155. [www.xes-inc.com].

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JANUARY 2010 RTC MAGAZINE

Kits Simplify LCD Segment Drive Design—Up to 736 LCD Segments

Two evaluation kits show the ease of use, fast development time and flexibility of the new PSoC 3 architecture for LCD segment drive applications from Cypress Semiconductor. The CY8CKIT-006 PSoC 3 LCD Segment Drive Evaluation Kit and the CY8CKIT-029 PSoC LCD Segment Drive Expansion Board Kit demonstrate how a single PSoC 3 device can drive up to 736 LCD segments, more than any microcontroller-based solution. With the kits, designers can leverage the drag-and-drop LCD Drive component in the PSoC Creator Integrated Development Environment (IDE) to quickly and easily design products with an LCD screen for the consumer electronics, handheld, medical, industrial, white goods, automotive and other markets. Currently, design of LCD segments requires hundreds of lines of complex code to define a screen’s segment intersections. The set-up wizard in the PSoC Creator IDE now enables designers to visually map these intersections in an intuitive drag-and-drop style. The tool then provides the ability to manually configure LCD pin locations, or automatically routes all on-chip signals and can even direct I/O to the optimum pins if desired. The PSoC Creator IDE also provides all of the APIs required to write to the LCD screen instead of requiring designers to create them. The complete PSoC 3 platform significantly cuts development time for LCD applications. The CY8CKIT-006 PSoC 3 LCD Segment Drive Evaluation Kit is priced at $149 and the CY8CKIT-029 PSoC LCD Segment Drive Expansion Board Kit is $59. Cypress Semiconductor, San Jose, CA. (408) 943-2600. [www.cypress.com].


I/O Server with Built-in Carrier Card for Integrated I/O

A new Industrial PC features an internal carrier card to interface a wide selection of related plug-in I/O modules. Designed specifically to work together, this combination of a rugged, fanless box computer and conduction-cooled I/O modules provides an integrated system for high-performance measurement and control projects. The first release in the I/O Server line from Acromag, the Model IOS-7400 is equipped with an Intel Atom CPU and a variety of interface connections for peripherals and network devices. Users can insert up to four mezzanine IOS modules, in any mix, onto the slide-out carrier card to perform A/D, D/A, discrete monitoring/control, counter/timer, serial communication and FPGA computing functions. The interface for up to 192 channels of field I/O is handled through four high-density connectors on the front panel for clean, easy cable access. Advanced thermal technology removes heat without open vents or fans for dependable operation from -30° to 75°C. The IOS-7400 PC unit features an embedded Intel Atom N270 1.6 GHz CPU with 1 Gbyte of DDR2 RAM that runs on Windows Embedded Standard or Linux. Standard interfaces include VGA graphics, two Ethernet ports, two serial ports, four USB ports, a CompactFlash slot and audio input/output jacks. An internal 2.5” PATA hard disk or solid-state drive is accommodated as a user-installed option. More than 20 IOS modules are available and a reconfigurable FPGA module allows users to execute custom logic routines and algorithms on TTL, Get Connected with technology and differential or LVDS I/O signals. The IOS modulesproviding employ solutions advancednow heat sink companies techniques to manage excessive heat. A thermal pad wicks heat away from the module and Get Connected is a new resource for further exploration transfers the energy to a conductive cover that contacts a large heat spreader plate within the Server unit. Heat movesWhether to the your goal intoI/O products, technologies andthen companies. enclosure walls where it is dissipated by external cooling fins. is to research the latest datasheet from a company, speak directly with an Application Engineer, orsoftware jump to a company's technical Acromag offers several programmer support tools. A Windows development package provides API development and Win32 DLL page, the of Get Connected is to function put you in touch with to thespeed right resource. drivers, plus examples for C, Visual Basic, .Net and LabVIEW environments. The Linux softwaregoal includes a library of I/O routines Whichever level of service you require for whatever type of technology, code development. Both packages include demonstration programs with C source code to test and exercise the I/O module operation. Get Connected will help you connect with the companies and products I/O Server units have a rugged, extruded aluminum enclosure that is suitable for use in hostile environments common in manufacturyou industrial are searching for. ing, defense, transportation and research applications. These units are resistant to shock (5g) and vibration (50g). Thermal management techniques www.rtcmagazine.com/getconnected eliminate the need for vents or mechanics that could permit contaminants to enter or moving parts to fail. As a result, an I/O Server with four IOS modules operates reliably across wide temperature ranges between -30° to 75°C (-22 to 167°F) with 0-90% relative humidity, non-condensing. Acceptable storage temperatures range from -40° to 85°C (-40° to 185°F). CE, UL and cUL approvals are pending. FCC compliance meets FCC Part 15, Subpart B for Class A digital devices. Pricing for the I/O Server PC starts at $2,195 while the twenty-plus IOS modules begin at $325 each.

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Get Connected is a new resource for further exploration into pro COM Express Module Sports Higher Graphics Performance datasheet from a company, speak directly with an Application Engine A new high-performance COM Express compact module features the Intel GS45 small form in touch with the right resource. Whichever level of service you requir factor (SFF) chipset, which enables significant performance increases despite a smaller footprint. Get Connected will help you connect with the companies and produc

The conga-CS45 from Congatec is particularly suitable for mobile applications that require high www.rtcmagazine.com/getconnected graphics performance such as portable ultrasound devices. The module also offers true highend graphics performance ,which, until now, was unprecedented at such small dimensions. Even hardware implemented decompression for HDTV videos is already integrated in the chipset. In addition, the module offers a large choice of graphics interfaces ranging from SDVO, DVI and HDMI to DisplayPort. The conga-CS45 is equipped with the latest generation of 45nm Intel processors including the Intel Celeron ULV722 with a mere 5.5 watt thermal dissipation power (TDP)—the maximum requirement that is rarely reached in practice—or the Intel Core 2 Duo SP9300 with 25 watt TDP as well as 6 Mbyte secondary cache and a clock speed of 2.3 GHz. The conga-CS45 can be upgraded to a maximum of 4 Gbytes of DDR3 memory with 1067 MHz. Compared to DDR2 memory, DDR3 technology requires approximately 20% less power. The module has three serial ATA connectors with RAID support, which further improves the Get Connected with companies and performance and data security of mass storage. It also supports Intel Active Management Techproducts featured in this section. www.rtcmagazine.com/getconnected nology (AMT 4.0), which enables remote control via Ethernet or Internet even before starting the operating system. To meet the special needs of mobile applications, the conga-CS45 permits Core Sleep States C0 to C6, which makes it easy to optimize the power requirements for each scenario. Pricing starts at $576.

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57


PRODUCTS & TECHNOLOGY

Real-Time Digital Image Processor Board for X-ray Imaging

A digital image processor specifically engineered for demanding X-ray instrumentation and radioscopy is designed to handle a wide range of resolutions, pixel depths and frame rates. The XRI-1600 from Dalsa is able to generate such high-quality diagnostic pictures due to the incorporation of Dalsa’s Image Processing Engine (IPE). The IPE is specially designed for X-ray imaging applications and performs real-time digital image processing in three dynamic stages. These stages are: input image conditioning; motion compensated noise reduction; and output image conditioning. In the first stage, the IPE is capable of performing shading correction, lens correction and image realignment as required, without sacrificing system performance. In the second stage, the XRI-1600 features a user-configurable, motioncompensated noise reduction algorithm that is optimized for both static and dynamic images. The third stage enables image rotation and/or flip, along with image enhancement and masking. Key features include adaptive image averaging to reduce noise in both still and dynamic images, and a programmable digital filter is provided to improve image quality and contrast. Local image storage increases reliability and processing time. Flexible input data formats support high-resolution images with up to 14-bit/pixel CCD, CMOS, flat panel detectors and linear array scanners. The XRI-1600 is designed for rapid system integration and comes bundled with easy-touse software application development tools and utilities. The XRI-1600 Software Development Kit (SDK) is a Microsoft Windows-compatible C++ library for image acquisition and digital image processor control. It includes easy-to-use tools, utilities and installation scripts to allow rapid application development, diagnosis and deployment. Intuitive and flexible, the XRI-1600 SDK imaging libraries permit users to control all aspects of the image acquisition process and image storage function both on the local and host computers. The software features a powerful event notification technology to increase the application response time. Dalsa, Boston, MA. (978) 670-2000. [www.dalsa.com].

6U VPX SBC Features Freescale MPC8572E

An MPC8572E-based 6U VPX board ranges from commercial to full blown military (conductioncooled) applications. With Freescale Semiconductor’s dual-core MPC8572E PowerQUICC III processor, XCalibur1541 from Extreme Engineering Solutions delivers enhanced performance and efficiency for today’s commercial, industrial and military embedded computing applications. XCalibur1541 is a solution structured for system designers demanding high processing performance with lower power consumption. In addition to the Freescale MPC8572E PowerQUICC III processor with dual e500 Power Architecture cores at up to 1.5 GHz, the SBC incorporates two channels of up to 4 Gbytes of DDR2-800 ECC SDRAM as well as up to 4 Gbytes of NAND flash and 256 Mbytes of NOR flash. There are four Gigabit Ethernet ports, two SATA 3.0 ports, two USB ports and two PrPMC/XMC interfaces. In-house X-ES operating system support includes a Green Hills Integrity Board Support Package (BSP) along with BSPs for Wind River VxWorks, QNX Neutrino and Linux. Extreme Engineering offers guaranteed 4-hour technical response to all hardware and software questions. Pricing starts at $8,095 and may vary based on processor speed, memory configuration and ruggedization level. Volume discounts are available. Extreme Engineering Solutions, Middleton, WI. (608) 833-1155. [www.xes-inc.com].

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MONTH 2009 JANUARY 2010RTC RTCMAGAZINE MAGAZINE

Rugged Single Slot Graphics Solution for Demanding Applications

A high-performance 6U VME rugged graphics platform combines an Intel Core2 Duo processor operating at up to 2.26 GHz, an Nvidia graphics processor (G72 or G73) and a 10 Gigabit Ethernet network interface card. The SE 2 from GE Fanuc Intelligent Platforms is designed for demanding graphics-intensive applications that will be deployed in harsh environments. Further leveraging GE Fanuc Intelligent Platforms’ recently announced relationship with Nvidia, the SE 2 provides a complete, self-contained single slot solution, responding to the need to minimize size and weight in space-constrained environments. Typical applications for the SE 2 include digital mapping, where the requirement is to render significant amounts of graphics data in close to real time, and distributed aperture sensors that need to acquire and process substantial quantities of visual information. Use of Intel’s latest ‘Penryn’ processor maximizes performance/watt and allows support of larger memory, while the Nvidia graphics processor is capable of achieving its maximum rated clock speed throughout the rugged temperature range, allowing optimum performance to be achieved in the most challenging conditions. System throughput is maximized by the provision of x16 PCI Express between the Intel and Nvidia processors. Standard features of the SE 2 include up to 8 Gbytes of DDR2 SDRAM, four serial ports, six USB 2.0 ports and PS/2 mouse and keyboard ports. The SE 2 is optionally available with a x4 PCI Express interface (replaces the 10 Gigabit Ethernet interface), an onboard solid-state SATA disk drive and a single channel redundant MIL-STF-1553 interface. Five levels of ruggedization—from benign to conduction-cooled—are available. Software support includes Wind River’s VxWorks 6.6, Windows XP and Windows Vista as well as Linux. The availability of OpenGL drivers under VxWorks means that certification to DO178B is achievable. GE Fanuc Intelligent Platforms, Charlottesville, VA. (800) 368-2738. [www.gefanucembedded.com].


PRODUCTS & TECHNOLOGY

DisplayPort Comes to CompactPCI Embedded Board

A 3U CompactPCI multicore board with the CP308-MEDIA extension card is one of the first embedded products to feature the new high-definition digital display interface standard, DisplayPort. With S/P-DIF-Out audio and the stereo audio ports for Line In, Line Out and Microphone, the processor board with the KCP308-MEDIA card from Kontron adds extensive multimedia capabilities to embedded computing. The CP308-MEDIA features the 45nm Intel Core 2 Duo processor running at up to 2.26 GHz, the most powerful embedded Intel GS45 Graphics and Memory Controller Hub, up to 8 Gbytes of energy-efficient DDR3 RAM, and the Intel I/O Controller Hub ICH9M. With its excellent computing and multimedia performance, it is aimed at applications such as: digital signage, passenger information and entertainment, process and quality control, surveillance and security. The CP308-MEDIA features two DisplayPort interfaces on the front for direct-drive, end-to-end communication between the board and different panels. Compared to DVI or LVDS, DisplayPort reduces cabling, connector footprint and minimizes the need for additional monitor electronics for panel control. Furthermore, the latching DisplayPort connector guarantees utmost mechanical stability. With conventional adapters, DisplayPort also connects to HDMI, DVI or VGA monitors. The optical S/P-DIF-Out transmits digital Intel HD Audio. Analog audio signals are transmitted via the stereo audio ports for Line In, Line Out and Microphone. On board the CP308-MEDIA features connectors for COM, SATA, a SD/SDHC socket, a CompactFlash socket and a Mini PCI Express socket. Extending the CP308-MEDIA via an additional Mini PCI Express device like WLAN, GPRS, Network or SSD, the CPU board offers maximum flexibility. The Kontron CP308-MEDIA runs with Linux, Microsoft Windows XP,Get Vista or XP embedded; the upcoming Connected with technology and Windows 7 will also be supported. Highly integrated board support packages support all onboard hardwarecompanies devices. providing solutions now Get Connected is a new resource for further exploration Kontron, Poway, CA. (888) 294-4558. [www.kontron.com].

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into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application 4-Channel Serial FPDP Streaming Recorder Supports 960 Mbyte/s Data StreamEngineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Curtiss-Wright Controls Electronic Systems, a leading designer and manufacturer of rugged deployed for the aerospace Whichever level of subsystems service you require for whatever typeand of technology, defense market, has introduced the new Vortex SDRxL. Get Connected will help you connect with the companies and products searching for. A fully featured off-the-shelf four-channel Serial FPDP (sFPDP) data recorder systemyou forare sensor-to-processor streaming data applica-

www.rtcmagazine.com/getconnected tions combines a 3U rackmount controller with a reliable, scalable storage subsystem. The Vortex SDRxL data logger from Curtiss-Wright Controls Electronic Systems can record and store up to four channels of sFPDP data at rates up to 960 Mbytes/s. The Vortex SDRxL speeds the integration of high-speed data recording capabilities into subsystems designed for instrumentation recording, mission recording and SIGINT/ELINT recording and storage applications. The Vortex SDRxL supports the special data storage methods required by streaming sFPDP-based sensor-to-processor applicaGet Connected technology and companies prov tions. Captured sFPDP data is striped across with multiple FC disks in Get Connected is a new resource for further exploration into pro an SBOD to ensure uninterrupted recording. Because the Vortex datasheet from a company, speak directly with an Application Engine SDR storage technology by-passes the file system, it provides toin touch with the right resource. Whichever level of service you requir tal control over data storage and enables high-speed data access via Get Connected will help you connect with the companies and produc FC from other computers using heterogeneous operating systems. www.rtcmagazine.com/getconnected Vortex Graphical User Interface (GUI) simplifies control over the recorder. This intuitive GUI is fast to learn and easy to set up. After selecting a few parameters, a record or playback session is initiated by simply pressing a button. Accurate time-stamp for playback of critical data Vortex SDRxL data recorders include the RapidReplay hardware system that captures and time-stamps every incoming sFPDP data frame prior to storage. This extreme resolution time-stamping enables the accurate playback of sFPDP data needed for DSP algorithm development. With four channels of 240 Gbyte/s sFPDP data, the Vortex SDRxL, combined with one Vortex SBOD, can support nearly four hours of recording time. To increase the available recording time only requires the simple addition of more external Vortex 3U SBOD Get Connected with companies and units. Time-stamped data is transferred via FC to the SBOD. Configured with sixteen 450 Gbyte FC disks, a single SBOD products featured in this provides section. up to 7.2 Tbytes of storage. The highly reliable FC disks are designed for 24/7 service with MTBF of >1,600,000 hours. www.rtcmagazine.com/getconnected

Products

Curtiss-Wright Controls Electronic Systems, Dayton, OH. (937) 252-5601 x1363. [www.curtisswright.com].

Get Connected with companies and products featured in this section. www.rtcmagazine.com/getconnected

RTC RTCMAGAZINE MAGAZINEJANUARY MONTH 2010 2009

59


PRODUCTS & TECHNOLOGY

Virtex-6 FPGA Module for Radar and Telemetry Applications

A multichannel, high-speed data converter XMC module is designed for connection to HF or IF ports for communications, radar, telemetry and medical systems. This 71620 module from Pentek is the first member of its Cobalt family slated to employ Xilinx’s new Virtex-6 FPGA family. With greater than two times more resources than previous Virtex generations, including new enhancements in digital signal processing, logic and clocking technology, the Virtex-6 family delivers the industry’s most advanced FPGA technology. The Pentek 71620 analog front end features three Texas Instruments ADS5485 200 MHz 16-bit A/Ds delivering wide dynamic range and an input bandwidth of 350 MHz, ideal for signal intelligence, radar, beamforming and undersampling applications. In addition, a dual channel TI DAC5688 800 MHz 16-bit D/A provides two wideband analog outputs. Built-in 2x, 4x and 8x interpolation filters and a digital upconverter translate real or complex baseband input signals to any IF center frequency up to 360 MHz, making the dual D/A extremely flexible for generating many popular communications and radar signals. Four separate DRAM banks of 256 Mbytes each are larger than previous designs. These multiple banks offer flexibility in dedicating separate resources to I/O streams and processor requirements, eliminating the overhead associated with arbitrating for a single, shared bank. While synchronous SDRAM offers a fast, extremely dense memory, its architecture shares a data path for reading and writing. In some applications this shared path creates a bottleneck. To address this, the 71620 can be optioned with QDRII+ SRAM offering very efficient memory with separate read and write interfaces. The QDRII+ banks are each 8 Mbytes deep and provide an ideal memory resource for structures like data streaming FIFOs, an integral part of the board’s advanced DMA engines. In the case of multiple board systems, each 71620 can receive and lock to a front-panel system reference clock. In addition to using the reference to synchronize sample clocks for multiple A/Ds and D/As, the reference can keep the data packet header coherent across the channels of larger systems. The 71620 supports Gen 2 PCI Express as the primary control and data streaming interface. With lane widths up to x8, data can be moved on and off the board at rates up to 4 Gbytes/s. Such rates are invaluable for moving the full bandwidth, multichannel data required in many applications. With dual XMC connectors, the 71620 can support additional protocols like Aurora or RapidIO on the second connector. This is ideal for applications that require high-speed, board-to-board communication paths while still maintaining the PCIe interface. The 71620 XMC is designed for conduction-cooled assemblies, and PCIe versions are also available. Software support packages are available for Linux, Windows and VxWorks operating systems. In addition, Pentek’s GateFlow Design Kit is available for custom IP development. The 71620 is immediately available starting at $11,500. Pentek, Upper Saddle River, NJ (201) 818-5900. [www.pentek.com].

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A 6U CompactPCI SBC Uses Core2 Duo

Using a ruggedized, conduction- or air-cooled design, making it suitable for today’s rugged embedded computing applications, a new 6U cPCI single-board computer from Extreme Engineering Solutions sports an Intel Core 2 Duo processor. The XCalibur4101 is a ruggedized, highperformance solution designed to support the next generation of rugged embedded applications and features. Along with the Core 2 Duo, it offers up to 4 Gbytes of DDR2 ECC SDRAM, 2 Mbyte firmware hub flash (or 1 Mbyte with redundancy) and up to 64 Gbytes of solid-state storage. In addition, there are front and dual rear-panel Gigabit Ethernet ports, front and rear dual-head digital video and two PrPMC/XMC interfaces. The XCalibur4101 offers hot swap support and complies with PICMG 2.0, 2.1, 2.3, 2.9, 2.16. In-house X-ES operating system support includes board support packages (BSPs) for Green Hills Integrity, Wind River VxWorks, QNX Neutrino and Linux. The company offers guaranteed 4-hour technical response to all hardware and software questions. Pricing starts at $8,530 and may vary based on processor speed, memory configuration and ruggedization level. Volume discounts are available. Extreme Engineering Solutions, Middleton, WI. (608) 833-1155. [www.xes-inc.com].

Modules Deliver Full Power to Support Electric Motors

Two new power stage modules support developers of automotive engine control unit (ECU) functions working with electric motors in 12V and 24V applications. A typical application area for these modules from Dspace is the development of components for a 24V electrical system in a commercial vehicle (e.g., for an auxiliary unit like an oil pump or a water pump). The new power stage modules are also perfect for developing comfort electronics. The modules for the Dspace RapidPro system, PS-HCFBD 1/2 (DS1767) and PS-HCHBD 2/2 (DS1768), can be configured entirely by software. They support the control of DC motors and stepper motors, as well as brushless motors such as BLDC motors and synchronous motors. Peak currents of up to 60A and continuous 42A can be reached. In addition, depending on the application, the flexibly configurable output stage of the PS-HCHBD 2/2 (DS1768) can be run in either low-side or high-side driver mode, for example, for valve control. The modular, compact RapidPro hardware provides signal conditioning and power stages for connecting automotive sensors and actuators to prototyping systems. In addition to new power stage modules for electric motors, several modules for various sensors and actuators are also available. dSPACE, Wixom, MI. (248) 295-4704.[www.dspaceinc.com].


PRODUCTS & TECHNOLOGY

Maintenance-Free Ethernet Switches Target Rugged Applications

Two new IP67-compliant Ethernet switches each feature eight Fast Ethernet ports on standard M12 connectors with support for both full- and half-duplex operation as well as high-speed non-blocking and store-and-forward switching with auto-negotiation. Layer 2 switching (IPv4/IPv6) and quality of service (QoS) support with four traffic classes IEEE 802.1p and three-level 802.1q security are standard on the managed RS1 and the unmanaged RS2 from Men Micro. An 8K MAC lookup table with automatic learning and aging is supported as well. Two redundant power supplies provide a nominal 24 VDC, with a 9V to 36V input voltage range. The RS1 can be configured via an HTTP Web server, a command line interface (CLI) such as RS232, Telnet and SSH, or an SNMP version 3. An external dongle can be connected to the service connector to store and update switch configuration. The RS2 can employ an applicationspecific EEPROM that enables it to act similar to a managed switch with fixed settings, giving it features atypical for an unmanaged switch, including port-based priority and VLAN. As part of MEN Micro’s MIPIOS line, the new switches are fanless, maintenance-free and extremely rugged, allowing them to perform reliably in the most demanding environments. Typical applications include extreme and mobile applications found in commercial and industrial environments. The reliable, convection-cooled switches are fault-tolerant and automatically restore themselves, so if a link becomes temporarily unavailable, it will function correctly after the disturbance without the need for a reset or restart. The RS1 and RS2 also have a built-in test mechanism for increased reliability. Two power inputs enable the connection of a backup power source that automatically operates if theGet primary source fails. The switches and also Connected with technology feature Power over Ethernet (PoE) power sourcing equipment (PSE) functionality to supply power to two additional devices on ports 1 and 2. companies providing solutions now Each aluminum switch measures only 8.7” x 5.1” x 2.8” (220 mm x 130 mm x 70 mm). Operating temperature ranges -40°C for to further +70°C,exploration Get Connected is a from new resource into components products, technologies and companies. Whether extendable up to +85°C for short periods according to EN50155 class Tx. The switches have no socketed for exceptional shock and your goal is to research the latest vibration resistance. Internal electronics are prepared for conformal coating. Pricing for the RS1 is $1,733 and $1,153 for datasheet the RS2.from a company, speak directly

Ad Index

MEN Micro, Ambler, PA. (215) 542-9575. [www.menmicro.com].

APIX Starter Kit for Development of Robust, Inexpensive Control

with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products Unitsyou are searching for.

Automotive Pixel Link (APIX) technology was originally developed for transferring image www.rtcmagazine.com/getconnected data in vehicles, and now, with a new APIX starter kit from Congatec, can also be quickly and easily put to use in industrial applications. The APIX transfer process enables the use of ordinary Ethernet cables and makes it possible to simultaneously transmit video data and bidirectional control data as well as the power supply for the control or display units used. The APIX Design Kit consists of a PCI Express add-on card, including the Get with technology and companies prov appropriate operating system drivers, andConnected a remote display unit with integrated touch-screen. The image data, theGet coordinates from the resource touch-screen and the Connected is a new for further exploration into pro from a company, speak directly an conApplication Engine power supply are all transmitted datasheet using a normal Ethernet cable withwith RJ45 in touch with the right resource. levelorofmore service you requir nectors. If high-quality cables are used, distances of up toWhichever 40 meters Get Connected will help you connect with the companies and produc can be covered. The robust APIXwww.rtcmagazine.com/getconnected technology was developed by Inova Semiconductors especially for the automotive industry, although it can also be ideally used for industrial automation solutions and in medical technology, as well as for gaming machines, weighing scales or in the fast growing market for digital signage. Remote displays or control units are often used in the field of automation technology. Until now, relatively expensive and costly “thin clients” or passive solutions have been used for this and these also require expensive special cabling. With APIX, displays and control units can be connected using one single, easily fitted cable, all without any additional network equipment, because APIX provides the power for the remote displays. The PCI Express x1 add-on card has two APIX ports. This expansion card reads directly from the video memory and sends the data to the APIX channels at a current maximum resolution of 800 x 600 pixels. Up to 4 of these cards can be used per system, creating a maximum of 8 APIX channels. The sideband signal data, i.e. the return channel in an APIX solution, is also received by the PCI Express card and made available to the computer. Power over APIX (PoA) is used to supply power to the remote control units andConnected allows a maximum current Get with companies and of 2 amps with a 12-volt supply voltage. products featured in this section. www.rtcmagazine.com/getconnected The receiver unit includes a touch controller, a 7” TFT panel with LED backlight and the “Indigo” chip from Fujitsu Microelectronics Europe (FME), which refines the transmitted signals. Depending on requirements, more complex or encrypted communication is also possible with the display unit. The kit gives users the opportunity to quickly and easily evaluate the APIX display link interface. As well as all the necessary hardware, the kit contains comprehensive documentation, including all the required circuit diagrams, in order to allow the implementation of customer-specific solutions to be designed as easily as possible.

Products

congatec, Cardiff-by-the-Sea, CA. (760) 635-2600. [www.congatec.us].

Get Connected with companies and products featured in this section. www.rtcmagazine.com/getconnected

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61


PRODUCTS & TECHNOLOGY

Tools for Motor Control Improve Efficiency and Performance and Reduce Development Time

Two new low-cost development systems enable the rapid development for motor control systems—one for the control of high-voltage motors and another for stepper motors. Created by Microchip Technology along with related applications notes and free source-code software, these development tools enable rapid designs using dsPIC digital signal controllers (DSCs). The dsPICDEM MCHV Development System is a development tool for the rapid evaluation and design of a wide variety of high-voltage, closed-loop motor control applications using AC Induction Motors (ACIMs), Brushless DC (BLDC) motors or Permanent Magnet Synchronous Motors (PMSMs). The board includes in-circuit debugging circuitry, eliminating the need for a separate debugger for development with Microchip’s dsPIC33 Motor Control DSC families. Additionally, this tool combines a proven motor-control system and Power Factor Correction (PFC) for regulatory requirements. The dsPICDEM MCSM Development Board is a cost-effective tool for creating unipolar and bipolar stepper motor applications. This board enables the rapid development of both open-loop and current-closed-loop microstepping routines using Microchip’s dsPIC33 Motor Control families. This development tool also provides engineers with a control GUI, which allows them to focus on integrating the other application features and fine-tuning the motor’s operation. Five royalty- and license-free software application notes with source code are being released for development, five with the dsPICDEM MCHV and one with the dsPICDEM MCSM. Designers can utilize Microchip’s proven, optimized and efficient code to produce reliable results, while reducing software creation and debug time. Microchip’s free Field Oriented Control (FOC) software libraries enable the development of green motor-based systems. By using these libraries, the engineer can run motors at their peak efficiency and generate the maximum torque using the minimum amount of energy. Microchip’s stepper motor control library enables the development of high-speed stepper motor control applications with variable micro-stepping down to 1/64 of a step. By using closed-loop current control, stepper motors can be run several times faster than their rated speeds with high torque and very-low-noise operation. Included with Microchip’s free MPLAB IDE integrated development environment is an application called the Data Monitoring and Control Interface (DMCI). Using this GUI with a USB cable for communications to the target board via the included Real Time Data Monitoring (RTDM) protocol promotes rapid parameter tuning for different motors. Unlike Microchip, other competitor systems require that the motor be stopped, the source code modified, recompiled, downloaded and the DSC or MCU reprogrammed to see the effect of a control parameter change. The dsPICDEM MCHV Development System is $650. The dsPICDEM MCSM Development Board is $129.99. Microchip Technology, Chandler, AZ. (480) 792-7200. [www.microchip.com].

Compact Atom Solution for Extreme Environments

A COM Express pin-out type-2-compatible computer-on-module is designed for use in extreme conditions. Each component in the microETXexpress-XL from Kontron is selected with the industrial temperature range of -40° to +85°C in mind as well as the necessary tolerances for high reliability with respect to shock and vibration resistance. The microETXexpress-XL is based on the energy-saving Intel Atom processor Z520PT (1.33 GHz) and the Intel US15WPT System Controller Hub. The module offers PCI as well as more sophisticated graphics support with SDVO. Additionally, there are two x1 PCI Express lanes and eight USB 2.0 connections. Via the PCI Express Graphics pin-out, SDVO delivers additional video signals for DVI monitor outputs, SDTV and HDTV television outputs and TV tuner inputs that greatly simplify system graphics design. This special feature makes this 95 x 95 mm computer-on-module ideal for small mobile and extremely energyefficient devices including those used in government / military and transportation applications. Other standard features include: Gigabit Ethernet, Serial ATA, single-channel LVDS and USB 2.0. All Kontron microETXexpress family modules are compatible with the COM Express standard, allowing for easy interchangeability and ensuring design scalability and future migration paths. Kontron, Poway, CA. (888) 294-4558. [www.kontron.com].

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PRODUCTS & TECHNOLOGY

Multi-Axis Motion Controller Executes G-code Applications

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A multi-axis motion controller has been adapted to execute G-code commands. Today, a lot of industrial applications are defined with these types of motions. G-code is a language, used in numerical control programming, that executes various movements such as: piece cutting, profile shaping or drawing, etc. In order to achieve these particular kinds of movement, the numerical control uses basic blocks that carry one orUntitled-8 more words, each word consisting of a letterâ&#x20AC;&#x201D;detailing the function to be performedâ&#x20AC;&#x201D;followed by a number that assigns value to the function (e.g., N0001 G90 G00 Y125 X2 A23 B-1). The TMC-3D from Technosoft translates G-code information into TML commands through the G-code-to-TML converter integrated in the EasyMotion Studio software. The G-code files are imported into EasyMotion Studio and translated to TML commands. After the conversion process, TMC-3D will send the motion sequences to the drives / motors that execute the movements. The TML converter allows you to set the basic movement parameters specific to the G-code: linear axes, cycle start button, choose the measure units, set the Traverse and Feed rates. Technosoftâ&#x20AC;&#x2122;s G-codeto-TML converter supports various G-code words, letters and parameters together with unary and binary operands. TMC-3D is able to control two other Technosoft intelligent drives and also includes a 640W servo drive that may be used to command one of the application axes. The motion programming can be done using PC or PLC motion libraries, or directly at controller level in the TML language. EasyMotion Studio automatically generates all the TML instructions, eliminating the need to learn or write any TML code. Powerful TML instructions such as motion commands, program flow control, I/O handling, arithmetic and logic operations are executed / controlled by TMC-3D. Its role is primarily a managerial one, with responsibilities that include network or slave management. It can perform predefined actions such as stopping the motion on all slaves in case of a node failure, or commanding different homing procedures and other motion profiles on each slave. Technosoft, Bevaix, Switzerland. +41 32 732 55 00. [www.technosoft.com].

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PRODUCTS & TECHNOLOGY

Multicore Networking Platform Provides 10 Gigabit LAN Performance

A 2U server-grade platform uses Intel 5300 Series technology to provide 10 Gigabit Ethernet (2x) and support for a range of highperformance Intel Xeon processors for OEM solutions. Developed for network service applications, the PL-80100 from Win Enterprises features the Intel 5520 chipset (Tylersburg), which supports two socketed processors of the Intel Xeon Processor 5500 Series. The device employs Intel QuickPath Interconnect (QPI), Intel’s new point-to-point interconnect technology to provide highbandwidth, low-latency communications between the processors and chipset. The chipset delivers up to 32 lanes of PCI Express 2.0. As a socketed solution, the Intel Xeon processor 5000 series enables outstanding scalability and performance. The processor family ranges across two, four, six, and in 2010, eight processing cores per integrated circuit (IC) die. In the case of the quad-core processor solution, the PL-80100 provides 12 (i.e., three channels per CPU) 1333/1066/800 MHz DDR3 system memory slots that support ECC and parity protection for internal data paths. Two versions of the unit are available. One offers 10x RJ45 LAN ports with eight GbE LAN ports and two ports of 10 GbE performance. The second version offers 24x GbE LAN ports. The PL-80100 provides a 1+1 redundant power supply, hot-swappable HDD trays and system fan module to address server grade requirements. A modularized expansion system enables the PL-80100 to offer many different connectivity options, such as 10x Gigabit SFP+, Gigabit copper (by-pass function for option), Gigabit fiber (by-pass function optional) and other combinations. The maximum LAN capacity for the unit is 24 GbE ports. PL-80100 supports Windows 7, Windows Vista, Windows Server 2003 and Windows XP 64. FreeBSD and additional Linux versions are supported. Pricing in OEM quantities begins at $2,500, not including the processors or memory. WIN Enterprises, North Andover, MA. (978) 688-2000. [www.win-ent.com].

Compact, Ruggedized, Fanless System Expands Flexibly

A series of compact, rugged, reliable, low-power systems aimed at highreliability data acquisition and control applications is based respectively on field-proven, PC/104-expandable Helios and Athena II single board computers from Diamond Systems. Diamond’s 2-in-1 small form factor SBCs enable complete systems with built-in data acquisition to stand just 1.7 inches tall. The ready-to-deploy Octavio systems can be ordered with a range of standard configuration options, including processor type/speed, case height, integrated DC/DC power supply, DIN-rail attachment bracket and integrated data-acquisition subsystem. Octavio is highly shock and vibration tolerant, and operates fanless over an extended temperature range of -40° to +85°C. Its rugged enclosure was designed to eliminate most internal cables, resulting in enhanced ruggedness and reliability in both fixed and mobile environments. Octavio’s optional built-in data acquisition subsystem provides sixteen 16-bit A/D channels with up to 100 KHz data conversion rate, 512 or 2048 sample FIFO, depending on model, and autocalibration for maximum accuracy. Additionally, the DAQ subsystem provides: four 12-bit analog outputs; 16, 24, or 40 digital I/O lines (depending on model); and counter/timer functions for sample rate control or general-purpose timing. All standard I/O interfaces are accessible via industry standard connectors on the system’s front panel. The front panel also supports I/O from selected members of Diamond’s field-proven PC/104 add-on module line. All Octavio systems come preloaded with a small-footprint Linux 2.6-based operating system, enabling first time use within minutes. Application development based on the system’s optional data acquisition subsystem is greatly simplified due to the inclusion of Diamond’s Universal Driver software, utilities and demo sources. Support for Windows CE 6 is optionally available with Octavio-HLV models, and support for QNX is optionally available with Octavio-ATHM models. Octavio’s pricing—which in volume starts below $550 and varies according to SBC choice, flash disk size, case height and other options—starts at $605 for the Octavio-HLV (800 MHz VortexDX CPU) and $940 for the Octavio-ATHM (500 MHz VIA Mark CoreFusion CPU), at quantity 1. Diamond Systems, Mountain View, CA. (650) 810-2500. [www.diamondsystems.com].

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PRODUCTS & TECHNOLOGY

Quad-Core Blade Server in New CoolShell Package

The principle barrier to higher compute density in modular electronic packaging is the cooling and mechanical stabilization of high dissipation devices, most notably the new breed of multi-core microprocessors and high-performance Graphics Processing Units. The CoolShell technology from Themis Computer provides a thermal and kinetic management system that is stable and stiff, with a conductioncooled Processor Module “shell,” complete with external air flow paths, heat exchangers and impeller assembly combined in a single, field-replaceable unit (FRU). Themis’ CoolShell CS-3U is a modularly maintainable, commercial blade server system that packs an extended complement of processing, memory and IO, into a compact 3U, 17.75-inch deep rackmountable CoolShell Subrack. All modules are replaceable from the front, increasing uptime and significantly reducing maintenance costs. All cable connections are on the FRU front panels, so no rear access is required. The CoolShell CS-3U includes five replaceable modules; a dual socket processor blade, an I/O module that accommodates up to three double high PCI Express controller cards, media plus NIC module and two power supply modules. The CoolShell CS-3U fits in a standard 19” rack. Key CoolShell CS-3U features and specifications include one or two Intel Quad-Core Xeon 5440 series CPUs, up to 64 Gbytes memory and three high-performance dual headed graphical processing units. The blade supports up to 1 Tbyte HDD (SATA drive) in Media Module and five additional 2.5-inch SSD/HDDs in optional storage expansion. There are eight copper Gigabit Ethernet ports (RJ45)—seven of which can be configured using optical-fiber ports (SFP) instead of copper. The unit is designed for environmental robustness and can withstand up to 30G, 25 ms shock and 1G rms vibration (10-2000 Hz). It meets MIL 901d, 810 and 167 and operates at up to 50°C temperature. The CPU electronics are protected from dust and dirt, and it features reduced electromagnetic radiation emission. Linux, Microsoft Windows and Solaris X86 operating systems are supported. Themis Computer, Fremont, CA. (510) 252-0870. [www.themis.com].

Runs fast, stays cool with Intel® Atom™ processor Z5xx Welcome the next generation Intel Atom processor in VersaLogic’s new “Ocelot” single board computer. Take advantage of the new industrial grade processor (-40° to +85°C operation) and legendary VersaLogic quality!

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with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

www.rtcmagazine.com/getconnected

Advertiser Index Get Connected with technology and companies providing solutions now Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

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ACCES I/O Products................................... 26......................................www.accesio.com

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Microsoft Windows Embedded....................2,3................ www.microsoft.com/embedded

American Portwell Technology, Inc.............. 15.....................................www.portwell.com End One Stop Systems. of..................................... Article 67.........................www.onestopsystems.com Products Open VPX and Ethernet Board Showcase........................30,31,32.....................................

BittWare.................................................... 21.....................................www.bittware.com Get Connected with companies and products featured in this section. CMwww.rtcmagazine.com/getconnected Computer............................................. 11.......................................cmcomputer.com

with companies mentioned in this article. www.rtcmagazine.com/getconnected Pentair Electronic Packaging....................... 19..................................www.pentair-ep.com

EDT............................................................ 6............................................. www.edt.com

Phoenix International.................................. 63.................................... www.phenxint.com

Get Connected

Get Connected with companies mentioned in this article.

Get Connected with companies and products featured in this section.

Embedded World 2010............................... 53................ http://www.embedded-world.de www.rtcmagazine.com/getconnected

www.rtcmagazine.com/getconnected Real-Time & Embedded Computing Conference.................55................... www.rtecc.com

Extreme Engineering Solutions, Inc.............. 4....................................... www.xes-inc.com

Red Rapids, Inc.......................................... 14...................................www.redrapids.com

Intel........................................................... 43...........................................www.intel.com

RunCore..................................................... 49..................................... www.runcore.com

Interface Concept....................................... 25........................www.interfaceconcept.com

TRI-M Systems.......................................... 35..........................................www.tri-m.com

ISI Nallatech Inc......................................... 20................................... www.nallatech.com

Vector Electronics & Technology, Inc........... 17.................................www.vectorelect.com

Lippert Embedded Computers..................... 33................................... www.lippert-at.com

VersaLogic Corporation.............................. 38..................................www.versalogic.com

Mentor Graphics......................................... 47.......................................www.mentor.com

VersaLogic Corporation.............................. 65..................................www.versalogic.com

Mercury Computer Systems.................................................................www.mercury.com

WinSystems............................................... 68................................www.winsystems.com

Micro Digital, Inc........................................ 63.....................................www.smxrtos.com

RTC (Issn#1092-1524) magazine is published monthly at 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673. Periodical postage paid at San Clemente and at additional mailing offices. POSTMASTER: Send address changes to RTC, 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673.

66

JANUARY 2010 RTC MAGAZINE


Small SBC Supports Industrial Control, HMI, Networking and I/O If your application needs a compact, industrial PC with fanless -40° to +85°C operation, check out WinSystems’ PPM-LX800. It is designed for embedded, space-limited, and low power applications requiring reliability and long-term availability. The PPM-LX800 runs Linux, Windows® XP embedded, and other x86 real-time operating systems, and comes with a wealth of on-board I/O with free software drivers. Features include: • AMD LX800; x86-compatible CPU • Compact size, 3.6" x 3.8" (90mm x 96mm) • Socket for a bootable CompactFlash • High-resolution video controller provides • CRT resolutions up to 1920 x 1440 • Panel resolutions up to 1600 x 1200 • Custom splash screen on start up • 10/100 Mbps Intel Ethernet controller • Four serial ports with FIFO • PS/2 keyboard and mouse controller • +5V only operation • Ultra DMA100 EIDE controller for 1 or 2 devices • PC/104 and PC/104-Plus expansion connectors • AC97 Audio with MIC, Line In, and Line Out • -40°C to +85°C extended operational temperature • Long-term product availability • Responsive and knowledgeable technical support • Quick Start Kits offered for easy software development Contact our factory application engineers for additional product information, custom configurations, and pricing.

WinSystems also offers... Open Frame Panel PCs

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Enclosures

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Call 817-274-7553 or Visit

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Ask about our 30-day product evaluation.

TM

715 Stadium Drive • Arlington, Texas 76011 Phone 817-274-7553 • FAX 817-548-1358 E-mail: info@winsystems.com

RTC magazine  

January 2010

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