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The magazine of record for the embedded computing industry

December 2009

Unleashing the Power OF


High Availability Moves Beyond Telecom SUMIT–ISM Merges Legacy and Advanced I/O 2009 Editorial Index An RTC Group Publication

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Unleashing the Power of Multicore

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5Editorial Life in the Cloud (sans Harp and Halo) Insider 8Industry Latest Developments in the Embedded Marketplace 10 & Technology 45Products Newest Embedded Technology Used by Industry Leaders Small Form Factor Forum Embedded Chicken


Annual Article Index 2009



AMCC Becomes AppliedMicro— with the Focus on Low-Power Processing Tom Williams

solutions engineering High Reliability in Small Spaces


High Availability Moves beyond Telecom Bill Yaman, GoAhead Software

industry insight

system integration Unleash the Power of Multicore

Silicon and Virtualization Software—Made for 32Multicore Each Other Rob McCammon, Open Kernel Labs

36The Multicore Developer’s Toolbox Technology, Multicore and Virtualization. Are You 42Embedded Keeping Up? David N. Kleidermacher, Green Hills Software

Casey Weltzin, National Instruments

Standards Update

– Uniting Legacy and 24 SUMIT-ISM Advanced I/O in a Stackable Form Factor Gary Harris, VersaLogic

Digital Subscriptions Avaliable at RTC MAGAZINE DECEMBER 2009


DECEMBER 2009 U.S. Postal Service Statement of Ownership, Management and Circulation Required by 39 USC 3685.1)Title of Publication: RTC magazine. 2) Publication Number 10921524. 3)Filing Date 10/01/2009 4)Frequency of issue is monthly. 5)Number of issues published annually: 12. 6)Annual subscription price: n/a. 7)Complete Mailing Address of Known Offices of Publication: The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Orange County. 8)Complete Mailing Address of Headquarters of General Office of Publisher: The RTC Group 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Orange County, California. Publisher: John Reardon, The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Orange County, CA 92673. Editor: Tom Williams, 245-M Mt. Hermon Rd.BMP#F, Scotts Valley, CA 95066. Managing Editor: Marina K.Tringali. The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Orange County, CA. 10) Owners: James Lizzio, Jim Reardon, John Reardon, Zoltan Hunor. The RTC Group; 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Orange County, California.11)Known Bondholders Holding 1 Percent or More of Total Amount of Bonds, Mortgages, or Other Securities: None. 12)Tax Status: The purpose, function, and nonprofit status of this organization and the exempt status for federal income tax purposes has not changed during the preceding 12 months. 13)Publication Title: RTC magazine. 14)Issue date for Circulation data: August 2009 RTC magazine. 15)Extent and Nature of Circulation: average number of copies each issue during preceding 12 months (Net press run): 20,001. Number copies of single issue published nearest to filing date: 20,001 a)Total number of copies (net press run). b)1. Paid/requested outside-county mail subscriptions stated on form 3541. (Include advertiser’s proof and exchange copies)/Average number copies each issue during preceding 12 months:18,322, number copies of single issue published nearest to filing date: 18,535. b) 2. Paid in-county subscriptions (include advertiser’s proof and exchange copies)/average number copies each issue during preceding 12 months/ number copies of single issue published nearest to filing date: n/a. b)3. Sales through dealers and carriers, street vendors, counter sales and other non-USPS paid distribution/average number copies each issue during preceding 12 months: n/a, number copies of single issue published nearest to filing date: n/a. b)4. Other classes mailed through the USPS/average number copies each issue during preceding 12 months: n/a, number copies of single issue published nearest to filing date: n/a. c)Total paid and/or requested circulation [sum of 15b. (1), (2), (3) and (4) average number copies each issue during preceding 12 months: 18,322, number copies of single issue published nearest to filing date: 185,535. d) Free distribution outside of the mail (carriers or other means)/ average number copies each issue during preceding 12 months: n/a, number copies of single issue published nearest to filing date: n/a. f) Total free distribution (sum of 15c. and 15e.)/ average number copies each issue during preceding 12 months: 1,611 number copies of single issue published nearest to filing date: 1,414 g) Total distribution (sum of 15c and 15e)/ average number copies each issue during preceding 12 months:19,933 number copies of single issue published nearest to filing date: 19,949. h) Copies not distributed/ average number copies each issue during preceding 12 months: 68, number copies of single issue published nearest to filing date: 52. I) Total (sum of 15f and g)/ average number copies each issue during preceding 12 months: 20,001 number copies of single issue published nearest to filing date: 20,001. i) Percent paid and/or requested circulation (15c divided by 15f times 100)/ average number copies each issue during preceding 12 months: 91.91, number copies of single issue published nearest to filing date: 92.91 16. Publication of statement of ownership. Publication will be printed in the December issue of this publication. 17)Signature and title of the editor, publisher, business manager or owner: Marina K.Tringali (Managing Editor)10/01/2009. I certify that all information furnished on this form is true and complete. I understand that anyone who furnishes false or misleading information on this form or who omits material or information requested on the form may be subjected to criminal sanctions(including fines and imprisonment)and/or civil sanctions (including multiple damages and civil penalties).



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Tom Williams Editor-in-Chief

Life in the Cloud (sans Harp and Halo)


ometimes a minor observation can lead you to realize that the world around you is fundamentally changing. Last week I went in for my yearly physical, which of course always involves an EKG. Usually, the nurse wheels in a cart with a cool-looking EKG machine and I obviously wonder whose boards and modules I might find if I opened it up. This time was different. The nurse wheeled in the cart but there was no EKG machine. Instead there was a normal, everyday laptop PC and a cluster of probes. The probe wires went into a small hub that connected to the laptop’s USB port. The entire functionality of the EKG machine was now in software on the PC. Now, this is not in itself a major development; it’s actually fairly predictable. But it showcases two major things that involve the use and nature of embedded systems. First, the processor side of most designs is becoming commoditized and driven by the semiconductor manufacturers. Whether the processor is a laptop PC or an Atom or VIA-based COM module, OEMs mostly do not design the CPU side, they select it from what is available on the market. The corollary, then, is that the major design challenge is on the I/O side. You still can’t buy a set of EKG probes at Fry’s Electronics. The same goes for the I/O subsystems of a vast number of embedded controllers, instruments, data acquisition systems and more. Many, many of these require detailed engineering to enable them for their specific applications. The second, equally obvious realization is that the other big design challenge is in the software. Older EKG machines would spit out a strip of paper with the waveforms on it, which the doctor would examine, perhaps discuss with the patient, make a few notes on and then fold up and stick into a folder. Now that same EKG data is in memory and disk, and although it is presented in the visual form familiar to the doctor, the data is also available for analysis such as flagging an alert or giving quantitative values for diagnosis. But the biggest thing is that the data is available online—to quickly send to a specialist for consultation—or for whatever purposes may lie beyond such as statistical analysis with the results of thousands of other patients, for correlation with other medical data like diet, medications. The possibilities are endless and that’s the point.

Now extrapolate to other small medical devices like O2 meters, blood analyzers and more. MRI machines are not based on PCs, but their basic data is digital. But now let’s multiply this by everything, by all the embedded controllers and instruments out there that have their I/O tendrils into the real world. They are not just pasting labels on bottles, running milling machines, industrial processes, transportation systems and climate controls. They are also collecting data. At first the data was intended for use by their own internal software, but thanks to today’s increasingly universal connectivity, that data is potentially available for use by applications both immediate and yet unheard-of. Today, embedded systems represent not only devices for control and automation; they are also the means for connecting the real world to “the cloud.” For example, an organization wishing to monitor and analyze data as diverse as machine power usage, lighting, plant environmental conditions and more will not have to install separate data collection devices. Mostly the data will be available as a byproduct of the already installed control and automation systems and can be used and correlated across different domains at the IT level to implement all manner of management functions. Already transportation and fleet management systems are pulling together data from GPS, passenger counters, fuel consumption monitors, sensors in bearings, RFD monitoring of freight and traffic conditions for efficient routing, maintenance scheduling and payload tracking by pulling different aspects of this data together in different applications. The convergence of the small embedded device with “the cloud” will open up huge new areas of innovation at the macro level as more and more devices are connected at the micro level. Software at the middle level—running on all those powerful processors we sometimes think have nothing to do—will have the ability to prepare data in preprocessed values and formats to make it instantly usable at the IT level. And have no doubt that clever minds at the IT level will be thinking of ever more creative and useful ways they can use that data to make their own overall operations more efficient and cost-effective. Break out the harps and halos. RTC MAGAZINE DECEMBER 2009


Avalue Technology Inc. 200 Tornillo Way, Suite 210 Tinton Falls, NJ 07712 W (732) 578-0200 P (732) 578-0250 F

Executive Letter All industries are now focused on delivering Green solutions and lowering costs. Avalue conducts its business in a manner that respects, preserves, and improves the environment. The company is committed to total quality management that applies to our full range of standard products, as well as our design and manufacturing services. Avalue offers a series of low power products based on the latest technologies to provide green solutions. Our all-in-one Fanless Touch Panel PC products are capable of fanless operation, which increases overall reliability. This in turn, reduces maintenance effort and total cost of ownership for our customers. With a wealth of OEM/ODM experience, Avalue is capable to quickly transform your ideas into viable computing solutions. Industry today demands more custom solutions however the funding is not always available. Avalue therefore is introducing a new Advanced Micro Platform which allows our customers to build the solutions they require at a minimum cost. The new 3.5” Micro Module supports two PCIe Mini Cards that allow for easy expansion. In addition, we offer five standard Application Modules with unique features for various industries. The modules can also be customized to fit your specific requirements.

PPC-22W03 Fanless all-in-one solution is a great workstation or information terminal. • Fanless Multifunctional Touch Panel PC • 22” WSXGA / 17” SXGA / 15” XGA • 5-Wire Resistive Touchscreens • Intel Atom N270 1.6GHz CPU • 1GB DDR2 Onboard Memory • Speakers, Dual Gigabit Ethernet, 1 COM & 4 USB Ports • 2.5” HDD, SSD or CF • Programmable Function Keys • Desktop Stand Included • Economical Solution • Optional 802.11n Wi-Fi, MSR & RFID • Optional Custom Logo and Color

ECM-945GSE+ Advanced Micro Platform is designed to meet your applications needs. • Fanless Advanced Micro Platform • Intel Atom N270 1.6GHz CPU • 1GB DDR2 Onboard Memory • USB, SATA, & Gigabit Ethernet

Avalue is committed to providing the best service to our customers. We have a local support team based in New Jersey that is readily available to serve you. Please contact Avalue USA with any product inquiries or project requirements and we look forward to a strong partnership. Thank you. Sincerely, Alice Liu Founder and Chairperson of Avalue Technology, Inc.

• Customize your own Application Module Including: • Optional Application Modules: • Basic (AUX-301) • KIOSK (AUX-302) • Networking (AUX-303) • Automation (AUX-304) • Mobile (AUX-305) • Optional Accessories: • Wi-Fi, TV Tuner & HD Accelerator • SSD with Operating System • Complete LCD Kits with Cabling


Adv dva vance nc ed Platform Advanced Adva nce ce ce d Micro M Featuring Intel® Ato Atom omTM N270 1.6GHz CPU, 945GSE Chipset, 82538V GbE and 1 1GB GB DDR2 Onboard Memory Fanl Fa nles e s and a d Reliable an Reli Re liab able le Fanless Witth onboard CPU, Memory and support of fanless o With operation. A Ad Add an SSD to develop a system with no moving parts.

Po P owe werr Saving Savi ving g and and d Cost-effective Cos C os stt-ef e fe ecttiv ve Power Sim Simplified S mplified CPU module with reduced legacy I/O design minimizes down. m min nimizes the power consumption and keeps the cost down

Embedded Em E mbe bedd dded ed OS ed OS Support S pp Su ppor o t or Windows W Win ndows XP Embedded and WinCE.NET BSP available.

Sc S cal alab abl blle e Platform P Pllla atf tfor tfor o m Scalable Use the CPU module standalone or add an ap Use application module features. mo odule and PCIe mini card for additional featu

Dual PCIe Dual P Du C e Mini CI Mini Mi ni Card Car a d for for High High Hi h Spee Sp eed Expansion E pa Ex ans nsio io on Speed Add d up to two high speed devices and take full advantage of h high speed PCI Express interface interface.

Wide Wide W de S Selection elec el e ti tion n of of Application A Ap pp pllic icat cat a io on Modules M du Mo dule dule es Five ready to use application modules, each offers unique feat features. We also provides customization services

Application A li ti Modules M Mod d lles 15~28VDC Input Smart Battery Amplified Audio PC104 RS-232/485/CAN/USB Socket MODEM i-Button I/F GPIOs Touch Screen Controller GPS /Gyro SATA CF


ν -ν -------ν


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----4/0/0/2 -ν ν ----

PCIe PCI C Mini Mi i Cards C d


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ν ν ν -2/0/0/1 ----ν ν

HD Enhanced Video Accelerator


HDTV Tuner with coaxial cable


802.11a/b/g/n mini card with 3 PIFA antennas

Accessories SSD and Embedded OS :

Run your application faster and keep your data safe 2.5” SATA TA SSD

CFast Ready

Others :

LCD Kits :

Everything you need to light up your bright ideas LCD-07W0-01 7” LCD Kitt

LCD-08W9-01 8.9” 8.9 LCD Kit Kit

LCD-10W1-01 10.1” LCD Kit

Power Adapter with Locking Connector

Custom Cable Custom cable that fits your application and budget

Avalue Technology Inc.

200 Tornillo Way, Suite 210, Tinton Falls, NJ 07712

Tel: (732) 578-0200 Fax: (732) 578-0250 E-mail:


INSIDER DECEMBER 2009 NASA’s Human-Robotic Systems Communicate Using PublishSubscribe Middleware NASA is using middleware from Real-Time Innovations (RTI) to control a fleet of experimental robots. The NASA Human-Robotic Systems Project is developing four prototype robots at four major research centers. The robots share a network data architecture that uses RTI middleware. The Human-Robotic Systems Project includes four robots with four very different missions. NASA’s Ames Research Center in California is building a robot called K10. Because it carries an array of cameras and laser scanners, this robot can operate in an unstructured environment by itself or with human oversight. ATHLETE, a large, six-limbed robot built at the Jet Propulsion Lab, is designed to transport large payloads across a wide range of terrain, including steep slopes and rocks. Johnson Space Center has built a Lunar Electric Rover—or LER—that could transport astronauts across long distances on the moon or Mars someday. Finally, Langley Research Center is building a crane-like robot called the Lunar Surface Manipulator System (LSMS) to help with assembly and loading missions on planetary surfaces. These systems are prototypes for vehicles that will someday operate on extraterrestrial surfaces. Today, the prototypes are being tested in harsh analog environments. For instance, during the summer, K10, ATHLETE and the LER spent weeks at Black Point Lava Flow in Northern Arizona. All of these robots will sometimes be “teleoperated” with direct joystick control. This requires high-speed communications with the operator. At other times, these robots will be operated with long transmission delays over low-bandwidth communication links. In addition, each system must integrate many other applications, including sensors, graphical interfaces and navigation. The robots also run a variety of operating systems, including Linux, Mac OS, VxWorks and Windows. All the NASA robots are designed to share a common data communications interface. This saves significant deployment costs, reduces training requirements and leverages code and experience between the centers. Someday, when NASA launches the systems, having only one communications architecture will eliminate the need for duplicate testing, simplify operator equipment and reduce ground staffing. The Data Distribution Service (DDS) for Real-Time Systems standard supports very flexible service parameters. NASA has found that they could adapt the middleware to the unique needs of each robotic system. RTI Data Distribution Service provides a messaging and integration infrastructure for demanding, missioncritical distributed applications. It combines deterministic performance, low latency, high throughput and fault tolerance into a fast, scalable architecture for real-time systems. By enabling loosely coupled integration, the solution significantly reduces long-term software maintenance costs. Individual subsystems may be modified, added or upgraded without impacting existing software.

Cavium Networks to Acquire MontaVista Software

Cavium Networks has announced that it has signed a definitive agreement to acquire MontaVista Software for $50 million, comprised of approximately $16 million in cash and approximately $34 million in Cavium Networks common stock. The deal is expected to close in December 2009. This acquisition is intended to increase Cavium’s software and services revenue, and is ex-



pected to be gross margin and non-GAAP earnings accretive in 2010 and beyond. After the acquisition, MontaVista Software will run as a separate operating unit and will retain the MontaVista brand name. In addition, Cavium Networks says it will continue the MontaVista business model and support embedded Linux on multiple architectures from multiple processor vendors. MontaVista will maintain its own dedicated and focused engineering, sales

and product management staff. According to Cavium, MontaVista’s customers and partners will see no change in customer facing field operations, and the Webbased support and product download sites will be maintained.

PICMG Adds RapidIO for AMC Modules

PICMG has announced the adoption of the AMC.4 specification, which adds RapidIO inter-

connects to PICMG’s Advanced Mezzanine Card (AdvancedMC) family. RapidIO addresses the high-performance embedded industry’s need for reliability, increased bandwidth and faster bus speeds in an intra-system interconnect. The architecture is a high-performance, packetswitched, serial technology that is widely used in the signal processing, networking and communications markets. The AMC.4 specification is a subsidiary to PICMG’s AMC.0 specification that defines the mechanical, interconnect, management, power and thermal requirements for the industry standard mezzanine. The AMC.4 specification defines RapidIO implementations on AdvancedMC and helps support PICMG 3.5, which defines RapidIO on AdvancedTCA modes. The new specification includes standard implementation guidance for specific configurations like 1x and 4x RapidIO.

Wind River and Kontron Sign Distribution Agreement for VxWorks and Linux

Wind River and Kontron have announced a global, multi-year agreement under which Kontron will distribute Wind River’s VxWorks and Wind River Linux operating systems. This agreement extends a decade-long collaboration, and is expected to extend the software and service offerings of Wind River and Kontron. The two companies will initially target the industrial, medical, military and aerospace, transportation, and networking market segments. Kontron also joins the Wind River Partner Validation Program, initially with its Kontron nanoETXexpress-SP module validated for use with VxWorks 6.7.

By working together to validate Wind River’s embedded operating systems with leading partner software and hardware, Wind River and its partners are together providing a pre-validated solution stack to directly address integration costs, time-to-market and long-term support. Under terms of the distribution agreement, Kontron will be able to resell VxWorks production licenses, and also agrees to work with Wind River to proliferate Wind River Linux for use by joint customers. Wind River will continue to provide hardware and software tools, development environments, source code and support contracts for joint customers.

ZigBee Alliance and the American Telemedicine Association to Collaborate

The ZigBee Alliance and the American Telemedicine Association (ATA) will educate both health care professionals and consumers on benefits of telecommunications technologies as part of a new liaison agreement. The groups will focus on the many capabilities of ZigBee Health Care, an open standard for secure monitoring and management of noncritical, low-acuity health care and wellness services. ZigBee Health Care is designed to reduce patient care costs while improving care and quality of life for patients and consumers. ZigBee Health Care offers the ATA, a readyto-implement telehealth solution featuring interference-free and secure wireless connectivity, capable of supporting many common non-critical medical devices. It also provides a robust network suitable for secure, remote patient monitoring and

one that helps aging and physically challenged people remain independent. The ZigBee Alliance and the ATA will work together to advocate telecommunication solutions to diverse groups ranging from traditional medicine, academic medical centers, technology and telecommunications companies, e-health, medical societies and government, emphasizing the benefits telecommunication technology provides in improving the quality and efficiency of medical care to patients. ZigBee Health Care provides a global, open standard for interoperable wireless devices enabling secure monitoring and management of non-critical, low-acuity healthcare services targeted at chronic disease management, obesity and ageing. It provides full support for IEEE 11073 devices. The standard is designed for use in homes, fitness centers, retirement communities, nursing homes and a variety of medical care facilities.

NVIDIA and Partners Form Computing Development Ecosystem

Nvidia and its ecosystem partners will deliver, over the next few months, a broad set of software releases to developers using GPU Computing in their work. These updates feature major releases across a broad spectrum of GPU Computing development languages, tools and libraries. Included are updates from Nvidia for its CUDA C compiler, with additional support for C++ and its upcoming GPU codenamed “Fermi.” Nvidia is also releasing its R195 driver that includes new extensions to its OpenCL 1.0 conformant driver and toolkit, and a beta release of the Nvidia

codenamed Nexus, the industry’s first development environment for massively parallel computing, which is integrated into Microsoft Visual Studio. Alongside Nvidia’s own updates, several partner releases from industry leaders in software tools are available now, including The Portland Group’s CUDA Fortran solution, Allinea’s Distributed Debugging Tool (DDT) and the TotalView debugger. Among the updates to Nvidia and its partners’ parallel computing development tools are the following: CUDA Toolkit 3.0 Beta: With the CUDA Toolkit 3.0 Beta, developers can start developing applications today for the Nvidia Fermi architecture. This beta release includes features such as ECC reporting, Dual DMA Engine, Concurrent Kernel Execution and Nvidia Fermi HW debugging support in cuda-gdb. Performance profiling is included for both CUDA Visual Profiler and the OpenCL Visual Profiler. Also included is support for a new unified interoperability API for Direct3D and OpenGL including Direct3D 11. OpenCL 1.0 Extensions: New extensions include support for double precision, OpenGL interoperability and the new OpenCL Installable Client Device (ICD). These new features supplement existing Nvidia-only support for 2D image, 32-bit atomics and byte addressable stores. Nvidia ‘Nexus’, the codename for the development environment for massively parallel GPU applications, integrated into Microsoft Visual Studio IDE: Comprised of a Debugger, Performance Analyzer and Graphics Inspector, this beta release gives GPU Computing developers an immediate boost in productivity through common and easy to use tools.

Report Says Graphics Add-in Board Market Rebounds in Q3’09

While a market rebound for graphics add-in boards (AIBs) didn’t occur in sync with the broader graphics hardware markets, it did eventually materialize in the third quarter, according to a report from Jon Peddie Research. The market (along with most others) had suffered a major drop in Q4’08. Volume flattened in the first quarter as draineddown inventories regained some lost weight, and Q2’09 mercifully showed demand stabilizing and more evidence the market had bottomed. Looking toward the third quarter, Jon Peddie Research had been expecting a bounce in the second half, with the first signs to be manifested in Q3’09. And to the relief of many, that’s how the story unfolded. The quarter saw 20.3 million graphics cards shipped, up 21.0% sequentially, a particularly robust number considering the two major vendors were on the tail end of product cycles. Even in the context of a year-over-year measure, the quarter’s 7.2% decline was significantly more moderate than had been seen in the previous quarters.





Colin McCracken & Paul Rosenfeld

Embedded Chicken


e wouldn’t want to be an SBC vendor in today’s small form factor market. As always, the new processor/ chipset treadmill from Intel and VIA continues to churn at a pace to make the average board vendor collapse with exhaustion. You finish releasing Atom or Nano boards in umpteen different form factors and bus interfaces just when new processors and chipsets hit the streets. And you do it all again. And again. And that’s not even the worst part. All your competitors are doing the same thing, with the same chips, in the same cookie cutter form factors. It’s the worst kind of commodity market— high investment with low product differentiation. No wonder North American and European board vendors fear the low production costs achieved in the Far East. For I/O vendors, it’s another story entirely. Digital and analog I/O is pretty much the same today as it was in the 1890s— oops, we mean 1980s. Sure, incremental improvements in feature sets or increased functional density occur every once in a while. But RS-232 is RS-232. Here, the wide variations in performance and feature set enable a supplier to stake out unique territory and to dominate that territory for years. Once designed into an embedded application, the I/O that drives that application is usually locked for life. CPUs may come and go, but the I/O portion of the application is unassailable. Changing the I/O would affect the application software, validation, FDA approval, etc.—completely out of the question. So what’s a self-respecting I/O vendor to do with his/her R&D dollars? Nibble away at other turf knowing that qualification of a new I/O board in an existing application has little chance of happening? We believe the I/O vendor community can take a leadership role as embedded technology moves grudgingly from older parallel bus technologies (ISA and PCI) to new high-speed serial bus technologies (PCI Express, USB). For years we’ve heard the same argument—“we don’t need the speed.” But it’s no longer a sufficient excuse to keep one’s head in the sand. Like it or not, the processor and chipset suppliers who drive the entire



embedded application spectrum are going to make life hell for designers until the I/O community ponies up to the new bus architectures. So now we move to argument number two. “I don’t want to do any I/O cards with new bus architectures or form factors until there are SBCs on the market to plug into.” Ever think that the SBC vendors feel the same way? “We don’t want to support a new expansion bus until there are I/O cards that plug into it.” What is this, a giant game of embedded chicken? The best path, as usual, is somewhere in the middle. The SBC vendors have little choice but to follow the processor/chipset path or fall off the treadmill and die. What they do, however, is stand on their heads to provide compatibility with legacy I/O, adding cost and complexity for everyone. It’s time for the I/O community to take its collective head out of the sand and realize that it is the I/O vendors, not the SBC vendors, who control how and when the new bus and form factor technologies will achieve critical mass. It’s the ecosystem, stupid! I/O vendors are going to have to take a little risk—and start converting their product catalog to new serial bus and form factor technologies before a broad set of SBCs hits the streets. Only if the I/O vendors take the lead on bringing these new bus and form factor technologies to market will the small form factor community stop appearing as if they are running downhill backwards. The risk is small. The processor and chipset suppliers will see to that. The SBC vendors have no choice. Return on investment may take longer than many would like. Such is the cost of progress. And to be blunt, we’re not advocating a toe-in-the-water approach here either. It’s jump in the pool time. You can hold your nose, but you need to be wet all over. So, Mr. and Ms. I/O Vendor, you need to convert your product catalog to PCI Express or USB or SPI or all three. Now. Every month you wait is another month the entire small form factor community continues to grasp at obsolete straws that Intel abandoned generations ago. And you know who’s going to win. Again!

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editor’s report

AMCC Becomes AppliedMicro—with the Focus on LowPower Processing RTC sat down recently with newly renamed AppliedMicro’s VP of Engineering, Vinay Ravuri, to discuss some of the challenges of producing more power-efficient, lower-cost silicon while retaining performance—a goal his company has publically committed to. by Tom Williams, Editor-in-Chief


lectricity—we’re using more of it and embedded computing is the 30-year-old it’s costing more. And so much of it company formerly known as Applied that we use is wasted, simply dissi- Micro Circuits Corporation (AMCC), nies providing solutions now pated as heat,and which requires more which ion into products, technologies companies. Whethereven your goal is to research thehas latestrenamed itself AppliedMicro ation Engineer, or jump to a in company's technical page, the goal of Get Connected is to put youits logo to have a green electricity the form of cooling systems (and redesigned you require for whatever type of technology, and strategies. It is no great revelation to color). It has also divested itself of a diand products you are searching for. see that semiconductor manufacturers are vision that it felt was not in line with the well aware of this and are making huge new focus. AppliedMicro sold its 3ware efforts to reduce power consumption and storage division to LSI so it could conincrease efficiency. This results not only centrate on its fabless business model. in lower costs but also helps bring embed- According to VP of Engineering, Vinay ded intelligence into ever smaller spaces Ravuri, “One of the goals is to drive the in terms of applications—places where company’s technology toward reducing things like 32-bit CPUs would have been energy consumption by as much as 50 unimaginable only a short time ago. percent, and that is better than the indusMaking a major commitment to try average.” If power and heat dissipation are isfocus on energy-efficient solutions for sues in small embedded devices, they are Get Connected a huge and growing challenge in large with companies mentioned in this article. installations like the data center. As the world moves to an all-IP communica-

End of Article


DECEMBER 2009 RTC MAGAZINE Get Connected with companies mentioned in this article.

tions infrastructure, we are looking at extremely rapid growth in global IP traffic, and this will be made even more extreme by the demand for high-performance connectivity to service the growing traffic in high-definition video (Figure 1). In addition, with a large portion of industrial Ethernet and long-haul networks moving to 10 Gbit/s, there will be increased demand for power-efficient transports such as OTN to handle legacy technologies such as SONET until the world transitions into an all-IP infrastructure. All this translates into increased electricity use and the opportunity to serve these markets, which is what AppliedMicro has decided to focus on. A snapshot of the company’s view of power consumption paths is shown in Figure 2. Interestingly, they have decided on a fabless business model, which puts them in partnership and cooperative relationships with both customers and fab companies. Currently, AppliedMicro is working closely with Taiwan Semiconductor Manufacturing (TSMC) and has gone to a bulk CMOS process at 40nm. The company has also announced that it is targeting a 28nm process for many of its system-on-chip products, which are primarily based on the Power architecture. Such a strategy involves huge commitments on the part of fab partners, who must be deeply involved with the AppliedMicro’s process engineers. It also requires building the fab partner’s confidence to invest in the advanced equipment needed to support these smaller geometries and processes. Of course, simply shrinking the geometry is not the whole solution of power reduction. It can even produce complications due to the fact that even reduced power consumption has less thermal mass to dissipate the heat that it does produce. According to Ravuri, “You can’t just marginally reduce the geometry and expect a huge power reduction. There are several other things you have to do.”

editor’s report










Business Consumer



0 2009





*Per Billion Bytes Per Month

Figure 1 Global IP growth by sectors 2009 – 2012. (Source: AppliedMicro)

100B kWh

U.S. Datacenter Electrical Consumption Historical Energy Use

140 120

Annual electricity use (billionkWh/year)

Among these “other things” are innovative circuit design and intelligent power management within the SoC. And here, of course, is where the details become a bit sketchy, because optimizing these technologies is what lies at the heart of AppliedMicro’s efforts. Despite all the publicity we’ve heard about intelligent power management for things like battery conservation, Ravuri doesn’t seem too impressed. “Typical processors in the past really didn’t pay much attention to power management,” he says. On the other hand, he notes, “You can build efficient processors and dissipate as much heat as possible but that doesn’t mean your processor is not being used. If it’s still running, it’s still consuming energy.” Processors with different levels of sleep mode are, of course, fairly familiar, but Ravuri says there is no real standard way of using sleep modes. That would seem to imply that the developer is left on his or her own to figure out the optimal way of utilizing available sleep modes for any given application. Putting the CPU into too deep a mode may affect critical performance, while not putting it to sleep in certain situations might adversely affect power consumption. These design challenges are certainly not going to go away, but Ravuri is announcing that AppliedMicro is taking a somewhat more hardwarecentric approach to power management. This may be aided by the fact that the devices are SoC, which include the Power processor architecture plus other elements and peripheral circuits that would not be on-chip in the case of a general microprocessor. “We have these elements inside the device that software can control, but some of the intelligence is actually embedded within the hardware itself, which makes it easier,” he says. Here again, the deep details are part of AppliedMicro’s “secret sauce,”

Future energy use projections

100 80 60 40 20 0 2000




Historical Trends






Current Efficiency Standards





Figure 2 The overall consumption of power by systems such as data centers and the enterprise will continue to rise. The challenge is to reduce the rate of that increase. (Source: AppliedMicro) RTC MAGAZINE DECEMBER 2009


editor’s report

but Ravuri did mention the example of energy-efficient Ethernet, which is a proposed IEEE standard 802.3az, so we may speculate that this example is the inspiration for other proprietary techniques being developed in-house by AppliedMicro. Energy-efficient Ethernet involves intelligent MAC hardware that can detect the load and automatically negotiate the link downward in cooperation with the peer.


Untitled-5 1


Of course, how low to negotiate and under which circumstances is still a design decision, as is how absolutely low you can go and not risk unacceptable packet loss when an application or the operating system decides to override the power saving mode. It will be interesting to see, once actual products are rolled out with hardware-based power management functionality, ex-

12/11/09 2:20:49 PM

actly what choices and techniques will be offered to system developers and the nature of the decisions they will then need to make to optimize power use and performance. The strategy then is the combination of advances in process technology and basic circuit design plus innovative hardware design for control modes to manage power as well as to reduce it. And then there is the matter of performance—do we compromise things like clock speed to achieve power reduction? Ravuri’s short answer: “What would be the point of that?” Of course, that’s easier said than done. So far, the only publically announced numbers for power/performance enhancements involve a single device, but are nonetheless significant. The 405EXr is a Power Architecturebased SoC device used in wireless LAN points and NAS storage systems. AppliedMicro has announced a reduction in worst-case power consumption from 3.5 watts to 2 watts—a drop of almost 40 percent. At the same time, the peak clock speed remains 533 MHz. Currently the company is migrating all customers for this product to the low-power version, and all new customers will receive that version as well. We appear to be on the threshold of a general move to radically reduce the power consumption of silicon. The advent of the Intel Atom a few years ago based on that company’s 45nm geometry (soon to move to 32nm) has spread to other Intel product lines such as their multicore products. Another x86 player, VIA, is staking its turf in the low-power arena as well. As the learning curve advances, others are sure to follow because the system advantages can be tremendous.

Extreme Engineering Solutions, Inc. (X-ES) 3225 Deming Way, Suite 120 Middleton, WI 53562 W (608) 833-1155 P (608) 827-6171 F

Executive Letter to the Industry Rob Scidmore, President and CEO Extreme Engineering Solutions (X-ES) designs, manufactures, and supports embedded computing solutions including high-performance single-board computers, I/O modules, backplanes, power supplies, enclosures, and fully integrated deployable systems. One key technology and a major focus for us going into 2010 is VPX. Because of the inherent complexities associated with the high-performance, high-speed technologies VPX delivers, we see tremendous value in providing all of the VPX building blocks our customers need to assemble their systems. That’s why we made the commitment to develop our own VPX backplanes, power supplies, and chassis in addition to our SBCs, switch cards, storage, and I/O carriers. Having the ability to deliver not only payload boards, but the backplane, power supply, and chassis translates into a very tangible benefit to our customers. Regardless of the level of integration our customers are looking for, they know we are a VPX provider that understands and has solved system integration issues. Another problem facing customers, due to the flexibility of VPX, is finding products that meet their exact requirements and project schedule. To address this, VPX suppliers need to be flexible and responsive to customers’ specific project needs. At X-ES, we have invested heavily in processes and methodologies to enable us to quickly adapt our standard VPX products to meet the specific needs of a project, including schedule, without sacrificing the quality and robustness of our products. Based on the breadth of our VPX product line, our commitment to VPX, and our ability to design and deliver integrated VPX systems, X-ES has earned the title of VPXpert – the leaders in VPX technology.

OpenVPX Systems • Development systems and deployable ATR systems • XPand1200-1 • Low-cost ($7,500) flexible desktop OpenVPX™ development system for 3U conduction-cooled VPX modules with 6 payload slots, 2 switch slots, and 2 optional power supply module slots • Includes XChange3012, a high-performance OpenVPX PCIe and Gigabit Ethernet switch module providing x4 PCIe and SerDes Gigabit Ethernet connectivity between the six payload slots; includes local XMC site • XPand3200 • ½ ATR compliant, conduction cooled system • OpenVPX backplanes • MIL-STD-704 power supply options

3U VPX Modules • PowerPC® and Intel® Architecture Single Board Computers (SBCs) • Full range of PMC/XMC I/O and 3U VPX carrier modules • Solid-State Disk (SSD) storage modules • PCI Express and Gigabit Ethernet switch modules • MIL-STD-704 power modules • All VPX modules available in commercial, air-cooled to ruggedized, extended temperature, conduction cooled versions • X-ES SBCs, I/O, storage, and power modules are easily integrated into OpenVPX development and deployable system solutions

IntelŽ Core™ i7 Processors: Unmatched Performance Extreme Engineering Solutions, Inc. (X-ES) unleashes the performance of the Intel Core i7 processor for use in commercial, military, and aerospace applications. The mobile Intel Core i7 processor delivers unmatched power savings and processing performance. Extreme Engineering Solutions offers an extensive product portfolio that includes commercial and ruggedized single board computers, high-performance processor modules, multipurpose I/O modules, backplanes, enclosures, and fully integrated systems. Call or visit our website today.

ploration your goal k directly age, the source. ology, d products


engineering High Reliability in Small Spaces

High Availability Moves beyond Telecom The high-availability systems market is moving rapidly from an in-house proprietary systems approach to a commercial-off-the-shelf (COTS) direction, making such solutions available to a wider range of applications.

by Bill Yaman, GoAhead Software


End of Article



Get Connected with companies mentioned in this article.





he topic of Highly Available (HA) Systems is a crucial one for the readINDUSTRY TREND ers of RTC magazine. Vendors to key verticals such as telecommunications and manufacturing have spent years and milApplications Applications lions of dollars investing in hardware and software technology focused on maintainIntegrated COTS Middleware Proprietary Middleware ing availability at 99.999% levels. These E.G., SA Forum Compliant investments have been made for very Standard Operating System good reasons. Downtime in certain key Proprietary Operating System E.G., Carrier-Grade Linux nies providing solutions now application areas is a make-or-break busiion into products, companies. Whether your goal is to research the latest nesstechnologies factor forand many companies. TelecomStandard Hardware Platform Hardware ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put Proprietary you munications and manufacturing provide you require for whatever type of technology, of searching the bestfor. examples, but as Web serand productstwo you are COTS-Based Platform Proprietary Platform TRADITIONAL APPROACH LEVERAGING ECOSYSTEM vices and enterprise applications continue their evolution, those market segments are *Equipment Manufacturers also becoming more and more focused on Figure 1 high-availability services as well. MovKey standards are catalyzing a move from proprietary in-house systems to ing successfully into this new era requires standards-based systems. novel ways of thinking about hardware and software. The telecommunications industry is date explosive growth and emerging tech- Mobile traffic in general is doubling every under enormous pressure to revamp its nologies, and at the same time to ensure 9 months. Competitive intensity due to networks and applications to accommo- that the services delivered are available reduced development cycles is increasing and dependable. A number of industry with the rapid shift to standardized plattrends are contributing to this pressure. forms such as ATCA and carrier-grade Get Connected Traffic volume continues to grow, espe- Linux. For network equipment providers, with companies mentioned in this article. cially video and 4G wireless applications. differentiation will increasingly be based

solutions engineering

In-House vs. COTS Systems

This pressure for COTS systems in the HA space is driven first and foremost by straightforward economics. The expense and investment for High-Availability systems has traditionally required a large in-house investment by systems vendors. While these traditional in-house systems were of solid value and solved real problems, the investment demands on these systems have outpaced even the most responsive and innovative vendors. Solving this challenge demands a level of cooperation among industry players. Key standards are needed that create a clear delineation between various functional layers of a highly available system. This standardization of layers—hardware, operating system, middleware and application services—is greatly facilitating the

Average Annual Downtime Costs SOURCE: INFONETICS






Figure 2












on application development, managed services and customer support. Equipment providers require that these new applications achieve the highest levels of availability and dependability while contending with constant pressure to reduce development costs. This shift is not unique to the telecommunications market, as similar trends are evident in a variety of different markets such as aerospace & defense (A&D), manufacturing and other segments. The service providers and vendors offering highly available systems are increasingly looking to the industry to supply building blocks they traditionally have designed and developed internally. The aerospace and defense industry, particularly in the U.S., is providing a strong incentive to their prime contractors—both product suppliers and system integrators—to include as many commercial-off-the-shelf (COTS) building blocks as possible. Similar trends are also emerging in the manufacturing and financial markets. High availability is maturing and becoming something much more than a niche market serving the telecom industry.



Outages and degradation both raise costs and hurt revenue.

ability of systems developers to put together highly available application-ready systems using COTS building blocks. Figure 1 shows a simple before and after visual of this industry trend. The emergence of multiple COTS suppliers for each of the building blocks is creating a robust ecosystem of COTS component suppliers. This enables system developers to focus their precious, often shrinking resources on things that differentiate them from the competition—applications and services.

Manufacturing and Industrial Applications

The evolving economics and increasing demand for HA systems can be seen rather dramatically in manufacturing and industrial applications. Recent changes in the adoption of systems and applications in the manufacturing sector have increased the need for HA capabilities. The nature of the operations in this segment is particularly illustrative of the demand and

trend toward commercial open standards HA systems. First and foremost, more and more of the factory floor itself is now based on automation of various types. While this automation takes a variety of forms (lasers, robots, etc.), all the various areas of automation end up stimulating demand and requirements for information technology to monitor, manage and control the various devices on the floor. These IT support systems have an HA requirement by their very nature. Examples include control systems on robots, machine tools and automation. In many application scenarios, the floor systems also need to communicate with each other in real time and share process data. Vendors of a variety of programmable logic controller (PLC) products are enhancing their products with Ethernet capability. This adoption of Ethernet on the factory floor will increase interdependence and risk. Designers, suppliers and management will also be workRTC MAGAZINE DECEMBER 2009




solutions engineering


Application Specific Subsystem



CG Linux

Dual/Quad CPU

10GE Switch

AMC Carrier

ATCA Chassis, Backplanes, PSU, Cooling, ShMM

Figure 3 A typical ATCA platform.

ing on shorter cycles, and this means that high availability will increase in importance as an application requirement.

The Risk – Downtime in Manufacturing

The cost of downtime in manufacturing, already well-known before the latest wave of IT adoption, continues apace as the above trends march their way through the industry. The increased automation certainly provides increased productivity and quality, but the related systems must be highly available, or the economic benefits erode rapidly. Systems integrators and suppliers that may not have had a need to ponder HA requirements in most of their projects will now need to do so. The downtime cost for their manufacturing customers has changed dramatically, and systems integrators need to respond with new approaches to high availability. Figure 2 shows the relatively higher cost of downtime in the manufacturing industry. Given all of the above changes and increased risks, it is critical to consider the


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10/12/09 3:07:36 PM

integration of systems and an overall HAoriented architecture at the earliest stage possible. Most experienced manufacturing directors and engineers have gone through the process of “creeping integration” where they have to plumb disparate elements into a coherent system. The degree to which that integration is successful and sustainable is directly proportional to the time devoted to component selection and architecture early in the process.

Implementing High-Availability Systems

The evolving economics of highavailability systems and the increased demand for HA capabilities in manufacturing and other industries leads naturally to the question of implementation. As you consider how to get started with high availability, there are some key points to keep in mind before you get too far into the process. First, once you have decided to go the commercial-off-the-shelf (COTS) direction, hardware selection becomes the paramount consideration. In the telecom

solutions engineering

space, ATCA (Advanced Telecommunications Computing Architecture) has seen increased adoption in recent years. In particular, the “Commercial ATCA” trend shows the evolution of ATCA beyond telecommunications to other industry segments and applications. For ATCA hardware, designers should focus on: switching options, fabric capacity, configurability and thermal issues. ATCA systems offer many options for blades and also enable the use of advanced mezzanine cards (AMCs) that are hot swappable and have integrated system management functions (Figure 3). After hardware selection, there are four other key considerations as you think about the design of your HA system. The first is Platform Independence and Portability. System changes are inevitable and need to be planned for. Flexibility is important in the middleware and in applications as well as in the hardware. HA implementers are encouraged to review and adopt industry standards where possible, especially those from the Service Availability (SA) Forum. The SA Forum’s Hardware Platform Interface (HPI) specification and Application Interface Specification (AIS) are the two key standards to review for more on how to achieve platform independence and portability. System developers must also provide failover budgets in their designs. All HA systems have critical performance requirements. It is important to define the various failover scenarios early in the process. Start by classifying failover scenarios into three categories: sub 100 milliseconds, 100 to 500 milliseconds, and greater than 500 milliseconds. The technology applied will vary among the three different cases. Designs must also ensure that there is no single point of failure. Any system that is expected to provide uninterrupted service must eliminate single points of failure. This is the most critical requirement of any HA system. Redundancy of various types is needed, including: base and backplane interfaces, power/cooling, and the HPI interface to availability middleware. Your choice of availability middleware is also important in this context. GoAhead Software’s SAFfire solution is an example of availability middleware to consider as

you assess this component of your architecture. The product is based on open standards and GoAhead has a long and successful track record in the HA middleware market. Finally, the system must be upgradable. Your HA design needs to incorporate the requirement that an operational system can be upgraded as new versions of software or hardware become available— without impacting service. Designing for upgradability means that the service must be maintained during the upgrade process. Rolling back upgrades that go wrong must also be designed from the start. Overall, there is no question that the availability of COTS components helps vendors get systems to market sooner, but it also means that the above considerations must be evaluated as part of the move. Assessing these areas can help you take full advantage of the COTS trend and economics, whether your final application is a complex manufacturing scenario or another highly available application. The traditional high-availability demands of the telecommunications industry have begun to permeate many other market and industry niches. In particular, applications in the manufacturing market are driving the need for more high availability because of the unique characteristics of the segment. Developers and vendors serving these rapidly evolving markets would do well to begin designing high-availability service into their applications. GoAhead Software Bellevue, WA. (425) 453-1900. [].

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7/21/09 12:46:17 PM

ADLINK Technology, Inc 5215 Hellyer Avenue #110 San Jose, CA 95138 W (800) 966-5200 P (408) 360-0222 F

Executive Letter to the Industry As an industry leader in Computer-on-Module (COM) technologies, ADLINK offers a wide assortment of COM Express modules to meet your specific application needs. Whether the driving design factor is cost, ruggedness, and/or size, ADLINK provides four Intel Atom-based industry-standard COM Express modules designed to standard, compact, Extreme Rugged™, and “nano” specifications for your selection. These COM Express modules are specifically designed for use in a wide range of markets, including medical and gaming devices to military systems. The low power and long lifecycle of these solutions clearly is a breakthrough for pushing the limits of integration for next-generation systems. As an added service, ADLINK also established a Design Partner Network to ensure that you have immediate access to professional and technical engineering design services for the design and development of custom carrier boards for embedded systems solutions and applications utilizing COM modules. By combining ADLINK’s industry leading embedded computing products and the design partners’ years of experience in providing state-of-the art design services for custom single board computer and carrier board products, ADLINK is able to provide you with an extended array of personnel, design tools, and services. This equates to unlimited breath and depth of engineering resources to you, which translates to reduced time-to-market and, therefore, increased revenue capability. In these challenging economic times, this capability offers unparalleled value.

Express-ATR – Extreme Rugged™ COM Express™ Module with Intel® Atom™ N270 • Intel® Atom™ N270 CPU • Intel® 945GSE / ICH7M chipset • “Compact” COM Express module • Up to 2 GB DDR2 memory • True PICMG COM Express™ COM.0 compliance • PCI Express, SATA II • ACPI 2.0 with S3 support • 50% thicker PCB

nanoX-ML – COM Express™ Type 1 Pinout Module with Intel® Atom™ Z5xx • Intel® Atom™ Z530/Z510 processor • Intel® System Controller Hub US15W • One PCIe x1 (opt. 2 without LAN), LPC • 18/24-bit LVDS and SDVO • GbE LAN, SATA, USB2.0, SDIO • AMI EFI BIOS and TPM 1.2 support • Solid State Disk : 512 up to 8 GB • Ultra Compact 84 x 55 mm footprint


insight Standards Update

SUMIT-ISM—Uniting Legacy and Advanced I/O in a Stackable Form Factor A new standard brings together the popular form factor begun by PC/104 with advances in processor-based COM modules to include IDE, PCI and newer high-speed serial I/O technologies that can be combined in a stack.



0.000 [0.00]

0.650 [16.51]

1.693 [43.01]

ø0.125 [ø3.18]

0.200 [5.08]


0.000 [0.00] 0.125 [3.18] 0.185 [4.70]

inch [mm]

SUMIT - ISM Module

-0.800 [-20.32]

-0.100 [-2.54] -0.300 [-7.62]

Figure 1

3.250 [82.55] 3.050 [77.47]

3.325 [84.46] 3.375 [85.73] 3.575 [90.80]

3.750 [95.25]


n early 2008, the Small Form Factor Special Interest Group (SFF-SIG) introduced a ground-breaking new interconnect technology called Stackable Unified Module Interconnect Technology (SUMIT). SUMIT is a stacking, I/O-centric expansion approach that includes both highand low-speed bus signals. Two high-speed 52-pin connectors offer a wide range of serial peripheral interfaces from low to high end including USB, SPI, LPC, I2C/SMBus and PCI Express. Power is also made available on both connectors with a large centrally located ground connection. The SUMIT interface is defined around two connectors, each having unique signaling characteristics. The SUMIT-A connector, which can be used alone, includes four Universal Serial Bus 2.0 (USB) ports, a low pin count bus (LPC), System Management Bus (SMB/ I2C), Serial Peripheral Interface (SPI), and a 1x PCI Express (PCIe) link that can support an ExpressCard. The SUMIT-B connector is an optional connector that adds another x1 PCIe and either a x4 PCIe link or four more x1 PCIe links. In October of this year, the SFF-

2.900 [73.66]

by Gary Harris, VersaLogic

SUMIT connector placement on a SUMIT-ISM module with expansion zones on both ends.








industry insight

SIG membership approved another new standard in support of SUMIT. Called “SUMIT-ISM” (Industry Standard Module), these standard modules are defined by the SFF-SIG as having “a 90 mm x 96 mm board outline plus mounting holes, without regard to bus expansion.” SUMIT-ISM takes a new approach by employing backward-compatible dimensions, I/O zones, and mounting holes to enable a flexible stacking design format.

This “ISM” size will be familiar to many as the PC/104 form factor. Since the SUMIT specification itself defines only a board-to-board interface (connectors and pin definition), the ISM specification was necessary to define how SUMIT is implemented on ISM modules. The SUMIT-ISM standard opens the door for new and more flexible combinations of I/O capabilities, bringing in high-speed serial interfaces while still supporting legacy

Industry Consortia Involved in Small Form Factors The SFF-SIG

The Small Form Factor Special Interest Group is an international organization devoted to identifying, creating and promoting standards that help electronics system and device manufacturers and integrators move to small form factor technologies and building blocks in their products, and protect their investments. Benefits of small form factor products include smaller size, reduced power consumption (eco-friendly, “green” products), and greater reliability compared to larger legacy products. The SIG’s philosophy is to embrace the latest technologies, as well as maintain legacy compatibility and enable smooth transition solutions to nextgeneration interfaces. For more information about the SFF-SIG, please visit

The PC/104 Consortium

As a technical organization, the PC/104 Embedded Consortium creates, maintains and distributes specifications supporting the PC/104 form factor. The specifications include PC/104, PC/104-Plus, PCI-104, EBX and EPIC. For more information about PC/104 and other PC/104 Consortium form factors, please visit

low-speed peripherals such as ISA (PC/104) or PCI (PCI/104). The SUMIT-ISM specification incorporates an existing standard industry practice, “I/O zones,” into the specification itself, now defining these zones as part of the SUMIT-ISM form factor.

The SUMIT-ISM Standard Supports Flexibility

Embedded developers of long-life industrial, medical, defense and other applications are looking for a small footprint, compact dimensions, and the ability to use the multitude of existing expansion modules in use today. Systems must be backward-compatible with legacy devices in the installed base, while still supporting a hardware environment that accom-


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industry insight





SUMIT-ISM Legacy Type 2

SUMIT-ISM Legacy Type 1

104-pin PC/104 (ISA) Bus

120-pin PCI-104 Bus

Figure 2 Legacy Type 1 and Legacy Type 2 options.

SUMIT Resources Form Factor

PCIe x 1





PCIe x 4

— 3

USB ExpressCard LPC SPI / uWire


SMBus / I2C


+12V +5V +5Vsb +3.3V

Figure 3 The SUMIT resource label shows a column for each connector. If a resource is not supported by that connector, the box is gray. A dash mark indicates that a supported resource is not implemented in this particular module while a check mark indicates that the resource is supported.

modates the new high-speed devices. The SUMIT-ISM standard defines the SUMIT A and B connectors and two legacy stack types, one using slotted mounting holes. This enables SUMIT-ISM modules

to be designed to support the SUMIT connectors as well as legacy ISA (PC/104 form factor) or PCI (PCI-104) interfaces. By rotating the ISM module 180 degrees as necessary, the module can fit either legacy bus type, while still maintaining the SUMIT interface. This is important because many embedded designs begin with the required I/O, not the CPU. Since the I/O drives the bus requirements, then the CPU requirements, it makes sense for the designer to start with the most unique I/O and then work backwards to a standard CPU. As embedded designers seek higherperformance systems and need to incorporate growing numbers and types of I/O into legacy designs, SUMIT-ISM supports this approach by allowing for a flexible modular stack that can accommodate a variety of new high- and low-speed serial buses while maintaining compatibility with either the legacy ISA or the PCI bus. The PC/104 and PCI-104 buses have gained worldwide adoption as industry standard system expansion interfaces for small, modular systems. SUMIT-ISM was conceived to support the ISM concept, which provides compatibility with many different boards that are available in the 90 mm x 96 mm industry standard footprint. SUMIT-ISM defines “Legacy Type 1” and “Legacy Type 2” options for designers wishing to incorporate PC/104 or PCI-104 modules and enclosures into their system. A Legacy Type 1 board supports the legacy 104-pin PC/104 connector in addition to the SUMIT-A and/ or SUMIT-B connectors. A Legacy Type

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11/10/08 10:01:37 AM

industry insight

2 board supports the legacy 120-pin PCI104 connector in addition to the SUMITA and/or SUMIT-B connectors (note the Legacy Type 2 mounting slots due to the PC/104 offset mounting holes). In this way the SUMIT-ISM specification can maintain legacy applications while supporting newer, high-speed serial buses (Figure 2). The SUMIT-ISM specification supports: • Expansion interfaces decoupled from form factors

• Defined connector expansion areas • Flexible expansion buses and I/O interfaces • Top- and bottom-side component height restrictions • Previously undefined and unnamed bus combinations The stacking order for the SUMIT-ISM modules is also a significant feature of the specification. The stack is assembled in one

direction only, which is “up” from the processor board (SBC), defined as the bottom board in the stack. This one direction stacking requirement is a result of the point-topoint nature of USB and PCIe interfaces. I/O cards “consume” a USB or PCIe resource and shift the remaining links for use by I/O modules above them. If a Legacy Type 1 or 2 parallel bus is incorporated on the CPU, the legacy bus, being a non-point-to-point parallel bus, may stack in either direction. Due to I/O cards consuming and lane shifting of the serial bus resources, some attention must be paid to the actual module stacking order. The resources provided by the base CPU board must also be taken into account. A full set of resources is not a requirement on a SUMIT connector. A label containing a resource table is defined in the SUMIT specification to convey this interoperability information (Figure 3). As with the above definitions for Legacy Type 1 and Type 2, the incorporation of the SUMIT interface basically replaces either the 120-pin PCI or the 104-pin PC/104 connector with a 104-pin SUMIT connector pair. None of the dimensions, I/O zones, or mounting hole locations on “stackable” form factor boards (EPIC, EBX or PC/104) need to change, other than the use of slotted mounting holes when SUMIT Type 2 is the primary expansion format. The use of SUMIT-ISM results in greater I/O interface options and higher potential bandwidth, while requiring far less real estate for the connectors. Keeping the same form factors, and updating only the interfaces, lets form factor standards and interface standards evolve separately. When a new form factor becomes available, it can support all of the required interfaces. This helps minimize revisions to the specifications and increases the platform’s longevity. Plus, the signals provided by the new SUMIT connectors align well with new low-power chipsets, for example the Intel Atom and VIA Nano microprocessor families. To date, three SFF-SIG member companies, VersaLogic, WinSystems Inc. and ADLINK/Ampro, have all recently announced CPU and/or I/O products designed using the SUMIT or SUMITISM specifications from the SFF-SIG. VersaLogic Eugene, OR. (541) 485-8575. [].


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4/14/09 12:03:16 PM

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System Integration Unleash the Power of Multicore

Multicore Silicon and Virtualization Software—Made for Each Other

not occur in a vacuum, but in response to key design trends. Embedded systems, particularly in the mobile wireless space, need to run multiple operating systems (OSs) to support diverse subsystems. In the case of wireless mobile devices these involve lowlevel environments for wireless/baseband, multimedia, etc. supported by an RTOS alongside high-level application environments supported by a “rich OS,” such as Android, Linux, Symbian, or Windows. This heterogeneity will not fade away with the rise of multicore; rather, it will become universal. Universal because multicore CPUs offer the horsepower to run these complex stacks, and because convergence Multicore and virtualization offer ways to exploit CPU will continue between wireless/mobile devices and networking, consumer electronresources, save energy, enhance security and more. And ics, instrumentation and control—indeed the mission of virtualization will become even more critical the whole gamut of intelligent device types. Chip lithography continues its historical as multicore silicon becomes mainstream. trajectory of beam and path shrinkage, today inching down to 35 microns and below. As die size contracts, silicon suppliers will offer concomitant increments in available cores on a single substrate. Increasing numbers of cores in an SoC will encourage designs where particular subsystems or by Rob McCammon, Open Kernel Labs functionalities are given their own core (or cores). Some of these functions (e.g. media processors) will use a core in an essentially binary fashion: full throttle or not at all, and mbedded virtualization is finding increasing deployment in are easy to manage. Other functions assigned to available cores intelligent devices of all kinds. As in the enterprise and on will impose varying loads, ranging from a share of a single core the corporate desktop, embedded virtualization meets the to saturating multiple processing units. needs of a range of use cases: hardware consolidation, legacy miDebates about energy conservation and green computing gration, IP isolation and trusted computing. featured prominently in IT discussions in 2008 (when oil prices The most visible use case is probably processor consolida- topped $145/barrel). Today, even with less pressure from crude tion—merging multiple legacy CPUs or single-board computers energy costs, conservation is still a hot topic: in the data center, to onto a single virtualized system, where each legacy software control electricity costs, and in embedded designs, to be greener stack populates its own dedicated virtual machine. This para- and to extend battery life. digm is exemplified by the Motorola Evoke QA4 Smartphone Indeed, energy is a valuable resource on mobile devices and running Open Kernel Lab’s OKL4 microvisor. other embedded designs, and must be managed effectively. Key In seeming contrast to processor consolidation, however, is to energy management is timely enabling and disabling of an the rapid penetration of multicore technology across the gamut optimum set of hardware resources to meet moment-by-moment of embedded designs. Given the shrinking incremental cost of performance needs. processor cores, some would imagine that the role of embedded hypervisors will also diminish—why use a hypervisor when you Multicore Virtualization can dedicate whole cores to legacy stacks and to new ones too? Before embarking on a discussion of use cases and merits of using virtualization to optimize multicore embedded designs, it The Adoption of Embedded Virtualization and is important to explain how and why virtualization fits into such Multicore Silicon designs. The intersection of virtualization and multicore silicon does The easiest way to think about embedded virtualization is




system integration




Virtual CPU

Virtual CPU

Virtual CPU

nature, the abstraction of physical to virtual cores exacts minimal performance overhead. Thus virtualization can improve memory utilization and offers streamlined IPCs, with positive impact on throughput.

Embedded Virtualization with Multicore Systems




Figure 1 A hypervisor allows each virtual machine to be assigned to one or more virtual cores with assigned access to memory and peripherals and then implements the virtual core over one or more physical processor(s).

as an abstraction or indirection layer that sits between “guest” software and underlying silicon. The abstraction provided by virtualization to each virtual machine running over it is that of a 100% dedicated CPU and memory address space. This abstraction is not a “heavy” one as with Java virtual machines or emulation, where software implements all program execution at the instruction level. With embedded virtualization, guest software runs natively on physical CPUs and occupies physical memory. However, execution of guest OSs and other software occurs in non-privileged “user” mode, with the hypervisor mediating access to and allocation of physical resources, including CPU cores. When consolidating legacy multi-CPU or multi-board designs onto a single multicore CPU, it is very tempting to dedicate available cores, statically, one by one, to legacy CPU equivalents. A key advantage offered by embedded virtualization is the ability to perform this allocation dynamically, on an as-needed or policy-driven basis. Rather than direct association of OS-to-core, the abstraction provided by the hypervisor assigns one (or more) virtual cores to each hosted virtual machine (VM), and provisions those virtual cores with access to physical ones, as needed, similar to SMP operation in multiprocessing OSs like Linux as shown in Figure 1. The benefits of this abstraction for multicore systems are manifold. A multicore design offers better utilization of available cores and memory. The ability to flexibly map hosted software to available silicon means that many guest OSs can be assigned to one core or one guest OS to multiple cores, and arbitrary points between. It also provides the ability to isolate guest OSs and application stacks running in shared physical memory. Moreover, because embedded virtualization is lightweight in

Let’s examine the most salient use cases for embedded virtualization in multicore systems. For one thing, they make it easier to optimize the use of the available computing power through resource management, load balancing and energy management. Embedded virtualization also makes possible secure partitioning and the ability to enable legacy software to run in a multicore operation as well as to shield already verified code from the need for tweaking to address product line variants. Most operating systems, in the enterprise, on the desktop and in embedded systems, aren’t very good at resource management. If they were superior resource managers, data center virtualization would be a non-event. The resources in question can include memory, devices and, importantly for multicore processors, the cores themselves. OSs (in particular embedded OSs) make static guesses about resource allocation and use. When those guesses prove inadequate, remediation occurs through brute force mechanisms like reapers, which kill off running processes and threads to save memory and CPU. Or remediation may not happen at all, resulting in thrashing and lock-up. The growing size and complexity of software and hardware beg a better solution. Rather than attempt to “fix” legacy OSs, one by one, virtualization provides the right locale, outside the scope of those OSs, to manage resources and to allocate them more efficiently to hosted virtual machines. Load balancing refers to techniques and mechanisms used to distribute the workload across two or more CPUs, network interfaces, hard drives, or other resources. The term is current in data center computing, but with the advent of multicore and multi-interface intelligent devices, the notion also applies to embedded design. As in data center computing, embedded virtualization provides new opportunities to optimize resource utilization, maximize throughput, minimize response time and avoid overload. Load balancing is called out by standards and requirements for high availability, like Foundation Carrier Grade Linux and SCOPE Alliance specifications. While the “heavy iron” systems addressed by these tomes usually run on blades, the same principles extend to more deeply embedded systems, where building on multiple redundant components, combined with load balancing, can increase both reliability and performance. In blade-based systems, each CPU is provisioned with its own memory, cache, peripherals, etc. In multicore systems, those divisions are imposed artificially: all CPUs live in a single package and share L2 cache, main memory, peripherals, etc. That fact notwithstanding, simplistic approaches to multicore software design—static assignment of OSs to specific cores—today prevail in embedded systems software, and miss opportunities for optimizing resource utilization. Key to load balancing in systems of any size is the ability to RTC MAGAZINE DECEMBER 2009


system integration

migrate compute loads across compute resources, including CPU cores. Only real virtualization, implementing dynamic mapping of virtual CPUs to physical cores, is up to the task of effective load balancing. Once a system employs virtualization, energy management becomes largely a case of load balancing. With multicore designs, the most effective (and obvious) way of reducing energy consumption is to shut down cores after migrating their loads to other available peer CPUs, migration that is difficult or impossible with static OS-CPU assignment. A hypervisor facilitates energy management by being “in the right place,” with system-wide knowledge of hardware resources. By contrast, the operational scope of application OSs and RTOSs prevents them from effectively implementing energy management beyond the code running on them. Gains from putting cores to sleep far exceed those possible by other means such as dynamic voltage and frequency scaling (DVFS). This advantage over DVFS will become even more pronounced in the future. With process advances, ever-smaller core voltage reduces the energy-savings potential of DVFS due to smaller deltas. Conversely, the proliferating number of cores offers immediate energy-saving potential. A real-world example of energy can be shown by a mobile device design that could include different subsystems. One, a performance-intensive subsystem such as a baseband modem stack requires the compute capability of two cores when load is high, but never more than 0.2 cores for lesser loads. On the same device, a design includes a multimedia stack needing up to four cores at full load, but the load falls to zero if no media is displayed. Accompanying these loads is an application OS and UI stack that use between half and two cores while user interaction takes place, and near zero when idle. When the user is navigating through menus, only about 2/3 of the compute power of one core is required, yet there are multiple OSs involved. Without virtualization, the design would need to run on at least two cores, each at half throttle or less. With virtualization, all operations can consolidate on a single core, and the overall energy use of the single core will still be less than the combined energy gobbled up by two cores running on low throttle. The additional cores are not wasted. They are immediately available—minus some very small power-up latency—when the user invokes compute-intensive multimedia operations or an in-coming call launches a ring tone. The reality of globally shared memory in multicore systems presents challenges to security regimes and opportunities for exploitation. As embedded software becomes larger and more complex, both OSs and software stacks, from their sheer size and the effort required to create and maintain them, accrue bugs and security holes. In a shared memory design, even if OSs are allocated to dedicated CPUs, a break-in on one could lead to systemwide compromises. Embedded virtualization, as implemented by hypervisors, ameliorates these risks on two levels. First, it isolates guest software and strongly regulates inter-guest communication by limiting sharing of global objects and through IPCs with strict access protocols. Second, it treats all guest software as untrusted,



with limited access to critical resources, including other cores, memory, devices and privileged instructions. The Trusted Computing Base (TCB) of an application can then be limited to the application itself, the hypervisor, and the underlying hardware. Removing a complex operating system like Linux from the TCB makes it much smaller and therefore much easier to verify with respect to correctness. Application OSs, like Linux and Windows, have been SMPenabled for several generations of those platforms. As such, they can already leverage multiple available CPUs in a multicore system. The majority of embedded OSs—RTOSs, executives, etc.— are ill-equipped to run on more than a single core, requiring that multiple copies of those systems run on multiple cores to take advantage of multicore silicon. This limitation can raise deployment costs by doubling or trebling run-time fees, one for each copy of the OS running on a unique core. It can also consume system resources when legacy embedded OSs cannot share code images, stacks, buffers and other objects across cores and shared memory. In addition, it can slow development by forcing developers to break apart running legacy stacks, assign the pieces to two or more RTOS instances, and to implement and debug IPCs among them. Through the abstraction of virtual CPUs, embedded virtualization can enable legacy embedded OSs for multicore operation. The legacy OS, in a hosted virtual machine, “thinks” it is running on a single physical CPU, while the hypervisor can spread the operation of the OS and applications running on it across two or more available CPU cores. The insertion of a hypervisor, however, does not magically confer SMP operation on a legacy RTOS. Designers and integrators must still consider synchronization and concurrency. OEMs can also look to virtualization to mask variations in actual bills-of-material (BOMs) from system and application software. In lines where some products use processors with fewer cores than others—for example, in entry-level designs vs. higherend devices—a hypervisor allows the same software architecture to apply across all products and BOMs. This is not the case if OSs and applications are tied directly to physical cores. As multicore CPUs become mainstream in embedded designs, virtualization offers an attractive tool and platform for exploiting available CPU cores and computing horsepower they provide. In fact, embedded virtualization actually simplifies and optimizes utilization of multicore silicon. In particular, virtualization provides an efficient, low-overhead abstraction for mapping and allocating available cores onto hosted software, enabling the rich mix of software stacks that characterize today’s connected, converged device designs. Open Kernel Labs Chicago, IL. (312) 924-1445. [].

System Integration Unleash the Power of Multicore Pthreads is supported by Linux, UNIX, and a wide range of embedded operating systems such as Integrity, LynxOS and QNX. Even Windows supports a POSIX interface. Due to the ubiquity of POSIX, there exists a very large base of application code that can be reused for embedded designs. Another strong advantage of POSIX is that independent conformance validation is available from the Open Group. There are a large number of POSIX implementations that have been certified conformant to the latest POSIX specification. By programming to the POSIX API, developers can write multithreaded applications that can be ported to any multicore platform running a POSIX-conformant Multicore processors offer great potential for increased operating system. POSIX is a natural fit for multicore embedded systems since embedperformance and power savings. They also present a ded software is often written from scratch to challenge to realizing this potential that can be met by a be multithreaded. Furthermore, add-on software components can often be easily mapped new generation of enhanced development tools. to individual threads. For example, a TCP/IP network stack may execute within the context of a single POSIX thread; same for a file system server, audio application, etc. POSIX conformance is a requirement for any operating system that expects to be used widely in multicore systems. by David N. Kleidermacher, Green Hills Software Message passing has long been a mechanism used to implement parallel computing, mainly because the multicomputers used historically to host massively parallel scientific ll major embedded processor architectures—ARM, Intel, computations lacked a shared memory subsystem. Rather, data for MIPS and Power—have spawned multicore processors, parallel computations are sent to the parallel cores using IPC, with and designers across a range of industries are snapping the same IPC serving as a synchronization mechanism. Although them up due to the promise of improved performance efficiency. the embedded applications may differ from their scientific brethren, Developers, however, are faced with a new set of design, debug IPC is usually required to implement multiprocess systems. and run-time management challenges that are specific to multiIPC comes in many flavors. In the scientific community, MPI core processors, for example, their ability to provide concurrency (Message Passing Interface) is a widely used standard. POSIX, in execution of multiple threads. of course, specifies a variety of mechanisms, including pipes, Taking advantage of multicore concurrency usually requires the FIFOs and sockets, that were designed for loosely coupled IPC. programmer to determine which parts of the application can be paral- The multicore developer’s toolbox must often include a variety of lelized or offloaded and write the code such that this parallelism is ex- IPC choices. If the application has enough headroom to handle plicit. For example, the developer can place code into threads that will the overhead of an underlying network stack, then POSIX sockthen be scheduled by an SMP operating system to run concurrently. ets is arguably the most ubiquitous of all basic IPC mechanisms. Using standards-based multithreading such as POSIX will ensure that multicore software is portable and reusable across projects. Multicore Run-Time Management POSIX is a collection of open standard APIs specified by the Symmetric multi-processing is one of the more promising IEEE for operating system services. POSIX threads, or Pthreads, is multicore tools for embedded systems. If the application is althe part of the standard that deals with multithreading. The Pthread ready multithreaded, as is the case with most embedded designs, APIs provide interfaces for run control of threads, synchronization then an SMP operating system will simply schedule concurrent primitives and IPC mechanisms. While other multithreading stan- threads to run on the extra cores in the system. SMP can prodards exist, Pthreads is the most generic, widely applicable standard. vide dramatic performance increases without requiring software

The Multicore Developer’s Toolbox




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Guest OS

Device Multiplexor

Real-Time Applications

Security Critical Applications

Guest Applications

Guest Applications

Guest Applications

tency as well as overall system efficiency can be improved in certain scenarios. For example, a device driver thread can be bound to the same core handling the device’s interrupts, avoiding the

Guest Applications

modifications. SMP is now quite common in embedded operating systems. For example, Linux, Green Hills’ Integrity and Intel VxWorks all support SMP. One of the challenges with SMP is the fundamental difference in scheduling behavior relative to unicore real-time systems. Because multiple processes may be running concurrently, the use of process priority to guarantee execution time may not be sufficient. Green Hills’ Integrity operating system provides an optional alternative approach in which application processes can be assigned guaranteed percentages of execution time across all cores in the system. Within an application, threads are prioritized using standard priorities and time slicing. Maximizing cache usage is critical to the performance and power profile of most embedded systems. Most SMP systems consist of cores that have independent on-chip caches. When a thread migrates from one core to another, the cache locality of the thread’s code and data is lost and must be reloaded on the new core. When a thread needs to run (such as when it is the highest priority runable thread), and more than one core is available (idle), the SMP operating system must intelligently choose which core to use. The operating system should keep track of a thread’s natural affinity. The natural affinity of a thread is defined as the core on which the thread last executed. Assigning threads to the cores that match their natural affinity minimizes migrations and cache misses and the embedded software will exhibit superior performance and power efficiency. User-defined affinity is another useful tool for developers, which enables specific threads to be bound to specific cores. La-

Guest OS

Hybrid Hypervisor Multicore Power Architecture Hardware

Figure 1 An enhanced Type-1 embedded multicore hypervisor.

use of inter-processor interrupts (IPI), which increase latency. Another scenario involves assigning multiple threads cooperating to fulfill a particular job (e.g. using shared data structures) the same core affinity, again to minimize IPIs and maximize cache utilization. The SMP operating system typically provides a system call to assign core affinity. Multicore processors such as the Freescale P4080, Intel Core2 and ARM Cortex A9 provide some form of hardware virtualization acceleration. Multicore architectures can improve the usability of hypervisors. For example, on a dual-core system, a separate virtual machine can be bound to each core, enabling a guaranteed quality of service for each guest. Using an enhanced Type-1 hypervisor (Figure 1), real-time applications can be assured optimal response time by executing on a core independent of guest operating environments. Another use case for multicore hypervisors is the ability to provide more flexible power management. Guest operating systems can execute on all system cores when applications require maximum CPU availability. However, because the hypervisor can map guests to virtual cores, the guests can be executed on a smaller number of available cores when there is less work to do, enabling the remaining cores to be fully powered off. The proliferation of multicore devices is likely to increase the proliferation of hypervisors: symbiotic growth for two disruptive technologies.

Multicore Debugging Tools

Multicore processors often provide a single on-chip debug port such as JTAG that enables a host debugger, connected with a hardware probe device, to debug multiple cores simultaneously. With this capability, developers can perform low-level, synchronized run con-

system integration

trol of the multiple cores. Board bring-up and device driver development are two common uses of this type of solution. For efficient use of this multicore hardware facility, the development tool must enable the developer to visualize all the cores of the system and choose any combination of the cores to debug, each optionally in its own window. At the same time, the tool must provide controls for synchronized running and halting of the debugged cores. With run-mode debugging, the cores are never stopped. Rather, the debugger controls application threads using a communications channel (usually Ethernet) between the host PC and a target-resident debug agent. For efficient use of this facility, the operating system must provide an integrated debug agent (and the associated communications device drivers) that is operating system aware and provides flexible options for interrogating the system. For example, the operating system should come with a debug agent that communicates with the debugger to provide the capability to debug any combination of user threads on any core, regardless of the homogeneity of the core architecture. The user needs to be able to set specialized breakpoints that enable user-defined groups of threads to be halted when another thread hits the breakpoint. Some classes of bugs require this fine-grained level of control. To be able to halt threads on a core separate from the core running the thread that hits the breakpoint, the operating system must handle all the behind-the-scenes communication that informs the appropriate core, with minimal latency, of the event. Many operating system vendors provide an event analysis tool. The event analyzer is an indispensable tool for developers of multithreaded software because it makes it easy to understand system Untitled-6 behavior and locate performance bottlenecks, livelocks, or other problems. A target-resident agent logs important operating system level events, such as service calls, interrupts, context-switches and user-defined events. The tool uploads this event log (either during execution or post-mortem), and displays the events in a timeline. The tool allows the user to zoom, select specific events for further information, generate execution statistical reports, and other functions. The event analyzer is even more critical for a multicore design. The event analyzer must be able to show events for all threads on all the cores, with the event streams synchronized to the same time scale. The tool must be able to display IPC between the cores. Green Hills Softwareâ&#x20AC;&#x2122;s EventAnalyzer product is one example of a tool that meets these requirements. There can be little argument that embedded designs are going multicore. These systems are more complex to develop, manage and debug. To meet these needs and help designers realize the performance benefits of multicore without losing time-to-market, systems software must meet a challenging set of requirements. Vendors must provide tools that aid in the portability of multithreaded code, operating system and virtualization features that make it easier for application software to be allocated efficiently across multiple cores, and development tools that provide complete visibility into and control over the distributed software. Green Hills Software. Santa Barbara, CA. (805) 965-6044. [].

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FPGAs enable our boards to adapt to these new and emerging formats while leveraging a single, welloptimized common architecture. FPGAs are also the latest, and arguably most powerful, addition to the signal processing toolbox. However, like the parallel to serial interconnect transition, using FPGAs to process signals is a shift from using programmable DSPs. Our ATLANTiS™ FrameWork eases this shift by providing fully validated physical interfaces to I/O and memory, data moving engines, resource arbitrators, and many other low-level modules, along with standard dataflow and control fabrics that allow modules to be easily connected, coordinated, and controlled. This FrameWork greatly simplifies the implementation of complex signal processing solutions on FPGAs, significantly reducing the time required to deploy FPGAs in embedded signal processing systems. The new serial formats, and our FPGA-based boards which support them, are fueling a new cycle of innovation for system design. I think we’ll see some great ideas and applications emerging in 2010.

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System Integration

most complex of applications. However, the presence of multiple processing cores on one physical chip complicates the design process considerably. So far, most commercial compilers have not advanced to the level of being able to automatically analyze which sections of code can run in parallel. That has forced embedded designers looking to take advantage of multicore processors to make use of parallel programming APIs that add overhead to code and are difficult to debug. In addition, traditional sequential programs make it very difficult to visualize parallel routines, creating a big problem for designers inheriting legacy code or struggling with their own complex applications. If todayâ&#x20AC;&#x2122;s parallel programming is difficult for designers, imagine how it will be when the next generation of processors with 16 or more cores arrives. The trend toward multicore processors and massively The most obvious solution to this challenge is using better programming tools and parallel architectures is just beginning. In order to keep methods to abstract away the complexity pace and realize the potential of these developments, new of multicore hardware. While APIs such as OpenMP and POSIX have become commontools and approaches will be needed. place in parallel applications, newer APIs such as the Multicore Communications API (MCAPI) promise to be more scalable and support a wide variety of parallel hardware architectures for both SMP and AMP. In addition, new tool suites such as Intel Parallel Studio aim to provide better debugging tools by Casey Weltzin, National Instruments than previously available. Finally, graphical dataflow languages such as NI LabView provide an inherently parallel programming model for SMP that can greatly reduce time-tohe embedded design world has changed markedly over market. It makes no sense to program serially when your applithe last decade, and the progress shows no sign of slow- cation is supposed to run in parallel. By automatically analyzing ing. Multicore processing (in the form of both symmetric parallel sections of code and mapping those sections onto multiple multiprocessing (SMP) and asymmetric multiprocessing (AMP)) threads, dataflow languages allow you to focus on your main task: is becoming commonplace, with embedded multicore CPU rev- developing code quickly and concisely (Figure 1). enue expected to grow 6X from 2007 to 2011. In addition, field Envision the typical embedded software design process for one programmable gate arrays (FPGAs) have grown in capability and of your projects. A large embedded application likely starts with a gone down in cost, providing high-speed functionality that could flow chart, and then individual pieces of the flow chart are translated once only be achieved with application specific integrated cir- into code and implemented. With dataflow programming, you can cuits (ASICs). Finally, virtualization is blurring the connection skip a step; code can be implemented in parallel as laid out on your between hardware and software by enabling multiple operating flow chart without translation into a sequential language. In this way, systems to run on a single processor. With the rapid evolution of investing in parallel programming tools, including new APIs and these technologies, how can embedded developers possibly keep IDEs that support dataflow languages, will help you make the most up? These technologies mean big challenges as well as huge po- of advances in multicore technology for your embedded designs. tentials for developers of embedded designs. It is vital to be able Next, FPGAs have changed the way that high-speed and to take advantage of these changes now while keeping develop- massively parallel embedded designs are implemented, and will ment time to a minimum. no doubt continue to evolve in the future. In the past, implementIt goes without saying that multicore processing represents an ing custom signal processing routines such as digital filtering in enormous shift in embedded design. With the presence of just one hardware meant designing an ASIC with significant initial design processor core on a chip, embedded designers traditionally have been expense. While this may have been cost-effective for high-volume able to use sequential programming languages such as C even for the applications, low-volume embedded designs were forced to use a

Unleash the Power of Multicore

Embedded Technology, Multicore and Virtualization. Are You Keeping Up?




system integration

combination of existing ASICs, or run signal processing code on a considerably slower processor in software. FPGAs have been a game changer. Now, you can simply download custom signal processing applications to an FPGA and run in hardware, at a cost of only tens of dollars. In addition, because FPGAs implement your embedded applications in hardware, they are by nature massively parallel. With all of these advantages, it is important to make better use of FPGAs in embedded designs, and develop in less time. One major challenge embedded developers face is the difference in design tools used to program FPGAs and microprocessors. While many developers are comfortable writing high-level C code, at least for sequential microprocessor applications, FPGA programming is typically done in a hardware description language (HDL) such as VHDL. This fundamental gap in communication between developers, which is tantamount to speaking different languages, can add a major hurdle in the development cycle, especially when FPGAs and processors are both used in a single design. To solve this problem, a number of tools, such as Impulse CoDeveloper, have been developed to translate C applications into HDL code. These kinds of tools enable you to specify applications at a high level and then target those applications to FPGAs. In addition, graphical dataflow languages such as LabView allow you to develop for FPGAs without specific HDL knowledge. Because dataflow provides an inherently parallel approach to programming, it also allows you to automatically take advantage of the massively parallel nature of FPGAs. The message here is simple: using high-level FPGA design strategies, such as dataflow languages and C to HDL translators, can maximize the efficiency of your design team and reduce your time-to-market. Program Application (Programmer)

Analyze Parallel Paths (Complier)

Schedule Threads (OS)

Execute Threads Simultaneously (SMP Hardware)

Figure 1 Using a dataflow language such as LabView can speed development of parallel embedded applications.

Finally, one of the most recent technologies to enter the embedded scene is virtualization. The main idea behind this technology is to make better use of processing hardware by abstracting away the details of the specific hardware platform from operating systems and applications. Specifically, one way to use virtualization in embedded designs is to install a piece of software called a hypervisor, which will allow multiple operating systems to run

in parallel simultaneously. This ends up having positive implications on both the overall capability of an embedded system and its use of multicore hardware. In a system with multiple homogeneous processor cores, a hypervisor makes it easy to construct an AMP software architecture where individual operating systems are assigned one or more cores. At a high level, you can think of virtualization technology as making your multicore hardware multitalented (Figure 2). App



Open OS


Hypervisor SW Core 1

Core 2

Core 3

Core n

Figure 2 Installing a hypervisor enables asymmetric multiprocessing (AMP) on a set of homogeneous processor cores.

Though designers often program entire embedded systems from the ground up, pressure to reduce development timeâ&#x20AC;&#x201D;and therefore costâ&#x20AC;&#x201D;has led to higher usage of operating systems in the embedded domain. This, however, presents a problem: how do engineers balance the need for the services and user interface provided by a commercial OS with the real-time performance needed for an embedded application? Imagine, for example, that you are designing a medical imaging machine. How can you take advantage of the built-in UI capabilities of an OS such as Linux while processing imaging data in real time? Using a hypervisor can meet these challenges. Running both a feature-rich commercial OS and a real-time OS in parallel can reduce development time for your embedded applications while maintaining determinism. Though trends in embedded technology including multicore processing, FPGAs and virtualization present a big departure from traditional development techniques, there are some clear steps that you can take to harness them and stay competitive. First, adopt programming tools that abstract away hardware features such as multiple processing cores or FPGA gates. By concentrating on implementing your design while spending minimal time making adjustments for the underlying hardware architecture, you can bring your embedded products to market faster. Programming environments with parallel debugging features, new parallel programming APIs, dataflow programming, and C to HDL converters can all help you achieve these goals. In addition, employing virtualization enables you to take advantage of both real-time processing and commercial OS services to reduce development time and make the most of your multicore hardware. As the next generation of embedded systems grows more powerful than ever, taking advantage of these latest technologies will help your company stay ahead of the curve. National Instruments Austin, TX. (512) 794-0100. [].



products &



3U VPX / cPCI Air-Cooled and Conduction-Cooled Module Development Systems

Two OpenVPX-compliant 3U development systems cover both air- and conduction-cooled projects. Just announced by Extreme Engineering, the XPand1200 is a development platform for conduction-cooled modules, and the XPand1300 is designed for air-cooled modules. Both support a minimum of ten 0.8” or 1.0” pitch slots and are built in accordance with OpenVPX design principles.

The XPand1200 conduction-cooled development system features rapid I/O configuration via rear transition modules (RTMs), star PCIe and Gigabit Ethernet topologies, including PCIe and Gigabit Ethernet switch. The XPand1200 supports up to 550W of total simultaneous power delivery and a thermal dissipation of up to 50W per slot. Weighing 38 lbs (including backplane and power supply) and measuring 8.5” (H) x 11” (W) x 13” (L), the XPand1200 is designed to make the path from conduction-cooled development to deployment effortless. The XPand1300 air-cooled development system also features rapid I/O configuration via RTM modules, removable side covers for debug access, star PCIe and Gigabit Ethernet topologies, including PCIe and Gigabit Ethernet switch. Up to 20 CFM of air-flow is provided per slot as well as 550W of total simultaneous power delivery. The XPand1300 provides the system developer maximum performance and flexibility, weighing only 19 lbs, including backplane and power supply, and measuring 13.5” (H) x 13.5” (W) x 11.6” (L). The XPand1200-1 and XPand1300-1 system configurations come standard with the XTend 4130 backplane, the XChange 3012 switch and the XIt3012 RTM. The XTend4130 is a 3U VPX development backplane designed in accordance with OpenVPX system architecture specifications that supports one or two centralized switches for a single or dual star topology. When one switch is used, the XTend4130 provides a single star centralized switching topology. When two centralized switches are installed, the XTend4130 supports redundancy on both the control and data planes with a dual star implementation. The XTend4130 provides VITA 46.10 RTM connectors for each payload slot and switch slot, and supports VITA 62 connectors for up to two parallel VITA 62 power supply slots. The XTend4130 also supports power sourced from a development DC-DC power supply.

The XChange3012 is a 3U conduction- or air-cooled VPX module designed in accordance with the OpenVPX system architecture specification that provides both PCI Express and Ethernet switches. The PCIe and Gigabit Ethernet fabrics provide switching for a star topology. The Ethernet fabrics allow VPX cards within the system to communicate and also have access to an outside local area network. The XChange3012 supports an XMC interface via a PCI Express link capable of supporting up to 8 lanes. Dual 10/100/1000Base-T rear I/O from the XMC are also routed directly to the XChange3012's Gigabit Ethernet switch. The XChange3012 can optionally support layer 2 or layer 3 management via an XMC 10/100/1000Base-T interface. XMC RS-232 COM rear I/O can be brought out to the P1 connector.

The XIt3012 RTM provides access to the two 10/100/1000Base-T ports from the XChange3012 integrated PCI Express and Gigabit Ethernet switch. The XChange3012 also provides a Mini DB-9 connector for interfacing with RS-232 I/O from an XMC installed on the XChange3012.

XPand1200 and XPand1300 can be coupled with high-performance, low-power 3U VPX or cPCI X-ES single-board computers (SBC), storage, I/O and companion RTMs. The XPand1200-1 and XPand1300-1 system configurations are available now for $7,500, including backplane, switch and RTM. Extreme Engineering Solutions, Middleton, WI. (608) 833-1155. [].




Low-Power, Configurable Touch-Sensing Controller Adds Auto-Calibration

A new line of capacitive touch-sensing devices features low-power 1.8V operation to extend battery life in handheld mobile consumer applications. The CY8C20xx6A CapSense devices from Cypress Semiconductor replace mechanical buttons and sliders, offering attractive, functional interface options for designers. The new family also offers improved response time with the most precise scanning of any CapSense devices. With superior immunity to conducted and radiated noise, as well as robust waterproofing, the new devices also enable reliable touch-sensing operation in applications such as white goods, home appliances, printers, computers and TVs/monitors. The CY8C20xx6A devices have up to 36 general-purpose I/Os (GPIOs) to implement multiple CapSense interfaces. Leveraging the PSoC programmable system-on-chip architecture, a single new CapSense device can also manage functions such as motor control, intelligent sensing, LED control and more—a capability called CapSense Plus. Additionally, the new devices include a full-speed USB interface. The easy-to-use CapSense devices allow customers to bring products to market quickly. The CY8C20xx6A device line is available in multiple configurations and packages, including a small form factor 3x3x0.6-mm 16-pin QFN. Additionally, the CY8C20xx6A family offers the new SmartSense solution, which automatically calibrates capacitive-sensing parameters during the design process, cutting days of development time. While existing solutions require engineers to perform time-consuming calibrations for up to 15 capacitive-sensing parameters, the new SmartSense solution from Cypress Semiconductor, developed for its CapSense devices, sets these automatically during the design process, significantly reducing development time. The SmartSense capability greatly simplifies the replacement of mechanical buttons and sliders, allowing designers to create a single platform for multiple industrial designs without having to manually optimize performance for each design. Engineers can simply incorporate the SmartSense firmware using the PSoC Designer embedded design tool and instantly develop touchsensing interfaces that provide reliable operation over a wide range of capacitance values. This eliminates the need to retune a design each time the thickness or material used for the interface overlay changes, reducing time-to-market and saving development costs for customers. Furthermore, the solution ensures that manufacturing variations in PCBs, overlays and changes in noise environment are automatically calibrated out. The new CY8C20xx6A CapSense devices are supported by the CY3280-20X66 CapSense Development Kit, which includes a development board with ports for the following Plug-in Modules: • CY3280-SLM – Linear Slider Module • CY3280-SRM – Radial Slider Module • CY3280-TPM – Trackpad Module • CY3280-BSM – Simple Button Module • CY3280-BMM – Matrixed Button Module • CY3280-BBM – Breadboard Module Each package option of the new low-power devices is also supported by a CY3250-20xx6 ICE Pod Kit that includes emulator pods and feet, enabling a designer to perform system-level debugging. Cypress Semiconductor, San Jose, CA. (408) 613-7900. [].

“High-Sensitivity” Additions Flesh Out Machine Vision Camera Line

Pushing advances in machine vision technology, Dalsa has announced the availability of three new models in its Falcon high-performance camera family, headed by a new high-sensitivity VGA camera delivering 300 frames per second (fps). The Falcon VGA300 HG, 1M120 HG and 1.4M100 HG feature high-quality Dalsa CMOS image sensors and are suitable for electronics inspection, semiconductor inspection, industrial metrology (gauging) and other machine vision applications.

Ad Index Get Connected with technology and companies providing solutions now Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

As the name suggests, the 1M120 HG offers 1 megapixel resolution with 120 fps, while the 1.4M100 HG delivers 1.4 megapixel resolution with 100 fps. In addition to the HG models optimized for high sensitivity, Dalsa also offers Falcon 1.4M100 XDR, a 1.4 Getthe Connected with technology andmegacompanies prov pixel camera delivering Get 100Connected fps and optimized for high dynamic is a new resource for further exploration into pro range. Not only do these datasheet new Falcons technology for from a feature company,CMOS speak directly with an Application Engine lower power consumption, all four support PowerWhichever over Camera in touch with the right resource. level of Link service you requir Connected will help you connect companies and produc (PoCL), removing theGet need for a separate power cablewith andthereducing system cost and cabling complexity. Fully programmable, these cameras incorporate exposure control, gain and offset adjustment, and flat-field correction to optimize system performance. They back up their superb imaging performance with robust, compact 44 x 44 x 44 mm housings and convenient mounting options. Evaluation units of these cameras are available now, with volume quantities available by the end of the year.


Dalsa, Bellerica, MA. (978) 670-2000.

[]. Get Connected with companies and products featured in this section.

Get Connected with companies and products featured in this section.



Themis Computer 47200 Bayside Parkway Fremont, CA 94538 W (510) 252-0870 P (510) 490-5529 F

Executive Letter to the Industry With the introduction of our T2VPX VPX board, Themis has parallel VME-64 and VPX product lines. We are bringing the T2VPX™ Single Board Computer, and Solaris™ 10 OS support, to VPX first (sampling now), because Themis supports a large DoD, Solaris user base. Our T2VPX is an ideal show-case for the Open VPX ecosystem. Sun’s eight core, 64-live thread (chipmultithreading) T2 microprocessor is an advance System On-a-Chip, with dual integrated 10 Gbit Ethernet controllers, eight lane PCIe controller and integrated wire-rate crypto unit make optimal use of VPX’s rich backplane fabric options. The UltraSPARC® T2 processor goes further than other architectures to support virtualization, including Logical Domains and Solaris “Containers”, to insure backward revision compatibility. This rich architecture is a natural for virtualized Solaris+LINUX® workloads. The Open VPX vision is further exploited with separate maintenance processor and Themis’ Common Maintenance SW stack. Other members of Themis’ VPX family include next generation conduction cooled Intel® based SBC’s and systems, targeting tier 2 UAS applications. Themis systems products are equally as exciting and innovative. We have new stand alone rugged servers that are available as 1RU, 2RU, and 3RU RES systems for use in challenging environments. Our recently announced CoolShell™ Technology-based systems provide users with high compute density, and industry leading SWaP. These systems are compact solutions that are modularly maintainable, have front only access for fans and cabling, and simplify maintenance for field replaceable units. As our customers are seeking high performance, efficient computing solutions, Themis is responding with systems that provide greater reliability, improved life cycle management, and provide truly lower TCO than other COTS systems solutions.

THEMIS T2VPX™ SBC meets VITA46 (VPX) and VITA-65 Backplane Standards • Sun UltraSPARC six or eight core T2 processor • Up to 32GB ECC DDR2 FBDIMM Memory • Three 10 Gigabit Ethernet Ports, two on VPX J1 • CPU independent Board Management Controller • On-board 1.8 in SATA HDD support • Built in Hypervisor with LDOM Support • Front Panel I/O • One (1) 10 GigE Ethernet port • Four (4) GigE ports • Two (2) USB 2.0 ports • One (1) 4x SAS port • One (1) Serial Console port • Shock: 35G peak, 20ms • OS Support: Solaris 10

THEMIS CoolShell™ CS-3U 3RU System with Server Blade and I/O Module • One or two Intel® Quad-Core Xeon® CPUs • Up to 64GB memory • Three high performance dual headed GPUs • Up 1TB HDD (SATA drive) in Media Module and optional five additional 2.5 inch SSD/HDDs • Eight copper Gigabit Ethernet ports (RJ45) • Environmentally robust • withstands up to 30G, 25 ms shock and 1G rms vibration (10-2000 Hz) • meets MIL 901d, 810 and 167 • operates at up to 50°C temperature • reduced electromagnetic radiation emission • Linux®, Microsoft® Windows®, and Solaris™ X86 operating system support

Extreme performance across the board. NEW! XV1™ (Quad-Core Intel Xeon-based VME SBC) • Quad-Core Intel® Xeon® 2.13 GHz processor • Up to 8 GB ECC DDRII SDRAM memory • CompactFlash™ slot • Up to two mezzanine slots on board • Up to three Gigabit Ethernet ports • Four USB ports and three SATA II ports • VITA 41 compliant • Solaris™ 10, Linux® and Windows® support • Up to 30G shock

TC2D64™ (Intel Core 2 Duo-based VME SBC) • 1.5 GHz and 2.16 GHz Intel® Core™ 2 Duo Processors • Up to 4 GB ECC SDRAM Memory • CompactFlash When your mission-critical • Two Gigabit Ethernet ports • Two SATA ports applications require high • Up to four PMC slots performance, turn to Themis SBCs. • On-board graphics controller • Four USB and four serial ports In mission critical applications, there’s no • Solaris 10, Linux and Windows support • Up to 30G shock substitute for high performance. The Themis

family of single board computers includes Quad-Core Intel Xeon with the Intel 5100 MCH San Clemente chipset, also Penryn compatible, in addition to our leading UltraSPARC® products on VME and CompactPCI. So we can support applications in Solaris, Windows, Linux and UNIX®.

All Themis products offer maximum configuration flexibility and life cycle support for your technology refresh cycle process, reducing your Total Cost of Ownership. So when mission success depends on higher performance, you can rely on Themis. Across the board. (510) 252-0870

Transformational. © 2008. Themis Computer, Themis, Themis logo, TC2D64 and XV1 are trademarks or registered trademarks of Themis Computer. All other trademarks are property of their respective owners.


DSP-Based Servo Motion Controllers with Full Closed-Loop Control

Two DSP-based servo motion controllers handle three or six axes of control. The PCI-8253 (three axes) and PCI-8256 (six axes) from Adlink are designed to take full advantage of the latest digital signal processing technologies to provide a Âą10V analog motion controller with full closedloop control, a PID plus feed-forward algorithm and 20 MHz encoder input frequency. The PCI-8253 and 8256 not only provide general motion control functions, but also support comprehensive and application-specific functions suitable for automated optical inspection (AOI), gantry and manufacturing machine applications, as well as complete compatibility with all the top third-party servo drivers in the market. By incorporating a digital signal processor (DSP), the PCI-8253 and 8256 are able to provide advanced, flexible and comprehensive motion functions that cannot be achieved through ASIC-based solutions. Such functions include multiple dimension interpolation and high-speed position comparison. All motion profile algorithms are developed by Adlink and implemented on the DSP. Therefore, application-specific functions can be custom developed for customers. By incorporating FPGA technology, the PCI-8253 and PCI-8256 provide higher motion control performance by a fast encoder input frequency up to 20 MHz. In addition, the hardware-based high-speed position comparison and trigger output speed of up to 1 MHz further make the PCI-8253/8256 ideal for AOI applications. The PCI-8253 and PCI-8256 also offer a point table that supports over 5,000 points for each axis, ideal for contouring applications. Setup and deployment of the PCI-8253/8256 are simplified through Adlink's MotionCreatorPro 2, a user-friendly Windowsbased application development software package. Axis servo gains (PID plus feed-forward gain) can be easily tuned through this tool, which greatly reduces the amount of effort spent on gain tuning. A sampling window also provides a real-time display of the motion data enabling simpler integration of axis parameters, PID gain and other on-the-fly changes. The PCI-8253 and PCI-8256 are currently available for a list price of $1,329 and $2,129, respectively. ADINK, San Jose, CA. (408) 360-0200. [].

Multi-Channel Gigabit Ethernet Data Recorder Supports 500 Mbytes/s

A fixed-featured off-the-shelf multi-channel Gigabit Ethernet (GbE) streaming data recorder system is designed for demanding sensor-to-processor streaming data applications. The Vortex SDRxE from Curtiss-Wright Controls combines a uniquely equipped 3U controller with a reliable, scalable storage subsystem. This rack-mountable data recorder can record up to four channels of GbE data at 125 Mbytes/s per channel. The Vortex SDRxE speeds the integration of high-speed data recording and data logging capabilities into subsystems designed for instrumentation recording, mission recording and SIGINT/ELINT recording applications. The Vortex SDRxE enables high-volume, continuous streaming recording of GbE data. Its flexible storage design enables system integrators to add one or more Vortex SBOD or RAID storage systems as needed for their applicationâ&#x20AC;&#x2122;s required recording duration. A wide range of Vortex storage options includes a 3U SBOD with 16 Fibre Channel (FC) disks, the compact 2U RAID that houses 12 SATA or SAS disks, and the 4U RAID that supports up to 48 SATA or SAS disks. For extreme applications requiring rugged storage, the Vortex SANbric system supports rotating FC disks. The Vortex SDRxE supports the special data storage methods required by streaming GbE-based sensor-to-processor applications. Captured GbE data is striped across multiple FC disks in an SBOD to ensure uninterrupted recording. Because Vortex storage technology bypasses the file system, it provides total control over data storage and enables high-speed data access via FC from other computers using heterogeneous operating systems. The Vortex Graphical User Interface (GUI) controls the recorder. This GUI is fast to learn and easy to set up. After selecting a few parameters, a record or playback session is initiated by simply pressing the corresponding button. Accurate time-stamp for playback of critical data Vortex data recorders feature the unique RapidReplay hardware system that enables the SDRxE to capture and time-stamp incoming individual GbE data frames at full GbE line rates prior to storage. This extremely accurate time-stamping enables the precise data playback, via the GbE channels, needed for detailed post analysis. Time-stamped data is transferred via Fibre Channel (FC) to an external Vortex 3U SBOD (or RAID). With sixteen 450 Gbyte FC disks, a single SBOD provides 7.2 Tbytes of storage. With four channels of 125 Gbyte/s GbE data, the Vortex SDRxE can support nearly 4 hours of recording time. To increase record time only requires the addition of another SBOD. Highly reliable enterprise class, FC disks are designed for 24/7 service with MTBF of >1,600,000 hours. Curtiss-Wright Controls, Dayton, OH. (937) 252-5601 [].




GigE Vision-Compliant Machine Vision Camera

A new industrial camera provides a low-cost solution with high color fidelity, flexibility and ease of use. The Spyder3 Color GigE from Dalsa has the red and blue color pixels alternating in one line and all the green pixels in the other line with no spacing between the two lines to minimize image artifact. The camera offers several color output format options, including RGB, RG/BG, or G only to meet different imaging requirements. This camera also incorporates advanced features such as flat field correction, automatic white balance, and is pre-calibrated to common light sources such as white LEDs, for ease of use. GigE Vision is a camera interface standard that allows fast image transfer over the Gigabit Ethernet communication protocol with much longer cable length compared with Camera Link interface. The earlier Spyder3 camera was designed into applications such as flat panel display inspection, postal sorting, wood and steel inspection, food inspection, web inspection and many others. The new Spyder3 Color GigE camera incorporates Dalsa’s dual line design for excellent color images with outstanding noise performance and flexibility, combined with a low cost. In addition, the GigE Vision-compliant interface enables easy integration with other components and longer cable length from camera to PC. Dalsa’s Spyder3 Color camera offers 2k and 4k resolutions with a 14x14 um or 10x10 um pixel size. Other key features include seamless interoperation among compliant hardware and software from different vendors, and high bandwidth (1000 Mbit/s) for image transfer inGet realConnected time up to 100with meters. Throughtechnology and companies put is 80 Mpixels/s with a max 18 kHz line rate. In addition, a standard Gigabit Ethernet network architecture allowsproviding single orsolutions multiplenow camera connection to single or multiple computers. Get Connected is a new resource for further exploration

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into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Set of Solutions for Distributed Motion and I/O in Machine AutomationGet Connected will help you connect with the companies and products you are searching As the size of automation equipment increases, more motion axes and I/O points are required. Adlink hasfor. now announced a set of comprehen-

Dalsa, Bellerica, MA. (978) 670-2000. []. sive distributed motion and I/O solutions that is targeted at providing motion control of up to 256 axes, and I/O control of up to 2,016 control points through the integration of dedicated and time-deterministic motion & I/O field buses: Motionnet and High Speed Link (HSL). The distributed motion and I/O solutions combine a master controller and comprehensive distributed motion and I/O modules as slaves. Adlink's family of master controllers includes the PCI-7856 PCI-based control board for standard applications, and the DPAC-3000 ruggedized and compact fanless controller for applications requiring greater reliability and stability. Adlink's family of slave modules includes the MNET-J3, MNETS23 and MNET-MIA Get Connected with technologydistributed and companies prov Motionnet Get Connected is a new resource for further into pro single-axis control exploration moddatasheet from a company, speak directly with an Application Engine ules, the MNET-4XMO in touch with the right resource. Whichever level of service you requir series of general-purpose Get Connected will help you connect with the companies and produc 4-axis control modules, and comprehensive HSL digital and analog I/O modules. The MNET-4XMO series features real-time and highly accurate performance for point-topoint, multi-axis linear/ circular interpolation— ideal for electronic components manufacturing for LCD and solar panel applications such as LCD/solar panel substrate, array and cell conveyors and assembly. The MNET-4XMO-C provides Get Connected with companies and path motion for up to 2,048 paths—suitable for applications requiring constant velocity motion suchin as systems. The combination of products featured thisdispensing section. time-deterministic motion performance and scanning of thousands of discrete I/O points (up to 2,016 points less than 1 ms) enables simple mentation of high-speed and high-response motion control systems supporting up to 256 axes. Adlink also provides MotionCreatorPro 2, a Windows-based application development software package included with all distributed motion and I/O control modules. MotionCreatorPro 2 provides simple configuration and real-time statuses of modules, in addition to precise positioning control with no effort.


ADINK, San Jose, CA. (408) 360-0200. [].

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Development Platform Features New Texas Instruments Multicore DSP

An off-the¬-shelf multiprocessor, multicore development solution features dual Texas Instruments (TI) TMS320C6472 Digital Signal Processors (DSPs). The EVP6472 from Sundance Multiprocessor Technology features design support from the Diamond multiprocessor tool-suite from 3L. Diamond enables easy access to the onboard 12 C64x+ cores and allows the designer to rapidly build, model, test and iterate different design architectures by moving tasks between the processor cores. The EVP6472 is suited to the development of high-performance applications such as high-end industrial, mission critical, test and measurement, communication, medical imaging, blade server and high-end image and video processing. The 500 MHz six-core C6472 from Texas Instruments is the best power performance multicore DSP with 0.15 mW/MIPS at 3 GHz performance. The 700 MHz C6472 with a total 4.2 GHz performance and 4.8 Mbyte on-chip L1/L2 memory is among the highest performance DSPs from TI. The C6472 architecture was designed to ensure a maximized subsystem performance on a chip. One of the advantages of this architecture is that in addition to dedicated Layer 1 (L1) and Layer 2 (L2) memory to each core, C6472 features 768 Kbyte shared L2 program/data memory and a shared memory controller to facilitate high efficient and flexible inter-DSP core communications. The EVP6472 is provided with a TIM carrier card and a modular plug-in that features dual C6472 multicore DSP, a Virtex5 FX30 FPGA with embedded PowerPC, 2 banks of DDR2 memory, Rocket Serial Link (RSL) connectors and a host USB 2.0 interface. The development platform is supported by TI’s Code Composer Studio (CCS), and the 3L Diamond tool-suite. The Diamond suite allows developers to separate the implementation of their application into a software section based around communicating tasks, and a hardware section built from processors joined by data-transfer links. Tasks can be placed on any of the twelve C64+ cores and the Diamond API allows the efficient exchange of data between tasks. Diamond uses its built-in device drivers to support uniform communication, automatically using the shared memory between tasks, and a virtual channel system is also available for deadlock-free data routing. For a time-limited period, pricing starts at $2,000. Sundance Multiprocessor Technology, Chesham, UK. +44 1494793167. [].

USM-Based Dual Fast Ethernet PMC Offers FPGA Flexibility

A new Dual Fast Ethernet PMC is based on the Universal Submodule (USM) concept that implements a board's desired functionality through one or more IP cores in an FPGA. The corresponding line drivers are located on the main USM module, which simply plugs into the respective base mezzanine. In the P511 PMC from Men Micro, the Ethernet functionality resides on an IP core in the onboard FPGA. For this reason, the PMC provides exceptional design flexibility, because the IP core is easily updated and changed. This helps designers quickly turn individual I/O requirements into production-ready products, reducing design time and costs. The new P511 PMC is suitable for a variety of mission-critical applications found throughout the telecommunications, industrial, medical, transportation and aerospace industries. The Ethernet interface includes two 10/100Base-T Ethernet channels featuring half and full duplex operation accessible on two channels via two RJ45 connectors routed to the front of the board by an adapter cable from an SCSI connector. The P511 can buffer all receive and transmit Ethernet frames either locally or in an external buffer for traceability and error analysis. Up to six GPIO lines can be used on the module for additional functionality. Alternate gateways can be constructed by combining an Ethernet core and a fieldbus interface. The 32-bit/33 MHz P511 is suitable for use with any PMC-compliant host carrier board in any bus system such as CompactPCI, VME or other stand-alone SBCs (single board computers). The PMC is fully integrated to comply with IEEE802.3, features a 1,500 VAC isolation voltage and can withstand an extended temperature range of -40° to +85°C. For extremely dusty or humid environments, an optional conformal coating is available. Guaranteed minimum availability of the P511 Dual Fast Ethernet PMC is 10 years, reducing the chance of component obsolescence. Quantity one to nine pricing is $743. MEN Micro, Ambler, PA. (215) 542-9575. [].




PCI Express Gen 1.x, 2.0 and 3.0 Decode Annotation Speeds Validation and Debug

PCI Express Decode Annotation, which is available on a wide range of oscilloscopes from LeCroy, provides new capability for hardware and system engineers to simultaneously understand the physical layer and protocol behavior of high-speed PCI Express serial data signals. The new capability provides a link layer protocol decode for up to four PCI Express signals annotated on the oscilloscope physical layer waveform. Combined with LeCroy’s 8b/10b decode annotation tool (a separate option), simultaneous symbol/primitive and protocol level understanding can be achieved. For faster time to insight, all the standard math, measure, cursor, zoom and other analysis tools available in the oscilloscope may be used concurrently. The new PCI Express Decode Annotation capability has widespread application for all versions of PCI Express. It is especially helpful for the emerging PCI Express Gen 3.0 standard, where new silicon physical layer (PHY) links are beginning to be validated before the standard has been finalized. In the early PHY validation stages, the physical layer signals may not exhibit the desired signal fidelity, and a significant amount of physical layer debug must often occur before a specialized protocol analyzer can be used. In addition, it can be difficult to time correlate protocol analyzer and oscilloscope captures; therefore, interpretation of the information from the two different tools could be more time-consuming and more error prone. By providing the decoded information as an annotation on the physical layer waveform within the oscilloscope, the protocol and physical layer information is synchronized, and permits easy scrolling and review of the captured data, as is often necessary. Thus, interpretation is easier, faster and more reliable in the early PHY validation stage. The initial data rate for decoding may be set to the common 2.5, 5, or 8 GT/s. PCI Express Gen 2.0 and Gen 3.0 begin handshaking at lower bit rates, and once the link is established, increase to their maximum data rate. The decode algorithm recognizes the different bit rates and decodes appropriately, and supports modes with and without scrambling enabled. Advanced algorithms deconstruct the waveform into protocol information, and then annotate the physical layer waveform on the oscilloscope grid. Decode annotation condenses or expands depending on the time base/zoom ratio setting. Various portions of the protocol are colorcoded for intuitive, quick visual understanding of the protocol behavior and easy visibility, even with long acquisitions. For instance, TS1 and SKIPs are color-coded a grayish blue while Electrical Idle, Error, or Unrecognized frames are color-coded red. Other message types are uniquely color-coded. To support the large installed base of LeCroy users, the option is available on a wide range of oscilloscope models with real-time bandwidths from 2.5 GHz to 30 GHz supporting the full range of PCIe users, from Gen 1.x to 3.0. LeCroy, Chestnut Ridge, NY. (800) 553-2769. [].

VMEbus SBCs Based on Low-Power Core2 Duo Processor

A VMEbus single board computer (SBC) is designed to meet the needs of users requiring the low-power Intel processor and high performance, for their demanding applications. The Intel Core2 Duo processors offer energy efficiency, workstation performance and extended lifecycle support. The new LV1 boards from Themis Computer support the Linux, Sun Solaris 10 and Windows Operating Systems, and are suitable for compute-intensive commercial, medical and industrial applications, as well as demanding military and aerospace applications. Themis’ LV1 is based on the low-power Intel Core2 Duo SL9400 processor with 45nm process technology that provides users with improved energy-efficient performance. Intel’s hafnium-based 45nm Hi-k silGet Connected with technology and icon process technology enables even more companies providing solutions now processor performance by doubling transisConnected tor density and increasing cacheGet size by up to is a new resource for further exploration into products, technologies and companies. Whether your goal 50 percent. The result is improved speed and is to research the latest datasheet from a company, speak directly efficiency, relative with to anprevious-generation Application Engineer, or jump to a company's technical page, the dual-core Intel processors. Intel Core2 Duo goal of Get Connected is to put you in touch with the right resource. processors provide Whichever the bandwidth level of necessary service you require for whatever type of technology, Get Connected help you connect with the companies and products to support the high-performance I/Owill features of the LV1 board. you are searching for. The LV1 base configuration includes: Intel Core2 Duo processor, four gigabytes of DDR II memory, three Gigabit Ethernet ports, three SATA II ports, four USB 2.0 ports and two XMC/PMC slots. An onboard ATI ES1000 video controller is Get Connected with technology and companies prov provided with either front or rear panel Get Connected is a new resource for further exploration into pro VGA access. Storage can be provided datasheet from a company, speak directly with an Application Engine through the use of an onboard Compactin touch with the right resource. Whichever level of service you requir Flash or with an optional onboard drive. The board Get ConnectedSATA will help you connect with theincludes companies and produc optional VITA dual Gigabit Ethernet to support the modern highly networked environments. The LV1 has extensive I/O. Two expansion sites provide a wide variety of configurations. Expansion Site 1 can be configured with up to 8 Gbytes SoDIMM memory or an XMC/PMC slot, SATA Hard Drive or 2 GbE ports to the front panel. Expansion Site 2 can be fitted with an XMC/PMC Slot or a connection to a PMC/XMC carrier card, which enables the use of up to three additional PMC/XMC cards. Additionally, it can connect 2 GbE ports to the front panel. These configuration options enable the LV1 to bring workstation performance to a 6U VME form factor. The LV1 and its three-slot XMC expansion board are fully RoHS compliant. Get Connected companies and []. Themis Computer, Fremont, CA.with (510) 252-0870.

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products featured in this section.

Get Connected with companies and products featured in this section.




Embedded Database Upgrade for Scalability and Flexibility in Real-Time Apps

With version 4.0 of its flagship eXtremeDB embedded database product, McObject offers organizations the ability to eliminate the need to create custom data management code, reducing development and support costs for real-time systems and gaining higher performance. For manufacturers, eXtremeDB’s frugal appetite for memory and CPU cycles lowers hardware costs, resulting in savings that drop to the bottom line—or can be used to reduce end-user price, to gain market share. Whether handling critical data for a combat jet’s navigation system or managing a real-time Web application for financial services, eXtremeDB offers multiple features—from a type-safe programming interface to an optional high-availability database subsystem—to build in reliability, durability and data integrity. McObject’s eXtremeDB 4.0 offers the following enhancements to provide customers with expanded development capabilities, greater speed and resourceefficiency, and an unprecedented new level of scalability: • Multi-Version Concurrency Control (MVCC) Transaction Manager—eXtremeDB’s new option for regulating access to the database eliminates “locking.” Now, companies can dramatically improve scalability and performance, especially in applications with many tasks or processes, and on multicore systems. • New Index Structures—eXtremeDB 4.0 adds support for the KD Tree, a data index that eases development, accelerates data processing and enables developers to add highly efficient query features. • Data index algorithms in eXtremeDB 4.0 are optimized for the MVCC Transaction Manager and deliver faster performance. • L ogical Database Devices—McObject’s new release introduces the concept of logical database devices, which simplifies commands to create a database, whether in memory or on persistent storage, or both. The new feature also adds techniques for performance optimization and database recovery when working with two or more storage devices, whether they are spinning disks or Solid State Disks. • New Application Programming Interface (API)—eXtremeDB 4.0 expands an already-large developer toolset with a new Uniform Database Access API. This “one size fits all” function library is fast—native to C/C++—and can be used across all projects. eXtremeDB also provides a project-specific native interface, as well as APIs supporting industry-standard SQL. McObject, Issaquah, WA. (425) 888-8505. [].

Single-Slot PCIe x16 Octal Graphics Card for MissionCritical Environments

A PCI Express graphics card is capable of supporting eight DisplayPort or DVI Single-Link outputs from a single workstation. The Matrox M9188 PCIe x16 offers 2 Gbytes of memory, resolutions up to 2560x1600 per output, and advanced desktop management features—such as independent or stretched desktop modes—to drive energy, transportation, process control, financial trading and other mission-critical environments with exceptional performance. The M9188 is designed specifically for professional monitoring environments that require visualization of large amounts of data at once to enhance mission-critical decision making. The expansive multi-monitor configuration allows system operators to accurately manage energy grids or train dispatch applications, while ensuring maximum performance across all displays. The Matrox M9188 offers support for Microsoft Windows XP, as well as for Linux, which is critical for energy and transportation applications that commonly use display configurations of more than eight monitors. Matrox also announced a second addition to the M-Series product line with the Matrox M9128 LP PCIe x16, DualHead DisplayPort graphics card. This dual-monitor add-in board is the economical choice to drive business, industrial and government applications across two displays at resolutions up to 2560x1600. In addition to native PCIe x16 performance, the single-slot graphics cards feature 1 Gbyte (M9128) and 2 Gbytes (M9188) of memory. They can drive two (M9128) or eight (M9188) DisplayPort monitors at 2560x1600 per display or DVI Single-Link monitors at 1920x1200 per display and they can be combined with other M-Series products (multicard support). The cards feature support for stretched or independent desktop modes across all monitors and provide for easy deployment and wide enterprise flexibility with unified driver package. Pricing for the M9128 will be $259 and for the M9188 $1,995. Matrox, Dorval, Quebec. (514) 822-6000. [].



RTD Embedded Technologies, Inc. “Accessing the Analog World”

Shown in the stack: PCI/104-Express Intel® Core™ 2 Duo cpuModule® with onboard Advanced Analog and Digital I/O, stacked with a high-speed digital I/O dataModule®, high-resolution analog I/O dataModule®, dual gigabit ethernet card, and ATX power supply. Operational from −40 to +85°C.


Intel Core™2 Duo CPU 1.86GHz with 2GB soldered DDR2 SDRAM, and onboard Advanced Analog & Digital I/O

The Clear Choice for Embedded Computing.

An ISO9001:2000 Company

RTD is an ISO9001:2000 company. Copyright © 2009 RTD Embedded Technologies, Inc. All rights reserved. All trademarks or registered trademarks are the property of their respective companies.


PCI Express 48-Channel Digital I/O Card with Change of State Detection

A 48-channel PCI Express (PCIe) card has been designed for use in a variety of digital I/O applications. The PCIe-DIO48S is compatible with 8255 PPI (mode 0), making it easy to program and migrate from other Acces PCI digital I/O cards. The card features a x1 lane PCI Express connector that can be used in any x1 or higher PCI Express slot. The PCIe-DIO48S is suitable for use in application sensing inputs such as switch closures, TTL, LVTTL, CMOS logic and controlling external relays, driving indicator lights and more. Each I/O line is buffered and capable of sourcing 32 mA or sinking 64 mA. Since the PCI Express x1 connector does not have sufficient power to drive this many channels, Acces provides an onboard Molex PC-style connector compatible with system power supplies (for disk drive power), to externally provide maximum 5V current sourcing capability. Connections to the card are made via two industry standard, 50-pin headers. Each header has three 8-bit I/O ports designated A, B and C. Each port can be programmed as inputs or outputs. Change of State (COS) detection and interrupt capabilities are designed to relieve software from polling routines that can consume valuable processing time. Each port can be programmed for detecting state changes on their lines. An ISR (interrupt service routine) then reads the port to determine which bit changed state and clear the interrupt. The card is supported for use in most operating systems and includes a free DOS, Linux and Windows 2000/XP/2003/Vista/7-compatible software package. This package contains sample programs and source code in Visual Basic, Delphi and Visual C++ for Windows. Also provided is a graphical setup program in Windows. Linux support includes installation files and basic samples for programming from user level via an open source kernel driver. ACCES I/O Products, San Diego, CA. (858) 550-9559. [].

PCI Express Digitizer Capable of Sustained Recordings over 1.2 Gbytes/s

A new high-speed digitizer in the form of an advanced wideband and high dynamic range A/D board captures signal frequencies up to 200 MHz, when using the programmable gain amplifier in 1 dB steps for maximum gain attenuation flexibility. Frequencies go up to 400 MHz if the direct transformer coupled connection is employed for the cleanest possible signal path to the ADC. The PX14400 from Signatec includes 1 Gbyte of onboard memory configured as a large FIFO and a PCIe x8 bus to ensure it can continuously sustain long recordings at over 1.2 Gbytes/s through the PCIe x8 bus to PC disk storage without any break in the analog record. Of the two embedded Virtex-5 FPGAs, one is expressly available for custom in-line signal processing. As a Xilinx Alliance Program partner, Signatec created standardized data and control interfaces that are customer accessible along with VHDL source code examples that demonstrate the use of these interfaces to simplify real-time processing tasks through its optional firmware development kits. Up to five PX14400 boards may be interconnected in a Master/Slave configuration via a ribbon cable that connects at the top of the board. In this configuration, clock and trigger signals from the Master board drive the Slave boards for synchronized sampling across all boards. Additional boards can be synchronized, even across computer chassis, when using Signatec’s Sync1500-6 product. The PX14400 supports single shot, segmented and pre-trigger triggering modes. In Segmented Mode, “time stamps” allow for storing the time relationship between the memory segments. Time stamps are 64-bit timer values with a clock resolution of 5.0 nanoseconds, and are accumulated in a 2048 element FIFO memory separate from the data. If necessary, time stamps may be read during acquisition in order to prevent overflow. This is possible in any acquisition mode. Signatec, Newport Beach, CA. (949) 729-1084 [].



2-Channel Synchro/Resolver Interface Boards for PowerDNA Cube and PowerDNR RACKtangle

A pair of boards is available in two models for a wide range of rotational position or motion applications. The DNx-AI-255 synchro/resolver interface boards from United Electronic Industries are for use with UEI’s PowerDNA Cubes and, in another form, for rack-mounting in a PowerDNR RACKtangle or HalfRACK chassis. Multiple operating modes ensure compatibility with all standard sensor wiring and excitation configurations. Each board has two fully isolated, synchro/resolver channels with independent A/D converters, and each channel offers 16-bit resolution, ±2.6 arc-minutes accuracy, and scan rates up to 4000 Hz. A key feature of the new boards is the ability to operate either as a synchro/resolver input interface or as a simulation output device on a per channel basis. Each of the channels may be configured either as a synchro/resolver input with internal or external excitation or as a synchro/resolver simulated output. Each simulated output may be used as a software-controlled input stimulus for an avionics test system or flight simulator. Each channel may be configured to output 50 Hz to 4 kHz excitation voltages to the primary of a synchro/resolver device or alternatively as the simulated output voltage from the secondary of a synchro/resolver. In simulator mode, the board uses a software-defined value as the position input for a simulated device. The DNx-AI-255 is fully supported by UEI’s software suite, which includes factory written support for all popular operating systems (e.g., Windows, Linux, VxWorks), programming languages (e.g., C, C# and VB .NET) and application packages such as LabView, Matlab and DasyLAB. Pricing for the DNA-AI-255 for Cube-based systems is $3,500 and for the DNR-AI-255 for RACKtangle or HalfRACK systems, $3,650. United Electronic Industries, Walpole, MA. (508) 921-4557. [].


VIRTUAL CLASSROOM The most important event of this year is now at your finger tips. Gain access to 120 Talks from top industry leaders. Topics include: • Energy Efficiency • Keynotes • MCU & Tools • Technical Sessions • Internet Everywhere • Panel Discussions


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Capacitive Touch Development Suite for Atmel AVR Microcontrollers

A complete development suite for capacitive touch buttons, sliders and wheels using AVR microcontrollers from Atmel includes the new QT600 development kit and QTouch Studio, AVR Studio and free QTouch Library SW package for AVR microcontrollers. Atmel’s QT600 offers an environment for the designer to evaluate and design touch-based solutions. The QT600’s scalable design allows designers to use their own touch sensor boards with various microcontroller boards or to connect QT600 sensor boards directly to their own application. The Atmel QTouch Suite supports development and analysis of capacitive touch button, sliders and wheels in applications using 8- and 32-bit AVR microcontrollers. QTouch Studio supports both the QT600 development kit and the designer’s own application. AVR Studio is the leading professional tool for development and code debugging for AVR microcontrollers with more then 150,000 users worldwide. With the QTouch Library 3.0, Atmel offers a free software library for embedding capacitive touch buttons, sliders and wheels onto any AVR microcontroller. The kit consists of the QT600 hardware kit and the QTouch Studio development tool plus a set of software tools and libraries. The QT600 Touch Hardware Kit and Example Code is a complete touch development kit for buttons, sliders and wheels. This advanced development platform allows designers to experiment with Atmel touch technology, and provides the easiest way to analyze and validate touch products and supports both QTouch and QMatrix acquisition methods. It comes with one USB-powered interface board, three MCU boards representing the tinyAVR, megaAVR and AVR XMEGA families of microcontrollers, and three touch sensor boards supporting up to 64-channels. QTouch Studio is the front-end software used to display and evaluate the data reported by the QT600 development kit. QTouch Studio makes it easy to inspect how a touch implementation performs, and the designer can use this information to tune a touch implementation for maximum performance. It also supports other QTouch evaluation kits such as the AVRTS2080A and AVRTS2080B. The QTouch Library is a royalty-free software library for developing touch applications on standard Atmel AVR microcontrollers. Customers can link the library into their firmware in order to integrate touch-sensing capability into their projects. The library can be used to develop single-chip solutions for many control applications, or to reduce chip count in more complex applications. AVR Studio is a professional Integrated Development Environment (IDE) for writing, simulating and debugging applications for AVR microcontrollers. It also comprises the programming interface for all AVR tools. To add touch functionality to an existing application, customers can import projects into AVR Studio together with the QTouch Library binaries. The Atmel QT600 development kit is priced at $199. Atmel, San Jose, CA. (408) 441-0311. [].

PrPMC / XMC Module Features Core2 Duo Processor

A conduction- or air-cooled PrPMC / XMC module supports the Intel Core2 Duo processor running at up to 1.8 GHz. The XPedite7101 from Extreme Engineering Solutions comes with PCI Express or PCI interconnect and a Gigabit Ethernet port with integrated magnetics. The card is suitable for high-bandwidth dataprocessing applications and features main memory up to 2 Gbytes of DDR2-400 SDRAM with an additional complement of NAND flash up to 4 Gbytes. The P14 PMC interface includes two USB ports, two SATA ports, an RS-232/422 serial port, eight GPIO signals and Gigabit Ethernet. In addition, the P16 interface provides two USB ports, two SATA ports, one RS-485 port or two RS-232/RS-422 ports, four GPIO signals and an additional Gigabit Ethernet connection. In-house X-ES operating system support includes board support packages (BSPs) for Green Hills Integrity, Wind River VxWorks, QNX Neutrino, Linux LSP and also comes with a set of Windows drivers. Intel’s Core2 Duo processor expands the X-ES product line of PrPMC/XMC modules, available in ruggedized air-cooled and conduction-cooled versions and is suitable for both commercial and military applications. Pricing starts at $5,410 with volume discounts available.

1U Rackmount Appliance Supports Core2 Quad Processor

Extreme Engineering Solutions, Middleton, WI. (608) 833-1155.

A high-performance 1U rackmount appliance supports a broad range of network services for the enterprise and small businesses. The PL-80140 from Win Enterprises supports the Intel Core2 Quad processor and provides processing scalability with support for Pentium Dual Core and Celeron D. The Intel Core2 Quad Processor is designed to handle intense compute and visualization workloads for highly threaded applications. The PL-80140 couples the Intel Core2 Quad processor and a 1333 MHz Front Side Bus. The unit is designed with Intel Embedded IA components warranted for longevity to provide long product life. A high-bandwidth dual-channel DDRII DIMM socket supports 800/667 memory with up to 4 Gbytes at 800 MHz. The unit is available with six Gigabit Ethernet ports through PCI-E x1 interface and offers four ports of optional bypass function. The PL-80140 delivers high throughput for a broad range of network applications that include gateway security, UTM, network management, load balancing, WAN optimized acceleration and VoIP gateway. The PL-80140 is RoHS, FCC and CE compliant. Up to six GbE copper ports are available via PCIe x1. Additionally, optional cryptographic hardware acceleration is available. Pricing begins at $554 in OEM quantities.


WIN Enterprises, North Andover, MA. (978) 688-2000. [].




MicroTCA Carrier Hub Family Supports Four Different High-Speed Fabrics

A new line of modular carrier hubs (MCHs) in the AMC/MicroTCA form factor are aimed at fulfilling the management needs of data-intensive MicroTCA applications. With GbE, sRIO, PCIe or even 10 GbE fabrics, they support four different high-speed fabric variants. The AM4904/AM4910 MCHs from Kontron come in four versions: a pure Gigabit Ethernet switching MCH, in combination with a PCIe mezzanine or with sRIO and for highbandwidth demands, with 10 Gigabit Ethernet switching. All versions provide central management and data switching functionality on a full-size, single-width Advanced Mezzanine Card (AMC) form factor. Equipped with a 600 MHz PowerPC 405EX processor for MCMC functionality and switching management, they enable highly efficient, redundant system architectures with up to 12 AMCs, two cooling units and four power units. With a focus on high-performance applications, Kontron’s latest MCHs are a fit for data-intensive MicroTCA-based communication applications in both telecom—including 3G, LTE and network test equipment—and non-telecom markets such as military, medical, test and measurement, as well as image and video processing applications. To provide support for various Telco clocks, all Kontron AM4904/AM4910 MCHs feature a clock implementation and a PCI Express fabric clocking distribution. They also include high-performance features such as a wire speed, Enterprise-Class Ethernet switch with Layer 2 switchGet Connected with technology and ing and Multi-Cast support including full 4K VLANs and link aggregation, quality-of-service support (QoS) and a packet classification engine companies providing solutions now for flexible access control lists. A full set of standard management interfaces including: a user friendly CLI, SNMP, IPMI and Web access enable Get Connected is a new resource for further exploration easy initialization and controlling of the MCH’s switching and management functionality. External systems or shelf managers to Whether the into products, technologiescan andconnect companies. your goal Kontron MCHs via the Ethernet front panel ports. Special care has been taken to guarantee full support the PICMG MicroTCA.0 standard by speak directly is toof research the latest datasheet from a company, testing with the Polaris test suite for MicroTCA MCHs. with an Application Engineer, or jump to a company's technical page, the goal of Get It Connected is to managed put you in touch the right resource. The Kontron AM4904-BASE MCH provides Tongue 1 and Tongue 2 to the MicroTCA backplane. offers a fully Layerwith 2 wirelevel of service you require for whatever type of technology, speed Gigabit Ethernet switching functionality (Fabric [A]) including two 1000/100/10BASE-TWhichever uplink ports. Get Connected will help you connect with the companies and products The Kontron AM4904-PCIE extends the AM4904-BASE with an additional mezzanine switching capabilities. It offers PCIe youfor arePCIe searching for. GEN2 Fabric (DEFG) switching functionality (x4 to 12 AMC) with support for multiple root complexes. The Kontron AM4904-SRIO, which is also based on the AM4904-BASE, features sRIO Fabric (DEFG) switching functionality (x4 to 12 AMCs + two uplinks x4 at the front panel). The Kontron AM4910 comes with a fully managed Layer 2 10GbE Fabric [DEFG] and Gigabit Ethernet switching functionality. Layer 3 can be offered on a project request basis. The additional Tongues 3 and 4 connect each six 10GbE lanes plus one 10GbE update channel to the backplane.

Ad Index

Kontron, Poway, CA. (888)-294-4558. [].

Get Connected with technology and companies prov

Development Platform Features Blackfin Processor and .NET Micro

Get Connected is a new resource for further exploration into pro datasheet from a company, speak directly with an Application Engine Framework in touch with the right resource. Whichever level of service you requir Get Connected will help you connect with the companies and produc

A new VITA 57-compatible development platform features the Analog Devices Blackfin BF518F processor and also runs the Microsoft .NET Micro Framework operating system, making it suitable for use in embedded industrial automation applications where low power and convergent processing are essential. The Analog Devices BF518F FMC Development Kit from Avnet Electronics Marketing offers hardware and software design engineers the flexibility they need by providing an I/O mezzanine card, electrically compatible with the FMC VITA57 specification. This feature enables the connection to FMC carrier cards and facilitates the development of applications using the Analog Devices BF518F Blackfin processor with field programmable gate arrays (FPGAs). The result is a modular, convenient development platform suitable for integrating hard-wired control applications with a flexible and familiar software environment and network connectivity for industrial automation and smart energy management applications. Get Connected with companies and By enabling the .NET Micro Framework on this board, the developers now haveproducts access featured to programming models and tools, including Visual in this section. Studio, that have made the desktop environment productive while maintaining the access to the underlying hardware that is needed. The tion of the hardware “future proofs” the applications so that work done on these development platforms can migrate easily to the eventual products. The kit is available for $349, or $499 with the add-on debug agent board.


Avnet Electronics Marketing, Phoenix. AZ. (800) 408-8353. []. Get Connected with companies and products featured in this section.



One Stop Systems 2235 Enterprise Street Suite 110 Escondido, CA 92029 W (877) 438-2724 P (760) 466-1678 F

Executive Letter by Steve Cooper President and CEO, One Stop Systems During the “slowdown” of 2008/09, One Stop Systems has been feverishly innovating new technologies and product offerings. Our feeling is that just because the economy is slow, that doesn’t mean that technology cannot make significant advances. With this aggressive attitude and investment, we believe One Stop is well positioned to take advantage of an improving market climate in 2010. We are particularly excited about the growth prospects in three areas: • PCIe over Cable • New innovations include the upgrade to x16 connections at Gen 2 speeds. This provides 80Gb/s bandwidth over a cable. This technology enables many applications where the amount of I/O, compute power or flash memory exceeds the space available in a single chassis. • Two applications that are enabled by the latest PCIe over cable innovations include GPU-based computational acceleration systems and solid state disk appliances based on native PCIe flash cards. • Telecommunications Servers: • The latest generation of CPUs, memory and disk drives combine to make the new NEBS-compliant motherboard-based servers extremely powerful, cost effective and flexible. Now, more than ever before, telecom applications can be implemented via simple 1U server solutions. • Military Disk Arrays: • Disk drive advances in capacity and ruggedness now allow the creation of massive (10 TB or more) removable disk drive modules that are extremely rugged. One of the best application for this new technology is for data storage in intelligence gathering operations, where the drives can be quickly removed for secure storage at the end of each mission.

The First GPU/SSD 2U Server The first server to offer the option of either an AMD dual sixcore Opteron-based motherboard or an Intel dual Xeon-based motherboard and eight PCIe x16 Gen 2 expansion slots in a 2U chassis. The system supports 10TeraFLOPS of GPU compute power or 5TB SSD storage or a combination of both. In addition, OSS has packed even more storage capacity into the system with four hot swappable hard disk drives and an internal RAID controller. The server is powered by dual, redundant 1,500 watt power supplies and housed in a 2U high chassis designed and manufactured to meet rigorous environmental demands. • Dual AMD Opteron or Intel Xeon processors • Supports up to 10TFLOPS GPU or 5TB SSD • Dual 1500 watt power supplies • Quad 3-1/2” hot swappable drives

1U and 2U Acceleration Systems Provide GPU and SSD Expansion OSS PCIe expansion platforms are designed specifically for high performance computing and high speed graphics. The expansion platform supports either two double-slot graphical processing units (GPU’s) or four single-slot GPU’s. An internal system monitor surveys system parameters and reports status through an Ethernet port on the rear of the enclosure. The PCI Express interface delivers data transfers up to 80Gb/s to the host system through a host adapter that installs in the host computer’s PCIe x16 expansion slot. A 1-meter standardized PCIe x16 cable is included with the platform. • Expansion connectivity to Gen 2 host systems at 80Gb/s • Includes PCIe x16 Gen 2 host cable adapter and 1 meter cable • 1U supports two double-slot cards or four single-slot cards

One Stop Systems remains committed to technological innovation as a means to providing state-of-the-art solutions for our customers.

• 2U supports four double-slot cards or eight single-slot cards




The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

December 2008

January 2009


Solid State Storage: Capacity and Speed in Small Tough Spaces


Mezzanine Boards Fight Off Obsolescence

Microcontrollers Latch onto the Internet

Small Form Factor SIG Corrals New Standards

Smoothing the Path between COMs and I/O

Nailing Down What Security Really Means An RTC Group Publication

Wireless Sensor Nets: From Factory Floor to Mountain Top

Fine-Tuning Flash for Embedded Apps An RTC Group Publication



Industry Insider................................................................. 8

Industry Insider................................................................. 6

Small Form Factor Forum

Small Form Factor Forum

Technology in Context—On-Board Storage

Technology in Context—Microcontrollers Bringing Internet Connectivity to 8- and 16-bit Microcontrollers..................................................................... 10

SF’s $1 Billion Investment in Electric Vehicle Infrastructure Bodes Well for Embedded........................................................ 6

The CPU is the Chicken. No, it’s the Egg. No, it’s the Chicken................................................................................. 10 SSDs Take Hold in Embedded Applications............................ 12 Gary Drossel, SiliconSystems

To Defrag or Not to Defrag—That Is the Question for SSD.................................................................................. 16 Yu Hsuan Lee, Apacer Technology

Solutions Engineering—Mezzanine Boards

Developing an Obsolescence-Proof XMC for Safety-Critical Applications........................................................................... 24 Alan Commike, Quantum3D

Industry Insight—Standards Update

Small Form Factor Special Interest Group Pushes Ambitious Standards Effort..................................................................... 30 Paul Rosenfeld, President, SFF-SIG

System Integration—Software Security

Secure Software and Systems: Follow Five Principles and Prove It.................................................................................. 36 David Kleidermacher, Green Hills Software

Featured Prodcuts.......................................................... 40 Products & Technology................................................. 42 News, Views & Comment

Winding Down or Winding Up?.............................................. 58 Warren Andrews, Associate Publisher

Annual Article Index....................................................... 60

Not Just for Tree-huggers: Green Will Be a Major Opportunity for the Embedded.................................................................... 5

Where There’s a Bridge, There’s a Way................................... 8

Rodger Richey, Microchip Technology

Solutions Engineering—Wireless Sensor Networks Compact Application Protocol (CAP): Uniting the Best of IP and ZigBee................................................................................... 14 David E. Culler and Gilman Tolle, Arch Rock

Wireless Sensor Networks: Maintenance-Free or Battery-Free?........................................................................ 18 Cees Links, GreenPeak

Industry Insight—Interconnect Wars

Interconnect Wars? Let Peace Prevail with Interconnect Standards.............................................................................. 22 Robert A. Burckle, WinSystems and Colin McCracken, ADLINK Technology

System Integration—Machine to Machine

Service-Oriented Devices Will Require Standards for Success..... 26 Olivier Bloch, Microsoft Windows Embedded

Industry Watch—Solid State Storage Taking the Guesswork out of Flash System Design................ 30 Matt Porter, Embedded Alley and Bill Weinberg,

Featured Product. ........................................................... 34 Products & Technology................................................. 36 News, Views & Comment

Were There Bright Spots in 2008? Is There Hope for 2009?.................................................................................... 48 Warren Andrews, Associate Publisher





MARCH 2009

The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

February 2009

March 2009

COM or SBC: Which to Choose, Which to Use?


Getting the Most out of


Which to Choose, Which to Use?

Ethernet Beyond 10 Gigabits: Ready for Prime Time?

FPGAs Supercharge Board Solutions

Speed Simulations with a Reflective Memory Network

CompactPCI Plus: A Look at the New Spec

Build or Buy: The Case for Outsourcing ATCA

An RTC Group Publication

Getting the Most out of Multicore Processors

An RTC Group Publication



Industry Insider................................................................. 8

Industry Insider................................................................. 6

Technology in Context—COMs vs SBCs New Impulse for Embedded Computer Modules.................... 12

Small Form Factor Forum

Chewing Gum and Bailing Wire................................................ 6

Gerhard Gilch, congatec

COMs vs. SBCs: Forward Thinking Helps Make the Best Embedded Choices................................................................ 16 Christine Van De Graaf and Nancy Pantone, Kontron

Solutions Engineering—FPGA Board Solutions

New FPGAs Transform Real-Time Systems Architectures...... 22 Rodger Hosking, Pentek

Recent Trends in FPGAs Drive Adoption in Mil Apps ............. 30 John Wranovics, Curtiss-Wright Controls Embedded Computing

Industry Insight—CompactPCI Plus

CompactPCI Plus from PICMG Advances Future of CompactPCI........................................................................... 38 Manfred Schmitz, PICMG CompactPCI Plus Working Group and MEN Mikro Elektronik

Featured Products.......................................................... 42 Products & Technology................................................. 44 News, Views & Comment

Embedded Market Bucks the Trend, or Just Dodges a Bullet?................................................................................... 52 Warren Andrews, Associate Publisher

Finding Fruit in the Economic Forest....................................... 5

Software Compatibility with the Flick of a Switch.................... 8

Technology in Context—Multicore Processors The Taming of the Multicore.................................................. 10 Paul Fischer, TenAsys

Solutions Engineering—Beyond 10 Gig Ethernet 4 and 100 Gigabit Ethernet: Ready for Real-Time?................ 16 Rob Kraft, AdvancedIO Systems

Industry Insight—High-Speed Networking

Speed up Your Real-Time Digital Simulation System ............ 22 Herman Paraison, Dolphin Interconnect Solutions

System Integration—Real-Time Software

Exactly When Do You Need Real Time?................................. 26 Paul N. Leroux, QNX Software Systems

Industry Watch

Silicon Solutions Enable Migration to Next Generation Networks............................................................................... 30 Moshe De-Leon, Siverge Networks

Make vs. Buy: The Case for Outsourcing Complete ATCA Systems................................................................................ 36 Brian Wood, Continuous Computing

Products & Technology................................................. 40 News, Views & Comment

Wine from Sour Grapes......................................................... 48 Warren Andrews, Associate Publisher




APRIL 2009 The magazine of record for the embedded computing industry

April 2009

Green Engineering: Fertile Ground for Embedded

ENGINEERING: Fertile Ground for Embedded

MAY 2009



MAY 2009


the Connection Options for Embedded

Multiplying the Connection Options for Embedded

The Incredible Shrinking Server Blade

Small but Mighty Form Factors Gain Ground

Safety Certification Easing the Path

Plug and Play COM Spec Eases I/O Woes LPC—The Bus that Wouldn’t (and Shouldn’t) Die An RTC Group Publication

An RTC Group Publication



Industry Insider................................................................. 8

Industry Insider................................................................. 8

Small Form Factor Forum

Small Form Factor Forum

Technology in Context—Green Engineering Green Engineering Offers Huge Opportunities for Embedded Systems................................................................................ 12

Solutions Engineering—The Incredible Shrinking Server

Confused or Liberated? Take Your Pick................................... 6

The Embedded Smart Car: USB............................................. 10

Tom Williams, Editor-in-Chief

Measure It - Fix It: Go Green by Improving Inefficient Products and Processes....................................................................... 16 Irene Bearly National Instruments

Machine-to-Machine Communications Monitor Environmental Impact................................................................................... 20 Alex Brisbourne KORE Telematics

Solutions Engineering—Powering Up COM I/O Boards Interoperability Scores a Victory with Plug and Play COM Spec............................................................................. 24 Arnold Estep ADLINK

Industry Insight—The LPC Bus

LPC Bus—Legacy Lives On................................................... 30 Robert Burckle, WinSystems and Jeff Munch, ADLINK

System Integration—Small Form Factor Developments

Small but Mighty: Small Form Factors Gaining Ground.......... 34 Christine Van De Graaf and David Pursley, Kontron

Products & Technology................................................. 38 News, Views & Comment

A View from the Height.......................................................... 50 Warren Andrews, Associate Publisher



“At No Time Do the Fingers Leave the Hand”.......................... 6

Standards: The Bedrock of the Small Form Factor Community............................................................................ 10 Blade The Incredible Shrinking Blade Server: New Possibilities beyond the Data Center......................................................... 12 David Pursley, Kontron

Industry Insight—USB in Embedded

USB 3.0 Boosts Speed 10x, Broadens Embedded-Systems Applicability........................................................................... 16 Adrian Braine and Ben Papps, PLX Technology

USB I/O for the Embedded OEM............................................. 20 Stephen Newbegin, ACCES I/O Products

USB and StackableUSB: Enabling Efficiency and Scaling for Embedded Designs................................................................ 26 Susan Wooley, Inter Stackable Standards Group

USB Offers Many Choices for Use in Embedded Systems...... 32 Yingbo Hu and Ralph Moore, Micro Digital

System Integration—Safety Certification—Easing the Path

Meeting the Demand for COTS Safe and Secure Certification Evidence................................................................................ 38 Randy Kyte and Rick Hearn, Curtiss-Wright Controls Embedded Computing

Featured Products.......................................................... 42 Products & Technology................................................. 44


JUNE 2009

JULY 2009

The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

June 2009

July 2009



Combining Vision, Motion, Safety



Toward a Unified Embedded Module Framework

Processor Architectures Cut Power Usage

Managing Processor Power with an RTOS

Pick the Right Model for Data Acquisition

Shelf Management in Depth

Wearable Computers: More Personal than PCs

An RTC Group Publication

Wireless Networks Pose a Challenge to Security

An RTC Group Publication



Industry Insider................................................................. 6

Industry Insider................................................................. 6

Small Form Factor Forum

Small Form Factor Forum

Technology in Context—COM Modules

Technology in Context—Low-Power Processors The Key to Really Low Power: Fewer Interrupts..................... 10

COM, Meet Carrier—Not a Speed Dating Scene...................... 5

Software and I/O Make the Application (or… It’s the I/O Dummy!)............................................................................... 10 Toward a Unified Framework for Embedded Modules............ 12 Jonathan Miller and Rick Lehrbaum, Diamond Systems

Solutions Engineering—Intelligent Power Management

RTOS – The Heart of Good Power Management..................... 18 Lotta Frimanson, IAR Systems

Industry Insight—Managing Small Modules

Using I2C for “Behind-the-Scenes” Management................... 24 Michael Thompson, Pentair/Schroff and Serge Zhukov, Pigeon Point Systems

System Integration—Motion Control and Safety

A Framework for Safe Motion Control Firmware.................... 30 Michael Wilk and Michael Barr, Netrino

Machine Vision Passes the Bucket......................................... 34 Ben Dawson, Dalsa

Industry Watch—Embedded Data Integrity Building Fault Tolerance into Embedded Data Management......................................................................... 40 Duncan Bates, Birdstep Technology

Products & Technology................................................. 42

WSNs Look Like a Foundation for Building Energy Efficiency... 5

Netbooks Provide Easy Entry to Small Form Factor World........ 8

Kristian Saether, Atmel

Solutions Engineering—Data Acquisition Maximizing Resources in Data Acquisition Systems with a Network Data Model.............................................................. 16 John Pai, Birdstep Technology

Industry Insight—Security for Wireless Networks

Security in Wireless Sensor Networks.................................... 24 Kurt Stammberger, Mocana

Wireless Security and CERT C .............................................. 30 Chris Tapp and Paul Humphreys, LDRA

System Integration—Human/Machine Interfaces

Lower Cost, Better Results with Wearable Computers in the Enterprise.............................................................................. 38 Larry Ricci, Eurotech

Industry Watch—Multicore Processing The Good News and the Bad News: Your New Chip Has Multiple Cores....................................................................... 42 Arun Subbarao, LynuxWorks

Products & Technology................................................. 46






The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

August 2009

September 2009


Serial Interconnects: The Next Generation



Getting the Heat Out

Hi Temp, Small Spaces: Getting the Heat Out

A ATCA Advances in Telecom and Beyond Non-Volatile Memories – A Surge in Innovation

Mobile Robotics Combine Sensing, Decision Making and Action

DSP Power Moves onto Small Modules

802.11n Brings Seamless IP to Wireless Industrial Networks An RTC Group Publication

LAN-Attached Controllers Tame TCA An RTC Group Publication



Industry Insider................................................................. 6

Industry Insider................................................................. 6

Small Form Factor Forum

Small Form Factor Forum

Technology in Context—ATCA: Telecom and Beyond Balancing Line Rate and Security: FPGA-Based MicroTCAs Enable 10-Gbit/s Network Traffic........................................... 10

Editor’s Report

Isn’t it a Wonder that Anything Works?.................................... 5

Small Form Factor Forum: More than Boards.......................... 8

Rob Kraft, AdvancedIO Systems

An Architect’s Checklist: Designing a Carrier-Grade, Application-Ready ATCA Platform.......................................... 16 Dr. Asif Naseem, GoAhead Software and Simon Stanley, Heavy Reading

Solutions Engineering—Serial Interconnects Move to the

Next Generation PCI Express Gen 3: Twice as Nice—and Then Some............. 24 Steve Moore, PLX Technology

Serial RapidIO 2.0 Moves into the Wireless Infrastructure...... 30 Stephen M. Nolan and Devashish Paul, IDT

Industry Insight—Mobile Robots

Mobile Robotics: Moving Robots Forward.............................. 36 Meghan Meckstroth, National Instruments

System Integration—Industrial Networks

802.11n Wireless Connectivity Supports Seamless Industrial Networks............................................................................... 40 N.Venkatesh, Redpine Signals

Products & Technology................................................. 44

Resistance Is Futile!... and Unnecessary.................................. 5

SSDs... It’s What’s Inside That Counts................................... 10 New Nonvolatile Memory Technologies Poised to Shake up System Design...................................................................... 12 Tom Williams, Editor-in-Chief

Technology in Context—New Mobile Platforms Android Moves Beyond Mobile............................................... 16 Bill Weinberg, Linux

Solutions Engineering—High Temp in Small Spaces Thermal Management of High Power in Small Spaces: Myths and Misconceptions Challenged............................................ 22 Bob Sullivan and Michael Palis, Hybricon

Thermal Management for the Small Box................................ 30 Joe Primeau, Acromag

Industry Insight—Small DSP Boards

Digital Signal Processors at the Intersection of Form and Function................................................................................ 34 Anders Frederiksen, Analog Devices

System Integration—Rails and Boxes

IEC 61850-3: The New Battle Cry for Power Substation Designers.............................................................................. 38 Gary Cho and Tim Stemple, Moxa

Industry Watch—Advanced Platform Management LAN-Attached TCA Management Controllers: How to Build and Use Them.............................................................................. 42 Mark Overgaard, Pigeon Point Systems

Products & Technology................................................. 46






The magazine of record for the embedded computing industry

The magazine of record for the embedded computing industry

October 2009

November 2009



OpenVPX: Launching the Spec



Solid State Drives Take a Bigger Role in Embedded

New Directions for Mezzanines

Small Modules Power Medical Devices

Enforce Design Rules for Reliability

FPGAs Offer Choice of Soft or Hard-Wired CPUs An RTC Group Publication

MicroTCA Spans Embedded Applications

Small Modules in Even Smaller Places An RTC Group Publication



Industry Insider................................................................. 6

Industry Insider................................................................. 6

Small Form Factor Forum

Small Form Factor Forum

Editor’s Report

Editor’s Report—Eurotech - CPUs in Specialized Devices

Print is not Dead, But Paper May Be........................................ 5

The Three Faces of Embedded................................................ 8 Eurotech—from Sensors to Supercomputers ....................... 10 Tom Williams, Editor-in-Chief

Technology in Context—Developments in VME OpenVPX Promises VPX Interoperability................................. 14 William Pilaud, Concurrent Technologies

Air and Conduction Cooling for 3U COTS Cards: An Overview.......................................................................... 20 Ivan Straznicky, Curtiss-Wright Controls Embedded Computing

Solutions Engineering—Solid-State Drives Extend SSD Lifetime Using the Network Database Model...... 26 John Pai, Raima Division of Birdstep Technology

SSDs Increase Performance and Reliability in Embedded Applications........................................................................... 30 Gary Drossel, Western Digital

Industry Insight—Rugged Applications

Communication Rack Mount Servers Move to New Levels of Reliability............................................................................... 34 Keith Taylor, Kontron

System Integration—Small Modules Power Medical Devices

Hardware Trumps Software in Medical Devices..................... 38 P.J. Tanzillo, National Instruments

Industry Watch—FPGAs

Embedded FPGA Processing Platforms: Customization Meets Performance.......................................................................... 42 Glenn Steiner and Dan Isaacs, Xilinx

Featured Product. ........................................................... 46

Memory... Memories and the Fall of Civilizations..................... 5

Happy Holidays from SF3....................................................... 9 CPU Architectures Bring C Programmability into Formerly Specialized Devices............................................................... 10 Tom Williams, Editor-in-Chief

Technology in Context—New Direction for Mezzanines New Generation of M-Modules and PMCs Saves Development Time and Money.................................................................... 14 Barbara Schmitz, MEN Mikro Elektronik

Solutions Engineering—MicroTCA Spans Applications Concept to Reality: An Application Architecture with MicroTCA............................................................................... 18 Tony Romero, Performance Technologies

High Bandwidth and Small Form Factor MicroTCA for Flexible Embedded Design................................................................. 24 Sven Freudenfeld and David Pursley, Kontron

Industry Insight—High Reliability

Increasing Reliability through Automated Enforcement of Design Rules......................................................................... 30 Paul Anderson, Ph.D., GrammaTech

System Integration—Advances in Small Form Factors

Tiny Atom SBC Targets Power-over-Ethernet Apps................ 34 Chris Lane, Jaco Electronics and Kelly Gillilan, Adlink Technology

Embedded Form Factors Harness Emerging Technologies to Enable Wireless Systems....................................................... 38 Jason Krueger, VersaLogic

Featured Product. ........................................................... 42 Products & Technology................................................. 43

Products & Technology................................................. 46 RTC MAGAZINE DECEMBER 2009


with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

Advertiser Index Get Connected with technology and companies providing solutions now Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.







Keil Software............................................... 2............................................

ACCES I/O Products...................................

End of Article

ACT/Technico, div. of Elma Electronic..........

Micro Digital, Inc......................................38,

ADLINK America, Get Technology Connected with Inc..............22, companies and

Nallatech Inc.............................................. 28...................................

products featured in this section. ARM Techcon3 Virtual Classroom................ 55...........................................

National Instruments................................11,31...........................................

ATX Automation Technology Expo............... 29.....................................

One Stop Systems....................................58,

Get Connected with companies and products featured in this section.

Avalue Technology......................................6,7..............................

Get Connected with companies mentioned in this article. Phoenix International.................................. 39....................................

Birdstep Technology...................................

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with companies mentioned in this article.


Computing Conference............................... 37.........................................

CM Computer.............................................

RTD Embedded Technologies ....................

Cogent....................................................... 20...................................


ELMA Systems Div.....................................

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Embedded World 2010............................... 35..........................

TRI-M Systems..........................................

Extreme Engineering Solutions, Inc........... 16,17....................................

VersaLogic Corporation..............................

RTC (Issn#1092-1524) magazine is published monthly at 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673. Periodical postage paid at San Clemente and at additional mailing offices. POSTMASTER: Send address changes to RTC, 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673.



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RTC magazine  

December 2009

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