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The magazine of record for the embedded computing industry

July 2008


Stakes its Claim in Embedded

Fault Management Keeps Medical Devices Safe Keeping the Promise of Multicore Processors Battle-Tested Technology Makes Devices Smarter An RTC Group Publication

All the cards...

…for all the solutions Targeting high-performance applications, Extreme Engineering Solutions presents the XCalibur4100, a 6U CompactPCI single-board computer designed to provide maximum performance and I/O options while minimizing power consumption. With the Low Voltage Intel® Core™2 Duo processor and Intel 3100 chipset, the XCalibur4100 offers: • Intel® Core™ Duo or Intel® Core™2 Duo processor. • Up to 8 GB of dual-channel DDR2-400 ECC SDRAM . • Two front-panel Gigabit Ethernet ports. • One PMC/XMC module slot at up to PCI-X 133 MHz/x4 PCIe. • Integrated graphics support with front and rear DVI/VGA. • Windows, Linux, VxWorks, QNX, and INTEGRITY support. For customers looking for one vendor to provide the complete system solution, X-ES provides full component selection, operating system support and integration services.

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USB Stakes Its Claim in Embedded 40 High-density, high-performance DDR2 SDRAM

46 Hybrid Signal Processing Card Leverages TI DSPs


48 PC/104-Plus Card Supports ARINC 429 and 717

JULY 2008



Editorial Embedded Control for an Era of Intelligent Energy

Insider 6Industry Latest Developments in the Embedded Marketplace

8 52

Small Form Factor Forum Computer-On-Module Proliferation Brings Selection Challenges Products & Technology Newest Embedded Technology Used by Industry Leaders

Technology in Context


Fault Management

Multicore Processors


Software Fault Management for Medical Devices John Greenland, LDRA Technology


16 USB Connectivity Solutions in Embedded SoC 24 Franchisable USB Becoming a Staple in Embedded Systems James Kurtz, Microchip Technology

Sam Sanyal, MosChip Semiconductor

Views & Comment 64News, Embedded Market Grows Despite Soft Economy

Multicore Approach to More Efficient System Performance 32AEmbedded Robert K端ffner, MEN Micro

Processors Bring out 38Multicore High-Performance Computing Potential in Real Time Jeff Meisel, National Instruments

Industry Watch Medical Systems

Electronics Evolution = Medical Device Electronics 42Defense Revolution Mark Downey, White Electronics Designs


Signal Processing Card 50Hybrid Leverages TI DSPs Bittware

Digital Subscriptions Avaliable at

Express XMC Servo Module Boasts 12 259 KSPS A/Ds 51PCI Innovative Integration

July 2008


JULY 2008 Publisher PRESIDENT John Reardon, johnr@r EDITORIAL DIRECTOR/ASSOCIATE PUBLISHER Warren Andrews, warrena@r

Editorial EDITOR-IN - CHIEF Tom Williams, tomw@r CONTRIBUTING EDITORS Colin McCracken and Paul Rosenfeld MANAGING EDITOR Marina Tringali, marinat@r COPY EDITOR Rochelle Cohn

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To Contact RTC magazine: HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, EASTERN SALES OFFICE The RTC Group, 96 Dudley Road, Sudbury, MA 01776 Phone: (978) 443-2402 Fax: (978) 443-4844 Editorial Office Warren Andrews, Editorial Director/Associate Publisher 39 Southport Cove, Bonita, FL 34134 Phone: (239) 992-4537 Fax: (239) 992-2396 Tom Williams, Editor-in-Chief 245-M Mt. Hermon Rd., PMB#F, Scotts Valley, CA 95066 Phone: (831) 335-1509 Fax: (408) 904-7214 Published by The RTC Group Copyright 2008, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.


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July 2008

3/17/08 1:37:08 PM

JULY 2008


Embedded Control for an Era of Intelligent Energy by Tom Williams, Editor-in-Chief


here is a saying that nothing serves to concentrate the mind like the prospect of being hanged in a fortnight. As I write this, the price of oil has broken through $141 a barrel. The mere concept that it could reach $200 is getting close to envisioning the shadow of the hangman’s noose for the world economy. But it’s more than oil. A recent report shows that the costs of some very basic materials have been spiking in the same time period. These include precious metals gold and silver, the price of ore, such as iron ore used for steel making, and a combination of other essential metals: copper, aluminum, lead, zinc and tin. I don’t have to list the ways these materials are important to the electronics industry, let alone other manufacturing sectors. Along with these increases, there is a parallel spike, undoubtedly tied to the price of oil, and that is the cost of shipping—primarily shipping by sea—but also impacting rail and truck transport. The cost of transport, again, is starting to have an impact on one of the pillars of electronics and other manufacturers and, indeed, one of the key factors in global free trade: just-in-time inventory (JITI) or just-in-time manufacturing (JITM). Products whose costs were reduced by outsourcing their manufacture to China are starting to look a bit less attractive due to the increased shipping costs. A recent article in the Financial Times noted that oil costs have forced Procter & Gamble, the largest manufacturer of consumer goods, to rethink its entire supply network, and the company is making plans to shift its manufacturing sites closer to consumers to cut transportation costs. If such trends continue, it could mean a return of a good bit of manufacturing for the domestic market to the U.S. But now that our economic mind seems to be sufficiently concentrated, there is serious talk and serious planning for alternative energies like solar and wind power as well as biofuels. But there seems to be no immediate fix. The most and the quickest savings appear to be realizable through increasingly efficient use of available energy, and that represents an enormous opportunity for the embedded industry. By now most people have an idea of the kinds of digital gymnastics that the microprocessors in a hybrid vehicle go through, but they are just a suggestion of what may be possible. And by

now there is an increasing awareness of the potential market demand for energy efficient systems that could appear in answer to public awareness of the need for savings in energy. The list is huge and includes building control of HVAC systems and lighting; designing a more intelligent, more decentralized power grid, along with distributed networked metering. It includes more efficient and eventually pluggable hybrids in the time before some viable alternate fuel source is settled on. And today, when and what that will be is far from clear. We will not get “off our dependence on oil” anytime soon, but the use of embedded intelligence can definitely help ease the pain and make the bridge to an alternative future. While there will be benefit to the spread of solar, wind and possibly fusion (not fission) power generation and other alternatives for producing electricity, they will not solve the transportation issue. A 2007 report from the Department of Energy shows that 69% of all petroleum used goes into the transportation sector, and that sector’s use of energy comes in at 96% from petroleum. The pain at the pump is forcing consumers to seek a middle ground between big SUVs and tiny scooter-like vehicles, and pluggable hybrids of a mid-size range are looking much more attractive. None of this addresses the issues of sea and rail transport, which almost exclusively run on petroleum—at least in the U.S. In Europe the trains run on electricity, but our distances prohibit that. The bottom line is that all these energy-related issues impact our industry and influence a vast number of economic factors in ways that they do other industries. But our industry has unique resources and technology to develop a lucrative market that can help mitigate the rising costs of energy. The advent of small, powerful COM modules that can go into all kinds of tight and remote spaces, coupled with wireless mesh networking along with an ever-expanding broadband infrastructure portends unforeseen possibilities. It will be interesting to see how such developments will open up new application areas and markets with as-yet unrealized business opportunities in harnessing this intelligence to use energy more wisely and effectively and combat the threat of global warming. July 2008


IndustryInsider JULY 2008

RFID Market Takes Aim at Growth to over $5 Billion This Year

The global RFID market continues its rapid growth as record orders up to $0.5 billion each are serviced. This year demand for RFID is on target for $5.3 billion globally as it powers its way to $27 billion in 2018. Recent substantial additions to the global RFID orderbook include $350 million from the State of Melbourne to boost its public transport RFID card scheme and a forecast by transport analysts that the national RFID card for transport being progressed in the UK will cost $2 billion. Indeed, much is now happening in Europe, although it is the U.S. and China that share top slot as RFID spenders at present. For example, also in the UK, Raytheon, partnered with Serco, Accenture, Detica, QinetiQ, CapGemini and Steria, has received an additional $184 million for the infrastructure of the UK RFID e-passport scheme. It is in apparel that there is a huge surge across the world, and this is covering everything from tracking the bolts of cloth in the factories to pallets, cases and above all individual items of clothing, where Marks and Spencer is the world leader, approaching 350 million tags used yearly. nd Apparel RFID goes even further because there are now hundreds of commercial laundries in the world that are washing uniforms and other clothing, such as hospital garments, with the aid er exploration ther your goal of RFID. Indeed, St Olaf’s Hospital in Norway is an example of a hospital with its own RFID-driven speak directly laundry. The hospitality industry also has its own laundries that are RFID savvy. Through this value ical page, the chain, the benefits of RFID vary from efficiency in the factory and reducing stockouts in retailing ght resource. to error prevention, faster service, reduced cost and eliminating tedious procedures in the laundry technology, es and products and rented garment sectors. The majority of the money spent on RFID relates to passive tag systems of course, and here there is both simplification and huge leaps forward in technology. The simplification comes from most Low Frequency RFID migrating to HF or UHF to save cost and improve performance and little or no growth in sales of passive RFID at other frequencies. That means that HF and UHF are very much on top, and the resulting higher volumes at these frequencies, underwritten by new applicational specifications that allow nothing else, are helping both quality and cost. is responsible for over half the money spent on RFID, thanks to cards, tickets, passports, mpanies providingHFsolutions now library books, drugs and so Whether on. Despite beenthe around ploration into products, technologies and companies. your goalhaving is to research latest a long time, there is now a surge of newortechnology at HF technical that is page, sharply improving all parameters cost. UHF is similarly seepplication Engineer, jump to a company's the goal of Get Connected is to put including you ervice you require forawhatever of technology, ing surge type of innovation.

anies and products you are searching for.

not meet the stated performance, the product is now unsuitable for Tundra’s intended target applications and market. Tundra Semiconductor has In November 2007, Tunterminated its product acquisition dra says it also signed a license agreement, announced in August agreement with IBM to bring new 2007, with IBM Global Engineer65nm Power Architecture soluing Solutions (IBM), effective tions to market as part of Tundra’s June 1, 2008. The acquired prodsmart System Interconnect (sSI) uct was to be based on an IBM strategy and roadmap. As a result Power Architecture 90nm proof the decision to terminate the cessor core. IBM recently notified Get Connected product acquisition agreement, with companies mentioned in this article. Tundra that the performance of and based on Tundra’s review the core lower than previously of the current IBM performance stated. Since the IBM core candata for the 65nm core, Tundra

Tundra Terminates Product Acquisition and License Agreements with IBM

End of Article

Get Connected with companies mentioned in this article.



July 2008

has also made the decision to terminate that license agreement. Tundra intends to actively pursue alternative means of executing its sSI strategy to bring intelligent System Interconnect solutions to broader global markets.

Qseven Small Form Factor Gains Velocity

The Qseven Consortium, initiated by congatec, Seco and MSC, has added five new participating members. This brings the total number of companies that actively support the new Qseven Computer-on-Module (COM) standard to a total of 10. The Qseven platform was developed with a focus on the latest low-

power processor technology and small size requirements. With a maximum power consumption of approximately 12 watts specified in the standard, the new form factor is expected to appeal to manufacturers of applications that require battery operation. In order to enable real interchangeability, an API software interface was defined for the embedded features such as watchdog timer, I²C bus, LCD backlight control, access of BIOS user storage area and temperature control. Support for the API is mandatory for all Qseven vendors. Qseven targets mobile applications and supports the latest PC technologies. The entire concept has been successfully developed within the consortium, and an increasing number of COM module vendors see the necessity for this type of standard as the industry begins to develop ultra mobile applications. The new members include IEI Technology, a supplier of industrial computers; Portwell, a supplier of Industrial PCs that also provides board-level solutions along with real-time industrial-level system integration service; Grossenbacher Systeme AG from Switzerland, a manufacturer of industrial display systems; ASEM, from Italy, that builds industrial computers and retail systems; and DAVE, an Italian company that manufactures ARM and PowerPC-based modules. The new members join Contradata from Italy and Hectronic from Sweden, in addition to the three founding members, congatec, SECO and MSC.

CANopen Releases Test Specifications and New Profiles

The international users and manufacturers group for the Controller Area Network, CAN in Au-

Industry Insider

tomation (CiA), has released the reviewed CiA 310 specification. It describes the conformance test plan for the CANopen communication profile as specified in CiA 301 version 4.0.2. This specification is the base for the CANopen certification process. In addition, the organization has developed the conformance test plan for generic I/O modules compliant to CiA 401 version 3.0. A related test tool is under development. The recently finished CiA 453 profile for power supply devices is suitable for non-programmable as well as for programmable modules. The profile supports up to eight AC or DC outputs. The user may configure simple or complex output (voltage, current, power, or frequency) profiles. The failure behavior is also configurable. The CANopen application profile for special-purpose cars specifies an open network for add-on devices that are connected via a standardized interface (gateway) to the in-vehicle networks. Typical add-on devices include taximeter for cabs, roof bars for police cars, or special user interfaces for handicapped drivers. Leading suppliers and the most important German carmakers participated in the development of this profile.

Asset Teams with Cadence for Embedded Instrumentation of Complex ICs

Asset InterTech is working with Cadence Design Systems to integrate Asset’s ScanWorks platform into the Cadence Encounter Digital IC Design flow. The integration will enable design and test engineers to embed instrumentation tools into complex, finished system-on-chip (SoC) and system-in-package (SiP) devices, providing deep analysis and test

of these chips even after installation in the final product. The project kicks off immediately following the recent addition of Asset InterTech into the Cadence Connections partner program. Membership in the Cadence Connections program provides Asset with access to Cadence software, documentation and support capabilities to facilitate the integration of ScanWorks’ embedded instrumentation tools into Cadence’s IC design, test and diagnostic flows. Cadence’s experience in board and SiP package design will be leveraged to address the growing challenges of SiP and multichip module (MCM) device testing and diagnostics. Initial applications will provide tools and flows that support the preliminary IEEE P1687 Internal JTAG (IJTAG) standard. Asset, through its ScanWorks platform, is applying the experience it has gained from two decades as a leading supplier of boundary-scan test tools utilizing JTAG access to the development of open embedded instrumentation tools. The boundary-scan infrastructure that is embedded into chips and circuit boards is one of several technologies that can form the basis for an embedded instrumentation toolset. In recent years, Asset has enhanced its ScanWorks platform with embedded instrumentation capabilities such as CPU-emulation functional test, signal integrity analysis utilizing embedded Intel IBIST (Interconnect Built In Self Test) technology and others.

Microsoft’s 2008 Windows Embedded Partner Excellence Award Winners

Microsoft has announced the winners of the 2008 Windows Embedded Partner Excellence Awards for the Americas. The awards recognize visionary

organizations around the world that use Windows Embedded technology in innovative and creative ways. Windows Embedded Partners were honored for their outstanding customer service and the many innovative ways they are using the Microsoft Windows Embedded platforms. The winners in each category for their work with the Windows Embedded CE, Windows XP Embedded and Windows Embedded for Point of Service platforms are the following: • Adeneo: Training Partner • BSQUARE Corp.: Systems Integrator • BSQUARE: Distributor • HP: Windows XP Embedded Original Equipment Manufacturer • Intrinsyc Software International Inc.: Portable Navigation Device Partner • Magellan: Windows Embedded CE Original Equipment Manufacturer • NCR Corp.: Windows Embedded for Point of Service Original Equipment Manufacturer • Odyssey Software: Windows Embedded for Point of Service Partner • PHYTEC: Independent Hardware Vendor • RMI Corp.: Silicon Vendor

Adapter (HWA) and Device Wire Adapter (DWA) end products, as well as native host (WHCI) and device end products. When a product has achieved Wireless USB certification, it can bear the Wireless USB logo on products or product packaging. Companies wishing to use the logo require a logo license issued by the USBIF. The logo indicates to the consumer that the product has been tested and proven to interoperate with other certified Wireless USB products. MCCI can test a WUSB product in one to three weeks without requiring the attendance of product engineering staff members. Independent testing in MCCI’s dedicated lab will give developers of WUSB products faster time-to-market and will ensure that proprietary technologies are not revealed prematurely.

MCCI Lab Announces Wireless USB Test Capability

MCCI, an Ithaca, NY-based developer of Universal Serial Bus (USB) software technology, has announced certification as an independent test laboratory for next-generation Wireless USB products. Until now, WUSB products were certified through attendance at USB Compliance Workshops or at Intel. Testing is available for products in the following categories: Host Wire

Correction: On page 42 of the June issue of RTC, a picture of a digital I/O module from RTD Technologies based on the new PC/104 Express technology was mistakenly labeled as an imaging module from a different company. July 2008



Computer-On-Module Proliferation Brings Selection Challenges


ith dozens of available Computer-on-Module (COM) “standards,” embedded designers face the burden of choosing the form factor that best meets their needs. Much of the necessary decision-making information can’t be found on vendor data sheets or in pretty advertisements. Luckily, SF3 sheds some light on this issue to enable a more informed decision. Before getting enamored with the set of signals on a particular COM interface, consider the robustness and cost of the baseboard connector itself. There are two types of connectors in widespread use: board-to-board molded connectors (mated pair) and gold-plated card edges that mate with a memory-type socket. The latter is much less expensive, but may be prone to intermittent contacts under high shock and vibration loads. DIMM-PC and the new Qseven standard are examples of this type of COM interface. The majority of COM standards fall into the boardto-board/mated pair type, including ETX, COM Express and a number of proprietary derivatives of these. Connector type may also affect baseboard size (footprint) by allowing components to fit in the space underneath the module. The baseboard connector (pair) height determines the stack height. ETX and its PCI Express-successor XTX use 3 mm stack height Hirose FX8 connectors, limiting the use of components under the module to the shortest passives. Placing components underneath the COM is risky, because parts on the bottom of the COM could bump into parts on the top of the baseboard. Most COM standards specify a maximum component height for the bottom of the module, but this specification is frequently ignored. Hence, your baseboard could mate with one module from one vendor, but not with other modules from the same vendor, or from other vendors. The ETX Specification touts a taller “compatible” FX8C connector for the baseboard to solve the clearance issue, but Hirose’s datasheets indicate that mixing and matching connector types is not recommended. Hence, modules with mating FX8C connectors would be required. Such modules are not generally available as standard products. Module vendors would need to do special/semicustom manufacturing builds with the taller FX8C connector so that module and baseboard are using the proper mates. Vendors typically only make these exceptions for their largest customers, however.


July 2008

With this background, it’s now fair to get enamored with signals. Since the entire kitchen sink of chipset I/O typically must pass to the baseboard, the connector pin counts are usually in the multiple hundreds of pins. The available signals play a key role in how easy it will be for you to implement your baseboard. Some COM standards promote themselves as “legacy-free,” telling you that serial ports, PS/2 keyboard/mouse, parallel port and ISA Bus are not available from the module. If you need any of these functions you will need to add them to the baseboard yourself. Caveat emptor (buyer beware) applies here, especially when attaching super I/O devices that may require changes to the BIOS firmware. Again, COM vendors typically only make these changes for their largest customers. In other words, reading the specifications is not enough…read the baseboard design guides for “gotchas” too. In addition, the ease of adding I/O on your baseboard is dependent on the bus signals provided by the module, and, in some situations, whether the bus is native to the chipset or provided via a bridge (such as LPC to ISA or PCI to ISA). If you need to provide the bridge on your baseboard, BIOS issues may again arise. Finally, if lifecycle and upgradability are important, designers must bet on the success of a particular standard over the long haul. Since COM signals may be tied to the features of a particular generation of chipsets, consider where those chipsets lie in their own projected lifecycle. Newer chipsets may not provide all the I/O or bus signals of earlier models. Much is made about the potential interchangeability of modules implemented to the same COM standard, both for upgrade and lifecycle issues as well as potential second sourcing. Unfortunately, module interoperability is more about perception than reality in the COM world. We’ll have more to say about module interchangeability and the level of detail provided in COM standards in a future column. Clearly, the proliferation of COM form factors is here to stay, and it’s a good thing. With RISC vs. CISC, ruggedness, new chipsets and processors, baseboard connector types, and strong coupling of the baseboard interface to the I/O of specific chipsets, COM interfaces will continue to evolve Requests for more details about form factor trade-offs can be addressed to

Colin McCracken

& Paul Rosenfeld

GE Fanuc Intelligent Platforms

Long live ATX! Long Term Availability & Configuration Control options extend the life of your system. These days, one year is a long time in the life of a computer board. Five years is a lifetime. In fact, the production life of some ATX boards is measured in months, not years. In systems that will stay in service for decades, this is a serious problem. So it’s quite comforting to know that GE Fanuc Intelligent Platforms will guarantee the availability of selected small form factors like ATX for up to five years.

When you combine our optional Long Term Availability program with our Version Control option, you won’t need to re-qualify these platforms, which can substantially reduce your total cost of ownership. It’s our way of wishing you and your ATX-based system a long and happy life.

© 2008 GE Fanuc Intelligent Platforms, Inc. All rights reserved.

Technology I n C onte x t

Fault Management

Software Fault Management for Medical Devices Because we now rely on medical devices so heavily and because the devices’ software is so critical to their operation, software fault management and the ability to reduce faults throughout the development lifecycle have become hotbutton issues.

by J ohn Greenland LDRA Technology


rom hearing aids to Positron Emission Tomography (PET) imaging equipment, medical devices are increasingly impacting (and hopefully improving) our quality of life. To implement the vitally needed fault management and fault reduction, medical device companies need to look at a variety of different methodologies focused on at least two levels: fault reduction throughout the development lifecycle and fault handling at application runtime. During the software development lifecycle, requirements traceability, static analysis, dynamic analysis and testing strategies can all contribute significantly to software quality and fault reduction when applied at the proper stage in the development process. Once faults have been minimized using proven techniques during development, fault handling at runtime can protect safetycritical software from unforeseen events that can creep up during the operation of complex applications. The first step in software fault management in the development process revolves around static analysis. To implement static analysis standards, the medical devices industry has looked to the automotive industry with its intro-


July 2008

High-Level Requirements

LL Reqs to HL


Modeling Tool

Legacy Code/ Architectural Concepts

Software Specs (Low-Level Requirements)


Code & Quality Review defects

Implementation (Source Code / Assembly)

Test Results & Defects

Design Review defects

Test Cases to LL Reqs Host Tier RTM

Test Results & Defects

Figure 1

Test Cases to LL Reqs Target Tier

Requirements traceability process.

duction of MISRA-C:1998, MISRAC:2004 and the MISRA C++:2008 programming standards. The MISRA stan-

dards provide considerable assistance for ensuring that software adheres to a strict quality model with the obvious

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Technology In Context benefits of the quality improvements that this brings. As a largely rules-based standard, however, MISRA satisfies only a portion of the static analysis picture. Also important are code complexity analysis and runtime error analysis. Tools that support all three areas of static analysis are instrumental in providing the first line of defense for producing software applications with the highest reliability and least number of faults.

1 12Untitled-1 July 2008

Although static analysis of highly reliable software systems is a good first step, important areas of the software development lifecycle, such as requirements analysis, structural coverage analysis and unit testing, can be overlooked. Enhancing the software development process in these areas has been employed to great effect in other industries where safety-critical applications are required. When looking at the software process requirements for this market, it is impor-

7/11/08 2:29:01 PM

tant to start with the FDA guidelines for software embedded in medical devices. These guidelines lay out the tasks required to meet software quality and reliability objectives, and these tasks relate very closely to the overlooked areas that we outlined above: requirements traceability, coverage analysis and proper verification and validation procedures. Requirements traceability provides the backbone for a reliable software system, and starts with very early design and carries through all the way to the latest stages of testing and verification, and even into the iterative process of release and bug fixing in the back end of a product’s lifecycle. Studies have shown that in many cases 60-70% of software defects can be blamed on requirements traceability issues. A key component in the efficient implementation of requirements traceability is the automation of traceability throughout the development lifecycle and management of the Requirements Traceability Matrix (RTM) as shown in Figure 1. Because many organizations use manual processes to track requirements through the lifecycle, certain results or artifacts can fall through the cracks as requirements are passed from the systems group to the design group to the development group to the testing and QA group. Automating the relationships between the inputs and outputs generated by the different phases and groups responsible ensures that all results and artifacts are properly updated and maintained. Not only that, management also now has immediate, updated insight into which areas of a project might become bottlenecks as progress in different phases of development can be charted with a high degree of confidence. In no area does this have a bigger impact than in the verification and validation phase of a project. Automating the creation and updating of relationships between testing and verification activities with source code and higher level requirements can have a huge payoff in the overall quality of a software project. With tools that enable such automation, verification and validation results can automatically be assigned to procedures or functions in the source code that represent a requirement or set of requirements. Because this relationship is now automatically updated, it is no lon-

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Technology In Context

Requirements Management tools

Requirements Traceability

Text Processing & Office files

Analysis & Design

Programming standards checking and metrication

Requirements Planning

Initial Planning Implementation

Configuration & Change Management

Test Verification

Test & Metrics Reporting Test

Evaluation Automated Unit Testing

Figure 2

Automated tools applied to the development model.

ger necessary for test or QA engineers to remember to update results or metrics to keep everything in sync. Not only that, but the engineers can spend more of their valuable hours designing applicable tests rather than monitoring results. Such automated systems can be applied both in implementation of top down (functional) testing and bottom up (structural coverage) testing. In fact, there are now tools on the market that will generate 100% automated structural coverage testing by just pushing a button. This testing can be used to generate coverage results at a variety of levels: • Statement Coverage requires sufficient test cases for each program statement to be executed at least once; however, its achievement is insufficient to provide confidence in a software product’s behavior.



July 2008

• Decision (Branch) Coverage requires sufficient test cases for each program decision or branch to be executed so that each possible outcome occurs at least once. It is considered to be a minimum level of coverage for most software products, but decision coverage alone is insufficient for high-integrity applications. • Condition Coverage requires sufficient test cases for each condition in a program decision to take on all possible outcomes at least once. It differs from branch coverage only when multiple conditions must be evaluated to reach a decision. • Modified Condition/Decision Coverage (MC/DC) requires that each condition must be shown to independently affect the outcome of a decision.

• Path Coverage requires sufficient test cases for each feasible path, basis path, etc., from start to exit of a defined program segment, to be executed at least once. Because of the very large number of possible paths through a software program, full path coverage is generally not achievable. The amount of path coverage is normally established based on the risk or criticality of the software under test. • Data Flow Coverage requires sufficient test cases for each feasible data flow to be executed at least once. A number of data flow testing strategies are available. For reference, other safety-critical applications require 100% MC/DC coverage for certain certifications, so test-

Technology In Context ing to that same level for safety-critical health applications in medical devices would be a possible target. Using such automated structural coverage testing tools, combined with the automation of certain areas of functional testing infrastructure, it is possible to ensure requirements traceability all the way through to the validation and verification phase of development. One last area of automation and traceability is regression analysis. Once the functional and structural coverage testing infrastructure is set up and producing valid results, it is imperative that this automated system continue to function effectively as the software application changes over time in response to modified requirements or bug fixes. This type of regression analysis can also be automated with the proper tools, so that the system will automatically know that certain tests need to be re-run or modified as a result of changes in certain parts of the source code (Figure 2). Again, this relates back to the traceability set up earlier in the process between high-level requirements, low-level requirements, source code, functional test results and structural coverage test results. As we have seen, there are many areas to explore to reduce the occurrence of software faults during the development lifecycle. However, as with any complex software application, medical device systems can still encounter software problems even with the best development process in place. In the case where a software problem can cause malfunctions that are life threatening, techniques such as using watchdog timers, designing in redundant processes, restarting threads or processes, or rebooting the entire system can help mitigate the risk of software faults. These methods can either be implemented purely in software or with a joint hardware/software approach. Software quality and reliability in medical devices can only be ensured by implementing proper software development processes throughout the development lifecycle and designing runtime fault handling systems that can catch the eventual software problems that creep up in today’s complex systems. It is important for medical device companies to look at both the current FDA software

development guidelines and good practice models used in various industries for implementing many of the overlooked areas of the development process, such as requirements traceability and integrated verification and validation procedures. Key to enabling efficient adoption and use of these processes is the automation of these various processes using tools designed to eliminate many of the pitfalls with manual integration of the different phases and groups respon-

sible for the entire software development lifecycle. Using these models and tools, companies producing medical devices can ensure higher software and product quality and reliability while promoting higher efficiency of their software development resources. LDRA Technology San Bruno. CA. (650) 583-8880. [].

July 2008




USB Becoming a Staple in Embedded Systems From its origins in the PC world, the Universal Serial Bus is becoming widely used in embedded systems, especially since it is now possible to design embedded hosts for non-PC applications.

by J ames Kurtz Microchip Technology



July 2008

USB Hierarchy

Level 3

Increasing Software Complexity

mbedded system designers are constantly searching for interfaces that provide ease of use, widespread acceptance and reliability, yet are high in performance while remaining costeffective. USB has emerged as the most widely utilized and accepted connection for consumer-electronic applications, largely due to its PC origins. Now, with the widespread emergence of USB host capabilities independent of PCs, a new era of embedded applications becomes possible, both technically and economically. USB can be divided into four basic categories as shown in Figure 1: Peripheral (or Device), Host, Dual Role Device (DRD) and On the Go (OTG). In any USB system, at a given time, there must be only one host and at least one peripheral. In bus terminology, the host serves as the bus master, and the peripheral as a slave on the bus. DRD and OTG products contain both host and peripheral functionality, but can only act as one at a time. A USB peripheral is always—and only—a peripheral, which is also true of a host. In a DRD, both peripheral and host capabilities are present. The USB type that is actually used at any given time is

Level 2

Level 1

Figure 1

OTG ~27-50 Kbytes of Code



Dual Role ~27-45 Kbytes of Code

Peripheral (Device) ~5 Kbytes of Code

Host ~20-40 Kbytes of Code

The four basic categories of USB comprise three levels of complexity (Note: SRP = Session Request Protocol and HNP = Host Negotiation Protocol).

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C O U N T E R / T I M E R

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I / O

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Application Category

Software Category Modules Required

Peripheral (or Device)

Peripheral module

Embedded Host

Embedded Host module


Both of the above


Same as DRD, but also includes SRP and HNP

Capabili Capability.

F P G A I / O S E R I A L

The emergence of 32-bit chipsets, which have eliminated standard serial and parallel buses in favor of USB exclusively, has created a new requirement for a USB interface at the chip level. As these chipsets are designed into applications that require real-world input from sensors (motion, temperature, intrusion-detection, etc.) or human interaction (buttons, displays, etc.), they are requiring a microcontroller-based subsystem that can monitor this input and translate it into a USB communication for the main chipset. In these designs, USB transmission may exist only on the traces between chips on the boards, as no connectors are required. Here, it often makes sense to offload the main system from any of the housekeeping requirements, such as time-stamping activities and system status. These microcontroller-based applications would usually fall into the peripheral category, as most of the main chipsets would function as Hosts (Figure 2). Unlike most other serial communications interfaces, which are determined by chip interfaces, most USB requirements are determined at the system level. This is due to the fact that, in many instances, the “other end of what is being connected” is not under the designer’s control. With embedded USB, the designer’s first question is, “what will the design be interfacing to—a host product or a peripheral product?” In this way, a designer can take full advantage of the universal nature of USB, and produce a product with wide utility and acceptance in the market. However, the end product

I / O

Design Considerations


drive. The thumb drive would then be connected to the outside irrigation unit, and the new watering pattern would then be downloaded and executed. Data can also be gathered from a low-cost platform, and then transferred via a thumb drive to a PC for recording and further analysis.

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The peripheral category is by far the most diverse and familiar, consisting of mice, keyboards, joysticks, scanners, dance mats, LCD displays, thumb drives, MP3 players and cameras, just to name a few. Here, the goal is traditionally PC connectivity—which has also been extended to include video-game platforms. A PC is the most familiar host, though this application is not the focus of this article. Rather, the focus is on the ability to embed host capability in a non-PC application, which is known as Embedded host. These Embedded host applications have just started to emerge, but are growing quickly. They include the capability to enable any system to interface to common (PC) Peripherals, including all those mentioned above. New applications include audio systems, to enable them to play MP3 files—or permit field upgrades of software—from a thumb drive. Video-game platforms make extensive use of USB host, and are the second most common USB host platform, after PCs. The new lower-cost components and complete software stacks are extending this host utility to an unlimited range of embedded applications, including building controls, data logging, medical diagnostics, exercise equipment and consumer products. A major subset of Embedded host applications includes the ability to interface to a thumb drive. Here, the tremendous advantage of USB lies in the cost-effective method of combining a user-friendly, PC-based GUI with a low-cost platform. In this way, a very complicated programming task can be simplified to service a much larger market. One example is a home-irrigation system. With a PC-based GUI that incorporates a property map, it becomes a trivial task to assign new watering patterns, days, durations and exceptions to a general irrigation routine. This PC-based application would then generate a configuration file, which would be downloaded to a thumb

C O U N T E R / T I M E R

Summary of category modules within USB stacks.


Table 1



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INDUSTRY Insight Software Organization Host Application Code

USB Client Driver


Data Pipe

USB Bus Driver

Outside World

USB Function Driver


Configuration Interface

Host Controller Driver

Endpoint 1 IN



Endpoint 1 OUT USB Hardware Microchip Supplied

Figure 4

Software Considerations

USB, unlike most other serial communications, has a sophisticated software stack—the price of universal connectivity. Yet, since most chip suppliers also provide


July 2008

3/17/08 2:05:19 PM


Software structure for a typical embedded USB application.

must fit into one of the four USB categories: Peripheral, Embedded host, DRD or OTG. The primary consideration for the peripheral category is straightforward—is the design interfacing to a PC or an Embedded host? Here, the related concerns are the power required (a peripheral is guaranteed 100 mA from a single host USB port) and how the peripheral client driver will be made available in the Embedded host. The required board connector is a Type B receptacle, or a Type A plug. Considerations for an Embedded host are greatly simplified from those of a full PC. While the handshaking protocols are identical, the Embedded host only needs to support a limited, target list of Peripherals, which greatly eases the software overhead as compared to a PC. An Embedded host must be able to source from 8 mA up to 100 mA on each USB port. The required board connector is a Type A receptacle. A DRD simply combines the above peripheral and host attributes in a single design. Therefore, both Type A and Type B connectors are required. OTG adds some complexity in the form of a new (Type AB) connector and new software modules. Since this connector is unique, an adapter is required to connect an OTG product to a standard Type A host port or Type B peripheral port.

Untitled-6 1

USB Hardware Microchip Supplied

complete software stacks, the designer only needs to understand how to interface to the software; not write the protocols themselves. There are two main components of all USB stacks: the appropriate category module, and the class driver. The Session Request Protocol (SRP) negotiates power from the host, allowing a connected peripheral to be powered down without physically disconnecting it from the host. The Host Negotiation Protocol (HNP) determines which product will be the host, because an OTG product assumes the complement to whatever it is connected. Should two OTG products be connected together, the one that is connected with the A side of the cable is the default host. The category modules can be summarized in Table 1. In each USB application, a pair of drivers must always be present. The client driver resides on the host (this is the software that we have all downloaded to our PC for one product or another). The function driver resides on the peripheral. Communication between these two drivers enables the USB plug-and-play experience (Figure 4). To facilitate driver development, device driver classes have been created by combining common functions into single driver classes. All peripheral products that support a class are automatically supported by the host-based client driver for the same class. No specific driver update is required. More than 15 separate classes are defined by the USB Implementers Forum (USB-IF). For example, the Human Interface Driver (HID) class includes mice and key-


In the case of USB, adequate processing power and memory must be calculated for both the USB interface and the design’s other applications. Therefore, the first step is usually to design in the other requirements first, and then modify the design for USB. This is most easily accomplished when a variety of scalable and compatible hardware and software solutions are available from a single microcontroller supplier, since portability of software—both for the USB portion (Peripheral, Host, DRD and OTG) and other applications—is a key consideration for the designer’s sanity and time-to-market. For a peripheral design, 5K of USB program code is a good estimate. This easily fits

Microchip Technology Chandler, AZ. (480) 792-7200. [].

C O U N T E R / T I M E R

Reliabili Reliability.

F P G A I / O S E R I A L I / O D I G I T A L

The selection of a microcontroller for an embedded USB application is based on many factors, including: • Power-consumption requirements (watts) • Number of I/O • Peripheral support (serial ports, parallel ports, real-time clock/calendars, capacitive touch, PWMs, A/D converters, UARTs, etc.) • Package options/sizes • Processing power (MIPS) • Memory requirements • Software support, including libraries and available tools • USB requirement: Peripheral, Host, DRD or OTG

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I / O

Considerations for 8-, 16or 32-bit Microcontroller Selection

into most 8-bit microcontrollers. Host, DRD and OTG can take up to 50K of code, depending on the features incorporated. This, when added to the memory and processing requirements for the other applications, usually drives the design to 16- or 32-bit microcontrollers. Since the transition from most 8-bit designs to a 32-bit design usually involves a major investment in new hardware and software development tools, as well as new programming skills, languages and software architectures, 16-bit USB microcontrollers can be an excellent choice for a new or growing USB design. The availability of complete software modules and libraries from some MCU vendors allows a designer to focus on the key aspects of the design, even with an advanced application incorporating graphics, Ethernet or capacitive touch sensing. The total platform cost is also one of the design considerations. USB itself offers several advantages over other serial communications (e.g. RS-232). It provides an independent power bus and requires fewer external components (capacitors, resisters), reducing component count and required board real estate. The cost of USB connectors is often less than alternative serial connectors. With new, low-cost 8-bit USB microcontrollers, it can be very cost-effective to replace previous serial communications with USB, while adding new features, such as capacitive touch sensing, and still produce a product with reduced overall cost. For more feature-rich designs, many 16-bit and 32-bit microcontrollers integrate a wider range of peripherals to reduce overall system cost and component count. It becomes crucial that these peripherals are adequately supported by hardware tools and software, including libraries, which allow a designer to fully utilize each microcontroller’s capabilities. The details of making USB work in embedded applications have already been solved. The challenge that remains is to determine how USB can best be utilized in an application, and to select the USB microcontroller platform that offers the most complete, scalable and flexible solution—in terms of both hardware and software—for generations of successive designs.


boards. As long as the products conform to the requirements of this class, an Embedded host will recognize all the products, provided that a HID-class client driver is already present in the host. The ability of USB to support DMA transfers is a major benefit in power-constrained applications. Since data can be queued in a microcontroller’s memory without CPU intervention, the core can remain in a low-power state for longer, providing a very favorable duty cycle for battery-powered applications. The CPU would only wake upon receipt of an interrupt from the DMA controller, once the complete operation has been done, allowing more work for fewer interrupts. As DMA is also faster than a typical read/write cycle, the potential for stalling behind concurrent operations in real-time applications is also minimized.



• Software support for RTOS and Windows® For flexible, capable, and reliable I/O solutions, think Acromag. 800-881-0268 or 248-624-1541



Selecting the proper interconnect of a given application area is often crucial, and moving between two or more on the same system as needs change is becoming more common. An SoC approach can offer multiple interconnects on a single chip—speeding time-to-market and reducing costs.

by S  am Sanyal MosChip Semiconductor


exploration er your goal eak directly al page, the resource. chnology, and products

Franchisable USB Connectivity Solutions in Embedded SoC


he connectivity needs of industrial, automotive and consumer computing continue to grow to encompass everything from USB to PCI Express (PCIe). Unlike component-level solutions, System-on-a-Chip (SoC) technology has the ability to integrate multiple connectivity solutions panies providing solutions now on a single silicon chip, cutting developration into products, technologies and companies. Whether your goal is to research the latest ment cycles and costs while lication Engineer, or jump to a company's technical page, increasing the goal of Get Connected is to put you product ice you require for whateverfunctionality, type of technology, performance and ies and productsquality. you are searching for. Ethernet As a result, embedded designers are more often integrating connectivity and high-performance processor IP on the same SoC. However, this connectivity integration has to be universally accepted, processor agnostic and have the ability to remove bottleneck constraints. Emerging next-generation standards, such as PCIe Gen2, add to functionality, performance and quality demands. As such, embedded designers face great







End of Article Get Connected

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Figure 1

JulyConnected 2008 Get with companies mentioned in this article.


Multiple standards connectivity on SoC for FEP.


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challenges in balancing integration of appropriate connectivity blocks while maximizing performance for highly competitive consumer, industrial, automotive and other verticals. Among all options, USB is probably the most versatile and successful connectivity standard in computing history, in regards to addressing multiple vertical segments. It has been implemented in PCs, peripherals, digital imaging, audio, video, wireless and wired


vestment, from the viewpoint of an ASIC and a system, in capturing specific vertical segments with your brand. With FEP, you can quickly enable the repurposing of existing designs to suit new connectivity needs. FEP will help designers meet the latest connectivity requirements and turn around new designs within a limited marketing window. FEP can also aid in meeting price targets and maintaining system performance and compatibility with industry standards.

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It stands to reason that with so many connectivity variables available in a product design, perhaps “franchising” a platform where only small changes are needed to implement such varieties might be ideal. The key concept behind franchising an embedded platform— dubbed Franchisable Embedded Platform (FEP)—is the ability for integration that addresses multiple verticals within a single SoC. Consider FEP as a one-time in-

The concept is especially effective as it relates to marrying various connectivity options on a SoC to better meet integration challenges. For example, if we pick a popular connectivity standard like USB to start with, we can connect with almost all key market segments (PC, consumer, industrial, etc.). Now, if we keep adding other connectivity blocks one at a time, we can more specifically target a market segment. In this conceptual way we can attain a true franchisable embedded silicon platform to meet multiple market segments, because with an incremental change in system design, we can have a number of systems to suit a number of markets.


FEP can greatly optimize the process of spinning new SoCs for every vertical. All four major stages of designing an SoC—specifications, integration, verification and implementation—are virtually eliminated.

Designing Connectivity with FEP

The base design must be done with multiple considerations in mind: appropriate market research and trade-

Ethernet MAC+PHY

dealing with connectivity is the protocol standards. These include the implementation of the logical link layer, MAC layer and physical layer. Now, the goal is to get the best possible design from the integration of multiple connectivity options using multiple standards on a single platform. Implementing this at the board level defeats the purpose of FEP, and so a wiser choice is to implement them on one single die so that options like USB, Ethernet, PCI,


AHB/APB Bridge


Memory Controller




Security Engine

USB Host Controller

TCP Offload Engine USB Port 1

Figure 3

PLL USB Port 2

USB Port 3


USB Port 4

MosChip’s MCS8140 Network Appliance Processor.

offs for every vertical segment, their required performance turnaround time, a review of the overall benefit of the integration, and target cost. Selective integration of functional blocks is the key to creating the SoC that can address differing vertical segments with incremental design modifications at the FEP level. For example, if you created a system with Ethernet to PCIe, and you later come to realize a new market requirement for Ethernet to USB, FEP makes it possible to reconfigure the existing device with EPROM and a few physical connectivity changes to quickly arrive at a new design. Another key consideration while

PCIe, ISA, GPIO, etc. are on one single die (Figure 1). Such SoC connectivity can be stand-alone or put together around an embedded processor, such as an ARM 9. Having all these pieces on single die will eliminate most delay issues, enhance signal integrity, add data crossover security, improve design-in time, add design stability and will address many other marketing and business-related issues (Figure 2). The designer should be able to create multiple applications merely with an EPROM configuration for the specific crossover bridge such as a USB to PCIe connectivity application or to 10/100/1000 Ethernet to USB with this

Untitled-5 1

July 2008


3/14/08 10:20:53 AM


base platform. Now, one platform can be franchised across whatever connectivity options need to be addressed today or tomorrow. The key purpose of FEP is to reduce integration risk and accelerate time-tomarket. However, to benefit from FEP’s ability to accelerate time-to-market, FEP must be approached from a holistic view of silicon to systems.

Industrial, business and consumer applications seem to be most ideal for an FEP-based implementation. These are volume digital data, file server, NAS, printer server, SOHO, docking stations, display, and many others. These applications could very easily use combined high and low bandwidth features of USB or PCIe. Such combinations of features can address multiple applications using

the same design. However, with USB to Ethernet, bandwidth requirements at the back end do have to be higher to alleviate network bottlenecks, and an Ethernet 10/100/1000 port should be incorporated as part of the solution. Standards-based I/O functional blocks will require no additional circuitry. System designers should be able to create various functional modules (such as wireless, NAS, etc.) that could later make up a readily available ecosystem to be used to address a number of applications. With a quick replacement of one functional block for another, or replacement of a peripheral card to accomplish new specific functions, moving into a different domain-specific area can be accomplished quickly when an opportunity arises, such as with the upcoming PCIe Gen2 or USB 3.0 standard. Source code compatibility will also contribute to ensuring a fast time-tomarket, since given the base design, lengthy code modification should not be required.

Multiple Interfaces on SoC

Connectivity in embedded systems has become a defining item of a system. As we look at the standard SoC versus FPGA, FPGA is a limited FEP solution for multiple reasons. Designin cycles, tools and time-to-market for systems and ultimately costs are some key obstacles with an FPGA as an FEP. Designing with FPGAs brings multiple design-in overhead activities, such as the use of complex tools noted above, along with platform choices, added IP considerations, extra tools and designin assistance—all of which affect turnaround time. In contrast, if you choose a dedicated off-the shelf SoC processor to enable the required function at maximum capacity, it can be done without the burden of aforementioned overheads, which in turn allows your designs to remain competitive in a crucial time-to-market industry like connectivity. It allows OEMs to address their target vertical segment economically without sacrificing performance, features, or marketing

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3/10/08 10:30:24 AM


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window and with the capacity to spin next-generation products in very little time. Figure 3 shows an example FEP implementation of a network appliance processor with multiple USB host and OTG ports along with other connectivity options. This device has multiple key interfaces that include PCI, 10/100, USB, Serial, Parallel and GPIO to address multiple key market segments. With the FEP concept employed, the next-generation products can easily be made to include PCIe, USB 3.0, 10/100/1Gbyte and other performance enhancing blocks like 550 MHz ARM 9 core, Digital Content Management, etc. MosChip has developed a number of domain solutions (storage, consumer, IPC and others) with FEP using its Network Appliance Processor SoC. Interoperable functional blocks that include Ethernet, USB, PCIe, ISA, GPIO, among others, are designed and are readily available. This makes for an ecosystem that has a myriad of design options, allowing the quick swap out of functional blocks to create new high-performance designs in rapid time.

In scenarios where you will be switching between current and nextgeneration technologies, FEP becomes very ideal at enabling designs to address both. This is especially true for popular connectivity technologies such as USB, PCIe or Ethernet where the last thing you want in a system is a connectivity bottleneck. In addition, USB links can be expanded using StackableUSB technology ( Using this technology, I/O cards can support up to 16 StackableUSB boards. This technology is suitable for Industrial and Embedded USB applications. It uses the established PC/104 and PC/104-Plus stacking architectures and allows an automatic link with all connected devices with minimum human intervention. In an SoC architectural implementation, the USB port links for all sixteen boards and routing links need to be implemented. The use of the FEP concept can facilitate having a comprehensive suite

of connectivity solutions within a onetime design effort that can address multiple vertical segments from currentgeneration to next-generation products such as USB 3.0. This approach can greatly speed your design times to more effectively, efficiently and economically meet legacy and next-generation connectivity market needs with a faster time-to-market. MosChip Semiconductor Irvine, CA. (949) 276-9750. [].

Connectivity Needs More SoC and FEP Support

The next-generation PCIe, USB or Ethernet interfaces will introduce additional integration challenges with highspeed interfaces that may call for a switch between the current versions of interfaces. Issues that might make a difference are as follows: I. Possible Differentiating Factors over Current Connectivity: • Data transfer rates more than 10 to 20 times faster • Optimized for low power • Improved protocol efficiency • Ports and cabling will be designed with both copper and optical cable II. Possible Architectural Issues: • Higher CPU usage • High-speed connectivity link will require separate connector • Dual connectivity (high speed and low speed) links be available one at a time

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AM July7/8/08 2008 10:41:10 31

system integration

MultiCore Processors

A Multicore Approach to More Efficient Embedded System Performance Re-evaluating the “faster-is-better” mentality in favor of a “divide-and-conquer” approach, offers new options in terms of both throughput and performance-per-watt.

by Robert Küffner, MEN Micro


or years, commercial off-the-shelf (COTS) board designers have typically relied on using faster processors to deliver enhanced performance when designing increasingly powerful single board computers (SBCs) that industrial control and automation application developers could adopt as a foundation for unique embedded control systems. And naturally, we have complemented those more powerful processors with more sophisticated cache, memory, mass storage and I/O capabilities to satisfy increasingly demanding application software. However, with continued increases in processor speeds, I/O demands and the use of graphics, embedded systems users are discovering that the “faster-is-better” strategy alone can lead to new problems related to heat build-up, less efficient use of power at the highest processor speeds and increased latency in real-time applications. That has prompted the realization that more powerful hardware components alone are not the total answer to keeping pace with today’s escalating demand for graphics-intensive applications or the added pressure to integrate greater functionality into smaller packages. As a result, we investigated how striking a new balance between a multicore processor configuration and software structures can result in higher functionality, greater throughput and fewer conflicts in compute-intensive applications. Systematically addressing those related concerns through a combination of new multicore CPUs, independently run multiple operating systems, larger shared cache and adapted legacy application software, has yielded performance gains that can benefit any embedded system developer facing a variety of issues beyond processor speed alone. The resulting design (Figure 1) has proved to be particularly advantageous for multimedia and other graphics or real-time applications.


July 2008

Addressing Multiple Concerns with Multiple Cores

In satisfying the need for processing power, semiconductor technologies providing increasingly higher clock speeds— upwards of 4 GHz—typically require additional transistors, each of which leaks a small amount of current. Cumulatively, those power losses can lead to complications of greater power consumption and heat generation as well as lower performanceper-watt. And even in spite of increased clock speeds, multitask applications often compound latency issues when a high volume of routine application functions multiply queuing conflicts with high-priority real-time functions. Contrasting those inherent physical and practical limitations of high-speed processors against the more complex requirements of today’s applications, led to the realization that something fundamental had to change. One logical conclusion was to explore more parallel solutions—from both the hardware and software perspectives. As a result, combining newer multicore processor technology with increased L2 cache (4 Mbyte) and system memory (4 Gbyte SDRAM) in COTS single board computers, has enabled us to document performance up to 24,178 MIPS and 16,525 MFLOPS through industry standard performance testing. The board layout shown in Figure 1 integrates a dual-core 64-bit Intel Core2 Duo processor (ranging from 1.06 GHz to 2.60 GHz) in a versatile 4HP/3U single-slot single-size format. It is supported with a Mobile Intel 965 GM Express chip for memory and graphics control, plus multiple mass storage capabilities and a variety of I/O ports. This execution offers a compact solution for embedded systems demanding high computing performance with comparably low power consumption.

system Integration















On-board Connector



Front Connector Rear I/O

Intel Core 2 Duo

System Memory DDR2 SDRAM 965GM Express

System Memory DDR2 SDRAM

Memory Controller Graphics Controller






Dual SDVO VT-Software






On-board HDD

IDE (SATA) USB 2.0 USB 2.0 USB 2.0 USB 2.0 USB 2.0 USB 2.0 USB 2.0 USB 2.0

ICH8-M DH I/O Controller Hub

Chipset F F


Figure 2

HD Audio

PCIe x1

Ethernet 10/100/1000 Base-T Ethernet 10/100/1000 Base-T


Figure 1


cPCI J1/J2 or: Busless +5V

PCIe 4x1 or 1x4 PCIe x1


Side-Card Connector

J2 Rear I/O Options

This 3U compact SBC uses dual-core architecture to minimize conflicts in real-time applications, while supporting more than a dozen I/O ports for complex industrial embedded applications.

A 533/667/800 MHz frontside bus, 500 MHz 256-bit graphics core and 10.6 Gbyte/s memory bandwidth provide support for CAD tools, 2D/3D modeling, video and rendering in multimedia or other graphics applications. They also aid in other compute-intensive applications for test and measurement or vision and control systems in industrial automation or robotic applications. But that overall hardware configuration is only half of this enhanced embedded system solution.

Restructuring Software for Multiple Cores

In order to take full advantage of the multicore processor, it is also necessary for us to re-evaluate and implement appropriate software strategies—at the operating system software level as well as at the application software level—in order to complement the upgraded hardware design. At the board level, Intel Virtualization Technology (Intel VT) provides the ability to allow one physical “machine” (or board or processor) to function as multiple “virtual” machines. This is true whether that machine or SBC uses a single-core or multicore processor


Intel VT software running on top of the BIOS helps manage independent tasks running on multiple operating systems within the multiple cores of a single processor.

design. By implementing a layer of system software called a Virtual Machine Monitor (VMM) with the multicore processor, we are able to have multiple operating systems sharing one physical hardware platform in a way that is fully transparent to both the operating systems and the applications (Figure 2). In the case of the dual-core processor SBC described here, Intel VT allows us to devote one of the processor cores to a realtime operating system (RTOS) and one to a general-purpose operating system (GPOS). This division of functions reduces interrupt latency by increasing the likelihood that the RTOS will be available for high-priority time-critical functions, while the GPOS handles less critical functions—such as managing a graphical user interface (GUI). This arrangement also ensures that RTOS operations do not need to be interrupted if the GPOS needs to reboot after an unforeseen crash. By using an Intel VT-enhanced hardware platform like the one in the Intel Core2 Duo processor, we also eliminate the need for the problematic software workarounds required by previous software-only VMM solutions. This approach allows us to run multiple guest operating systems at the Ring 0 level where they are normally expected to run. Each OS runs in a less-privileged, VMX non-root mode while the VMM system software runs in a more privileged, VMX root mode (Figure 3a). Doing this avoids the issue of complex and costly workarounds needed to compensate for earlier versions of VMM software that ran on Ring 0 and forced the virtualized operating systems to run on Rings 1-3 (Figure 3b). Those workarounds were necessary because the original 386 architecture was fundamentally designed with the ring structure and memory management to run a single operating system at Ring 0 and run the application software on Ring 3. July 2008


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system Integration

Adapting the Application Software

Once we have established the ability to run multiple operating systems simultaneously on the multicore processor, it is important to make sure that application software will be able to take advantage of the extra core(s). There are several options for making existing application code more parallel. Each involves different degrees of effort and reward, depending on the nature of the application (Figure 4). Perhaps the easiest way to accomplish the transition of legacy software to multicore applications is to implement multitasking by using the built-in capability of an operating system to assign specific processes to run on specific cores. Multitasking permits operating systems that are enabled for symmetric multiprocessing to free Core 1 for Application A by scheduling other tasks on other cores. This approach does not scale easily to more cores, but it is often attractive as a short-term approach because of its simplicity. In installations with long single-thread applications, such as media servers where there is a lot of old legacy code, distributed processing can be used to split the application in two and run each half on different cores. While this is not a perfect method, distributed processing provides coarse-grained distribution of heavyweight processes onto all cores and does offer some flexibility to split the code to optimize load balancing and performance. The best way to take advantage of upgrading to multicore processing, typically comes from application threading. This approach provides fine-grained distribution of lightweight processes onto all cores, offering the best load balancing and scaling. Application threading is particularly advantageous for repetitive processes—like running SSL transactions or virus checking bit streams. Initiating a new thread for these repetitive processes runs faster than starting a new process because many times the memory segment does not need to be changed and the needed instructions may still be in the instruction cache. When done properly, threading makes the best use of cache and runs repetitive algorithms faster.

Maintaining Application-Specific Flexibility

In addition to the multicore hardware and software framework approach taken in the COTS board design mapped out above, it was necessary to integrate a variety of I/O capabilities in anticipation of the diverse needs of custom embedded system designers across a wide range of potential applications. This is accomplished with a northbridge circuit using an Intel 965 GM Express chip—capable of supporting up to 4 Gbyte SDRAM system memory as well as VGA and two serial digital video outputs—and with a southbridge circuit using an Intel ICH8-M DH chip supporting numerous I/O options. Those chips support a total of eight USB 2.0 ports, two 10/100/1000Base-T Ethernet channels, a high-definition audio port, both SATA and PATA mass storage devices and a CompactFlash option. The ICH8 I/O controller hub also provides support for Intel Matrix Storage Technology, providing both Advanced Host Controller Interface (AHCI) and integrated RAID functionality. Matrix RAID support is provided to allow multiple RAID levels to be combined on a single set of hard drives.


July 2008









Virtual Machine Monitor OP Platform Hardware








Ring 1-3

Min Ring 0

Virtual Machine Monitor Platform Hardware

B Figure 3

Using a Virtual Machine Monitor that allows operating systems to run at privilege level “0” (a) eliminates the need for complex workarounds demanded by earlier VMMs (b) that occupied Ring 0 alone and forced the OS to run in Rings 1-3 with the applications.

In order to provide capability for both new and existing embedded industrial automation and control applications, the design includes compatibility with both CompactPCI (CPCI) and CPCI Express bus standards that allows the SBC to function between a PLC control bus and an IT infrastructure. This enables interaction and control with existing sensors, actuators and drives while it logs, analyzes or interacts with data in the IT environment. In addition to demanding an architecture to accommodate I/O-intensive and compute-intensive applications, this dual-core processor SBC design also requires additional performance capabilities beyond those of typical IT computer room equipment in order to tolerate the anticipated operating conditions of heavyduty industrial environments.

End-User Flexibility without Custom Development

Harnessing the throughput advantages of multicore technology in an industrial-grade board supported by standard software development tools creates new options for embedded system designers who have neither the time nor the inclination to upgrade their industrial

system Integration

Distributed Processing


App A

App B

Core 1

Core 2

App A Process 1 Core 1

Core 2

App AAthread App thread App AppAAthread thread App A thread

App AAthread App thread App AppAAthread thread App A thread

Core 1

Core 2

















Figure 4

Flexibility in adapting existing application software to multicore processing enables users to choose the approach that most closely matches the nature of the task and the format of the current software code.

control and automation systems from the board level up. Board support packages for Windows, Linux and VxWorks complement a large percentage of applications already used in those environments. And through the use of side cards that offer a variety of I/O combinations with standard hardware, systems can easily be expanded depending on the necessary functionality. For example, the MEN Micro F6xx series offers a wide selection of I/O options including USB, UART, FireWire, DVI and audio, depending on the card selected. Regardless, each card provides a slot for an onboard 2.5� SATA hard-disk. The non-proprietary components and software in this SBC offer end users broad latitude in adapting it to their particular needs, comparable to their implementation of existing single-core

Untitled-11 1

App A Process 2

Application Threading

processor systems. While it enables their applications to harness the immediate benefits of dual-core processing, it still allows them to work with familiar software, bus interfaces and input signals. Equally important, hardware compatibility provides an easy migration path to next-generation processors without software or system adaptations. This lays the foundation for future potential to be gained from even broader applications of multicore processing. MEN Micro. Ambler, PA, (215) 542-9575. [].

July6/24/08 2008


2:31:55 PM

system integration

MultiCore Processors

Multicore Processors Bring out High-Performance Computing Potential in Real Time A parallel programming approach using today’s multicore processors can be applied to allow domain experts, such as control engineers, physicists, geologists and biomedical researchers, to create high-performance computing applications that meet real-time constraints.

by Jeff Meisel, National Instruments


n expression goes “Real-time doesn’t necessarily mean real fast”—but that might be changing. Engineers and scientists are now able to address a new domain of problem solving based on “Real-Time Numerical Analysis” using a high-performance computing (HPC) approach with off-the-shelf hardware. This new area of innovation is being driven by the advent of multicore processors and more sophisticated real-time OS technologies that utilize symmetric multiprocessing (SMP) to allow for real-time software to be load-balanced across multiple CPU cores. In all forms of HPC, whether the compute engine is a supercomputer or distributed computers, the goal is to accelerate the calculation of the problem at hand. Because tasks that require acceleration are so computationally intensive, the typical HPC problem has traditionally not been solvable with a normal desktop computer, let alone an embedded system. However, disruptive technologies such as multicore processors, GPUs and FPGAs now enable more and more HPC applications to be solved with off-the-shelf hardware. Where the concept of “real-time HPC” comes into the picture is with regards to latency, and more specifically the time it takes to close a loop. Many HPC applications perform off-line simulations thousands and thousands of times and then report the results. This is not a real-time operation because there is no timing constraint specifying how quickly the results must be returned. The results just need to be calculated as fast as possible. Real-time applications have algorithms that need to be accelerated but often involve the control of real-world physical


July 2008

Head Node


Figure 1

Node 1

Node 3

Node 2

Node 4

Example configuration in an HPC system. Adapted from Cleary and Hobbs “A Comparison of LAM-MPI and MPICH Messaging Calls with Cluster Computing.”

systems, so the traditional HPC approach is not applicable. In a real-time scenario the result of an operation must be returned in a predictable amount of time. The challenge is that until recently, it has been very hard to solve an HPC problem while at the same time closing a loop in under 1 ms. Furthermore, a more embedded approach may need to be implemented, where physical size and power constraints place limitations on the design of the system.

system Integration

Many HPC apps are developed using a message passing protocol (such as MPI or MPICH) to divide tasks across the different nodes in the system. A typical distributed computer scenario looks like Figure 1, with one head node that acts as a master and distributes processing to the slave nodes in the system. By default, it is not real-time friendly because of latencies associated with networking technologies like Ethernet. In addition, the synchronization implied by the message passing protocol is not necessarily predictable with granular timing in the millisecond ranges. Note that such a configuration could potentially be made realtime by replacing the communication layer with a real-time hardware and software layer, such as reflective memory, and by adding manual synchronization to prioritize and ensure completion of tasks in a bounded timeframe. Generally speaking though, the standard HPC approach was not designed for real-time systems. It solves other HPC applications extremely well but falls short in real-time applications. Distributed programs must often deal with heterogeneous environments, network links of varying latencies, and unpredictable failures in the network or the computers. These present serious challenges when real-time control is needed. Now consider a multicore architecture, where today you can find up to 16 processing cores. In the short-term future we will see 32 cores, and Intel has recently unveiled an 80-core prototype as part of their tera-scale research program. It is the first programmable chip to deliver more than one trillion floating point operations per second (1 Teraflop) of performance while consuming very little power. What this means is off-the-shelf multicore processors have the potential to become a miniaturized supercomputer in a single piece of silicon. From a latency perspective, instead of communicating over Ethernet, a multicore architecture found in off-the-shelf-hardware makes use of inter-core communication in which communication speed is determined by system bus speeds such as in the quadcore system shown in Figure 2. Return-trip times are therefore much more bounded. In addition, multicore processors can

Core 0

Core 1

Core 2

L2 Cache

L2 Cache

System Bus

Figure 2

Core 3

System Memory

Example configuration in an HPC system. Adapted from Tian and Shih, “Software Techniques for SharedCache Multi-Core Systems, Intel Software Network. ”

Figure 3

Pipelining in NI LabView.

utilize symmetric multiprocessing (SMP) operating systems to auto load-balance tasks across available CPU resources—a technology found in general-purpose OSs like Windows, Linux and MacOS for years. Now real-time OSs are offering SMP support. This means that a developer can specify timing and prioritize tasks that are applicable across many cores at one time—and the OS handles the thread interactions. This is a tremendous simplification compared with message-passing and manual synchronization, and it can all be done in real time. A correlation can be drawn between the typical numbers of nodes in an HPC system and how many cores CPUs will be offering in the near future. Surveys have shown that a high number of clusters have 64 nodes or fewer while almost no clusters have between 64 and 256 nodes. Then above 256 nodes the number increases. Embedded system designers are not likely to be using 64 or 256 cores anytime soon. Nonetheless, for real-time acceleration, multicore presents potentials for scalability that will very soon be comparable to a 16- or 32-node system that falls in the category of the lower-end HPC use cases. Note that the reason 64 nodes and fewer are commonplace today in HPC systems stems in large part from the fact that creating highly parallel code is not a trivial task. What are some examples of needing real-time acceleration? Two examples of accelerating real-time applications with multicore processors include an autonomous vehicle application and nuclear fusion research. In an autonomous vehicle application, Torc Technologies and Virginia Tech used LabView to implement parallel processing while developing vision intelligence in its autonomous vehicle for the 2007 DARPA Urban Challenge. LabView runs on two quadcore servers that perform the primary perception in the vehicle. Torc did not require hard real-time and was able to implement a soft real-time solution with a general-purpose operating system. July 2008


system Integration

Task Parallelism

Figure 4

Data Parallelism

Parallelism represented in NI LabView.

Multicore Processors

At the Max Planck Institute for Plasma Physics in Garching, Germany, researchers implemented a tokamak control system to more effectively confine plasma. For the primary processing, they developed a LabView application that split up matrix multiplication operations using a data parallelism technique on an eightcore system. A hard real-time OS with symmetric multiprocessing (SMP) support was installed on an off-the-shelf system based on an Intel multicore architecture. Dr. Louis Giannone, the lead researcher on the project, was able to speed up the matrix multiplication operations by a factor of five while meeting the 1 ms real-time control loop rate. Other areas that show potential are in structural and geological research, in particular the simulation of earthquakes to improve the design of bridges and building structures. We will begin to see new domains applying hardware-in-the-loop (HIL) techniques that in the past may have required off-line simulations but were unable to utilize an HIL approach. The key consideration to implementing a real-time HPC approach is the software design and architecture in the system.

Parallel Programming Using Pipelining

One widely accepted technique for improving the performance of serial software tasks is pipelining. Simply put, pipelining is the process of dividing a serial task into concrete stages that can be executed in assembly-line fashion. Essentially, you can use LabView to make an “assembly line” out of any given program. The graphical source code in Figure 3 shows how a pipelined application might run on several CPU cores. The code implements a pipelined approach with the graycolored “while loop” structure surrounding functions that must execute one after another. A construct on the border of the loop called a “shift register” stores the previous iteration’s value and



July 2008


then feeds that into the next block in the algorithm. This ensures that sequential order of execution is met, while at the same time allowing the pipelined stages to all execute in parallel. In this implementation of basic pipelining, LabView will automatically thread the application and in most cases the OS scheduler will run this on separate CPUs on a multicore system. A more advanced implementation of pipelining in LabView utilizes a special “Timed Structure,” which may set processor affinity to a section of code, along with low-latency real-time FIFO structures that pass data between cores via queues. This implementation is best utilized when optimizing for cache performance. It’s important to note that acceleration in a real-time environment is not limited to multicore processor systems but is also commonly found in heterogeneous processor systems involving a combination of CPUs, FPGAs and DSPs. LabView can represent parallel software for both multicore processors and FPGAs with the same graphical code representation (Figure 4). “Real-time” does not necessarily mean “real fast,” but there is no reason it can’t be. Engineers and scientists are now able to address a new domain of problem solving based on “Real-Time Numerical Analysis” using a high-performance computing (HPC) approach with off-the-shelf hardware. The key consideration for developers is finding a programming approach that allows for implementation of parallel architectures, such as the pipelining example demonstrated above. National Instruments. Austin, TX. (512) 683-0100. []


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Medical Systems

Defense Electronics Evolution = Medical Device Electronics Revolution Military development funds the evolution of technology and the revolution of medical device technology capabilities.

by Mark Downey, White Electronic Designs


echnological advances that help soldiers on the battlefield are driving the revolution of medical device technology. Resulting innovations in devices such as portable monitors, handheld diagnostic equipment and mobile ICU stations improve the quality of healthcare for soldiers who are away as well as those needing treatment here at home. From “telehealth” to virtual surgery, defense electronic technologies are finding their way into portable medical devices. Technology creators in both the military and medical markets are tasked with delivering products that are faster, smarter, smaller and better—with the majority of these requirements being addressed by commercial-off-the-shelf (COTS) products. Sometimes these commodity-based products fall short of the requirements for safe, long-term operation. In many cases, technology and processes developed for defense applications can provide the best solutions for medical applications with similar requirements for precision, durability, reliability and portability. It takes creative thinking to find the right solution for the job, and to make that happen in the best way possible. Whether advanced mi-


July 2008

Figure 1

This high-density, high-performance DDR2 SDRAM, designed to support high-performance processors, provides 65% space savings and 54% I/O reduction versus single die packages, making it possible to upgrade existing designs without requiring more board space.

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July 2008

6/10/08 10:59:13 AM

monitor may have had one pad connected to a patient taking a stress test, a newer version may have eight pads, all collecting data, leading to exponential increases in processed patient information. When a device upgrade consumes not only more power, but also requires more storage density within the same board space, a creative multichip module can preserve the design while allowing the necessary adaptations (Figure 1). Likewise, when component upgrades result in incompatibilities, a System in a Package (SiP), a functional subsystem using advanced semiconductor packaging, can be the answer. Today’s SiPs are now capable of encompassing two or more dissimilar dies. Thus, the combination of a processor, gate array, RAM and NV memories can be combined with other components such as passives, filters, mechanical parts, voltage regulators, etc. These are assembled on an interposer or substrate to create a customized, integrated product for a specific application. Within the SiP, the designer can utilize bare die (wire bond or flip chip), FBGA/CSP packaged devices, stacked die or stacked packages. Multichip packages are lower cost functional blocks, typically memory, and make use of the established packaging and assembly infrastructure. Multichip packages often appear to the naked eye as standard single-chip packages, modified to accommodate multiple ICs and passive components internally to provide the user with much higher density and integration. System in a Package, as realized through BGA packaging technology, is viewed as part of the solution set for the gap between the expanding routing complexities of the many active silicon component blocks and memory as well as the ability for the system board/substrate technology to support this routing cost-effectively. For example, if an ASIC designed to support a large content of streaming video requires 18 layers of substrate stacked up to support the memory bus routing in the space available, it is much less expensive to pay for those 18 layers at the SiP level than to

pay for those same layers across the entire system board. By localizing the 18-layer requirement at the SiP level, often times the layer count on the main board can be reduced, which can result in significant cost savings for the system board (Figure 2). Economics are always a limiting factor, and certainly our current economy is a challenge. We have the capabilities to achieve advances above and beyond what is economically feasible. The military is currently funding the evolution of technology, and the medical industry is benefiting from that. The same technologies that make our soldiers more effective on the battlefield also make more effective the medical equipment that treats them there. There is always a demand for reducing the footprint consumed by the memory and storage blocks in the system. Advanced, high-density semiconductor packaging reduces board space and system layout design complexity while increasing system operating speeds and extending product life. Some military component manufacturers have full design, fabrication and test capabilities for a wide variety of Multi-Chip Packages (MCPs), COTS memory, processors and combination MCPs for demanding applications. They may also be able to ruggedize microelectronic products.

But Better…

Military manufacturers of sophisticated microelectronics and semiconductor packaging are experts in constructing extended-environment, high-reliability, high-density semiconductor packages, including die stacking. They are structured to provide integrated silicon and advanced packaging solutions that suit the requirements of today’s engineers. They are set up to manufacture high-reliability ceramic products that are tested in accordance with MIL-PRF-38534 Class H & Class K, and MIL-PRF-38535, created by DSCC to provide standardized fabrication, documentation and testing. The strict

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Intel, Pentium, Atom, Core and Celeron are registered trademarks of the Intel corp. Geode is a registered trademark of the Advanced Micro Devices Inc.



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This System in a Package utilizes cost-effective silicon solutions and assembles different semiconductor technologies, die geometries, or chips from different fabs in the same package to optimize design and upgrade performance while preserving board geometries.

military guidelines ensure reliability that’s also needed in medical applications. Some have the design and engineering resources, development capability and CAD support to design complex ruggedized MCP assemblies, including interposer layout, design and analysis. Their design engineers will evaluate thermal, electrical and de-rating elements of the proposed product, including material compatibility as it pertains to TCE, Tg, moisture and adherence. To facilitate these designs, they use advanced design software and techniques, thermal and mechanical analysis, signal integrity analysis, and the appropriate high-speed package design methodologies. A regular mechanical reliability test process and experience thereof can provide a knowledge pool of do’s and don’ts that can be invaluable to consumers. Long-term support, a necessity in defense electronics, is often important for medical device manufacturers too. Because of the effort and the time that it takes to get a medical device designed, developed and approved, it is essential that design engineers understand up front the life span and expectancy of the external components.

Once again, experienced military manufacturers have processes in place to provide a level of long-term support not typical of commodity suppliers. Obsolescence management, revision control and die banking can prove just as important for medical device manufacturers. A key concern with the general use of semiconductor devices is the availability of die, die revisions or die EOL. Manufacturers support their customers by creating and maintaining direct relationships with major U.S. semiconductor suppliers and their distributors. They also monitor suppliers and die-EOL situations closely to insure a source of supply. The combination of supplier relationships and in-house expertise in design, assembly and test means that the manufacturer can produce single or multi-die packages to match existing and backward compatible package or pinout requirements while utilizing the most recent and advanced die and package technologies available.


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Gateway Industrial PC amples abound. The Defense Advanced Research Projects Agency (DARPA) recently funded a four-year program to create advanced, highly functional prosthetic arms. The amazing prototype actually allowed test subjects to feel objects that were in their prosthetic hands through force feedback. Further development on this project is expected to result in unprecedented freedom of movement with the prosthetic limbs. Aside from economics, the limiting factors in most of these applications are weight and power. Developers of the prosthetic arm have set their goal for a target weight of seven pounds. The laboratory prototype is currently down to 9.5 pounds. However, the unit must also stay connected to a small computer and a battery pack, adding more weight for the potential user. In addition, DARPA is requiring 18 hours per battery charge, but the team is still working on making it to eight. Another item is a slimmed-down ventilator that weighs just 3.1 pounds, compared to 13 or 14 pounds for those in current use. It’s made for usage on the frontlines of battle, so a medic can easily carry it and use it. An Israeli company that developed intense pulsed light to remove paint from jet aircraft now uses that technology in a system that smoothes out cellulite patches. The manufacturer credits the multidiscipline inherent in weapons system design to advancing that of medical design. Another Israeli company sells a pill-size video camera developed by a missile scientist. The camera provides doctors with a fairly comprehensive view of the human digestive system. Then there are the “trauma pods,” battlefield-based unmanned medical treatment systems to stabilize injured soldiers within minutes after trauma and administer life-saving medical and surgical care prior to evacuation and during transport. Development of the project has been awarded to SRI International, a developer of telesurgery systems. This

technology is bound to migrate to civilian usage and save lives in all sorts of situations, such as remote areas, during the aftermath of natural disasters and many other scenarios. Large semiconductor companies are generally not interested in making low-volume military-grade components, so contractors looking for components with special features are faced with finding suppliers willing to make them. Smaller companies that have the flexibility to adapt technologies and customize designs are able to provide solutions to both military and medical device manufacturers when a COTS product doesn’t meet their requirements. They may also have engineering talent that regularly accepts the challenges of finding solutions that are out of the ordinary. For example, White Electronic Designs is known for its ability to break through size, weight and power barriers with creative MCM and SiP designs. For medical companies with an investment in an existing product design, that kind of expertise can indeed be life-saving. These applied technologies and processes from the defense industry are evolving healthcare equipment and improving its quality, cost and accessibility for homes, hospitals, clinics … saving and improving lives far beyond the battlefield. White Electronic Designs Phoenix, AZ. (602) 437-1520. [].

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FeaturedProducts Hybrid Signal Processing Card Leverages TI DSPs A new signal processing board features a high-performance, Texas Instruments multicore TMS320TCI6487 DSP designed specifically for communications infrastructure applications, coupled with a high-density Altera Stratix II GX FPGA. The first TI-based offering from BittWare, the F1/GXAM board provides a highly flexible, reconfigurable platform for high-end digital signal processing. TI has combined into the TCI6487 three fast cores for a total of 3.0 GHz raw DSP processing power with 3 Mbytes of on-chip L2 SRAM/cache and native OBSAI and CPRI antenna interfaces into a single low-power chip aiming to set a new standard in DSP for communications applications. The F1/GXAM provides BittWare’s ATLANTiS framework implemented in the FPGA, a control plane interface via BittWare’s FINe interface bridge, an IPMI system management interface, configurable AMC SerDes interfaces supporting a variety of protocols (i.e. Serial RapidIO, PCI Express, 10GigE), and a front panel 3x SerDes interface supporting CPRI and OBSAI. Additionally, the board features 10/100 Ethernet, Gigabit Ethernet, three banks of DDR2 SDRAM, one optional bank of QDR2 SRAM, and flash memory for booting the FPGAs and FINe. With the TI TCI6487, the F1/GXAM features a high-performance DSP, enabling SoC solutions in one modular, scalable device with the benefits of a small footprint. Native OBSAI and CPRI antenna interface support is provided for wireless base station design. The device contains specialized coprocessors and supports several standard interfaces including Serial RapidIO, Gigabit Ethernet, DDR2 and McBSP. Robust software tools are available to aid development including TI’s Code Composer Studio and numerous third-party programs. The onboard FPGA, an Altera Stratix II GX, was specifically designed for serial I/O-based applications requiring high-density, reconfigurable logic. The FPGA provides up to 15 full-duplex, high-performance, multi-gigabit transceivers supporting Serial RapidIO, PCI Express, 10GigE, Gigibit Ethernet and SerialLite II standards. It contains up to 132,540 equivalent LEs, over 6700 Kbits of embedded memory, 252


July 2008

embedded 18x18 multipliers (63 DSP blocks) and 8 PLLs. BittWare offers a software and support package for the F1/GXAM. The BittWorks software tools provide host interface libraries and a wide variety of diagnostic utilities and configuration tools. BittWare’s FINe Bridge provides Gigabit Ethernet on port 0 of the common options region. It also provides 10/100 Ethernet and RS-232 on the AMC front panel. The F1/GXAM also implements the standard Module Management Control Interface (IPMI). For FPGA development, Altera’s Quartus II FPGA design flow tool and SOPC builder system-level design tool are available

as is BittWare’s FPGA Developers Kit, which includes fully validated board-level modules for I/O, communications and memory for BittWare’s ATLANTiS framework. Implemented on the Stratix II GX, ATLANTiS facilitates the majority of off-board I/O and provides communications routing and processing. The F1/GXAM will begin shipping Q4 2008 priced under $4,000 in OEM quantities. BittWare Concord, NH. (608) 226-0404. [].

PCI Express XMC Servo Module Boasts 12 259 KSPS A/Ds An XMC Servo module features 12 simultaneously sampling A/D and DACs with a user-programmable FPGA computing core. Low latency SAR A/D and fast-settling DACs support real-time servo control applications. On the X3 from Innovative Integrations, the programmable input range and high input impedance allow interfacing directly to many sensors, while the output is capable of directly driving many transducers. Front panel digital IO can be also be used as PWM or process controls.

every X3 module. Data can be logged to system memory at full rate or to disk drives at rates supported by the drive and controller. Triggering and sample rate controls allow evaluation without even writing code. The powerful Binview file viewer is included to provide data viewing, analysis and import to MATLAB for large data files. Software development tools for the X3 modules provide comprehensive support including Windows and Linux device drivers, data buffering, card controls and utilities that allow developers to be productive right outof-the-box. The X3-Servo XMC board is an appropriate choice for electromechanical servo controls, stimulus-response measurements, data acquisition and more! The X3-Servo XMC board quantity one pricing is just $2,995. Innovative Integration Simi Valley, CA. (805) 578-4261. [].

Clock and trigger controls include support for consistent servo loop timing, counted frames, software triggering and external triggering. The sample rate clock is either an external clock or onboard programmable PLL clock source. Data acquisition control, signal processing, buffering and system interface functions are implemented in a Xilinx Spartan3A FPGA, 1M gate device. Two 1Mx16 memories are used for data buffering and FPGA computing memory. The logic functionality can be customized using VHDL or MATLAB using the FrameWork Logic toolset. An available MATLAB BSP supports real-time hardware-in-the-loop development using the Simulink block diagram environment with Xilinx System Generator. The PCI Express interface supports continuous data rates up to 180 Mbytes/s between the module and the host. A flexible data packet system implemented over the PCIe interface provides the high data rates to the host, which is readily expandable for custom applications. Software for data logging and analysis are provided with July 2008




Extension Kit Expands Measurement and Automation Systems from a Laptop

A multi-slot ExpressCard-to-PXI extension system extends more PXI slots from an ExpressCard-based laptop computer via a shielded cable connection up to seven meters (23 feet) in length. PXI devices installed in the extension PXI chassis behave and work as if they are directly installed in the host system and do not require any additional driver or software installation. The EC-8560/PXI-8565 from Adlink Technology expands the I/O capability of measurement and automation systems from a mobile device such as laptop computer. At the same time, it provides a ruggedized extension kit that can withstand high temperatures and harsh vibrations so that a host computer with an ExpressCard interface can both be located at a safe distance from such environment and directly control remote PXI devices. It also offers isolation to minimize the effect of high frequency interference from the CPU, memory, or chipset of host system on PXI cards The EC-8560/PXI-8565 implements PCI Express-based control of PXI modules and consists of the EC-8560 ExpressCard extension card installed in a laptop computer, a shielded cable, and the PXI-8565 PXI remote extension card. The EC-8560 is in the ExpressCard/34 form factor, uses one x1 lane, and communicates with the extension PXI chassis via a shielded twisted copper cable. The PXI-8560 remote extension card then converts the PCI Express signal into a 32-bit/66 MHz PCI interface for additional PXI slots.

PC/104-Plus Card Supports ARINC 429 and 717

The multi-function I/O subsystem trend is building steam in the design world. Ballard Technology has released its PM429-2, a PC/104-Plus-compliant card for ARINC 429 and ARINC 717 avionics databuses. The PM429-2 offers up to 16 ARINC 429 channels and 4 ARINC 717 channels on a PC/104-Plus platform. Another attractive feature of the PM429-2 is its universal API library, which allows developers to program software on a commercial or other Ballard product such as an Ethernet or PCI card and seamlessly import it to the PM429-2.

ADLINK, Irvine, CA. (949) 423-2354. [].

5-Volt 1553 Transformer Features Compact Footprint

For situations where data integrity and low latency are the priorities, MIL-STD-1553 still remains the interface of choice. Beta Transformer Technology is introducing the MLP-2205. It is a compact 0.4- x 0.4-inch footprint, 0.185-inch maximum height single channel transformer. A pair of MLP-2205 transformers can be used for dual channel applications yielding an overall footprint that is smaller than industry-available dual transformers. The MLP-2205 is available in ratios compatible with 3.3, 5, 12 and 15-volt transceivers. The 0.185-inch height makes it particularly attractive for today’s smaller MIL-STD-1553 board topologies and it has ratios to meet both transformer-coupled and direct-coupled applications. The MLP-2205 uses a robust header-style design that meets all the requirements of the MILPRF-21038 specification. It operates over the full Mil-temp range of -55° to +130°C. This series is also available using tape and reel packaging. Beta Transformer Technology, Bohemia, NY. (631) 244-7393. [].


July 2008

In addition to these capabilities, the PM429-2 provides an IRIG timer and 16 input / output avionics discrete I/O signals. The discrete I/O can be used as general-purpose I/O or as trigger inputs and sync outputs for protocol functions. The PM429-2 discrete output circuits are open-ground switches capable of sinking up to 200 mA and can withstand up to 35 VDC applied to the pin. The discrete I/O are capable of interfacing with industry standard avionics discrete signals. Ballard Technology, WA. (425) 339-0281. [].

Small, High-Performance Coaxial Resonator Oscillator in .38 x .38-in Package

A new coaxial resonator oscillator is packaged in the super-compact 0.380-in. x 0.380-in. x 0.220-in. SMD package, achieving 42% space savings over the standard 0.5-in x 0.5-in package. The CVCO38CC-3660-3700 from Crystek operates from 3660 MHz to 3700 MHz with a tuning voltage range of 0.3 VDC to 4.7 VDC. (The CVCO38CC family is available in models that operate from 2.2 GHz to 4.4 GHz in bands.) This coaxial VCO features a typical phase noise of -108.69 dBc/Hz @ 10 KHz offset and has excellent linearity. It exhibits an output power of +4.0 dBm typ. into a 50 ohm load with a supply of +5.0 VDC and a typical current consumption of 30 mA. Pushing and pulling are both minimized to 1.0 MHz/V and 2.5 MHz, respectively. Second harmonic suppression is -15 dBc typical. The CVCO38CC-3660-3700 is suitable for use in applications such as digital radio equipment, fixed wireless access, satellite communications systems and base stations. Pricing for the CVCO38CC-3660-3700 will start at $15 each in volume. Crystek Ft. Myers, FL. (239) 561-3311. [].

Small FHSS Radio Module Boasts 60-Mile LOS Range

There are a growing number of applications where size, weight and power consumption are critical design issues—unmanned vehicles, robotics and portable devices—to name a few examples. Feeding that need, Intuicom has announced the C1000μ, a micro-sized, high-performance RF transceiver module for OEMs. This ultra-small, low-weight FHSS radio module enables long-range, networked LOS & BLOS datalink communications for embedded applications. The module features up to a 60-mile LOS range (extendable to “Beyond Line of Sight” with repeaters) with data rates up to 1.2 Mbit/s. The C1000μ is 2.00 x 1.42 x 0.38 inches in size and weighs 18 grams. The unit offers 128-bit AES encryption, secure 900 MHz Frequency Hopping Spread Spectrum technology and is configurable as a master, slave, repeater, or slave/repeater. Its power consumption is a low 6 mA at 3.3 VDC in sleep mode and features -40° to +75°C operation. For defense contractors desiring to bring their products to market on a “fast track” timeline, Intuicom offers engineering services for custom integration of the C1000μ into OEM systems. Intuicom has expertise in adding application-specific capabilities such as GPS Blue Force Tracking, sensor integration, and multiport functionality that enables video, PTZ command and control, and remote position reporting from a single radio module. The C1000μ is offered in two configurations. Available in late Q2 ’08, the standard version provides up to 115 Kbit/s throughput for backward compatibility with legacy Intuicom infrastructure. The highspeed 1.2 Mbit/s version will begin shipping in Q4 ’08. Single unit pricing starts at $400.

30A Half-Brick DC/DC Converters Are 93% Efficient

Once treated as an afterthought, power system design is becoming a more critical issue in the eyes of system designers. They’ve come to realize that power supply efficiency can have a direct impact on system operations. Lambda has expanded its line of DC/DC converters with the launch of the new iHG series of 100W fully isolated, single output, half-brick devices. Providing exceptional thermal performance, using the industry standard half-brick footprint with no base plate, the modules are ideal for engineers designing low-airflow, high-temperature, 48V power systems. The initial product offering includes 5V/10A, 5V/20A and 3.3V/30A devices, with further products planned. The single board construction combined with up to 93% efficiency delivers a very high level of useable power in convection-cooled environments, particularly where airflow rates are low. The iHGs operate over a wide input range from 36V to 75 VDC and feature a very wide output voltage adjustment/trim range from about 50% to 110% of its nominal output voltage. Operating temperatures can range from -40° to +125°C, measured at the module. Safety approvals for Lambda’s new iHG family include UL60950 (US and Canada), VDE 0805, CB scheme (IEC950) and CE Mark (EN60950). The iHG series is available now and priced from $62 each in 1k-unit quantities. Lambda, San Diego, CA. (619) 575-4400. [].

Intuicom, Boulder, CO. (303) 449-4330. [].

July 2008


Products&TECHNOLOGY 3.5-Inch SBC with Geode LX800 Processor Takes 10W

A 3.5-inch single-board computer (SBC) based on a 500 MHz AMD Geode LX800 processor is said to provide performance equivalent to that of an 800 MHz chip. To optimize cooling, the processor is located on the underside of the board, enabling a direct connection to the housing. So passive cooling does not have to be set up. The new MSB800UL from Digital-Logic provides standard PC interfaces and an additional 10/100BASE T Ethernet LAN. In contrast to the PC/104-Plus cards, all interfaces are connected to standard plugs; this means low-cost, cable-free housing integration. The SBC uses the Geode CS5536 chip set. The main memory of the MSB800 can be equipped with SODIMMs in the range of 128 Mbytes to 1 Gbyte. The video controller that is integrated in the Geode processor supports VGA displays with up to 1600 x 1200 pixels. The video memory, with a maximum of 16 Mbytes, is UMA (Upper Memory Area) shared with the main memory. For optional assembly with solid-state memories, the SBC includes an EIDE CompactFlash type II slot. The MSB800UL facilitates individual expandability by an optional MiniPCI socket and two USB interfaces. The SBC has dimensions of 146 mm x 102 mm x 20 mm (L x W x H) and weighs only 0.2 kg. It is compatible with every PC compatible operating system such as Windows XP, QNX, Linux, etc. and works with all application software written for PCs. The board allows booting the operating system from different media such as hard disk, CompactFlash, USB, or LAN. An integrated long-range power supply provides a voltage feed of 8V to 30V so that cost-effective power supply units can be used. Designed for low power consumption (typically 10 watts), the MSB800UL operates within the temperature range of 0° to +60°C. A MTBF (Mean Time Between Failure) value of more than 200,000 hours confirms the high level of reliability and the long life cycle of the single board computer. Digital-Logic, Luterbach, Switzerland, +41 (0)32/ 681 58 40. [].

Solid State Disk PCI RAID Adapter Boasts High MTBF

A high-performance PCI 64bit, 66 MHz, 4-channel SSD RAID adapter supports data rates of up to 533 Mbytes/s. The LT-PCI-CF from Lauron Technologies is a single-slot adapter available in 2 Gbyte to 128 Gbyte capacities and is populated with a fast, reliable Compact Flash module. Since the adapter houses all SSD memory, the LT-PCI-CF provides a single card solution for non-rotating media requirements. The unit has an MTBF greater than 1,000,000 hours provided by built-in EDC/ECC and Wear Leveling algorithms. The endurance with Erase/Write Cycles is greater than 1,000,000. The benefit of the Built-in Flash SSD controller/bridge is that it supports Ultra DMA modes, which yield data transfers at speeds of up to 133 Mbytes/s per channel. The LT-PCI-CF supports RAID 0, RAID 1, RAID 0+1, RAID 5 or JBOD. Stripping modes transfers data to all four channels simultaneously while mirror modes transfer data on both channels. The LT-PCI-CF is shipped with Windows and Linux Device drivers along with RAID management utilities. Delivery for the LT-PCI-CF is 2 weeks ARO. Lauron Technologies, Naples, FL. (239) 431-6237. [].


July 2008

1U Microchassis Aims at Rugged Apps

The 1U “pizzabox-style” form factor is quickly gaining popularity in a host of military applications. Triple E’s rugged 1U microchassis addresses inherent problems associated with electronic systems configured for military, aerospace and other harsh environment applications. The microchassis meets IEEE1101.10 and IEEE1101.11 mechanical requirements. Configured with VME64X, cPCI or PICMG 2.16 backplane, the unit allows for up to two 6U x 1.6 mm x 160 mm size boards in front, and two 6U X 1.6 mm x 80 mm direct plug-in rear transition boards. Weighing 10.75 lbs., the unit measures 19-in. rack mount (L-R) x 1.73-inches high x 11.25-inches deep. Construction features 0.036-inch thick zinc plated steel for structural integrity, durable powder coat finish and removable side walls for easy maintenance.

Unlike units with plastic card guides, this design features a patented all-extruded aluminum 901 Series card guide cluster providing exceptional stability to protect boards from vibration damage and maximum cooling airflow between slots to guard against heat buildup. The unit complies with UL, EN and CE safety specifications, and conducted and radiated EN Class B and EN ratings. Costs for units configured with cPCI backplane start at $1,650. Triple E, Lowell, MA. (978) 453-0600. [].

Power Modules Boast Densities up to 390 W/in³ 3U CompactPCIbased Pre-Qualified, Pre-Configured Subsystem for Rapid Deployment

The first member of a new family of Packaged COTS (PCOTS) fully integrated rugged subsystems has been rolled out by CurtissWright Controls Embedded Computing. The new Power Architecture (PowerPC)based Multi-Platform Mission Computer-9350p (MPMC-9350p) and Intel-based MPMC9350i PCOTS subsystems are flexibly configured five-slot 3U CompactPCI (cPCI) subsystems housed in a sealed, lightweight, compact chassis fully preconfigured with power supply and a wide range of I/O. Designed for high availability in the harshest field conditions, the MPMC-9350p and MPMC-9350i deliver a fully qualified, off-theshelf solution designed to speed deployment of critical applications for space, weight and power (SWaP) constrained platforms such as combat vehicles, helicopters and UAVs. The MPMC-9350 has been designed to meet or surpass DO160E Environmental Conditions for Airborne Equipment. It has successfully passed numerous environmental tests including Temperature, Altitude, Shock, Vibration, Fluid Susceptibility, Voltage Spikes, Electrostatic Discharge and more. Circuit cards installed in the sealed compact chassis (10.72”L x 5.11”W x 7.62”H) are completely isolated from external environmental conditions such as humidity, dust and sand. Optimal system cooling is ensured via thermal transfer between the card edge of its conduction-cooled 3U cPCI cards and the chassis’s side-walls, and a rugged integrated fan provides the necessary cooling air across the walls. EMI filters and gaskets provide increased system security and reliability. The main processing power of the MPMC-9350p is provided by up to three Freescale 7448 PowerPC-based DCP-124 and DCP124P single board computers (SBCs). The DCP-124P peripheralonly processor is a variant of Curtiss-Wright’s standard DCP-124 SBC and supports PMC I/O, dual Ethernet channels, and a USB 2.0, RS-232 and dual RS-422 ports. The MPMC-9350i features up to three Intel Core2 Duo-based DCP-1201 and 1201P SBCs. In addition to running Windows, the SCP/DCP-1201 runs both Solaris 10 and WindRiver GPP Linux 2.6 operating systems. Support for realtime applications using VxWorks 6.x OS is planned. Most configurations of the MPMC-9350p and MPMC-9350i are priced between $40K and $60K. Curtiss-Wright Controls Embedded Computing, Leesburg, VA. (613) 254-5112. [].

More efficiency and more flexibility: those are the watchwords when it comes to robust power supply subsystems. Feeding those desires, the Brick Business Unit of Vicor introduced an advanced modular power platform: the VI BRICK. The VI BRICK family incorporates the superior technical attributes of VI Chip technology and a robust packaging that facilitates thermal management and throughhole assembly. VI BRICK BCMs provide a highly efficient solution for Intermediate Bus Architecture or point-of-load (POL) designs that require multiple output voltages. They are available with nominal input voltages including 48 VDC (11 models) and high voltage up to 380 VDC (three models), and a wide array of output voltages from 1.5 to 48 VDC. The efficiency and compact size of these modules yields power density up to 390 W/in³. VI BRICK models are available in a base temperature grade of -40° to +100°C, operating, and -40° to +125°C, storage, with a slotted-flange baseplate and through-hole pin style. All modules of the VI BRICK family are RoHS-compliant and compatible with lead-free wave soldering processes. Pricing for modules of the VI BRICK family ranges from as low as $33 in OEM quantities. Vicor, Andover, MA. (978) 749-8359. [].

Digital-to-Synchro/ Resolver Converter Rides PC/104

Offering 16-bit resolution and 1 arc-minute accuracy provided at 1.2 VA output drive, North Atlantic Industries (NAI) has announced the availability of a 3-channel Digital-to-Synchro/Resolver Converter on a PC/104 card. The DSP-based 73DS2 includes up to three independent, transformer-isolated, programmable Synchro/Resolver simulation channels. Each channel has 16-bit resolution, ±1 arc-minute accuracy, and a short circuit protected output with 1.2 VA drive capability. The unit requires +5 VDC and ±12 VDC power supplies, and operates over a frequency range of 47 Hz to 10 KHz. The 73DS2 provides continuous background Built-In-Test (BIT) on all functions and channels, including reference and signal loss detection. The BIT is totally transparent to the user, requires no programming, and doesn’t interfere with the normal operation of the card. Each Digital-to-Synchro/Resolver Converter channel is self-calibrating, without requiring removal of the card. The 73DS2 PC/104 card is ideally suited for military and commercial programs, including airborne, shipboard, ground mobile and C3I applications. The 73DS2 is available with an operating temperature range of -40° to +80°C. Pricing for 100 pieces of the 73DS2 starts at $3,300 each. North Atlantic Industries, Bohemia, NY. (631) 567-1100. []. July 2008


Products&TECHNOLOGY Multicore Industrial Servers for PICMG 1.0-based PCI/ISA Apps

A range of 2U and 4U industrial servers brings Intel Core2 Duo processor performance to PICMG 1.0-based PCI/ISA applications. These longterm available, ultra quiet (<35 dB) industrial servers from Kontron are especially designed for applications that require high data processing performance without the need for highspeed PCI Express features. Designed around the Intel 945G chipset with 1066 MHz front side bus and Intel ICH7 I/O controller hub, the KISS PCI-759 industrial servers in various rack mount heights (2U and 4U) offer scalable processor performance based on the Intel LGA 755 socket up to the E6400 (2 x 2.16 GHz) Intel Core2 Duo processor. Support for up to 4 Gbytes of DDR2 dual channel RAM boosts performance even further. With a TDP of only 65 watts, the Intel Core2 Duo processor brings double the performance with power consumption similar to an Intel Pentium 4 processor. The KISS PCI759 servers are therefore the ideal choice for either upgrading existing applications or for implementing new, power-sensitive industrial PCI/ISA systems. Thanks to the flexible design and the backplane concept of the PICMG 1.x standard, servers can accommodate a large number and variety of PCI and/or ISA-based extension boards. Even if a PCIe card is required at a later date, the upgrade from PICMG 1.0 to PICMG 1.3 is easy: simply change the backplane, use a PICMG 1.3 SHB, design in the new PCIe card and leave everything else as it is. This concept makes PICMG 1.x one of the most future proof standards since upgrades can be carried out without producing sunk costs for previous investments. The KISS PCI759 industrial servers offer a range of I/O interfaces: up to 4 x 3 Gbit/s SATA II for fast hard drive access, 2 x GbE, 7 x USB 2.0, one parallel and two serial interfaces. Kontron also offers additional assemblies for LAN, WLAN and SCSI. The integrated Intel Graphics Media Accelerator (Intel GMA 950) supports VGA resolutions up to 2048x1536. There is also 24-bit LCDS via DVO that supports resolutions up to 1600x1200. The KISS systems come with either a desktop housing or a housing for mounting in a 19-inch cabinet. The lockable front panel offers IP5x protection. Designed for continuous operation, they are CE certified and UL suitable. The KISS PCI 759 industrial servers support Linux, Windows Vista and Windows XP software packages. Additional operating systems are possible on a project basis. Kontron, Poway, CA. (858) 677-0898. [].

GPS Receiver Climbs Aboard StackableUSB

The young but emerging StackableUSB technology ruggedizes USB in a compact form factor enabling the USB technology to move into harsh environments. Micro/sys’s USB1700 is the smallest StackableUSB Global Positioning System (GPS) receiver board on the market. At 1.85 x 1.78 inches, the USB1700 is one quarter the size of the PC/104 footprint. The USB1700 is RoHScompliant, operates from -40° to +85°C (ET version), and provides OEMs with 12-channel, WAAS-capable GPS functionality for space-sensitive applications. The USB1700’s compact form delivers proven performance for a new generation of position-enabled products with revolutionary technology for extremely fast startup times and high performance in foliage-canopy, multipath and urban-canyon environments. The board is shipped with a passive antenna included. A development kit that includes sample software and full documentation is free for new customers. Standard USB cables are also available for use with the PC attached version of the board. The basic USB1700 starts at $230 in single quantity. An extended temperature (-40° to +85°C) version is available. Micro/sys, Montrose, CA. (818) 244-4600. [].


July 2008

19-Inch Enclosures Feature Thermal Management

As processors get ever more powerful, power dissipation in the form of heat becomes a real challenge. Addressing that issue, a series of 19-inch and half-width desktop cases, 19-inch vertical and horizontal caseframes from Verotec offers outstanding versatility and thermal management. Available in 3U, 4U, 6U and 9U heights and depths of 322, 422, 522 and 622 mm, the Diplomat cases are equally

suitable for use during system development and as a housing for production status units. The caseframes provide direct mounting for Eurocard format PCBs in an easily configurable subrack system; the cases accept any standard 19-inch component. With power densities steadily increasing, effective ventilation is of paramount importance. All horizontal versions can be fitted with an optional 38 mm deep filtered ventilation plinth that replaces the standard base cover, allowing cool air to be drawn into the unit from below. The ventilation plinth increases air throughput and provides a uniform airflow across the full width of the unit. The cool air is drawn into the unit through a removable filter in the plinth, and is then directed through the active board area by a rear duct plate that blanks off the space behind the circuit boards. Verotec, Eastleigh, Hampshire, U.K. + 44 (0)2380 246900. [].

OEM Version of IP-Based Wireless Sensor Network Technology

A new family of OEM products allows integration of lowpower mesh networking directly into sensing/control devices. System integrators can embed the PhyNet wireless sensor network (WSN) technology from Arch Rock into their offerings, creating high-volume, low-footprint sensing and control solutions that are based on ubiquitous Internet standards and can be seamlessly folded into the enterprise IT infrastructure. A broad array of devices that were previously either “offline” or connected via wires, expensive and power-hungry cellular technology, or proprietary wireless mechanisms, can now become part of large, resilient and secure router-based wireless mesh networks, communicating via standard IP protocols over IEEE 802.15.4 low-power wireless radio.

4I72 "QUAD PC/104-PLUS to MINI-PCI/WIRELESS ADAPTER" Available without Feed-Through Connector

Your Embedded System Specialists. Mesa Electronics is a U.S. manufacturer of a wide range of cards for embedded systems and industrial use.

PC104 . PC104 Plus . PCI . PCI Express . USB . IDE Adapters Also available: application specialties in Networking, Motion Control, custom and Embedded designs, RoHS available. Sales Support: Technical Support:

PhyNet OEM Edition includes the embeddable PhyNet OEM module, which runs Arch Rock’s WSN software suite that includes an implementation of the IETF 6LoWPAN standard for IPv6 communication over low-power radio, high-performance mesh routing protocols, full TCP/UDP services, ICMP/DHCP management and embedded Web services. PhyNet OEM Edition is available in two versions. The PhyNet NP (Network Processor) Engine is targeted primarily at existing sensor environments where the devices possess computing intelligence but no wireless networking capability. Consisting of a hardware module running the Arch Rock software suite, the PhyNet NP Engine acts like a network interface card (NIC) and provides access to its functionality via a serial connection. The PhyNet IE (Integrated Execution) Engine is intended primarily for design into new sensor solutions, where integrators want to work in a single, shared hardware/software environment and create custom embedded applications that run directly on the Arch Rock engine. The PhyNet IE Engine consists of the same hardware module and networking software suite as the NP Engine, but also includes memory space for custom application development, as well as an application programming interface (API) rather than a serial connection. Arch Rock is also offering a PhyNet OEM Edition Development Kit for solution prototyping and testing of both the NP Engine and IE Engine products. The kit includes a PhyNet Server, a PhyNet Router, six development boards and software development tools. Users can set up a six-node working WSN mesh connected by the router to server-based management functions. The kit is priced at $4,995, with additional development boards available for $199 each. Arch Rock, San Francisco, CA. (415) 992-3735. [].

WANTED GMS V2P4 Atlas VME dual processor board. We have a program that has a serious need for one of these (or two if it helps the cause). The board we are looking for: • Must be functional • Mates with a 3 row backplane • Includes the P2 transition module If you can help us obtain one of these it will be our pleasure to compensate you for your efforts.

Please contact Wayne McLaren: (954)610-2061

July 2008 wanted_ad.indd 1


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Products&TECHNOLOGY 1 Gbyte Ethernet Controller in PC/104-Express Format

A 1 Gbyte LAN controller in the new PC/104 Express form factors addresses applications in high-speed networks and video transmission. The MSMGE104EX from DigitalLogic is based on an Intel 82573L PCI-Express network controller, supports data transmission speeds of 1000/100/10 Mbit/s and by means of the PCI Express bus (2.5 Gbytes/s) provides full utilization of the bandwidth of the 1 Gbyte network. For network access it is equipped with an RJ-45 port. Drivers are available for Windows and Linux. The card is connected to the PCI Express bus via a lane and requires an MSM945 CPU card. Both USB channels of the PCI/104 Express bus are connected to corresponding plugs. The MSMGE104EX has dimensions of 90 mm x 96 mm x 17 mm (W x L x H) and a weight of 120 grams. It requires a 5V/3.3V power supply and operates within the standard temperature range of -25°C to +70°C (1 Gbyte). The MTBF (mean time between failures) is specified with over 100,000 hours. For shipments of 100 units or more, Digital-Logic offers the MSMGE104EX at starting prices of 129.00 Euros per unit plus VAT. Digital-Logic, Luterbach, Switzerland. +41 (0)32/ 681 58 40. [].

Modular Line of Mobile Command Center Consoles

A new line of consoles, desk systems and enclosures for the mobile command and communications markets addresses applications in mobile communications/broadcast, battlefield command, law enforcement/HSS, emergency services, mobile labs and more. The Mobile infrastructure solutions from Optima EPS include full command centers down to cabinets geared for mobile applications. The command centers are based on the latest human engineering concepts and ergonomic designs to ensure optimum “usability.” Based on standard modules, the range can easily be modified to suit most applications and ensures optimum access to critical information in command and control environment. Optima’s full range of cabinet enclosures can be ruggedized for mobile applications. This provides a wide range of highly ruggedized, Mil-Spec, seismic, datacom, or cost-effective standard platforms to choose from.

600-Watt MicroTCA Power Modules for AC or DC Input

A series of compact, self-contained power solutions for MicroTCA systems is compliant with the PICMG MicroTCA.0 Revision 1.0 specification. The new MTC600 series power modules from Emerson Network Power are available in AC-input and DC-input versions. The MTC600 series MicroTCA power modules are high power density, single-width units; the AC-input MTC600-AC version is 12 HP high and the DC-input MTC600-48 version is 9 HP high. The MTC600-AC has an input range of 90 to 264V, making it suitable for use with single-phase supplies virtually anywhere in the world, while the MTC600-48 has an input range of -39.5 to -72V, which accommodates both -48V and -60V battery plants. Both versions of the MTC600 power module provide 16 output channels, each capable of delivering 12V @ 7.6A of payload power and 3.3V @ 150 mA of management power. This is sufficient for a complete MicroTCA system comprising up to 12 AdvancedMCs (AMCs), two MicroTCA Carrier Hubs (MCHs) and two Cooling Units (CUs). The MTC600 module automatically provides power for the MCH and CU system elements at power-up; all other MTC600 output channels are controlled by the carrier manager, which communicates via the power module’s built-in Intelligent Platform Management Interface (IPMI). All MTC600 series power modules support N+1 output redundancy and hot-swap operation; removing or adding a power module will not cause a fault or out-of-regulation condition. Furthermore, the power modules implement both module-level and channel-level fault isolation, which means that if one module develops a fault, it will not cause the other to shut down. The power modules meet EN55022 Class A conducted and radiated emissions standards, and comply with applicable EMC immunity standards, including EN61000-4-2, -3, -4, -5 and -6. The modules carry IEC 60950-1 safety approvals. Pricing starts at $865 for the MTC600-AC and $825 for the MTC600-48, in 100 piece quantities. Emerson, St. Louis, MO. (314) 553-2000. [].

The command centers come in versions including: single, two or three tier viewing levels to suit varying application requirements. Viewing levels and angles are designed to ensure operator comfort. Monitors can be supported on adjustable shelves and are dressed with custom Plexiglas front bezels to provide an attractive appearance for any brand of monitor. Optima’s console design permits peripheral equipment to be installed using standard EIA rack mounting rails that can support over 300 lbs of equipment. Highly ruggedized versions are optional. Pricing for basic configurations of Optima’s command centers starts at under $3,000 and varies widely depending on size and design needs. Optima EPS, Tucker, GA. (770) 496-4000. [].


July 2008

Fanless, Rugged Display Computer for Harsh and Mobile Applications

A fanless display computer that is both rugged and maintenance-free, combines the new Intel Atom processor with aluminium construction to provide a low-power, highly reliable computer that withstands the harsh environments found within many mobile, mission-critical and harsh applications. These include transportation, avionics, medical engineering and industrial automation. The DC1 from Men Micro features a total power dissipation of 20W, operates over an extended temperature range of -40° to +70°C and for 15 minutes up to +85°C according to railway standard EN 50155, class Tx. Because the control electronics are located directly behind the display, the DC1 employs conductive cooling between the electronics and the display, eliminating the need for a cooling fan. The DC1 enables variations in display resolution and size, processor type, I/O configuration and power supply, so users can tailor the system to specific applications. The DC1 comes standard with a 15” display with optional display sizes from 12” to 19” available as well as with a wide-range PSU from 9V to 36V or, optionally, 18V to 75V and 36V to 154V. The design is also tamper-proof to deter vandalism. An integrated Ethernet switch transfers signals from computer to computer. Remote upload of new display data is possible via optional wireless functions such as WIFI, WIMAX, GSM/GPRS and UMTS implemented via a MiniPCI Express card slot. As an option, the DC1 can also control a remote display with the same or different content via DVI-D. The DC1 is based on an Intel Atom processor with a frequency of up to 1.6 GHz, 1 Gbyte of working memory and a 4 Gbyte USBcontrolled flash Disk supply with enough capacity for every application. Standard I/O includes two USB ports, two Fast Ethernet ports and an optional UART port as well as binary inputs and can be optionally extended by HD Audio or IBIS field bus functionality. All components of the IP54-protected DC1 are soldered and only M12 or D-Sub I/O connectors are used. The electronics are prepared for coating to withstand humidity. Pricing for the DC1 is $3,132 for a single unit. Delivery is from stock ARO. MEN Micro, Ambler, PA., (215) 542-9575. [].

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Products&TECHNOLOGY High-Performance AdvancedTCA Processing Blade with 32 Cores

A new multicore ATCA processor blade is equipped with dual Cavium Octeontm Plus sixteen-core processors to enable network equipment to handle both data plane and control plane applications on the same hardware, improving the price/performance ratio and helping NEPs to focus on delivering new and differentiated services faster and more cost-effectively. The ATCA-9305 from Emerson Network Power achieves significant increases in packet and control processing capability along with advanced integrated hardware acceleration to make this second-generation blade useful for data plane elements in applications such as 4G/LTE wireless, WiMAX and IPTV. The blade also is appropriate for control plane applications, network gateway and edge functions, and security processing. In addition, the multicore technology built into the ATCA-9305 benefits both the customer and the environment by saving energy through increased application performance per watt compared to general-purpose blades. New features include reduced latency dynamic random access memory (RLDRAM), which enables the ATCA-9305 to be optimized for deep packet inspection in telecom networks, and the availability of onboard 10GbEthernet switch, which allows more flexibility as customers can select the routing of the data path. In addition, a PCI Express x4 port lane enables the design of a custom rear transition module (RTM) with storage.

4A Multi-Cell, Multi-Chemistry Battery Charger Controller

A fast-charge, high-efficiency switchmode battery charger controller capable of 4A for multiple battery chemistries minimizes power dissipation without compromising board space. The LTC4009 from Linear Technology supports Li-Ion/Polymer, NiMH, NiCd and sealed lead acid battery chemistries in multi-cell configurations. AC adapter current limiting maximizes the charge rate for a given fixed input power level, allowing the end product to operate at the same time the battery is charging without complex load management algorithms. The IC operates from input voltages up to 28V and is intended for applications including portable computers, portable instruments and battery backup systems.

Emerson Network Power, Tempe, AZ. (800) 759-1107. [].

Small Wireless Module Targets M2M Applications

An embedded serial-to-WiFi module connects embedded devices running machine-to-machine (M2M) applications to 802.11b/g wireless LANs with minimal programming. The Mini Socket iWiFi from Connect One is only 31x41 mm and the antenna connector is integrated onto the module extremely. Based on Connect One’s iChipSec CO2128 Internet Protocol (IP) communication controller chip, Mini Socket iWiFi includes a full suite of Internet protocols and applications, enabling immediate and full-featured connectivity for embedded solutions. Mini Socket iWiFi includes the latest wireless and SSL encryption algorithms and serves as a firewall, protecting the embedded application from the Internet. The Mini Socket iWiFi supports seamless roaming between access points. With several sleep modes and the ability for the host application to turn off WLAN, power requirements are kept to a minimum. In deep sleep mode, the Mini Socket WiFi’s power consumption is only 30 micro-amperes, allowing battery operated devices to use the module for extremely long periods of time. Designers do not need to significantly reprogram their applications to connect WLAN using the Mini Socket iWiFi. Driven by simple text commands, the Mini Socket iWiFi offloads the WiFi drivers, WPA supplicant, Internet security, networking protocols, and all communication tasks from the host application. This frees up host processing time and simplifies the wireless design process. As a coprocessor with remotely updateable firmware, new security or connectivity protocols do not require application redesign, increased memory or faster processor speed to meet future wireless demands. Mini Socket iWiFi supports 10 simultaneous TCP/UDP sockets; two listening TCP sockets; SMTP, MIME, POP3, FTP, Telnet and HTTP/HTTPS clients; an embedded Web server with a website for the host application and one for configuring the module; and SerialNet mode for serial-to-IP bridging. Mini Socket iWiFi supports 64/128-bit WEP, WPA1 and WPA2 encryption, AES-128/256, SHA-128/192/256, 3DES; the SSL3/TLS1 protocol for a secure client socket session and a secure FTP session. The module operates at an industrial temperature range of -40° to 85°C (-40° to 185°F) and is RoHS-compliant. Pricing starts at $59. Connect One, San Jose, CA. (408) 572-5674. [].


July 2008

Final float voltage accuracy is specified at ±0.5% and charge current is programmable with accuracy of ±4%. The LTC4009’s quasiconstant frequency PWM architecture guarantees no audible noise operation and minimizes filtering needs, while the high operating frequency of 550 kHz allows the use of small inductors and capacitors. The LTC4009 consumes <20 uA in shutdown, increasing battery runtime in portable applications. For safety and autonomous charge control, the IC includes battery float voltage over-voltage protection, reverse charge current protection, charge current monitoring, soft start, ac adapter present indication, and current limit indication. The LTC4009 is guaranteed for operation from 0° to 85°C ambient temperature. Pricing starts at $2.95 each in 1,000-piece quantities. Linear Technology, Milpitas, CA. (408) 432-1900. [].

PMC Carrier Cards Provide I/O Expansion for 3U CompactPCI Systems

New AcPC4610 Carrier Cards provide an easy and low-cost solution to expand the use of PMC mezzanine modules in 3U CompactPCI computer systems. The carrier cards act simply as an adapter to route PCI bus signals to and from the PMC module through the CompactPCI card slot edge connector. A PLX Technology PCI6540 bridge device provides a transparent 32-bit 33/66 MHz PCI/PCI bridge for data transactions from the PCI bus (system host) to the PMC site. Two models are available for air-cooled (-40° to 85°C range) or conduction-cooled applications. All Acromag PMC modules and those from other vendors are compatible. 3.3V and 5V DC signaling are supported. Front and rear-panel access to field I/O signals are accommodated. The air-cooled carrier card has a front panel cut-out providing access to a PMC module’s front I/O connector. Alternatively, all I/O signals can be routed through the carrier card’s rear J2 connector. An air-cooled rear transition board, Acromag Model TRANS-C4610, is available to map the field I/O on the PMC module to the rear of the CompactPCI card cage. The conduction-cooled model employs a heat frame with wedge-locks and thermo bars for use in applications where ambient or forced air can’t provide adequate cooling. This unit is designed to meet ANSI/VITA-47 Environmental Class ECC4 standards and is ideal for airborne systems, deployment in battleground equipment, and other situations with advanced thermal management requirements. Field I/O signals are routed through the carrier card’s rear J2 connector. The carrier cards start at $600. Acromag, Wixom, MI. (248) 295-0310. [].

Rugged XMC Mezzanine Card Offers Choice of Three Xilinx Virtex-5 FPGAs

An XMC mezzanine card lets developers choose from a selection of three Xilinx Virtex-5 FPGAs in response to the growing importance of FPGA technology to military and aerospace customers. The XMCV5 from GE Fanuc Intelligent Platforms is designed for a wide spectrum of digital signal processing (DSP) applications in ground mobile, airborne fixed- and rotary wing and naval applications including radar, sonar, signals intelligence (SIGINT) and image processing. In demanding signal processing applications, many customers are turning to FPGA technology because of the flexibility and performance it brings. The XMCV5 gives customers the flexibility to strike the right balance between hardware-oriented FPGA-based computing and software-based application code running on either PowerPC- or Intel-based platforms as part of a solution based on a range of rugged single board computers, carrier cards, multiprocessors and sensor I/O products. Available in five ruggedization levels—allowing for deployment in the harshest environments—the XMCV5 is the first rugged XMC to harness the power and flexibility of all three Virtex-5 FPGA families with build options for the Virtex-5 FX100T, SX95T and Virtex-5 LX110T, enabling customers to field the right solution with this leadingedge COTS platform. It can be mounted on a broad range of GE Fanuc Intelligent Platforms 3U and 6U single board computers (SBCs), including the VMEbus PPC9A and VPX SBCs such as SBC610 and SBC310. It is compliant with the VITA-42 XMC mezzanine card base standard, and is available in both VITA 42.3 (PCIe) and VITA 42.2 (Serial RapidIO) configurations. The XMCV5 is available in a range of configurations for rugged air-cooled systems as well as in conductioncooled form factors. GE Fanuc Intelligent Platforms, Charlottesville, VA. (800) 368-2738. [].

32-Channel VME Analog Output Cards Feature High Output Current

Two new VME analog output cards provide high-current analog voltage output in a 6U form factor. The VME boards from Precision Analog Systems are the PAS 9915/AO, which provides 32 twelve-bit analog voltage output channels, and the higher-power PAS 9912/AO, which provides eight twelve-bit analog output channels. Eight, quad high-speed voltage output DACs, with 10 uSec settling times provide the PAS 9915/AO with a total of 32 analog output channels. Voltage output signals on both cards are available on the a and c rows of the P2 connector. For the PAS 9915/AO, four analog output ranges are available under program control, which allows the card’s output voltage to be tailored to your application. Bipolar ranges from +/- 10 volts to +/- 5 volts and unipolar ranges from 0 to 10 volts to 0 to 5 volts are supported. All output ranges provide a minimum of 10 milliamps of output current, double what is typically offered on an output card. The eight-channel high-power version, the PAS 9912/AO, provides +/- 40 mAmp output drive capability and is available in +/- 25 volt and +/- 15 volt versions. Eight high-power operational amplifiers buffer the DAC output signals and provide a gain of either 1.5 or 2.5, depending on ordering option. Both cards support A16, A24, or A32 addressing, and data writes of 16 or 32 bits. External synchronization signals can be connected to the P2 connector through jumper plugs, if required. Additional features include board identifier registers, control and status register, and DAC loop back registers. The PAS 9915/AO and PAS 9912/AO are designed for long-term availability and can be customized for your application. Both boards are priced at about $1,600 in 100-piece quantities. Precision Analog Systems, Plantation, FL. (954) 587-0668. []. July 2008


Products&TECHNOLOGY Server-Class AMC Card Provides High-Density, Low-Power 64-bit x86 Dual-Core Computing

A single-width, mid-size AdvancedMC processor module combines a dual-core 64-bit low-power processor and server-class integrated 3100 chipset to optimize power consumption, computing power and I/O bandwidth. The AMC-1000 from Adlink Technology combines dual Gigabit Ethernet links, flexible PCI-E x8 bandwidth and a UXGA high-color analog display. It provides AdvancedTCA and MicroTCATM adopters with flexible, high-speed data transport configurations that are ideal for the communications, military, medical and industrial automation markets. The AMC-1000 features a 64-bit Intel CoreTM2 Duo 1.5 GHz processor with 4 Mbyte L2 cache and 667 MHz Front Side Bus. Its dual-core architecture offers advanced processing speed while addressing the power and heat constraints of the mid-size AMC form factor. The Intel 3100 chipset combines server-class memory and I/O controller functions into a single component, providing low-latency, high-throughput data transfer capability without CPU intervention. Specifically optimized for embedded communication applications requiring high bandwidth, the AMC-1000 is built with an industry standard DDR2-400 SO-RDIM socket that supports up to 4 Gbyte system memory with ECC protection. Features such as a soldered down 4 Gbyte USB interface NAND flash, an onboard PLX PEX8508 PCI Express switch and an ATI ES 1000 graphics controller, make the AMC-1000 an optimum choice for various applications on AdvancedTCA or MicroTCATM platforms. The AMC-1000 supports eight AMC.1 PCI Express lanes, which can be configured as two x4 or eight x1 PCI Express ports. It also supports two Gigabit Ethernet SerDes ports compliant to AMC.2 E2. In addition, two SATA v1 .0 ports compliant to AMC.3 S2 SATA support offboard storage. Supported operating systems include Windows XP Professional, XP Embedded, Server 2003, feature Pack 2007 and RedHat Enterprise Linux.

Server-Class 3U CompactPCI Core 2 Duo Processor Blades Fit Harsh Environments

A high-reliability 3U CompactPCI CPU blade combines energy-efficient computing with dual-core and server-class chipset performance and gigabit connectivity in a rugged design to meet the demands of nextgeneration transportation, defense electronics and industrial automation platforms. The cPCI-3 920 from Adlink Technology is available in 4HP(cPCI-3920A) and 8HP (cPCI3920B) cPCI form factors, as well as an RTM configuration (cPCI-R3920T). The new CPU blade supports Intel Core2 Duo, Core Duo and Celeron M processors in an FC-BGA package. In addition, it leverages advanced DDR2 architecture, with soldered register and ECC memory at 400 MHz for up to 2 Gbytes. These innovations enhance system response and offer optimized performance while complying with the industry’s power-saving measures.

ADLINK, Irvine, CA. (949) 423-2354. [].

Multiphase Step-Up DC/DC Controller Delivers High Power

A 2-phase step-up (boost) DC/DC controller delivers high output power in a compact footprint. With the LTC3862 from Linear Technology, up to 12 power stages can be paralleled and clocked out-of-phase to minimize input and output filtering requirements. The 4V to 36V input voltage ranges and a wide range of output voltages that are dependent on the choice of external components cover a broad range of high power boost applications. The LTC3862 can regulate a 48V at 5A output with up to 97% efficiency from an input source ranging from 12V to 36V using only two-phases. Applications include high power audio amplifiers, automotive fuel injection systems, networking and industrial power supplies. Multiphase operation is enabled using the SYNC input, CLOCK output and PHASEMODE control pin, allowing 2-, 3-, 4-, 6- or 12-phase operation. The LTC3862 utilizes peak current mode architecture for easy loop compensation and multiphase operation with phase-to-phase current matching. The fixed operating frequency can be set with a single resistor over a 75 kHz to 500 kHz range or can be synchronized to an external clock using the internal phased-lock-loop over a 50 kHz to 600 kHz frequency range. A current sense resistor is used in each phase to provide a precise cycle-by-cycle current limit. The onboard CMOS gate drivers minimize switching losses and allow the use of multiple MOSFETs in parallel for even higher current applications. The LTC3862 is offered in a narrow SSOP-24 and 5 mm x 5 mm QFN-24 package. Three temperature grades are available with commercial grade operation from -40° to 85°C, an industrial range from -40° to 125°C, and a high temp automotive range of -40° to 150°C. The 1,000-piece price starts at $3.29 each. Linear Technology, Milpitas, CA. 408) 432-1900. [].


July 2008

Optimized for stability and packaged in a rugged format, the cPCI-3 920 is built to withstand even harsh environments. Featuring dual PCI Express Gigabit Ethernet ports, configurable to front panel or RTM by software, the blades are equipped to provide both reliable network connectivity and superior remote management capabilities. For added flexibility, the cPCI-3920 also accommodates four COM ports; up to five, front-panel USB 2.0 ports; a front-panel VGA port; and PS/2 mouse and keyboard ports. With multiple storage options to meet a wide range of customer requirements, the cPCI-3 920 offers a pin header and mounting space within 4HP form factor for an onboard USB NAND flash disk with up to 8 Gbytes of memory, and one Serial ATA interface with mounting space for a 2.5-inch hard disk drive in the 8HP form factor. The RTM model is also designed with three ports for external 2.5inch or 3.5-inch SATA drives. The cPCI-3920 supports Microsoft Windows, Linux Kernel 2.6 and VxWorks 6.6 operating systems. ADLINK, Irvine, CA. (949) 423-2354. [ ].


C OTS MicroTCA Chassis for Low-Cost Connectivity Solution

Your product

Targeted for applications in VoIP nodes, modular telco line units, Wi-Fi and Wi-Max radio boxes, Ethernet hubs and fiber-to-the-curb optical network units, the 650 Series MicroTCA chassis from Carlo Gavazzi Computing Solutions is engineered to be an economical connectivity solution. Thanks to an innovative power supply configuration, the 650 Series is available for half the cost of comparable products. The 650 Series, offered in a 2U 19-inch rack mount configuration, features a single 6HP MicroTCA Carrier Hub and a 12-node backplane. The backplane supports a range of customizable configurations for full- and half-height Advanced Mezzanine Card (AMC) slots. Designed to include a low-cost power supply, the 650 Series offers a single fixed, rear-mount MicroTCA power controller. The forced evacuation and pressurization cooling design manages temperature with eight fans for up to 40 watts per AMC slot. The 650 Series MicroTCA chassis is available beginning at $2,500.


Standard & custom designs Extended temp. conduction or convection cooled SBCs Fast, flexible, reliable

Carlo Gavazzi Computing Solutions, Brockton, MA. (800) 926-8722. [].

Rugged Conduction-Cooled Dual-Core CompactPCI CPU Boards

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July 2008


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Comment JULY 2008

Embedded Market Grows Despite Soft Economy


mid cries of “the sky is falling,” and as the stock market plummets, shares of General Motors fall to a 54-year low, and the price of crude oil tops $142 a barrel, the embedded-computer market is chugging along if not on all cylinders, at least on most. Thanks at least in part to the dramatic explosion of new applications driven by the new breed of low-power processors, the embedded-computer business continues to grow at better than a 4% rate year over year. At least part of that growth is fueled by the VME community (VSO-standards-based boards), which continues to grow at about a 5% rate primarily in military and aerospace applications. At the lower-growth end of the spectrum are some of the more mature bus-based products, such as CompactPCI, which continue to struggle in sympathy with the communications infrastructure providers such as Lucent-Alcatel and Nortel. ATCA has failed to meet some of the more optimistic forecasts, however, it continues to grow and could reach an estimated $300 million in sales by year end. MicroTCA continues to struggle to get off the ground with prognosticators now predicting that it will finally get a solid foothold in 2009. Many predict that the new breed of communications infrastructure systems will be based on MicroTCA, and that all of the 3G and 4G phone service serving a variety of cell-phone and Wi-Fi applications will take advantage of the new, robust specification. And finally, small form factor boards continue their ascendancy driven by new processors from Intel, AMD, VIA, soon-to-be Sun Microsystems and others. In addition to processors, some companies such as VIA are making available reference platforms and mini-pc designs that are being co-opted for embedded machines. The latest of these is VIA’s Mini-ITX 2.0, a next-generation platform for a variety of applications. While the platform is designed for multimedia and general computing in small form factor desktop machines, it is equally adaptable to embedded computers. Taking an even higher view, Longbow Research, which reports on trends in PCBs, says fabricators reported flattish demand trends compared with up-beat estimates at the beginning of the month. Those with greatest exposure in the military, medical and industrial control markets (embedded computers) report stable demands with mixed results from those in the semiconductor and


July 2008

automotive markets. PCBs, of course, are the beginning of the food chain in the board-level embedded market. Are there changes in the offing? Many providers of PCBs were notified by laminate and chemical suppliers that higher prices were on the way. Dow Chemical, for example, a manufacturer of resin, and Nittobo who makes glass yarn, have both raised prices to significantly increase laminate costs. And a quick look in the national media shows raw material prices skyrocketing as costs for transportation combine with raw component costs to drive prices higher. More on the impact of rising commodity prices next month.

AMD, Intel Fight the Battle of the Laptops

AMD and Intel continue to fight in the courts and out. The latest salvo is for the giant’s share of the laptop market. Intel is betting on buying the bottom of the market with its Atom family of chips, which the company is betting will propel a rash of $200 to $350 laptops. And while these laptops may not be in the embedded space yet, expect much of the technology for low-price, compact and low-power devices to migrate to embedded applications. For its part, AMD is betting on the high road, trying to make its $5.4 billion acquisition of ATI Technologies pay off. AMD is planning to push its latest Turion chip along with a new chipset based on ATI’s technology with built-in graphics circuitry. Intel, with its Centrino processor, claims the biggest market share boasting some 85.5% in the first quarter while AMD claims only 14.5%. And, in court, the Intel/AMD court date has been pushed back and could well drag on into 2010. The trial date for the antitrust suit against Intel was moved out to February 2010 from April 2009, as the combatants fight with a mountain of potential evidence and long list of witnesses to interview. The suit filed by AMD in 2005 is expected to generate the most documents of any civil case in U.S. history. But Intel still isn’t free and clear. Its sales practices already under fire in Europe and Asia have now gone to the FTC for a formal inquiry. Intel received a civil subpoena to look at pricing and sales rebates. The subpoena forces Intel to comply with the investigation rather than simply voluntary cooperation. This is on top of the Korean Trade Commission fining the company 26 billion won ($25.4 million) for violating that country’s antitrust laws.

Not Just for Graphics Anymore

Intel’s X86 architecture has been a staple for supercomputers but may soon be challenged by new chips initially designed as graphics engines, but with teraflop performance that may beat out traditional approaches. The new graphics chips from Nvidia and from AMD (from its ATI acquisition) have the raw processing power to make a major difference, according to some. However not everyone is jumping on the bandwagon. Such an approach can get waylaid because of the difficulty in writing the software. And there is a difference in the philosophy between Nvidia and AMD. Nvidia is pushing for extreme performance on a single chip such as its latest entry that has 240 processors on board using 1.4 billion transistors. A graphics card containing the chip and costing $649 comes in just below a teraflop in performance. AMD for its part is looking to smaller, less expensive chips with less power dissipation. The latest chip in its Radeon GPU line introduced this month will boast 75% the performance at about one third the price of Nvidia’s offering. Two AMD chips working together will top the teraflop number.

Really Cool

Silicon makers have long been working to stack chips to minimize delays getting on and off chip and traveling along traces and vias. However, while stacked approaches have been used experimentally, one of the big problems is that there is no easy way to dissipate the heat generated by the stacked chips. Now, IBM scientists in the company’s Zurich lab have developed a way to liquid cool chips by pumping water through tiny channels (as thin as a human hair) embedded within the chips. In the past, the big challenge has been to insulate the water from the signals. The experiment comprised piping water through a horizontal test structure. The cooling layer is only about 100 microns in height and is packed with 10,000 vias connecting the chips above and below.

RoHS Update

Thanks for all the cards and letters so far supporting my position on leaded soldering. While we’re still a ways away from getting everyone together and taking a stance, many continue to express concern. One reader writes: “I read your article on the RoHS debacle in the May issue of RTC and would like to offer one comment concerning the possibility of going back to the old Mil-Spec ways of qualifying product. He continues; “Well those days are back. The Aerospace Corp in conjunction with DSCC, NASA and other industry groups have begun to impose new (old) requirements for the insertion of “new technologies. Specifically, The Aerospace Corp. has issued two Technical Operation Review documents that address the criteria for parts, materials and processes used for the integrated and coordinated management of the selection of parts, materials and processes for Space Programs. In addition, Mil-PRF-38535, Rev H, as well as other specs address aspects of the qualifying requirements for new technology like the issues with RoHS.” I’m afraid it’s going to be a dark day for military and aerospace technology if we take away commercial parts that 1) enjoy low costs because of economies of scale, and 2) have the latest technological developments paid for by the commercial sector.

Part of the Perry initiative (see RTC May 2008 pp 65) was to ease the implementation of commercial technology into the military. In other RoHS news, the Öko Institut was contracted by the European Union Commission to study the inclusion of additional hazardous substances in electrical and electronic equipment under the RoHS directive. Surprise: it recommended several substances be added to the list including Tetrabromobisphenol A (TBBPA), the flame retardant used to protect more than 80% of PCBs. In addition, it recommended banning HBCDDs, several phthalate plasticizers and all organic compounds containing chlorine and bromine. Fighting back, IPC, a global trade association (www.ipc. org), “is concerned that Öko Institut’s recommendations are arbitrary and lack a sound scientific basis.” Fern Abrams, IPC’s director of government relations and government policy, said such recommendations, if implemented, could have a significant negative impact on member manufacturers.

Briefs and Headlines:

Last issue we commented that Harris Corp. was looking to put itself on the block after seeing Finmeccanica agree to buy DRS for some $5.2 billion. However, failing to find a bidder willing to up the ante to the $75 to $80 a share, Harris’ board decided to remain independent. Nortel Takes On Cisco was a recent headline in The Wall Street Journal. The comment is that Nortel, with just 4% of the market for office communications networks, is going directly after Cisco’s dominant share. It has dramatically stepped up its marketing efforts enough to be noticed by Cisco. We’ll be keeping our eyes open. Nortel has recently been a supporter of open systems. Intel spins off solar-panel unit, SpectraWatt. An internal group at Intel that has been working on solar-panel technology is being spun off into a new company, SpectraWatt. With energy in the news today, it’s not surprising companies are aggressively going after the market. Applied Materials is branching out, making equipment for solar cells, and Cypress Semiconductor spun off SunPower not too long ago and it now has a capitalization of $7 billion. Where is the saturation point for photovoltaic cells? Themis Computers is making the big time by offering an IBM Blade for the company’s BladeCenter chassis using Sun’s UltraSparec T2 processor. The blade will be available next month starting at $15,000. Themis has been well known for its VME and CompactPCI boards sporting Sun’s processors—and has now moved up to IBM. Who’s next? HP? Dell? Congratulations Themis.

Warren Andrews Associate Publisher July 2008


is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

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End of Article

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July 2008

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