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+ The magazine of record for the embedded computing industry

April 2008


Focused Treatment


Brand New Column

Small Form Factor Forum

An RTC Group Publication

FPGAs Give Boards Multiple Personalities Protect Your M2M Systems from the Internet Lock Down Embedded Security with Virtualization

FAST-FORWARD YOUR MASTERPIECE. Get your next big idea to market—faster. The built-in tools and technologies in Windows ® Embedded help to accelerate development, so your teams get to put their efforts where they really count: creating the next generation of smart, connected devices. You also get Windows Embedded features that enable interoperability with industry standards and Microsoft® technologies, so you can build devices that easily connect to PCs, services, servers, and other devices. Learn more about how to fast-forward device development at:

GE Fanuc Intelligent Platforms

Long live ATX! Long Term Availability & Configuration Control options extend the life of your system. These days, one year is a long time in the life of a computer board. Five years is a lifetime. In fact, the production life of some ATX boards is measured in months, not years. In systems that will stay in service for decades, this is a serious problem. So it’s quite comforting to know that GE Fanuc Intelligent Platforms will guarantee the availability of selected small form factors like ATX for up to five years.

When you combine our optional Long Term Availability program with our Version Control option, you won’t need to re-qualify these platforms, which can substantially reduce your total cost of ownership. It’s our way of wishing you and your ATX-based system a long and happy life.

© 2008 GE Fanuc Intelligent Platforms, Inc. All rights reserved.



Focused Treatment


46 Wireless Sensor Network Offers Internet-Like Scalability

47 Rugged 6U VXS/VITA41 DSP Board Teams FPGAs with DSPs


51 Multiview Display Does 1920x1080p HD

APRIL 2008


Technology in Context

Industry Insight

FPGA-Based Board Solutions

Medical Applications

8 16 Insider 11Industry Latest Developments in the Embedded FPGA-Based Board Solutions: Marketplace One Platform, Many Apps 20 Small Form Factor Forum 14Small Form Factors Put the Squeeze on Chip Vendors Editorial They’re Sproutin’ Up Like Mushrooms!

FPGAs Are Everywhere – In Design, Test & Control Wayne Marx, Xilinx and Vineet Aggarwal, National Instruments

Neil Harold, Nallatech

Solutions Engineering


Products & Technology Newest Embedded Technology Used by Industry Leaders


News, Views and Comment Consolidation Going Smaller

Machine-to-Machine Your Embedded Application from the Internet 24 Protecting Ariel Shulman, Connect One

Help Bring the Hospital Home 30nvSRAMs Chris Gilbert, Simtek

System Integration 10 Gigabit Ethernet Gigabit Ethernet: Integrating a Protocol into High-Speed 3410Standard Real-Time Systems Rob Kraft, AdvancedIO

Industry Watch Multicore

Virtualization Meets Embedded Security 40Microkernel-Based Challenges Gernot Heiser, Open Kernel Labs

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April 2008

APRIL 2008 Publisher PRESIDENT John Reardon, johnr@r EDITORIAL DIRECTOR/ASSOCIATE PUBLISHER Warren Andrews, warrena@r

Editorial EDITOR-IN - CHIEF Tom Williams, tomw@r CONTRIBUTING EDITORS: Colin McCracken and Paul Rosenfeld MANAGING EDITOR Marina Tringali, marinat@r COPY EDITOR Rochelle Cohn

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APRIL 2008

They’re Sproutin’ Up Like Mushrooms! by Tom Williams, Editor-in-Chief


t might be difficult to claim that a number like four or five constitutes a “plethora,”but it may constitute a “harbinger.” Of course I’m talking about small form factor modules. Fairly recently we’ve seen some new ones appear; the use of available small form factors is increasing exponentially and there are new ideas appearing in the form of EPIC, COM Express, Nano ITX, Pico ITX and more recently CoreExpress and Qseven. This list is by no means meant to be complete—merely representative. The obvious first question that comes to mind is, “What’s going on here?” Well, there appears to be a wave of innovation happening, which usually signals that there is technology available to fill as-yet unsatisfied needs. Ideas are a-flyin’ at how best to address those needs, which generally call for increased intelligence in ever smaller devices that are mobile, low power and compact. The enabling technology, of course, is the silicon, which has gotten smaller and able to operate at needed performance levels with much less power consumption and heat dissipation. This, combined with the advent of high-speed serial interconnects, has moved this new generation of small form factor modules away from a bus architecture. That is being replaced with a paradigm where a very small CPU card consisting of processor, chipset, memory and some peripheral chips uses a single connector to interface with an I/O carrier or subsystem specifically designed for the application. That connector carries a combination of things like PCI Express, SATA, LVDS, USB, Ethernet and more. As long as you get the I/O you need and the processor performance, the actual size and shape of the board is less important as long as it meets the space requirements. And there are different connector types for the different form factors: CoreExpress is different from COM Express while Qseven is different from both, being an edge connector.

April 2008

So, given all this, are we throwing the idea of standards to the wind? The answer is we’d better not be. It does appear to be somewhat looser than the old world of bus-based architectures. Cards do not have to adhere to a rigid size to fit into a chassis. Connectors can be tailored to the needs of a class of applications and need only supply the required set of signals to the I/O subsystem. The signals (PCIe, USB, etc.) are of course standards in their own right. But lest this supposed freedom go too far to our heads, let us remember the more mundane considerations of second sourcing and end-of-life issues. If a company is willing to risk going it alone, there isn’t and never was anything to stop it. But if we want to assure continuity and peace of mind we do need standards. At this point, we actually have some in the small form factor arena, and there will be others. That does not mean there will be calm and serenity right away—there are too many creative ideas out there for that. There will be excitement and some uncertainty and then, as always happens, there will be a shakeout. All in all it will be an interesting time. We will be bringing you all the developments here in RTC both in our regular coverage and in a brand new column that starts with this issue—called the Small Form Factor Forum or sF3, and written by two of the most experienced industry experts in this area: Colin McCracken and Paul Rosenfeld, both of whom hail from the beginnings of PC/104 and whose resumes read like a roadmap of the evolution of small form factors for embedded systems. They will be bringing insight and a unique perspective to a development that is now one of the most dynamic areas of our industry and we welcome them and invite your interest and feedback. Welcome Colin and Paul and SF3!

IndustryInsider APRIL 2008

Qseven: Another New Form Factor for Next-Generation Embedded Computing Targeting next-generation embedded processors built using 45 nm technology, a new small form factor called Qseven will complement the low power and small size of these processors. By exploiting the small form factor of the industry’s latest processors, the Qseven format offers highperformance computing power, delivered in a board measuring just 70 mm x 70 mm. Created by Congatec and Seco, the Qseven platform has been developed to allow various processor configurations to maximize passive cooling technology. With a maximum power consumption of around 12W specified in the proposed standard, the new form factor is expected to appeal to manufacturers of applications that require fanless operation. Where heat dissipation is an issue, a thermal cooling interface has been defined to help transfer any heat generated to a cooling solution. It will also provide extensive connectivity through industry standard interfaces, including: 4x PCI Express; 2x SATA; 6x USB 2.0; 1x 1000BaseT Ethernet; 2x SDIO 8-bit; LVDS 2x 24-bit; DVO/ Get Connected with technology and SDVO (shared); VIP (Video Input Port); HDA (High Definition Audio); I²C Bus; LPC (Low Pin Count companies providing solutions now Bus). The form factor offers great flexibility in configuration. By leveraging the Mobile PCI Express Get Connected is a new resource for further exploration Module (MXM) connector format, Qseven offers three different connector heights, from 4.3 mm to into products, technologies and companies. Whether your goal is to configuration research the latestitdatasheet fromthe a company, speak directly will be as simple to integrate 7.8 mm. Through this is hoped Qseven platform with an Application as a DIMM memory module.Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Typical applications include / DIN Rail Systems, Automotive, and anywhere an Whichever levelwill of service youAutomation require for whatever type of technology, ultra mobile embedded computing system is required. Congatec and Seco are extending an invitaGet Connected will help you connect with the companies and products you are to searching for. open consortium and plan to release a general specification by the tion to all vendors join its end of April, with a full Design Guide available by May 2008.

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Continuous Computing Selects GoAhead SAFfire for FlexTCA System

Continuous Computing has teamed with GoAhead Software to integrate GoAhead’s SAFfire middleware to ensure an open standards-based approach to availability and management within the Continuous FlexTCA System. This fully integrated, application-ready platform allows customers to focus on delivering application-specific value supported by the system. The end result is that telecom equipment manufacturers can get to market nally designed to be powered by amount of $20 million. The relSmall Form Factor SIG faster and more affordably with Via’s low-power, x86-compatible evant Share Purchase AgreeAdopts Via’s Pico-ITX reduced project risk and comprocessor platforms such as the ments have been executed by and Specification Get Connected technology companies solutions now International, plexity. GoAhead SAFfire was seViawith C7 or the Edenand processor and providing between Adlink The Small FormGet Factor Spe- is a new resource for further exploration into products, technologies and companies. Whether lected Connected your goal to research the latest asisthe most comprehensive based around one of Via’s digital a 100% holding subsidiary of cial Interest Groupdatasheet (SFF-SIG), from a company, with an Application or jump to athe company's technical page, goal of Get Connected put you implementation of theis to Service mediaspeak IGPdirectly chipsets, which com-Engineer, Adlink and shareholders of the touch with the right resource. Whichever level of service you require for whatever type of technology, which is leading ainbroad indusAvailability Forum (SA Forum) bine core logic, multimedia, conAmpro today, and the closing is Getand Connected try effort to create promotewill help you connect with the companies and products you are searching for. Application Interface Specificanectivity and storage on a single expected to take place upon the standards for tiny computer and tion (AIS). chip. The world is now moving completion of specified condicontroller boards and modules, This integrated solution more in that direction with other tions. has announced that Via Technoljointly developed by GoAhead semiconductor manufacturers The acquisition by Adlink of ogies, Inc. has agreed to transfer and Continuous Computing inhopping on the low-power bandAmpro mainly focuses on Amthe Pico-ITX specification to the cludes validated capabilities wagon, and a form factor such as pro‘s excellent capability of deSIG for the purpose of creating such as platform management Pico-ITX will be more in demand sign, R&D and manufacturing in an official governing standard. In and comprehensive high availas that trend accelerates. embedded computing especially return, the SFF-SIG will draft a ability and system management. in the ruggedized sector, and in formal specification document This functionality is achieved via hope of consolidating the comand promote it with the goal of support of AIS functionality such petitive edge of the two parties Adlink Technology broadening the number of supplias the Availability Management for a win-win situation: Ampro‘s to Acquire 100% ers and customers who build and Framework, Cluster MemberU.S. sales channels, customer serShareholding of Ampro purchase Pico-ITX-compatible Get Connected with companies and ship Service, Checkpoint Service, vices and logistic centers can help Get Connected Computer singleproducts board featured computers (SBCs). in this section. with companies mentioned in thisEvent article. Service, Message Service, to increase Adlink‘s U.S. sales of Adlink Technology has anThe SFF-SIG intends to have a Log Service and Notification embedded computing products. nounced it will acquire 100% published specification within Service. Additional key features In addition, with the assistance shareholding of Ampro Computer several months. include resource discovery and Inc.  Adlink will acquire a total With a form factor of 10 cm of 39,743,137 common shares in x 7.2 cm, Pico-ITX is just half the Get Connected with companies mentioned in this article. Ampro with a total investment area of Nano-ITX. It was Get Connected with companies and products featured in this section.


End of Article

April 2008


Industry Insider



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April 2008

system model instantiation, shelf manager integration and integration with Continuous Computing systems management capabilities. This functionality is realized through the use of the SA Forum Hardware Platform Interface (HPI).

Curtiss-Wright Acquires Business/Assets of Pentland Systems

Curtiss-Wright Controls Embedded Computing has announced that it has acquired the business and assets of Pentland Systems Ltd., Livingston, Scotland, UK, a supplier of rugged signal acquisition solutions. The purchase is intended to enhance Curtiss-Wright’s sensor processing product portfolio adding RF/IF signal acquisition, analog, digital I/O and synchro/resolver products for radar, software defined radio (SDR) and signal intelligence applications. Pentland’s products and technology will be organized under Curtiss-Wright Controls Embedded Computing’s Modular Solutions group, and will be managed by Rob Hoyecki, Director of the Digital Signal Processing Division. The acquisition of Pentland’s business and assets also strengthens Curtiss-Wright’s presence in the UK and European markets, adding to their existing video and integration business unit located in Letchworth, UK. This expanded presence will increase CurtissWright’s profile and accessibility as a supplier of advanced rugged deployed boards and subsystems for UK and European customers.

Diamond and Kontron Team to Bring COM Modules to I/O-Intensive Markets

Diamond Systems and Kontron have announced a strategic partnership to deliver high-integration single board solutions using Kontron ETX modules with Diamond Systems off-the-shelf

and custom I/O-intensive carrier boards. As a cornerstone of the agreement, Diamond Systems will develop and produce carrier boards to meet the unique requirements of embedded designs requiring analog and/or digital I/O, extensive serial communications and/or wide-ranging DC power input. Diamond Systems will then select from a wide performance range of Kontron Computer-on-Module (COM) CPU offerings to deliver complete yet flexible, fully integrated solutions to the customer. Kontron will promote and fully support Diamond Systems by sharing and jointly pursuing sales opportunities, and by providing special support and marketing programs. Diamond Systems will retain primary customer support responsibilities. This announcement enables Diamond Systems to offer OEMs access to superb CPU technology coupled with the best-in-class analog and digital I/O technology. OEMs and system integrators around the world who build applications in automation, data acquisition, medical, military, transportation and instrumentation markets now have a unique choice in Diamond Systems for performance flexibility and obsolescence mitigation without having to manage multiple suppliers for carrier board design, contract manufacturing and off-the-shelf CPU modules. Diamond Systems’ unique Universal Driver programming software for Linux, Windows XP and CE, and QNX operating systems is available to all carrier board customers. This driver complements and greatly extends the basic CPU support software from Kontron by ensuring that the BIOS, basic BSP and I/O driver software all work together out of the box.

SafeNet and Radvision Partner for Secure IP Voice and Video

SafeNet and Radvision have announced their joint commitment to securing and enabling

next-generation fixed and mobile IP communications. This partnership and resulting joint solution unites two historically separate technologies: IPsec security, a network-level protocol, and SIP data management, an applicationlevel protocol, to save customers valuable time and development costs. With the adoption of an IPbased infrastructure comes increased vulnerability to security threats. Attacks targeting signaling and billing data make IMS deployments susceptible to billing fraud, unauthorized use of services and denial of service attacks. The pre-integrated, IPsecprotected IMS signaling solution provides device and equipment manufacturers within the telecom and networking industries with a complete set of tools for building next-generation mobile and fixed network capable applications including Voice and Video over IP (V²oIP), video share, multi-party gaming, video and audio conferencing, and content sharing. Through the joint partnership, SafeNet’s industry-leading IPsec security toolkits will be pre-integrated with Radvision’s SIP Developer Suite, including a specific solution for IMS-enabled network applications. SafeNet’s IPsec security solution will enable device and equipment manufacturers within the telecom and networking industries to protect signaling traffic—from the gateway to the end user equipment—for access, IWLAN and inter-network communications. The companies’ pre-integrated solution for the IMS-enabled networks is fully compliant with IETF, 3GPP, 3GPP2 and TISPAN standards.

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Small Form Factors put the Squeeze on Chip Vendors


elcome to the first edition of Small Form Factor Forum (SF3). SF3 will appear monthly to share ideas and observations of interest to the small form factor board community and highlight new products and technologies in the ecosystem that will feed the growth of this hot market area. We welcome your feedback and suggestions for future topics at Today, we highlight the obvious—or at least you would think so. As SBC and COM (Computer-on-Module) form factors shrink to a footprint about the size of a business card, it becomes incredibly difficult to fit today’s off-the-shelf processors and chipsets onto these boards. It wasn’t that long ago that the industry was at a loss on how to fit a Pentium M solution on a PC/104 board. PC/104 allows a surface area of about 70 mm on a side for placing components after connector zones are excluded. But with a Pentium III or Pentium M or Core Duo solution consisting of three chips (CPU, Northbridge, Southbridge) each 35 mm on a side, along with 5001000 other components, it’s pretty plain to see that you can’t build one of these boards without coming face to face with dozens of design rules for reliable manufacturing, such as spacing between components. Even more disastrous are the resulting buried and blind vias, making testing a nightmare and rework impossible. The industry made it work by fudging on the form factor, adding PCB space in the area the PC/104 standard calls out for I/O connector overhang (or “wings” in the industry vernacular). With a little wink-wink, we can all agree that this meets the letter, if not the spirit of the standard. But now we have new boards, primarily in the COM space, that make the PC/104 form factor look gigantic. There’s good news and bad news here. While x86 chip vendors appear highly reluctant to market chips designed specifically for the embedded market (we’re too small and diverse for the enormous design investment required), Intel and VIA have decided to focus on a new sub-notebook market dubbed the Ultra Mobile PC (UMPC). The good news is that these handheld devices have many of the same power, size and performance requirements as the SFF embedded market and have driven the chip vendors to integrate chips and shrink packages.

VIA has been marketing a Northbridge-Southbridge combo chip for two years and has shrunk this package from 35x35 mm to 21 x 21 mm. VIA has also shrunk the CPU package from 35x35 mm to 21x21 mm and new designs will take this to 11x11 mm. Intel offers multiple solutions including one headless offering for network appliances that combines CPU, Northbridge and Southbridge into a single SoC. And Intel’s new Atom processor for UMPC shrinks the CPU package to 14x13 mm while combining North and Southbridge into a single 22x22 mm chip. All good. The bad news is that few people anticipate a UMPC device needing bus expansion or legacy I/O. Luckily, VIA has done a better job so far, based on announced products, in providing a bridge from the past by including support for external legacy I/O chips and a PCI bus at a cost, some would argue, of lower overall system performance. The mainstream 80% of embedded applications benefit from this trade-off. So what we’ve found in the SFF space is that size matters. And the chip guys are starting to get it, finally. But size isn’t everything. There’s the other little matter called heat dissipation. When you have a PCB that’s 50 mm square or smaller with 600 or 700 components on it, getting the heat out of that environment is a major problem. Fortunately the UMPC market has the same heat removal issue. Hence, as the chip packages get smaller and die size shrinks, the Thermal Design Power (TDP) ratings have dropped as well, particularly for processors under 1.0 GHz. The 1W TDP processor at 500 MHz is a reality for these new designs. But another problem crops up. In many designs now, the heat from the chipset (single chip or two chips) exceeds the heat generated by the processor. When we had 20W processors, a 4W chipset wasn’t really a concern. With a 1W processor, the 4W chipset looks like a big pink elephant. So maybe the answer for the small form factor community is that which has been in front of us all along—moving from x86 designs to highly integrated, ultra-low-power SoC devices using RISC cores. After all, it’s just a SMOS (small matter of software). But, alas, there is more here than meets the eye, so that is the subject for another column.

Colin McCracken

& Paul Rosenfeld 14

April 2008

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Technology I n C ontext


FPGAs Are Everywhere – In Design, Test & Control Expanding beyond the supporting role of glue logic to solve only what could not be solved by off-the-shelf logic, FPGAs are now center stage with the ability to complete a fully custom SoC design targeted specifically to the needs of the application. by W  ayne Marx, Xilinx and Vineet Aggarwal, National Instruments


magine if a single-board design could unique system targeted to your specific Custom Local Memory Coprocessors fulfill the needs of every project. What needs becomes more of the integration and if you could configure an entire board, assembly process itself. FPGA vendors JTAG Debug or several boards in the same platform, and companies with FPGA-based prodMicroBlaze or PowerPC Trace to meet the needs of any part of a sys- ucts have even taken this to the next level PLBv46 Interrupt tem or all needs of a complete system? of productivity by introducing new levels Controller Multi Port Memory What if you could rapidly fashion system of abstraction with higher-level design Controller Timer PWM DMA hardware components like microproces- tools that integrate IP components and I/O I C / SPI Connected technology and sors; peripherals; filters; control loops; Get through graphicalwith block diagrams. Ethernet MAC companies providing solutions now UART (add your desired functionality here); and The value of using FPGAs goes bePCIe Get Connected is a new resource for further exploration GPIO UART, SPI and I2C controllers in the right into yond simply being able to tackle many Generic Peripheral products, technologies and companies. Whether your goal Controller CAN MOST mix to specifically and exactly meet the applications with one because you is to research the latest datasheet fromboard a company, speak directly Custom I/O Peripherals with an Application Engineer, or jump to a company's technical page, the needs of your application? also can solve problems with more deUSB 2.0 of Get Connected to put you in touch with theboard right resource. Ten years ago this would have goal seemed grees ofisfreedom. Previous soluVirtex or Spartan FPGA Whichever level of service you require for whatever type of technology, like pie-in-the-sky thinking, when tions contained a fixed and microGetmost Connected will generally help you connect with the companies products Figure 1 Embedding either a hard standard logic blocks like Ethernet, processor or application-specific standard youCAN are searching for. or soft microprocessor and USB controllers; microprocessors and product (ASSP) and associated hard logic architecture into an FPGA memory controllers; and UARTs were still in a rigid architecture, limiting the ways gives the ability to directly connect to a wide range of relegated to off-the-shelf hard logic silicon in which performance could be achieved; peripherals and functions on devices. However, FPGAs are now achiev- an FPGA-based board has an architecture the same die. ing attractive volume price points and sizes, that can be tuned for accelerated perforsuch that even a full 32-bit microprocessor mance. Tasks can be optimally moved be- an FPGA for your next design for many Get Connected with technology and companies providing solutions now constitutes only a small fraction of overall tween hardware and software and imple- of its basic benefits such as flexibility Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research t cost and size. FPGAs now represent a more mented to operate in parallel—by adding and integration. However, as the availdatasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connect viable option than ever for tackling nearly more microprocessors toofthe mix, IP catalog continues to grow, more in touch with the soft right resource. Whichever level service youby require able for whatever type of technology, any type of application imaginable. Get ThisConnected duplicating function blocks FPGA are beginning to look like will help hardware you connect with the companies and or products you are designs searching for. includes designing FPGAs products, by a mixture of these by adding copro- system-on-a-chip (SoC) designs. With using FPGAs to test products or even using cessing components directly to the micro- the majority of SoC designs containing FPGA-based hardware for controlling and processors themselves. The combination a microprocessor, it is no small coincimanufacturing products. of performance and flexibility provides dence that one of the most recent arrivals FPGAs are everywhere, and with the clear benefits for any given application, on the FPGA IP scene is the embedded availability of an enormous amount of and whether you are working with em- 32-bit microprocessor. Creating appliFPGA-targeted intellectual property (IP) bedded designs, test equipment or control cation-specific embedded designs using blocks from FPGA hardware vendors, systems, FPGAs have become an integral FPGAs as the base technology is gaining third-party IP suppliers and the FPGA part of our world today. traction. A Gartner report shows that by community, you can take an idea from pa2010, more than 40 percent of all FPGA per to silicon more rapidly than you would FPGAs in Embedded Designs think. With the task of creating all but ap- with companies It is and clear that FPGAs are employed Get Connected Get Connected in this section. plication-unique IP blocksproducts out of featured the way, in a wide range of applications today. with companies mentioned in this article. most of the work in creating a completely You are probably already considering

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End of Article

April 2008 Get Connected with companies mentioned in this

Technology InContext designs will contain an embedded microprocessor. Based on processing speeds, with more than 200 MHz for soft processor implementations and hard block implementations exceeding twice that amount, nearly 80 percent of all embedded 32-bit application needs are addressable inside an FPGA. Having the microprocessor inside the FPGA does not imply compromises either. As an example, Xilinx offers a soft 32-bit microprocessor called MicroBlaze with configurable instruction and data cache sizes, which includes an optional memory management unit (MMU) for protected memory accesses. While this soft core can be targeted to any of its FPGA devices, Xilinx also offers a hard 32-bit PowerPC processor in its higher-end Virtex line. With the open standard processor local bus (PLB) interface present on both of these processors, they can connect to a large number of supplied peripherals and acceleration logic (Figure 1). For many reasons, it makes sense to incorporate embedded processing functionality into an FPGA—some reasons being less obvious than others. To begin, there is no fixed architecture implementation and therefore no fixed boundary between which functions are performed in hardware versus software. Therefore, there is a wide spectrum of possible solutions to explore for any application, ranging from very generic to application-specific. Detail showing 16x8 section of shutters. One shutter did not open.

Note: Image from an early prototype shutter array.

Image of an array addressed with 16x8 boxes. Photos are taken back lit. White rectangle is an open shutter, black is closed.

Figure 2

An early prototype of the MEMS microshutter array addressed with 16x8 boxes shown by backlit photograph (white rectangles are open shutters, black are closed). Photo courtesy of NASA Goddard Space Flight Center

On the generic end, the processor and associated peripherals can be configured on a shared bus with the single master CPU having access to all slaves. This approach solves for the widest range of functions. The advantage is simplicity of system architecture and the ability to accommodate changes in system requirements simply by modifying software code and recompiling. The downside of this approach is that it places most of the demands on the CPU, such as moving data through the system and performing computations, and it consumes the shared bus bandwidth of the system with every data transaction. This may cause the microprocessor and bus to run out of steam very quickly as they service more of the system needs. On the opposite end of the spectrum, the system can be architecturally tuned to meet an application-specific need, or it can be scaled to support more channels or higher throughput. These changes are accommodated in the FPGA by adding “point-of-use” dedicated hardware functionality in the form of interconnect buses, direct memory access (DMA) engines or hardware acceleration logic. Optionally, entire microprocessor subsystem blocks can be replicated inside the FPGA. No matter the approach, the net result is the same—higher system-level performance. As an example, for TCP/IP processing, it may make sense to have hardwareassisted offload functionality for checksum rather than force the CPU to perform that function. In addition, reducing the need to have the microprocessor perform block data transfers by incorporating DMA can dramatically affect the overall system performance and significantly reduce the demand on CPU bandwidth. Some tuned architectures necessitate a different topology. For example, it may be advantageous to keep data in one location and have the processing elements operate on the data in situ rather than moving the data through the system to each new processing stage. A multi-ported memory controller to a common memory element would fit the need in this case. Many control applications require precision processing of wide dynamicrange device input and output voltages and currents at varying degrees of performance. These calculations are well served in the floating-point domain; however,

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Technology InContext

Figure 3

Multiple control loops run with true hardware parallelism on FPGA-based I/O boards.

achieving precision with performance while using floating-point emulation is not always possible. Having the ability to selectively accelerate floating-point calculations by using a floating-point coprocessor to balance performance and cost is valuable. A soft processor can have an optional floating-point unit (FPU) that is tightly coupled to the CPU and can be selectively designed in with a simple parameter option. Likewise, a full double-precision FPU is available for the PowerPC. Once the design is optimally tuned within an FPGA-based board, there is no reason it has to stay there forever. For many applications, you can use a more generic prototyping platform for initial definition stages with the intent of eventually moving to one of lower cost, higher performance or different form factor. A natural benefit of a soft IP core is the ability to retarget to another hosting device should the need arise. Given that the primary FPGA vendors have a wide range of devices from which to choose, ranging in density, performance and cost, several retargeting options are generally available. In fact, most IP blocks supplied by the FPGA vendors themselves are qualified for all of their device families, thereby eliminating most of the retargeting task. By taking advantage of the open interconnect standards for application-specific IP, developers can also gain portability benefits for their custom blocks. In addition, as vendors introduce new devices, they continue to qualify their IP on the devices, which essentially makes this a future-proof approach to engineering solutions and reduces design cycle time and concerns of device obsolescence.

FPGAs in Test Applications

While there may be clear benefits


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to using FPGAs in your next embedded design, taking advantage of FPGA technology in test applications might be less apparent. From design validation to automated test equipment, all test systems can benefit from the low-level I/O control and parallelism that FPGAs provide. When characterizing the performance and functionality of a device under test (DUT), you can only be as precise as your measurement system, and using FPGA chips as the primary interface adds highspeed intelligence to your I/O. Verifying the unique features of any device can be accomplished in hardware, and incrementally adding test functionality is simplified with parallel operation. A good example of leveraging FPGA performance in test systems is the NASA Goddard Space Flight Center’s ongoing development of the James Webb Space Telescope. To mask out unwanted light from distant solar systems, engineers at NASA are perfecting a custom microelectromechanical system (MEMS) device with thousands of tiny microshutters in a configurable grid formation. The shutters open and close by synchronizing a passing magnetic field with more than 500 digital lines that index individual shutters on the grid (Figure 2). The lifetime of every component on the James Webb Space Telescope must be guaranteed for the 10-year mission in space, and NASA uses FPGA-based hardware for the reliability testing of the MEMS chip design. A custom ASIC would not give NASA the flexibility to iterate on its test system as the design improved, and a software-based approach would not provide the necessary low-level timing or reliability. NASA saved hundreds of manhours and thousands of dollars by going

Technology InContext with off-the-shelf FPGA-based hardware. Another key advantage to using FPGAs in test equipment is the diversity of options when implementing digital communication interfaces. You can program both standard and custom digital protocols at the physical layer with complete control over timing and synchronization. There is an abundance of available IP ranging from basic SPI to high-speed serial PCI Express interfacing, and much of it is open source and free for the taking. In situations when the DUT uses digital buses that are proprietary or confidential, fixed ASIC interfaces face challenges with regard to maintenance and forward compatibility. However, you can upgrade FPGA designs over time without any physical hardware changes.

FPGAs in Control Systems

hardware redesign reduces long-term sustaining costs and system downtime. FPGAs are everywhere, and they are growing within all different facets of design, test and control. The flexibility and performance of FPGAs combined with the rich set of available IP provide a spectrum of solutions for a range of problems, all with multiple degrees of freedom within a single piece of hardware. While making system component choices normally limits options down the road, the choice to use an FPGA-based solution actually further expands the options available to you. Even throughout the life of the device, the options continue to exist, and you can carry system upgrades into future generations with relative ease. Xilinx San Jose, CA. (408) 559-7778. []. National Instruments Austin, TX. (512) 683-9300. [].

Redeďƒžning the User Experience

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Control systems provide another great example of how FPGAs have clearly grown from their roots as hardware glue logic and interface chips. Closed-loop control systems vary across many different industries, but the primary factor affecting overall system performance is often the speed of the control loop. At the most fundamental level, the loop speed is the total time needed to read sensor inputs, process the control algorithm and output the resulting values to the actuators. An FPGA-based hardware solution has the unique advantage of true hardware parallelism; independent control loops can run at different rates without relying on shared resources that might slow down their responsiveness (Figure 3). Multiple control loops running on processor-based systems, on the other hand, must compete for processor bandwidth, and different parts of the application have the potential to starve one another and induce jitter into time-critical tasks. The ability to dedicate a particular section of FPGA circuitry for a specific control function gives system designers the hardware guarantee of reliable operation without the risks of resource unavailability. Just like the earlier examples of design and test applications, the available IP blocks for controls help system designers get a jump start on using FPGA-based hardware. Whether it is basic PID control or advanced algorithms like model-free adaptive (MFA) control, pre-built IP exists to simplify the

FPGA design so you can spend more time on other aspects such as tuning the values of mathematical coefficients. As system requirements become more complex, FPGAs also provide the scalability to add functionality without having an impact on the rest of the system. A machine control application, for example, might require the addition of sensors for monitoring the system temperature and mechanical vibrations, with the goal of detecting the early stages of machine failures. An FPGA-based system could add that functionality without affecting the machine control and even help integrate an emergency shut-down sequence to ramp down the machine safely and reliably. Over time, parts of the actual system being controlled are likely to change, and a controller needs to be able to adapt to these changes. An FPGA-based approach provides hardware reconfigurability to evolve with application needs. With reprogrammable hardware, you can recompile the FPGA to accommodate new and improved algorithms, different types of I/O and bug fixes, all of which can be accomplished in the field. Avoiding a complete

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Technology I n C ontext



One Platform, Many Apps

With the advances in FPGA technology and hardware standards, COTS vendors are developing FPGA-based products in increasing numbers, providing developers with an unparalleled selection of platforms to build their systems. by N  eil Harold Nallatech


VXS 610 Front Panel

PGAs are rapidly becoming ubiqCH0 CH1 CH2 CH3 TRIG CLK CH0 CH1 TRIG CLK uitous for signal processing funcBoot Flash CLK CLK ADC ADC ADC ADC DAC DAC tions in a number of application MGMT MGMT Local Memory areas. COTS vendors have responded to this trend by developing an array of prodPowerPC Local Local VME-PCI Bridge Memories Memories Processor Xilinx Virtex-5 ucts that address the needs of a variety Xilinx Virtex-5 SX95T SX95T of applications in the defense world and PCI-X 133 beyond. In many cases, these COTS prodXMC P4 XMC P4 SRIO x4 XMC-210 XMC-220 d 2x GTP x4 2x GTP x4 ucts are developed using popular industry SRIO x4 SRIO x4 SRIO Local Switch standards, thus allowing developers to esMemories Local Memories Xilinx Virtex-5 exploration Xilinx Virtex-5 SX95T SX95T er your goal tablish a base platform that can address a eak directly wide range of applications. al page, the At a card level, VME has long been GPIO 80 Lines resource. established as a widely used platform in FPGA GPIO VME64 FPGA GPIO 2x SRIOx4 chnology, 2eSST 4 Lines and products embedded systems. Competitors have VXS Backplane come and gone, but an unparalleled depth Figure 2 VXS-610 Architecture with XMC-210 and XMC-220. of installed base and an evolutionary approach to new technology has seen VME a total bandwidth of 20 Gbits/s carried in isolation (to create a “pure XMC”). In adapt to meet ever changing requirements. over the P0 connector. Backplanes are either case, a total of 20 differential pairs The development of VXS (VITA 41) her- available in mesh, star and dual-star topol- are available on each connector, but they alded the arrival of a range of serial fab- ogies, but one of the challenges of VXS are usually configured to provide 8 bi-dirics to VME platforms, but not, critically, is deciding which specific serial standard rectional serial lanes on each connector panies providing solutions now at the loss of support for legacy products to use. VITA 41 has 11 “‘dot” standards, for a total bandwidth of 40 Gbits/s. As ration into products, technologies and companies. Whether your goal is to research the latest and systems. VPX may represent the fu- with 7 dedicated to supporting serial pro- with VXS, XMC has dot standards for the lication Engineer, or jump to a company's technical page, the goal of Get Connected is to put you ture of VME systems, but the pace of tocols such as InfiniBand, Serial RapidIO, usual range of serial protocols. ice you require for whatever type of technology, will be for. dictated by the market, and Gigabit Ethernet and PCI Express (Table ies and productschange you are searching indications so far have been that many de- 1). In embedded applications, where dis- FPGA Architectures velopers value the backward compatibil- tributed multiprocessing architectures are This extra bandwidth on VME and ity of VXS too much to switch (no pun in- common, Serial RapidIO has emerged PMC products has made the use of FPtended) to the “serial-only” backplanes of as a popular choice due to its support for GAs—and their parallel processing caVPX. Some highly complex applications peer-to-peer communications and perfor- pability—a far more viable proposition; a have been compelled to make use of the mance-optimized data transfers. fact reflected in the plethora of standardsadded bandwidth of VPX, but it appears In the same way that VXS added se- based COTS FPGA products that are now that VXS may be around for longer than rial capability to VME, XMC (VITA 42) available. Developers can select from a many originally suspected. represents an evolutionary introduction range of carrier architectures to provide VXS specifies two 4X lanes offering of serial fabrics to the PMC mezzanine a powerful and flexible base architecture standard. The XMC standard defines two that can be customized to meet the needs high-speed serial connectors that can be of a range of applications. Get Connected used in addition to the four PMC connecThe VXS-610 is an example of an with companies mentioned in this article. tors (to create a “hybrid PMC/XMC”) or FPGA and PPC compute card with dual

End of Article


April 2008 Get Connected with companies mentioned in this article.

Technology InContext FPGA processing nodes, a PowerPC and two PMC/XMC mezzanine sites. It has an onboard Serial Rapid IO switch that provides an intelligent, high-bandwidth network for building multicard compute systems. The PMC/XMC hybrid sites provide two interfaces to the mezzanines—a PCIX bus and 8 lanes of serial I/O. The PCI-X bus provides communication with the onboard PowerPC and the PCI-to-VMEbus bridge. The 8-lane XMC interface from each mezzanine site is connected directly to a Virtex-5 FPGA on the carrier card, providing a high-bandwidth data plane for moving data off or onto the mezzanine. Selecting a common base architecture allows for a great amount of re-use at the architectural level. In this case, systems developers can create software management routines that set up and control the Serial RapidIO network and can be easily altered depending on particular data-flows and without restricting the selection of the two parameters that vary most from one application to the next—the I/O interface and the processing requirements.

Varying I/O

Variations in I/O requirements are one of the reasons modular standards were developed in the first place. Two SIGINT applications may only differ in the frequency spectrum of interest, but this still imposes completely different I/O requirements on the hardware platform. As an example, radar systems need to operate at UHF and upwards (300 MHz - 3 GHz), requiring digitizing capabilities of greater than 1-3 Gsamples/s, while a COMINT system will be interested in VHF signals (30-300 MHz) but will re-

Standard VITA 41.0 VITA 41.1 VITA 41.2 VITA 41.3 VITA 41.4 VITA 41.5 VITA 41.6 VITA 41.7 Table 1

CLK Freq = 187.5 MHz

Analog Filtering

Bus width = 16bit

1:4 DEMUX +DDR 8 Bus width = 32bit 8


Digitized data flow.

April 2008


DDC Mixer

8 8-bit ADC2

Figure 2


FFT FIR Decimate Bus width = 128bit

x8 XMC Interface

Virtex - 5 FPGA 3GSPS ADC 1:4 8-bit DEMUX ADC1 +DDR

Status Draft Draft Draft Draft Draft Draft Draft Draft

VITA 41 Standards.

quire greater fidelity in order to distinguish carrier signals. An XMC card provides two 3 Gsample/s, 8-bit ADC channels fed into a Xilinx Virtex-5 FPGA, making it appropriate for several applications including radar and lidar systems and mobile communications. Two of these PMC/XMCs can be mounted on the VXS board providing four independent sensor inputs—ideal for antenna arrays. The ability to digitize the sensor data at these RF frequencies removes the need for an intermediate frequency (IF) stage and consequently some complex analog circuitry, but does lead to a combined data rate for the two channels of 6 Gbytes/ s (48 Gbits/s). This places a requirement on the FPGA to have massive I/O bandwidth and enough processing power to decimate the incoming data streams. Fortunately, FPGA technology has advanced significantly in recent years, outstripping conventional processors hampered by the slowdown in Moore’s law. This has made FPGAs the first choice for front-end sensor processing applications for the very reason that they can handle the data rates that exist at this stage of the system. The 3 Gsample/s ADCs have built-in

CLK Freq = 375MHz DDR

CLK Freq = 1.5GHz

Description VXS InfiniBand on VXS Serial RapidIO on VXS 1000Mb/S IEEE 802.3 Protocol 4X PCI Express Aurora Protocol Layer 1X Gigabit Ethernet Control Channel Processor Mesh

1:4 multiplexers plus the ability to use double-data rate (DDR) registers, meaning that data emerges from each ADC on 32 LVDS pairs running at 375 MHz (DDR). This translates to a data rate on each LVDS pair of 750 Mbits/s. To ease the difficulty of receiving such high-bandwidth data, the Virtex-4 and Virtex-5 families of FPGAs from Xilinx offer SelectIO technology, which provides support for over 40 I/O standards and has dedicated logic blocks with DDR registers and builtin serial-to-parallel converter units, called “ISERDES”. In DDR mode, the ISERDES blocks convert incoming serial data lines into 4-, 6-, 8- or 10-bit parallel words, relaxing the clock frequency requirements on the FPGA fabric. In this specific example, a 4-bit word helps to reduce the clock frequency by another factor of 2—to 187.5 MHz. The data flow from ADC through to FPGA fabric is illustrated in Figure 2. The ISERDES blocks are extremely valuable when dealing with high-speed I/O, but while they help to get the data into the FPGA, they do not change the volume of data that must be processed. When dealing with such a large amount of data, the first processing functions focus on reducing the data-stream into something more manageable that can be analyzed. The typical functions are included in Figure 2. The digital downconversion (DDC) process shifts the channel of interest to a lower carrier frequency, filters unwanted signals using a finite impulse response (FIR) filter and reduces the remaining data to a more manageable rate. The DDC does not consume a large amount of FPGA resources, requiring around 40-50 DSP48 blocks in the Virtex-5, assuming a 40-tap FIR filter is used. Even when dealing with multiple channels, today’s FPGAs have ample space left to process the data

Technology InContext

Logic Cells

Device SX95T LX155T Table 2

Block RAM 7,632 94,208 kbits 8,784 155,648 kbits

DSP48 Slices

Ethernet GTPs MACs

PCI Express Endpoints









The Harsher the Environment, the More You Need MEN Micro! D7 Xeon® Blade Server 6U CompactPCI®

Virtex-5 Device Comparison.

through, say a 4k-point FFT. This means that when the data leaves the XMC it has already been pre-processed such that the next stage of processing is focused on analyzing the data and making decisions. For COMINT applications, the XMC220 card provides dual 180 Msample/s, 16-bit ADC channels and can be mounted on the VXS board in the same fashion as the XMC-210. This means that the software infrastructure built up around the radar application can be adapted and reused as appropriate. The XMC-220 also has dual 1 Gsample/s, 16-bit DAC channels, which can be used for generation of jamming signals or as test stimulus during application development. Beyond defense and SIGINT systems, a wide range of PMC/XMC products exist providing every kind of I/O imaginable. 10Gbit Ethernet products are now available, allowing development of more advanced packet snooping systems targeted at monitoring the explosion of data on the Internet. The base architecture of the VXS example supports this class of product with FPGA processing nodes that enable real-time processing of huge volumes of data in a “kink in the wire” configuration.

Processing Requirements

Xilinx currently offers four families of devices in its Virtex-5 product range, each offering an optimized balance of features for particular applications. The LX and LXT series offer the best logic performance while the SXT family is optimized for signal processing and memory-intensive applications. The recently announced Virtex-5 FXT series provides a balanced set of logic and signal processing features as well as embedded PowerPC blocks. All of the “T” products incorporate RocketIO GTP transceivers—dedicated silicon blocks that implement a range of highspeed serial I/O protocols.

As with most signal processing applications, the Radar and COMINT applications described previously are best served by the SX95T device, which has 640 DSP-48 slices permitting 640 multiply-accumulate functions (MACs) on each clock cycle. Applications such as packet snooping tend to perform more logical, conditional processing that requires bit-level manipulation rather than floating-point numbers, making the superior logic count of the LX devices a perfect fit. The VXS-610, XMC-210 and XMC220 provide the option of SXT or LXT devices, allowing users to select a platform that is optimized to meet the requirements of their particular application. Table 2 illustrates the relative features of the specific devices. The interoperability of such an array of products is extending the flexibility of FPGAs to a system level, enabling them to address a growing range of applications from FPGA staples such as SIGINT and Software Defined Radio to packet snooping and protein matching. Using a common hardware base for multiple applications also facilitates software re-use, reducing schedule and risk in an increasingly competitive embedded market. This expansion in COTS FPGA products may also have an interesting effect on the roadmaps of the large FPGA vendors who have traditionally focused more on replacing ASICs.

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Nallatech Eldersburg, MD. (410) 552-3352. []. MEN Micro, Inc. 24 North Main Street Ambler, PA 19002 Tel: 215.542.9575 E-mail: Untitled-1 1

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solutions engineering


Protecting Your Embedded Application from the Internet Embedded applications increasingly involve distributed nodes connected via wireless LANs and via the Internet. A “firewall on a chip” can help keep communications secure and protect applications from attack while not overburdening the CPU.

by A  riel Shulman Connect One


Wireless Connectivity – Different Solutions for Different Needs

Basic protection challenges become even greater when technology goes wireless. These days, wireless technolo-


April 2008

Application + OS (Optional) Drivers



ith the great benefits that come from connecting to the Internet, users expose themselves to different and new kinds of risks. Information sent over the Internet must be protected to ensure that an individual’s or a company’s private information—whether financial or otherwise—will be safe from viewing and/or exploitation. Encryption is essential. When a device is provided with Internet connectivity, it encounters this same level of risk as well. Suddenly, others can connect to it and gain the ability to use or misuse the device’s data or to otherwise sabotage the functionality of the overall system. Once again, protection is necessary. Just as a firewall is needed to protect your PC from unsolicited connection attempts, so developers must protect Internet-connected devices using firewall technology.


Application Memory CPU

Host CPU

Figure 1

Using a CPU for application + Networking/Security.

gies seem to be everywhere, and M2M solutions are no exception. Most M2M solutions rely on one wireless technology or another. Different M2M solutions require different wireless connectivity methods. For example, fleet management applications for trucks moving about the country must rely on cellular networks, while inventory management solutions used within the confines of a warehouse can use wireless LAN. Cellular networks such as GSM/

GPRS/UMTS provide ubiquitous coverage over large distances, usually at low data rates and with no encryption capabilities. For some applications and industries, sending unencrypted data (i.e., GPS coordinates of a truck’s location) does not represent a significant business risk. However, for some Internetconnected devices transferring sensitive information such as medical patient records or credit card payment information, this is a serious problem since data can potentially be intercepted en

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SOLUTIONS Engineering route to its destination. Data sent over cellular networks is usually charged according to volume, which can make transfer of significant amounts of data quite costly. Short-range wireless networks such as wireless LAN cover a significantly smaller range but at much higher data rates, frequently with some level of encryption. Data sent over wireless LAN networks is free of charge. The low cost, ease of deployment and acceptable level of security makes Wi-Fi an ideal choice for short-range wireless applications. Some mobile RFID readers are equipped with wireless LAN in order to relay information read from RFID tags back to a central server over the Wi-Fi connection. No matter what the M2M solution is, the need for a secure communications path is becoming increasingly important, and in some industries, mandatory.

OS (Optional)

TCP/IP AT+I Commands & Data

Application Memory CPU

Host CPU

Figure 2

Internet Traffic


Built-In Comm. Plt

IP Controller

Using an IP controller for Networking/Security.

Wireless Security – The Devil Is in the Details

The issue of security in wireless networks is often misunderstood by M2M end users. Cellular networks usually cannot offer any kind of wireless security. The data is sent from a device in an unencrypted manner over the cellular network. Connection attempts from the cellular network to the device are possible. Wireless LAN offers a higher level of security. It has evolved over the last few years to become a widely accepted form of communications. The introduction of the WPA2 encryption algorithm has finally addressed the security concerns of even the most paranoid of users.




Upper Layer Protocols


Application +



WPA2 achieves this increased security by using strong encryption and authentication based on dynamic encryption keys and the Advanced Encryption Standard (AES) cipher as an alternative to the TKIP protocol. As such, it offers a superior level of security compared to its predecessor, the WEP protocol, which uses static keys and is no longer considered secure by many IT professionals. For many, a WPA2 security wireless LAN is now considered fully secure. However, even WPA2 may not be enough—not because it provides subpar encryption, but simply due to the fact that it is not able to encrypt data “end-to-end.” Wireless security protocols such as WPA2 ensure a fully secure data communication path over the air, starting with the client device and ranging all the way to the access point. Security can be breached when any information leaves the boundaries of the wireless network.

April 2008

If a wireless LAN device transfers information to the public Internet, the data is not encrypted at this point. This is because WPA2 is implemented in both the client device and the access point, but not on any Internet server. In other words, the access points exchange encrypted packets with the client device over the Wireless LAN network, but once data is sent from the access point on to the Internet, it is no longer encrypted. To ensure end-to-end encryption, an additional encryption method must be used. The most widely used and most trusted solution is the secure socket layer (SSL) protocol. The SSL protocol is the de-facto standard for secure Internet com-

munications and has been used for anything from Internet banking to transfer of medical data. Although the SSL protocol provides excellent encryption that can potentially replace wireless security algorithms, most customers choose to use both methods simultaneously. For example, many hospitals use wireless LAN networks to provide connectivity for mobile medical devices. Since these devices need to send important and confidential patient records over the Internet, they typically use end-to-end SSL encryption or another form of encryption over the Wi-Fi network. These measures are necessary to prevent unauthorized connection attempts by patients or other visitors. In contrast, cellular networks are inherently insecure. With them, the only solution for encrypting data sent over the networks is the use of an end-to-end encryption solution such as SSL. Many point-of-sale (POS) terminals use cellular technologies to transfer credit card data, such as isolated vending machines or customers buying train tickets after boarding the train.

Wireless Internet Security Easier Said Than Done

An M2M solution cannot be considered fully secure unless it satisfies two conditions: 1. It communicates in a fully encrypted manner and 2. It is protected from Internet attacks In existing M2M embedded solutions, the application runs on existing hardware with its own operating system. Development of end-to-end SSL encryption capabilities is usually an expensive and time-consuming process. Upgrading existing designs with a higher level of security by adding new encryption and security protocols to the application means that a new processor may be needed because connectivity and encryption are CPU-intensive. In addition to CPU cycles, additional system memory is required since networking and encryption add significantly more code that has to run concurrently with the host application. Many commercially available SSL3 software stacks are

SOLUTIONS Engineering

Text Based AT+i Commands

Serial/ USB

Application MCU/CPU (8-32 bit)


IP Controller

rity tasks to a field-proven solution. After being instructed by the host CPU to send encrypted data, the IP controller performs all the necessary functions to ensure that data is successfully sent using end-to-end SSL3 encryption. To open a secure TCP socket, the IP controller first opens a standard TCP/IP socket to an SSL3 server, and then initiates an SSL3 handshake over the open socket. The IP controller requests a list of cipher suites ranked according to the clientâ&#x20AC;&#x2122;s pri-

ority from the server. The server accepts the cipher that it supports and the client receives by default the server certificate to authenticate server. The server then provides a certificate signed by a Certificate Authority (CA) that the client recognizes and is preinstalled in the client. In some cases, client authentication is required by the server, whereby the client must send its signed certificate to the server. The server and client agree on encryption/decryption keys during this phase. This requires the

Cellular or 802.11b/g

Figure 3

Connecting an IP controller to an M2M solution.

over 500 Kbytes in size, and open-source packages are much larger. Also, memory must be allocated for buffers used to store transient data. Finally, the application must be rewritten, debugged, tested and released. Similarly, it is equally challenging to secure an M2M application from Internet attacks. If a single microcontroller is used in a device to both run the application and to manage IP communication, all the resources of the microcontroller are fully utilized. As soon as the application is Internet connected, it is by definition exposed to Internet attacks, unless a dedicated and complex firewall is added on top of it. As can be seen in Figure 1, using a CPU for the core application and networking functions results in Internet traffic directly hitting the CPU. Retrofitting the product with a larger controller is impossible. Replacing all devices in the field is cost-prohibitive, resulting in significant redesign and additional costs. Doing business the old way results in losing your competitive edge. Without the availability of onboard resources, the only solution is to find another alternative.

The Solution â&#x20AC;&#x201C; An IP Controller

The use of a dedicated IP controller solution provides an immediate, cost-effective and highly secure solution. It allows M2M developers to focus on their companiesâ&#x20AC;&#x2122; core competencies while offloading all communications and secuUntitled-7 1

April4/13/08 2008


4:17:14 PM

SOLUTIONS Engineering

exchange of random numbers between the client and server. Following a successful SSL3 handshake, the IP controller encrypts all data sent across the socket according to the cipher suite and keys agreed upon during the SSL3 connection. Data received on the socket then is decrypted by the IP controller. As one can see from this description, the IP controller saves the M2M de-

veloper a significant amount of the programming required for SSL3 encrypted communications. Thus, the use of an IP controller greatly facilitates meeting the first condition for secure M2M communications—that of communicating in a fully secure manner. The IP controller also provides an immediate answer to the second condition of protecting the embedded device from Internet attacks. The host CPU simply sends

text commands to the IP controller and does not have any direct interaction with Internet traffic. In other words, it is not hit with any packet from the Internet; there are no shared memory spaces, or other ways for an attacker to reach the host CPU and its application. Furthermore, since the IP controller is a slave coprocessor, it is unable to initiate any connection to the host. This combination means that the IP controller is in fact an impenetrable firewall, protecting the embedded application from Internet attacks. Any MCU/CPU, no matter how simple—even existing or legacy solutions already implemented in existing devices— can issue simple text-based commands in order to instruct the IP controller to perform complex tasks such as establishing an encrypted TCP connection to a remote server, or uploading an encrypted file to a remote server. In addition, the IP controller servers as a “firewall on a chip,” shielding the application from malicious attacks originating from the Internet. Figure 3 provides a block diagram of an IP controller in a wireless M2M system. The IP controller contains all the drivers, encryption and security algorithms required to manage either cellular or Wireless LAN communications. It communicates with these devices using either USB or SPI, depending on the wireless device used. Migrating M2M applications to use wireless networks, either wireless LAN or cellular, requires the designer to be familiar with security issues. In today’s world, a robust and reliable security solution is absolutely necessary. Since Internet connectivity probably is not his field of expertise, the designer must ask many questions, including how much risk is he ready to take if he has limited experience with IP networks. There are many hard, soft and hidden costs that can add to the total cost of implementing a secure wireless M2M application. IP controllers provide an immediate, field-proven solution and greatly expedite and facilitate the introduction of new M2M solutions. Connect One San Jose, CA. (408) 572-5675. [].


April 2008


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Medical Applications

nvSRAMs Help Bring the Hospital Home Non-volatile memory protects patient-critical data in portable medical equipment. Choosing the right kind of non-volatile memory is critical.

by C  hris Gilbert Simtek


exploration er your goal eak directly al page, the resource. chnology, and products


ver the past decade, there has Parameter FLASH EEPROM BBSRAM nvSRAM been a growing trend in the health Nonvolatile x x x x care field to send hospital patients home as quickly as possible. Because of Unlimited Endurance x x this, there is often a need for these paRandom Access x x tients to “bring the hospital home” with No Battery Needed x x x them. This has precipitated a rapid rise in Fast Read & Write x the need for portable and highly reliable (25-45 nsec) medical treatment, monitoring and data Byte Programmable x x x logging equipment. Because this medical equipment is panies providing solutions now Table 1 A comparison of non-volatile memory technologies characterizes the key being installed and operated in patients’ ration into products, technologies and companies. Whether your goal is to research the latestfeatures of each technology. homes, key requirements include compact lication Engineer, or jump to a company's technical page, the goal of Get Connected is to put you size, very type lowofpower consumption and exice you require for whatever technology, Critical to meeting ies and productstreme you are dependability. searching for. these criteria is highly reliable, non-vola- infusion pump. Infusion pumps are used a keypad mounted on the front of the detile semiconductor memory to ensure that to introduce fluids into the patient’s circu- vice. Alternately, the infusion pump can neither physician-prescribed equipment latory system for hydration, pain manage- be remotely programmed and operated by settings, nor stored patient information, ment, chemotherapy and total parenteral health-care providers using a telephone such as vital signs, are accidentally lost. nutrition (TPN), a treatment where all of line and built-in modem. The system has a the body’s nutrients are provided intrave- digital LCD display that shows the unit’s From Hospital to Home nously, bypassing the normal process of status, including programmed medication One piece of medical equipment that eating and digestion. quantities and infusion times. In addition frequently moves with the patient from In addition to the mechanical compo- to the requisite beeps and buzzes, some the hospital to the home is the portable nents such as the pump and its DC mo- modern systems actually include pre-retor, a portable fusion pump is a complex corded spoken messages that remind the embedded system with a CPU at its core patient of important tasks to perform. Get Connected (Figure 1). The user, who is often the pa- Operation of the mechanical components, with companies mentioned in this article. tient, controls operation of the system via including the pump and valves, are per-

End of Article


April 2008 Get Connected with companies mentioned in this article.


formed by a digital IC controlled by the CPU. Likewise, another IC interfaces to sensors and provides conditioning of signals throughout the system. Last but not least is the system’s memory and real-time clock. In addition to routine scratchpad RAM, a portion of the memory space is dedicated to non-volatile memory. This non-volatile memory is critical to the operation of the infusion pump since it retains the calibration parameters, dynamic algorithm coefficients, stepper motor control data tables, intravenous therapy schedule, system state information and the data log, which is a detailed history of the patient’s physical parameters, including blood pressure, temperature and respiration rate. The realtime clock provides an accurate time and calendar source to administer the intravenous therapy schedule and time-stamp the data log. As is common in many systems, but absolutely crucial to infusion pumps, the system must recover from any unexpected loss of power. If power is lost during the infusion of fluid, a battery pack takes over and ensures that normal operation continues. However, in the event that the battery fails, even for a very brief time, the unit not only must be able to resume the infusion once power is restored, but it must also have access to all programming data, including dates and times of medication delivery, as well as to the data log. Needless to say, loss of programming data can result in potentially fatal consequences, since the details of the patient’s medication delivery would be unavailable, resulting in possible under- or overdoses of medications being administered upon system restart. Similarly, losing the data log can result in important patient data being lost—data that may be critical to the physician learning of medical conditions previously not exhibited by the patient. In short, the contents of the infusion pump’s memory are often a matter of life-and-death. In the event of a power-related disturbance of an infusion pump, the unit must detect the loss of power, then store vital system state information and the data log

User Controls Communication Interface Sensors & Signal Conditioning

Display Control



Memory & Data Logging

Audio/Voice Driver

Real-Time Clock

Stepper/DC Motor Control Power

Figure 1

Block diagram showing the primary components of the infusion pump. However, the block diagram could apply to a number of portable medical devices including blood analyzers, glucose meters and automated external defibrillators.

to non-volatile memory prior to the complete loss of power. Once power is restored to the system, this state information is used as a recovery point, and the system resumes operation at the exact point it was prior to the power loss. The portable infusion pump therefore places a number of requirements on the non-volatile memory. First, because the unit is portable, low power consumption and a small form factor are important. Second, memory endurance is an essential aspect as well, since portions of the memory are tasked with repeated reads and writes, and the underlying memory technology must be immune from any wearing out of memory cells. Third, the memory solution must be robust to ensure that vital system configuration and programming data, as well as the patient’s data log, is not lost. Fourth, the memory must be sufficiently fast to handle the real-time demands of medical applications. Other considerations that are not hard requirements but simplify the design are the physical interface of the device, the power conditioning requirements of the memory device, and whether the memory is byte or block writeable.

Which Non-Volatile Memory Technology?

A number of non-volatile memory technologies exist in the market today, and include flash, battery-backed SRAM (BBSRAM), electrically erased programmable read-only memory (EEPROM) and nvSRAM. Table 1 provides a summary of the key features of these memory types. EEPROM is frequently used to store small amounts of non-volatile configuration data. However, compared with other non-volatile technologies, EEPROM is much lower in density and it has much slower read and write speeds, making it unacceptable as a single memory technology for many medical applications. EEPROM can be combined with inexpensive flash memory where configuration data is stored in the EEPROM, and the flash is used as primary data storage. However, this hybrid solution more than doubles the physical board space. In addition, this combination has unacceptably slow write times, and the flash memory has poor endurance characteristics, resulting in limited read/write cycles that can April 2008


INDUSTRY Insight wear out the memory devices, ultimately causing loss of data. While traditional SRAM is a volatile memory technology, there are variants that include an on-chip battery to maintain operation of the device in the event of an unexpected power loss. Known as BBSRAM, this type of memory requires a large physical size because the battery, power management circuitry and the SRAM are combined into a single package. BBSRAMs are generally optimized

to conserve battery power since the small battery has limited power, so low-power SRAMs must be used. Unfortunately, an attribute of low-power SRAMs is slower access time, making them unsuitable for many medical applications like infusion pumps. Another shortcoming is the additional point of failure introduced by the battery due to its limited life span. Once the battery loses its ability to maintain a charge, the unit represents a significant risk because it is incapable of providing

Address Bus Microprocessor or DSP nvSRAM WR/AWE/W RD/ARE/G DS/AOE/E


Data Bus

Figure 2

The interface between the microprocessor or DSP is straightforward because the nvSRAM behaves as an SRAM under normal operation. When power is lost, the nvSRAM automatically stores the contents of the SRAM into the non-volatile shadow memory in a single transaction.

robust and secure backup of patient-critical data. Because of the shortcomings encountered with these non-volatile memory types, an increasing number of manufacturers are using nvSRAMs. The nvSRAM is a memory technology that combines a high-speed SRAM with an equal amount of non-volatile EEPROM on the same chip. During normal system operation, the nvS¬RAM behaves exactly as standard fast SRAM and can be easily inter¬faced to existing microprocessors and microcontrollers. The nvSRAM constantly monitors its supplied power, and if it detects an event that may cause a loss of power, it automatically stores an exact copy of the SRAM’s contents to the on-chip EEPROM in a single, and extremely fast, parallel transaction. Even in the event that power is instantaneously removed from the nvSRAM, a small external capacitor provides sufficient power to the device to ensure that all of the SRAM’s contents are successfully copied to the EEPROM. When power is restored to the system, the contents of the EEPROM are automatically transferred back to the SRAM, returning the system back to the same state as before the disruption of power. Since the vast majority of write operations take place with the on-chip SRAM, there is no possibility of memory degredation. With


April 2008

INDUSTRY Insight 200,000 cycles of endur¬ance, the NV cell can withstand more than 50 power interruptions per day over the typical 10-year lifetime of a semicon¬ductor device—a situation that would never exist with this kind of system in the real world. nvSRAM devices combine the very best in high speed, low power and the ultimate in robust and safe data storage. Used for years in the military and avionics markets, the nvSRAM is now firmly entrenched in the medical marketplace and brings the same solid reliability to remote patient treatment and monitoring, ensuring that equipment settings and vital patient information can be stored and retrieved in the event of any power interruption.

plished by simply reading the RTC registers that are mapped to the highest 16 memory addresses of the SRAM. Reading the time is as simple as reading any other SRAM address. Infusion pumps are just one of many medical applications that can benefit from the nvSRAM. In any medical equipment application where the safety of the patient is at risk, the system’s non-volatile memory is of paramount importance. The nvSRAM offers an attractive non-vola-

Simtek Colorado Springs, CO. (719) 531-9444. [].

New Rugged, Reliable Servers for Mission-Critical Applications

Designing with nvSRAM

Designing with nvSRAMs is straightforward since the nvSRAM mimics the operation of an SRAM. An industrystandard address bus and a 16-bit or 8-bit data bus are accompanied by three control lines: write enable (/W), chip enable (/E) and output enable (/G). Consequently, the nvSRAM can be interfaced to virtually all standard microprocessors, FPGAs, or DSPs with little or no interface logic or memory wait states. Figure 2 depicts a typical interface connection between the nvSRAM and a microprocessor, FPGA, or DSP. Depending on the particular device, the interface may directly connect to the nvSRAM. In other instances, simple decode logic can be used to drive the nvSRAM control signals. The nvSRAM is well suited to supply the program or data memory space or act as the configuration device for an FPGA, making system design even easier. Further integration and board space savings are possible by utilizing Simtek’s nvSRAM with on-chip real-time clock (RTC). A high-accuracy, full-featured RTC is combined with the nvSRAM in an ultra-reliable monolithic integrated circuit. The real-time clock function provides an accurate clock with leap year tracking and a programmable, high-accuracy oscillator. A programmable alarm function is available for one-time alarms or periodic minutes, hours, or days alarms. There is also a programma¬ble watchdog timer for processor control. Writing to the control registers or reading the time is accom-

tile memory alternative that provides fast access times, non-volatility, small form factor, low power, high MTBF and zero maintenance. Ease of design, and an optional integrated RTC, can provide additional savings in cost, physical space and increased system reliability.

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3RU RES Servers - 1 or 2 AMD Opteron or Intel Xeon CPUs (dual- and quad-core processors) - Up to 32GB ECC SDRAM - Up to 5 removable HDD - Vibration – 0.9g from 10 – 2000Hz - Shock – up to 25G @ 40ms

For Sun® Solaris™, Linux®, and Microsoft® Windows® environments When it comes to computing in harsh environments, nobody is more at home with its surroundings than Themis Computer. For over a decade, Themis has delivered high performance, high availability computing for the most demanding military, aerospace and communications applications. Themis’ new family of 1RU, 2RU and 3RU Rugged Enterprise Servers™ (RES) includes the latest dualand quad-core processors from AMD and Intel, offering ruggedized systems with the fastest, widest range of performance options and scalability. Themis servers provide far greater reliability, improved life cycle management and substantially lower TCO than other COTS systems solutions. For more information on rugged Themis servers and its new family of scalable blade systems featuring innovative CoolShell Technology™ please visit us at or call (510) 252-0870

Transformational. ©2008. Themis Computer, Themis, the Themis logo, Rugged Enterprise Servers, and CoolShell Technology are trademarks or registered trademarks of Themis Computer. All other trademarks are the property of their respective owners.

Untitled-3 1

April4/13/08 2008


4:01:16 PM


10 Gigabit Ethernet

10 Gigabit Ethernet: Integrating a Standard Protocol into High-Speed Real-Time Systems When it comes to 10 Gigabit Ethernet, the demands of embedded applications, such as real-time record and playback systems, have more requirements than mass-market network applications. Close attention to hardware capabilities and software features is essential.


er exploration ther your goal speak directly cal page, the ht resource. echnology, s and products

by R  ob Kraft AdvancedIO


hanks to the universal nature of Ethernet, the 10 Gigabit Ethernet (10GbE) standard promises developers new levels of portability and easier software maintenance at a speed that has nevernow been experienced before. This high-speed, ubiquimpanies providing solutions tous technology has formed a new baseline, and many developers ploration into products, technologies and companies. Whether your goal is to research the latest areorlooking waystechnical to introduce into ais number pplication Engineer, jump to a for company's page, thethis goal technology of Get Connected to put you rvice you requireofforhigh-performance whatever type of technology, real-time applications. anies and products youOne are searching for. such application—as an interconnect for high-bandwidth sensors—is a data plane domain where earlier generations of Ethernet were unable to compete against the likes of (serial) Front Panel Data Port (sFPDP) and Fibre Channel. Now, as 10GbE with its superior speed and facility for bidirectional, full-duplex communications pushes into these applications, the equipment used along with these sensor networks, such as high-speed real-time data record and playback systems, require 10GbE interfaces. 10GbE interfaces are somewhat more complex than earlier generations of Ethernet. Due to the interface’s sheer speed, processors would be entirely consumed running the 10GbE protocolGet stacks. Because of this, most 10GbE implementations Connected companies in this article. coprocessor to achieve use somewithform of amentioned protocol offload high data transfer rate performance and reduce processor utilization. The offload coprocessor, such as an ASIC or FPGA,

End of Article

Get Connected with companies mentioned in this article.



April 2008

Sensor 10GE


Signal Processing System

Memory & 10GE Control Interface PCIe/ PCI-X

User Interface

Fibre Channel Interface

JBOD/RAID Array of Fibre Multiple Discs Channel

High-Speed Record/Playback System

Figure 1

Block diagram of a typical high-performance realtime record and playback system with a 10GbE interface being used in an application. When used in applications like signals intelligence, raw sensor data is often sent in parallel to “live” signal processing and to the recording system for further off-line analysis and post-processing. Systems may have multiple sensor channels and timing/ synchronization signal inputs (not shown).

performs the heavy lifting of the protocol, reducing the burden on the CPU. Integrating a 10GbE interface into a realtime record and playback system really involves integrating an offload coprocessor. High-speed real-time data record and playback systems capture relatively large quantities of data from systems or sen-


To determine the size of burst that can be handled in a dynamic system that is being filled and drained simultaneously, given a physical buffer of size input_buffer_size, a given input burst rate, and constant output rate (rate of draining the physical buffer from the other side), use the following equation: burst_size = input_rate x [input_buffer_size / (input_rate - output_rate)] Consequently, this implies a sustained data rate (assuming the rest of the path can keep up) of: Sustained_rate = burst_size / [burst_duration + drain_duration], where • burst_duration = burst_size / input_rate, and • drain_duration = input_buffer_size / output_rate

Figure 2

Figuring the buffer size needed to accommodate data based on buffering and input/output rates.

10GE Physical

Interface to External Time Tag

Time Stamp Interface Protocol Engine

Customizable Protocol Offload

FPGA Buffering for line rate input

SDRAM Control

Playback staging 512MB SDRAM PCIe

Figure 3


Block diagram of an FPGA-based 10GbE XMC/ PMC module, illustrating the implementation of the features required for high-speed data record and playback applications.

sors. The data typically is used for offline analysis or is replayed into a system for training, testing, simulation, or development. Figure 1 contains a block diagram of a typical system. The record and playback systems have some unique functional and performance requirements, which in turn impose some requirements on the 10GbE interface. Notably, these 10GbE interface requirements differ significantly in several key application-level and hardware-level areas from the requirements typical to 10GbE interfaces used in the large serverbased markets,

Time-Stamping and Playback

A common requirement in high-speed recording systems, especially multichannel systems, is to accurately time-tag the data with a sufficient level of accuracy. The tagging is used during offline analysis, to enable the alignment of data recorded from multiple sensors. It is also of use during playback, to simulate the re-injection of data into the system with the same timing fidelity with which it was originally captured. Accomplishing this time-tagging task presents two challenges. The first is to find a means of tagging the packets with


April 2008

sufficient accuracy and precision. When the time-stamp accuracy requirements are sufficiently high—a few microseconds or less—it is not satisfactory to stamp the packets at the application software layer, which is the most straightforward access layer. By the time they reach this layer, they have already made a trip through a PCI-X bus or PCIe fabric, processor memory, possibly a processor cache, and an operating system. This trip is subject to variable latency of a magnitude exceeding a few microseconds, making the solution intolerable. Assuming recorded packets have been accurately time stamped, a second challenge hinges on meeting precise timing constraints during playback. A typical approach that relies on a processor pulling the data from system memory, flowing it up through the protocol stack, and sending it out over a 10GbE interface, suffers from the same non-deterministic latency that occurs when you time-stamp the application at the software level. This approach will not achieve the required precise playback timing. Instead, the solution to the recording time-stamp precision/ accuracy is to provide an interface to stamp the packets immediately after they arrive over the 10GbE wire. There they can be deterministically tagged before reaching any buses, fabrics, or processors. The playback precision challenge is solved by having an interface and memory located in the outbound path immediately before the 10GbE wire. Outbound packets can be moved from the recorder and staged in the memory ahead of time, and their release onto the wire precisely gated. Note that ASICs designed for commodity 10GbE NIC cards generally do not support hardware interfaces for packet timestamping or playback staging. This leaves access for tagging at the socket layer only, which is insufficiently accurate.

Recording Full Ethernet Frame

Some Ethernet record and playback applications require payload data to be transported using the standard protocol. Another class, however, captures the entire Ethernet frame, which includes the packet headers as well as the payload (“raw sockets”). Capturing the full frame is common in intelligence or security applications, where the nature of the traffic is of interest, or in applications where the traffic is collected to be replayed later into a simulation, training, or hardware-in-the-loop test system in place of live data sources. For these applications to achieve the required data rates, the software for handling these “raw sockets” must be optimized in its interaction downward to the Ethernet interface hardware and upward to the recorder application. Aspects that can be optimized include minimizing instructions and memory copying when passing the incoming buffers up to the application, and optimizing the user application’s control over manipulating and freeing received input buffers. This level of optimization requires that the driver software be designed with intimate familiarity of the 10GbE interface hardware. Integrators planning to port drivers for 10GbE interfaces into data record/playback applications should consider these aspects for achieving performance.


Figure 4

The V1021 XMC/PMC 10GbE module with SFP+ optical interface has the architecture shown in the block diagram of Figure 3.

Recording â&#x20AC;&#x153;Corruptâ&#x20AC;? Packets

Typically, a recorded stream of sampled and digitized sensor data is destined for signal processing algorithms such as filtering, FFT, decoding, or to other processing required for detailed analysis. Some of these algorithms are able to correct for or tolerate a number of scattered errors, but are not amenable to a consecutive swath of missing data. As a simple example, consider your own tolerance for missing a few [sic] lttrs fom ths sentnc verss msing an entire gr. Ethernet protocol stacks, however, are designed to discard individual packets or entire messages if an error is detected in a checksum, or if a message arrives incomplete. This means discarding anywhere from a series of 1500 or 9000 (depending on the MTU size) to 64000 consecutive bytes, depending on the type and layer at which the error occurs. Ironically, the source of this error could be just a small change in a packetâ&#x20AC;&#x2122;s header, which does not affect the integrity of the payload data of interest. While this behavior makes good sense in most network applications of Ethernet, where higher protocol or application layers deal with it, it is not ideal for these kinds of recording and sensor processing applications. Therefore, when it comes to high-speed recording of sensor data, a solution that permits the option of recording all packets, even those with errors, can be essential. Note that 10GbE ASICs, which are designed for the large majority of network applications that do not require this specialized option, typically do not implement it.

Hardware Interface Challenge and Solution

Recording real-time sensor data over 10GbE often brings with it the prospect of receiving multiple consecutive packets burst at full line speed, without the option of controlling the flow by asking the sensor to pause its transmission. This lack of control occurs when sensors have simplified 10GbE inter-

Austin_01.indd 1

April 2008


3/18/08 3:00:03 PM


faces that do not respond to flow control or simply because they do not have resources to buffer the samplesâ&#x20AC;&#x201D;characteristics unique to real-time embedded applications and foreign to the world of servers for which most 10GbE ASICs and NICs were designed. In applications where there is sensor fusionâ&#x20AC;&#x201D;several sensors are simultaneously transmitting over the network to the same recorder 10GbE nodeâ&#x20AC;&#x201D;the amount of consecutive linerate burst data increases significantly. A 10GbE interface used for this application must be designed with sufficient local data buffer to accommodate the line rate burst data without relying on access (typically over PCI-X or PCIe) to the host system memory located externally to the 10GbE card. There is often at least momentary contention for accessing system memory, and if the 10GbE card has insufficient local buffering, it would overflow and the card would be forced to drop the incoming packets. It is important to recognize that this overflow can occur at arbitrarily low sustained data rates. For instance, radar sensors receive a burst of signals for a short duration, followed by a longer period of quiet. If such a recorder receives 100 Kbytes at 10Gigabit line rate every 100 ms, the sustained rate is only 1 Mbyte/s. But for the duration of that 100 Kbyte burst, which is 80 Âľs, the card must be able to handle all of

the incoming data even if it cannot access the system memory. The equations in Figure 2 help determine the burst size that can be accommodated based on buffering and input and output rates. High-performance embedded real-time applications such as high-speed record and playback place some unique demands in their use of 10GbE for the real-time data plane. To effectively address these demands, products architected for this space must implement features including interfaces for precision timestamping, the placement of memory to accommodate large fullrate inbound bursts and outbound data staging, and the ability to customize stack behavior for receiving real-time sensor data (Figure 3). Generally, commodity NIC cards and the ASICs they are based on are optimized for a different set of application requirements, and therefore do not implement all of the required features. However, carefully designed 10GbE products can facilitate the use of the latest incarnation of widespread Ethernet in highperformance real-time applications (Figure 4). AdvancedIO Vancouver, BC. (604) 331-1600. [].

4 channels of uncompressed video via USB | Model 2255

* Little or no latency * Simultaneous capture from 4 composite video sources * Total capture rate of 60 frames/sec from all channels for NTSC 2 channels at 30 frames/sec each, 4 channels at 15 frames/sec each * Full frame rate capture on all channels in monochrome or scaled down modes * Multiple output formats and resolutions * Powered through USB * Easy to use API; multiple units supported by the driver. * Linux and Windows SDK

1 38Untitled-5 April 2008

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industry wat c h


Microkernel-Based Virtualization Meets Embedded Security Challenges By implementing virtualization at the microkernel level, developers can build on embedded virtual machine technology as a platform for enhancing security while hosting very different kinds of operating systems.


er exploration ther your goal speak directly cal page, the ht resource. echnology, s and products

by G  ernot Heiser Open Kernel Labs


ow more than ever, embedded systems developers and device OEMs face complex requirements for features and functionality in next-generation intelligent devices. In these emerging embedded applications, the size, scope and delivery costs of device software frequently outstrip investment in the hardware on which that software executes. Moreover, these mpanies providing solutions now and other devices are increasingly interconnected across wireline ploration into products, technologies and companies. Whether your goal is to research the latest andor wireless LANs and WANs to ofthe This of pplication Engineer, jump to a company's technical page, and the goal GetInternet. Connected is tomix put you complexity and connectedness poses significant chalrvice you requiresoftware for whatever type of technology, anies and products you arefor searching lenges devicefor.robustness and integrity: complexity leads to more exploitable bugs while connectivity provides more avenues for exploitation. In a similar vein, responding to growing and pervasive threats to the security of intelligent devices and to content deployed on them, the embedded marketplace is confronting a new wave of security requirements. These emanate from a range of constituencies, including carriers, operators and content providers and ranging up to retail channels, financial institutions all the way to consumers. Most embedded developers, while familiar with the basics of security, do not possess the expertise needed to “lock down” systems based traditional RTOSs, on embedded Linux, or other Geton Connected companies in this article. pervasivewith OSs, if thismentioned is possible at all. Developers and OEMs must meet real needs for security, but lack the tools to secure their device applications.

End of Article

Get Connected with companies mentioned in this article.



April 2008

Guest Apps

Guest Apps


Guest OS Virtual Machine 0

Guest OS Virtual Machine N

Virtual Machine Platform

unprivileged privileged

Virtual Machine Monitor Embedded Hardware

Figure 1

Guest OSs and Applications.

Introducing Embedded Virtual Machines

System virtualization technology provides a software environment in which several “guest” operating systems can run as if each owned a complete hardware platform. Such virtual machines (VMs) abstract available system resources (memory, storage, CPU core(s), I/O, etc.) and present them in a regular fashion, such that “guest” software cannot distinguish VM-based execution from running on actual physical hardware. The VM is implemented by a software layer called virtual-machine monitor (Figure 1). This virtual machine monitor is sometimes popularly referred to as a hypervisor, but in this context we reserve that term for a more specific function.

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Guest Apps

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unprivileged privileged

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Co-location Platform

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Figure 2

OS co-location increases the amount of privileged code.

Virtualization is a “killer app” enabler in the enterprise and on the desktop, conferring benefits in load balancing, server consolidation, legacy code migration, cross platform interoperability, and also security. In the last two years, virtualization has also made key inroads in embedded applications. Contrary to the enterprise, virtualization in embedded systems is motivated by the co-existence of a fixed set of vastly different operating systems (low-level bare-bones RTOS and high-level application OS) rather than the dynamic creation and destruction of similar OS environments. Other motivations are architectural abstraction and, increasingly, security.

Virtual Machines as a Security Platform

In the enterprise, IT managers employ virtualization to realize two types of secure computing: as a safe “sand-box” in which to let loose and study viruses, worms and other invasive threats, and as a means to limit damage and response degradation inflicted by denial-of-service (DoS) at-tacks, by isolating and throttling (virtual) machines that host the targeted servers and services. In embedded applications, developers can also benefit from virtualization as a security tool by using it to isolate application OSs, like Linux, BSD or Windows, from the relatively defenseless RTOS, which runs the critical real-time environment.

A microkernel is a generic software layer that supports virtual machines while minimizing the amount of privileged code.

The primary mechanisms by which virtual machines improve security are the segregation of guest OSs into individual virtual machines, enforced by CPU operating modes (privileged/ non-privileged) and memory management units (MMUs). This involves explicit communication channels between VMs with network-like mechanisms. These applications of virtualization are of limited use in many embedded systems due to their resource-constrained nature. It is inherent in VM technology that each VM looks like raw hardware, and needs an OS to support any software. The resource impact of each VM is therefore significant, and most embedded systems can only support a small number of them. Furthermore, the VM model of inter-VM communication, (virtual) network interfaces, is fairly heavyweight and does not match the tightly integrated nature of embedded systems. These limitations mean that an appropriate technology for embedded systems must go beyond virtualization in the tradi-tional sense. Microkernel-based virtualization provides a good match to the requirements of embedded systems, as we will see later, after a look at other approaches to embedded virtualization. The term “virtualization” is frequently used as synonymous

Assertion Method


Functional Specification

High-Level Design

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Refinement proof






Table 1


Figure 3

CC evaluation levels for requirements and functional correctness vs. refinement proof approaches. April 2008


to virtual-machine technology. However, virtualization is far more general, and this can create confusion. A VM (also called a “system VM” to distinguish it from “process VMs” such as Java virtual machines) virtualizes a complete computing platform, consisting of processor, memory and peripherals. System virtualization is what provides the encapsulation that can be leveraged for security. Approaches that virtualize less than the complete platform do not have these benefits. Modern microprocessors offer at least two modes of program execution (a.k.a. rings)—system mode (privileged) and user mode (unprivileged). To enjoy any security benefits from deploying VM technology, all guest execution environments must host OS and program execution exclusively in user mode, as otherwise the (potentially compromised) guest OS can break out of its “cage,” negating all security benefits. Some system software labeled as “virtualization” implements only rudiments of virtualization. A prevalent example is the virtualization of only the interrupt chain. In this scheme, a rudimentary hypervisor selectively fields interrupts and (re)directs them to one of two “guest” OSs that are otherwise co-located in a single memory map / execution space. The main application is to enhance the real-time responsiveness of an application OS like Linux by handing over real-time operations like baseband or multimedia processing, to a co-located RTOS (Figure 2). Clearly, such an approach, which runs the guest OSs in system mode and is more correctly described as “OS co-location,” provides no security benefits whatsoever. It also complicates debugging, QA and support. Some co-location products provide the option of “isolated” guest execution, at the expense of reduced performance. Promoters of these platforms argue that the virtualization cost should only be paid where it is necessary for security. Given the massive amounts of code running in system mode on such systems (and thus the huge size of the trusted computing base (TCB)), security is weak at best. Furthermore, the overhead of well-designed virtualization platforms is low enough that it does not make sense to trade away security for performance in this way.

Microkernel Functioning as a Hypervisor

Traditional VM technology uses a monolithic hypervisor, running in system mode, which performs all virtualization operations, manages all resources and enforces security. Device drivers are part of the hypervisor, making it quite large. The advantage of this approach is that any virtualization event only requires a single hypervisor invocation, similar to a system call in a traditional OS. Alternatively, a special VM (often called Dom-0) runs a trusted guest OS containing the drivers, which reduces the size of the hypervisor but expands the size of the TCB (by the trusted guest) well beyond the size of a traditional hypervisor. Virtualized I/O operations in this approach require communication with Dom-0. A variant of the second approach is the use of a microkernel as the basis for the hypervisor. A microkernel is a generic platform on which arbitrary systems can be built. It is characterized as only containing code that must execute in system mode, and

Building on the OKL4 Microkernel Open Kernel Labs offers an embedded virtualization platform based on OKL4, a version of the L4 microkernel. By building on a solid microkernel foundation, OKL4 supports: • All guest OSs running securely in user-mode VM partitions • Lightweight execution environments for clean separation of drivers and security-critical components such as crypto services. These can also be used to break complex subsystems (like the baseband stack) into several mutually protected components in order to improve system robustness. • Fine-grained control over guest OS and application privileges to implement security poli-cies • Secure and high-performance (zero-copy) inter-partition communication mechanisms among virtual machines and lightweight execution environments, subject to a system-wide security policy that can be tailored to the requirements of the particular system. • Size and scope of microkernel code amenable to formal verification. This work is in pro-gress, with a firstever fully verified general-purpose kernel expected in Q3/2008.

only providing general mechanisms, no actual services. Any service is implemented as a user-mode server, running in a normal, unprivileged address space. In such an approach, some of the virtual-machine monitor code is itself in user-mode components, as are all device drivers (Figure 3).

The Microkernel Advantage for Embedded Virtualization

One advantage of the microkernel approach to implementing virtual machines should be obvious from the above: the privileged code is minimized, which is good for security. There are other advantages, which result from the small size of the kernel, its high-performance communication primitives, and its generic nature. The traditional strength of virtual machines, and the main reason for their popularity in the enterprise space, is their strong separation. In embedded systems, however, communication between subsystems is frequent and critical for performance. Hence, a set of robust, secure, lightweight and fast communication channels for inter-partition communication is required, beyond the VM-style communication via virtual NICs. A modern microkernel provides ultra-fast message-passing primitives, as well as the ability to set up shared-memory regions for zero-copy bulk data transfer. In order to maximize security, all inter-partition communication, whether by message passing or shared memory, must be subject to a security policy that can be tailored to the requirements of the particular embedded system. In embedded software as in human intelligence operations, the key to tight security is compart-mentalization. April 2008



Featuring the latest in FPGA Platform technology ADM-XRC-5T2

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Alpha Data Inc. Phone: (408) 916-5713 Fax: (866) 820-9956

Mid-size, single wide, fully-connected Advanced Mezzanine Card High-density Altera Stratix II GX FPGA BittWare’s FINe bridge providing control plane processing and interface via GigE, 10/100 Ethernet, and RS-232 Over 1 GByte of DDR2 SDRAM One bank of QDR2 SRAM (up to 9 MBytes) Front panel I/O -- 10/100 Ethernet, RS-232, JTAG port for debug support, 4x SerDes BittWare I/O Module: 76 LVDS pairs, 4 SerDes, Clocks, I2C, JTAG, DIO

BittWare, Inc. E-mail: Web:

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Hybrid Signal Processing COTS Boards

BittWare, Inc. Phone: (603) 226-0404 Fax: (603) 226-6667

Supporting AdvancedMC,3U/6U CompactPCI,VME,PCI,and PMC form factors High-density Altera Stratix II GX, Stratix II, and Cyclone II FPGAs Analog Devices ADSP-TS201S TigerSHARC® processors BittWare’s ATLANTiS FPGA framework providing I/O control BittWare’s FINe bridge providing control plane processing and interface Applicable for Communications, Defense/ Aerospace, High End Instrumentation, and Life Sciences industries E-mail: Web:

FreeForm - Reconfigurable FPGAs PC/104 and PCI-104 form factors Uses the Xilinx Spartan-3E or Virtex-5 reconfigurable FPGAs Standard or custom cores available Features include; up to 3 million gates, 96 digital I/O or 64 single ended 32 LVDS I/O, flash memory, industrial temperature, counter/timers

Connect Tech Inc. Phone: (519) 836-1291 Fax: (519) 836-4878


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VPX-based, FPGA/PowerPC-based module Two Virtex-5 LXT FPGAs Multiple SRAM and SDRAM memory blocks per FPGA Dual-core Freescale 8641 Serial RapidIO switched fabric Full-featured BSP and FPGA development kit Rugged air- and conduction-cooled variants

Curtiss-Wright Controls Embedded Computing

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Virtex-5 SXT-based processor Mezzanine Attached SRAM and SDRAM Front- and rear-panel serial and LVDS links PCI Express Full-featured driver and FPGA development kit Rugged air- and conduction-cooled variants available Ideal adjunct processing module

Curtiss-Wright Controls Embedded Computing Phone: (703) 779-7800 Fax: (703) 779-7805

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While it is tempting to give a single guest exclusive dominion over I/O, or to divide peripheral interfacing between two contexts, trusted and untrusted, the greatest security benefit arises from isolating access to physical memory address and memory-mapped I/O down to individual devices. Rather than assigning I/O devices and streams to individual guest OSs, per-device isolation confers the greatest security and also supports selective and secure sharing of I/O among guest OSs. This is achieved by isolating drivers into individual address spaces, and mapping to each driver only the registers of the device it controls. As a means to substantiating supplier and developer claims for software and system security, OEMs increasingly look to security standards like the standard Common Criteria for IT Security Evaluation, ISO/IEC 15408 (a.k.a. CC). While virtualization does not itself confer particular levels of CC conformance, a microkernel-based hypervisor platform greatly facilitates security evaluation and certification by reducing the scope of the TCB to manageable, verifiable and testable code sets. It also enables minimal, well-defined communication channels among partitions, subject to a security policy that is defined as a user-level component. This means that the security policy can be adapted to a particular use case without changing the kernel—and thus without re-certifying the kernel. This line of thinking leads to what is arguably the strongest advantage of a microkernel-based approach—the potential for complete formal verification using a mathematical technique called a refinement proof. The microkernel is small enough that it becomes possible to construct a mathematical proof of the correctness of its implementation (in other words, a proof that the C/assembler code correctly, without bugs, implements its specification). A refinement proof goes well beyond the requirements of CC, even at the highest evaluation level, as shown in Table 1. As the microkernel only provides mechanisms—no services or policies—it is a generic platform resembling hardware; the same microkernel can be used without change in many dramatically different application scenarios. This is a key prerequisite for making formal verification feasible. The expense of the proof is only needed once. Virtualization, until recently a technology targeted only at enterprise and desktop, today finds expanding roles in embedded design. While providing a versatile platform for legacy code preservation and migration, hardware consolidation, system resource management and sharing, probably the greatest benefit conferred by virtualization on embedded systems design lies in en-hancing security. A range of security and trustworthy computing capabilities are inherent in embedded virtualization, but only by building on microkernel technology can a virtualization platform adequately and effectively meet current and emerging needs for embedded security. Open Kernel Labs Chicago, IL. (650) 331-1862. [].

FPGA PLATFORM SHOWCASE Featuring the latest in FPGA Platform technology Model 7141 Setting the Standard for Digital Signal Processing

PMC/XMC Transceiver Offers Complete Software Radio Solution Two 14-bit, 125 MHz A/Ds Four digital downconverters One digital upconverter Two 500 MHz D/As Virtex-II Pro FPGA Sync bus for multiboard synchronization Conduction-cooled version available Pentek ReadyFlow®: Board Support Package Pentek GateFlow®: FPGA Design Kit and preinstalled cores

Pentek, Inc. Phone: (201) 818-5900 Fax: (201) 818-5904

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VPF2 Freescale Power Architecture MPC8641D node 2x Xilinx Virtex-5 (LX110T/SX95T) FPGA nodes VXS/VITA 41 high-speed interconnect fabric XMC/PMC site latest generation local I/O Air or conduction cooled rugged versions

VMETRO, Inc. Phone: (281) 584-0728 Fax: (281) 584-9034

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MM-7115 PMC FPGA Compute Node Xilinx Virtex-4 LX200 and LX160 FPGAs 512MB or 1GB DDR II memory with ECC PCI/PCI-X bus interface Device Drivers available for Linux, VxWorks®, and Windows® Rugged Air Cooled and Conduction Cooled versions

VMETRO, Inc. Phone: (281) 584-0728 Fax: (281) 584-9034

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Wireless Sensor Network Offers Internet-Like Scalability

A wireless sensor network (WSN) is able to address large-scale enterprise applications by forming large, resilient IP-based WSNs and letting users centrally manage collections of those WSNs as an integral part of the enterprise IP infrastructure. PhyNet from Arch Rock is an IP-based platform that implements a tiered WSN architecture and eliminates the need to co-locate individual sensor networks with the server-based functions that control them. It accomplishes this by placing a scalable internetworking tier—the first “WSN router”—between them. Sensor applications can now reside half a world away, across a corporate campus or in the next room, communicating with any number of WSNs across local- or wide-area IP networks. The PhyNet platform’s tiered architecture includes three major components: the PhyNet Server, the router and the IPserial Node. The PhyNet Server translates embedded sensor applications into Web services and provides a suite of Web-based applications for the setup, diagnostics and management of multiple WSNs. Users can view sensor data and events from all WSNs; generate a deployment map; discover, register, move and configure nodes; enable/disable sensors or show their battery status; graphically display performance statistics; and set reporting intervals, thresholds and alerts. The PhyNet Router is an embedded networking device connecting 6LoWPAN mesh networks via Wi-Fi and Ethernet interfaces to diverse WAN links, which allows the physical separation of sensor node deployments and their server-hosted applications. The router establishes an Internetworking backbone by forming and adaptively configuring the routing table to reach all nodes in a WSN mesh. Supporting native IPv6 to the sensor nodes, it handles IPv4-to-IPv6 protocol translation, provides packet encryption/decryption and authentication, and supports over-the-air (OTA) programming and provisioning of nodes. Arch Rock’s new IPserial Node allows WSN users to connect to smart digital sensors such as digital meters and thermometers, weather stations, biometric equipment; to a broad set of instruments and data loggers with RS-232 and RS-485 interfaces; and to sensing and control systems that use legacy wired buses (e.g., ModBus) equipped with serial interfaces. This node lets users take advantage of a broad array of highly precise, small-footprint digital sensors that can be mixed and matched with existing analog sensor nodes using expansion ports to form a highly diverse WSN. Within a given WSN, as the number of sensors and the collected data increase, users can deploy several PhyNet Routers—the equivalent of having multiple edge routers aggregating a set of wired local net-


April 2008

works. With dynamic routing and full redundancy across all PhyNet Routers deployed at the WSN edge, a node will dynamically find the best path to its destination and automatically circumvent any breaks in connectivity due to changes in the radio environment or in neighboring nodes. An entry-level system priced at $7,995 includes one PhyNet Server, two PhyNet Routers, 10 IPsensor Nodes (analog) and two IPserial Nodes. The system can be scaled through the addition of individual components. Arch Rock, San Francisco, CA. (415) 692-0828. [www.archrock].com.

Rugged 6U VXS/VITA41 DSP Board Teams FPGAs with DSPs

A rugged, hybrid VXS/VITA 41 signal processing board features two Altera Stratix II GX FPGAs (2SGX90 or 130), two processing clusters consisting of two ADSP-TS201S TigerSHARC DSPs from Analog Devices, and up to 3 Gbytes of DDR2 SDRAM memory. The conduction-cooled GT-6U-VME (GTV6) from BittWare is optimized for highend, multiprocessing applications, while also providing flexibility for future adaptability and for existing and future military applications that require embedded signal processing in a VXS/VITA 41 form factor. With 5 Gbytes/s of simultaneous external input and output, 14.4 GFLOPS of floating point processing power, and the ability to upgrade and adapt the design without any hardware modifications, the GTV6 provides a solution for the highly complex world of signal processing. The GTV6 implements a dual BittWare ATLANTiS framework to interface between the FPGAs and DSPs. Implemented in each Altera Stratix II GX FPGA, ATLANTiS seamlessly integrates the FPGA and DSP processing, allocating the I/O bandwidth among the individual processing units, while also handling all on- and off-board data routing. The dual ATLANTiS framework provides 5 Gbytes/s of continuous throughput and leaves ample FPGA resources for additional processing. At the heart of the GTV6 are two state-of-the-art Altera Stratix II GX FPGAs, each containing up to 132,540 equivalent LEs, 6.7 Mbits of RAM, 252 embedded 18x18 multipliers, 63 DSP blocks and 8 PLLs. Each FPGA provides pre-, post-, or co-processing to complement one TigerSHARC processing cluster, while also enabling seamless routing of the TigerSHARC I/O at a rate of over 2 Gbytes/s via BittWare’s ATLANTiS framework. The GTV6 features two clusters of two ADSP-TS201S TigerSHARC DSPs, which are interconnected by a 64-bit cluster bus running at 83.3 MHz. The ADSP-TS201 processor operates at up to 600 MHz, providing 3.6 GFLOPS of peak processing power. Because of its superscalar architecture, the ADSP-TS201 is also efficient at fixedpoint processing, with each DSP supporting 14.4 BOPS of processing. Along with 24 Mbits of on-chip RAM, each DSP also boasts four highspeed LVDS link ports. BittWare’s FINe bridge chip supports a 32-bit, 66 MHz PCI interface as well as Gigabit Ethernet, giving control plane access to the DSPs, flash and FPGA control registers via the VME bus (using the Tundra Tsi148 PCI-VME bridge) or GigE. The FINe also allows the DSPs low-overhead access to the host, flash and Ethernet. BittWare offers comprehensive software support for the GTV6. The BittWorks software tools provide host interface libraries and a wide variety of diagnostic utilities and configuration tools, and BittWare’s TSLib optimized libraries for TigerSHARC. BittWare’s FPGA Developers Kit is also available with modules for ATLANTiS framework (I/O, routing and processing), memory interfacing and DMAs. Many third-party

tools are also available to support BittWare’s hybrid embedded boards, including Altera’s Quartus II FPGA design flow tool and SOPC builder system-level design tool, and Analog Devices’ VisualDSP++. Real-time operating systems available include Analog Devices’ VisualDSP Kernel (VDK) and Enea’s OSEck RTOS. BittWare, Concord, NH. (603) 226-0404. [].

April 2008




Rad-Hard FPGAs Boast Four-Million Gates

An embedded system designed to travel through space needs electronics that are uniquely suited for the environment. Now even high-density FPGAs are entering that arena. An example is the RTAX4000S device from Actel. This four-million-gate radiation-tolerant RTAX-S FPGA has completed the stringent MIL-STD-883 Class B qualification. The RTAX4000S device has completed 1,000 hours of high-temperature operating life (HTOL) testing and nearly 80,000 total hours of life testing data to date. This device-specific testing data is in addition to the more than 2,000,000 device hours of testing and rapidly accumulating flight heritage achieved by the remainder of the RTAX-S family. The qualification of the device, combined with its usable error-corrected onboard memory and large number of user I/O, make it ideal for high-bandwidth processing applications in spacecraft payloads. Rigorous testing and qualification of the RTAX4000S toward QML Class Q and QML Class V certification continues. Hardened by design against radiation single-event upsets (SEUs), the nonvolatile RTAX4000S requires no radiation mitigation techniques. Competing high-density FPGA solutions require user-instantiated triple module redundancy (TMR), which can consume more than two-thirds of the deviceâ&#x20AC;&#x2122;s available logic. The RTAX4000S offers the inherent flexibility of the programmable fabric, delivering cost and time-to-market advantages over radiation-hardened (RH)-ASICs. Actel, Mountain View, CA. (650) 318-4200. [].

3U PXI Controllers for PXI-Based Hybrid Testing System

Two new 3U PXI controllers are designed to be the core of a hybrid testing system, able to control bench-top instruments through different interfaces (including LXI, GPIB, USB and serial) by integrating multiple I/O interfaces. Introduced by Adlink Technology, the PXI3920/3910 (Intel Pentium M 760) incorporates dual Gigabit Ethernet ports. This feature allows the use of one port for LAN connectivity while the other port provides determinative bandwidth and latency for the connection with LXI instruments. The PXI-3920/3910 also provides a GPIB port, four USB 2.0 ports and two serial ports for controlling instruments using these interfaces. The PXI-3920/391 (Celeron M 760) is designed to maximize stability and durability. The cable-free mechanical construction and onboard soldered CPU and memory chips, in conjunction with a solid-state disk drive, enable the PXI-3920/3910 cards to withstand vibrations up to 6 Grms during operation and allow it to be used in harsh environments such as in vehicle and avionic applications. Adlink Technology, Irvine, CA. (949) 727-2099 [].


April 2008

BDM/JTAG Debug Interface Works with Multiple Processors and Debuggers

The latest addition to Abatronâ&#x20AC;&#x2122;s worldwide BDI family (BDI1000/ BDI2000) of debug interfaces offers high performance and high flexibility. The BDI3000 offers BDM debug support for ColdFire, PowerPC 5xx/8xx and JTAG debug support for PowerPC, ARM, XScale and MIPS. Host communication for the BDI3000 is via RS-232 and Ethernet (10/100). The BDI3000 has fast program download speed up to 1500 Kbytes/s and BDM/JTAG clock up to 32 MHz. The new BDI3000 supports target system voltages from 1.2 to 5V and offers flash memory on board programming. Debuggers from leading vendors are supported by the BDI3000 and the same hardware can be used for all supported targets and debuggers. The BDI3000 is available immediately from Ultimate Solutions, Inc., the stocking distributor of Abatron products in North America. Abatron, Rotkreuz,Switzerland. +41 792 09 55. []. Ultimate Solutions, Tewksbury, MA. (978) 455-3383. [].

AdvancedTCA Backplanes Ready for Radial IPMB

A family of second-generation AdvancedTCA (ATCA) backplanes developed by Elma Bustronic has routing implemented for radial Intelligent Platform Management Bus (IPMB) signals. Radial IPBM provides dual segment access to every IPM controller even when only one shelf manager is present or operational. This is an important option for ATCA systems to provide higher reliability and redundancy. The backplanes also feature 14 slots with a Dual Star routing topology. Bustronic now uses the familiar AMC female connector, used in MicroTCA and other form factors, as the shelf manager connectors. They were chosen because they are widely used, reliable and offer a high pin count in a small space. The connectors are dense enough to be placed next to the slots (called Slot 0) so that they can fit within a card cage for 19” rackmount systems. These edge connectors are stacked on top of each other so that dual shelf managers can be used in the same system, but not take up any slot space. Mesh topology backplanes are also available in 2, 5 and 14-slot sizes standard. Custom versions of Bustronic’s ATCA backplanes are also available. Pricing is under $2,000 depending on volume and configuration. Elma Bustronic, Fremont, CA. (510) 490-7388. [].

COM Express Battery Management Module Extends Operational Lifetime

A new Battery Manager Module from Congatec targets the COM Express standard by providing 12V/70W in addition to 5V/30W from a single 19V supply with suspend to RAM capability. The conga-SBM2C joins the company’s original conga-SBM2 to meet the current demand for a flexible embedded battery management module. While the original conga-SBM2 is suitable for all congatec XTX modules, the 68 mm x 110 mm x 12.5 mm conga-SBM2C module addresses the COM Express specification. The module offers parallel battery operation (sequential on demand) for cell configurations between 2S1P and 4S3P. LEDs provide a direct view of charging and battery capacity status. The battery manager module can be quickly evaluated using the corresponding starter kit, which includes all the necessary cables as well as a Smart battery. With mobile applications designed around the numerous industry-standard embedded computing form factors becoming more prevalent, they may differ in their application areas, but they all share a common feature—the need for intelligent battery management. The conga-SBM2C and its corresponding starter kit enables developers to create power supplies that can maximize operational time between charges, while extending the lifetime and efficiency of Smart batteries. Smart batteries provide performance data, which intelligent management modules like the conga-SBM2C can use to extend the performance of mobile devices. Through their use, catastrophic system failures caused by unexpected battery failures can be avoided, preserving valuable system data and the overall user experience. Congatec, Deggendorf, Germany. +49 991-2700-0. [].

Quad Port Ethernet XMC Adaptor Covers up to 1 Gbit

A quad port gigabit Ethernet adaptor is the first of a series of XMC mezzanine cards, supporting 1000Base-T, 100Base-Tx and 10BaseT. Where performance, functionality and space are key elements, the XM 510/x24 from Concurrent Technologies can be installed on a suitable host board, e.g. CompactPCI, VXS, VPX or VME, to provide four network ports within a single-width XMC site. Commercial and extended temperature versions are available and ruggedized, conduction-cooled or air-cooled versions will be available shortly. The board is suitable for applications requiring highspeed data throughput and lower-latency communications; target embedded markets include industrial control, telecommunications and defense. The XM 510/x24 contains two Intel 82575EB Ethernet Controllers. Each controller implements two Ethernet ports and integrates (into a single device) the functionality of two Ethernet Media Access Controllers (MAC), two 10/100/1000 Mbits/s PHY transceivers and a x4 PCI Express interface. The XMC host board’s connection to the XM 510/ x24’s two Ethernet controllers is via a x4 PCI Express switch. The four Ethernet ports can either connect to the front or to the rear panel. Each MAC and LAN controller provides the Host Offloading and MAC functionality for its link. The Host Offloading includes Transmit and Receive IP, TCP and UDP checksum offloading, TCP segmentation and VLAN support. The MAC Controller provides IEEE 802.3x flow control, 8 Kbyte Transmit and Receive FIFOs to support jumbo frames and a 48 Kbyte per-port packet buffer. Each PHY provides the physical layer functionality for its link and contains the transmitters and receivers for full and half duplex operation at 10Base-T, 100Base-Tx and 1000Base-T operation. Also provided is IEEE 802.3ab auto-negotiation, auto MDI/MDI-X selection and polarity correction. Internal loop-back is available for self-diagnostic purposes. The XM 510/x24 is a single-size card and is compliant with the XMC (Switched Mezzanine Card) specification. Each Ethernet Controller connects to its own 128 Kbyte in-circuit programmable Flash EPROM that includes PXE firmware. The XM 510/x24 supports many of today’s leading operating systems, including Linux, Windows XP, Windows XP Embedded, Windows 2000, LynxOS, QNX and VxWorks. Concurrent Technologies, Woburn, MA. (781) 933-5900. []. April 2008


Products&TECHNOLOGY New AMC Extender Card Aids Test/ Debug

An extender board for MicroTCA and AMC-based systems from Elma Bustronic brings the signals out of the card cage area so that an Advanced Mezzanine Card (AMC) can be tested or debugged. The AMC extender card is a passive extender module, supporting all fabric connectors as defined in the AMC.x and MicroTCA specifications. The board complies with the MicroTCA.0, AMC.1 R1.0, AMC.2 D0.96A specifications and plugs into an AMC slot like a regular AMC module. Management and payload power can be individually switch isolated. The metal frame of the AMC extender card holds the board under test securely in place. The module extends all fabric signals and 3 clock lines, and features virtually zero power consumption. Elma has also released an AMC Load Board and offers a full line of MicroTCA and AdvancedTCA backplanes, chassis, and components. Pricing for the AMC Extender Card is under $850 depending on volume.

Module Offers Dual 14-Bit ADC/DAC I/O

Applications like software defined radio are increasingly hungry for compact, modular data conversion. The GigaFlex 220 from iVeia is a high-speed analog-to-digital and digitalto-analog I/O module designed for the iVeia Titan family of processing modules. The GigaFlex 220 adds two 14-bit 150 MSPS ADCs and two 14-bit 1 GSPS DACs to a Titan processing module creating a small form factor platform ideal for intermediate frequency (IF) processing in SDR applications.

Elma Bustronic, Fremont, CA. (510) 656-3400. [].

PC/104 SBCs Combine High CPU Performance with Advanced Data Acquisition

A family of 2-in-1 compact SBCs with integrated data acquisition combines state-of-the-art CPU and I/O technology with high accuracy analog data acquisition circuitry on a single board, saving space and reducing cost in embedded computer systems. The Athena II SBC family from Diamond Systems is a technology update of the Athena SBC family, bringing additional performance at the same price while maintaining backward compatibility to support long customer product lifecycles. The Athena II family is a plug-compatible replacement for Diamond’s Athena family of SBCs. It utilizes the new Via Mark processor, operating at 500 MHz or 800 MHz, an improvement over the Athena speeds of 400 MHz and 660 MHz. It offers 256 Mbytes of DDR2 DRAM operating at 533 MHz (vs. 128 Mbytes on the older models) soldered onboard for increased shock and vibration resistance. Built-in I/O includes a 10/100 Mbit/s Ethernet controller, VGA/LCD display, four USB 1.1 ports, four RS-232 serial ports (two with RS-485), keyboard, mouse and IDE hard drive interfaces. Athena II’s integrated data acquisition functions utilize Diamond’s autocalibration technology to calibrate the A/D and D/A circuits providing analog I/O performance with the maximum possible accuracy. Athena II has 16 analog inputs with 16-bit A/D and 100 KHz sample rate, four analog outputs with 12-bit D/A and 100 KHz waveform output capability, 24 digital I/O lines and two counter/timers. It supports interrupt A/D transfers and uses an enhanced FIFO for maximum flexibility and data reliability. Diamond’s Universal Driver programming software for Linux, Windows XP and CE .NET is included. Also available for immediate delivery are new, comprehensive Athena II Development Kits and the Pandora enclosure for Athena II. Each kit contains the selected Athena II SBC, an IDE flashdisk with Linux pre-loaded, all necessary cables, an AC adapter and detailed “getting started” documentation. Prices start at $575. Volume discounts are available. Diamond Systems, Mountain View, CA. (650) 810-2525. [].


April 2008

Only 2.125 x 3.525 x 4.25 inches in size, the module has advanced clock generation circuitry that allows the software to independently set the sample rates of the dual ADC and dual DAC to almost any frequency. The GigaFlex 220 has a clock generator that can phase-lock to the onboard 10 MHz TCXO reference or an optional external reference. Through the Digital I/O Connector, the GigaFlex 220 provides one to two RS-232 UARTs and five bidirectional general-purpose I/Os (GPIOs). The GPIOs may be used for time (1 PPS, IRIG-B and so on), synchronization, or custom userprogrammable I/O. The product operates over temperature ranges of -40° to 85°C. iVeia, Annapolis, MD. (410) 858-4560. [].

ATX Motherboard with AMD Quad Core and 1080p HD Graphics

An ATX motherboard offers the AMD AM2/AM2+ socket supporting AMD Phenom Quad Core processor performance and the latest AMD chipsets with high-end graphics features for full 1080p High-Definition Video in a cost-effective basic motherboard design. As the first in a new class of so called “basic motherboards” from Kontron, the KT780/ATX is designed for highvolume OEM systems that have fast innovation cycles and therefore reduced requirements on long-term availability. The motherboard offers up to three years availability. Based around the AMD RS780 and SB700 chipsets including high-performance AMD AM2/AM2+ Athlon 64 and Phenom single, dual, triple and quad core processors, the Kontron KT780/ATX basic motherboard offers scalable performance up to 4x 2.6 GHz to meet individual application requirements. Performance is boosted even further by two dual channel RAM banks for up to 32 Gbytes of DDR2-400/533/667/800 with ECC support. In addition to low-cost processor performance, applications also benefit from the high-end graphics features. The new integrated graphics processor (IGP) is based on the ATI Radeon HD 3200, which supports DirectX 10 and incorporates dual display, integrated DVI, HDMI (optional) and CRT as well as internal TMDS (Transition Minimized Differential Signaling) and VESA DisplayPort functionality. Furthermore, it has a Unified Video Decoder (UVD) for accelerated decoding of HD video data for enhanced Blu-ray and HD-DVD playback. Should even greater performance be required, external graphic cards can be connected via the PEG PCI Express 2.0 expansion slot. Despite emphasis on a low-cost, basic design, the Kontron KT780/ATX basic motherboard offers a range of features such as HDD RAID 0/1/5/10 support for enhanced data safety, HD audio and TPM on board. 6 x SATA, 1 x PATA 133, 10 x USB 2.0, 4 x PCI, 1x PCI Express x4 slot and 2 x GbE onboard round off the range of I/O features. Equipped with HyperFlash support for fast OS booting, the KT780/ATX supports Windows XP, Vista and Linux. The Kontron KT780/ATX will be available in Q2, 2008. Kontron, Poway, CA (858) 677-0877. [].

Upgraded AMC Serves Up Core2 Duo

The AdvancedMC (AMC) mezzanine form factor is ramping up acceptance among industrial application designers. This trend will only increase as MicroTCA gains momentum as a backplane solution for AMC slot cards. Performance Technologies has announced an update to its AMC121 AMC single-board computer that utilizes an Intel Core 2 Duo processor. The upgraded module features a substantial increase in memory capacity—up to 4 Gbytes of 64-bit PC3200 DDR2 memory, as well as support for faster, user-replaceable, flash memory devices. The flash memory compatibility includes support for both standard MiniSD and high-capacity MiniSDHC modules and can be swapped out depending upon user requirements. This socketed option provides enhanced user flexibility to meet design requirements as opposed to permanently affixed flash memory devices that could limit module performance. The AMC’s connector ports include two 1 Gbit to 2.5 Gbit Ethernet Channels, a pair of SATA links and eight PCI Express Lanes—x1, x4, or x8. Performance Technologies, Rochester, NY. (585) 256-0200. [].

Multiview Display Does 1920 x 1080p HD

Complex real-time video and graphics data are becoming ever more ubiquitous in industrial environments. Zandar Technologies offers a set of multimedia display solutions, including its FusionPro+ multiviewer. Zandar Technologies was recently acquired by Harris, and together they now offer a wide range of multiviewers. The FusionPro+ multiviewer is part of the new family of multiviewers offered by Harris. It is a multi-image display solution for mission-critical security monitoring and surveillance. The 1RU unit displays up to eight channels, and the 3RU unit displays up to 26 channels. The FusionPro+ can take any mix of analog, SDI, HD-SDI and computer inputs, and display them on a single screen with output up to HD (1920x1080p). An additional feature is the ZdH Dual output option. In addition to the FusionPro+, the new range of multiviewers by Harris Corporation includes the recently introduced Zandar Predator II multiviewer. Specifically designed for control and monitoring, the 2RU Predator II multiviewer can handle up to 32 HD, SD and analog inputs and is perfectly suited for various applications, including command centers, master control, AV applications, security monitoring and surveillance. Harris, Melbourne, FL. (321) 727-9100. [].

April 2008


Products&TECHNOLOGY Digital Instrumentation Set Leverages USB

Where once large racks of boards were needed, now complex test platforms can be implemented with USB-based modules hosted by a PC. National Instruments has introduced its NI USB-5132/5133 digitizers and the NI USB-4065 6½-digit digital multimeter (DMM). These small, lightweight instruments feature bus-powered and plug-and-play operation, which makes them ideal for portable, benchtop and OEM applications. They also are shipped with NI LabView SignalExpress LE interactive measurement workbench software for quickly acquiring, analyzing and presenting data with no programming required. The USB-5132/5133 50 Msample/s and 100 Msample/s digitizers offer two simultaneously sampled channels with 8-bit resolution. These USB digitizers feature 10 input ranges from 40 mV to 40V and programmable DC offset, and come standard with 4 Mbytes/channel of onboard memory for measurements requiring extended data captures. The USB-4065 DMM offers 6½ digits of resolution at up to 10 readings per second and up to 3,000 readings per second at lower resolutions. With ±300V of isolation, current measurements up to 3A and 2- or 4-wire resistance measurements, the USB-4065 offers a complete multimeter solution for portable 6½-digit measurement needs. Pricing for these products ranges from $899 to $1,299.

PC/104-Plus SBC Withstands Extended Temps

PC/104’s popularity continues to ramp up in applications where space constraints and power concerns are priority. Fastwel’s latest PC/104-Plus single board computer offering is the CPC304. Based on the AMD Geode LX800 CPU and AMD CS5536 I/O companion chipset, the board provides full support for PC/104 and PC/104-Plus expansion modules. The board is designed for use in missioncritical, onboard systems requiring low power consumption and wide operating temperature range from -40° to +85°C. All key components including CPU, chipset, memory and peripheral controllers are soldered on board providing excellent vibration stability and increased efficiency.

National Instruments, Austin, TX. (512) 683-0100. [].

1500W Supply Designed for Harsh Environments

For harsh environment applications, ordinary IT-class power supplies don’t make muster. Serving such needs, Lambda has extended its 500-watt LZSa series of industrial power supplies to include 1000 and 1500-watt supplies with a unique feature set and safety-agency approvals not commonly found in standard off-the-shelf supplies. These new LZSa1000 and LZSa1500 series boast a wide operating temperature range, compliance with MIL-STD-810E standards for shock and vibration, and the ability to operate in explosive gas atmospheres. These rugged power supplies are available with a nominal output of 12V (LZSa1000) or 24V (LZSa1000/1500). With integral fan-cooling, they provide full-rated output power from -40° to +60°C, derating linearly to 60 percent load at 71°C ambient. The LZSa series accepts a wide input range from 85 to 265 VAC, 47 to 440 Hz and has active power factor and harmonic correction. It also complies with SEMI-F47 standards for input droop down to 100 VAC at full load. Output ripple and noise is a low 75 mV peak-to-peak, and the unit is designed to provide 20-millisecond hold-up and ride-through to avoid nuisance tripping during transient electrical interruptions. The LZSa1000 and LZSa1500 are available now, priced at $825 and $1,250 each in 100-unit quantities. Lambda Americas, San Diego, CA. (619) 575-4400. [].


April 2008

A protective conformal coating is available to enhance the survivability of the board in exposed or other harsh environments. System developers can take advantage of simultaneous operation of a standard VGA interface with resolution up to 1920x1440, or 24-bit LVDS interface for connection of TFT or DSTN LCD panels. For data exchange CPC304 offers two independent Fast Ethernet ports, four COM ports, two USB 2.0 ports and eight programmable discrete input/output lines. The CPC304 will begin shipping in volume in March with prices starting at $658. Fastwel, Brooklyn, NY. (718) 554-3686. [].





Products&TECHNOLOGY Digital Receiver with 16-bit A/D at up to 160 MHz sampling for SDR

With four 16 bit ADCs sampling synchronously at frequencies up to 160 MHz, a new PMC module provides extremely high throughput in demanding applications such as communications, radar, wireless test and measurement, 3G and 4G cellular base station development, signal intelligence, smart antenna, radar beam forming and satellite ground stations. Combining the ICS-1554 from GE Fanuc with an appropriate host processor offers a very powerful single slot IF processing solution for software defined radio applications. Simultaneous downconversion of up to 16 arbitrary signal bands is implemented by four Graychip GC4016 digital downconverters. A Xilinx Virtex 5 SX95 FPGA is provided for user-defined signal processing functions, giving greater capacity and lower power consumption than previous generations of GE Fanuc Intelligent Platforms digital receivers. The FPGA, which is almost 100% available to the application, provides a signal processing capability that can be loaded with standard functions such as wide band DDC, FFT and time stamping, or programmed by the user. The ICS-1554 achieves its performance in part through the implementation of the four Graychip digital downconverters, while support for simultaneous wide- and narrow-band operation is enabled by the use of dual decoupled FIFO memory. 64 User I/Os connected directly from the FPGA to the Pn4 connector provide an alternative high-speed data path from the module. The I/O pins support LVTTL and LVDS transmit signaling and can be factoryconfigured for LVDS receive operation. Included is a Hardware Development Kit (HDK) providing support for users who wish to implement their own signal processing algorithms in the FPGA. Alternatively, GE Fanuc Intelligent Platforms can develop FPGA cores specific to customer needs. GE Fanuc Intelligent Platforms. Charlottesville, VA. (800) 368-2738. [].

Pico-Style MicroTCA Backplanes

New MicroTCA backplanes in the Pico-style format have been introduced by Elma Bustronic. The first Pico backplane has been designed for sister-company Elma Electronicâ&#x20AC;&#x2122;s 1U MicroTCA enclosure solution. The Pico format for MicroTCA is typically in a horizontally mounted chassis. The compact size saves vertical rack space. The Bustronic Pico backplanes will typically have a Star topology, with one MCH and one Power Module. The rest of the slots will allow for AMC modules in various sizes. The version for the 1U MicroTCA also has connections for a JSM (J-Tag Switch Module) used for diagnostics and the AMC slots are in the single width/mid size. The backplane features a 20-layer controlled impedance stripline design. Bustronic uses the compression-mount style connector, which facilitates easier routing. Further, as the connector is mounted to the backplane with screws, it can be easily replaced if damaged. Bustronic also offers MicroTCA backplanes in both Star and Dual Star topologies and in Cube and Subrack formats. Pricing for the Pico MicroTCA backplane is under $300 depending on volume and configuration requirements. The lead-time is 4-6 weeks ARO. Elma Bustronic, Fremont, CA. (510) 490-7388. [www.elmabustronic,com].

PC/104 CPU Board with PCI/104-Express Extension Bus

A new PC/104 CPU board is based on the COMexpress module Microspace SMX945-xxx from Digital-Logic with different Intel processors, a memory capacity of up to 4 Gbytes, two clock rates of 1.6 GHz and the i945GME chipset. Equipped with the Intel Core 2 Duo L7400 CPU, the new PC/104 CPU board features a wide variety of interfaces with up to six USB V2.0, one PS2, two COM, one LPT and one 10/100Baste-T LAN port. In addition, it has optional DVI and CRT/ LCD interfaces (dual screen) and one AC97-7.1/HAD sound controller. For connecting mass storages, one P-ATA and two S-ATA interfaces are available. For displays, the MSM945 board uses the graphic controller of the i945GME chipset with up to 224 Mbyte video memory. The PCI/104-Express bus (PCI & PCI Express) and the USB interfaces are available as functional extensions. The MSM945 runs on all common operating systems like Windows XP, QNX, Linux etc. Equipped with Flash BIOS, the CPU board allows the operating system to boot from different media such as hard disk, floppy disk, compact flash, USB, or LAN. Power consumption, cooling method, ambient working temperature and performance are directly dependent on the smartModule945-xxx. The MSM945 was designed for low current consumption and thanks to its high video performance, it represents the ideal solution for applications in the field of video processing, video streaming, biometric data processing, home automation and entertainment, as well as remote management of IT applications. Digital-Logic, Luterbach, Switzerland. +41 (0)32 681 58 40. [].


April 2008

! ur tric A Yo en oTC ild -C icr Bu ork M w h et it N sw p Ap

Lower Cost Higher Performance Faster to Market …


The 2008 MicroTCA Summit and Exhibition brings you practical information on the current state of MicroTCA. The latest processors, interfaces and applications for small-scale solutions in military, aerospace, communications, process control and medical equipment find a perfect fit with MicroTCA. Learn what you need to know at MicroTCA Summit 2008! � Tutorials: MicroTCA development for software, hardware, wireless systems, interoperability challenges and lessons learned � Sessions: COTS, ruggedization, wireless mobile, WiMAX, mechanical/chassis/power issues, AMC modules, middleware/software � Beer & Pizza Chat with the Experts: talk with industry leaders about working applications � Multi-vendor Interoperability Demonstration

“For the first time since Motorola introduced the VMEbus 25 years ago, we believe another standard has emerged that could change the landscape of embedded computing across all industry segments.”

Register Now!

— Paul Virgo, Emerson Network Power

May 28 - 30 2008

Westfields Marriott Chantilly, VA (near Dulles Airport)

For Early-Bird Discounts Register Online Today! coming to Santa Clara in October:

AdvancedTCA Summit 2008!

Products&TECHNOLOGY 6U CompactPCI SBC Scales Core2 Duo/Core 2 Duo/Celeron M

A new 6U single-slot CompactPCI SBC supports a variety of Intel Core Duo and Core 2 Duo processors from the high-end 2.16 GHz T7400 to the low-voltage dual-core versions down to a selection of Celeron M types. It is designed especially for embedded systems that require high computing and graphics performance and low power consumption. The D9 from MEN Micro offers a 32-bit/33 MHz system slot CompactPCI bus interface or can be used without a bus system. A total of five PCI Express lanes for high-speed communication (such as GB Ethernet or graphics) are supported on the D9. 2 x1 PCIe links are used for the two onboard Ethernet interfaces, another 2 x1 links support the XMC slot and 1 x1 link is available on a specific mezzanine card. Further serial interfaces include two SATA ports for connection of an onboard hard disk (instead of the PMC or XMC) and a second one on the transition module at the rear. Alternatively, one of the two SATA ports is available via the mezzanine card. One PATA interface supports the on-board CompactFlash slot. A total of six USB 2.0 are supported at the front, on the rear I/O transition module and on board the mezzanine card. Four of the onboard USBs can be used to realize two UARTs on a mezzanine card and another two UARTs on the rear I/O transition module. The standard I/O available at the front panel of the D9 includes graphics on a VGA connector, two Gigabit Ethernet and two USB 2.0 interfaces. Supervision of the processor and board temperature as well as a watchdog for monitoring the operating system complete the functionality of the D9. The D9 operates in Windows and Linux environments and under RTOS systems that support multicore architecture. For use in harsh environments the D9 is equipped with soldered DDR2 DRAM (up to 4 Gbytes) to guarantee optimum shock and vibration resistance. It comes with a tailored passive heat sink within 4 HP height. However, forced air-cooling is always required inside the system. Its design makes the D9 especially suited for rugged environments with regard to extended operation temperature, shock and vibration according to applicable DIN, EN or IEC industry standards. It is also ready for coating for use in humid and dusty environments. MEN Micro, Ambler, PA. (215) 542-9575. [].

PC/104 Analog Output Module Is RoHS-Compliant

A PC/104 module for embedded computing applications offers a convenient and cost-effective method for adding I/O functionality in Single Board Embedded Computing applications. The VCM-DAS-3 from Versalogic features 16channels of 12-bit analog output and 24 digital I/O lines. In addition, the VCM-DAS-3 is designed and tested for extended temperature operation (-40° to +85°C) and is fully RoHS-compliant. The rugged VCM-DAS-3 is designed to provide capabilities beyond what is presently available on the market while maintaining drop-in compatibility with current industry standards. Its enhanced features include: independently software programmable output ranges, software calibration, the ability to reset to zero scale on power-up, read back of DAC and SPAN codes for simplified programming and setup, and latching 2 mm headers. Legacy features include 8-bit ISA compatibility, jumper configurable output ranges in groups of eight, and the ability to reset to mid-scale on power up. Both unipolar and bipolar operations are fully supported. The VCM-DAS-3 is well suited for OEM applications such as process control, data monitoring and collection, security and medical equipment design. Pricing for the VCM-DAS-3 starts at around $400 in OEM quantities. VersaLogic, Eugene, OR. (541) 485-8575. [].


April 2008

Software Development Kits for Use with Multi-I/O Avionics PMC

Newly enhanced software development kits (SDKs) for MIL-STD-1553 and ARINC 429 data bus applications allow users to develop “C” source code to simulate, monitor, or troubleshoot 1553 and/or 429 data buses simultaneously or independently with support for the latest operating system versions including VxWorks 6, Linux 2.6 and Windows 2000/XP. These SDKs enable users to quickly integrate DDC’s multi-protocol avionics PMC (BU-65590F/M) into their “C” code applications. A common SDK exists across all operating systems allowing the programmer portability across multiple platforms. The easy-to-use high-level functions abstract all low-level hardware accesses and memory allocation such that specific hardware knowledge is not required.

The BU-65590F/M is a multi-protocol PMC card that provides up to four dual redundant MIL-STD-1553 channels, sixteen ARINC 429 receive channels, six ARINC 429 transmit channels, six user programmable Digital Discrete I/Os, two RS-232 Serial I/O channels, two RS-422/485 Serial I/O channels and an IRIG-B time synchronization input. Each 1553 channel supports new standard features such as 1 Mbyte RAM with parity per channel, 48-bit/1μs or 100 ns time tag, and built-in self-test. An intelligent hardware offload engine provides extremely low PCI bus and host CPU utilization while storing 1553 Monitor data in a convenient IRIG-106 Chapter 10 format. The industry-standard IRIG-106 Chapter 10 format is commonly used for digital flight data recorders. The card can be ordered with either rear or front panel I/O and is available for convection or conduction-cooled applications. Data Device Corporation, Bohemia, NY. (631) 567-5600. [].

AdvancedMC SAS Module Offers Up to 146 Gbytes

As customers realize the potential of AdvancedMC and MicroTCA platforms, they are uncovering enterprise-class applications for which those platforms are suited creating requirements for a reliable, scalable, high-performance solution for critical applications that demand leading-edge system storage capabilities including blade servers, network and telephony routers, and video streaming or surveillance. The Telum 210 from GE Fanuc Intelligent Platforms, and AdvancedMC system storage module, provides an onboard 73 Gbytes or 146 Gbytes serial-attached 10,000 rpm SCSI (SAS) hard disk drive with an LSI 1064E SAS/SATA 3 Gbit/s controller. The LSI 1064E controller supports PCI Express Hot-Plug control, making the Telum 210 hot swap capable and field-replaceable in accordance with the AMC.0 R2.0 standard. The Telum 210, which has an estimated MTBF of 1.4 million hours, supports single- and dual-port SAS drives, and also supports RAID with integrated striping and mirroring firmware (no software support required). By combining the controller and hard disk drive on a single AdvancedMC module, the Telum 210 is highly space-efficient—allowing optimum use of the chassis—while freeing host processor resources. The AMC.1 PCI Express implementation provides greater bus bandwidth by providing eight PCI Express lanes at a transfer rate up to 2.5 Gbits/s per lane, full duplex. Four AMC.1- and AMC.3-compliant SAS channels are provided, with support for up to two off-board channels. For maximum system design flexibility, the module is available with either a mid-size or full-size faceplate. Conformal coating is optional. The Telum 210 provides support for Solaris, Linux, Windows 2000 and Windows XP.

Custom Embedded Interfaces Cover a Range of Industrial Networks

A family of customized embedded communication interfaces offers easy integration into automation devices. The customized interfaces, called Anybus from HMS Industrial Networks, are available for 18 different industrial networks including Profibus, Profinet, DeviceNet, EtherNet/ IP and Modbus. The customized modules are based on the proven Anybus standard communication modules; tailormade for specific requirements such as high mechanical ratings (IP65), special form factors or board sizes, non-standard connectors or power supply requirements. Typical applications are automation devices such as drives, welding controller or industrial weighing equipment. Customized Anybus interfaces always use the standard Anybus software technology and have the same software interface as the standard Anybus modules. Customers benefit from short development times, low development risk, fixed development cost, and moreover, get the advantage of continuous software maintenance by HMS without any additional cost. After development is completed, HMS produces the customized network interfaces in-house and delivers the boards in accordance with the specifications of each customer. Producing customized Embedded Solutions will extend the application range of the proven Anybus technology. HMS has been providing this service for selected OEM manufacturers for over 15 years. The new Anybus NP30 ASIC now enables a platform that can offer this service on a much broader scale. With customized standard products, customers get an individual but already proven solution without any risk and at fixed development cost. HMS Industrial Networks, Halmstad, Sweden. +46 3517 2900. [].

GE Fanuc, Charlottesville, VA. (800) 368-2738. [].

CompactPCI Board Sports Dual 45 nm Quad-Core Xeons

A 6U CompactPCI processor board features two 45 nanometer quad-core Intel Xeon L5408 processors complemented by the power-optimized Intel 5100 Memory Controller Hub (MCH) chipset and Intel I/O Controller Hub 9R. With eight processor cores on one board, the CP6014 from Kontron now opens up new markets and gives new and existing CompactPCI customers a wide range system upgrade opportunities. The processor board targets applications in storage, wireless infrastructure, security, voice and the medical market segments. Taken in conjunction with the potentials of Virtualization software, the Kontron CP6014 can now address new data-intensive applications such as video recognition and medical imaging. The quad-core Intel Xeon processor L5408 interfaces to the baseboard via the 771 land socket and is based on 45 nm technology, which reduces power consumption, increases switching speed, and significantly increases transistor density over the previous 65 nm technology. The L5408 has a power envelope of 40W and supports a core frequency of 2.13 GHz, a Front Side Bus of 1066 MHz and an on-die L2 cache of 12 Mbyte (2x6 Mbyte). The CP6014 is an 8HP dual-slot solution designed with a multitude of onboard I/O functionality. To eliminate the bottleneck of a parallel bus structure, the CP6014 supports a local PCI-X 64-bit / 133 MHz on PMC-slot or a PCI Express x4 on the XMC. For faster memory performance, Kontron’s 6U CompactPCI board supports up to 32 Gbyte DDR2 memory (4 DIMMs sockets) at 533/667 MHz and Intel I/O Acceleration Technology (Intel I/OAT) DMA for fast data transfer. There is additionally a VGA interface and a VGA controller on a PCI-E bus ATI M72 that supports CRT. The CP6014 also takes advantage of the Intel 5100 MCH chipset, which contains two main components: the memory controller hub (MCH) for the host bridge and the Intel 82801IR I/O Controller (ICH9R) for the I/O subsystem. Additionally, the CP6014 uses onboard flash, provides six SATA/SAS ports onboard (mezzanine and rear I/O), two COMs RS-232 (one front and one rear I/O), three USB 2.0 ports (one front and two rear I/O), dual 1 Mbyte BIOS Flash (FWH) and support for IPMI V1.5 implementation. Kontron, Poway, CA. (858) 677-8077. [].

April 2008


Products&TECHNOLOGY New Networking Cabinet Provides Choice of Cable-Management Accessories

Schroff has introduced a new networking cabinet that can be specified with a comprehensive range of accessories to enable the implementation of an orderly and reconfigurable cable-management solution. Known as Varistar NET from Schroff, the new cabinet uses a closed rolled-steel frame construction that not only provides a high load-bearing capacity but also has smooth, rounded edges to prevent damage to Cat 6 and opticalfiber cabling. Designed to maximize the available cabling space by removing all obstructions to the cable paths, the cabinet comes in two versions—one with a single 19-inch plane and the other with two 19-inch planes and a base plinth. Varistar NET offers a choice of slim-line or heavy-duty frames for static load-bearing capacities of 400 kg or 800 kg respectively, and it is available in a variety of sizes ranging from 1200 to 2200 mm in height, from 600 to 1000 mm in depth, and in widths of 600 or 800 mm. The line-up of cable-management accessories includes plastic or steel 100 mm-square cable hoops that simply clip into the cabinet frame, cable ducting, optic-optic cable brackets, C-rails and associated clips, cable support rails, cable panels and cable ladders—all of which have been designed for quick and easy installation into the cabinet. To complement Varistar NET, Schroff also offers a server cabinet—Varistar Server—and together they provide a complete and integrated datacom solution. Full technical specifications of the Varistar NET cabinet can be found in Schroff’s Datacom, Server and Cabling Cabinets’ catalog or online at www.

Starter Kit for Adding Digital Audio to Embedded Designs

A Starter Kit for developing digital audio using Microchip dsPIC DSCs comes with complete development software and hardware including the USB-powered Digital Signal Controller (DSC) board with integrated debugger and programmer. The board is populated with a 40 MIPS dsPIC33FJ256GP506 DSC, which has 256 Kbytes of flash program memory and 16 Kbytes of RAM, a 12-bit analog-to-digital converter (ADC) and peripherals that support audio pulse-width modulation (PWM). Additionally, the board has 4 Mbits of serial lash memory to store audio messages and a 16-/24-/32-bit audio CODEC with sampling frequencies up to 48 KHz. The demo board also includes a 100 mW headphone amp, and microphone and line level inputs, along with a sample program for recording custom audio content.

Schroff, Warwick, RI. (401) 732-3770. [].

Two New 6U VMEbus Single Board Computers Offer Core2 Duo

Acknowledging the increasing importance of I/O connectivity in today’s demanding applications for embedded computing, GE Fanuc Intelligent Platforms has announced the V7768 and V7769 6U VMEbus single board computers. The two new boards, which extend the company’s established VME64 roadmap, also provide evidence of the company’s commitment to supporting the latest Intel processors and mobile chipsets Both single board computers offer the Intel Core2 Duo processor operating at 2.16 GHz and the Mobile Intel 945GME Express Chipset. The dual slot V7769, which provides dual SAS (Serial-Attached SCSI) connectors on the front panel, can optionally be configured with an onboard 2.5” SATA hard drive. It features three PCI-X PMC slots, allowing for maximum user-defined connectivity. The single slot V7768 can also be expanded via the PMC237 mezzanine board to provide legacy PMC functionality. The V7768 and V7769 are the first products from GE Fanuc Intelligent Platforms to leverage the power of Intel’s dual core architecture in conjunction with the Universe II PCI-to-VME bridge from Tundra Semiconductor. This provides not only an easy, software-compatible upgrade path for existing users of the VME64-based V7750, V7751, V7805 and V7851, but also a range of solutions that offer significant choice in terms of price/performance. Up to 4 Mbytes of Level 2 cache and up to 2 Gbytes of DDR2 SDRAM are provided by each board, as are two Gigabit Ethernet ports via the front panel. Two SATA ports, two serial ports, four USB 2.0 ports and PS/2 mouse/keyboard ports are also standard. Operating system support is provided for Windows XP, Windows Vista, VxWorks and Linux. GE Fanuc Intelligent platforms, Charlottesville, VA. [].


April 2008

All of these features demonstrate the potential of dsPIC DSCs, while showing how easy it can be to add high-fidelity audio to embedded designs. This Starter Kit’s integrated debugger/programmer makes entering the world of digital audio singularly simple. Packaged with Microchip’s tools—the MPLAB IDE, MPLAB C30 Student Edition C compiler, and hardware debugging and programming solutions—this new kit contains everything needed for dsPIC DSC code development at the lowest possible cost. The MPLAB Starter Kit for dsPIC DSCs (part # DM330011) is available today for $59.98. Microchip Technology, Chandler, AZ. (888) 628-6247. [].

Micro PCs Target Decentralized Control Applications

A family of ultra-compact computer systems for decentralized control applications is based on the 3.5” single board MSB800 computer from Digital-Logic with all its interfaces. The three members of the family are the MPC21, MPC21A and MPC21B. In addition to the functions of the MSB800, the MPC21 has two COM ports (1x external, 1x internal), one LPT interface and a PCI/104 slot available. The video input allows connecting a camera. A MiniPCI socket permits the integration of WLAN or field buses. In addition to the functions of the MSB800, the MPC21A system features four COM ports, one LPT interface, four relay outputs and four optically isolated inputs. As an option, COM3/4 can be fitted with a galvanized, isolated RS-422/485 interface. The MiniPCI socket also serves for the integration of WLAN or field buses. Beyond the functions of the MSB800, the version MPC21B has two COM ports, one LPT interface and two CAN ports with galvanic isolation. In this model the MiniPCI socket allows the integration of WLAN. All computers are able to boot from CompactFlash, LAN, USB or the optionally integrated 2.5” 40 Gbyte hard drive. The MSB800 board contains an AMD Geode LX800 processor running at 500 MHz. As a chipset the SBC uses the Geode CS5536. The main memory can be equipped with DDR RAMs from 256 Mbytes up to 1 Gbyte. The 3.5” SBC provides all common PC interfaces, two 100/10Base-T-Ethernet LAN ports, four USB 2.0 interfaces and VGA. In addition, there are a stereo I/O and a P-ATA hard disk interface. For display, the systems use the video controller integrated within the LX800 processor. This controller has a 16 Mbyte (UMA) video memory and supports VGA resolutions. Housed in robust metal cases, the miniature computer systems fit in dimensions of only 165 mm x 110 mm x 46 mm (WxDxH). The systems require no cooling fan, relying solely on passive cooling techniques. This makes them a suitable solution for reliable, cost-effective long-term operation in industrial and commercial applications. MPC21/21A/21B run with all PC-compatible operating systems, such as Windows XP, QNX, Linux, etc. and work with any application software written for PCs. Power is supplied directly with 12/24V or with a 110/220V power supply. Designed for low power consumption (typically 10 watts), the systems operate within the temperature range of -25°C to +70°C.

Core 2 Duo Processor Comes to PICMG 1.0 Systems

Now making its debut on PICMG 1.0 boards, the Intel Core2 Duo processor is built into the PCI-759 PICMG 1.0 slot CPU board from Kontron. The long-lifetime PCI759 offers high processor performance at an attractive price/ performance ratio for industrial-grade embedded applications such as process control, test & measurement and vision systems. The PCI-759 is a good choice for PCI and/or ISA-based, cost-sensitive embedded applications that rely on multiple application-specific I/O cards and require high data processing performance without the need for high-speed PCI Express features. Based on the Intel Core2 Duo processor up to the E6400 (2 x 2.16 GHz) and a TDP of only 65 watts, applications benefit from double the performance with power consumption similar to a Pentium-4. Since the PCI-759 conforms fully to the PICMG 1.0 specification, upgrading existing systems is quick and easy. The price/ performance ratio also makes the PCI-759 the perfect fit for cost-sensitive applications. Designed around the Intel 945G chipset with 1066 MHz front side bus and Intel ICH7 I/O controller hub, the Kontron PCI-759 slotCPU board offers scalable processor performance based on the Intel LGA7555 socket up to the E6400 (2 x 2.16 GHz) Intel Core 2 Duo processor. Support for up to 4 Gbytes of DDR2 dual-channel RAM boosts performance even further. Application flexibility is provided by a range of I/O interfaces: 4 x 3 Gbit/s SATA II for fast hard drive access, 2 x GbE (internally connected via PCI Express x1 to the southbridge for optimal data throughput), 7 x USB 2.0, one parallel and two serial interfaces. Additional interfaces can be implemented via the mini-PCI Type IIIA connector. Kontron offers additional assemblies for LAN, WLAN and SCSI. The integrated Intel GMA 950 Graphics Media Accelerator supports VGA resolutions up to 2048x1536. There is also 24-bit LCDS via DVO that supports resolutions up to 1600x1200. Furthermore, an integrated onboard socket for a Compact Flash module makes it possible to build maintenance-free systems without rotating non-volatile memory. The PCI-759 PICMG 1.0 board is available with Windows XP, Windows Vista, or Linux software packages. Additional operating systems are possible on a project basis. Kontron, Poway, CA. (858) 677-0898. [].

Digital-Logic, Luterbach, Switzerland. +41 (0)32 681 58 40. [].

April 2008


Products&TECHNOLOGY High-Availability Management Solution Includes DSP Management

A new middleware platform for building carrier-grade network equipment provides a number of key features that enhance service availability, including a full implementation of the SA Forum’s Availability Management Framework (AMF), support for in-service upgrades, and the ability to manage DSP farms in the user plane. Enea Element 3.0 provides core services for instrumenting, monitoring and synchronizing applications spread across multiple operating systems and processors. It also provides network supervision, fault management and shelf management services that make it easier to monitor, repair, configure and upgrade live systems as they operate in the field. Enea Element 3.0 enhances fault management flexibility and maximizes up time by providing full support for the SA Forum Availability Management Framework, the most mature component of the SA Forum’s Application Interface Specification. Included are new redundancy models for 2N, N + M, N-way and N-way-active configurations, fail-over modes that enable active and stand-by components to reside on the same or different nodes, and flexible, configurable, “health monitoring” capabilities. Developers can now map the best redundancy model to their application, thereby reducing development time and cost, and enhancing performance. Element 3.0’s in-service upgrade feature also reduces downtime associated with system upgrades by providing the ability to selectively load and restart individual components (and other affected nodes) in a coordinated fashion on a system-wide basis, thereby increasing service availability and simplifying both upgrades and system maintenance. Element 3.0 provides full support for the Enea Platform, which features DSP management and debug services such as start up and configuration, monitoring, event notification, logging, tracing, diagnostics, statistics and remote debugging. This integrated management solution, the first of its kind to span both the “control plane” and the “user plane,” provides fault detection, DSP core isolation, recovery, coordinated restart and notification features that enable DSP failures to be contained and repaired—limiting packet loss and network degradation.

48-Bit Digital Input Board for UEI’s Cube and RACKtangle Series

A series of high-density digital input boards, the DNA-DIO-448 and DNR-DIO448 from United Electronic Industries, are compatible with UEI’s Cube and RACKtangle I/O chassis respectively. The boards read all 48 bits at sustained rates in excess of 1 kSample/s. Input switching levels and hysteresis are software selectable from 0 - 28 VDC with 25 mV resolution. As part of UEI’s Guardian Series, the boards use an A/D input approach that offers a great deal of input flexibility. A diagnostic input mode measures the analog voltage at each input, allowing quick and accurate detection of short and open circuits as well identifying marginal or failing drive circuitry. The analog input capability is also a powerful installation, diagnostic and data acquisition tool.

Enea, San Jose, CA. (408) 383-9480. [].

6U CompactPCI Express Carrier Brings PCIe I/O Boards into CompactPCIe Systems

A 6U CompactPCI Express (CPCIe) carrier board allows the use of a PCIe I/O board in a CPCIe system. OEMs can now access the growing supply of PCIe I/O boards on the market today and use them in their latest CPCIe systems. Introduced by One Stop Systems, this Type 2 board supports a PCIe short card, usually in PCIe x8, x4 and x1 configurations. While the carrier board is equipped with a PCIe x16 connector, it communicates at x4 speeds. Most PCIe boards, though rated at x16 or x8, will “train” down to x4 or x1 speeds. This allows the carrier board to be used universally as long as the board fits into the short card form factor. The 6U CPCIe carrier board is a part of One Stop’s larger family of CPCIe products, including switchboards, backplanes, CPU boards, chassis and I/O boards. One Stop Systems designs and manufacturers an array of standard, custom and semi-custom boards and has determined that the supply of PCIe add-in cards on the market is still growing. The carrier board addresses the need for more compatible products for CompactPCIe, making it attractive to OEMs. The 6U CPCIe Carrier Board lists for $575 and is available immediately. One Stop Systems, Escondido, CA. (760) 745-9883. [].


April 2008

Software for the DNA-DIO-448 is provided in the UEIDAQ Framework. The Framework provides a comprehensive, easy to use API that supports all popular programming and operating systems including Windows, Vista, Linux and most real-time operating systems (e.g., QNX, RTX, RT Linux). The board is fully supported by LabVIEW, MATLAB/Simulink, DASYLab or any application supporting ActiveX, OPC or Modbus TCP control. Pricing for the DNA-DIO-448 (Cube version) is $1,200 and for the DNR-DIO-488 (RACKtangle version) is $1,350. United Electronic Industries Walpole, MA. (508) 921-4600. [].

Programmable Secure Internet Solution for M2M Applications

A reference design and a corresponding evaluation board bring together the 16bit microcontroller (MCU) for application control and the CO2128 iChip network security device for secure, reliable TCP/IP connectivity to LAN and GPRS networks. The marriage of Microchip’s PIC24 and Connect One’s secure iChip offers an option to system architects needing to develop and manage an open and flexible Internet-enabled application. Using the evaluation board, developers can quickly and easily develop an IP-enabled embedded system where the application resides on the PIC24 MCU and the networking and security are provided by the CO2128 iChip. Working together, the Microchip Technology and Connect One chips offer a significant value proposition for developers in the two cores implementing an Internet secure architecture where all connectivity features are isolated from the application, providing a natural firewall. The kit includes Microchip Technology’s flexible MPLAB integrated development environment along with Connect One’s black-box solution where the application requests connectivity and security services from the iChip via the AT+i command set. Also included are production-ready IP networking and networking applications and a flexible, low-cost and PHY independent bill of material. In this system, the iChip connects to the PIC24 serial port and its intuitive, ASCII-based AT+i commands enable programmers to connect to IP networks and leverage iChip’s Internet Protocol features including HTTP (client and server), HTTPS, FTP, FTPS, SMTP, POP3, SSL and routing capabilities. A detailed reference design for the combined solution facilitates the integration of specific M2M systems. CO2128 overcomes time and complexity barriers of implementing secure end-to-end IP communications. Designers do not need to significantly reprogram applications since Connect One’s iChipSec CO2128 uses the AT+i API to offload Wi-Fi drivers and security tasks, SSL security and networking protocols from the host application. iChipSec CO2128 also acts as a firewall-in-a-chip, protecting the application from networks attacks. IIEVB-PIC-2128110/220 evaluation board is available today from Connect One for $149.


Your Embedded System Specialists. Mesa Electronics is a U.S. manufacturer of a wide range of cards for embedded systems and industrial use. PC104 . PC104 Plus . PCI . PCI Express . USB . IDE Adapters

Also available: application specialties in Networking, Motion Control, custom and Embedded designs, RoHS available. Sales support: Technical support:

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Connect One, San Jose, CA. (408) 572-5675. [].

April 2008


Products&TECHNOLOGY Mini-ITX Design for Gaming Applications Includes Trusted Platform Module

A Mini-ITX motherboard designed for high-definition video gaming machines and digital signage systems delivers high-end user experience with 3D graphics, dual-view display, dual audio streams, a 6-watt audio amplifier, dual LAN and an onboard Trusted Platform Module (TPM) providing a hardware cryptoprocessor for increased data security. The i965GM-DCQI from Advansus delivers advanced system performance and accelerated graphics based on Intel GME965 and Intel Core 2 Duo mobile processors combined with high-speed system memory of up to 4 Gbytes dual channel DDR2 667 SDRAM. Leveraging Intel Integrated GMA (Graphics Media Accelerator) X3100 Graphics engine, the i965GM-DCQI supports DirectX 10, Pixel Shader 4.0, and performs 3D rendering at graphic core speeds up to 500 MHz with 384 Mbytes of video memory. The i965GM-DCQI’s multimedia functionality offers dual-channel 24-bit LVDS and DVI display with a built-in Chrontel CH7307C DVI transmitter. The motherboard supports dual-view display with resolution of up to 2048 x 1536. The i965GM-DCQI uses Realtek’s ALC888 5.1 + 2 channel audio codec to provide two independent audio streams. Sound is further enhanced by the TPA3005D2 6-watt stereo amplifier, creating a wraparound effect from the two front channels. The i965GM-DCQI’s increased system security is provided by an Infineon SLB 9635 Trusted Platform Module (TPM) chipset, which is used to ensure authenticity, and is able to withstand logical and physical attacks, protecting Internet transactions and communications in E-commerce environments. The i965GM-DCQI provides dual LAN high-speed network capability with Realtek’s RTL8111B PCI-E Gigabit LAN controller. System engineers will find the i965GM-DCQI easy to configure offering a flexible array of peripheral support. It comes equipped with 10 USB ports, 3 SATA interfaces and one PCI expansion slot. An onboard 8-bit GPIO allows 8 general-purpose input/output controls. One CompactFlash slot supports portable memory/storage. Four powered serial COM ports are ideal for connecting peripherals such as barcode scanners or debit/credit card readers with 5/12-volt output. Advansus, Taipei, Taiwan. +886-2-8177-7089. [].

FPGAs for Designs that Demand HighPerformance Processing and High-Speed Serial I/O

Comprising the fourth platform in the Xilinx 65 nm Virtex-5 family, Virtex-5 FXT devices combine embedded PowerPC 440 processor blocks, high-speed RocketIO GTX transceivers and dedicated XtremeDSP processing capabilities. With support from Xilinx and industry providers of logic, embedded and DSP development tools, and IP cores, Virtex-5 FXT FPGAs deliver a new level of system integration platform for applications in: wired and wireless communications, audio/video broadcast equipment, military, aerospace, industrial systems, and many others. The Virtex-5 FXT platform provides up to two PowerPC 440 processor blocks. Each processor, with integrated 32 Kbytes instruction and 32 Kbytes data caches, delivers up to 1,100 DMIPS at 550 MHz. Tightly coupled to the PowerPC440 blocks is a new integrated 5x2 cross bar processor interconnect architecture that provides simultaneous access to I/O and memory. This interconnect architecture includes dedicated master and slave processor local bus interfaces, four DMA ports with separate transmit and receive channels, and a dedicated memory bus interface. The Virtex-5 FXT platform also includes high-performance, low-power RocketIO GTX transceivers capable of supporting data rates from 500 Mbits/s to 6.5 Gbits/s. Customers can design applications supporting standards such as XAUI, Fibre Channel, SONET, Serial RapidIO, PCI Express 1.1 and 2.0, Interlaken, and others. Consuming less than 200 mW typical power per channel at 6.5 Gbits/s, the GTX transceivers come with many advanced features such as 4-tap DFE receiver equalization in addition to linear equalization and transmit pre-emphasis to improve signal integrity at higher line rates. Additionally, the platform includes up to 384 DSP slices and 16.5 Mbytes of internal memory that can be configured to provide over 190 GMACs of DSP processing performance and 92 Tbits/s of memory bandwidth respectively at 500 MHz. This balance of hardware resources maximizes the performance for computationintensive applications typical of DSP and video applications. Over 40 dynamically controlled operating modes are supported including: multiplier, multiplier-accumulator, multipler-adder/subtractor, tree input adder, barrel shifter, wide counters and comparators. The Virtex-5 FXT FPGA platform is supported by the new ISE Design Suite 10.1 development tools from Xilinx. This recently announced unified development offering includes access to all the domain-specific tools to streamline complete system designs for logic, embedded and DSP applications. This includes ISE Foundation, Embedded Development Kit (EDK), System Generator for DSP, AccelDSP synthesis tool, ChipScope Pro and ChipScope Pro serial I/O Toolkit, PlanAhead design and analysis tool and ISE simulator. Xilinx, San Jose, CA. (408) 559-7778. [].


April 2008

EPIC SBC Teams Real-World I/O with CPU Performance to 1.4 GHz

A new EPIC form factor SBC uses a modular CPU architecture to offer an unusually wide processor performance range as well as to pack a large amount of I/O into a tiny 4.5” x 6.5” (115 mm x 165 mm) footprint. Incorporating the equivalent of five PC/104 I/O modules on a single board, the Neptune from Diamond Systems is available with processors ranging from 500 MHz AMD Geode LX800 to 1.4 GHz Intel Pentium M 738 CPU. The modular CPU approach also leads to easier product lifecycle management and gives OEMs and integrators a simple way to offer a complete family of products through a range of price-performance points with the same I/O baseline. Neptune utilizes a standard ETX module interface to support the CPU modules, with a choice of the following modules installed on the Neptune carrier board: 500 MHz Geode LX 800, 1.0 GHz Celeron M 373 and 1.4 GHz Pentium M 738. Neptune includes extensive I/O such as four USB 2.0 ports, Serial ATA (S-ATA) and EIDE hard drive interfaces including CompactFlash socket and IDE Flashdisk interface, 10/100 and Gigabit Ethernet controllers, six RS-232 serial ports (four with RS-422/485 capability), AC’97 audio, and legacy keyboard and mouse interfaces and a PC/104-Plus expansion (PCI and ISA buses) interface. Graphics engines drive independent CRT and LVDS flat panel displays according to the chipset of the installed ETX module. Neptune offers a range of memory sizes from 512 Mbytes of 333 MHz DDR RAM to 2 Gbytes of 667 MHz DDR2 SODIMM RAM installed onto the ETX module. Neptune offers integrated data acquisition capability, with 32 single-ended (16 differential) analog inputs with 16-bit autocalibration A/D, 250 KHz sample rate and 1024 sample buffer, four analog outputs with 12-bit D/A and 100 KHz waveform output capability, 24 programmable digital I/O lines, 8 optically isolated digital inputs, 8 optically isolated digital outputs, and 2 counter/timers. The analog I/O circuitry supports both interrupt and DMA A/D transfers and uses an enhanced FIFO with programmable threshold for maximum flexibility and data reliability. Diamond’s Universal Driver programming software for Linux, Windows XP and CE, and QNX is included. Development Kits contain the Neptune board with the selected CPU module and RAM installed, an IDE flashdisk with Linux preloaded, all necessary cables, a panel I/O board, an AC adapter and detailed “getting started” documentation. The Neptune SBC is available in 500 MHz, 1.0 GHz and 1.4 GHz versions, with and without data acquisition. Neptune and its related products are all available early in the second calendar quarter of 2008 with prices staring under $900. Volume discounts are available.

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Diamond Systems, Mountain View, CA. (650) 810-2525. [].

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11/8/07 9:42:51 AM


Comment April 2008

Consolidation Going Smaller


ver the past decade, the embedded computer industry has seen unprecedented consolidation. At last count, there were well over 40 acquisitions—many of which were nested. GE Embedded Systems alone accounted for well over a dozen when one considers that SBS—which was acquired by GE in 2006—accounted for about ten, and Radstone—which GE acquired in 2007—had acquired at least three companies before being taken over by GE. The bottom line is that it is now estimated that 35% of the embedded computer business is controlled by three companies. Throughout the past year or so, the rate of acquisition appears to have slowed—either there are not enough targets, or major acquirers are taking longer to digest their prey than at first expected. However, even during the most active period, small form factor companies seem to have been skipped over—with the possible exception of Kontron, which acquired Teknor, PEP Modular, Taiwan Mycomp, ICS Advent and Jumptech. While it has been reported that there was interest both on the acquiring side as well as companies offering themselves for sale, there were very few transactions. There are currently well over 100 different small form factor companies. Of course, until recently, the small form factor industry was comprised of very small companies that just recently enjoyed a big growth spurt. While that turned these companies into larger, profitable entities, and more desirable acquisition candidates, the inflated valuations that had been around in the late ’90s—companies selling for large multiples of sales—were gone, and prices returned to some sense of realism. The pricing issue must have had some impact on the slowing rate of acquisitions. Now, however, it seems that acquisitions are again very much in the news. Kontron recently acquired the board level group at Thales, which in turn was the remnant of the earlier acquisitions of CETIA and Matrix Computers. Applied Data Systems was taken over by Eurotech early this year, which had also acquired Parvus last year.


March 2008

Now, the latest takeover has Adlink acquiring 100% of privately held Ampro Computers—the developer and early leader in the PC/104 business. And it was not too long ago that Adlink was considered a possible takeover or merger candidate by another company. Now there are at least hints of two more possible mergers in the works. Who’s next?

Good News, Bad News Many of these mergers in the embedded computer industry took place long enough ago to start evaluating whether or not they have benefited the companies or the customers. With some of the acquirers such as Curtiss-Wright and GE, there is no way to measure the economic effect since these companies do not release granulated details of each of their divisions. However, in the case of Kontron, one of the larger acquirers over the past several years, its business appears to be doing well—if the stock price and annual report are any indication. Annual sales for fiscal year 2007 were estimated at € 440 million (~$682 million) with a market cap of better than € 800 million, which probably makes it the largest embedded computer company in the industry. There is no way of comparing it with, say, GE or Curtiss-Wright. But while companies such as Kontron and Eurotech appear to be prospering, what’s happening to their customers? At the bottom line, the customers are getting the worst end of the deal. One prominent executive of a large acquiring company says, “The biggest effect [of consolidation] on the market and industry has been the lack of continuous innovation. All the small entities have been consolidated into larger organizations and are managed by the bottom line. The innovative spirit has been lost. I believe that in the big scheme it has hurt our customers as well because the larger consolidations are being viewed as competitors by our customers.” And the problem may well go even deeper. Many com-

Smaller Is Still Better Over the past year we’ve seen a dramatic growth in small form factor embedded computer bricks, boards and modules. From the very small through many of the mid-sized small form factor products such as EPIC, we’ve seen dramatic growth. And this year, expect to see even more of the same as Intel, Via and others jump on the very-low-power processor bandwagon and these processors find their way onto embedded computer products. We’ve been so impressed by this growth that we’ve asked Paul Rosenfeld and Colin McCracken to help you, our readers, sort through the jungle of small form factor products, from microcontroller boards to superpower small platforms. Their contribution begins this issue and we welcome their wisdom and insight. More on new generations of low-power boards and the applications they serve next issue.

Ups and Downs Motorola will split its mobile unit from its broadband and mobility-solutions businesses. Stock market plague: Stocks are, as of this writing, trading right where they were nine years ago. So much for long-term investment. Lockheed Martin F-35, Joint Strike Fighter is in the news again as Pentagon officials begin a review of whether to proceed with the plane that could cost as much as $1 trillion over the next few decades. Analyst firm, Gartner, cut its forecast for personal computers to 10.9% growth from its December estimate of 11.6%. Nvidia graphics processor takes on supercomputer duties in number-crunching applications. One of the first chores for the lightening-speed math processor is evaluating subprime loans to see which might be worth buying on the cheap from distressed banks. Look for similar techniques on computationally intensive embedded platforms. GPS chip maker SiRF cuts staff 7% after seeing demand from some customers dropping as much as 50%.

Millions of Euros

panies have acquired competitors making the same or similar products. Part of the advantage of consolidation is that they can take advantage of many “synergies.” Unfortunately, that often translates into saving not only on infrastructure, but in consolidating similar products resulting in a reduction in the number and variety of products available to customers. In announcing its ESOP (Employee Stock Ownership Program) late last year, WinSystems CEO Jerry Winfield says, “Too often we see that when a company is acquired by another firm, within a year their products disappear as they are integrated together with other product lines (see News, Views & Comment, RTC, November 2007). And that, perhaps, is the biggest tragedy of the rash of consolidation we’ve seen.”

500 450 400 350 300 250 200 150 100 50 0 2001

Figure 1







Kontron’s sales have continued to grow as has the company’s stock price with the exception of a dip in 2000. Says Kontron CEO Hannes Niederhauser, “Kontron is the undoubted analysts’ favorite in the TecDAX index, according to a report published by the Handelsblatt on October 8, 2007. This is due to the fact that all eleven analysts covering the stock according to Bloomberg information services rate the stock a buy. This in turn reflects both the business’s growth as well as the company’s shareholder-oriented policies.

Intel ups the multicore ante with a six-processor chip codenamed Dunnington due sometime in the second half of the year. The European Union selected the DVB-H (Digital Video Broadcasting for Handhelds) mobile-TV standard over other choices. The EU cites research that predicts a worldwide increase in demand to $31.34 billion in sales by 2015.

Warren Andrews Associate Publisher March 2008


is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

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Extreme Engineering Solutions, FPGA Platform Showcase.................................................................................... 44,45.......................................................................................................................... GE Fanuc Embedded Systems.................................................................................4.................................................................................. McObject LLC.........................................................................................................6................................................................................................ MEN Micro, Inc......................................................................................................23.............................................................................................. Mesa Electronics...................................................................................................61................................................................................................ Microsoft Windows Embedded.............................................................................. 2, MicroTCA Summit..................................................................................................55..................................................................................... One Stop Systems.................................................................................................35.................................................................................... Orion Technologies, Pentek, Inc............................................................................................................21................................................................................................... Phoenix International.............................................................................................61................................................................................................ Real-Time & Embedded Computing Red Rock Technologies, Inc...................................................................................63........................................................................................... Sensoray Swell Technobox.......................................................................................................... 18, Themis Computer..................................................................................................33................................................................................................... White Electronic

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April 2008

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To you, the advantages are clear. To your customer, it makes you the clear choice. Emerson Network Power is now clearly the leading provider of embedded computing solutions. From platforms, blades and modules, to software and services, Emerson’s industry-leading technology portfolio is ready to help solve your customers’ most demanding applications. Make our AdvancedTCA®, MicroTCA™, AdvancedMC™, CompactPCI®, Processor PMC, VMEbus and OpenSAF™ standards-based products your first choice. See how Emerson Network Power can help you build a clear advantage. Go to

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