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GE Fanuc Embedded Systems
Buy some time. Find the AdvancedMC™ products you’re looking for at GE Fanuc Embedded Systems. We took a leadership position in AdvancedMC™ products right from the beginning, and we’re continually adding new products. Whether you’re building a MicroTCA™ system or adding features to an AdvancedTCA™ blade, there’s a good chance we have the AdvancedMC you need. In I/O we have the traditional WAN products, including a card that offers iTDM capabilities. We have Fibre Channel cards, including a 4Gb optical card. We also have a SATA hard disk storage card. And a single board computer based on the Intel® Pentium® M processor. We have a
Cavium-based packet processor. We even have a GPS clock, and a VGA card. Not to mention our carrier cards for AdvancedTCA and IBM® BladeCenter™. When time is short and deadlines are looming, start you search with our terrific line of AdvancedMCs and quickly assemble your system components. That way, you won’t just be buying boards, you’ll be buying time.
Telum™ NPA-38x4 High-performance AdvancedMC packet processor
© 2007 GE Fanuc Embedded Systems, Inc. All rights reserved.
Editorial: The Logic of IMS
62 Products & Technology
Stuart Jamieson, Emerson Network Power, Embedded Computing
14 K eeping Your Cool with MicroTCA
David Pursley, Kontron
10 M icroTCA Offers High Availability in a Small Form-Factor
Technology in Context
MicroTCA offers scalable availability from 0.999 to 0.99999 by allowing fully redundant systems, partially redundant systems and systems with no redundancy at all. • Pg. 10
20 A TCA Systems Offer Flexible Building Blocks for IMS Network Growth Dan Leih, Motorola Embedded Communications Computing
26 IMS: A Future of Diverse and Integrated Services Eric Gregory, RadiSys
30 S tandard Building Blocks Accelerate the Deployment of IMS Services Asif Naseem, Ph.D., GoAhead Software
Industry Insight Data Acquisition & Recording 38 T ools Target Real-Time Data Acquisition Systems Rodger Hosking, Pentek, Inc.
44 O ptimizing Data Recorder System Architecture Ralph Barerra, Ph.D., Curtiss-Wright Controls Embedded Computing
48 P C-Based Platforms Serve Up High-Speed Data Acquisition Systems
APPLICATION LAYER SCIM
IP TRANSPORT NETWORK
An overview of the IMS planes, as well as the nodes that can be found in each plane. • Pg. 26
Tom Wagner and Anthony Hunt, Signatec
Executive Interview 54 R TC Interviews Dr. James Truchard, President, CEO and Cofounder, National Instruments Software & Development Tools Embedded Data Management 58 DDS Information Backbone Reduces Mission-System Complexity Hans van ‘t Hag, PrismTech
Industry Watch 66 V PX and the Brave New World of Flexible Hybrid Backplanes Michael Munroe, Elma Bustronic
Tiny logic module cuts development time. • Pg. 62 May 2007
May 2007 Publisher PRESIDENT John Reardon, johnr@r tcgroup.com EDITORIAL DIRECTOR/ASSOCIATE PUBLISHER Warren Andrews, warrena@r tcgroup.com
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Editorial May 2007
The Logic of IMS by Tom Williams, Editor-in-Chief
used to hear an argument, now mercifully discontinued, that there would never be a future for companies trying to sell the new formfactors ATCA, AMC and MicroTCA because all the big telcos would want their own versions (blinky lights in all the right places, etc.) and would manufacture in-house and offshore in volume for obvious economic reasons. I call that “POTS-era thinking.” If you think of the emerging telecommunications market as just another gigantic oligopoly of a few major companies completely dominating the world à la the Ma Bell of old—only with upgraded equipment—then that would be the logical assumption. Indeed, the AT&Ts of the world have recently been trying to gain control of the Net so that they can charge for tiered levels of service. This is what the battle over Net neutrality has been about. But it appears that if they were able to do that, they might be cutting off more potential revenues than they think they might gain. A year or two ago, the concept of “triple play”—voice, video and data—and now “quadruple play” with the addition of mobile services, seemed like a radical and distant dream. Today, it may still be some time off, but it is no longer a dream; it is a goal that will be achieved. The idea of voice-over-network (VON) has been superseded and absorbed by Internet Protocol Multimedia Service (IMS). If we’re going to build out this all-digital, IP-based high-speed network, then let’s include everything. Or as someone I once knew used to say, “Anything worth doing is worth overdoing.” IMS will become a reality because there is a growing awareness of the kinds of services that it will make available when it comes into place. Already people in increasing numbers are experiencing broadband Internet and that gives a tantalizing taste of what can be had when a truly high-bandwidth integrated service is available. Already services like Netflix are in place offering movies on DVD. But those DVDs are actually just physical place-holders for the high-speed “last mile” that will connect the services to the home. The point of this example is this: Big telcos like AT&T will build their own gear offshore. Service providers like Netflix will buy their equipment from commercial equipment manufacturers and OEMs. All of them will adhere to standards. Thus the po-
tential market is much vaster than that represented by telcos. It encompasses all the remora-like service providers that will attach to the network backbone to offer specialized services that are beneath the radar of the big boys. Some of these will be services with very broad appeal like movies. Others may be very specialized like multimedia Sanskrit chat rooms with videos of the Vedas. Who knows? Think of the Internet infrastructure as analogous to Windows. Whatever your opinion of Windows, it represents a huge common ground for applications of every imaginable kind from restaurant seating down to livestock herd management and on and on. They include embedded and specialized hardware-dependent applications as well—a huge number of them too small and specialized for Microsoft to bother with or do well. But they have grown the market for Windows, and Windows has provided an environment for their growth. By the same token, the part of the IMS infrastructure that will be supported by the big telcos will probably not be accessible for sales from independent equipment manufacturers. On the other hand, the huge potential field of independent service providers, including those with the big server farms of today, will need to keep up with the demand for IMS capability. Today, they have rack upon rack of generic blades. These will need to be upgraded sooner or later and the potential for sales into that world is huge. In addition, one can imagine a large number of smaller providers of specialized services that they would like to make available worldwide. These, too, are potential customers for COTS OEMs and equipment providers. The old POTS world of Ma Bell had essentially only one service—voice communication—and did that very well over a network that was the glory of its age. Today we are seeing an explosion of broad and specialized services, with many more to come, which will be offered over a standard, integrated and high-speed medium. The variety of services, not the mythical “killer app,” is the key to a big and vibrant market. That will be made possible by an infrastructure dominated by a few big players. But it will make possible a universe of smaller participants whose number will constitute a truly big market opportunity. May 2007
IT TAKES A LOT OF SMARTS TO BE THIS DENSE. Now a Complete Software Radio System in a Single PMC! Experts in our industry call us dense. It’s a compliment. That’s because our 7140 PMC/XMC transceiver is a complete software radio solution packed with a multitude of features designed to maximize performance. Easy-to-use, fully supported and extremely flexible, this software radio system will give you the edge you need. Everything is on board – A/Ds, D/As, up and down converters, FPGA and a highspeed XMC interface. Available in commercial and conduction-cooled versions, you can choose just what you need for your application. Especially well-suited for JTRS and other software radio applications, clever design features include a built-in, multi-board sync bus, 512 MB of user memory and 9 DMA channels. All of Pentek’s 50+ software radio board and system solutions come complete with ReadyFlow board support libraries to jump-start your application and GateFlow design resources to simplify FPGA development. Count on Pentek for lifetime technical support, complete, application-ready solutions and something more – an invaluable edge against your competitors!
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PMC, XMC, PCI & cPCI Versions Five Levels of Ruggedization Two 105 MHz 14-bit A/Ds Two 500 MHz 16-bit D/As Four Digital Downconverters One Digital Upconverter 512 MB of DDR SDRAM Xilinx Virtex-II Pro FPGA Synchronization up to 80 boards Serial Rapid I/O, Xilinx Aurora® PCI Express • Linux®, Windows® and open-source eCos OS
www.pentek.com/go/rtcsmart for Pentek’s “Putting FPGAs to Work for Software Radio” handbook and to request a full product catalog. Pentek, Inc., One Park Way, Upper Saddle River, NJ 07458 Phone: 201.818.5900 Fax: 201.818.5904 e-mail:firstname.lastname@example.org www.pentek.com Worldwide Distribution and Support Copyright © 2005, Pentek, Inc. Pentek, ReadyFlow and GateFlow are registered trademarks of Pentek, Inc. Other trademarks are properties of their respective owners.
BittWare and CorEdge Networks Partner on MicroTCA, AMC Dev Tools BittWare has announced a partnership with CorEdge Networks and the release of their RapidTCA Development System, a development environment for Advanced Mezzanine Card (AMC) and MicroTCA designs. To facilitate this partnership, BittWare has entered into a worldwide value added reseller (VAR) agreement for CorEdge Network’s PicoTCA development chassis and backplanes. The RapidTCA Developers System is comprised of CorEdge Network’s two-payload slot, 1U PicoTCA stand-alone test and development system, and BittWare’s DSP21k development software. Customers have the option to also purchase one or both of BittWare’s hybrid signal processing AdvancedMCs. The RapidTCA Development System provides a development environment by emulating an actual AdvancedMC or MicroTCA system, providing front panel access to all AMCs in the Get Connected with technology and system. The MicroTCA backplane supportssolutions two single-wide or one double-wide extended fullcompanies providing now height AdvancedMC, and does not require a switching mechanism due to its cross-connected Get Connected is a new resource for further exploration base channel, fabric into andproducts, extended fabric connectivity. AdvancedMC technologies and companies. Whether your goal specifications AMC.0, is to research the latest datasheet from a company, speak directly AMC.1, AMC.2, AMC.3 and AMC.4 are all supported. an Application Engineer, or jumpController to a company's technical page, occupies the A CorEdgewith Networks System/Power (SPC), which a third slot on the goal of Get Connected is to put you in touch with the right resource. backplane and controls all backplane power, provides quick power up to all AdvancedMCs in Whichever level of service you require for whatever type of technology, a MicroTCA-like environment. The entire system is encased in a 1U-high bench top chassis Get Connected will help you connect with the companies and products you are searching for. bottom covers for easy probe access to the AdvancedMCs while with clear, removable top and the system iswww.rtcmagazine.com/getconnected up and running. The chassis also includes dual front replaceable push/pull integrated air filter, fan, fan trays and an external 100-240 VAC to 48 VDC power supply.
new survey of DSP professionals
plementation of 1 and 10 Gbit/s
bit Ethernet (GbE) and 10 Gigabit Ethernet (10 GbE) on AMCs and carrier boards. “Ethernet dominates the embedded multi-vendor serial interconnect market,” said Alan Deikman, CTO of ZNYX Networks and chair of the AdvancedMC.2 subcommittee. “It is only logical to extend that to the mezzanine, and we have seen advanced development for AMC.2 already” he added. AMC.2 will be provided free to PICMG members and is available for purchase by non-members. More information, including product listings, can be found at www.picmg.org. Founded in 1994, PICMG is a consortium of more than 450 companies that collaboratively develop open specifications for high-performance telecommunications and industrial computing applications.
Intel Launches Quad-Core Embedded Processor Line
The Quad-Core Intel Xeon DSP Chip Market Is in over 30 countries. Ethernet links on AMC.0 Modprocessor 5300 series debuted Forecast to GrowGet a Connected with and companies solutions now The intended Thetechnology embedded DSP market providing ules and Carriers. by Intel at this year’s Embedded Moderate 8% in 2007 Get Connected isisa new for further like exploration technologies and companies.will Whether your goal is to research the latest led resource by companies Qual-into products, implementation practice
Systems Conference is isatolaunch datasheet from a company, speak directly withMarvell an Application or jump toinclude a company's page, the goal of Get Connected put you The market for generalcomm, Broadcom, andEngineer, normally at technical least one of a four-core series with exin touch with the right resource. Whichever level of service you require for whatever type of technology, purpose digital signal processor Infineon, with most of their DSP link of Ethernet. tended lifecycle support aimed Get Connected you connect with the companies and products you are searching for. (DSP) chips is forecast to growwill help products offered as Systems on The Advanced Mezzanine at the embedded segment. So far, 8% in 2007www.rtcmagazine.com/getconnected to the $9 billion level Chip (SoC). Because of the heavy Card specification defines moduthe series consists of two memaccording to a new market study SoC emphasis, the major RISC lar daughter cards designed to bers. The new E5335 and E5345 from Forward Concepts. That vendors have added DSP capaprovide extra functionality to embedded processors bring to 14 growth is in contrast to the lackbility to their product offerings. AdvancedTCA cards. They can the number of quad-core prodluster overall integrated circuit The report profiles the DSP maralso be used to add functionalucts Intel has brought to market growth of 3.5% predicted for 2007. ket stance of these and over 100 ity to any other “carrier” cards in less than 6 months. The new study, “DSP Chip Strateother chip and core vendors. Deand are used as the “blades” in With dual-processing capagies ’07” predicts a more typical tails of the study and a complete MicroTCA systems. The base bilities providing up to eight cores DSP market growth of 15% in table of contents can be found at: specification (AMC.0) defines the per platform, the Quad-Core In2008 driven by communications http://www.fwdconcepts.com/ module’s mechanical, intercontel Xeon processor 5300 series and multimedia applications. But DSP07.htm. nect, management, power and is available in 2.0 GHz (E5335) the new study also emphasizes thermal requirements. The new and 2.33 GHz (E5345) speeds. the even embedded DSP and Get bigger Connected with companies AMC.2 specification is limited in Get Connected These processors are targeted for PICMG Adds Ethernet market that will grow to $17.6 bilproducts featured in this section. with companies mentioned article. scope to defining link usage, man-in thisintense computing and I/O-intenFabric to Advanced lion inwww.rtcmagazine.com/getconnected 2007, to almost twice the agement www.rtcmagazine.com/getconnected and electronic-keying sive workloads within high-end Mezzanine Card size of the general-purpose DSP (E-Keying) parameters for Gigacommunications and enterprise PICMG announced that it chip market. The new in-depth has released a subsidiary specistudy is believed to be the most fication for the popular Adcomprehensive study available of Get Connected with companies mentioned in this article. vanced Mezzanine Card (AMC). markets driven by DSP technolwww.rtcmagazine.com/getconnected companies products featured in this section. AMC.2 defines the imogy,Get andConnected includes thewith results of a and PICMG
End of Article
systems, including rackmount (1U/2U) and blade servers, NAS and SAN systems, and medical imaging equipment. To demonstrate the potential of Quad-Core designs, Intel has presented a product based on two 5300 series processors, the Intel IP Network Server NSC2U. The server enables high I/O throughput and performance capabilities suited for a variety of networkcentric applications from security intrusion prevention to telecommunications services-over-IP (SoIP), including IMS, IPTV and Video on Demand (VoD). The NSC2U server features a ruggedized chassis, compact form-factor and extended lifecycle support for the components. Intel also announced a road map (but to date no products) for a family of system-on-chip products consisting of an IA32 processor, a North bridge and a South bridge on a single chip.
RapidIO Trade Association Teams with Embedded Planet to Deliver Design Training
The RapidIO Trade Association and Embedded Planet have announced a partnership arrangement to create a RapidIO Technology training curriculum that will provide hands-on training for designers employing RapidIO technology in high-performance, innovative systems. Embedded Planet will leverage its professional training experience, firsthand knowledge of RapidIO design processes, and input from the RapidIO Trade Association members to develop and deliver a set of high-quality training courses. RapidIO hardware and software training courses are scheduled to be available beginning in April 2007. “The RapidIO ecosystem continues to grow as OEMs and ODMs discover the powerful benefits of designing with RapidIO technology,” said Tom Cox,
executive director of the RapidIO Trade Association. “With this new training curriculum from Embedded Planet, independent testing through RIOLAB, more than a hundred products, and a growing Trade Association community, designers have everything they need to create highperformance systems.” The training program is designed for engineers designing with Serial RapidIO for the first time as well as for experienced designers seeking to hone their knowledge and keep abreast of RapidIO technology developments. The courses, RapidIO Hardware Design and RapidIO Software Design, are comprehensive two-day sessions, which focus on both the RapidIO 1.3 and the imminent RapidIO 2.0 specifications. The curriculum provides an overview of Serial RapidIO, packet switching, as well as design tips for the logical, transport and physical layers. The program can be combined into an in-depth four-day course. For information visit www.EmbeddedPlanet.com/ training/rapidio_training.asp.
Pico-ITX Form-Factor, the World’s Smallest x86 Mainboard
VIA Technologies has developed a new small form-factor for x86 processors. The VT6047 Pico-ITX form-factor reference design is the smallest full-featured x86 mainboard designed for a new world of ultra compact embedded PC systems and appliances. The Pico-ITX form-factor is another step in miniaturization. The Mini-ITX mainboard, at 17 cm x 17 cm, which recently celebrated its fifth anniversary as an industry standard form-factor with wide market adoption, was followed by the Nano-ITX formfactor at 12 cm x 12 cm, exactly 50% of the size of the Mini-ITX. Now, the Pico-ITX, at 10 cm x 7.2 cm and 50% of the size of the Nano-ITX form-factor, expresses VIA’s “Small is Beauti-
ful” technology design strategy of shrinking the form-factor to drive the x86 platform into ever smaller systems and whole new device categories. Leveraging VIA’s expertise in miniaturization at the silicon level through major advances in power efficiency, thermal management and feature integration, the VIA VT6047 Pico-ITX mainboard was designed to be powered by one of VIA’s energyefficient processor platforms, such as the VIA C7 or fanless VIA Eden processor in the 21 mm x 21 mm nanoBGA2 package, combined with feature-rich VIA system media processors to enable the board to pack a performance punch in a tiny, lowheat, low-power package. More details about the PicoITX form-factor and the VIA VT6047 Pico-ITX mainboard reference design may be found in the “VIA Pico-ITX Form-Factor” white paper, available for download from the VIA Web site at: www.via.com.tw/en/initiatives/ spearhead/pico-itx/.
Nallatech and Intel Team to Develop FSB FPGA Accelerator Modules and Tools
Nallatech and Intel have signed an agreement to develop socket-based accelerator modules that support the Intel QuickAssist accelerator strategy. Nallatech is working with Intel and Xilinx to develop and deliver FSB FPGA accelerator modules and design tools to the advanced server market during 2007. These products are compatible with Intel’s latest server platforms and utilize Xilinx’s 65nm Virtex-5 FPGA architecture. As part of this relationship, Nallatech will deliver high-level design tools conforming to the Intel QuickAssist Technology Accelerator Abstraction Layer (AAL), enabling support for ANSI C-based third-party tool flows from both existing and new partners.
According to Nallatech, the engagement with Intel brings more than a decade of experience in FPGA computing and matches it with the rapidly increasing demand for accelerated processing capabilities by customers in the advanced server market. The flexibility and performance of FPGAs coupled with high-speed direct access to the server processors allow users to significantly accelerate the performance of computationally intensive algorithms, thus reducing compute time and power consumption. “Nallatech has extensive experience in building products that utilize FPGAs as accelerators and we are delighted to join with this industry innovator in developing solutions for Intel’s industry-leading acceleration platforms,” said Dr. Dileep Bhandarkar, director of advanced architectures for Intel Corporation. “The combination of Nallatech’s FPGA computing expertise with Intel’s advanced server platforms, together with our shared cross market application knowledge, will create a powerful solution for addressing the most demanding computing problems.” www.nallatech.com.
PICMG Hosts Technologies Showcase at NXTcomm07
PICMG will again be hosting a technology showcase booth at NXTcomm07, to be held at McCormick Place in Chicago on June 19-21, 2007. The PICMG Technologies Showcase booth, which will be even larger than last year’s, will contain member companies’ exhibits and products that are based on one or more of the popular PICMG specifications. Anyone considering building or using telecom infrastructure equipment based on open hardware specifications should visit the companies in the PICMG Technologies Showcase. PICMG specifications cover a range of open hardware
implementations and include AdvancedTCA, AdvancedMC, MicroTCA, CompactPCI, CompactPCI Express, COM Express and SHB Express. The PICMG Technologies Showcase will showcase the latest COTS building blocks and platforms that are being built on PICMG specifications. To see which companies are exhibiting at the PICMG Technologies showcase, go to www. picmg.org and click on “News and Events.” The PICMG Web site also includes a product directory where manufacturers list their PICMG-compliant product offerings. Founded in 1994, PICMG is a consortium of more than 450 companies that collaboratively develop open specifications for high-performance telecommunications and industrial computing applications.
Event Calendar 05/30-06/01/07
AdvancedTCA Summit / MicroTCA Summit 2007 Baltimore, MD www.microtcasummit.com
Real-Time & Embedded Computing Conference Minneapolis, MN www.rtecc.com/minneapolis
ARM Developers’ Conference Santa Clara, CA www.rtcgroup.com/arm/2007
Real-Time & Embedded Computing Conference Chicago, IL www.rtecc.com/chicago
NXTcomm Chicago, IL www.nxtcommshow.com
06/12-14/07 Automation Technology Expo East New York, NY www.devicelink.com/expo/ atxe07
10/03-04/07 NEW Portable Design Conference & Exhibition Santa Clara, CA www.portabledesignconference. com
06/19-21/07 Transformation Warfare 2007 Virginia Beach, VA www.afcea.org
06/25-28/07 Advanced Aerospace Materials & Processes (AeroMat) Baltimore, MD www.asminternational.org
If your company produces any type of industry event, you can get your event listed by contacting email@example.com. This is a FREE industry-wide listing.
HARTING sets new standards in AdvancedMC™ connector reliability HARTING offers the widest product portfolio of AdvancedMCTM and Power connectors for AdvancedTCA® and MicroTCATM applications.
HARTING now brings the reliability of signal connectors to new heights. Introducing con:card+, a quality seal that identifies press-fit connectors providing the highest level of mating reliability for AdvancedMCTM modules.
The con:card+ connectors’ GuideSpring systematically positions the AdvancedMCTM module precisely in the connector, reducing the maximum possible offset between connector contacts and module pads by 60%. This significantly increases the mating reliability of MicroTCATM backplanes and AdvancedTCA® carrier blades. HARTING provides complete design in support, including signal integrity services and 3D modeling.
5/3/07 2:22:57 PM May 2007
TechnologyInContext MicroTCA Systems
MicroTCA Offers High Availability in a Small Form-Factor Its small form-factor combined with high communication bandwidth and compute power have thrust MicroTCA into the limelight. But it may be the promise of high availability that keeps it there. by D avid Pursley Kontron
exploration er your goal peak directly al page, the t resource. chnology, and products
nce only a requirement in telecom- some features that support high availabilmunications, high availability is ity are innate to MicroTCA and essentially now desired for a wide range of come “for free.” Others require additional applications, including industrial, trans- hardware to boost availability and some portation, military and aerospace. Its at- require middleware-type applications to tractiveness stems from the fact that it can do so. Finally, to completely maximize reduce a system’s total cost of ownership the system’s availability, application softby significantly reducing the amount of ware must be aware of its environment system downtime. Also, it has become a and react accordingly. hard technical requirement for many netcentric applications where the effect of MicroTCA Basics mpanies providing solutions now a failure of any one component could be MicroTCA is quickly becoming a oration into products, technologies and companies. Whether your goal is to research the latest magnified thetechnical network. preferredisarchitecture because of its comlication Engineer, or jump to a across company's page,Net-centric the goal of Get Connected to put you span all industries. bination of small size, high bandwidth vice you require applications for whatever typenow of technology, ies and products you Unfortunately, are searching for. high availability is ofand high availability (Table 1). Measuring ten optimized away in the face of conflict- 2U (3.5 in.) in height by 0.6 to 1.2 in. in ing requirements, such as size and cost. width by 7.22 in. deep, MicroTCA is even However, with the arrival of MicroTCA, smaller than 3U VME and CompactPCI highly available systems can now be de- cards. signed within a small, affordable formDespite its size, MicroTCA offers factor. high bandwidth, both in terms of compute Although the general advantages bandwidth and communication bandof high availability are well known, the width. Up to 12 compute blades on a single methodology for making it a reality has backplane provide a tremendous amount not been widely discussed. For example, of computing resources, especially when each blade can be using a multicore processor. Quoted communication bandwidth Get Connected with companies mentioned in this article. capabilities range from 40 Gbits/s to more www.rtcmagazine.com/getconnected than 1Tbit/s. Because the actual band-
End of Article
May 2007 Get Connected with companies mentioned in this article. www.rtcmagazine.com/getconnected
width is implementation-dependent, both numbers are theoretically correct. With this amount of compute and communication power, MicroTCA has more than enough bandwidth for the most demanding applications. It also supports up to five nines (0.99999) availability through a combination of Intelligent Platform Management Interface (IPMI)-based health monitoring, hot-swap capability and support for full redundancy. Since redundancy is implementation-specific, any given system may have full redundancy, partial redundancy (redundant power and cooling subsystems is a common configuration) or no redundancy, depending on the system’s cost and availability requirements.
IPMI’s Impact on Availability
Central to high availability for MicroTCA, and many other form-factors, is the IPMI. This interface defines the standard by which sensors and Intelligent Platform Management Controllers (IPMCs) address each other and communicate. A common misconception is that an architecture’s support for IPMI improves availability in and of itself. To the contrary,
Kontron’s AM4010 dual-core processor AMC offers dozens of sensors to provide the most accurate picture of the board’s health. This type of monitoring is essential to a highly available system.
Backplane Interconnect !-#
IMPI only defines an infrastructure upon which a highly available system could be built. The effect of this infrastructure on high availability is largely dependent on the number and types of sensors present in the system as well as the software monitoring these sensors. Sensors are integrated in each fieldreplaceable unit (FRU) in the system, including the cooling units (fans), power entry modules, MicroTCA Controller Hub (MCH) and the AMCs. These sensors use IPMI to communicate the status and health of components by relaying information such as fan speed, inlet and exhaust temperature, processor temperatures and communication link statuses. The actual number and types of sensors may vary widely from one AMC to another. For example, while some offer only a handful of temperature sensors, AMCs designed for high availability may include dozens of sensors to relay health and status information of the components and interfaces on the board (Figure 1). However, the sensors themselves are of little use without an infrastructure for monitoring them. In a MicroTCA system, the software or firmware that monitors the system runs on the MCH. At any given time, a supervisor can log into the MCH and query the status of any or all sensors in the system. Furthermore, it is the job of the MCH to monitor the sensors via IPMI and raise an alarm if a sensor is showing a troublesome condition. Often, the alarm thresholds can be tailored to a specific application, although the default settings will be acceptable for most uses. The alarm itself can be handled by flashing LEDs, audible alarms or even by sending a message to an external human or machine monitor, depending on the system, the MCH and its firmware. High availability can be boosted further by making application software or middleware monitor the sensors and take proactive action. For example, if the temperature of a device starts to rise more than expected, or if a fan does not properly react to an increase in temperature, an alarm message can be sent to an operator.
MicroTCA offers scalable availability from 0.999 to 0.99999 by allowing fully redundant systems, partially redundant systems and systems with no redundancy at all.
In extremely highly available systems, the software can even be configured to preemptively address pending failures. For example, if impending trouble is detected on a processor AMC, the software could preemptively offload critical processes to another processor AMC. This type of proactive maintenance requires a significant amount of support from the middleware and/or application software, so it is rarely used. Nonetheless, this capa-
bility exists for those systems that require the highest availability possible.
Hot Swap’s Impact on Availability
Often hot swap is mistakenly thought to be synonymous with field replaceability. In fact, it is much more than that. Hot swap is the ability of any FRU in the system to be removed and replaced without bringing down the overall system. May 2007
VITA 31, 41
Compute Bandwidth (system)
MicroTCA meets the architectural requirements of high bandwidth and high reliability while offering a small form-factor.
This feature alone can offer a significant amount of high availability. However, the relevance of allowing the system to remain up while replacing an FRU is highly dependent on the application and the configuration. For example, if the only processor AMC in the system needs to be replaced, the fact that the system remains up and running while that node is replaced is largely of theoretical interest. For all practical purposes, the application is unavailable from the time the node goes down until the hot-swap procedure is complete and the new AMC is booted. In such a case, the only major benefit of hot swap is that only the replaced node will need to boot. The remainder of the system is still running. This means that the mean-time-to-repair can be quite low, assuming a spare processor board is nearby. Nonetheless, to maximize hot swap’s impact on high availability, redundancy must be used as well. Also, some components, such as power entry modules, require redundancy in order for hot swap to work. If there is only one power entry module, it should be obvious that the entire system will be powered down when it is removed to be replaced.
Redundancy’s Impact on High Availability
The point of redundancy is to remove any single point of failure in the system. By doing this, two or more items would have to fail before the system crashes. Like the other capabilities that have been discussed, the true impact of redundancy depends on the system’s configuration, and sometimes as well on the software or middleware running on the system. Unlike IPMI and hot swap, not every MicroTCA system will include redun12
dancy. It is up to the system designer to determine if, and to what level, redundancy will be included. Each redundant component adds an additional cost to the system. Even in a system with fully redundant hardware, some software or middleware support is required to use the redundancy. Often, the first FRU that is implemented redundantly is the power entry module. Typically, this means including two power entry modules, each of which has the capability to power the entire system. If one of the power entry modules goes down, either by component failure or user intervention, the MicroTCA system will continue operating as if nothing has happened. This behavior is defined in the MicroTCA specification and is fully supported by compliant power entry modules. The software does not need to know or care about this capability. Cooling units are also prime candidates for redundancy because of the moving components, or fans, which they contain. If a cooling unit fails, in theory the other cooling unit will continue to operate and cool the system. However, this is highly dependent on the implementation. For example, it is quite possible that if the overall cooling power of the system is reduced, temperatures may start to increase. Depending on the system and the heat it generates, reduced cooling ability may cause the fan speed of the operational cooling unit to increase and/or cause an increase in operating temperature. It may also mean that a thermal-related failure is inevitable. In the latter case, for a highly available system the monitoring process, either human or middleware, must be observant enough to call for a repair in time to prevent system failure.
Redundant MCHs are the next logical step, as this removes a single point of failure that would affect all of the AMCs in the system. However, this does require a minimal amount of application software or middleware intervention to make the switchover between MCHs work correctly. To illustrate with Ethernet interfaces, each of the two MCHs provides an Ethernet port to each AMC, which appears as eth0 or eth1 to the software. This allows an application to communicate via eth0 by default, but then use eth1 when eth0 is unavailable. This switching is done under software control, whether application software or middleware. Finally, the AMCs themselves can be redundant (Figure 2). This configuration typically requires a significant amount of software support, and middleware is a typical solution for hiding most of this complexity from the software designers. For example, in the case of a processor AMC that is failing or being removed, the rest of the system must understand that the processor is no longer available and account for this in whatever manner is appropriate for the application. In the ideal case, the applications that were running on the processor AMC might even seamlessly migrate to another AMC. The wide availability of MicroTCA allows system designers the choice of not making trade-offs between size and availability. As MicoTCA technology continues to advance, so too will the customer’s and designer’s desire for highly available systems. This increased interest in high availability not only stands to help improve overall system development, but also will likely lead to new products and technologies that allow higher availability with less application support. Kontron America Poway, CA. (858) 677-0877. [www.us.kontron.com].
TechnologyInContext MicroTCA Systems
Keeping Your Cool with MicroTCA The increase in energy density of MicroTCAâ€™s smaller formfactors makes thermal design an important consideration in systems based on this architecture. by S tuart Jamieson Emerson Network Power, Embedded Computing
n 2003, the PCI Industrial Computer Manufacturers Group (PICMG), in conjunction with telco operators, defined the Advanced Telecommunications Compute Architecture (ATCA). AdvancedTCA addresses the needs of modern telecommunications systems by offering features such as a high-performance, switched-fabric serial backplane operating at speeds of up to 10 Gbits/s per link and built-in redundancy for essential system structures such as backplane channels and system management, as well as a native ability to allow hot-swap of circuit cards. In 2005, PICMG provided finer design granularity by releasing the Advanced Mezzanine Card (AMC) specification, defining modules that can plug into ATCA carrier cards to foster design reuse as well as allowing the system to offer hot-swap at the module level. While these specifications addressed all of the features needed for modern telco systems design, they originally targeted only the needs of large installations such as central offices and major PBX (private branch exchange) systems. The 8U carrier cards used in ATCA prevent the technology from being used in smaller systems such as wireless base stations and customer 14
Enhanced Module Management Controller (EMMC) MicroTCA Carrier Management Controller (MCMC) Module Management Controller (MMC) Advanced Mezzanine Card (AMC) MicroTCA Carrier Hub (MCH) Other Field Replaceable Unit (FRU) Other non Field Replaceable Unit Local Manager Function
Carrier FRU Carrier Info DeviceFRU 1 Info Device 1
Cooling unit (up to 2)
Power Module (up to 4) EMMC
Carrier Manager MCH 1
60 Lane Fabric Switch
Shelf Manager 60 Lane Fabric Switch
Internet Protocol Capable Transport
The MicroTCA shelf replicates the IPMI system management functions of ATCA shelves and replaces the module management functions provided by the carrier boards.
premise equipment. To address the needs of these smaller systems while still using the software and AMC module hardware of ATCA, PICMG created MicroTCA. MicroTCA leverages hardware and software developed for full-sized AdvancedTCA systems, but scales to more modest performance and much smaller form-factors. One side effect of this scaling is an increase in energy density, making thermal design an important consideration when creating MicroTCA systems. Essentially, MicroTCA is a backplane and chassis. AMC modules can be plugged into it directly, rather than as part of a carrier card. The system hardware acts as a virtual ATCA carrier card for AMC modules, providing all of the software and signal support that the carrier provides in ATCA. As with ATCA, the backplane supports serial communications channels in star, dual-star and mesh configurations, allowing a MicroTCA system to re-create in miniature whatever functions can be implemented in ATCA. A pair of central switches in the system supports up to five serial communications lanes per module with up to 12 modules in a subrack.
Single Tier Shelf
provided by the shelf management controller in ATCA, are handled by MicroTCA Carrier Hubs (MCH), which also plug into the backplane. These functions include monitoring and control of system-level
Optical Mux Workgroup Edge Router/ Router IP Services Switch Wi-Fi Base
Entertainment Systems T1
Because of its potential for compact as well as mid- to high-performance designs, MicroTCA addresses a large segment of telecommunications system needs.
Two Tier Mixed Width
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Two Tier Fixed, Single Width Shelf 0-#( !-# !-# !-# !-# !-# !-# !-# !-# !-# !-# !-# !-# -#( 0-
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One key feature of ATCA systems, the built-in system management that supports user-implemented hot-swap and fault-tolerance functions, is replicated in MicroTCA (Figure 1). Card management functions,
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AMC AMC MCH PM
Standard shelf sizes for MicroTCA systems range from units with 24 modules down to those with only a few. Custom shelf form-factors are allowed. May 2007
TechnologyInContext resources such as fans and power supplies through the I2C-based Integrated Peripheral Management Interface (IPMI).
The MicroTCA Application Space
Although the MicroTCA architecture is adaptable to many types of embedded systems, its initial targets are telecommunications and networking applications. Its protocol-agnostic, highspeed serial backplane is a natural fit for the needs of packet-switched communi-
cations. Within this telecom space, MicroTCA suits a wide range of functions, running from small, consumer devices to full-featured, mid-capacity gateways and servers (Figure 2). Because MicroTCA uses unmodified AMC cards developed for larger ATCA-based systems, MicroTCA provides developers with an opportunity to address these mid-range systems at relatively low cost. Reuse means that most of the work has already been done and therefore additional markets for
the AMC modules will help drive down manufacturing costs. More importantly, however, MicroTCA also addresses these applications by offering a compact form-factor. Standard shelves based on the MicroTCA architecture can range in size from two-tier, with potentially 24 modules, to pico, with only a few modules (Figure 3). Pico shelves can even be as small as one AMC (with the MCH on a motherboard), making them potentially suitable even for consumer devices. Representative applications for MicroTCA include wireless base stations and customer premise equipment. Wireless base stations need high performance to handle the data, voice and media traffic that make up todayâ€™s and tomorrowâ€™s mobile communications. At the same time, however, they need to be relatively compact and low power due to their remote installation sites. Customer premise equipment must be even smaller, since installation in a closet or small room is highly probable. The many choices of form-factor along with the functional capacity of AMC help developers optimize MicroTCA designs for both such systems.
Incompatibility Issues Arise
Developers seeking to work with MicroTCA should be aware that there is a limited but growing availability of AMC functions along with two important design issues to consider. One design issue is related to limited management functionality on some AMC cards. The second is related to power for the MicroTCA chassis and the cooling concerns that arise. Because the AMC specification is still in its early adoption phase, the present crop of commercial modules provides the most common functions of telco design, such as T1/E1 telephony interfaces, DSPs, storage system interfaces, CPUs and network controllers. The rest of the system will probably be a custom design. Fortunately, modules based on FPGAs are also starting to appear. These modules leave large segments of programmable logic available to the developer and thus enable the implementation of custom functions without the compatibility risks of full custom designs. Unfortunately, some of the available modules that are now commercially avail16
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TechnologyInContext able were rushed to market in an attempt to capture market share. During that rush, some design teams made compromises by implementing only a part of the module’s system management functions or by violating module power restrictions. Therefore, developers now seeking to use such off-the-shelf AMC modules in MicroTCA designs need to be thorough in their evaluation of candidates. One compromise that has become apparent in some first-generation AMC
modules is a failure to implement the full spectrum of shelf management functions. Much of the potential for fault tolerance and high-availability system operation stem from the system management functions. Failure to implement the full management system can thus make such operations difficult or impossible to achieve, preventing the reuse of the design effort.
Addressing Power Concerns
A second compromise has been a
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violation of module power limits. The power scheme for AMC modules recommends a staggered power limit based on card size, ranging from 20W for compact single cards to 80W for full double cards. These recommendations are based in part on the need to control overall system thermal characteristics and prevent the formation of “hot spots,” and in part on the limits of forced-air cooling. Developers are sometimes tempted to ease or exceed these power recommendations when they have control over both module and shelf design and can therefore fully control system cooling. The risks that arise from exceeding module power limits stem in part from the highly compact structure of a MicroTCA system. A shelf fully populated with modules can attain a high power density if all the modules are dissipating their full power allocation, but systems are limited in their air cooling capabilities. Forcedair cooling is the norm for MicroTCA systems; it is not a panacea for thermal excesses. Without careful planning of airflow in a chassis, airflow dead spots may develop within the shelf. In addition, careless placement of modules within the enclosure may result in the creation of hot spots that exceed the cooling ability of local airflow. Developers creating custom shelves may be tempted to address such issues by simply increasing airflow through the system, but that approach can create other problems. In order to meet the requirements of the European Telecommunications Standards Institute (ETSI) and Network Equipment Building System (NEBS) standards for telco equipment, for instance, the acoustic noise of fans must be below specified limits. Similarly, applications such as consumer equipment and commercial installations are subject to sound level regulations from worker safety agencies. The airflow needed to accommodate careless thermal design may not be attainable without violating such restrictions. Even when all of the AMC modules adhere to specified power limits, however, thermal issues may still be a concern. Fortunately, there are several steps that developers can take to help reduce the impact of these issues. These include proper handling of airflow, careful selection of power
TechnologyInContext supplies and the use of intelligent fans. Airflow in a MicroTCA system is specified from bottom to top but can use a push or pull type of configuration. Pushing air through the system has the advantage of helping to keep dust and other contaminants from entering the system through gaps in the housing. It also provides an opportunity to direct the airflow toward high-powered boards. Because air exhaust is at the rear of the enclosure, however, this approach requires that the fans be mounted at the front. But front-mounted fans put their noise into the user environment, which may not be acceptable in some types of installations. Pull-type configurations allow designers to provide a more even flow of air through the system, while placing the fans at the back or top of the system provides better acoustics. With careful filter design the contaminants issues can be resolved. Noise can be controlled somewhat by using fans with built-in thermal sensors and adjustable speeds. Together with IPMI shelf management functionality, such intelligent fans can be run at lower speeds when heating is not excessive to keep noise levels down. These fans can also allow the system to adequately handle fault conditions. NEBS requirements, for instance, call for a system to maintain operation in the event of a single fan failure until the fan can reasonably be replaced. Similarly, the system must be able to maintain operation long enough for an orderly shutdown when the entire fan tray fails. Having intelligent fans linked to shelf management can help meet such requirements where needed.
The placement of the shelf itself should also be considered. Many rack-mounted systems have forced air to the rack from which each shelf draws its forced air supply. The same care that goes into managing airflow within a chassis should be applied to the rack as a whole to prevent feeding a shelf with overheated air. Finally, developers should evaluate the system power supply for its thermal and management functionality. Because the power supply itself is not 100% efficient in converting line power to system DC, it is also a source of heat. The more efficient the power supply, therefore, the less system heat will need to be managed. To meet fault tolerance requirements, the supply should also be capable of responding to IPMI management directives, such as switchover to a redundant supply.
When these types of system thermal and management issues are properly addressed, the MicroTCA design approach holds great promise for compact telecom systems. MicroTCA presents developers with an opportunity to leverage technology and software developed for large systems in the development of compact systems. Capitalizing on this opportunity will require careful thermal design and full adherence to system management specifications, but the payoff will be great performance with the cost benefits of design reuse. Emerson Network Power, Embedded Computing Madison, WI. (608) 831-5500. [www.artesyncp.com].
Other Airflow Choices
Beyond fan placement and selection, airflow choices that developers need to consider include the placement of boards in the system and placement of the shelf itself. Placing high-powered boards together in a shelf can create hot spots and may simultaneously restrict airflow if large heat sinks occupy much of the space between boards. Gaps in board placement can also cause a problem by creating an open channel for much of the airflow. Developers should consider separating high-powered boards and using blank panels for empty slots to help keep airflow uniform. May 2007
ATCA Systems Offer Flexible Building Blocks for IMS Network Growth Standardized applications platforms bring flexibility and scalability to meet near-term IMS and IP-based network deployment needs. by D an Leih Motorola Embedded Communications Computing
elecom service providers are developing network architectures that expand their capability to deliver new mixed-media services to consumers. New network deployments are IP-based and capable of delivering voice, data, music, video and other media. New services, however, are not comprised of a few highvolume applications but rather many types of smaller applications. As a result, IP networks require flexibility and scalability in deployment. Employing the concept of standard platform classes simplifies the implementation and deployment of IP networks. With its inherent flexibility, scalability and carrier-grade capabilities, Advanced Telecom Computing Architecture (ATCA) provides an ideal platform for implementation of new services. The IP Multimedia Subsystem (IMS) is a global standard for IP networking. The standard includes control and processing functions for a large number of network node types. Because of the diversity of IMS elements most currently identified, service applications can be processed and delivered over an IMS network. However, the diversity of elements and the separation of control and processing functions make the IMS network appear overly complicated for simple application delivery or small volumes of users. Figure 1 provides an example of a basic IMS network. Key to the IMS network is the separation of the control plane from the transport and service delivery planes. This separation enables the any-applica20
tion-to-any-user promise of IP networking. In some cases, this same separation can make it difficult for equipment makers to understand which control functions must be implemented within the network and which should be included in their offering. Cost-effective implementation of IMS functions therefore requires flexibility in application deployment. It also requires scalability of computing elements, specifically the ability to treat added system capacity as a single element with increased processing power. Another facet to be considered is the availability and integration of diverse system elements. Without the ability to scale the system and install various types of processing components, the chosen equipment will remain a vertical solution. Systems capable of meeting future network needs must support appropriate backplane and fabric speeds as dictated by the applications supported and subscriber density. In addition, many central office locations have a fixed footprint. The cost of additional real estate can be prohibitive; therefore new technologies must be more efficient than existing implementations. Finally, despite the presence of IP networks and systems within the enterprise space, the majority of applications within a carrier IP network require five nines (99.999%) availability. Modular and bladed computing architectures have historically failed this requirement due to lack of design for high availability, Network Equipment Building Standard (NEBS) and other carrier requirements.
Conceived with an understanding of the shortcomings of previous standards such as CompactPCI, ATCA was designed from the ground up to meet the needs of network equipment providers (NEPs) and carriers. For example, while many computing technologies can theoretically be used to build network elements, only ATCA was designed to meet worldwide environmental and regulatory requirements. As a result, the expanding network of ATCA suppliers is introducing an ever more diverse array of products to meet the specific needs of NEPs. To date, many of the major NEPs including Siemens, Alcatel, Nortel and Motorola have already issued product announcements supporting the popular standard. Current-generation ATCA products are generally based on a 1 Gbit/s Ethernet fabric. While sufficient for many control and service plane elements, this technology is limiting the adoption of ATCA for elements such as media processing and some central core nodes. Major suppliers are now demonstrating systems with 10GigE fabrics, which are an excellent match for the needs of many media gateway and higher performance core elements. In all cases, the flexibility and scalability of ATCA-based systems enable NEPs to size their equipment to the needs of the customer base without having to redesign the hardware and software.
Home Subscriber Server Example
A good example of this flexibility can be demonstrated in the Home Sub-
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SolutionsEngineering scriber Server (HSS), which holds subscriber service and billing information. HSS design must include the ability to be deployed at a cost-effective level and be expandable to meet future subscriber levels.
Because of its inherent multiprocessor, multiblade configuration, the HSS is an ideal application for an ATCA implementation. Use of single logical databases implemented across the front-end and backend server blades allows the database to be
transparently increased by simply adding server blades. This transparent scalability also exists in other IMS elements. Figure 2 illustrates an HSS configuration that occupies most of an ATCA chassis. As pictured, the HSS employs five
IMS Architectural Overview AS
HSS ‘IMS Data’
Service/Applications Layer CSCF S-CSCF
IMS Session Signalling IMS User Plane Data
WLAN PD G
WLAN WAG 3gpp R6
BB (IPv4/ IPv6)
ATCA-7221 Intel Xeon
ATCA-7221 Intel Xeon
ATCA-7221 Intel Xeon
ATCA-C121 carrier w/AMC-8401
ATCA-7221 Intel Xeon
ATCA-7221 Intel Xeon
ATCA-7221 Intel Xeon
ATCA-7221 Intel Xeon
ATCA-7221 Intel Xeon
Dual Star 1G Internal Ethernet Fabric CMM Active
HSS Front End
IPv6 PDN (IPv6 Network)
A basic IMS network showing the separation of the control plane from the transport and service delivery planes.
Redundant Fan Trays
OS Networks (PSTN, CS PLMN)
IPv4 PDN (IPv4 Network)
D SLAM 3gpp R7/ TISPAN R1...
Application (SIP, AS, OSA, AS, CAMEL SE)
E1/T1 for HLR
CMM Standby Non-volatile Storage
HSS Back End
A home subscriber server configuration employing five processor blades that fit into an ATCA chassis.
processor blades for the front-end database and three processor blades for the back-end database. Total capacity will vary based on a variety of factors including record size, access times and compute power. A small deployment might start with a single blade for each of the front-end and back-end processing elements. Assuming a typical 14-slot chassis, this would leave 10 slots for other network elements (assuming redundant switch blades). Much of a small IP networking deployment could therefore be implemented within a chassis resulting in a very low capital expenditure entry point. The ability to add Advanced Mezzanine Cards (AMCs) using an AMC carrier blade makes the system extremely flexible. The system can be implemented with a variety of high-availability architectures including N+1 and N+M. The design of the ATCA standard for high availability is a key benefit versus other modular computing architectures. A more complete network example demonstrates the scalability potential of
SolutionsEngineering ATCA systems, which allow both aggregation and disaggregation of network elements. The HSS example shows how aggregation of functions into a single chassis can be used to start a small network followed by disaggregation into more dedicated functions as the network expands. Figure 3 shows an example of one way a more complete IMS network can be implemented using ATCA technology.
Network Element Platform Classes
By examining similarities between certain types of IMS elements as well as the network layer in which they reside, logical combinations of elements can be developed. In order to reduce the number of required nodes to a manageable level, ATCA suppliers and NEPs have been evolving the concept of “platform classes” for their network elements. This concept embodies the principle of aligning network elements with common equipment requirements, and in most cases, the ability to share a common physical location. The benefit to NEPs is a reduced set of equipment families, each of which can serve a range of applications. Suppliers who align offerings around a small number of common platforms gain the ability to serve customers with a more complete offering and the potential to dramatically reduce operating expenditure. Defining common platform classes starts with a technical understanding of the requirements of the various network elements within the IMS standard (see sidebar “Common Platform Classes”). By applying the concept of standard platforms, we can simplify the implementation of an IP/IMS network. Despite the many elements shown on the left side of Figure 3, only a small number of chassis are required to implement most of a network. The implementation can be done by combining those elements within a platform class together in a chassis or, depending on network size, on a single blade. Once the element implementations are defined, increased capacity is largely a matter of increases in the number of processing blades or the processing power of each blade within the ATCA chassis. The following are some examples of possible function combinations within an IMS network as shown in Figure 3: • Both the Subscriber Locator Function (SLF) and the HSS are Authentication and Database functions. When the SLF is required, these can be com-
Common Platform Classes Common Platform Classes are defined by evaluating the requirements of each network element and grouping like requirements together, especially where physical co-location can be achieved. Evaluation includes assessment of types of data/ media to be processed, requirements for processing power, memory, connectivity (logical and physical), types of software required (control, signaling, high availability, etc.), logical and physical location in network, and other factors. Understanding platform class needs and directions can drive system and product roadmaps at both equipment makers and suppliers. Motorola currently defines seven platform classes: 1. Signaling Class • Includes SoftSwitch, IMS Control Server (x-CSCF), Signaling Gateway (SGW). • Requires 1GigE fabric (with some movement to 10GigE in the future), highperformance compute capability, T1/E1/STM interfaces, and a variety of protocol software (SS7, SIP, DNS, IPsec and others). 2. Bearer Class • Includes Media Gateway (MGW), Base Station Controller (BSC). • Requires 10GigE fabric, media processing capability such as DSP, network/ packet processing capability, large variety of I/O capabilities including E1/ T1/STM/OC-3/etc., wide variety of protocol software (MGCP, MEGACO, IPsec, DNS, MIPv6, others). Aggregation Router applications can be considered part of class but require much higher throughput, large form-factors and fiber connectivity and are best treated separately. 3. A uthentication and Subscriber, and Database-Intensive Server Class • Includes HSS/HLR, Short Message and Multi-Media Servers. • Requires 1GigE fabric, high-performance computing processing, T1/E1 ch. STM-1 I/F, protocol software (SS7 stacks, SIGTRAN, LDAP), enterprise OS (i.e., Redhat /SuSe Linux), third-party database. 4. Application Class • Includes Application Servers, DNS, DHCP, NTP and PTX server. • Requires 1GigE fabric, high-performance computing (some applications can run on enterprise class servers), protocol s/w (SIP, Diameter, RADIUS, LDAP). 5. Transport Class • Includes IP-DSLAM, Optical Network Termination, Optical Line Termination. • Requires high-performance optical interfaces, multiple compute processing types, RTOS (e.g., VxWorks), generally large non-standard packaging. 6. Element Management Class • Includes Element Management Server (EMS). • Requires multicore processing, protocol software (DNS, IPsec), OS (Solaris 9/10, Linux) 7. Base Station Class • Includes WiMAX, 3GPP, 3GPP2. • Requires small footprint (proprietary, MicroTCA), high-speed backhaul/OC192, Baseband DSP processor, protocol software (IPsec via L2TP, AESCCM).
SolutionsEngineering bined as co-resident applications on a blade or as separate applications running within a shared chassis. • The SCIM, S-CSCF and I-CSCF can logically be combined based on commonality of system requirements, coordinated involvement in establishing a call session and proximity in the network. • The P-CSCF and the BGF can be combined as they are both involved in servicing the actual call session once it is established by the S-CSCF. These functions are likely to be scaled at a different rate from the other core (SCIM, SCSCF) combination so it makes sense to place them on their own blades or within their own chassis. • The Media Resource Function (MRF) determines application server functions. Both elements require similar compute resources and are a logical network combination. • The Signaling Gateway, Media Gateway and Media Gateway Control Function share common elements. They are the entry point for sessions from many access
networks. Gateways will include a wide range of processing and translation elements. Connections include E1/T1, TDM, packet networks and others. Use of AMCs in this space allows ATCA-based systems to be tailored for the specific needs of the customer without replacement of the chassis or management systems. Once ATCA-based systems are implemented, increases in processing density allow increased subscriber services within the existing footprint. An example of this is evident in the migration of current-generation payload blades based on Intel Xeon technology to new-generation Intel Core Duo technology. Combined with software advances, the ability to refresh technology within a chassis offers opportunity for increased capacity. During the Mountain View Alliance Communications Ecosystem Conference in February 2007, Paul Brescia of Nortel Networks indicated that early development efforts with next generation blades are resulting in increases in processing power of 2.5x when moving to an Intel Core Duo from a
single core Intel Xeon processor. ATCA technology is now available from a wide variety of suppliers in combinations ranging from building blocks to application-ready platforms or pre-integrated and validated communication servers. With this flexibility of engagement, NEPs can build the systems they require using the appropriate starting level of integration. A robust ecosystem means that offthe-shelf solutions are available for virtually all major network elements, and many companies offer customization and other professional services. The common platform approach offers a way to cost-effectively implement IP networks. ATCA technologies are a natural starting point for network elements in all-IP architectures and continue to evolve to meet the needs of service providers and consumers. Motorola Embedded Communications Computing Tempe, AZ. (602) 438-5720. [www.motorola.com/computing.jsp].
PSTN AS –Application Server BGF – Border Gateway Function BGCF – Border Gateway Control Function CSCF- Call Session Control Function
IM-SSF OSA SIP-AS
IM-SSF OSA SCS SIP-AS
An ATCA Implementation of IMS Functions
HSS – Home Subscriber Server MGCF – Media Gateway Control Function MGW – Media Gateway MRF – Media Resource Function SGW – Signaling GateWay
An example of some of the ways that complementary elements can be fit into a chassis to reduce the number of nodes in a more complex IMS network.
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IMS: A Future of Diverse and Integrated Services IP Multimedia Subsystem enables telecommunication service providers to generate new revenues from differentiated converged services, while reducing cost.
by E ric Gregory RadiSys
exploration er your goal eak directly al page, the resource. chnology, and products
s it possible to be all things to all people? The answer will come over AS AS AS the next few years as service providers worldwide launch IP Multimedia APPLICATION LAYER Subsystem (IMS), which aims to deliver SCIM any service over any device connected to any network. S-CSCF HSS I-CSCF IMS is all about flexibility: It is a CONTROL LAYER MRF set of open, industry-standard protocols MGCF/ F-CSCF MRFC IBCF that creates a carrier-grade service-deSGF RACS/PDF livery architecture for use with packet panies providing solutions now BASIA-BGF and circuit-switched networks. This IMSIBCF MRFP ration into products, technologies and companies. Whether your goal is to research the latest PDG/GGSN IP MGW design allows service providers to ofuse TRANSPORT lication Engineer, or jump to a company's technical page, the goal Get ConnectedTRANSPORT is to putLAYER you NETWORK hardware and software from multiple ice you require for whatever type of technology, SGSN/ ies and productsvendors, you are searching for. INTERNET and it allows them to deploy MGW services that run on both their existing circuit-switched infrastructure as well BSC IRN C CMITS DSLAM WAG ACCESS LAYER as new IP-based equipment. As a result, 2G 3G CABLE DSL WLAN PSTN WIRELESS WIRELESS IMS helps bridge the past and the present, in addition to disparate technologies from different vendors. IMS is designed to enable any opFigure 1 An overview of the IMS planes, as well as the nodes that can be found in erator—wireline, wireless or cable—to each plane. serve its customers anytime, anywhere. For example, instead of serving its cus- tomers only where they’re at home in his remote to select a player in a game front of a TV, a cable operator could use and have the set-top box automatically IMS to provide video services to laptops search the Internet for the player’s Get Connected with companies mentioned in this article. in the office or cell phones on the road. stats—all glued together seamlessly uswww.rtcmagazine.com/getconnected Or a sports fan watching TV could use ing IMS.
End of Article
May 2007 Get Connected with companies mentioned in this article. www.rtcmagazine.com/getconnected
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Those examples also highlight the business case for IMS. By being able to serve their customers at more times, in more ways and in more places, operators can generate additional revenue from each subscriber. IMS also builds on the growing consumer convergence market cultivated by triple play (voice, video and data) and quadruple play (voice, video, data and mobile). By making it
Broad Industry Support and Applicability
The migration to IMS is a major, worldwide, long-term trend in telecom because it applies to all types of service providers, including wireline, wireless and cable. That wide applicability is a byproduct of the IMS heritage. IMS standards development has received unprecedented cooperation across many of the leading
ATCA shelf for computing applications.
fast, easy and cost-effective to launch services, IMS also gives operators a way to deal with the commoditization of basic voice services and a way to compete on services and applications rather than price alone. IMS also makes it easier, faster and more cost-effective for operators to offer bundles of services. Those packages are key to retaining customers—particularly high-value ones—because the more services that customers buy from a single operator, the less likely they are to switch to a competitor. IMS also gives people more ways to communicate. British Telecom and AT&T are among the major operators that have begun deploying IMS. ABI Research predicts that fixed and mobile operators will invest a total of $10.1 billion in IMS infrastructure through 2011. During that period, the payoff will be in terms of reduced opex (operating expenses) and $49.6 billion in revenue from IMS-enabled applications, ABI says.
Switch and Control
Switch and Control
standards organizations worldwide to ensure interoperability across 3G cellular, WiMAX, Wi-Fi, cable and Digital Subscriber Line (DSL), along with legacy 2G cellular and Public, Switched Telephone Network (PSTN) access networks. This broad applicability is noteworthy because it means IMS-based systems won’t languish as a niche play. On the contrary, a growing majority of leading global service providers—such as AT&T and BT—are embracing IMS as their path toward offering innovative converged services to broader markets based on a common service delivery framework. All IMS systems—regardless of vendor or application—are based on an architecture with four layers or “planes.” The IMS access plane works with legacy circuit-switched networks, along with the latest packet and wireless networks, so IMS operators can offer services to their customers using any access network technology. This backward compatibility also allows service providers and their customers to continue to use existing devices that aren’t ready to be retired.
The IMS applications plane supports a broad range of voice, video and multimedia applications. The final two planes— control and transport—provide the signaling and connectivity between users and their applications, fulfilling the IMS vision of allowing users to access any service, any time, on any device and on any network. That flexibility means operators can maximize their revenue growth from a broader subscriber base, while reducing the chances that customers will turn to a rival. By delivering more services to a broader subscriber base using a single service delivery infrastructure designed for reuse, IMS operators will reduce overall operating costs (Figure 1).
The ATCA Advantage
The Advanced Telecommunications Computing Architecture (ATCA) is emerging as a key component of IMS. ATCA is a shelf-and-blade architecture that handles everything from protocols to management to cooling. Like IMS itself, ATCA is an open, flexible standard, making it ideal for multi-vendor, multi-technology environments. As a result, ATCA lets systems integrators purchase components from whichever suppliers meet their needs, mixing Brand A racks, Brand B shelves, Brand C server blades, Brand D router blades and so on. Makers of IMS products can leverage ATCA’s predictability to reduce development costs and time-to-market, such as by reusing the same ATCA foundation across multiple infrastructure products. IMS vendors also can leverage the large market of ATCA components, boards and systems, thereby freeing up time and resources that would have been wasted on in-house electrical and mechanical design. Finally, ATCA has proven itself in a variety of real-world telecom deployments outside of IMS, so vendors can be confident that it will provide carrier-class reliability and performance. Many IMS architecture components are compute-intensive, such as Serving Call State Control Functions (S-CSCF), Home Subscriber Servers (HSS) and Application Servers (AS). An ideal way to meet those demands is with ATCA-based CPU blade
and time-to-market—and thus improves their competitive position—because they can use the same managed platform for a variety of applications.
The MRFP: An Example of IMS Functional Reuse
One way to understand the reuse and value of IMS for IP-based converged services is to look at the role of the IP media
introduction and revenues, while reducing integration effort, complexity and cost. Along with broad multi-service support, the MRFP should also support multiple control protocols, enabling it to communicate with CSCF and application server equipment from different vendors already deployed in the network. Finally, the MRFP should support multiple types of voice, video and multimedia technolo-
Switch and Control
Switch and Control
farms. IMS vendors can simply buy ATCA shelves and fill them with CPUs and memory, as illustrated in Figure 2. The ATCA architecture also makes it fast and easy for service providers to scale up by simply adding blades and shelves as their customer base grows or as an IMS application becomes a hit with subscribers (Figure 2). Other IMS architecture components have requirements dictating more network-intensive processing. Again, ATCA systems provide the flexibility to process high volumes of IP media packets for applications such as Media Gateways (MGWs), Multimedia Resource Function Processors (MRFPs) and Gateway GPRS Support Nodes (GGSNs). In the access layer, ATCA—or its sibling, MicroTCA— are ideal platforms for applications such as DSL Access Multiplexers (DSLAMs) or Broadband Access Systems (BAS). Figure 3 shows how ATCA or MicroTCA shelves filled with network processor chips, DSP resources and high-speed network interfaces keep voice, video and data packets flowing, ensuring a good IM user experience. An ATCA-based service architecture also makes it fast and easy for service providers to add capacity as demand grows. Not all ATCA solutions are equally well suited for IMS infrastructure. One way to understand the differences is to look at IMS transport layer components such as MGWs, Radio Network Controllers (RNC), Packet Data Gateways (PDG) and GGSNs. These nodes typically require high throughput and I/O (input/output) connectivity flexibility. To meet those demands, IMS nodes are rapidly transitioning from one Gigabit switching platforms, to 10 Gigabit Ethernet, which provides ample bandwidth to accommodate growth in subscribers and services. As a result, a 10 Gigabit architecture offers a better return on investment than a one Gigabit product, which might be outgrown long before it starts contributing to profits. IMS infrastructure vendors and their service provider customers also want a common managed platform for network element and data-plane applications. This design reduces vendors’ development costs
ATCA shelf for networking applications.
server, which is also known as the media resource function processor (MRFP) in an IMS architecture. IP media servers implement media processing functions such as playing media, recording media, audio/video mixing or collecting digits. Media servers/MRFPs provide these capabilities as generic, service-agnostic media processing building blocks, rather than service-specific functionality. This design approach ensures the reuse of the media processing building blocks across a wide range of services running on the application servers in the IMS. For example, the building blocks used for voicemail include playing audio files, recording audio files and collecting DualTone, Multi-Frequency (DTMF) digits. A conferencing application would use audio/ video mixing, but would also reuse the record features (for a conference recording) or reuse DTMF collection (for conference control). With a well-designed multi-service MRFP, adding a new service is isolated to updates to the IMS application servers, which accelerates new service
gies simultaneously—the type of flexibility that IMS is all about. IMS lets service providers meet a growing customer expectation—access to any service from any device on any network—and leverage trends such as mobility, convergence and triple and quadruple plays. For telecom infrastructure vendors, IMS represents a major, long-term opportunity because it’s designed for use by wireless, wireline and cable operators. Although IMS is a new technology, it builds upon many existing technologies deployed in next-generation networks worldwide, such as ATCA and IP media servers. Dozens of vendors are shipping IMS-compliant equipment to service providers worldwide who have begun deploying IMS. As a result, IMS is quickly going beyond being just another buzzword to delivering on its bright promise. RadiSys Hillsboro, OR. (503) 615-1100. [www.radisys.com].
Standard Building Blocks Accelerate the Deployment of IMS Services The increasing demand and use of multimedia services are presenting new challenges to the industry. To meet these, and accelerate the implementation of IMS applications, a building block approach provides standards-based hardware and software solutions. by A sif Naseem, Ph.D. GoAhead Software
onsumers are demanding increasingly sophisticated telecommunications services from their service providers SP. The “handheld” is no longer simply a device for carrying on remote conversations. A growing number of people use their mobile phones as converged devices for a variety of realtime and asynchronous communication functions including creating, saving or sending pictures and videos; instant messaging; push-to-talk; and even online multiplayer gaming. As users of and uses for the mobile phone continue to grow, network operators must respond to ensure their networks are capable of delivering the new converged services quickly and cost-effectively. This requires upgrading their networks from those consisting of disparate elements that provide voice, data, signaling and control functions to an all-IP network that is built around the emerging set of standards and architecture defined by the Internet Protocol (IP) Multimedia Subsystem (IMS). Telecommunication service provider requirements are putting considerable pressure on telecom equipment manufacturers (TEMs) to provide new functionality, reduce cost and shorten time-to-market. Adding to the challenge, TEMs need to quickly evaluate emerging technologies 30
to determine which will impact their business and how best to meet these new requirements. With increasing competition and tightening budgets, many TEMs are faced with unprecedented business challenges to meet customer expectations while maintaining profitability.
Applications IMS Core Elements Revenue Generating
Operating System Hardware A vertically integrated platform
An integrated platform enables TEMs to focus on the application layer.
There is a direct correlation between service provider (SP) spending on telecom gear and the revenue that TEMs can generate. Increased competition and tighter budgets create unique business challenges for TEMs wanting to both meet shifting customer expectations and maintain profitability. In recent years, network operators have put significant pressure on TEMs to meet a variety of challenges—provide equipment with new and improved functionality, reduce their acquisition and operational costs, and reduce the complexity and time required to bring new capabilities to market. The rapid pace of innovation in the marketplace coupled with the need for TEMs to rapidly evaluate the most effective emerging technologies, further complicate the situation. In order to offer converged services such as multiple play services—voice, text, video and mobility bundled as one package—the SPs must choose the right business model. That depends on a variety of factors such as the economic environment, the subscriber density, customer care needs, etc. These factors determine whether such services can be offered profitably. Furthermore, to protect profitability and return on investment in challenging market conditions, SPs must continue to
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Applications IMS Core Elements Revenue Generating
Home-Grown Proprietary Middleware
Integrated Standards-Based Middleware e.g. GoAhead SelfReliant (Based on SA Forum interfaces)
Proprietary Operating System
Standard Operating System e.g., Carrier-Grade Linux
Standard Hardware e.g., ATCA
Migration from proprietary to open standards-based platforms.
look for ways to reduce their capital expenditures and operating costs. Through recent consolidations, SPs are enjoying increased buying leverage over their suppliers, presenting TEMs with mounting price pressures. Today’s network elements are selling for less than half the amount of those with similar or less functionality only a few years ago. This trend is likely to continue for the foreseeable future. SPs continue to demand increasing functionality and performance at decreasing cost. Another factor contributing to the price pressures is that some of the fastest growth in wireless adoption is occurring in price-sensitive emerging markets, especially India and China. Wireless subscribers in both countries have long surpassed landline subscribers. Market penetration remains fairly low (especially in India), presenting equipment providers with excellent opportunities for growth. Currently, prepaid service is keeping tariffs low. The resulting average revenue per user (ARPU) is around U.S. 10 dollars in India and China. This compares to an ARPU of 57 dollars in the U.S., and 40 dollars in Europe. This clearly indicates that the telecom equipment developed for high ARPU regions (North America and Europe) is not suitable for these emerging markets. TEMs must adjust their cost structures to address such price pressures. 32
Network operators must upgrade their legacy networks to equipment that can effectively move from commodity services to new revenue-generating services. Mounting competition between wireline, wireless and cable operators is turning voice and best-effort data services into commodities. Voice services are continually migrating from circuit-switched wireline to VoIP and mobile networks. Consequently, even though declining voice services generate cash, they are not necessarily generating profits. This is driving SPs to seek out new sources of revenue and profit. A multiplay offering of Internet, phone and television service—combined with mobility—provides a compelling set of services that promises a significant increase in ARPU for SPs that have the capability to deliver converged services. At the same time, many telecom and Internet SPs have little experience delivering the kind of multimedia content that cable and satellite providers have offered for years. Encouraging news for telecom SPs, however, is that technologies incorporated into the IMS framework will enable the delivery of multimedia services over their carrier infrastructure. To make the most of the multiplay opportunity, SPs and TEMs must meet the quick and cost-effective implementation challenge head on. Offering converged services on an allIP network poses unique challenges of its
own. For decades Ma Bell set a pretty high standard for service reliability and availability—the dial tone is there every time we pick up the phone! The traditional circuit switched networks, primarily built to deliver voice services, were designed for high reliability of service with five to six nines (99.999% - 99.9999%) availability. Even many of our video content providers—the cable companies – operate over hybrid fiber-cable networks capable of delivering four nines (99.99%) availability. These traditional services have set a consumer expectation of service availability that must be met by the all-IP networks if multiplay services are to be adopted widely. This is a significant challenge if one considers that in general Internet provides less than three nines (99.8%) availability at best! SPs generate revenue from applications and services running on systems provided by the TEMs. Historically, TEMs have built proprietary platforms in-house because of the lack of availability of standards-based commercial off-the-shelf (COTS) components that met their requirements. At a high level, these systems generally consist of four layers: hardware, operating system, middleware and applications (Figure 1). The hardware, operating system and middleware layers must be acquired and perfected before differentiated enduser applications and services are developed and deployed. Working with proprietary platforms often means encountering many of the following challenges: • Long development and integration cycles involved with ensuring proprietary functionality and integration of third-party and legacy components • Product commercialization cycles measured in years rather than months • Missed deadlines resulting from underestimated development and integration effort • Lost revenue or market segment share from being late to the market • Significant resources hit whenever a change is made in any of the layers Several market realities have caused systems developers to move away from proprietary development. Budget constraints, aggressive time-to-market requirements, increasing cost pressures and fewer resources are prompting TEMs to acquire hardware and middleware from
SolutionsEngineering third parties while focusing on their core competence of developing revenue-generating applications. At the same time, emerging standards are allowing designers the flexibility to build systems by combining sets of interoperable, off-theshelf hardware, operating systems and middleware building blocks from several competing vendors. As the telecom world moves away from proprietary systems in favor of those built using commercially available standards-based components, the challenge for TEMs becomes deciding where to concentrate their efforts. They must choose where to rely on other suppliers to allow them to quickly address the service, cost and time-to-market requirements of their customers.
The need to address the challenges of reduced time-to-market, reduced capital and operational expenditures, and increased opportunities for service offerings over IP is driving the demand for modular communications platforms comprised of standards-based hardware, operating system and middleware. By incorporating such industry-standard building blocks as AdvancedTCA (ATCA), carrier-grade Linux (CGL) and Service Availability Forum (SA Forum) interfaces, the modular platforms are intended to help drive new service offerings based on COTS components. With key standards such as ATCA, CGL and the SA Forum specifications gaining increasing acceptance in the market, the ecosystem continues to mature with more companies providing the sophisticated pre-tested, pre-integrated components that TEMs require to quickly build cost-effective, application-ready platforms. The transition from all-proprietary systems to standards-based systems is well underway and is expected to accelerate as rapid adoption of these standards continues. The migration to standards-based integration is illustrated in Figure 2. Let us look at the various layers of such application-ready platforms in a bit more detail. Standards-based hardware can provide significant cost savings to TEMs. Among the most important factors driving standardization of the hardware layer is the ATCA standard. A natural evolution of the PICMG specifications, ATCA is the first open standard targeted primarily at
GoAhead SelfReliant Manager SBC 3
Session Initiation Protocol (SIP) Proxy DNS
SIP Bulk Call Generator
GoAhead SIP Application 1 Active
GoAhead SIP Application 2 Active
GoAhead SIP Application 3 Standby
An integrated solution for IMS Applications.
developers of telecommunication systems. It provides specifications for creating carrier-grade hardware architecture to provide the reliability, performance and scalability demanded by telecommunication applications. ATCA is quickly gaining industry acceptance, and major TEMs have already announced plans to provide network elements based on this standard. Although revenue estimates vary widely (the 2007 estimates range from $4 billion to $20 billion), this standard is clearly gaining popularity with OEMs. Another important development is the Hardware Platform Interface (HPI) specification from the SA Forum. HPI specifies a rich set of hardware platform services which, when implemented by the hardware OEMs, provide significant ease of integration with HPI-compliant commercial middleware from a variety of providers. This specification has quickly gained widespread acceptance in the COTS ecosystem, and an increasing number of hardware providers and ISVs are implementing the HPI services. Carrier-grade Linux (CGL) continues to be adopted by the telecom market with several TEMs already delivering systems based on CGL. CGL is one of the four working groups of what was until recently called the Open Software Development Laboratory (OSDL)—an industry body dedicated to accelerating the adoption of the Linux kernel across multiple markets. Recently OSDL merged with The Free Standards Group to form The Linux Foundation. The CGL Working Group is defin-
ing feature roadmaps and specifications for use in telecommunications architectures. MontaVista, Red Hat and Wind River are among several commercial vendors providing different distributions of Linux software based on CGL specifications. The next logical step up the standardization chain is middleware. If the middleware layer can provide abstraction between layers, the potential benefits to TEMs are huge, allowing them to focus on telecommunication services—their primary added value—without having to worry about the underpinnings. Such standardization is well underway. The SA Forum has delivered interface specifications that help middleware vendors write software conforming to established application program interfaces (APIs) at the hardware and application layers. The Application Interface Specification (AIS) establishes a common interface between the application layer and middleware components. These specifications aim to facilitate portability of middleware and applications across multiple platforms, reducing startup costs and integration efforts. Several middleware and systems vendors have announced support for AIS, creating and marketing middleware for high availability, systems management and database development. The application layer is where SPs generate their revenue. The hardware, OS and middleware layers constitute enabling technologies that support applications and services provided at the application layer. This is also where the TEMs have the greatest opportunity to differentiate May 2007
SolutionsEngineering themselves and provide compelling converged services to meet or exceed SP requirements. In other words, when TEMs can minimize their cost and effort in the lower layers by using COTS components to build an application-ready platform, they have more resources to focus on their core business in the application layer.
An Implementation Example
GoAhead Software has been working with Intel to ensure its high-availability
(HA) software platform takes full advantage of Intelâ€™s high-performance silicon on ATCA boards. GoAhead SelfReliant software running on an Intel processor-based ATCA platform utilizes a fully redundant design controlled by active HA software to monitor subsystem performance and automatically fail over in detected fault conditions. The software also provides a single, integrated view of the whole system by using the SA Forum HPI to the Intel Chassis Management Modules (CMM). GoAhead
and Intel have created a solution to specifically address the IMS market. This solution illustrates how a complete IMS-compliant system can be constructed on a single ATCA shelf. It describes a stateful failover using the HA software running on an ATCA platform that features Intel processors and wire-speed network processors. It includes a fully redundant design controlled by the HA software that monitors and automatically fails over from faulty subsystems. The architecture diagram depicted in Figure 3 shows several single board computers (SBCs), also called blades, with instances of session-initiated protocol (SIP) being monitored by SelfReliant on AdvancedTCA. The SIP bulk call generator makes calls to the proxy server, which routes calls to active instances of the SIP applications. If one of the instances of the SIP application fails, the highly available software restarts the standby application that will pick up the call load at no loss. If one or both of the active SBCs fail, the standby SBC assumes all traffic. Once the failed SBC is back online, the standby SBC automatically resumes its standby role. The HA software provides instantaneous switchover at failure to ensure uninterrupted service for the end user. It allows users to actively monitor failover effects on processed calls, as well as manage and control instances of the SIP application using a Web console. The CMM communicates with the HA software through open HPI, open intelligent platform management interface (IPMI) libraries and APIs. HPI and IPMI allow it to monitor and manage the status of various components of the chassis. Whereas IMS offers new and compelling opportunities for SPs and TEMs alike to bring converged multiplay services to market and create new sources of revenue, it has unique challenges associated with it. Not only must they seek and implement new business models, they must also find ways to upgrade their legacy networks quickly and cost-effectively. The emergence of key standards and a vibrant COTS ecosystem provides an attractive opportunity for SPs and TEMS to meet both sets of challenges. GoAhead Software Bellevue, WA. (425) 453-1900. [www.goahead.com].
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Ruggedized, embedded computer systems User-specified CPU and PC/PCI-104 expansion Weathertight components Integrated 6.5-inch video panel, keyboard Heat pipes for high performance CPUs User-defined MIL connectors Internal and external battery packs Expand with any RTD PC/PCI-104 product
48 18/9 32 24 6/0 2
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3/9 16 2 2 2 4 200 100 200 200 12 16 12 12 3 1 4 4 8k 8k ‡
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HiDAN is a rugged, watertight enclosure for a stack of PC/104 modules HiDANplus combines the modularity of IDAN with the environmental ruggedness of HiDAN Integrated tongue and groove O-ring for environmental sealing and EMI suppression Structural heat sinks and heat pipes Optional cooling fins Milled aluminum frames Stackable signal raceway MIL I/O connectors Optional MIL-SPEC paint Shock-mounts optional –40 to +85 ⁰C
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IndustryInsight Data Acquisition & Recording
Tools Target Real-Time Data Acquisition Systems Software modules in the real-time and non-real-time domains of a proposed model for real-time hardware recording systems help maintain performance while easing software development tasks.
by R odger Hosking Pentek, Inc.
ith each new opportunity, design- chronizing multiple channels (Figure ers of real-time data acquisition 1). Digital up-converter and down-conand analysis systems confront verter ASICs provide frequency translaa unique set of development challenges tion for communication and radar applispecific to the requirements at hand. Al- cations. FPGAs handle tough real-time though methodology and lessons learned signal processing tasks such as FFTs, in previous projects are invaluable, over decoding and encoding, decryption and time each new system introduces in- encryption, modulation and demodulapanies providing solutions now creasingly more complex hardware and tion, and beamforming. A fast memory ration into products, technologies and companies. Whether your goal is to research the latest correctly about how helps boost efficiency of data transfers ication Engineer,software. or jump to a Guessing company's technical page, the goal of Get Connected is to put you long development will take, choosing the by buffering blocks of real-time signal ice you require for whatever type of technology, es and productsright you areapproach searching for.and selecting the approdata. A control processor manages syspriate tools are crucial for delivering the tem resources and often performs addiproject on time and coming out ahead on tional signal processing and data formatthe bottom line. ting tasks. Often, a fast hard disk allows the system to handle real-time storage The Real-Time Data Acquisition and playback of signal data. Hardware Environment Connected through an Ethernet A typical real-time data acquisition link, a host PC workstation running system includes high-speed A/D and D/A Windows or Linux provides essential, converters plus the associated circuitry non-real-time hardware resources for for clocking, gating, triggering and syn- the operator interface, including monitor, keyboard and mouse. The PC also provides high-capacity disk storage for Get Connected with companies mentioned in this article. archiving data files and network conwww.rtcmagazine.com/getconnected nections to the office or facility. All of
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May 2007 Get Connected with companies mentioned in this article. www.rtcmagazine.com/getconnected
the necessary hardware components are present, but which software components will ensure that the system performs the way it should?
Software Considerations for Data Acquisition and Analysis
A good choice for the real-time control processor is usually a DSP or RISC processor. It should be freed from tasks not directly related to essential data movement, formatting or processing. During real-time operation, there should be minimum interaction with the PC. However, before and after real-time operations, the Ethernet link can be extremely useful for initializing the real-time hardware, configuring modes of operation and moving data between the real-time disk and the PC disk file system. A proposed software model for the real-time hardware recording system is partitioned into real-time and non-realtime domains and joined by Ethernet (Figure 2). While this partitioning may seem complex, each software module serves a
well-defined, essential function to maintain performance while easing software development tasks.
Inside the Real-Time System
In the real-time software module, the real-time data acquisition system uses an RTOS with low latencies and deterministic behavior to guarantee that no data will be lost while managing the critical tasks it needs to perform. The board support libraries feature well-defined subroutine calls to implement lowlevel control for all of the real-time frontend hardware resources. This includes configuring the A/D and D/A converters, setting parameters for the digital up- and down-converters and defining modes in the timing section for triggering, gating and synchronization. The SCSI file system uses RTOS calls to manage real-time transfer to and from the local Fibre Channel hard disk. A Fibre Channel protocol layer provides a complete, high-speed file system in-
Analog Out D/A
Digital Up Converter
Inside the Non-Real-Time Workstation Host PC
The non-real-time workstation host PC assumes the role of the client, by sending and receiving Ethernet messages
Fibre Channel Adapter
PCI Bus 1
SDRAM 1 GB
Dual PCI Node DMA, & Memory Controller
server subsystem. It is capable of responding to Ethernet commands that are interpreted by the server application and then dispatched efficiently by the server API. When the function is complete, the server application can issue an Ethernet message along with any relevant parameters about the operation. By extending the code in the server application so that it understands and implements different or more complex commands, the real-time subsystem can acquire new features. These new commands simply implement a new set of calls to the existing collection of record/play server API functions. For example, a new Ethernet command might fetch data from the Fibre Channel disk and deliver back through the Ethernet port.
Digital Down Converter
PCI Bus 0
terface suitable for real-time recording and playback. Nearly every RTOS also provides a native stack for Ethernet, TCP/IP drivers and support for Sockets, a very popular application-layer protocol for networks. Each of these three resource groupsâ€” the board support libraries, the Fibre Channel interface and a network socket interfaceâ€”are integrated by the record/ play server API into a set of intuitive highlevel functions to simplify development of custom server applications. Acting as the executive in charge, the record/play server application has complete access to sending and receiving Ethernet commands and status, directing real-time data streams on and off of the Fibre Channel hard disk, and controlling all operating parameters and modes of the front-end data acquisition hardware. With these software components, the real-time hardware has now assumed the role of a complete, stand-alone, functional
100 baseT Ethernet
Fibre Channel Disk Array
Workstation Host PC
VME64 UNIV II
Real-Time Record/Playback System Hardware Components. May 2007
Non-Real-Time Workstation Host PC
Real-Time Data Acquisition System Record/Play Server Application
Record/Play GUI Application Record/Play Server API Client API Sockets
Signal Viewer File System Network Display Mouse Keyboard
Processor Operating System Sockets, TCP/IP Ethernet, File System Application API (client/server) Signal Viewer
Real-Time Operating System
CLIENT Non-Real-Time Workstation PC
SERVER Real-Time Play/Record Sub-System
VME, cPCI, PC/104
Windows Linux Solaris
eCos VxWorks LynxOS
JAVA, Visual C Visual Basic, C, C++
JAVA, C, C++
Foundation ISE Gate Flow
Board Support Libraries FPGA Development
Candidates for System Hardware and Software Components.
to and from the real-time server subsystem. Virtually all workstation operating systems include native support for Ethernet, TCP/IP and Sockets to support message transfers. The client API manages the Socket message traffic by appropriately forming outgoing Ethernet commands so they are understood by the real-time server, and interpreting status messages returned by 40
Board Support Libraries
Real-Time Record/Playback System Software Components.
SCSI File System
Workstation Operating System
the server. Like the record/play server API in the real-time domain, it presents a set of easy-to-use, high-level commands suitable for client user applications. Additional socket connections deliver Ethernet data from the server into the signal viewer. This application delivers a graphical representation of signals on the PC screen, providing the operator with an oscilloscope display for viewing
signal data. This can be useful for checking snapshots of live data from the A/D converter before recording, for verifying the live output of a digital down-converter and for viewing the data recorded on the Fibre Channel hard drive after recording. Any such operations required by the client application must first be implemented in the client API and then supported as formal commands by the server application. Of course, the necessary functions for executing those commands must be available in the record/play server API. If they are not, additional API functions can always be created as required. One typical client application is a virtual instrument panel GUI displayed on the monitor. With buttons, knobs, sliders, switches, indicators, status windows and parameter entry windows, the operator simply uses the mouse and keyboard to control operations. Such an application could be written in Visual C, Visual Basic or Java to make a visually attractive and functional layout. The GUI would make the appropriate calls to the client API according to which buttons are pushed or which parameters are entered. A larger client application might
need a record/playback subsystem as an I/O resource. In this case, the larger application might be written in C, C++ or any other language supported by the operating system. Like the GUI, it would also make calls to the client API to set up the hardware, start and stop the recording and then fetch data back into the application. By adding this type of functional subsystem that is easy to use and fully characterized, system designers and integrators can slash development time and reduce risks. The rationale for each of the many software blocks in this software partitioning scheme should now be appreciated. Instead of a single monolithic program, the modular architecture of this system helps custom application developers take advantage of the standardized, well-defined interfaces between the modules to add new features, commands and functions. The existing commands and subroutine structures offer excellent examples for building new ones that are fully compliant with the rest of the system. Operating system revisions, maintenance upgrades and ports to different operating systems all benefit from this modularity. When it comes to appropriate candidates for the various modules discussed, there are many choices available (Figure 3). Client workstation platforms for these systems range from hand-held devices, blade servers, embedded PCs, laptops and desktop PCs to networked clusters of high-end multiprocessing systems. In each case, the processors must support a diverse set of infrastructure functions best handled by operating systems such as Windows, Linux, Unix or Solaris. Client applications and the client API can be written in C or C++, and GUI components can use visual versions of these tools. A popular trend of using Java for both the client applications and API helps with portability across platforms and operating systems. The signal viewer application is a good candidate for LabVIEW because the software offers tools specifically oriented to signal processing and display and is now available for many workstation environments. By its nature, the real-time server system is less heterogeneous and runs under operating systems such as VxWorks, eCos
or LynxOS. Most of the componentsâ€”including the board support libraries, server application and APIâ€”and the network and disk drivers are all written in C or C++, while some lower-level functions are coded in assembly language.
Putting It All Together
SystemFlow is one implementation of this software framework. It was devel-
oped to address hardware platforms like the real-time recording/playback system discussed above, which is similar to the Pentek RTS2504 Real-Time Recorder system. SystemFlow includes all of the software modules described above, with client workstation software modules written in Java and LabVIEW and server real-time modules written in C. By following this proposed software architecture, System-
Pentek RTS2504 Virtual Instrument GUI.
Flow successfully fulfills two different product objectives for the same hardware: a ready-to-use record/playback instrument and a real-time signal processing development platform. To meet the needs of the record/playback instrument, special enhancements were made including a complete virtual instrument GUI, a real-time file manager and a full-featured signal viewer. The workstation GUI was written in Java and runs under both Windows and Linux (Figure 4). Intuitive buttons, indicators, status windows and parameter entry windows are geared for novice users who simply want to capture signals and transfer files to their workstation. A sophisticated file manager is implemented through extensions to both the cli42
ent API, also written in Java, and the server API, written in C. It supports user-named files and headers that automatically store important system parameters in each recording. The client signal viewer, written in LabVIEW, includes display windows for time and frequency domains, dual annotated cursors and automatic calculation of critical signal parameters such as harmonic distortion and signal/noise ratios. To meet the alternate needs of a realtime signal processing development platform, SystemFlow includes source code for all software modules created for the record/play instrument. System developers can start with this fully functioning instrument and incrementally extend, replace or modify each module as required to meet their custom requirements.
For customizing workstation modules, Java source code is provided for the client GUI application and client API, and the LabVIEW script is provided for the signal viewer. For customizing server modules, a complete eCos development environment running under Windows offers licensefree, open-source tools including the GNU compiler, Insight for the GDB debugger, CYGWIN make utilities, an eCos kernel configuration utility and a TFTP server. C source code is supplied for the record/play server application and server API, the file manager and the socket interface. ReadyFlow board support libraries include C source code for the data movement, mode and parameter initialization, timing and control of all hardware resources on the boards. For FPGA code development, Xilinxâ€™s ISE Foundation Tool Suite is installed on the Windows workstation. Pentekâ€™s GateFlow FPGA Design Kit contains all ISE project files and VHDL source code for the specific hardware boards. In this way, FPGA developers can build upon the standard interfaces and structures already instantiated. An FPGA code loader utility transfers newly created FPGA bitstreams through the Ethernet link into the FPGA. All software development tasks for the workstation, the real-time server and the FPGAs are performed on the Windows workstation. All real-time server development tasks are supported across the Ethernet link through drivers and utilities. Except for the optional Xilinx ISE tools and GateFlow Design kit, all of the above resources are bundled into the SystemFlow package. The unique requirements of each real-time embedded system will drive choices in the hardware, the nature and function of the software modules, the operating systems and software languages. However, the philosophy of the software architecture outlined here should prove valuable in helping to make those decisions when starting a new design. Pentek Upper Saddle River, NJ. (201) 818-5900. [www.pentek.com].
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IndustryInsight Data Acquisition & Recording
Optimizing Data Recorder System Architecture As data recorder speeds increase to the Terabyte range, new design approaches are needed that optimize architecture to cope with high-speed streaming data.
by R alph Barerra, Ph.D. Curtiss-Wright Controls Embedded ComputingÂ
exploration er your goal peak directly al page, the t resource. chnology, and products
ata recorders have been used for a long time and the general purpose Analog Digital to Sensor of the current crop of recorders is Sensor S-FPDP Processor Converter still the same. They record an event that is occurring now so it can be reviewed latStreaming Data er. The big difference between recorders Recorder used in the past and those being fielded today is the speed and amount of data that must be recorded. Figure 1 Typical Data Recorder In the past we would have talked Applications about recorders with megabytes of storage mpanies providing solutions now that could handle data in the megabytes oration into products, technologies and companies. Whether your goal is to research the latest per second range. Today, Panel Data (S-FPDP) at a rate of 245 lication Engineer, or jump to a company's technicalstorage page, thecapacity goal of Get Connected is toPort put you Mbytes/s. In a typical application, multiple vice you require is for measured whatever typein of Terabytes, technology, or thousands of ies and productsgigabytes, you are searching and for. data rates are approaching S-FPDP channels are used to interconnect the gigabytes per second range. Accom- the sensor and the DSPs (Figure 1). modating this increase in speed and size The use of a digital interconnect such has required a new approach to recorder as S-FPDP allows the sensor and the DSP design. to be separated by from less than a meter A typical application today involves to several hundred meters while preservcapturing data as it is transferred from a ing the quality of the data. Recording the sensor to a DSP. Data from a sensor such data in the same digital format used by as a radar or sonar system is transferred S-FPDP means that future playback of to the DSP for real-time analysis using the data will have the same fidelity as the ANSI/VITA standard 17.1, Serial-Front original sensor data. In most applications, recording is only the first part of the recorderâ€™s funcGet Connected with companies mentioned in this article. tion. Data is recorded so that it can be www.rtcmagazine.com/getconnected accessed in the future for mission review
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and analysis. The performance of currently fielded equipment can be analyzed by looking at its response to the information it has received. As new response algorithms are developed, these algorithms can be tested against previous scenarios. The playback function of the recorder thus becomes important in order to reliably reproduce the data in real time. Also, when playing back multiple channels of data, the outputs from all channels must be synchronized with each other to provide consistent playback.
The Demands of Recording High-Speed, Streamed Data
In recording non-continuous data where the data tends to come in well-defined, short, high-speed bursts, followed by a relatively long period of no or very low data flow, it is possible to use buffers to momentarily store high-speed bursts while waiting for the recording media to become available. As long as the buffer, typically a FIFO, can be emptied prior to the next burst, the recorder will not lose any data. This situation changes when dealing with high-speed streaming data where the
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IndustryInsight average data flow rate is greater than the capabilities of the recording media. Only a few choices are available to the designer to make sure that data is not lost. The first is to build an extremely large buffer that will not be over-run during a mission. This solution is not a very practical one: if the mission parameters were to change, an over-run and subsequent loss of data could occur. A second approach is to improve the speed of the recording media so it can handle the full rate of the data stream. This approach runs into a technology hurdle, since manufacturers of commonly used media such as rotating disk drives and solid-state disk drives have been improving the speeds of these devices for some time. Typical sustained transfer rates for current drives is around 70 Mbytes/s, and a major improvement in recording speed of either of these device types is not likely in the near future. To get around the relatively slow recording media, multiple drives can be used in parallel. Incoming data is striped across a number of drives, resulting in much higher throughput. Disk drives normally have a high-speed buffer in their input to accept data faster than the actual recording media can take the data. After the data is written to the high-speed buffer, the disk control circuit takes over and transfers the data to the recording media at a much slower rate. During this second transfer of data, the disk drive does not require any assistance from the recorder. A data striping operation can use multiple disks to record a single stream of data (Figure 2). The same technique can
Block 0, n+1,...
Block 1, n+2,...
Block 2, n+3,...
Disk n Block n, n+n+1,...
Data Striping Operation
be employed to record multiple streams of data, provided that the controller in the recorder keeps track of the location of each block. This becomes important later when the data will be retrieved for playback and analysis. With this technique, the first block of data is written to the first device. While that data is being written to the media, the next block of data is written to the next disk, and so on. As long as there are sufficient disks available for data striping so that the first disk is ready to accept more data when the recorder completes its cycle, no data will be lost. An advantage of this approach is that it is scalable. As data rates increase, more disks can be added to the striping pool to increase the cycle time before the recorder returns to the first disk.
Optimizing Recorder Architecture
The architecture of the recorder is important for preventing bottlenecks when handling high-speed streaming data (Figure 3). It is even more important when multiple high-speed streams of data
must be recorded. The onboard processing power should be sufficient to make sure that data is moved quickly through the recorder to the storage media. Many configurations will easily support a single channel of S-FPDP at 245 Mbytes/s, but will show their weaknesses when asked to do two channels simultaneously. The recorder must also be scalable in both the number of channels it can record and in the amount of storage for each input. The use of Fibre Channel with a JBOD (just a bunch of disks) allows the number of disks to expand, increasing the length of time that data can be recorded. The Fibre Channel drives are configured into a loop and addressed individually as data is being transferred. If additional storage is required to allow longer recording times, more drives are inserted into the loop. The additional drives can also be easily added to accommodate increased throughput requirements. Another important function is to record the time that the data was received along with the data. The time-stamp should be an accurate indication of when the message was received and preferably synchronized with an outside timing standard such as Inter-Range Instrumentation Group (IRIG-B). A good recorder time-stamps data to an accuracy of within one microsecond. If an external source is available, the internal clock should synchronize with the standard and provide one-microsecond time-stamps. If an external source is not available, then the internal source should have sufficient short-term accuracy, measured in hours, to provide one-microsecond time-stamp accuracy.
Methods of Data Transfer Fibre Channel JBOD
Streaming Data Recorder
Disk 0 Serial FPDP Data
Serial FPDP Interface
Fibre Channel Interface
Disk 2 Disk 3
Figure 3 46
Time Base Generator
Data Recorder Block Diagram
After the data is recorded, it is normally transferred to a facility where it will be used for system testing or algorithm development. The problem is how to transfer the data from the recording site to the playback site. Depending upon the data size, there are several options to be considered. One of the simplest and least costly methods is to use an Ethernet link, either a direct connection to a portable computer or through a network. With the availability of Gigabit Ethernet, the data and its time tags can be transferred to almost
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any site on the network. If the files are small, that transfer can be made quickly. For example, transferring a 10 Gbyte file over Gigabit Ethernet requires a little over three minutes. If the file size increases to 100 Gbytes, the transfer will require over 30 minutes to be completed. A 100 Gbyte file may seem large, but it represents a recording time of less then eight minutes for one channel. If the recording session lasts for one hour and involves four channels, the total data storage size will be 3.6 Tbytes. To download this amount of data over Gigabit Ethernet requires approximately 20 hours. Even with 10 Gigabit Ethernet, the time required to download the data from the one-hour recording will be approximately two hours. Clearly, this is not the optimal way to download large files. A much faster way to transfer the information from the recorder to a playback facility is to move the recording media itself. For example, the disks in the Curtiss-Wright Controls Embedded Computing SDRxR recorder can be easily removed from the front panel (Figure 4). By transferring the media, the time required to transfer 3.6 Tbytes of data storage is reduced to around ten minutes. This allows the system using the recorder to be released for another mission within minutes instead of hours. It also means that analysis of the data can start almost immediately
though it were in the actual environment without leaving the laboratory. This not only results in savings, since the equipment does not have to be moved, but it also allows parameters or algorithms to be modified and run through known scenarios. To accomplish playback, data stored on the drives is retrieved and transferred through the interface that was used for the initial data collection. The equipment to be tested is connected to these lines and receives the data. If inaccurate timestamps were recorded or if they are not used for playback, the data will be sent at the rate of the recorder. This may have little resemblance to the data stream that was originally recorded. To act as a good test source both the data and the timing must be accurate. For S-FPDP, one-microsecond accuracy is sufficient. As data rates continue to climb, the accuracy of the time-stamp will also need to improve. Another feature that is required for high-quality playback is synchronization of all of the channels. This synchronization is accomplished through the time-stamps. Data is retrieved from the storage media and held until its time to be presented arrives. This type of synchronization allows the recording of multiple channels from a system. The playback must preserve all of the timing characteristics of the original system.
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A critical function of a data recorder is the fidelity with which it can play back the recorded data. Playback must be in real time so that it can serve as an input to actual equipment or for input to an analyzer. One function that playback serves is as a source of data when evaluating new systems. The equipment can be tested as
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IndustryInsight Data Acquisition & Recording
PC-Based Platforms Serve Up High-Speed Data Acquisition Systems Now that PCs can sustain waveform recordings at up to 700 Mbytes/s, they can be used as platforms for developing SIGINT, radar, NDT/ultrasound and medical imaging data recording systems. by T om Wagner and Anthony Hunt Signatec
istorically, proprietary direct-todisk waveform recorder systems were the only option available to deliver high-speed signal recording solutions if data loss could not be tolerated. There are clear performance benefits of the direct-to-storage recording systems that continue to provide important capabilities in signal recording. Proprietary recording systems traditionally digitize analog signals and transfer the digitized data directly to a storage device. Yet, while direct-to-disk recording systems offer high-speed data transfers with few bottlenecks, raw data typically isnâ€™t as useful as data stored in a compatible file system, such as NTFS. For certain applications, this is a fair trade-off. However, a decided disadvantage exists, especially for applications that require recorded data to be sent to other systems. By translating raw data into an OSfriendly file format, considerable efficiencies emerge. For example, if a recording system resides on a network and the recorder must be controlled by a client machine, compatible files provide the client immediate access to the data. If the files are incompatible, sharing data between the recording system and client requires significant custom software development for network-based applications that would otherwise come mostly for free with standard OS support. 48
many COTS technologies as possible for their advanced systems.
PC-Based Recording Solutions Deliver High Performance
Current PC chassis enable engineers to integrate many disk drives into a single system, such as this single-chassis, 700 Mbyte/s wideband signal recorder platform.
Additionally, proprietary recording solutions are less flexible and significantly more costly. Not only is the purchase price high, but next-generation storage technologies are not easily integrated. Instead, to achieve significant performance upgrades, entirely new recording systems must be developed, increasing cost. Fortunately, given the latest technology advancements in PCs, a compelling argument emerges for developers of signal intelligence (SIGINT), radar, non-destructive testing (NDT)/ultrasound and medical imaging systems to employ as
With ever-increasing performance features, current PC workstations and server-class computer systems can serve as affordable, real-time recording systems. By leveraging the latest COTS computer components, engineers can design best-of-class waveform digitizers to stream data continuously to disk storage systems without any break in the analog record, and for a fraction of the cost of proprietary recording systems. Today, high-performance PC systems deliver such a powerful, affordable platform for creating real-time solutions with exceptional performance features that strong consideration should be given before disregarding PC-based, high-speed recording solutions. To further support the PC as a quality alternative to proprietary systems, one may consider the additional benefit of significant peripheral features such as high-speed networking interfaces, USB ports and parallel/serial bus interfaces. Since the latest motherboard and integrated RAID system options can form real-time, wideband signal data recording systems, highly optimized COTS
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Single Chassis 700mB/s Wideband Continuous Signal Recorder Platform Block Diagram PCI Plug-in Modules
Signatec RAID (Up to 24 Disks and 18 TBs)
High-speed recording systems with up to 18 Terabytes of disk storage space can be built on PC-based platforms using the right design techniques.
Signatec Single Chassis, n# of Channels, Up to 700 MB/s Wideband Continuous Data Recorder
External Host Bus
Signatec RAID with up to 18 TB Recording Depth
1.Acquire Signal Data to A/D Board Channels
M/S I/O Boards
4. Signal Data Written to RAID Storage System Up to Sustained 700 MB/s
The Signatec DR700 multichannel, 700 Mbyte/s signal recorder system, can continuously record up to 700 Msamples/s of data through the PC to disk storage without any break in the analog record.
solutions become an important scalable solution for system developers. Next-generation components can often be readily integrated into olderPC- PC-based systems, providing immediate performance upgrades with little capital expenditure. Most importantly, if waveform digitizers are skillfully engineered, the increased PC performance provided by COTS computer 50
2. A/D Boards are linked for Multi-Channel Synchronization
3. Signal Data Transferred to 2 I/O Boards via External Host Bus
upgrades can often result in entirely new advanced system capabilities for developers. As a net benefit to signal recording system developers, these significantly increased performance systems often come for free. The scalability and flexibility of COTS solutions creates an entirely new paradigm for project managers who must successfully deliver advanced solutions on time and on budget.
High-performance computer systems incorporate the latest in PC-based technology and utilize motherboards with multiple PCI, PCI-X and PCI Express bus interface options. These can be leveraged to create advanced signal technology products and maximize operational performance. Multiple PCI buses, with their own dedicated resources, ensure that the maximum transfer rate is achieved for multiple boards by reducing the number of devices competing for bandwidth, since PCI modules have their own high-speed path to the host PC system memory. Additionally, current PC chassis enable engineers to integrate many disk drives into a single system, often eliminating the need for multiple systems, which lowers cost substantially (Figure 1). Developers can now integrate high-performance data acquisition, digital signal processing, signal generation and data recording boards all within a single unit to create a fully integrated, low-cost turnkey system solution. Furthermore, these integrated disk storage systems are capable of sustaining the very high data rates required for demanding, real-time data recording applications. Since data transfer rates and storage capacities are scalable, sustained, extremely high transfer rates are possible, with storage capacities available up to 18 Terabytes, all within a single chassis solution (Figure 2). Current chipsets such as Intelâ€™s 5000P support up to a 667 DDR II memory interface, 1,333 MHz frontside bus to the CPU and multicore processors. Additionally, these motherboards accommodate independent PCI/PCI-X/PCIe buses, allowing concurrent, high-bandwidth access to PC system memory. The previous generation of server-class motherboards with Intelâ€™s E7520 chipsets only allowed PC motherboards to support a 400 MHz DDR II memory interface, 800 MHz front-side bus to the CPU and singlecore processors. Compared to this previous generation of chipsets, the 5000P chipset has typical improvements of up to 4:1, according to published Intel benchmarks. This serves as an excellent example of how a next-generation motherboard can create an entirely new product. The E7520 chipset formed the foundation for a 250
IndustryInsight Mbyte/s continuous real-time signal recording system. By upgrading to the new 5000P chipset, new real-time recording systems can sustain 700 Mbyte/s continuous realtime recording rates, without the need to re-engineer board-level components. The argument to go with COTS computer components is simply too strong. While the next significant signal recording performance upgrade always looms six months ahead, the cost of upgrading pales to insignificance when compared to purchasing next-generation proprietary systems. Disk and RAID architectures are also a major concern. The specifications of virtually all RAID storage systems can be misleading in terms of actual sustainable transfer rates to the disks. In many cases, the only number specified is the peak “bandwidth” data rate for the bus type used. Actual sustained performance varies dramatically among various RAID manufacturers and components. However, high-performance COTS RAID systems can be leveraged to engineer quality, affordable storage solutions to achieve the highest sustained transfer rates possible. RAID systems conform to various data storage and redundancy concepts, defined as levels. Although capable of operating at various RAID levels, in order to maximize performance a disk storage system specifically designed for operation at RAID Level 0 ensures no data redundancy. Such a design provides the maximum transfer rate performance possible and maximizes the amount of available storage space. The option of employing COTS computer components to form the PC hardware requirements for achieving 700 Mbyte/s signal recording without a break in the analog record is a proven fact. However, COTS computer components will not achieve realtime results on their own. Well-designed, optimized data acquisition boards are the key to transforming non-real-time PCs into real-time, high-speed recording systems.
tems into effective real-time signal recording solutions, Such systems are capable of streaming data through the PC to disk in real time with no lost samples at ever-increasing sustained rates. The key lies in developing the proper buffering techniques. Engineering waveform recording boards, designed with large memory buffers and a high-speed bus interface to withstand the non-real-time nature of PC systems, becomes the heart of the art. A sufficient buffer is essential to account for
the periods when a PC system is busy handling other tasks, as well as a high-speed bus interface to offload that buffered data. With these design features, data acquisition boards will simultaneously acquire, buffer and transfer data to prevent a break in the analog record. Considerable thought needs to go into buffering techniques. For example, if the data buffer is too small to handle host bus downtime, the buffer will overflow. Similarly, if the external bus interface is too slow,
Transforming PCs into HighSpeed Waveform Recording Systems
Since most contemporary operating systems—such as Windows or Linux—are not real-time environments, PCs are often overlooked as a real-time option. Yet, properly engineered subcomponent hardware and software can transform PC sysMay 2007
master-slave operation, the master board drives the clock and trigger signals for the slave boards so that data on the slave boards align sample-for-sample with the data on the master board. System subcomponents can provide numerous combinations of high-speed acquisitions, with accommodations for
Since both buses are in simultaneous operation, system throughput is maximized. In addition to recording at high rates, signal data can also be processed at very high rates, effectively converting the PC into a signal acquisition, real-time processor and recorder solution. Since the platform provides the I/O for linking the A/D module to the CPU for processing, as well as the I/O for linking the CPU to Signatec Single Chassis Record/Processing/Playback Solution with Network Access/Control the RAID for data storage, engineers need only focus A/D Modules on designing the External Host Bus Signatec RAID appropriate acquiwith up to 18 TB Host sition module and Recording Depth CPU software. DSP Modules Furthermore, DAC Module users wishing to play back their GbE collected data for PC RAM Port analysis can employ the same reNet Access for Data R/W cording platform and Subsystem Control populated with playback modules to create a continuFigure 4 Fully-integrated, single-chassis data acquisition, recording, processing and playback solution with ous signal playback network access and control. solution based upon the same signal reincorporate as much RAM as necessary to large-bandwidth and high-resolution ap- cording model. By adding D/A conversion buffer the acquired signal data. In addition, plications, along with an extremely large modules with buffering techniques similar current wideband buses, such as PCI-X or memory capacity. For example, a sub- to those engineered on the A/D modules, PCIe, deliver sufficient data throughputs component board with two 150 MHz, digital data can be streamed direct from between digitizer boards and host PC to 16-bit channels for a total data rate of 600 disk storage at the same high rates for playsustain high data recording rates. Mbytes/s creates an extremely high-speed, back as for recording. With the appropriate combination of high-resolution recording solution. With numerous COTS solutions COTS motherboard, RAID components, available to SIGINT, radar, NDT/ultrawaveform digitizers and software solu- Added Value: Integrated sound and medical imaging system develtions, high-speed turnkey signal recording Flexible Recording, Processing opers, PC systems can now sustain wavesystems are commercially available today. and Playback Systems form recordings at up to 700 Mbytes/s. For example, Signatec’s DR700 sigThe option to engineer high-speed in- In addition, high-speed signal playback, nal recording system was created for terfaces on the PC’s subcomponent boards, real-time processing and network control developers of advanced SIGINT, radar, which operate externally to it, should not capabilities can be integrated seamlessly NDT/ultrasound and medical imaging be discarded. These can be very effective into a single host system (Figure 4). There applications. These systems can continu- for linking acquisition boards with other has never been a better time to strongly ously record up to 700 Msamples/s of data plug-in cards—such as processing acceler- consider PCs as the ideal platform for through the PC to disk storage without ators—when the PC’s resources are either bringing the fastest, most flexible, scalable any break in the analog record (Figure 3). insufficient or threatened by potentially and affordable signal technology solution Multiple channels can be integrated being overly taxed. However, an external to market. within the system by utilizing waveform board interface does not replace the host digitizer products in a master-slave con- bus, but augments it. An optimized appli- Signatec figuration, allowing users to connect mul- cation that uses the external interface for Newport Beach, CA. tiple A/D boards and create a synchro- time-critical data movements can also use (949) 729-1084. nized, multichannel acquisition system. In the PC host bus for less critical operations. [www.signatec.com]. 700 MB/s
buffered data will not transfer off of the board in time. In either case, the net result is the same: a break in the analog record. For many advanced SIGINT, radar, NDT/ultrasound and medical imaging applications, overflow conditions are disastrous. Fortunately, since memory is affordable, waveform digitizers should and can
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Graphical System Design Integrates Different Programming Models with Hardware Integration to Make Designs Reality RTC Interviews D r. James Truchard, President, CEO and Cofounder, National Instruments
RTC: Over the years, we’ve watched beyond the test and measurement area. National Instruments grow from inThe next 30 years we are looking to exstrument control to virtual instrumenploit LabView’s fundamental advantages tation, to data acquisition, to industrial as a graphical design tool as well as connetworking and control and on to realtinuing to expand LabView’s role as a pretime software development—not to mier test and measurement development mention developing expertise in other tool. As such we are extending LabView’s specialties such as machine vision, sigfundamental capability to include multiple nal processing and test and measuremodels of computation such as continument. Can you give us a “from the ous time simulation, text-based math and mountain top” view of how National state diagrams in addition to LabView’s Instruments sees its mission now and paradigm of structured dataflow. Graphiintosolutions the future? cal System Design is the vision that brings panies providing now Truchard: National Instruments has althe versatility of these programming modration into products, technologies and companies. Whether your goal is to research the latest a vision-driven company. els and adds tight ication Engineer,ways or jumpbeen to a company's technical page, the goal ofWe Get Connected is to put you hardware integration to ce you require for whatever type of technology, started with the ambitious goal of doing make a design reality. This approach lets es and productsfor you are searching for. engineers what the spreadsheet did our customers tackle applications from for financial analysis with virtual instrusoftware defined radio, to precision laser mentation. By this, I mean providing encontrol, to hardware-in-the-loop simulagineers and scientists an innovative set tion, to mechatronics; all with a common of tools for measurement and automation software platform. that is built on intuitive graphical development using NI LabView software, offRTC: National Instruments is by far the-shelf modular hardware platforms best known for its flagship product, and open standards connectivity. LabView. Yet National Instruments Over the last 20 years LabView’s offers a very large selection of hardgraphical approach proved to be useful ware products and modules. Do you see your business as a hardware vendor supported by a totally compelling Get Connected with companies mentioned in this article. software product or primarily as a www.rtcmagazine.com/getconnected software company?
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May 2007 Get Connected with companies mentioned in this article. www.rtcmagazine.com/getconnected
Truchard: Throughout our history, our vision has included tightly integrated hardware and software. I believe that the seamless integration of LabView with both NI and third-party hardware has been a key to our success. We have worked very hard to make programming hardware intuitive so that our customers can design and implement systems in less time and worry less about the details of registers and interrupts. The best way to do this is design the hardware and software together. RTC: LabView, as we understand it, can be used for instrument control, i.e., the control of actual instruments such as oscilloscopes, spectrum analyzers, etc., and for the creation and control of virtual instruments (Vis), which are defined in software on a computer and connect to interfaces such as sensors, signal conditioners and data acquisition and I/O boards. Can you give us a sense of whether your customers are primarily controlling and monitoring actual instruments or whether more of them are opting to create custom virtual instruments for their solutions? Truchard: When LabView was first released the PC was in its infancy, yet it
ExecutiveInterview was the only platform that could automate measurements through instrument control, However, today LabView is used broadly for both controlling instruments and creating virtual instruments, and in many cases customers are doing a combination of the two. With each new PC data bus (PCI, PCI Express, USB 2.0, Ethernet, etc.) and processing technology (multicore, Moore’s Law), virtual instruments have automatically received a boost in processing performance. These innovations are combined with the latest digitizing components to expand the reach of Virtual Instrumentation. Users can now create virtual instruments that acquire and process a larger range of measurements from high-fidelity sound and vibration signals to high-bandwidth RF and IF communications data. On the other hand, traditional box instru-
x86, and there are a number of industrial networking technologies such as Device Net, CAN and Profibus to name a few, along with such newer technologies as PCI Express and RapidIO. Do you foresee a shaking out among these many alternatives, and how is National Instruments approaching these trends? Truchard: CompactRIO is unique in the combination of a real-time floating-point processor and an FPGA that interfaces with each I/O module. This architecture can replace traditional approaches and more importantly, it satisfies many requirements that previously were met with laborious custom designs. The FPGA in the design brings unprecedented flexibility to solve the increasingly complex tasks needed for today’s control and automation systems. From a network standpoint, our strategy is to use our software expertise to con-
Number of Bits
16 12 8
Sample Rate (Sample/s)
Resolution vs. Frequency with PC buses.
ments take longer to incorporate new processing technologies (Figure 1). Traditional instrument control continues to be an important use case for LabView, but clearly the momentum is toward the flexibility, relatively lower-cost and modularity of the PC-based instrumentation approach. RTC: Increasingly, automation and control systems, especially in industrial environments, appear to consist of autonomous or semi-autonomous distributed nodes. National Instruments’ CompactRIO product line clearly addresses this trend, but there are also many small form-factor nodes built on processor architectures such as the 56
stantly adopt the latest successful PC and embedded technologies and seamlessly integrate them into our platform through software abstraction. In industrial applications where M2M capability is needed, Ethernet will likely become a dominant technology replacing traditional buses such as DeviceNet and Profibus with Ethernet versions such as EtherNet/IP and Profinet, but there is no clear standard yet. We have also seen the leaps in bandwidth made available by PCI and PXI Express that enable faster streaming for high-speed digital and RF applications. National Instruments will continue our strategy of adopting successful PC and embedded technologies and, through software abstraction, transparently providing them to our customers.
RTC: USB—another technology to emerge out of the personal computer area—appears to offer attractive potentials in data acquisition. There is now even a spec for it for the PC/104 formfactor. How do you see this trend developing and where do you see its limitations and major application area? Truchard: We see USB as an extremely important interface for data acquisition and peripherals and expect that its use will continue to grow rapidly. While we have had USB hardware products for a long time, the performance of USB 2.0 has made it possible to replace plug-in devices such as ISA and PCI. We have taken advantage of the external nature of USB to provide data acquisition products in various form-factors, from a single module with specialized I/O to a modular hardware platform such as NI CompactDAQ that can combine a variety of measurements and stream them via USB. Once again, we worked extremely hard to make the software experience such that the time to first measurement is minimal. From an embedded perspective, USB continues to evolve. We have seen increasing demand for our USB data acquisition OEM kits that are used on various operating systems. We have also included a USB interface on our latest CompactRIO embedded controllers for external storage. PC/104 is an interesting story because of its tie to the legacy ISA bus. Each new generation of PC buses undoubtedly leads to a new specification and the use of USB is another example of that. RTC: A recent development is a embedded module for LabView, which allows porting of LabView to any 32-bit processor. Increasingly, embedded devices and processor boards are appearing with a combination of microprocessors and FPGAs. Also, there is already a LabView FPGA module that addresses modules designed by National Instruments. Are there plans to expand LabView’s capabilities to address FPGAs in third-party products as well? Truchard: Our goal is to provide users with a range of options from off-the-shelf real-time and FPGA-based hardware platforms to highly embeddable processors on custom designs while maintaining as much code compatibility as pos-
ExecutiveInterview sible. LabView Real-Time and LabView FPGA modules are complemented by off-the-shelf controllers and modular I/O that is tightly integrated, providing users the smoothest path to embedded systems. This has empowered non-career embedded programmers to create powerful realtime systems and take advantage of the incredible potential in FPGAs for applications such as digital signal processing and precise machine control. The LabView Embedded Development Module continues to extend the range of LabView targets into a wider embedded area. As our LabView FPGA technology matures, we will be able to complete our vision and target third-party FPGAs. We must improve the infrastructure to make tying in I/O simple and intuitive before that happens so that we can continue to provide users with the best experience. RTC: One of the most intriguing things about LabView is the huger variety of creative solutions that people come up with by using it. With the appearance of LabView Real-Time and the ability to port it to a wide variety of 32-bit processor and RTOS targets, do you have any indication of the sort of applications or some classification of applications that it is enabling? Are there any impressive and unexpected applications that stand out? Truchard: LabView users are continuously surprising us with different ways they are using the software to solve challenging applications. For example, some students at Virginia Tech created a robot controlled by LabView that plays soccer and will compete in the Robocup tournament. The robot has to do some impressive image processing to find the ball and then perform the necessary motion control to kick it into the goal. Then there’s the physicist building a medical machine who described LabView FPGA as a “miracle.” One developer on his team was able to complete implementation of a highly sophisticated FPGA-based laser control system in only four months. We’re most excited with examples of LabView being used to improve daily life. One innovator recently developed a thought-controlled wheelchair that used LabView and CompactRIO to
process signals originating in the brain and translate those into commands for the wheelchair.
have to completely rewrite the code if it turns out the FPGA runs it better than the processor.
RTC: In that regard, there is an inherent difference between von Neumann-based microprocessors, which operate in an inherently sequential manner and FPGAs, which lend themselves very strongly to parallelism. Users developing for such envi-
RTC: If we may be allowed a comment disguised as a question (or vice versa), National Instruments appears to be a rather unique company in that your employees give the impression of almost total involvement in the company’s work and, well, they all seem
“We are extending LabView’s fundamental capability to include multiple models of computation.” ronments have a great deal of freedom over which functions they will assign to the processor vs. the FPGA. Often, they experiment to find the best mix. How will you address such a mixture while maintaining the graphical programming metaphor that has made LabView such a powerful and popular development tool? Truchard: The graphical nature of LabView has, in a sense, eliminated some of the limitations of von Neumann by abstracting its sequential nature and taking advantage of multithreading. For this very reason, LabView is the ideal programming environment for multicore processors—where exploiting parallelism is the key to performance. Customers using LabView on the desktop have always benefited from fast compile times, making debugging quick and easy. Targeting FPGAs has brought upon the challenge of long compile times. We are therefore looking to provide users with more sophisticated simulation capabilities so they can validate their logic before compiling. We are also researching breakthrough technology such as partial recompiling to further streamline FPGA development. This situation highlights the advantage of using one development environment for various processing targets. By using LabView for both microprocessor and FPGA development, the user can program the functions, and then decide along the way which processing element will execute the function. The beauty of LabView is that the engineer doesn’t
like friends as well as colleagues. They exhibit a youthful enthusiasm and involvement that stands out and which must be very gratifying. Do you have any words of wisdom that other managers might take to heart since it is a factor that seems very important to any company’s success? Truchard: At National Instruments, we have always strived to be a visionary company with a long term plan. We don’t make decisions based on our current stock price or the prevailing financial winds. Our decisions are based on both our short-term and long-term objectives. We have what we call the one hundred year plan, a vision that holds innovation, growth and leadership at its center. To be successful with this plan our company has a deep commitment to the NI culture and the NI Way, an approach that values respect, honesty, integrity, dedication and a commitment to innovation and continuous improvement. In everything we do, we constantly ask ourselves if we are doing it in the best interest of the people involved with NI: our employees, our customers, our shareholders and our suppliers. These values lead to the fun and dynamic environment you speak of. We invite you and anyone else reading this to join us at our NIWeek user conference in Austin this year to share in this experience. National Instruments Austin, TX. (512) 683-8411. [www.ni.com]. May 2007
Software&Development Tools Embedded Data Management
DDS Information Backbone Reduces Mission-System Complexity Following rapid acceptance of the OMG DDS standard for real-time data distribution in mission-critical environments, a fault-tolerant “information backbone” can be implemented to reduce system complexity by providing “the right data at the right time at the right place.” by H ans van ‘t Hag PrismTech
reating the right environment for networked, distributed applications to share data “on demand” and with proper reliability is a complex undertaking. This is even more challenging when inadequate responsiveness or errors in these “mission-critical” systems can result in financial disaster, lost production, social harm or even loss of life. The need for solutions that feature real-time, scaleable, low-overhead and fault-tolerant operation is growing faster than ever. Today the increasingly heterogeneous nature of these systems is also adding complexity, driven by the need to seamlessly incorporate Web-based, server-based and embedded applications into single systems with predictable (deterministic) and very fast performance. Driven by the limitations of traditional client-server architectures, and following the trends toward more loosely coupled and dynamic systems, the Object Management Group (OMG) recognized the demand for a standard that would follow a different paradigm. OMG organized members with experience in both the “underlying” technologies (networking and information-management) as well as “user-level” requirements (distributed, real-time and mission-critical system characteristics), to join forces and define the Data Distribution Service (DDS) for real-time systems. DDS utilizes the powerful publish/subscribe pattern to implement an information backbone to which any application can dynamically connect in order to publish and/or subscribe information. The DDS middleware must then take care of the proper data dissemination, taking into account multiple and dynamic quality of service (QoS) requirements regarding delivery (latency, reliability) and durability (persistence). Now that several COTS DDS implementations are becoming available, quantitative characteristics (such as functional coverage of the spec) as well as qualitative characteristics (such as footprint, performance and usability) will determine their suitability as an information backbone that actually reduces mission-system complexity during all lifecycle stages from design to deployment. 58
Especially within the mission-system domain, requirements for standards-based middleware solutions are becoming eminent since homegrown solutions don’t tackle the evolutionary nature of these networked systems, neither on the application level nor on the underlying technology level.
Profiles for Information Distribution
The DDS standard specifies a coherent set of profiles that target real-time information availability for domains ranging from small-scale embedded control systems up to large-scale enterprise information management systems. Each DDS profile adds distinct capabilities that define the service levels offered by DDS in order to realize this “right data at the right time at the right place” paradigm (Figure 1). The Minimum Profile utilizes the well-known publish/subscribe paradigm to implement highly efficient information dissemination between multiple publishers and subscribers that share interest in so-called “topics.” Topics are the basic data structures expressed in the OMG’s IDL-language. They allow for automatic generation of typed “readers” and “writers” of those topics for any mix of languages desired. This profile also includes the QoS framework that allows the middleware to “match” requested and offered QoS parameters—the minimum profile offering basic QoS attributes such as reliability, ordering or urgency. The Minimum Profile specifically targets resourceconstrained environments. The Ownership Profile offers support for replicated publishers of the same information by allowing a “strength” to be expressed by each publisher so that only the highest-strength information will be made available to interested parties. The Content Subscription Profile offers powerful features to express fine-grained interest in specific information content (content filters). It also allows applications to specify projection
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Software&DevelopmentTools views and aggregation of data as well as dynamic queries for subscribed topics by utilizing a subset of the well-known SQL language while preserving the real-time requirements for the information access. The Persistence Profile offers transparent and fault-tolerant availability of “non-volatile” data that may represent persistent settings to be stored on mass media throughout the distributed system. Alternatively, “state” data can be preserved in a faulttolerant manner outside the scope of transient publishers, which allows the late joining of applications and dynamic reallocation. The DLRL Profile extends the previous four data-centric publish/subscribe (DCPS) profiles with an object-oriented view on a set of related topics, thus providing typical object-oriented features such as navigation, inheritance and use of value types.
Information at the Heart
The information-centric paradigm is characterized by getting “the right information at the right time at the right place.” Even with the definitions as stated before, this still is a rather nebulous statement that requires more analysis since getting information on a pager is rather different from shooting down a ballistic missile. The three aspects of “right information,” “right time” and “right place” need to be further analyzed. Following the definition, the right information should be explained as those related pieces of (published) data that are required by a subscriber. What is required is expressed by the subscriber’s subscription. Apart from services allowing a subscriber to express its interest in information, interfaces are needed that allow fast access to this information once it is available. When evaluating available standards and practices for accessing information, it was kept in mind that run-time flexibility is needed to achieve the goals and related evaluaObject Oriented information view tion criteria for dynamic and evolutionary sys• Local object-model extending the distributed DCPS data-model Object-Model DLRL • Manages relationships and supports native language constructs tems. An associative information model pro(option) vides the required flexibility level by allowing Distributed QoS-driven information management • Fault tolerant and global persistence of selected data PS selective and run-time specification of autonoPersistence DC • Guaranteed data availability supports application fault-tolerance mously produced data items and their relations. • Content-aware filtering and dynamic queries · reducing application complexity SQL as a powerful and standard technology is ContentDCPS · improving system performance Subscription used to express the required fine-grained (conReal-time pub/sub messaging tent-filtered) interest in information using agS P C • Asynchronous ‘one-to-many’ real-time data communication Ownership D gregation, selection and projection. • Dynamic data-flow based on ‘current-interest’ (pub/sub) • Platform independant data-model (IDL) In a time-critical or real-time environment, • Strong-typed interfaces for multiple languages Minimum- DCPS getting information at the right time means • Information Ownership management for replicated publishers Profile making sure that information is made available when needed. In order to become available, the published data making up the information must be delivered to subscribers anywhere in Figure 1 OMG-DDS Profiles. DDS layered functionality is based on two pub/sub the system and at anytime in the system. This messaging profiles complemented by information-management profiles includes late-joining subscribers. This decouand an object-oriented API that (optionally) hides the underlying Data pling “in space and time” requires mechanisms Centric Publish Subscribe (DCPS) layers. both for efficient and effective distribution. Applying policies to specify required QoS levels is a powerful way to separate service-quality Computing-Node “need,” as perceived by applications, from service-quality “offering”—the dynamic availabilApp-2 App-3 App-1 ity of enterprise resources and networks. OpenSplice OpenSplice-lib OpenSplice-lib OpenSplice-lib Tool-Suite Information classification then implies the ability to “attach” QoS-profiles to publishers Shared Memory and subscribers as well as directly to the data itself, decoupled and outside the local scope of OpenSplice- OpenSplice- OpenSplice- OpenSpliceConfig these applications so that enterprise-rules may Disk lib lib lib lib (XML) -XML be applied without affecting (the design of) -Binary ConfigSoapNetworkDurability-RDBMS Service Service Service Service individual applications. Finally, the right time implies fine-grained notification mechanisms to react in real-time to availability of the proper network information (content). In information-critical and real-time systems, the lifecycle of the data is also an important aspect of information. Lifecycle-based selection, for instance, enables Figure 2 The OpenSplice Pluggable service architecture. For maximum efficiency consumers to process first-time appearances of and low footprint, OpenSplice utilizes a pluggable service architecture information with higher priority than updates where both applications and DDS services share common code as well of already known information. as common data within a single node.
Software&DevelopmentTools Getting information at the right place requires the knowledge about where the information is needed. Publications and subscriptions serve as declarations that inform the middleware where certain data is produced and where it is needed, thus offering real-time interaction with the information. Just as in real life, information production is often asynchronous from information consumption. This fact can be exploited by providing subscribers with a private information cache. Implementing such a cache as a local in-memory database allows extremely fast access on the information of interest. There are also a number of non-functional characteristics that can help shape a DDS implementation. To ensure scalability, flexibility and extensibility, an optimal DDS should have an internal architecture that utilizes shared memory to not only “interconnect” all applications that reside within one computing node, but also to “host” a configurable and extensible set of services. These services provide pluggable functionality such as networking, providing QoS-driven real-time networking based on multiple reliable multicast channels. They also ensure durability by providing fault-tolerant storage for both real-time state data as well as persistent settings. A remote control and monitoring “soap-service” provides remote Web-based access using the SOAP protocol. This pluggability ensures suitability in resource-constrained environments. An implementation such as this also utilizes a shared-memory architecture where data is physically present only once on any machine, and where smart administration still provides each subscriber with his own private “view” on this data (Figure 2). This allows a subscriber’s data cache to be perceived as an individual database that can be content-filtered, queried, etc., using the content-subscription profile. This shared-memory architecture results in an extremely low footprint, excellent scalability and optimal performance when compared to implementations where each reader/writer is a communication endpoint with its own storage (i.e., historical data both at reader and writer) and where the data itself still has to be moved, even within the same platform. Another key non-functional characteristic is to ensure that the middleware is easily configured on the fly by specifying only the needed services to be used as well as configuring those services for optimal matching with the application domain—networking parameters, durability levels, etc. Easily maintainable XML-file(s) are utilized to configure services. The middleware configuration is also supported by means of a MDA toolset, allowing system/network modeling and automatic generation of the appropriate XML configuration files. In one implementation, for example, a 100% Java-based tool can be used to greatly aid the design, implementation, test and maintenance of the DDS implementation. During the design phase, the information model is established by first defining and registering topics in a run-time environment. This environment can be both a host environment as well as a target environment. The tool can then enable the creation of publishers/writers and subscribers/readers on the fly to experiment and validate how this data should be treated by the middleware regarding persistence, durability, latency, etc. During the implementation phase, where actual applicationlevel processing and distribution of this information is developed, the tool allows injection of test input data by creating publishers and writers on the fly as well as validating the responses by creating subscribers and readers for any produced topics.
During the test phase, “snapshots” can be made of writer and reader history caches. Then the total system can be monitored by inspection of data and behavior of readers and writers based on statistics, such as how long data has resided in the reader’s cache before it was read. It is also possible to monitor the data-distribution behavior in terms of memory usage and transport latencies. Maximum flexibility for planned and “ad-hoc” maintenance can be offered by allowing the Java tool to remotely connect via the Web-based SOAP protocol to any “reachable” systems around the world as long as an HTTP connection can be established with the computing nodes of that system. Using such a dynamic connection, critical data may be logged and data sets may be injected into the system to be maintained—for example, new settings that can be automatically persisted using the QoS features as offered by the persistence profile supported by the implementation. Today, DDS implementations are beginning to come to market with second-generation fully compliant OMG-DDS implementations that offer support for all the DCPS profiles (minimum profile, ownership profile, content subscription profile and persistence profile) as well as the DLRL object profile. In these, several run-time modules can cover the full OMG specification as well as provide total-lifecycle support by integrated productivity tool suites that target the complete system lifecycle.
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PrismTech Burlington, MA. (781) 270-1177. [www.prismtech.com].
Products&Technology Tiny Logic Module Cuts Development Time
Development time can be reduced by weeks or even months with the use of smart logic systems-on-module (SOMs). A series of reconfigurable, fully self-contained logic SOMs from Advanced Knowledge Associates is based on industry-standard programmable logic platforms and includes processor cores as well as the necessary I/O and peripheral circuitry. Measuring just 2 in. x 2 in. with 419 pins, the LM125 runs Linux and includes standard interfaces such as dual 1553RT, dual CAN, dual RS232, USB, SPI, I2C and 10/100 Ethernet, as well as over 200 high-speed GPIOs. Based on Xilinx’s high-density Spartan IIE FPGA and employing a Xilinx microBlaze soft CPU core, the LM125 incorporates 256 Mbytes of SDRAM and 512 Mbytes of flash to handle multiple boot images for logic and software applications, while supporting a wide variety of standard interfaces. The LM125’s modular architecture facilitates the simple integration of user logic and custom peripheral sets. It contains all components needed to support processing and I/Os, including clocks, reset circuitry, temperature, power and passive components, totaling over 200 parts. Onboard programmable clock generation, voltage regulation and power monitoring further ease system integration. In quantities of 1,000, it is priced at $800 for commercial-grade modules. Advanced Knowledge Associates, Santa Clara, CA. (408) 431-0735. [www.advancedknowledgeassociates.com].
Connected and Flexible FPGA-Only AMC Card
An FPGA-only Advanced Mezzanine Card (AMC) is based on the Altera Stratix II GX FPGA, which has been specifically designed for serial I/O-based applications. The GXAM from BittWare provides up to 20 full-duplex multi-gigabit transceivers supporting PCI Express, XAUI, Gigabit Ethernet, Serial RapidIO, SerialLite II and other standards. The Stratix II GX device interfaces to three ports (1, 2 and 3) in the AMC commons options region, and eight ports in the AMC fat pipes (4 - 11). These 11 ports provide a network data and control switch fabric interface on the AMC connector, configurable to support PCI Express, Serial RapidIO, GigE, or XAUI protocols. Sixteen LVDS pairs (8 IN, 8 OUT) are provided for rear panel I/O via the AMC connector (ports 12 - 15, and 17 - 20), and all AMC clocks are also connected to the Stratix II GX FPGA. For additional flexibility, the Stratix II GX FPGA provides four SerDes and 76 pairs of LVDS I/O to a BittWare front-panel I/O mezzanine site. The GXAM also implements the standard Module Management Control Interface (IPMI). BittWare offers a complete suite of development tools that provide host interface libraries, a wide variety of diagnostic utilities and configuration tools, and debug tools. This tool set is comprised of BittWare’s DSP21k Toolkit, DSP21k Porting Kit and BittWare Target. The GXAM will be available in May 2007 priced at $3,500 in OEM quantities. BittWare, Concord, NH. (603) 226-0404. [www.bittware.com].
Secure Serial-to-WiFi Module Protects M2M Apps
A new 5-slot VPX backplane features a mesh topology with a theoretical slot-to-slot bandwidth of over 5,000 Mbytes/s. The backplane from Elma Bustronic was designed with a 20-layer controlled-impedance stripline design and signal integrity analysis was performed on the backplane to ensure optimal performance. Additionally, Elma Bustronic fabricated the backplane with the higher grade material commercial FR408 in order to allow optimal performance even at high signal frequencies. The VPX backplane technology is expected to be used in various applications, particularly Military/ Aerospace where the rugged form-factor, VME compatibility and high performance are key requirements. Pricing for the 5-slot VITA 46 backplane is under $2,000 depending on volume and configuration requirements. The lead time is 4-6 weeks ARO.
A secure, serial-to-WiFi embedded device server quickly and easily connects devices running machine-to-machine (M2M) applications to 802.11b/g wireless LANs and protects them from network attacks. The Socket iWiFi module from Connect One uses the company’s iChipSec CO711AG Internet Protocol (IP) communication controller chip—which includes the latest encryption, security and IP protocols—to act as a firewall and WiFi controller for the onboard Marvell 88W8385 WiFi chipset. Socket iWiFi enables devices that use communication modules in the industry-standard SocketModem form-factor to be integrated into a wireless LAN network with a minimum amount of programming. Connect One’s iChipSec and high-level AT+i API offload the WiFi drivers, WPA supplicant, security and networking protocols, and communication tasks from the host application. Included are 10 simultaneous TCP/UDP sockets; two listening sockets; SMTP, MIME, POP3, FTP, Telnet and HTTP clients; a Web server with a Web site for the application and one for configuring iChipSec; and serial-to-IP bridging. Socket iWiFi supports 64-/128-bit WEP encryption, the SSL3/TLS1 protocol for a secure client socket session and a secure FTP session, and WPA1. The module operates at 3.3 volts over an extended temperature range of -20° to 70°C. Pricing is $95 in quantities of 100 to 999 units. An evaluation board, the II EVB- 361MS, costs $275.
Elma Bustronic, Fremont, CA. (650) 490-7388. [www.elmabustronic.com].
Connect One, Kfar Saba, Israel. +972-9-766-0456. [www.connectone.com].
5-Slot VPX Backplane Compliant to VITA 46 Specification
Human Machine Interface Solutions Are Rugged, Lightweight
The extreme environmental conditions of both military and industrial automation operations call for workstations and displays that are both rugged and versatile, two characteristics not always found together in the same system. A new series of human-machine interface (HMI) solutions from Kontron America are rugged, lightweight and flexible. The Barracuda series includes easily transportable workstation and stand-alone touchscreen displays with flexible mounting options. The Kontron Barracuda offers a sunlight-readable, 15-in. XGA touchscreen display in a corrosion-proof, NEMA-4, IP 65 aluminum enclosure that operates in a 0° to 50°C environment, with a -30°C option. Optional water- and dust-tight, circular, military-rated connectors allow for harsh environment connectivity. The displays can be utilized in military command, control, communications and computers (C4) operations where equipment must withstand harsh vehicle shock and vibration. A small footprint and VESA hole pattern allow easy mounting in space-constrained areas. Features include UPS battery backup, as well as optional modular AC/DC sealed power supply and an optional built-in, highgain wireless antenna. The Barracuda DS offers a full military-hardened MIL-STD 810F and Protection Classification IP 65-compliant touch-screen display. The Barracuda WS provides an Intel Pentium M processor workstation with a removable hard drive or CompactFlash device. Pricing starts at $6,500. Kontron America, Poway, CA. (858) 677-0877. [us.kontron.com].
Rugged PCI-104 CPU Breaks the 1 GHz Barrier
Breaking the 1 GHz barrier for rugged PC/104-size modules, a new CoreModule 800 from Ampro fits a complete CPU subsystem with I/O, PCI-104 bus expansion and network interfaces without violating the required 3.550” x 3.750” (90 x 96 mm) board outline. It features the 1 GHz Intel Celeron M 373 processor from -40° to +85°C without CPU cooling fan on a 0.120” thick PCB with optional conformal coating. Up to 1 Gbyte of DDR 333 RAM is supported, along with two RS-232/422/485 serial ports, two USB 2.0 ports, Intel 82541 Gigabit Ethernet, integrated graphics with LVDS LCD support, IDE, a shared parallel / floppy port, PS/2 keyboard and mouse interface, and AMI BIOS. Bus expansion is provided by the standard PCI-104 connector (PCI bus). For use with off-the-shelf PC/104 (ISA bus) modules, Ampro offers MiniModule ISA, which contains a PCI-to-ISA bridge QuickStart Kits for these products include cables, I/O board with PC-style connectors, 512 Mbyte DDR RAM, plus device drivers and Board Support Packages (BSPs) for Windows XP, Windows XP Embedded, Windows CE, QNX, VxWorks and a full Linux 2.6 distribution. Prices for the 800 MHz and 1 GHz models range from $800s to $1,000s in production quantities. Ampro Computers, San Jose, CA. (408) 360-0222. [www.ampro.com].
Low-Cost 16-bit PCI DAQ Card Integrates Simple Motion Control
A low-cost, multi-function 16-bit resolution DAQ card features a sampling rate up to 250 kS/s. The PCI-9221 from Adlink Technology also provides a programmable I/O supporting digital I/O (TTL), general-purpose timer/counters, motor encoder inputs and pulse width modulation (PWM) outputs for simple motion control. The PCI-9221 combines data acquisition and motion control, providing an attractive combination of analog and digital I/O with motion control capabilities for test and measurement system integrators and laboratories. Operating temperature is 0 - 45°C. The PCI-9221 card offers two 16-bit analog outputs that are suitable for applications requiring DC voltage output control. A single button auto-calibration feature ensures reliable performance and accurate measurements, regardless of the environment. The PCI-9221 card comes with a WDM driver for Get Connected with technology and companies now lanC/C++, Visual Basic, Delphi, C++ Builderproviding and .NETsolutions programming Connected a new resource forquantity further exploration guages and full device driversGet for Matlab and isLabView. Single into products, technologies and companies. Whether your goal price for the PCI-9221 is $295.
is to research the latest datasheet from a company, speak directly
Adlink Technology,with Irvine, CA. (970) 377-0385. an Application Engineer, or jump to a company's technical page, the [www.adlinktech.com]. goal of Get Connected is to put you in touch with the right resource.
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Rabbit 4000 www.rtcmagazine.com/getconnected Module Enables ZigBee Networking
Connecting industrial control and building automation systems to the Internet via wireless networks has just gotten a lot easier with the RCM4510W ZigBee/802.15.4 module from Rabbit Semiconductor. Based on the RabbitCore 4000 microprocessor, the RCM4510W enables Get Connected with technology and companies providin the use of low-cost, low-power ZigBee wireless sensor networks. Get Connected is a new resource for further exploration into produc The module is pin-compatdatasheet from a company, speak directly with an Application Engineer, ible with existing RabbitCore 4000 in touch with the right resource. Whichever level of service you require fo modules, including serial, wired Get Connected will help you connect with the companies and products Ethernet and wireless Ethernet/ www.rtcmagazine.com/getconnected Wi-Fi versions, so engineers can support numerous applications with the same motherboard design by changing the RabbitCore module. The RCM4510W’s Rabbit 4000 runs at 29.49 MHz. Features include up to 49 GPIO lines shared with six serial ports and four channels of analog inputs, hardware DMA, quadrature decoders, PWM and up to four levels of alternate pin functions. Operating temperature range is -40° to +85°C. A development kit for the RCM4510W contains the appropriate full-featured wireless RabbitCore, a development board, the latest Dynamic C integrated development software with hundreds of samples Get Connected with companies and and libraries, and all accessories needed. The RCM4510W is priced at products featured in this section. $72 in quantities of 100. The RCM4510W Development Kit is priced www.rtcmagazine.com/getconnected at $199.
Rabbit Semiconductor, Davis, CA. (530) 757-8400. [www.rabbit.com]. Get Connected with companies and products featured in this section. www.rtcmagazine.com/getconnected
Gigabit Ethernet Boards Support OpenWare Management, IPv4 and IPv6
The first members in a family of fully managed layer 2/3+ Gigabit Ethernet switches have debuted as three products from GE Fanuc. The Neternity family is designed to handle the demanding requirements of a broad range of applications including military, telecommunications and commercial. The three new products feature the OpenWare switch management environment. OpenWare is portable across switch fabrics and processor environments, is easy to customize using the familiar Linux command line interface and is designed to make switches easy to deploy and easy to manage. The Neternity RM921 is an IPv6-enabled 6U VME Gigabit Ethernet switch with either 12 front I/O (single-slot solution) or 24 front I/O ports (dual-slot solution). It also offers support of IPv4. Port configuration can be all copper, all fiber or combinations of both. Also optionally available are 100BaseFX ports so that both 100BaseFX and Gigabit Ethernet interfaces can be supported on the same Network Interface Card. The Neternity RM922RC is an ROHS-compliant IPv6-enabled 6U VME fully managed layer 2/3 Gigabit Ethernet switch with 24 copper ports (single-slot solution) via rear I/O. The Neternity CP921RC is an RoHS-compliant PICMG 2.16 6U CompactPCI fully managed layer 2/3 Gigabit Ethernet switch with 24 copper ports, and is hot-swappable, minimizing potential system downtime. It is also compliant with PICMG 2.1 and PICMG 2.9.
FPGA Acceleration Board Uses HyperTransport Slots
The first complete, off-the-shelf hardware/software compiler design bundle for high-performance computing (HPC) using industry standard HyperTransport (HTX) slots combines an intellectual property core for HTX-compliant connectivity, an FPGAbased HTX acceleration card and a comprehensive software programming environment. Part of Celoxica’s family of Accelerated Computing products, the solution enables algorithm acceleration in computing systems with AMD Opteron processors. The Celoxica RCHTX acceleration card includes two Xilinx Virtex-4 FPGAs, 24 Mbytes of dedicated QDR SRAM and a range of I/O. The main coprocessor FPGA is a reprogrammable, high-density 16 million-gate device. The second FPGA is configured as a bridge, containing Celoxica’s HTX IP core. It provides the HyperTransport interconnect between the FPGA coprocessor and the entire host processor system and memory space. Celoxica’s DK Design Suite delivers an IDE and compiler for programming the FPGA coprocessor and allows HPC programmers to use familiar software languages and legacy code. Celoxica’s technology compiles high-level, C-based code directly to the user FPGA device. A board support package and software API are provided for the RCHTX card. The RCHTX card is priced at $15,000 in single quantities. Celoxica, Austin, TX. (512) 795-8170. [www.celoxica.com].
GE Fanuc Embedded Systems, Albuquerque, NM. (505) 727-1553. [www.gefanucembedded.com].
Fanless PC/104-Plus SBC Runs Hot and Cold 6U cPCI Server Blade Features Dual-Core Xeon Processors
In high-performance industrial, mobile and harsh environment applications where fast and reliable communication is required, the combination of multiple processors and multiple memory variants can make a big difference. The new 6U CompactPCI D7 server blade from MEN Micro is equipped with either one or two 1.66 GHz Intel Xeon dual-core processors and the Intel E7520 server chipset, as well as ECC DDR-2 DRAM, non-volatile FRAM or SRAM. The hot-swappable blade can be used as a peripheral slot board, a 64-bit/66 MHz PCI system or a 64-bit/133 MHz PCI Extended (PCI-X) system on the CompactPCI bus using one or two slots. The PCI Express (PCIe) links connect to the two front-panel Gigabit Ethernet interfaces and are used to attach up to two XMC modules. The D7 also supports 12 Gigabit Ethernet connections. Additional I/O includes USB, XMC/PMC, two PATA interfaces, two SATA interfaces and optional VGA/COM. The D7 offers an FPGA for configuration of applicationspecific I/O functions such as additional serial interfaces, graphics, Fieldbus interfaces and digital I/O, in addition to typical PC functions such as USB and UARTs. The board also comes with a passive heatsink for forced-air cooling. Pricing is $5,010. MEN Micro, Ambler, PA. (215) 542-9575. [www.menmicro.com]. 64
A new PC/104-Plus-compatible single board computer runs a 500 MHz Pentium-class processor while supporting video, Ethernet, USB and four COM channels. Based on the low-power, high-integration AMD GX500@1W processor, the PPM-GX from WinSystems operates throughout the temperature range of -40° to +85°C without the need for a fan. The board integrates the CPU, video, Ethernet, USB, COM, LPT, mouse, audio and keyboard controllers onto one board. The AMD GX500@1W processor supports an x86-native instruction set and 32 Kbytes of integrated L1 cache that efficiently runs Windows CE, Windows XP embedded, Linux and other x86-compatible operating systems such as VxWorks and QNX. The PPM-GX supports up to 512 Mbytes of SDRAM and also offers support for both rotational and solid-state disks. Two floppy disk drives and two UltraDMA 66 IDE drives can be connected. Additionally, there is a socket for a CompactFlash card, which can support up to an 8 Gbyte device. A graphics controller is integrated into the processor that supports both CRT and flat panel displays. Other peripheral functions supported include a battery-backed real-time clock, precision power-fail reset circuit, and programmable watchdog timer. Additionally, it supports PC/104 or PC/104-Plus expansion I/O modules that are available from vendors worldwide. The PPM-GX draws typically 1.5A at +5V (≈ 8W) during normal operation. List price is $495. WinSystems, Arlington, TX. (817) 274-7553. [www.winsystems.com].
PC/104-Plus 8-Channel Serial Communications Module for PCI-Based Systems
A high-performance 8-channel multi-protocol serial communications PC/104-Plus module depends solely on the PCI bus for its processor interface. The Emerald MM-8Plus from Diamond Systems offers significantly improved performance over traditional PC/104 (ISA busonly) solutions. The module offers eight serial ports with RS-232/422/485 capability with speeds up to 1.832 Mbits/s when using the RS-422 or RS-485 protocols. The board also offers 8 digital I/O lines. Protocol selection is via jumper selection. Address and interrupt selection is via the PCI bus plug and play functionality. The board operates over an extended operating temperature range of -40°C to +85°C. The Emerald MM-8Plus is the latest in a family of six PC/104 and PC/104-Plus Serial Communications boards, supporting from two to eight ports. Some models include up to 48 digital I/O lines while another model offers optical isolation on the serial ports. The Emerald MM-8Plus is priced at $250. Diamond Systems, Mountain View, CA. (650) 810-2500. [www.diamondsystems.com].
StackableUSB CPU with LCD/Touch Interface and Ethernet for Extended Temps
The newest addition to Micro/sys’ StackableUSB single board computers, the SBC1496 is a RoHS-compliant controller that operates from -40° to +85°C and provides I/O expansion via StackableUSB peripherals. In addition to PC-compatible features, such as SVGA and dual serial ports, the new model also includes four USB 2.0 high-speed (480 Mbit/s) ports, two USB 1.1 full-speed ports and 100BASE-T Ethernet support. The SBC1496 is implemented with the STPC Atlas processor, which offers speeds up to 133 MHz, on-chip cache, 64-bit DRAM access, hardware floating point, digital I/O and AT-compatible EIDE, interrupt, timer and DMA controllers. The SBC1496 includes COM1, COM2, SuperVGA, keyboard, and mouse. The SuperVGA includes hardware acceleration and drives CRT monitors and LVDS TFT flat panel displays with resolutions to 1024 x 1024. When I/O expansion is needed, the StackableUSB interconnect architecture enables the control of up to five StackableUSB peripheral devices in a rugged, bolt-together platform. The CompactFlash socket can be used as solid-state storage. Micro/sys installs a ready-to-run firmware system on the SBC1496 at no cost. Alternatively, the module can boot DOS, Linux, Windows CE, VxWorks and other PC-compatible operating systems. A development kit that includes cables, sample software and full documentation is available. The basic SBC1496 starts at $385 in single quantity. The industrial temperature (-40° to +85°C) version is available starting at $435. Micro/sys, Montrose, CA, (818) 244-4600. [www.embeddedsys.com].
PC-Based Data Recorder Achieves 400 Mbytes/s Sustained
A high-speed, portable, PC-based recorder that’s also reliable and rugged enough for use in the field is high on the wish list of engineers working in many scientific research and defense applications. Housed in a rugged portable chassis, the Big River P440 data recorder from Conduant achieves over 400 Mbytes/s of sustained recording or playback performance in a portable, self-contained unit. The P440 features an Intel Core 2 Duo processor, Gigabit Ethernet connectivity and expansion PCI slots for optional third-party high-speed acquisition I/O boards. It includes a high-resolution, flat panel screen display, keyboard with touchpad mouse and support for FPDP, LVDS and Serial FPDP (optical) interfaces. Capacities of up to 3.2 Terabytes are available. The data recorder incorporates Conduant’s StreamStor Amazon Get Connected2.5-in. with technology SATA disk controller, as well as 16 high-capacity notebookand disk companies providing solutions drives. The disk controller utilizes a wide range of popularnow interface Get Connected a new or resource for further exploration options such as FPDP, Serial FPDP, FPDP II, isLVDS the PCI bus for into products, technologies and companies. Whether direct-to-disk recording and features data forking and circular buffer re- your goal is to research the latest datasheet from a company, speak directly cording. Pricing for the Conduant Big River P440 ranges from $35,000 with an Application Engineer, or jump to a company's technical page, the to $40,000. goal of Get Connected is to put you in touch with the right resource.
Whichever of service you require for whatever type of technology, Conduant, Longmont, CO.level (303) 485-2721. Get Connected will help you connect with the companies and products [www.conduant.com]. you are searching for.
ETX System-on-Module Supports CRT/LVDS, LAN and Audio
The combination of a small CPU systemon-module with a separate baseboard can provide a flexible design platform for developing a number of small systems,Get suchConnected as those usedwith technology and companies providin Get Connected is a new resource for further exploration into produc in medical imaging/monitoring, kiosk/POS, from a company, gaming, industrial controldatasheet and security moni- speak directly with an Application Engineer, in touch withEnterprises the right resource. Whichever level of service you require fo toring. With that in mind, WIN Get Connected will help you connect with the companies and products has released the MB-0014 System-on-Module www.rtcmagazine.com/getconnected (SOM) ETX CPU module and the companion IP-06051 5.25-in. disk-size ETX baseboard. The MB-0014 SOM ETX CPU module has an onboard 600 MHz Intel Celeron M or Pentium M processor, 512 Kbytes of BIOS flash, the Intel 852GM/855GME + ICH4 chipset, the SMSC SCH3112 I/O chipset, a DDR SO-DIMM socket supporting up to 1 Gbyte (266 MHz), a 10/100 Mbit/s Ethernet interface, one bi-directional parallel port, two RS-232 interfaces, four USB 2.0 ports, CRT and 18-bit LVDS and AC’ 97 audio (852GM chipset). The SOM’s compact ETX form-factor measures only 114 mm x 94 mm. System drivers are available for Microsoft Windows XP/XPe/CE and Linux The IP-06051 5.25-in. with disk-size ETX baseboard features VGA/ Get Connected companies and LVDS/LCD, LAN, CardBus, TV-out and audio. With the Celeron M proproducts featured in this section. cessor, an MB-09014 is priced at $276 for a single unit. Single units of the www.rtcmagazine.com/getconnected IP-06051 are priced at $167 each. Quantity discounting is available.
WIN Enterprises, N. Andover, MA. (978) 688-2000. [www.win-ent.com]. Get Connected with companies and products featured in this section. www.rtcmagazine.com/getconnected
VPX and the Brave New World of Flexible Hybrid Backplanes VPX offers flexibility in terms of interconnects and topologies to mix and match with legacy boards, which enables the integrator to custom design the interconnects over a hybrid backplane to meet the unique needs of the application—right down to the power requirements. by M ichael Munroe Elma Bustronic
he VPX backplane architecture represents a major leap forward for system integration flexibility through its support of flexible hybrid configurations. These configurations include flexible topologies, multiple signaling protocols and hybrid core architectures, such as mixed VPX and legacy VME64x configurations, in addition to multiple power choices. Earlier backplane specifications, such as VME, strictly defined slot usage. These previous backplane architectures defined how connector pins would be used by a given board, and how each card slot would be connected to the next card slot. These backplanes limited the system capability because key architectural features were defined rigidly from the start. For example, decisions about system connectivity (how boards are connected to each other) determined a specific interconnect topology. VPX was designed to enable end-users to employ any one or a combination of the popular interconnect toFigure 1 Curtiss-Wright CHAMP VPX6-185 air-cooled IPM installed angle connector. All VPX cards have a MultiGig “wafer” interface.
pologies in a single backplane to best fit any given application. The VPX Core standard provides for the development of hybrid backplanes because it is designed to simultaneously support a mix of bus segments. For example, these integrated bus segments can be configured in full mesh, pipeline or single or dual star topologies. It is also permissible to have some slots configured as legacy parallel VME. Of the seven connectors in each slot, numbered 0-6, connectors J1 to J6 may be implemented for either differential signals or single-ended signals. This flexibility allows a user to use exactly as many pins and connection configurations, etc., as are needed for the specific application. VPX defines a standard card layout and standard mechanics, electrical utilities and a range of fabric options but lets system engineers connect the dots between them so as to conform to the exact needs of their application. The term, “hybrid backplane” typically suggests either bringing together heterogeneous backplane architectures such as fabric-based VPX and parallel VME64x (legacy hybrid), or the mixing and matching of different types of network topologies, such as mesh and stars (hybrid topologies). There are, in fact, four different types of hybrid backplanes. In addition to the hybrid types just mentioned, VPX adds the support of hybrid protocols, which involves mixing different fabrics, for example Serial RapidIO and PCI Express, on different channels or bus segments. It also supports a hybrid power approach that allows the integrator to choose the primary voltage for his application from the choices: 3.3 VDC, 5 VDC, 12 VDC or 48 VDC power. Thus, the VITA 46 (VPX) backplane architecture uniquely embraces all four of these hybrid concepts into a single flexible backplane standard.
IndustryWatch Legacy Hybrid
The idea of legacy hybrid has been a familiar one in VME development over the years. For example, in a VXS backplane it is possible to combine side by side, legacy VME64x boards with the 2 mmP0 connector alongside fabric-based boards with the differential Multi-Gig J0 connector. In the legacy VME64x slots, boards such as an SBC could be running StarFabric over the 2 mm HM P0 connector, while other systems could populate the legacy VME64x slots with cards based on Ethernet or Myrinet serial protocols. Either of these legacy choices could be combined with multiple slots of newer VPX fabric cards based on Serial RapidIO. For VPX users, the legacy hybrid approach is a transitional, bridging approach that makes it easier for people to use the available VPX boards immediately by combining them with other existing legacy boards. Some early adopters have expressed an interest for hybrid backplanes with large numbers of legacy slots and smaller numbers of VPX slots, For example, one proposed backplane offers nine slots of legacy VME and three slots of VPX. As more VPX boards become available, it’s expected that the ratio will switch toward more VPX slots and fewer VME. Implementing legacy hybrid support requires a VPX standard that maps signal locations for parallel address and other system signals required by older VME boards onto one or more VPX slots. These special VPX slots are for cards that are capable of communicating across both a serial VPX protocol as well as the parallel legacy VME protocol. Again it can be noted that not all VPX slots in such a legacy hybrid backplane would be required to support dual architecture cards. Part of the challenge in developing a legacy hybrid VPX/VME backplane involves proper wiring to ensure that electrical signals are assigned to the VPX slot in a way that meets the constraints of signal routing while maintaining signal integrity by keeping sensitive signals away from each other. The backplane in Figure 2 has a single VME slot and it is designed to support a card such as the Curtiss-Wright VPX-185 in slot 1 (Figure 1). Any or all of the VPX slots could be configured in this way, however, there are other uses for the signal positions that this would monopolize.
Hybrid topologies represent a second type of flexibility that can be provided by a hybrid VPX backplane. Many of the leading vendors of embedded computer boards who collaborated within the VITA 46 Working Group had different fabric interconnect topologies in mind for their markets. Some applications are best served by pipeline architectures, while other types of applications are ideal for mesh topologies. It is not unusual, however, in an ideal system to combine topologies so that one group of cards is connected in a mesh and other groups of cards pass data from one card to another in a straight pipeline. For this reason it was agreed from the very beginning that the VPX backplane would allow system architects to select the ideal mix of topologies. The result is a VPX standard that enables system designers to select a single fabric and topology to address a very specific problem, or use multiple fabrics and topologies as their application may require. To define the proper usage of a variety of optional topologies and their mixed use, the VITA 46 working group developed specific
“dot-specs” that define each supported topology. VITA 46.0 is the base specification and sets the requirements for the backplane’s differential signal assignments and location of channels. It also defines where the (+) and (-) differential pair pins are located for differential pairs, and the location of single-ended signals that are interspersed. VITA 46.1 defines parallel VME within a VPX slot as discussed earlier. The VITA 46.1 dotspec allows the integrator to Figure 2 Six-slot hybrid backplane. specify how many slots will A popular development support the parallel VME system might have five signals. All slots and plug-in VPX slots in a single fully cards would also conform meshed cluster and one to the basic requirements of legacy VME slot. VITA 46.0 as can be seen on the VPX6-185 card in Figure 1, which supports parallel VME signaling as well as Serial RapidIO. Figure 3 shows a 6-slot backplane with a single legacy VME64x slot and five VPX slots. VITA 46.3, 46.4, 46.5 and 46.6 define the implementation of Serial Rapid IO, PCI Express, HyperTransport, Gigabit Ethernet, 10 Gigabit Ethernet and InfiniBand primary fabrics on VPX respectively. Rapid IO and PCI Express seem to be the most popular thus far. Figure 4 shows a hybrid backplane with three 4-slot Serial RapidIO VPX full mesh clusters as well as three legacy VME64x slots and two GigE switches supporting VITA 46.20. The three full mesh clusters are connected to each other in a ring. In this example, Serial RapidIO clusters B and C are also supported by a VITA 46.20 Gigabit Ethernet control plane. All the slots in cluster A support a parallel VME bus that includes the three legacy slots (1, 2 and 3). VITA 46.9 defines I/O pin usage for PMC/XMC cards. PMC and XMC sockets enable users to add additional functionality to a base card. While some XMC sockets will not require any backplane I/O, many applications utilizing XMC sockets will use the backplane as an I/O port. For this reason VITA 46.9 defines the signal assignments for various configurations. For instance, a 6U card may have one or two XMC sockets requiring backplane I/O. Another configuration might be one or two PMC sockets. An example of a product that provides increased backplane I/O via two 46.9-compliant PMC/XMC sites is Curtiss-Wright’s VPX6-185 8641-based single board computer. VITA 46.10 defines the use of rear-transition modules on VPX. This is driven by I/O-intensive applications such as an interface to demanding applications such as medical X-ray processing, storage area networks and antenna arrays. There are several system functions that would benefit in some May 2007
Star Switch 2
Logical View Figure 3
Seven-slot hybrid VPX Gigabit Ethernet VME. Logical view of a 7-slot hybrid supporting three fabrics, which might have five meshed slots in a Serial RapidIO cluster, one VME legacy slot and one Gigabit Ethernet star switch.
wide number of channel widths will increase flexibility. Although different topologies can be segregated into separate slots, it is also possible to overlay two different topologies within a common board set by assigning specific connector segments to different interconnect topologies. For example, one backplane segment may be designated for a slot-to-slot pipeline topology while another segment supports a distributed mesh for a cell architecture. A single slot might be configured with the specific I/O ports needed for an SBC serving as the system console and other slots might be provided with maximum I/O to multiple XMC sockets. The user may opt to overlay the entire backplane with a distributed Ethernet star. A 6U VPX slot, which can be viewed as 192 differential pairs, can be divided into 24 duplex x4 channels, or into 48 full duplex x2 channels, or a combination of x2 and x4 channels. Such channel definitions are frequently referred to as thin pipes and fat pipes. Thin pipes could be used for control functions and fat pipes used by application for data transport. The standard core fabric provisioning for a VPX payload slot is four ports of x4 duplex fabric. With regards to fabric channel mapping, the standard core fabric provisioning for a VPX payload slot is four ports of x4 duplex channels.
Flexible Protocols VMEbus
VPX Clusters Cluster A
A large 17-slot hybrid might have three Serial RapidIO meshed clusters, three legacy VME slots and two Gigabit Ethernet switches, providing a dual star control plane to all VPX slots with the exception of one meshed VPX cluster that supports the parallel VME interface.
cases from having a switched serial fabric for utility functions such as system control, application configuration access or other basic communication needs. To standardize the implementation of a single or dual star control channel VITA 46.20 is being defined. Standardizing the channel mapping of such a utility channel will allow vendors to offer switch cards to provide this access. One of the popular implementations of this newly proposed standard will be unmanaged 3U and 6U x2 Gigabit Ethernet fabric switches. Figure 3 shows how a 3U Gigabit Ethernet switch can provide control plane support to five other VPX cards. The VITA 46 dot-specs also enable users to define special electrical requirements for a specific fabric protocol. The dot specifications also define the granularity and flexibility of data channels. For instance, a dot specification can define support for x2, x4, x8 duplex channels and so forth. Limiting support to a smaller set of channel widths would reduce cost. Supporting a 68
The concept of flexible protocols goes back to the earliest days of serial fabrics when users realized that a serial channel was essentially fabric-agnostic and could be used for any number of serial protocols. Mixing protocols on a VPX backplane is relatively simple in terms of the electrical requirements, which makes it easy for the backplane manufacturer to address. This is because a differential pair that is good at handling Serial RapidIO, is also ideal for Gigabit Ethernet, PCI Express, InfiniBand, or a SERDES direct protocol such as Aurora. VPX is flexible enough to support the wide variety of fabrics and the different topologies that they prefer. For example, Ethernet, PCI Express and InfiniBand are typically configured in a centralized topology like star or dual star, while Serial RapidIO and the FPGA protocols Aurora (Xilinx) and Serial Lite (Altera) are frequently configured in mesh environments. The signaling requirements for different protocols are really electrically identical or nearly identical. VPX provides the bandwidth to support the full range of high-speed protocols. VME has been able to support 10/100 Mbit Ethernet, and with the 2 mm connector, supported 1 GigE. Still, it wasnâ€™t until the highperformance MultiGig connector emerged (which VPX uses) that data rates in excess of 5 Gbits/s, reaching as high as 10 Gbits/s, became practical and achievable. Flexible protocol backplanes are important because many applications already require two protocols. For example, an FPGA-based system using a board such as a VPX FPGA processor board, will need to have one protocol for passing data between boards in a point-to-point architecture, but you may use other fabric channels for I/O. You may even have an Ethernet channel through which you could initiate processes or reprogram boards. This may sometimes be done through the front panel, but a stand-alone system without an operator present may require a communication card to talk to any one of the cards, which could be done via a star architecture like that defined by VITA 46.20.
VMEbus Signal Mapping for VITA 46
PCI on VITA 46
Serial RapidIO on VITA 46
PCI Express and ASI on VITA 46
HyperTransport on VITA 46
Gbit Ethernet on VITA 46
10Gbit Ethernet on VITA 46
InfiniBand on VITA 46
PMC/XMC/GbE to 3U/6U VITA 46 Pin Mapping
Rear Transition Module for VITA 46
VPX Switch Slot Definition
Mass Storage Modules for VMEbus and CompactPCI速
List of VITA 46 standards. Of the 12 VPX standards, seven can be considered general transport fabrics, three utility or I/O fabrics and two general or core mechanical standards.
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or call Toll-Free: 800-808-7837 To standardize the implementation of all these various fabRed Rock Technologies, Inc. 480-483-3777 rics as well as to define how various I/O fabrics are routed out the backplane and the mechanics of rear transition modules, many subsidiary standards have been defined. Table 1 lists all these separate documents. One type of backplane hybrid that is generally less familiar edrock_04.indd 1 2/2/07 1:21:52 PM than those considered above is power flexibility. In a system there may be a mix of cards that have different power requirements. For example, there may be Telco cards that use 48V and other cards that use a vehicular supply of 24V. While topology hybrid design demands the user to consider how the application will use the cards and what the data requirements will be, the Mini-ITX systems & solutions for embedded power problem is simpler in that the challenge is identifying applications, industrial & mobile computing. how much power each board requires. But for the backplane Mini-ITX Mainboards vendor, routing and labeling power connections can be just as with VIA, Intel, or AMD processors. complex as the challenge of building a topology hybrid or legx86 platform acy hybrid backplane. small form factor design VPX cards are now starting to emerge from vendors such as Linux and Windows XP Curtiss-Wright, Micro Memory, GE Fanuc/Radstone and Mercompatible cury. While in the past standard backplanes were available before fully customizable systems the cards were developed; today, because of all the flexibility that VPX brings in terms of protocols and topologies, backplane vendors are waiting to see what board connectivity board vendors Fanless Mini-ITX Systems are going to offer, and some board vendors are waiting to see Utilizing heat pipe technology, these completely fanless what preferences are going to be popular with customers. ReMini-ITX systems offer gardless of the final system requirements, it is likely that laboradurability, reliability, and tory development will take place on standard configurations such power-efficiency for a as the 5-slot mesh backplane example found in chapter 7 of the wide range of embedded VITA 46.0 document. applications in harsh, remote environments.
Elma Bustronic Fremont, CA. (510) 490-7388. [www.elmabustronic.com].
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ARM Developersâ€™ Conference................................................................................. 49.....................................................................www.arm.com/developersconference BittWare................................................................................................................ 53................................................................................................. www.bittware.com ChipX, Inc.............................................................................................................. 61......................................................................................................www.chipx.com
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Find the AdvancedMC ™ products you’re looking for at GE Fanuc Embedded Systems. 54 RTC Interviews Dr. James Truchard, President, CEO and...