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July 2016, Volume 18 – Number 7 •

The Journal of Military Electronics & Computing JOURNAL

HPEC Systems Propel Ahead of Ordinary Embedded Solutions


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The Journal of Military Electronics & Computing JOURNAL


COTS (kots), n. 1. Commercial off-the-shelf. Terminology popularized in 1994 within U.S. DoD by SECDEF Wm. Perry’s “Perry Memo” that changed military industry purchasing and design guidelines, making Mil-Specs acceptable only by waiver. COTS is generally defined for technology, goods and services as: a) using commercial business practices and specifications, b) not developed under government funding, c) offered for sale to the general market, d) still must meet the program ORD. 2. Commercial business practices include the accepted practice of customer-paid minor modification to standard COTS products to meet the customer’s unique requirements. —Ant. When applied to the procurement of electronics for he U.S. Military, COTS is a procurement philosophy and does not imply commercial, office environment or any other durability grade. E.g., rad-hard components designed and offered for sale to the general market are COTS if they were developed by the company and not under government funding.

July 2016 Volume 18 Number 7

FEATURED p.10 System and Software Technologies Lead HPEC Charge SPECIAL FEATURE HPEC Systems Leverage Data Center Computing


10  System and Software Technologies Lead HPEC Charge

6 Editorial



The Inside Track


COTS Products


Marching to the Numbers

Look to the East

Jeff Child

Applying HPEC and Deep Learning Tech to Defense Systems Mark Littlefield, Dr. Mohamed Bergach, Kontron

JEFF’S PICKS Jeff Child’s Top MIcroTCA and ATCA Products 20  AMC Module Does 56 GSPS A/D Conversion and FPGA-Based Signal Analysis Jeff Child

Coming in August See Page 44

SYSTEM DEVELOPMENT Safety Critical and Mission-Critical Software 24 Security/Safety Analysis Tools Smooth Path to MISRA-C Compliance Jay Thomas, Chris Tapp, LDRA

On The Cover: General Dynamics Electric Boat recently won an $18.9 million contract modification for the continued development of the Virginia Payload Module (VPM). Virginia-class attack submarine USS Mississippi (SSN 782) shown here in 2012 pre- commissioning conducting alpha trials in the Atlantic. (U.S. Navy photo courtesy of General Dynamics Electric Boat/Released).

DATA SHEET OpenVPX SBCs Roundup 30 31

OpenVPX Community Churns Out Standards and Solutions Jeff Child

OpenVPX SBCs Roundup

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COTS Journal | July 2016



The Journal of Military Electronics & Computing




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COTS Journal

COTS Journal | July 2016

PRESIDENT John Reardon, VICE PRESIDENT Aaron Foellmi,




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EDITORIAL Jeff Child, Editor-in-Chief

Look to the East


uring my tenure at COTS Journal there’s been several Sectaries of Defense and all have very sincerely demonstrated an emphasis on technology. But none in my view have gone the extra mile along those lines as our current SecDef Ashton Carter. One example is his establishment 11 months ago of the DoD’s first, full-time outreach office in Silicon Valley, called the Defense Innovation Unit Experimental. Dubbed DIUx for short, the office is staffed by active-duty and military personnel, plus key people from the Reserves who live in the Valley. Its mission has been to strengthen existing relationships and build new ones while also scouting for new technologies. Its role is to function as a local interface for the DoD. Expanding on that effort, the Secretary this month announced the opening of an east coast DIUx based in Boston. In his speech at the opening, Carter reviewed how the DoD has already put some of the knowledge gained into practice. As Carter said, “We took a page straight out of the startup play book by iterating rapidly and then launching DIUx 2.0 with several new features,” he said. “It now reports directly to my office. It has its own contracting capability and budget resources.” This revamped DIUx has a new flatter partnership-style leadership structure led by managing partner Raj Shah. Shah is an F-16 pilot and co-founder of a successful technology startup. Now with the opening of DIUx East in Boston, the DIUx 2.0 is a nationwide system. Raj Shah for his part has reorganized DIUx into three teams. First there’s an Engagement team which not only introduces the military to entrepreneurs but also introduces entrepreneurs to military problems. Defense challenges are some of the most exciting and consequential problems in technology and that’s an attraction for innovators and technologists who want to make a difference in the world. The DIUx also has a Foundry team, which works with technology that’s either still maturing or that might need to be significantly adapted before it can be used. At the heart of that effort are a Warfighter-in-Residence program and an Entrepreneur-in-Residence program. These programs bring together servicemen and women detailed from across the military with top engineers contracted from outside the military for focused design sprints, rapid prototyping and field trials. The third and largest team in the DUIx organization is the Venture team. This team is tasked with identifying emerging commercial technologies and exploring their applicability to potential military and civilian customers across the department. Secretary Carter was careful however to explain the distinct differences between the Ven-


COTS Journal | July 2016

ture team and how a venture capital firm functions. Instead of making equity investments like a venture capitalist would, the Venture team makes R&D awards. But they’re able to work with anyone—from two people in a garage or a dorm room all the way up to mature tech companies. They operate on a co-investment model: On any project that DIUx moves forward with, they aim to match funding and staffing resources with a customer organization within DOD. That way, they can ensure not only that the product meets the customer’s needs, but also that they have a partner to drive post-prototype transition. “With these three teams—Engagement, Foundry and Venture— DIUx 2.0 has a lot to offer our department”, said Carter. Thanks to tech scouting prowess and a deep network within the technology and venture capital community, DIUx has a unique ability to identify and do business with companies outside the DoD’s traditional defense orbit—including many so-called stealth startups that aren’t even officially opened for business yet. This significantly enlarges the defense industrial base and helps existing DoD components who partner with DIUx to locate cutting-edge and best-in-breed technology. Another interesting practice that DUIx 2.0 has put into action is an innovative method for defense acquisition it calls a Commercial Solutions Opening. It leverages expanded acquisition authorities for prototyping that Congress could fund last fall. To start, DIUx posts on their website a particular problem needed to solve that might have a commercially based solution—for example looking for way to quickly scale up production of the 3D printed micro drones under development. Next, any interested company can share information on their technologies and how they propose to solve the problem. And if they’re invited to, they then pitch their solutions to the DIUx partners—using the same pitch deck and short concept papers they use to pitch their venture capital firms or their private sector customers. Once the most promising solution is identified, DIUx can then negotiate and execute fast, flexible, and collaborative awards with the goal to issue funding within 60 days of a first meeting with the company. And later, if the military customer is satisfied and wants to move to follow-on production, they can do so much more swiftly as well. According to the SecDef this is generating results. Within five weeks on the job, Raj and his team developed and launched the Commercial Solutions Opening to begin work on 15 separate prototyping projects. And the first agreement was signed in only 31 days. Impressive stuff, and more proof to me that Ash Carter’s emphasis on technology and innovation is way more than just words.


INSIDE TRACK AM General Awarded $356 Million Contract to Build 1,673 Humvees AM General has been awarded a $356 Million contract to manufacture and deliver 1,673 HMMWVs (Humvees) to the U.S. Government for further delivery to the Afghanistan National Army and Police. Under the terms of the contract, the company will manufacture and deliver 1,259 M1151A1B1 Humvees and 414 M1152 A1B2 Humvees models. Vehicle manufacturing will commence at the AM General Military Assembly Plant, Mishawaka, Ind., later this month, with an estimated completion date of July 2017. According to AM General, as the U.S. Government and foreign countries engage in more rapid, dispersed

and challenging missions around the globe, deployability and readiness are key determinants of success. AM General’s Humvee platform has been the answer for more than three decades, delivering the modular design with unmatched reliability and innovation to achieve the mission. Global demand for new production and remanufactured Light Tactical Vehicles, automotive kits, spare parts and training services is as strong today as ever. AM General South Bend, IN (574) 237-6222

Figure 1 Under the terms of the contract, the company will manufacture and deliver 1,259 M1151A1B1 Humvees and 414 M1152 A1B2 Humvees models.

UEI Hardware and Avionics I/O to Support Apache AH64D Simulator United Electronic Industries (UEI) has announced that its PowerDNA Cube and avionics interfaces have been selected by ZedaSoft, a simulation and visualization software company, who will provide the US Army’s Distributed Test Control Center (DTCC) with an AH-64D Apache simulator (Figure 2). Having won a contract from AI Signal Research (ASRI), ZedaSoft’s simulator integrated with UEI hardware and I/O was the ideal choice to support the US Army’s various aviation and communication system testing activities. ZedaSoft’s Reconfigurable Cockpit System (RCS) will serve as the pilot’s station, while the Reconfigurable Desktop System (RDS) will serve as the co-pilot/gunner


COTS Journal | July 2016

One Stop Systems Announces Merger with Magma Figure 2 The PowerDNA Cube and avionics interfaces have been selected by ZedaSoft who will provide the US Army’s Distributed Test Control Center (DTCC) with an AH-64D Apache simulator. station. ZedaSoft’s Experimenter Operator Station (EOS) will control system testing. The RCS has been customized to an AH-64D realistic configuration which includes a wide variety of robust electronics including touch-screen multi-function displays, MetaVR’s five channel image generator, Simulation and Control Technologies’ control loading system, Bihrle Applied

Research high fidelity flight model and a 120 degree horizontal and 60 degree vertical out-the-window visual display. United Electronic Industries Walpole, MA (508) 921-4600

One Stop Systems (OSS) has announced that it has completed a merger with Mission Technology Group (dba Magma), with OSS as the surviving entity. Both companies are market leaders in PCIe expansion technology used to create high-end compute accelerators and flash storage arrays. Together they become a dominant technology leader of PCIe expansion appliances. Both companies will continue to operate as separate business units with a strong exchange of talent and expertise. The united companies will realize the benefits and cost savings of combined sales, marketing, accounting, and human resources departments, as well as other areas where there are synergies. Steve Cooper will con-



Figure 3 Under the contract, the BAE Systems will manufacture three MIFS Integrated Gunnery Systems (IGS) and one trainer system for the UK Royal Navy. tinue as CEO and President of the combined company while Randy Jones, previously CEO of Magma, will become a major stockholder in One Stop Systems, will serve as a board member and also be appointed Vice Chairman of the OSS Board of Directors. Tim Miller will continue as President of the Magma business unit. One Stop Systems Escondido, CA (877) 438-2724

BAE Systems Wins $245 Million Contract for Type 26 Gun System BAE Systems has received a contract from the UK Ministry of Defence (MOD) to provide the gun system, known as the Maritime Indirect Fires System (MIFS), for the Type 26 Global Combat Ship. Under the contract, the company will manufacture three MIFS Integrated Gunnery Systems (IGS) and one trainer system for the UK Royal Navy (Figure 3). The MIFS IGS includes the 5-inch, 62-caliber Mk 45 Mod 4 Naval Gun System, along with an automated ammunition

handling system, gun fire control system, and qualified ammunition. The contract includes an option for five additional systems for the remainder of the UK Royal Navy’s Type 26 fleet. Work on the contract for the UK Type 26 ships will be performed at BAE Systems’ facilities at Louisville, Kentucky, and Minneapolis, Minnesota, in the US and at Barrow-in-Furness, Frimley, and Glascoed in the UK, with deliveries expected from 2020. The UK Government committed to buy eight of the advanced Type 26 Global Combat Ships in its 2015 Strategic Defence and Security Review, which will in time replace the anti-submarine warfare Type 23 frigates. There is flexibility in the design to allow Type 26 to be upgraded as new technology develops to ensure that it remains relevant to future requirements.

military organizations around the world. This is the 18th task order from a contract ISS was awarded by the Air Force in 2012. Known as Air Space Precision Engagement Research and Engineering (ASPERE), the program called for ISS to provide an advanced software development framework for building intelligence analysis and data fusion software. Under terms of this task order, ISS will continue providing software support and maintenance activities for The United States Central Command, NATO, and operations in the Pacific. ISS will continue providing its expertise with the Combined Information Data Network Exchange (CIDNE) and WebTAS Enterprise (WE), to offer new innovations in key areas such as intelligence analysis and Intelligence Surveillance and Reconnaissance. ISS is performing research, development, integration, testing, demonstration, and operations and maintenance of groundbreaking technologies and concepts in support of the ASPERE effort. Intelligent Software Solutions Colorado Springs, CO (719) 452-7000

L-3’s MX-15D Gear Selected for General Atomics’ Predator XP UAV L-3 Communications has announced that its WESCAM division has received multiple orders from General Atomics Aeronautical Systems (GA-ASI) for its MX-15D electro-optical and infrared (EO/IR) designator systems for an international military customer. L-3’s equipment will support mediumaltitude covert intelligence, surveillance and reconnaissance (ISR) missions carried out by GA-ASI’s Predator XP UAV system (Figure 4). L-3’s imaging systems range in size from 8 inches to 25 inches in diameter and provide highresolution, stabilized full-motion intelligence in support of low-level tactical to high-altitude, ultra longrange persistent missions. Deliveries to GA-ASI in California began earlier this year. Once fielded, the systems will be maintained by one of L-3 WESCAM’s 14 authorized service centers. L-3’s MX-15D has been engineered with large-aperture, long focal length optics and patented four-axis gimbal technology. L-3 New York, NY (212) 697-1111

U.S. Air Force Awards $12.2 Million Contract to ISS Intelligent Software Solutions (ISS) has been awarded a $12.2 million contract from the U.S. Air Force to provide continued software support for a number of

Figure 4 The MX-15D gear will support medium-altitude covert intelligence, surveillance and reconnaissance (ISR) missions carried out by GA-ASI’s Predator XP UAV system.

COTS Journal | July 2016


SPECIAL FEATURE HPEC Systems Leverage Data Center Computing


COTS Journal | July 2016


System and Software Technologies Lead HPEC Charge While opinions vary on the correct definition of High Performance Embedded Computing (HPEC), technology suppliers are rolling out a variety of system and software solutions that are well suited to military embedded applications. Jeff Child, Editor-in-Chief


he true definition of High Performance Embedded Computing (HPEC) is still a bit up for grabs depending on who you talk to. But that hasn’t stopped the interest level in HPEC among military system developers from ramping steadily upward. When you define HPEC as systems with highly dense arrays of GPGPUs—or as data-center level of computing based on server-class Xeon processors and all their support electronics—the desire for high levels of compute density is only increasing. There’s a strong argument that an element of computing virtualization is key for HPEC platforms so that software programs function can massively parallel multiprocessing systems as if they’re on a single processor. The notion of a server-class computing solution on an embedded form factor comprises a popular baseline for what HPEC represents. An example is Mercury Systems’ Ensemble HDS6603 High Density Server (Figure 1). The board is a single-slot, 6U OpenVPX (VITA 46/65) compliant module, the HDS6603 is powered by two 1.8 GHz Intel Xeon E5-2600 v3 processors ( formerly codenamed “Haswell-EP”), each with 12 cores to deliver a total of 1.38 TFLOPS of general-purpose processing power. On-board Gen 3 PCIe pipes feed the module’s switch fabric interconnects, which are managed by dual Mellanox ConnectX-3 devices to deliver 40 Gbit/s Ethernet or InfiniBand inter-module data rates. It is supported by up to 128 Gbytes of DDR4 system memory.

COTS Journal | July 2016



software tool elements are expected to be announced on a regular basis.

U.S. Air Force Example

Figure 1 The Ensemble HDS6603 High Density Server is a single-slot, 6U OpenVPX (VITA 46/65) compliant module powered by two 1.8 GHz Intel Xeon E5-2600 v3 processors, each with 12 cores.

Systems and Software for HPEC A year ago the big story in HPEC revolved around the Intel Xeon processor architecture and specifically the more embedded variant of Xeon, the Xeon-D. The Xeon-D was the company’s first Xeon processor-based system-on-chip (SoC) and several vendors rolled out board-level products based on the m processor, mostly in the OpenVPX form factor. Fast forward to today and the last 12 months in HPEC have included still more Xeon and Xeon-D product roll outs, but the bigger trend has been in HPEC software and systems technologies that have emerged. Exemplifying that trend, last Fall Curtiss-Wright Defense Solutions its OpenHPEC Initiative. The provides HPEC system integrators with access to best-of-class open architecture APIs and tools including a cluster manager, debugger, profiler, and communication and vector math libraries. At the heart of the initiative Curtiss-Wright introduced its OpenHPEC Accelerator Suite. This software development toolset is designed to include a broad and comprehensive array of open standard drivers, middleware and libraries, as well as proven solutions for cluster-wide debugging tools, performance profiling, performance reports, data flow performance analysis, and built-in-test tools, all of which have already been developed and qualified for commercial HPC use. The first elements of OpenHPEC Accelerator Suite toolset were the Allinea Software’s debugging and profiling tools, DDT and MAP, Allinea Performance Reports, and Bright Computing’s Cluster Manager. Additional 12

COTS Journal | July 2016

In an example of the OpenHPEC Accelerator Suite in action, Curtiss-Wright back in March released the successful results of its participation in the US Air Force (USAF)led Next Generation Radar (NGR) Processor Study. Curtiss-Wright demonstrated that its proposed multiprocessor HPEC Radar processing architecture, based on demanding specifications and requirements provided by the USAF, has met the study’s target benchmarks. The goal of the study was to assess the capability of cost-effective COTS hardware and software to perform airborne radar signal processing. Curtiss-Wright ran and optimized the study’s SAR (Synthetic Aperture Radar) and GMTI (Ground Moving Target Indicator) benchmarks on a solution comprised of its OpenHPEC Accelerator Suite development tools, five OpenVPX DSP modules and a 40 Gbps OpenVPX Ethernet switch module. According to Curtiss Wright, the test results are available to customers following request to the factory. The results showed that standard conduction-cooled OpenVPX modules can be used to satisfy the performance requirements to support the synthetic aperture radar (SAR) and ground moving target indicator (GMTI) benchmarks in the most demanding USAF environments.

Core i7 2.4GHz quad core processors. For its part, Abaco System likewise has advanced the software side of its HPEC offerings. Last month the company announced AXIS DataView, an extension its AXIS software development environment. DataView allows customers to rapidly develop graphical user interfaces (GUIs) for their embedded applications deployed on Abaco Systems hardware. It’s ideal for displaying data and adding controls to signal- and image processing applications as well as any system control or communications application. In-house tests performed by Abaco show that, using DataView, a reduction of over 90 percent in the lines of code required to create a typical signal generator GUI or signal processing GUI is achievable when compared with alternative approaches.

Xeon-D Server-in-a-Box While many board-level Xeon-D processing products have emerged over the past couple years, rugged box systems are also using the technology. An example is the SB2002-SW “Blackhawk” from General Micro Systems (Figure 2). The system is a prime example of a deployable, rugged, small form-factor server system based on the Intel Xeon-D processor that put data-center processing performance on the battlefield in a

Suited for SAR and GMTI A recent product from Abaco Systems also aims at SAR and GMTI requirements. Last month Abaco Systems announced its DSP282A 6U OpenVPX rugged multiprocessor with 40 Gbit Ethernet. The DSP282A is designed to fulfil the requirements of very large radar systems such as SAR) and GMTI where minimal latency is essential for operational effectiveness. 40 Gigabit Ethernet on the backplane allows data derived from multiple high resolution sensors to be moved to the processor and then output as meaningful, actionable information in the minimum possible time. Designed for systems deployed in the most challenging environments, the DSP282A delivers up to 665.6 Gigaflops of throughput per card slot as well as supporting advanced 3D graphics. The DSP282A features dual 5th generation Intel

Figure 2 Tthe SB2002-SW “Blackhawk” is a rugged switch/router, which packs up to 16 CPU cores, 20 managed/Ethernet ports, 64 Gbytes of RAM, removable storage, Embedded Services Router software from Cisco, and high-level security features.

A46_CotsJrnl_2-25x9_875V8_A45.qxd 5/24/16 9:28


gedized technologies in a compact 3U blade footprint. Based on parallel virtual machine (VM) execution that can leverage operational efficiencies provided by isolated workloads configured to dynamically share common resources, server virtualization is possible outside IT rooms by using platforms such as StarVX. (For more on the StarVX, see Kontron article on p.XX of this issue.)

FPGA Clusters for HPEC

Figure 3 With eight Xilinx UltraScale FPGAs, the TeraBox offers 44.16 TeraMAC/s of processing power, up to 4.9 Terabits/s of memory bandwidth, and up to 3.2 Terabits/sec of I/O all in a turnkey rackmount solution.

non-rackmount solution. The SB2002-SW “Blackhawk” rugged switch/router, which packs up to 16 CPU cores, 20 managed/ Ethernet ports, 64 Gbytes of RAM, removable storage, Embedded Services Router software from Cisco, and high-level security into a seven-pound box that operates as low as 75W. According to GMS, future “Server Room in a Box” products will include multiprocessors, image processing, extended storage, and more. As with its previous box-level systems, GMS builds its multi-tier modular designs with a processor tier and an I/O tier, onto which additional processors and I/O modules can be added, and then incorporates storage, accessories, and legacy interfaces. That enabled GMS engineers to quickly introduce the Xeon D-based family, which incorporates the company’s RuggedCoolSM system yielding a conduction-cooled, sealed chassis capable of operating at extreme temperatures (–40°C to +85°C) at unthrottled CPU speed. Kontron’s latest system-level HPEC solution, released last Fall, is the StarVX based on the company’s VX3058 3U VPX SBC. Leveraging the advanced 8-core version Intel Xeon D-1540 (Broadwell DE), the StarVX packs server-class silicon and highly rug-

Clever use of FPGAs is another effective way to achieve meet HPEC requirements for military system designers. An example is BittWare’s TeraBox—a high-performance FPGA platform ideal for network/packet processing and high performance computing (HPC) applications. Featuring up to eight Xilinx UltraScale FPGAs, the TeraBox offers 44.16 TeraMAC/sec of processing power, up to 4.9 Terabits/sec of memory bandwidth, and up to 3.2 Terabits/sec of I/O – all in a turnkey rackmount solution. The TeraBox system arrives tested and configured, and includes complete development software support with BittWare’s BittWorks II Toolkit, allowing users to immediately focus on developing their specific application. The TeraBox features up to eight BittWare PCIe boards based on the Xilinx UltraScale FPGAs. The FPGAs on these PCIe boards provide a system total of up to 18 million logic elements (VU190) and 44,160 DSP slices (KU115).

Achieving Petaflops Performance While some use the terms high performance computing (HPC) and high performance embedded computing (HPEC) interchangeably, there is subset of demands where the emphasis is on performance over extreme battlefield-levels of raggedness. In the HPC realm, solutions are beyond Teraflop and now into the Petaflops range. Along such lines, late last year One Stop Systems (OSS) introduced the OSS GPUltima Petaflop compute platform in a single rack. The OSS GPUltima supports up to 128 doublewide interconnected accelerators. Consuming only 56 kW of power, the platform uses 94 percent less power than other Petaflop solutions. The OSS GPUltima employs 64 OSS PCIe Gen3 x16 adapters and cables between the OSS servers and the OSS High Den-

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sity Compute Accelerators (HDCA), each containing 16 high-performance NVIDIA Tesla K80 GPU accelerators and 32 Mellanox EDR 100Gbs InfiniBand adapters and cables connecting the GPUs through a 36port InfiniBand switch. One Stop Systems’ PCIe expansion systems provide high speed connectivity between the CPU and IO cards. While IO cards have traditionally occupied

slots in the server cabinet, OSS designs expansion appliances that support large numbers of high speed cards with latest technology PCIe Gen3 slots, efficient cooling, and sufficient power. Last month One Stop Systems announced that GPUltima product line will employ Bright Computing’s HPC Cluster Manager software.

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SPECIAL FEATURE HPEC Systems Leverage Data Center Computing

Applying HPEC and Deep Learning Tech to Defense Systems Mark Littlefield, Vertical Product Manager, Defense Dr. Mohamed Bergach, System/Software Architect Kontron


eep learning is an increasingly popular approach to processing very large data sets. Many high-visibility projects involved with image processing and data mining such as Google’s Car, Brain and AlphaGo projects, as well as the US Department of Homeland Security’s Synthetic Environment for Analysis and Simulations (SEAS) project to predict and evaluate future events and courses of action rely on deep learning techniques. While deep learning methodologies are not exactly new, the processing power needed for such complex applications is finally becoming small and low-power enough for packaging into embedded systems.

History of Deep Learning Modern deep learning approaches evolved out of research into perceptrons and neural networks performed in the 1970’s and ‘80’s, which attempted to leverage structures found in biological systems for processing tasks such as feature extraction. Systems that use deep learning (sometimes referred to as deep neural nets (DNNs)), use multiple and up to thousands of levels of processing layers and non-linear transforms to tease information or patterns from large or even enormous data sets. These systems are characterized by the system “learning”—either supervised or unsupervised— through iterative parameter optimization. Another feature of deep learning systems is 16

COTS Journal | July 2016

Figure 1 HPEC technologies have been developed and honed over the years on classical HPEC problems such as radar and signal intelligence (SIGINT) applications.

that they tend to form a feature hierarchy, with earlier processing layers representing low-level features, and progressing towards higher-level features in the deeper layers. Thus, they generally benefit from having additional processing added to the transformation chain. Applications for deep learning include such diverse problems as computer vision, natural language processing, pattern recognition, navigation and route planning,

and in the case of Google’s AlphaGo, defeating humans at board games. With the current embedded defense systems trend for greater operational autonomy, integrators are drawn to the recent breakthrough performance achieved by deep learning approaches and their ability to produce highly reliable autonomous decisions based on huge data sets. In the early days, the copious amounts of processing needed for such computing archi-


tectures made them impractical for any sort of real-time application. That has all changed due to the number crunching capabilities available today with the latest very large FPGAs, power-efficient graphics processor units (GPUs), and advanced SIMD processing units tied to flexible multi-core processors. These advances make it possible now to apply deep learning algorithms in the military’s SWaP-constrained high-performance embedded computing (HPEC) space.

The Role HPEC Plays Deep learning applications can leverage technologies such as high-speed switched serial links, rugged standardized form factors, and HPEC middlewares that have been developed and honed over the years on classical HPEC problems such as synthetic aperture radar (SAR) and military signal intelligence (SIGINT) applications (Figure 1). The challenge for the system integrator, therefore, is to define how deep learning algorithms can be applied to solve their particular problem. Subsequently, the

challenge for the supplier base is to tailor and refine their HPEC-based platforms to ensure that they are well adapted to deep learning types of applications. Any signal (observation) coming from sensors (image, sound, GPS position, RADAR, etc.) can be represented in an abstract way as features (shapes, corners, patterns, etc.). In DNNs, each layer of the network processes this data based on a particular type of feature and gives the result to the next layer (Figure 2). The beauty of this approach is that it can be applied to a wide range of problems with impressive results (sometimes better than human handcrafted solutions) such as for face recognition, image registration, natural language processing, fraud detection and so on. All the processing is based on computing dot-products (a convolutional neural network, or CNN) and requires a huge amount of computation, especially for training the network. The training or learning phase is the stage where one supplies the deep neural network with a large number of data to search for optimal settings of the

convolutional weights in order to minimize the error of the network. This phase is timeconsuming and requires many rounds of optimization to reach global minima. For that reason, the learning phase is typically performed in datacenters under continual 24/7 operation. Then, a snapshot is taken of the network with each training result and is deployed on the actual embedded HPEC system for testing. This process is repeated with the expectation that the next snapshot will respond better than the previous one. The processing needed for running DNN is similarly quite large, but dependent on relatively simple multiply/add operations known as multiply/accumulate (MAC) or fused multiply/accumulate (FMA) if they can be performed simultaneously.

Performance-Intensive Processing An ideal platform for this task is available today with the Intel Xeon Processor D-1540 (Broadwell DE) processor which contains 16 cores, with each core having two AVX2 units. Each AVX2 unit can process 8 floating point FMA operations at a

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SPECIAL FEATURE time. Thus, with 16 cores one can perform 512 floating point operations with each clock cycle. Using this amount of processing power available per processor, military program developers can build a modular HPEC system suitable for a wide range of deep learning applications. This is especially true using VPX-based boards and platforms that can deliver high-speed/low-latency communication via the backplane with PCIe Gen3 or 10Gbit Ethernet links. Another benefit of using Intel architecture is to ensure binary compatibility with each generation of Intel architecture 64-bit processors to keep software investments safe from any future incompatibilities. Defense systems could also use the recently announced Intel Xeon Phi co-processors (Knights Landing containing 72 cores, each with two AVX-512 units processing 16 FMA operations per clock. Intel has also announced a future Xeon chip that contains a multicore CPU tightly integrated with an FPGA that shares some levels of memory. This has the potential to be an ideal architecture for deploying deep learning algorithms on HPEC systems. For the CNN example, this solution allows the specialized part of the algorithm to be synthesized on the FPGA, while the more general purpose functions of the deep learning application


COTS Journal | July 2016

Figure 2 In Deep Learning a snapshot is taken of the network with each training result and is deployed on the actual embedded HPEC system for testing. This process is repeated with the expectation that the next snapshot will respond better than the previous one.

can be deployed to the CPU cores. In addition, OpenCL is quickly becoming the go-to standard for heterogeneous computing. It provides a rich and expressive API for managing data flow and computational objects. OpenCL also helps to ensure portability of the source code over different

platforms like GPUs, CPUs, and FPGAs. Altera (now Intel) produced the first, and what many would argue is the best, compiler for OpenCL to VHDL (FPGA). It closes the code productivity gap that has stubbornly remained open for decades in the FPGA world. Now, developers and system integrators can



write code once and, with relatively minor adjustments, it can be ported from a CPU to an FPGA or GPU. As a result, OpenCL is an increasingly popular middleware choice for deep learning applications.

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Handling Voluminous Data Many defense-related real-time applications could benefit from the application of deep learning techniques. As the trend in defense systems is towards greater application autonomy, and as deep learning techniques tend to be most useful for pattern recognition tasks such as natural language processing and image feature detection, it makes logical sense that deep learning could be successfully applied for on-platform processing of streaming signal or image data. These systems would have the powerful capabilities to sift through voluminous streams of data looking for either signals or targets of interest. It would allow them to even hunt for threats and autonomously deploy active protection systems. The increasingly congested terrestrial spectrum and satellite bandwidth in military areas of operation will further drive the need for smart autonomy, and thus make the application of deep learning techniques in defense systems a more popular and useful proposition. Defense applications can leverage tools previously applied to large signal and image processing applications such as synthetic aperture radar, real-time signal intelligence collection and classification, and highaltitude surveillance platforms like Global Hawk for new deep learning applications. By applying 10s or even 100s of processors, which may themselves be massively parallel processors such as GPUs or FPGAs, along with high-speed mesh fabrics and middlewares such as OpenCL and OpenMP to facilitate low-latency interprocessor communications and thread synchronization, one can realistically expect to be able to implement deep learning algorithms hundreds or even thousands of stages deep while maintaining real-time levels of performance and latency. While it is still in the early days for deep learning in defense real-time systems, it is completely possible today to leverage existing technology solutions. One example is Kontron’s StarVX HPEC system based on

Figure 3 The StarVX HPEC system provides 10 times greater performance than currently deployed ruggedized HPEC architectures while also reducing footprint via server virtualization.

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the company’s VX3058 3U VPX single board computer (Figure 3). This high performance VPX computing node leverages the breakthrough processor performance capabilities of the advanced 8-core version Intel Xeon Processor D-1540 (Broadwell DE).

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COTS Journal | July 2016


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Jeff Child, Editor-in-Chief

JEFF’S PICKS AMC Module Does 56 GSPS A/D Conversion and FPGABased Signal Analysis


n the past couple years especially, MicroTCA and ATCA have seen resurgence in military applications. Tied together by the well-established ecosystem of AMC modules, MicroTCA and ATCA offer costeffective solutions for SWaP-constrained (MicroTCA) or performance-intensive (ATCA) military systems, particularly those with a comms or networking focus. Among ATCA’s great strengths is that there’s no alternative aside from ATCA for a large-sized board form factor—larger than 6U slot card boards. As a result ATCA shines in military applications where compute density and raw performance are top priorities. In contract VME and CompactPCI are suited for managing heavy I/O, but their form factors offer limited networking and processing capability. Meanwhile, MicroTCA for its part is probably best looked at in contrast to OpenVPX. MicroTCA and OpenVPX offer close to the bandwidth/throughput capability of ATCA, but are smaller and more “embeddable”. But as a rule of thumb MicroTCA is close to half the size, weight, and cost of OpenVPX. And because power is applicationdependent, it can be argued that MicroTCA wins the Size, Weight and Power (SWaP) game. Other advantages of MicroTCA include an architecture that’s interoperable from the ground, has inherent system management/ reliability, FRU identification and dedicated SAS/SATA signals for storage, electronic keying. Moreover, the fact that MicroTCA is based on the AdvancedMC module or AMC is a huge plus because AMC has also been 20

COTS Journal | July 2016

with a Xilinx UltraScale XCKU115 FPGA and 24 Gbytes total memory. The module self-calibrates to maintain specified performance. With an analog input bandwidth up to 15 GHz the module uses extremely low loss PCB material to minimize signal degradation between the connectors and the ADC.

Flexible Sampling Selection Figure 1 Jeff’s Pick this month is the AMC590 from VadaTech. It features a Fujitsu MB8AC2070 8-bit ADC to provide 56 Gsample/s performance paired with a Xilinx UltraScale XCKU115 FPGA and 24 Gbytes total memory.

adapted for use in other architectures and in custom systems. For this month’s Editor’s Pick section COTS Journal evaluated several MicroTCA, ATCA and AMC products on three aspects: technology leadership, design innovation and market relevance. Given that AMC is used in both MicroTCA and ATCA it’s not surprising perhaps that the winning product is an AMC board. This month’s Jeff ’s Pick is the AMC590 from VadaTech (Figure 1). This AMC board sports a Fujitsu MB8AC2070 8-bit ADC to provide 56 Gsample/s performance in an embedded modular architecture. This allows the implementation of extremely fast, highresolution ADCs in CMOS process technology. The data acquisition front-end is paired

The design innovations that stand out on the AMC590 include the product’s flexible sampling selection, with 1 x 56, 2 x 28, or 4 x 14 Gsample/s channels. With a Xilinx Kintex UltraScale FPGA for on-board signal analysis, the AMC590 features 48 high speed serial lanes between the ADC and FPGA to support full data bandwidth. VadaTech also provides users with royalty-free VHDL to kick-start application development and reduce time-tomarket. The product fits nicely with the trend toward military system developers increasing demand for SWaP-optimized solutions. According to Vadatech, the AMC590 addresses this need by achieving a market-leading ADC sample rate in a compact modular architecture. Adding to the unit’s flexibility is its low power consumption, with the ADC requiring just 5W. The wide input bandwidth and extremely high sampling rate make the module appropriate for the most demanding signal capture/analysis tasks. Vadatech Henderson, NV (702) 896-3337

...and the Runners Up Xeon-E5-Based ATCA Blade Delivers 1.38 Teraflops of Processing The Ensemble HDS8613 high density server (HDS) from Mercury Systems is a next-generation secure AdvancedTCA blade with dual 12core Intel Xeon-E5 processors, the same processors found in the most powerful data centers (Figure 2 bottom board). The blade is equipped with native Advanced Vector Extensions 2 (AVX2) and full Intel Quick Path Interconnect (QPI) with the support of up to 128 Gbytes of DDR42133 SDRAM to deliver a combined 1.38 Teraflops of general-purpose processing power that is supported with 40 Gbit Ethernet or InfiniBand high bandwidth fabric interfaces. The board is more rugged than other AdvancedTCA blades and system integrity is assured with pre-integrated, private and personalized built in security. With the ability to support any standard AMC module with ease, the board is both powerful and configurable, with the ability for user customization built in. The Mercury’s ATCA Ensemble portfolio of products supports the DoDs’ Better Buying Power requirements for open system architectures, affordability and exportability. As the tactical cloud processing marketplace yields to globalization, this designed and made in the USA approach is the next logical next step in evolving modular open system architectures to meet massive secure processing requirements. The Ensemble HDS8613 is ideally suited to advanced radar, complex multisignal processing applications; complex coordinated and distributed military networks.

Figure 2 The Ensemble HDS8613 high density server (HDS) is a secure ATCA blade with dual 12-core Intel Xeon-E5 processors. The board has full Intel Quick Path Interconnect (QPI) with the support of up to 128 Gbytes of DDR4-2133 SDRAM.

Mercury Systems, Chelmsford, MA (978) 967-1401.

1U, 6-slot, MicroTCA Chassis Features PCIe Gen3 Backplane Pixus Technologies has introduced the PXS0108, a 1U, 6-slot, low cost, data-grade MicroTCA chassis (Figure 3). The PXS0108 is a versatile MicroTCA chassis with enhanced ruggedization options are available for defense applications. The unit has an active backplane that alleviates the need for expensive Power Modules (PMs). The backplane provides a power manager for each slot that controls and limits the management and payload power to the maximum allowed. Pixus has upgraded the backplane to PCIe Gen3 speeds, which is faster than most in the market. Most are typically Gen 2. The versatile design allows one PSU or two (AC or DC), one MCH slot or two, mid-size modules (4HP) or full-size modules (6HP). The 1U form factor MicroTCA variant is compact, but also very versatile allowing users to use any standard MCH. The chassis’ push/pull cooling is very good at up to 60W/slot typical. The Pixus 1U MicroTCA chassis is particularly suited for development and prototyping because its small size and low cost. At the same time it’s also powerful and capable for deployed applications and designed for today’s PCIe Gen3 cards. MicroTCA is typically a little more than 1/2 the size and weight of VPX solutions.

Figure 3 The PXS0108 is a 1U, 6-slot, low cost, data-grade MicroTCA chassis. Its backplane provides a power manager for each slot that controls and limits the management and payload power to the maximum allowed. The backplane has been upgraded to PCIe Gen3 speeds.

Pixus Technologies, Waterloo, Ontario Canada. (519) 885-5775.

COTS Journal | July 2016


Check Out These Rugged Display Products Too… ADLINK Technologies’ ATCA carrier-grade product, the aTCA-9710, features the dual 12-core Intel Xeon processor E5-2600 v3 ( formerly codenamed “Haswell-EP”) paired with the Intel Communications Chipset 8920 series ( formerly codenamed “Grantley”). ADLINK Technology, San Jose, CA (408) 360-0200.

Advantech’s MIC-5345 is a 40G dual processor ATCA blade based on the Intel server platform formerly codenamed “Grantley”. Up to 512 Gbyte memory capacities allow users to harness the full capabilities of the Intel E5-2600v3 series processor.

Integrated Rack Level Systems Elma integrates 19” COTS components from Cisco, Dell and others into our equipment racks, providing fully configured and tested turnkey systems. As your single source supplier, Elma provides component life cycle management, documentation, spares support and design services.

Advantech, Irvine, CA (949) 519-3800.

Artesyn Embedded Technologies has a packet processing and high performance server blade, the ATCA7490, based on the recently announced Intel Xeon processor E5-2600 v4 as well as the Intel FM10840 high-performance Ethernet switch. Artesyn Embedded Technologies, Tempe, AZ (888) 412-7832.

Elma Electronic’s MicroTCA carrier hub (MCH) card is equipped with fiber-optic technology enables connection to PCs at a distance of up to 150 meters. The Elma-MCH solves heat problems by transferring data from the MicroTCA.4-crate via fiber-optic connection to a conventional PC. Elma Electronic, Fremont, CA (510) 656-3400.

Pentair has enhanced its Schroff 12-slot MicroTCA.4-System with new features. The new White Rabbit clock module on the MCH along with two White Rabbit receivers generates every type of clock and trigger signal phase-locked to White Rabbit sources located in the network. Pentair Technical Solutions, Warwick, RI (401) 732-3770


COTS Journal | July 2016

The ATCA-4700 from Radisys is a 10th generation, high-performance, single-slot compute blade based on the dual socket E5-2600 v3 Intel Xeon processors with 8 VLP DIMM sockets. The module is ideal for Deep Packet Inspection (DPI), packet processing and video optimization applications. Radisys, Hillsboro, OR (503) 615-1100.

The TAMC261 from TEWS Technologies is a standard Mid-Size/Full-Size AMC.1 (PCI-Express) and MTCA.4 compliant carrier for one single-width PMC module. The card upgrades well known legacy PMC I/O solutions to the high performance AMC form factor. TEWS Technologies, Reno, NV (775) 850-5830.

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SYSTEM DEVELOPMENT Safety Critical and Mission-Critical Software

Security/Safety Analysis Tools Smooth Path to MISRA-C Compliance MISRA C compliance standard and its new security amendment helps provide the assurance of protection from attack. Multiple analysis approaches are needed for complex systems. Jay Thomas, Director of Field Engineering Chris Tapp, Field Applications Engineer, LDRA


oday’s military embedded systems are increasingly rich in functionality while existing on small, low-power multicore processors that are almost universally connected to the Internet of Things. These applications are vital for the operation of military systems both on the ground and in aerospace operations, making them critical for the safety of their operators and the general public as well as for the success of the mission. For these reasons, the requirements for safety, reliability and security are interdependent. These requirements must be followed and adhered to, and often they must also be proven and certified. In the case of military systems, this means adherence to and certifiablity of compliance with DO-178C, which the FAA describes as an, “acceptable means, but not the only means, for showing compliance with the applicable airworthiness regulations for the software aspects of airborne systems and equipment certification.” (Figure 1). While DO-178C does not specify software security and is not itself a coding standard, it does require that a coding standard be used. The most attractive and up-to-date C coding standard is that developed for the automotive industry by the Motor Industry Software Reliability Association (MISRA), which is a subset of the C language for developing applications with high integrity and high reliability requirements called MISRA 24

COTS Journal | July 2016

Figure 1 Avionics systems of military and commercial aircraft alike must meet stringent safety and security requirements. The MISRA C language helps ease work toward making such systems certifiable. C. MISRA guidelines aim to facilitate code safety, security, portability and reliability in the context of embedded systems. Recently, MISRA-C: 2012 has been enhanced to ensure greater security for embedded systems in general. This push recognizes that while software may be functionally correct and reliable, it is neither safe nor reliable if it is vulnerable to outside attack.

MISRA Security Enhancements The MISRA coding standard is a great help for developers trying to avoid errors

and oversights that can quickly compromise security and safety. Closely adhering to them is a vital necessity and they must be part of the design process from the very beginning. They cannot be brought in as an afterthought. Automated tools are a necessary and important element to help programmers follow such guidelines as well as certify that the code is compliant with the safety and security provisions of MISRA C and other standards. Because the software running these systems is also incredibly large and complex,


Figure 2 Code verification, static analysis, dynamic analysis, and unit testing and integration serve the goals of safety and security, standards compliance and requirements traceability.

even one coding error can bring down an entire system or allow access to malicious hackers. The well-publicized Heartbleed vulner-

ability is a case in point. A seemingly minor error failed to verify the length of a specific piece of data and allowed hackers access in the “heartbeat” of the SSL exchange that takes place prior to encryption and normal data exchange. The hackers took advantage of this lack of verification to specify a very long piece of memory to be returned. By doing this repeatedly, they were able to pull over practically all the data on the server as cleartext and analyze it to gain access to millions of customers’ personal data. It is not a leap to imagine the effects such an error could have in a military context.

Variety of Standards To address this, the software world and various industrial segments have developed standards specifications for coding practice, security and functional safety, which, if adhered to, do indeed go a long way toward providing the needed assurance and protection. Standards such as CERT C, MISRA C, CWE, ISO26262, DO-178C and others address standard coding practices, security

and safety. Approaches such as automated requirements traceability can aid in the generation of tests for these things both automatically and for manually created tests. MISRA C, for example, is designed to eliminate unsafe and insecure coding practices and undefined behaviors that can lead to exploitable vulnerabilities and unreliable applications. There is a pressing need for systems to be impenetrable whether from IT-based hackers or from devices and equipment under the control of those with malicious intent. It is also important to guard against the unintentional exposure of code that could end up in unpredictable places, including a misplaced mobile device. MISRAC: 2012 has 142 rules that can be checked using static analysis tools and 16 directives, which are somewhat more open to interpretation. The recent 2012 Amendment 1 adds 13 rules and 1 directive aimed specifically at security concerns. However, these standards specifications are themselves very complex and quite

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COTS Journal | July 2016



detailed so that a human programmer alone cannot be expected to thoroughly comply with them, nor could he/she prove compliance to an outside person or agency. For this they must have the help of automated tools. An automated tool suite that incorporates standards including CERT C, MISRA and others for use in static analysis can help developers identify and correct coding er-

rors and also certify compliance with the functional standards. DO-178C, for example requires that for certification, verification must be done by someone other than the person who authored the item. Beyond that, the tools are also needed to perform extensive foundational tests that are based on static analysis, dynamic coverage analysis and unit/integration testing.



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COTS Journal | July 2016

The ideas that wrap around this suite of testing tools are the need to assure both security and functional safety, compliance with the standards mentioned above, and the ability to trace requirements from the requirements document down into the code and to trace from the code back to the individual requirements (Figure 1).

Secure from the Start In assuring security, static and dynamic analysis often go hand in hand, since one of the main concerns of security is data and the other is control. The questions include: “Who has access to what data? Who can read from it and who can write from it? What is the flow of data to and from what entities and how does access affect control?” Here the “who” can refer to persons such as developers and operators—and hackers—and it can also refer to software components either within the application or located somewhere in a network architecture. On the static analysis side, the tools work with the uncompiled source code to check the code against the selected rules, which can be any combination of the supported standards as well as any custom rules and requirements that the developer or a company may specify. It can also look for certain types of software constructs that can compromise security as well as check memory protection such as determining who has access to which memory and by tracing pointers that may traverse a memory location. Results are presented in graphical screen displays for easy review and assessment to assure coding standards compliance. Dynamic analysis tests the compiled code, which is linked back to the source code using the same type of symbolic data used by source level debuggers. Dynamic analysis, especially code coverage analysis, requires extensive testing. Often developers may be able to manually generate and manage their own test cases. This is the typical method of generating test cases—working from a requirements document. And they may stimulate and monitor sections of the application with varying degrees of effectiveness. But that will probably not be enough to achieve certain required certifications. If the coverage analysis requirements include statement or branch/decision coverage, procedure/function call coverage,


or in more rigorous environments, MC/DC coverage, that can often require both source and object code analysis and the need to automate test generation as well as a means of measuring the effectiveness of the testing. Security requires rigorous and thorough test for functional vulnerabilities as well as for adherence to the MISRA C rules and directives in the running application. The latter depends on automatic test generation for completeness.

Benefits of Static Analysis Automatic test generation is based on the static analysis of the code—in other words: before compilation. The information provided by static analysis helps the automatic test generator create the proper stimuli to the software components in the application. In addition, functional tests can be created manually using the requirements document. These should include any functional safety tests such as not letting a robot arm swing into an area that might endanger humans.

Figure 3 It’s important that every low-level requirement can be traced back to a high-level requirement ensuring bidirectional traceability. This means tracing every requirement down to the source code that implements that requirement.

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COTS Journal | July 2016


SYSTEM DEVELOPMENT One of the things that static and dynamic analysis can reveal is areas of “dead code,” which can possibly be a source of danger or may be just inconveniently taking up space. It is necessary to properly identify such code and deal with it—usually by eliminating it. This is important for a number of reasons. First, although it is ideal to start implementing security from the “ground up,” most projects include pre-existing code that may not have been subjected to the same rigorous testing as the current project. These may contain segments that are simply not needed by the application under development. More ominously, areas of “dead” code may be lying in wait to be activated by a hacker or some obscure event in the system for malicious purposes.

Two-Way Requirements Traceability

Of course, there is the need to distinguish between truly dead code and seldomused code. This is one good reason why it is important to have two-way requirements traceability—to be able to check that requirements are met by code in the application, but also the ability to trace code back

to actual requirements from the actual code. If neither of those routes shows a connection, the code pretty definitely does not belong there (Figure 2). Static analysis, therefore, functions to analyze source code for proper programming practices and also to help dynamic analysis set up for coverage testing, functional testing, control, and data flow analysis. The latter is essential in order to highlight and correct potential problem areas and produce software quality metrics. Companies developing to comply with stringent industrial or medical standards may be required to demonstrate analysis of data flow and control flow coupling for software certification. In the case of DO-178C, verification is required at the object level. For example, an optional tool in the LDRA tool suite Version 10 called TBobjectBox provides object code verification (OCV) capability, as described in DO-178B/C. This offers a direct way to relate code coverage at the source code level with that achieved at the object code level. The tool also provides the mechanism to extend the code coverage at the object code level where necessary. This can be especially helpful for certification at DO-178C Level A, where a software failure could be catastrophic—such as result in loss of aircraft and/or loss of life.

Much of this gets started well before the target hardware is available. The development can start on the host OS environment or on a target that is simulated on the host, and ultimately on the actual target hardware. Analysis tools need to provide the means to perform functional testing, as well as static analysis at the unit and integration levels on the host as well as on the target hardware when it becomes available. Developers can perform test generation (test harness, test vectors, code stubs) and resultcapture support for a wide range of host and target platforms. This means that moving from workstation to target and integrating components developed by different team members can come together in the larger system configuration with a major part of the requirements, test generation, coverage analysis, data and control flow work already underway. In order for systems to be safe, they must also be secure. For that, they must be coded to comply not only with language rules but also to adhere to the standards that assure safety and security. And this must all be verifiable, which means the ability to trace the flow of data and control from requirements to code and back again.

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COTS Journal | July 2016

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OpenVPX Community Churns Out Standards and Solutions Now entrenched as a critical technology for high-performance military systems, OpenVPX continues to expand in terms of product choices and standards activities. Standards work in the past several months provide new solutions for RF designs and system cooling. Jeff Child, Editor-in-Chief


ith its acceptance now past any doubt, OpenVPX has secured its place as the de-facto embedded slot-card open architecture highbandwidth, data-intensive military applications. Fueled by an every growing ecosystem of vendors, OpenVPX is furthered bolstered by an active standards body in VSO (VITA Standards Organization) that’s done a lot of work over the last 12 months. Over the past year there’s been a lot of standards and interoperability activity around OpenVPX. Add to all that a continuous wave of new generation OpenVPX products keeping its place as one of the most active product category in our market in terms of new product releases. In October VITA got a significant new sponsor member: the U.S. Army’s Communications-Electronics Research, Development and Engineering Center (CERDEC). CERDEC is developing the U.S. Army’s Modular Open RF Architecture (MORA) which will enable the development of true open standardsbased RF and microwave modules and smallform factor subsystem designs that address the size, weight, and power consumption (SWaP) constraints of today’s ground vehicles. MORA is based on OpenVPX. MORA-based hardware and software solutions developed by VITA member companies are expected to enable enhanced C4ISR/EW capabilities to exist within the SWaP constraints of plat30

COTS Journal | July 2016

Figure 1 3U VPX Power Architecture Core i7 SBCs will be used within the Electronic System Computer Unit that will control the Royal Navy’s Spearfish Heavyweight Torpedo.

forms and provide subsystem commonality across the vehicle fleet to reduce life cycle costs. In other standards activity, in January VITA announced the formation of a working group that is developing an air flow through (AFT) cooling standard, VITA 48.8, for use in size, weight, power and cost (SWAP-C) constrained 3U and 6U VPX module-based systems. VITA 48.8 is expected to achieve weight and cost reduction for AFT cooling by eliminating the use of wedgelocks and ejector/injector handles. The resulting open standard will be the first to bring AFT cooling to 3U form factor VPX modules. It will also help re-

duce weight and cost for cooling high density, high power dissipation 3U and 6U module based systems. Because VITA 48.8 does not use module-to-chassis conduction cooling, it also promises to help drive innovative use of new lightweight plastic or composite material based chassis. The VITA 48.8 Working Group is chaired by Curtiss-Wright Defense Solutions, with Lockheed Martin serving as the standard’s editor. The working group has set a goal of submitting the finalized VITA 48.8 draft for ANSI ratification later in this year. Even though actually formally announced design wins of OpenVPX seem scant, vendors say there are happening with greater frequency. An example was back in January with Abaco Systems announcing it had secured orders with an initial value of £7.5 million (around $11.5 million) from BAE Systems Maritime Services business in the UK. Abaco’s 3U VPX Power Architecture and 4th generation Intel Core i7 technology SBCs will be used within the ESCU (Electronic System Computer Unit) that will control the Royal Navy’s Spearfish Heavyweight Torpedo in deployment, providing advanced real time signal processing of the Spearfish’s onboard sonar to enable it to reach its intended destination, and networking to allow communication between the torpedo and the host submarine (Figure 1).


OpenVPX SBCs Roundup

Core i7 SBC with 40 Gbit Etherent Aims at Very Large Radar Systems

Conduction-Cooled 3U VPX Blade Sports Xeon Processor D-1500

QorIQ-based 3U VPX SBC Leverages PowerPC AltiVec Performance

Abaco Systems’ DSP282A is a 6U OpenVPX rugged multiprocessor with 40 Gbit Ethernet. It is designed to fulfil the requirements of very large radar systems such as synthetic aperture radar (SAR) and ground moving target indicator (GMTI). 40 Gbit Ethernet on the backplane allows data derived from multiple high resolution sensors to be moved to the processor and then output as meaningful, actionable information in the minimum possible time.

The ADLINK Technology’s VPX3010 Series is a rugged, conduction-cooled 3U processor blade featuring the Intel Xeon Processor D-1500 Product Family. The design of the VPX3010 conforms to numerous VITA standards, including the VITA 46.0 VPX Base Standard and VITA 65 OpenVPX architecture framework for VPX. Soldered SLC NAND flash 32 Gbyte SATA 6 Gbit/s storage comes standard, with expansion options available using an RTM.

The 3U VPX C912 from Aitech Defense Systems combines NXP’s latest generation T4 series of QorIQ SoC multicore e6500 processors with AltiVec along with extensive on-board I/O features. Each e6500 core supports two hardware threads that appear to the application software as virtual CPUs and features a dedicated AltiVec vector execution accelerator allowing up to 16 complex math operations per clock cycle per core.

• Single slot 6U VPX single board computer.

• Intel Xeon Processor D-1500 SoC up to 12 cores ( formerly "Broadwell-DE").

• Dual 5th Gen Intel Core i7 i7-5700EQ quad-core processors.

• DDR4-2133 soldered ECC SDRAM up to 16 Gbytes.

• Two channels of DDR3L SDRAM up to 16 Gbytes each.

• One 10GBASE-KX4, up to three 1G Ethernet ports.

• Up to 16 Gbytes SATA NAND flash.

• Up to PCIe x16 Gen3 interface supporting non-transparent bridge.

• 40 Gbit Ethernet fabric over the backplane; I/O: Audio, GPIO, SATA, and USB. • Configurable security hub FPGA; Intel Trusted Execution; Intel ES new instructions). • AXIS and deployed test software. Abaco Systems Huntsville, AL (866) 652-2226

• One XMC expansion slot, PCIe x8 Gen3 with Rear I/O to P2. • Extended temperature range of -40 to +85 degrees C is supported. ADLINK Technology San Jose, CA (408) 360-0200

• Rugged 3U VPX Single-Slot SBC. • NXP QorIQ Multicore SoC with up to 8 e6500 Cores and Altivec Unit. • PCIe and 10G (XAUI) Fabric Options. • 4 Gbytes DDR3 with ECC; 128 Mbytes NOR Flash Memory; 16 Gbyte SATA flash drive. • Board I/O includes XMC Slot, USB, Serial, GbE, SATA and Discrete. • OpenVPX Compliant; 2LM Option per VITA 48.2. • Conduction and Air-Cooled Versions; Vibration and Shock Resistant. Aitech Defense Systems Chatsworth, CA (888) 248-3248

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OPENVPX SBCS ROUNDUP Links to the full data sheets for each of these products are posted on the online version of this section.

OpenVPX Core i7 SBC Provides BuiltIn Video Capture

3U VPX Server Board Targets Clustering and Storage

Rugged Dual GPGPU OpenVPX Module Boasts 5 TFLOPS Performance

The CIOV-2231 from Creative Electronic Systems (CES) is a 3U OpenVPX SBC featuring an Intel Core i7 Quad-Core dual-threaded (8-threads) Broadwell microarchitecture. The CIOV-2231 embeds all the necessary hardware to capture video and I/O directly on-board. The high integration of the CIOV-2231 provides system architects and integrators with a very powerful and unique Intel based single board solution.

Concurrent Technologies’ TR C4x/msd provides server grade performance with excellent storage connectivity. The 10G Ethernet data plane connectivity allows multi-processor systems to be easily constructed by slotting in additional processor boards whilst high bandwidth co-processing resources can be connected in adjacent slots via PCI Express expansion plane connections. Enhanced security, built-in test and other options are available to suit application needs.

Curtiss-Wright’s Defense Solutions’ CHAMP-GP3 GPGPU Application Accelerator is a 6U OpenVPX module that brings the extensive floating point processing power of NVIDIA’s latest generation of Maxwell architecture class GPGPUs to the embedded aerospace and defense market. It is designed for addressing the massive amounts of data generated by modern Radar, SIGINT and EO/IR sensors and provides unparalleled HPEC performance in cross-cueing applications.

• Intel Core i7 Gen5 processor QuadCore dual-threaded (8-threads total) Broadwell microarchitecture. • Intel Iris Pro Graphics 6200 GPU. • Extended Range Conduction-Cooled [-40 to 85 degrees C]; General Purpose Air-cooled [0 to 55 degrees C]. • 16 Gbytes of DDR3L DRAM, 16 Gbytes of on-board SATA flash memory; RAID 0 and RAID 1 support over dual SATA III. • Digital video capture (HD/SD-SDI). • PCIe Gen3 1x 8-lane, 2x 4-lane, 4x 2-lane with support for NTB port; PCIe Gen2 Full Mesh network for near deterministic communication. CES (Creative Electronic Systems) Geneva, Switzerland +41 (0)22 884 51 00

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COTS Journal | July 2016

• 8-core Intel Xeon Processor D-1548. • 3U VPX form factor.

• 6U OpenVPX form factor with NVIDIA Tesla M6 MXM mezzanines.

• Up to 16-cores and 32 Gbytes of DDR4 memory for high performance applications.

• One or two NVIDIA Maxwell architecture GPGPUs.

• Optional 128GB SATA Flash module and 2.5-inch SSD for local storage. • 2 x 10GBASE-KR data plane connectivity. • x4, x8 or x16 PCI Express Gen3 expansion plane for local co-processing and I/O resources. • Long life-cycle support. Concurrent Technologies Woburn, MA (781) 933-5900

• Each GPGPU has: each with: 1536 cores; 8 Gbytes of GDDR5 memory; 256-bit wide memory bus; 147.2 Gbyte/s memory bandwidth; and 16-lane Gen2 PCIe interface. • Temperature, voltage, and current sensors; IPMI support; 12V power. • Rugged conduction-cooled. Curtiss-Wright Defense Solutions Ashburn, VA (703) 779-7800



Links to the full data sheets for each of these products are posted on the online version of this section.

3U OpenVPX REDI SBC Features Secure Processing Technology

2.7 GHz Quad Core i7 6U VPX SBC Features Advanced Security

3U OpenVPX SBC Marries Zeon-D Processor and Kintex-7 FPGA

The XPedite7672 from Extreme Engineering Solutions is a secure, highperformance, 3U VPX-REDI, SBC based on the Intel Xeon D-1500 family processor. The XPedite7672 is an optimal choice for computationally heavy applications requiring maximum data and information protection. The SmartFusion2 SoC provides authentication and detection against many types of attacks.

The VPXCB1102 "Sparrow" from General Micro Systems is an Intel 5th generation Core i7 OpenVPX SBC module designed to provide the highest security and performance possible in a fully ruggedized and conduction-cooled VPX module. The board’s conduction cooling works so well using GMS’s RuggedCool that the CPU needs no throttling in order to run at full performance at +85 degrees C.

The IC-INT-VPX3d/e from Interface Concept is an OpenVPX 3U SBC based on the Broadwell-DE processor—14nm High Performance Chip of Intel’s Low Power Spectrum. Combined with the company’s ComEth 4580a 10 Gigabit Ethernet router or hybrid ComEth4410a switch (PCIe & Ethernet) and other IC’s Processor/FPGAs boards with IC’s software / Firmware libraries, the IC-INT-VPX3d/e is the key building block of the next High Performance Embedded Computing systems (HPEC).

• Supports Intel Xeon D-1500 family processors. • SecureCOTS for secure and trusted processing; SmartFusion2 SoC. • 3U VPX (VITA 46) module; REDI per VITA 48. • Up to 16 Gbytes of DDR4-2133 ECC SDRAM in two channels; Up to 32 Gbytes of SLC NAND flash. • XMC site; Two x4 PCI Express backplane fabric interconnects. • Two 10 Gbit Ethernet, two Gbit Ethernet ports; Four SATA ports and two USB 2.0 ports. Extreme Engineering Solutions Middleton, WI (608) 833-1155

• Up to 2.7 GHz Intel quad Core i7 Broadwell processor with 6MB of L3 Smart Cache. • Up to 32 Gbytes of 1600 MHz DDR3L memory with ECC. • 4x Gbit Ethernet ports; 2x USB 3.0 ports and 2x USB 2.0 ports; 2x COM ports; Up to 3 Display Ports. • Trusted Execution Technology (TXT); Trusted Platform Module (TPM) (Optional). • Fully compliant to MIL-STD-810G, MILS-901D and DO-160D. • Operates at standard temp 0 to degrees C or extended temp -40 to +85 degrees C. General Micro Systems Rancho Cucamonga, CA (909) 980-4863

• One Intel Xeon Processor D-15xx. • Two banks of DDR4 with ECC (up to 8 Gbytes per bank). • 3U VPX board compliant with VITA 46.0 standard. • Available in air-cooled and conductioncooled grades. • One SATA NAND SSD (up to 16 Gbytes). • 1 F PGA Kintex-7, 5 PCIe x4 ports; General purpose I/Os; 4 Ethernet ports; 1 RS485/RS232 port; 2 USB 2.0 ports; 1 XMC slot, Optional video interface. Interface Concept Quimper, France. +33 (0)2 98 57 30 30.

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COTS Journal | July 2016



OPENVPX SBCS ROUNDUP Links to the full data sheets for each of these products are posted on the online version of this section.

3U Blade Serves Up 8-Core Xeon-D and 16 GB DRR DRAM

3U SBC Sports 8-core Broadwell DE Intel Xeon D Processor.

3U OpenVPX Board Combine Stratix FPGAs and TI Keystone DSP

Kontron’s 3U VPX blade VX3058 is based on the highly integrated 8-core Intel Xeon D architecture, supporting Dual 10 Gigabit Ethernet, high bandwidth PCI Express 3.0, and high speed DDR4 memory. It is consequently SWaP-C optimized with versatile mezzanine options for XMC, storage, graphics, M.2, and I/O. Kontron's VxFabric API extends the TCP/IP protocol over the PCI Express infrastructure.

Mercury Systems’ Ensemble LDS6526 processing blade integrates the latest Intel Xeon processor D SoC product family and software-defined off-load processing with built-in, double-bandwidth sensor I/O capability. Mercury’s software-defined, FPGA-based protocol offload engine technology (POET) combined with Altera’s latest Arria 10 device delivers twice the sensor I/O bandwidth than other OpenVPX blades.

The VF360 from Sundance Multiprocessor Technology is a 3U OpenVPX module that leverages on Altera Stratix V FPGA and Texas Instruments KeyStone Multicore DSP technology. It is suited for computation and bandwidth intensive applications such as Radar, Networking, SIGINT, EW, SDR and Video. Both air-cooled and conduction cooled versions are available. Further flexibility is provided through build options to cater for 10 different FPGAs from Altera’s Stratix V GX and GS device families.

• 3U OpenVPX blade. • 8 Core Xeon Processor D. • 16 Gbytes of DDR4 DRAM with ECC. • Dual 10 Gigabit Ethernet. • x8 PCI Express Gen3 bandwidth. • Mezzanine options for XMC, storage, graphics, M.2, and I/O. • Suited for Virtual Machines and HPEC applications. • Extended life cycle and 10-year silicon reliability. Kontron America Poway, CA (858) 677-0877

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COTS Journal | July 2016

• 6U OpenVPX single server blade. • Intel Xeon D (Broadwell) server-class processing.

• Stratix V family FPGA in the KF40 (1517 FBGA) package.

• 40 Gbit Ethernet high bandwidth SW defined fabrics.

• Up to 2 Gbytes DDR3 DRAM.

• Four channels built-in sensor I/O.

• Up to 32 Mbytes QDRII+ SRAM.

• Dual XMC mezzanine sites.

• TI KeyStone Multicore C667x family DSP with up to 8 cores at 1.2 GHz.

• 16 Gbytes of DDR4-2400 SDRAM.

• FPGA Mezzanine Card (FMC-HPC):

• PCIe connectivity to OpenVPX expansion plane.

• VPX Interface complies with OpenVPX MOD3-PAY-3F2U-16.2.12-2 module profile.

• Module package options: Air-cooled, Conduction-cooled, Air Flow-By, Liquid Flow-By. Mercury Systems Chelmsford, MA (978) 967-1401

• Supports FPGA configurable User I/O on P2. Sundance Multiprocessor Technology Chesham. UK +44 1494 793167



New XMC Modules Enhanced with Artix-7 FPGA Acromag’s XMC-7A modules feature a high-performance user-configurable Xilinx® Artix®-7 FPGA enhanced with high-speed memory and a high-throughput serial bus interface. The result is a powerful and flexible I/O processor module that is capable of executing custom instruction sets and algorithms. The logic-optimized FPGA is well-suited for a broad range of applications. Typical uses include hardware simulation, communications, in-circuit diagnostics, military servers, signal intelligence, and image processing.

• Reconfigurable Xilinx Artix-7 FPGA with 200k logic cells • 128M x 64-bit DDR3 SDRAM • 32M x 16-bit parallel flash memory for MicroBlaze FPGA program code storage • 4-lane high-speed serial interface on rear P15 connector for PCIe Gen 1/2 (standard),

Model RTS 2620 The Talon RTS 2620 is the first recorder to combine and exploit the power of a Pentek Talon recording system with a fully integrated signal scanner, RF tuner and RF upconverter. The RTS 2620 automatically tunes, detects and records signals of interest from 2 MHz to 6 GHz at 30 GHz/sec scan rate..

North Atlantic Industries, Inc.

Phone: (201) 818-5900 Web:

Serial Rapid I/O, 10Gb Ethernet, Xilinx Aurora

• 8-lane high-speed interfaces on rear P16 connector for customer-installed soft cores Acromag, Inc.

Phone: (877) 295-7084 Email: Web:

Star Communications, Inc.

XU-TX: An XMC module with two, 5.1 GSPS, 16-bit DAC’s, PLL, 8 GB DDR4 and Xilinx UltraScale FPGA Up to 7800 MB/s streaming via PCIe or Aurora, Internal or external clocking & triggering High Speed Arbitrary Waveform Generation, Wireless MIMO transmitter, RADAR Waveforms, or Electronic surveillance & communications

• Reconfigurable Xilinx Artix-7 FPGA with 200k logic cells • Two 16-bit, > 5.1 GSPS DAC channels: • Single ended AC coupled outputs with programmable DC bias • Differential DC model option • >2 GHz analog bandwidth (1X) • Digital inverse sinc filter • Enhanced 2nd and 3rd Nyquist modes • “Frequency doubling” 2X mode • Interpolation filters: 1X(bypassed)-64x • 48 bit NCO and 31 32bit fast hop NCOs • Up to 7800 MB/s streaming via PCIe or Aurora • Fixed latency, multi-board synchronization Innovative Integration

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4.4 x 6.6 x 0.8 inches >65 Teraops/sec scalable 1-4 FPGAs installs in any PC or server made in the U.S.A. COTS Journal | July 2016



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Small Rugged Embedded Computer Features Atom E38xx and Mini PCIe Versalogic has announced Ospreyâ&#x20AC;&#x201D;an extremely small, rugged, embedded computer. This next generation of the Versalogic Embedded Processing Unit (EPU) format combines processor, memory, video, and system I/O into an extremely compact full function embedded computer. The computer has a footprint just slightly larger than a credit card. Osprey (VL-EPU-3311) is available in single-, dual-, and quad-core models. The Osprey features an industrial temperature Intel Atom E38xx processor optimized for performance and power balance. Intel's advanced Gen 7 HD graphics engine provides outstanding graphics performance and is capable of supporting two simultaneous 1080p video streams. On-board hardware acceleration is available for encode/decode of H.264, MVC, VP8, VC1/WMV9, and other standards. The graphics engine also supports DirectX 11, Open GL 4.0, full HD video playback, dual display support, and resolution up to 2560 x 1600 at 60Hz. Osprey supports a Mini DisplayPort++ output as well as a single-channel LVDS display output. Osprey's I/O connectivity includes dual Gigabit Ethernet ports with network boot capability, one USB 3.0 and four USB 2.0 ports, I2C, eight digital I/O's, and two serial ports. A SATA 3 Gbits/s interface supports high-capacity rotating or solid-state drives. Full and half-sized Mini PCIe sockets, a microSD socket, and on-board eMMC (on some models) provide flexible solid-state drive (SSD) options. Systems can be enhanced by leveraging the Mini PCIe sockets with plug-in Wi-Fi modems, GPS receivers, MIL-STD-1553, Ethernet, Firewire, and other mini PCIe cards/modules. OEM quantity pricing starts at $709 for the single-core model with 2 Gbytes of RAM. Versalogic Tualatin, OR (503) 747-2261

26-35 GHz Driver Amplifier Delivers High Gain at High Frequencies

Compact, Smart Power 3-Phase Motor Drive is Rad Tolerant

Custom MMIC has added a new amplifier to its expanding product offerings: the CMD243 26-35 GHz low noise driver amplifier. The CMD243 is a wideband self-biasing GaAs MMIC balanced driver amplifier that offers 15.5 dB of gain with an output P1dB compression point of +21 dBm. The amplifier operates from a single 5 volt supply and draws just 90 mA typical. The balanced design provides good VSWR matching, along with improved stability and gain flatness. The amplifier is a 50 ohm matched design, which eliminates the need for external DC blocks and RF port matching. Applications for the CMD243 include military, space and communications systems where small size and high linearity are necessary.

Data Device Corporation (DDC) has introduced a new high-reliability, 3-phase radiation tolerant motor drive, providing 100k Rad Total Dose protection, and advanced circuit and logic protection to ensure fail-safe operation. The new compact PW-82336 3-phase motor drive hybrid utilizes a high-efficiency, radiation tolerant MOSFET output stage with 100 VDC rating to deliver 5A continuous current (10A peak current) to the motor, along with flexible I/O, enabling a common design to be used across multiple applications. The driveâ&#x20AC;&#x2122;s flexible I/O allows common design to be used across multiple application platforms with individual bridge returns and standard logic level inputs to facilitate design implementation.

Custom MMIC Chelmsford, MA (978) 467-4290

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COTS Journal | July 2016

Data Device Corp. Bohemia, NY (631) 567-5600


Rugged PC/104 Chassis Family is VITA 75 Compatible MicroMax has announced that two versions of the M-Max V75 ultra-compact machined aluminum chassis, which are compatible with the VITA 75 standard, are now available as standalone products. Used in current MicroMax products, these chassis have proven capability, and due to customer demand are now being made available separately to help system designers. The M-Max V75 (standard size) and the M-Max V75 Short (short size) (shown) are VITA 75 footprint ultra-compact machined aluminum chassis providing excellent thermal and environmental properties. The fanless M-Max V75 can house up to two PC/104 or similar-sized boards, and weighs approximately 5 lbs; it dissipates around 28W of heat. The also fanless M-Max V75 Short can house one PC/104 or similar-sized board, weighs 3.15 lbs., and dissipates around 14W of heat. Both chassis models are designed to house computer boards for reliable operation in extremely tough environments. MicroMax's patented passive cooling system and the aluminum alloy T6061 chassis provide IP66 dust and moisture protection, and withstand shocks up to 10g and vibration up to 2g. MicroMax's high-performance extremely rugged M-Max 871 EP2/MMS computer and the M-Max SW208 Gigabit Ethernet switch are each housed in a M-Max V75 series chassis. The M-Max V75 and M-Max V75 Short are designed to support embedded solutions used in critical applications in harsh environments. To aid application, the front panel can be modified to customer specifications and can be equipped with various connectors. MicroMax Computer Intelligence New York, NY. (212) 968-1060.



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COTS Journal | July 2016



FPGA Development Kit Supports Altera Arria 10 FPGA Boards

Fanless Embedded Computers Serve Up 6th Gen Intel Core Processors ADLINK Technology has announced the release of its new Matrix MXE-5500 Series, featuring 6th generation Intel Core i7-6820EQ/i5-6440EQ/i3-6100E processors. The until sustains reliable performance at -20 to 70 degrees C, shock up to 100G, and vibration up to 5 Grms. Moreover, AFM (Adaptive Function Module) capability offers fast application-specific access for medium volume operations, reducing development time by up to 50 percent. The processors provide accelerated HW media codecs to support Ultra HD 4K displays. Dual-channel DDR4 2133 MHz SODIMM sockets support up to 32 Gbytes of memory, and the Series’ compact footprint is perfect for deployment in limitedspace environments such as in-vehicle applications. The MXE-5500 Series provides singleside access I/O featuring 2x DisplayPort + DVI-I, 4x GbE, 6x COM, 4x USB 3.0+4x USB 2.0, and 8x isolated DI/O. Storage options are also extremely flexible with 2x 2.5 inch hot-swappable SATA III, 1x M.2 2280, and 1x CFast w/ RAID support, easing storage maintenance burdens. ADLINK's built-in SEMA (Smart Embedded Management Agent) utility provides an intuitive GUI and easy-to-use programming library for enhanced system management. The system’s Extended Temperature Option extends operating temperature for Intel Core i7 processor-equipped MXE-5501 to -20 to 60 degrees C and for Intel Core i5/i3 processor-equipped MXE-5502/5503 to -20 to 70 degrees C. ADLINK Technology, San Jose, CA (408) 360-0200.

BittWare has announced the latest release of its FPGA Development Kit (FDK) with support for Arria 10 FPGA boards. The FDK provides FPGA board support IP and integration for BittWare's Altera Arria 10 and Stratix V FPGA-based boards. The new release adds support for Arria 10 devices, including board support and example projects for BittWare's A10PL4 (shown) and A10P3S boards. The release also features a simplified Windows installation procedure. Built with Altera's Qsys system integration tool, the FDK is a library of FPGA components that includes preconfigured physical interfaces, infrastructure, and examples. The FDK drastically cuts development time and can be easily integrated into existing FPGA development environments. By providing the underlying infrastructure for FPGA development, BittWare's FDK lets customers focus on developing their unique processing components rather than on the infrastructure around it. The BittWare FPGA Development Kit includes physical interface components to provide board-specific, preconfigured external I/O interfaces. Qsys integration provides system interconnect and project development, including simulation support. There are board-level projects, integrated loads and reference designs for each supported product. Reference designs include ADCs, DACs, 40GbE, 10GbE, PCIe, DDR3/4, QDRII/II+. Bittware, Concord, NH. (603) 226-0404.

Development Kit Takes Aim at RadTolerant FPGA System Designs Microsemi has announced the availability of its RTG4 Development Kit with its recently announced RTG4 PROTO FPGAs. As the industry’s first radiation-tolerant FPGA kit providing space designers a comprehensive evaluation and design platform, the new kit is ideal for the development of applications such as data transmission, serial connectivity, bus interface and high speed designs, using the company’s RTG4 radiation-tolerant high-speed FPGAs. The new kit includes Microsemi’s RTG4 PROTO FPGAs, enabling lower cost prototyping and design validation while offering the only reprogrammable prototyping solution of their kind delivering the same timing and power characteristics as space flight units. The development kit provides all necessary reference to evaluate and adopt RTG4 technology quickly, without the need to build a test board and assemble the device onto the board. The RTG4 Development Kit board features a RT4G150 device offering more than 150,000 logic elements in a ceramic package with 1,657 pins. Its reprogrammable flash configuration is unique to the space industry, making prototyping faster and easier than other radiationtolerant FPGAs. The kit also features Microsemi’s Libero SoC Design Suite, offering high productivity with its comprehensive, easy to learn, easy to adopt development tools for designing with Microsemi’s radiation-tolerant FPGAs. Microsemi, Aliso Viejo CA (949) 380-6100.

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COTS Journal | July 2016


Digital Transceiver Blends DDC and DUC channels Plus Spectrum Analyzer Innovative Integration has announced the K706 Digital Transceiver. It supports two antenna inputs and four independent channels of DDC, two channels of DUC, and one spectrum analyzer embedded in a Xilinx Kintex-7 FPGA. It also supports monitoring and/ or recording of wide- or narrow-band spectra or channelized IF band data. The analog front-end is modularized via an FMC site which, fitted with an FMC-1000, employs dual 1 GHz 14-bit ADCs and DACs. The product supports contiguous recording at 300 Mbyte/s to internal 1.8 inch SATA drives until running out of disk space. Each DDC has its own programmable tuner, programmable low-pass filtering, gain control, and decimation settings, supporting output bandwidth up-to 100 MHz. Data is packetized in VITA-49 format with accurate timestamps, synchronous to an external PPS signal. Each DDC channel can be enabled and disabled on the fly to conserve host computer storage and bandwidth. An embedded power meter monitors the power (dBm) of the ADC inputs, supporting analog gain control of optional, user-supplied external frontend devices. The spectrum analyzer, which supports windowing, calculates the wide-band spectrum of raw ADC data or the narrow-band spectrum of the DDC output data at a programmable update rate. A programmable peak hold feature may be enabled to latch transient activity in the spectrum. The programmable threshold monitoring spectrum feature tracks spectral activities of up-to 512 bins. The functionality of the on-board Kintex-7 FPGA may be user-extended. A development kit is available, allowing users to insert custom-made cores to create more advanced applications. Innovative Integration, Simi Valley, CA. (805) 578-4260.

1000 Watt VITA 62, 6U AC/DC VPX Supply is Conduction-Cooled

CompactPCI Serial Carrier Serves Up MXM 3.0 GPU Graphics

North Atlantic Industries (NAI) has announced the availability of its latest 6U rugged VPX power product: the VPX56H-6. The VPX56H-6 provides up to 1,000 W of power (CC4 temperature range, full load) with five outputs and is compliant with MIL-STD-704F. Other features include current share, remote error sensing and a built-in EMI filter compliant with MIL-STD-461Fâ&#x20AC;&#x201C; all within a single slot 1.0 inch pitch, 6U package. The VPX56H-6 is designed to meet standard 6U VPX mechanical requirements and has VITA 62 compatible keying, outputs and signaling, user programmability, I2C communication, geographical addressing, programmable over-temperature monitor and a five state, status LED. Basic pricing configuration starts at $4,501 each (100s).

EKF Elektronik has announced the SV2-MOVIE, a carrier card for an MXM 3.0/3.1 graphics module. Suitable for CompactPCI Serial systems, the SV2-MOVIE is provided with four DisplayPort front panel connectors and can accommodate either a type A (82 x7 0 mm2) or type B (82 x 105 mm2) MXM graphics module. MXM (Mobile PCI Express Module) is an interconnect standard for GPUs created by MXM-SIG. With the SV2-MOVIE, demanding applications can be crafted that require embedded graphics. The SV2-MOVIE is also suitable for parallel computing when equipped with a CUDA capable GPGPU graphics engine.

North Atlantic Industries Bohemia, NY (631) 567-1100

EKF Elektronik Hamm, Germany +49 (0)2381/6890-0

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COTS Journal | July 2016



Intelligent Signal Scanning Recorder Integrates RF Tuner and Upconverter Pentek has announced a major addition to its family of Talon signal recording and playback systems: the RTS 2620 6 GHz RF Sentinel Intelligent Signal Scanning rackmount recorder. The Talon RTS 2620 recorder is suitable for military, security and government intelligence (SIGINT, COMINT and ELINT) applications. The RTS 2620 is the first recorder to combine and exploit the power of a Pentek Talon recording system with a fully integrated signal scanner, RF tuner and RF upconverter. A Pentek Model 78621 Cobalt transceiver module serves as the data acquisition engine of the Talon RTS 2620. Its 200 MHz 16bit A/D converter provides 86 dB of spurious-free dynamic range and 74 dB of SNR. A digital downconverter (DDC) provides frequency zooming for signal bandwidths as low as a few kHz. The Model 78621 is coupled to a 6 GHz RF tuner front end with excellent dynamic range across its entire spectrum. The Sentinel recorder provides automated signal monitoring and detection. The user specifies a start and stop frequency for the scan, covering any range between 2 MHz and 6 GHz. The RF tuner and DDC step across the scan range in consecutive bands, each programmable up to 40 MHz in width. RF energy in each band is detected to create a waterfall spectrum display of the entire scan. Any band can be selected for continuous real-time monitoring and/or recording. Each recording captures an instantaneous bandwidth up to 40 MHz. The Talon RTS 2620 starts at $75,000 USD. Pentek Upper Saddle River, NJ (201) 818-5900

JTAG Adapter Hardware Eases Test of DIMM / SODIMM Sockets JTAG Technologies has announced a new family of hardware adapters specifically designed for testing of a variety of DIMM and SODIMM sockets (sizes and styles) using a JTAG/boundary-scan controller and supporting software. Using the new JT 2127-Flex system from JTAG Technologies clients get pin-point diagnostics from a knowngood test interface so they can be certain if the socket is soldered correctly (or not). The JT 2127-Flex system comprises two basic elements. A high-speed multi-channel IO module: JT 2127/DMU, and a personality adapter for the chosen DIMM type: JT 2127-Flex xxx. Software support for test developments is provided through JTAG Technologies ProVision developer tool-suite, which is shipped with a full set of support files for the new system. JTAG Technologies Easton, MD (410) 770 4415

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COTS Journal | July 2016

Rugged Flash Drive Features USB 3.0 and 128 GB Storage Fischer Connectors has launched the USB 3.0 version of its portable, miniature, lightweight and rugged Fischer Rugged Flash Drive. This memory stick has been specially designed for the safe transportation and storage of sensitive data in harsh environments. The USB 3.0 Fischer Rugged Flash Drive is faster, smaller and more user-friendly than the USB 2.0 product introduced to the market in 2011. The read speed is now up to five times faster; standard memory sizes are 32, 64 or 128 Gbytes; the body is shorter; and, in order to guarantee secure access, it is now available with either the Fischer UltiMate Series interface or the Fischer MiniMax Series interface. Fischer Connectors US Alpharetta, GA (678) 393-5400


Software Radio Modules Cards Feature TI ADC32RF45 A/D Converter Pentek has introduced two new FlexorSets featuring the Texas Instruments (TI) ADC32RF45 dual 14-bit 3 GSPS A/D converter. The FlexorSet Model 5973-320 for 3U VPX and Model 7070-320 for PCIe consist of the new Flexor Model 3320 configurable 2-Channel A/D and 2-Channel D/A FMC installed on either of two carriers. The carriers contain optimized Pentek FPGA intellectual property (IP) for A/D acquisition and D/A waveform generation, optimally matching the features of the FMC. A rich set of software development tools enables rapid application development and speeds time to market. The Model 3320 FMC front end accepts two analog RF or IF inputs on front panel connectors into a Texas Instruments ADC32RF45 dual A/D converter with built-in multiband DDCs, setting a new benchmark for Pentek channel density and conversion speeds in a transceiver product. On the output side, the Texas Instruments DAC39J84 D/A converter accepts baseband real or complex data streams from the FPGA. Profiles include A/D and D/A sample rates, bits of resolution, as well as digital downconverter and digital upconverter modes. Both models offer native x8 PCIe Gen .3 system interfaces, delivering peak rates of up to 8 GB/sec. FlexorSet carriers offer a choice of Virtex-7 FPGAs to match the specific requirements of the processing task. Optional LVDS connections to the FPGA provide custom I/O for flexible platform configuration. Optional optical interfaces for FPGA gigabit serial links offer fast connections between boards and systems. The 3U VPX Model 5973-320 supports these optical links through VITA 66.4 backplane connectors. FlexorSets are designed for air-cooled, conduction-cooled and rugged operating environments. The FlexorSet Model 5973320 for 3U VPX starts at $28,690 and the FlexorSet Model 7070-320 for PCIe begins at $28,790. Pentek Upper Saddle River, NJ (201) 818-5900.

Rugged Tablet Offers One Hand Operation, Long Battery Life

MicroTCA Chassis Upgrades to PCI Express Gen 3 Speeds Pixus Technologies has upgraded its 1U MicroTCA enclosure system to PCIe Gen 3. The company will continue to upgrade its various configurations of MicroTCA solutions to the higherspeed standard. The Pixus PXS0108 MicroTCA chassis platform features 6 AMC slots and 1 MicroTCA Carrier Hub (MCH) slot. Various power options are available, including a dual redundant configuration. The PXS0108 has an active backplane that alleviates the need for expensive Power Modules (PMs). PCIe Gen 3 brings the backplane speed to 8 Gbytes/s in single x8 or dual x4 options. Other backplanes are available including 10 Gbit Ethernet. Pixus Technologies Waterloo, Ontario, Canada (519) 885-5775

The next-generation T800 from Getac is a fully rugged tablet designed to meet the needs of military technicians working in tight spaces and extreme environments. It features best-in-class battery life with an optional hot-swappable SnapBack battery for potentially limitless life. Its thin, ergonomic design makes it comfortable to hold in one hand, and its 8.1 inch touchscreen provides ample real estate for document viewing and data entry with minimal scrolling. The sunlight-readable LumiBond 2.0 display delivers a responsive 10-point touch experience along with a 170-degree viewing angle and 16:10 aspect ratio for ideal reading from virtually any angle. Getac USA Irvine, CA (949) 681-2900

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COTS Journal | July 2016



Rugged Server-Level Box Combines Advanced Switch/Routing and Security General Micro Systems (GMS) has announced a new product line of deployable, rugged, small formfactor server systems, based on the Intel Xeon D processor. The GMS “Server Room in a Box” Xeon D family blends the advantages of a rugged-server, a low-cost switch, and a low-cost router computer system for defense and UAV markets as well as mining and industrial applications. The first product in the family is the SB2002-SW “Blackhawk” rugged switch/router, which packs up to 16 CPU cores, 20 managed/Ethernet ports, 64 Gbytes of RAM, removable storage, Embedded Services Router software from Cisco, and high-level security into a seven-pound box. It operates from as little as 75W. Ideal applications for Blackhawk include vehicle-mounted battlefield tactical operations centers (TOC) that have multiple on-board LANs, displays, virtual machines, and red/black storage. A single rugged Blackhawk can meet the server needs for multiple operators and easily fit under a vehicle’s seat. The server supports the Intel Xeon D processor with hyper-threading for a total of up to 16 logical cores (32 threads) in a single SoC device—12 cores in the extended- temperature version. Each core operates at up to 2.5 GHz and can turbo boost up to 3.1GHz. The unit incorporates the company’s RuggedCoolSM system yielding a conduction-cooled, sealed chassis capable of operating at extreme temperatures (–40 to +85 degrees C) at unthrottled CPU speed. Blackhawk is available in a variety of air- and conduction-cooled versions and multiple temperature-range options. The SB2002-SW Blackhawk also boasts a secure storage subsystem with up to 16 Mbytes of BIOS Flash with hardware-write protect and a fixed on-board mSATA boot device up to 1 Terabyte with optional hardware write-protect, secure-erase, and encryption functions. In addition, the Blackhawk supports one enterprise-class x4 PCIe SSD or up to four 2.5 inch SSD drives with hardware write-protect, secureerase, and encryption functions. The Blackhawk can also support FIPS-140-2 and FIPS-197 encryption standards for ultra-secure data storage, along with the Trusted Platform Module (TPM) and the Trusted Execution Technology (TXT). General Micro Systems, Rancho Cucamonga, CA (909) 980-4863.

Configurable Embedded Vision System Does Reliable Image Capture Elma Electronic offers a rugged, high performance embedded vision system that incorporates four configurable Camera Link ports and a front-removable, multi-terabyte storage bay with SATA III interface, essential for high speed imaging data offload and transfer. Powered by an Intel Quad Core i7 processor, the new OptiSys-5101 features a high definition image frame grabber ideal for optical inspection and video capture. A miniPCIe expansion site facilitates easy I/O customization. Designed to withstand severe environments, the compact system is ideal for a wide array of industrial, medical and harsh applications requiring high speed image inspection, analysis and measurement. To accommodate varying data transfer rates, the four Camera Link ports are configurable as four base ports, two full ports or two base ports and one full port for data processing in excess of 5 Gbits/s. Standard features include camera frame rate sequence capture, triggered image sequence capture and camera integration and async reset control. Thousands of HD images can be stored. The existing HDMI port as well as two USB 2.0 and two GigE RJ45 I/O interfaces are complemented by the miniPCIe site that allows additional application I/O customization. Elma Electronic, Fremont, CA (510) 656-3400.


COTS Journal | July 2016

1U Rackmount System Sports Intel Skylake-S 6th Gen Core Processor WIN Enterprises has announced the PL-80980, a 1U Rackmount networking system designed for today’s networking tasks. The device uses the new Intel 14nm micro -architecture Skylake-S series 6th generation Core i7/i5/i3 processor and the Intel H110 PCH chipset. In addition, a new socket type, LGA 1151, has been released for this die-shrinking architecture. Memory includes two-channels of DDR4 2133 MHz un-buffered / non-ECC memory up to 32 Gbytes. Maximum support is provided for 14x GbE Copper LAN ports with 1x Bypass function. I/O features include: one console port, two USB 3.0 ports, a LCD module with 5-button keypad, and LEDs to indicate Power, HDD, and Status. WIN Enterprises, North Andover, MA (978) 688-2000.


Rugged 3U VPX GigE and PCIe Switches Boast Fast Data Transfers Aitech Defense Systems offers three rugged, 3U VPX switches that use a low latency, cut through architecture and flexible system extensions to efficiently move data across VPX cards for high throughput applications. The new managed C690 and unmanaged C691 incorporate both Gbit Ethernet (GbE) and PCI Express (PCIe) switching, while the C695 features PCIe switching only. For managed GbE switching, the C690 uses the Marvell Prestera 98DX4122 running Marvell routing and management OS. As an unmanaged GbE switch, the C691 features the Marvell Prestera 98DX106. Both come in three standard port configurations: eight 1000BaseBX/KX; six 1000Base-BX/KX with two 1000Base-T; or five 1000Base-T. Full wire speed, non-blocking forwarding enables stable, high throughput data transfers. PCIe switching on all three boards is handled via an IDT 89H32NT24AG2 Gen 2 switch for up to 5 GT/s of data transfer with low latency switching and integrated DMA engines facilitate the fast data transfer. Since the C695 has no GbE requirements, it can accommodate up to 24 ports or 32 lanes. Optionally, the C695 features an on-board XMC site, where I/O is routed to the backplane, for more user customization. It features two standard port configurations: eight PCIe x4 or six PCIe 4x with an XMC site that includes a PCIe x8 interface. All three OpenVPX-compliant switches feature slot profiles matched to their specific I/O variants and are shock and vibration resistant. Air-cooled, conduction-cooled and conductionIf you are ready for a more robust handle/panel solution, cooled 2LM versions are available for come to Pixus! Our OpenVPX handles feature a metal a number of commercial, rugged and engagement claw and rugged design that ensures the military installations. These include highest reliability. Ask about our new rugged horizontal C4ISR applications where high data extruded rails with thicker material for OpenVPX and high throughput must be coupled with low switch latency to maximize data insertion force systems today! transfers.

Are Your OpenVPX Handles Breaking?

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Aitech Defense Systems Chatsworth, CA (888) 248-3248

COTS Journal | July 2016



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Company Page# Website

Company Page# Website


NovaSom Industries............................19...........


One Stop Systems, Inc. ......................4, 7.......................





Chassis Plans......................................25...................

Pico Electronics, Inc............................13.................

COTS Product Gallery Ads....................35.........................................................


Critical I/O..........................................15...........................

Star Communications


Gaia Converter....................................26..................

Systel Rugged Computers...................29..........................

Intelligent Systems

Mercury Systems, Inc. ........................48.................................

COTS Journal (ISSN#1526-4653) is published monthly at 905 Calle Amanecer, Suite 150, San Clemente, CA 92673. Periodicals Class postage paid at San Clemente and additional mailing offices. POSTMASTER: Send address changes to COTS Journal, 905 Calle Amanecer, Ste. 150, San Clemente, CA 92673.

COMING NEXT MONTH Special Feature: Linking Development Systems to Deployed Systems

The pressure is on to move from development to deployment as smoothly as possible. An ability to do so can make or break the chances of a contract win—especially when complete working demos are often the requirement. Addressing this issue, a number of box-level system developers have crafted development systems designed specifically to be aligned with the all the same key aspects of the final deployed system. Articles in this section explore this trend and how it’s eases the path from development to system deployment.

Tech Recon Jeff’s Picks: Jeff Child’s Top Space-Qualified Electronic Solutions In the Jeff’s Picks section we choose the top products in a different category each month and share insights on why they’re significant in terms of design innovation, market relevance and technology leadership. August Jeff’s Picks section looks at radiation-hardened ASICs, FPGAs and power components as well as boards and subsystems designed for space applications..


COTS Journal | July 2016

System Development: SWaP Issues in Rugged Storage: From RAID to SSDs

High-bandwidth sensor platforms on UAVs, satellites and other systems are bringing in a deluge of data. As military those systems continue to rely more and more on compute- and data-intensive software, the storage subsystem is now a mission-critical asset. This section looks at the spectrum of storage solutions from SSDs to RAID systems in the context of meeting today’s focus on reducing size, weight and power (SWaP).

Data Sheet: COM and COM Express Boards

The Computer-on-Module (COM) concept has found a solid and growing foothold in military embedded systems. COM Express adds high-speed fabric interconnects to the mix. COM boards provide a complete computing core that can be upgraded when needed, leaving the application-specific I/O on the baseboard. This Tech Focus section updates readers on these trends and provides a product album of representative COM and COM Express products.

COTS Journal’s



Value of contract modification awarded to General Dynamics Electric Boat for the continued development of the Virginia Payload Module (VPM). Electric Boat is a wholly owned subsidiary of General Dynamics. The funds will be used to procure two VPM pre-production setups to support the manufacturing start of the VPM payload tubes. The VPM will comprise four large-diameter payload tubes in a new hull section to be inserted in Virginia-class submarines. This modification brings the cumulative value of the overall Virginia-class Lead Yard Services contract, initially awarded in 2010, to $1.46 billion.



Forecasted value of the global C4ISR Market by 2021 according to a new research report published by The report, now available on ASDReports, says the command, control, communications, computers, intelligence, surveillance & reconnaissance (C4ISR) market is estimated to be valued at USD 93.80 Billion in 2016, and is projected to reach USD 110.78 Billion by 2021, at a CAGR of 3.3 percent from 2016 to 2021. Increasing amount of data generated across C4ISR industry, along with growing demand for market and competitive intelligence, are the factors driving the growth of the C4ISR market.


Accuracy within which a U.S. Air National Guard (ANG) unit successfully released eight Lockheed Martin Enhanced Laser Guided Training Rounds (ELGTR) during recent flight evaluations at the Barry M. Goldwater Ranges near Gila Bend, Arizona. These flight evaluations marked the first time an ANG unit has flown the training round and completes the evaluation of ELGTR on their F-16C/D Block 40/42 aircraft. ELGTR replicates the key performance and laser engagement requirements of Paveway II Laser Guided Bombs (LGB). ELGTR’s high reliability and accuracy were demonstrated while being flown under various mission conditions. 46

COTS Journal | July 2016

Value of contract Cubic Global Defense (CGD) was awarded from Oasis Advanced Engineering (OASIS) to produce and deliver Crewstation Subsystems in support of the Bradley Fighting Vehicle (BFV) Conduct of Fire Trainer (COFT). The COFT enables the BFV unit to perform critical skills required in combat and designed for gunnery proficiency. OASIS is the prime contractor for this program to support the U.S. Army’s Program Executive Office for Simulation, Training and Instrumentation (PEO STRI). Cubic received a base contract of $4.18 million to produce and deliver nine Mobile and four Institutional Crewstation Subsystems with associated spares.


Total number of successful launches by United Launch Alliance (ULA) since the company was formed in December 2006. This month the 109th launch was a United Launch Alliance (ULA) Atlas V rocket carrying a payload for the National Reconnaissance Office (NRO). Designated NROL-61, the mission is in support of national defense. This is ULA’s 6th launch in 2016. This mission was launched aboard an Atlas V Evolved Expendable Launch Vehicle (EELV) 421 configuration vehicle. The EELV program was established by the U.S. Air Force to provide assured access to space for DoD and other government payloads.

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Visit to learn more. Copyright © 2016 Mercury Systems and Innovation That Matters are trademarks of Mercury Systems, Inc. - 3193

COTS Journal  

July 2016

COTS Journal  

July 2016