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Data Sheet: OpenVPX SBCs Roundup


The Journal of Military Electronics & Computing

HPEC Solutions Bring Data Center Performance to Embedded Systems

Military Data Recording Pushes SWaP Barriers Layered Approach Wins for Safety-Critical Software An RTC Group Publication

July 2015 Volume 17 Number 7

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The Journal of Military Electronics & Computing


COTS (kots), n. 1. Commercial off-the-shelf. Terminology popularized in 1994 within U.S. DoD by SECDEF Wm. Perry’s “Perry Memo” that changed military industry purchasing and design guidelines, making Mil-Specs acceptable only by waiver. COTS is generally defined for technology, goods and services as: a) using commercial business practices and specifications, b) not developed under government funding, c) offered for sale to the general market, d) still must meet the program ORD. 2. Commercial business practices include the accepted practice of customer-paid minor modification to standard COTS products to meet the customer’s unique requirements. —Ant. When applied to the procurement of electronics for he U.S. Military, COTS is a procurement philosophy and does not imply commercial, office environment or any other durability grade. E.g., rad-hard components designed and offered for sale to the general market are COTS if they were developed by the company and not under government funding.

July 2015 Volume 17 Number 7

FEATURED p.10 HPEC Reworks Data Center Computing for Embedded Duties SPECIAL FEATURE HPEC Systems Meet New Defense Priorities 10 14

HPEC Reworks Data Center Computing for Embedded Duties


Detail Devils

Jeff Child

Software and APIs are Key to Military HPEC System Development


The Inside Track

Chad Augustine, Curtiss-Wright Defense Solutions


COTS Products


Marching to the Numbers

TECH RECON Military Data Recorder Technology 18

Military Data Recording Advances to Accommodate Data Deluge Jeff Child

SYSTEM DEVELOPMENT Safety Critical Choices in Embedded Software 20 Layered Approach Enhances Security For Safety-Critical Software James Deutch, Lynx Software Technologies

DATA SHEET OpenVPX SBCs Roundup 26 28

Coming in August See Page 44 On The Cover: Last Fall the Freedom-class Littoral Combat Ship (LCS-1) USS Forth Worth (LCS-3) entered the U.S. 7th Fleet area of operations in the second deployment of the LCS to the region. The ship was the first LCS to embark with both a MH-60R Seahawk manned helicopter and a MQ-8B Fire Scout rotary-wing unmanned aerial vehicle (UAV). (US Navy Photo).

OpenVPX Enjoys Busy Phase of Product and Standards Activity Jeff Child

OpenVPX SBCs Roundup

Digital subscriptions available:

COTS Journal | July 2015




The Journal of Military Electronics & Computing

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HOME OFFICE The RTC Group 905 Calle Amanecer, Suite 150 San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050 EDITORIAL OFFICE Jeff Child, Editor-in-Chief 20A Northwest Blvd., PMB#137, Nashua, NH 03063 Phone: (603) 429-8301 PUBLISHED BY THE RTC GROUP Copyright 2015, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.

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EDITORIAL Jeff Child, Editor-in-Chief

Detail Devils


ot sure why, but for some reason summer is when the topic of defense acquisition reform tends enter the discussion of people I talk to in the industry. The problems never change— unexpected rises in program costs, slipping of schedules and technology maturity issues. But there are always new theories or activities aimed at improving things. One interesting angle being looked at recently is the defining a military program’s requirements—when to do it and to what degree of detail. Along just those lines the GAO last month released a report that was the result of interviews the organization conducted with 12 current and former military service chiefs and vice chiefs, and with other current and former DOD leadership to discuss the acquisition process. Most current and former military service chiefs and vice chiefs GAO interviewed from the Army, Air Force, Navy, and Marine Corps collectively expressed dissatisfaction with acquisition program outcomes. In a nutshell the former service chiefs emphasized the need for a stronger role in the acquisition chain of command. That includes more formal authority and mechanisms in place to ensure that the service chiefs are consistently involved and sufficiently able to influence program decisions. Acquisition experts saw that while service chiefs had significant influence on certain acquisition programs in the past, their close involvement did not always result in successful cost, schedule, or performance outcomes. For example, service chiefs had significant involvement in the Navy’s Littoral Combat Ship and the Army’s Future Combat System. Both were programs viewed as vital operational capabilities that needing to be fielded quickly. As a result the programs pursued aggressive acquisition strategies that pushed the programs through development with ill-defined requirements and unstable designs. This contributed to significant cost and schedule increases, and in the case of the Future Combat System, program cancellation. GAO analyzed requirements for all 78 major defense acquisition programs and found that “creep” in the high-level requirements is rare. Instead, it is after a program has formally started development that the myriad lower-level, technical requirements needed to complete a weapon system’s design are defined. Most of those detailed activities occur after the service chiefs’ primary involvement. Moreover, those low-level requirements often lead to the realization that much more time and resources are needed to build the weapon system.


COTS Journal | July 2015

Broadly speaking a high level requirement is something like “range” of a UAV for example, whereas a low-level requirement is the UAV’s fuel tank size. When GAO presented its analysis of the problem to the service chiefs, they generally agreed with it. Several noted that tradeoffs informed by systems engineering must take place before programs start so that requirements are better defined and more realistic cost, schedule, and performance commitments can be made. One former DOD official pointed to the lengthy timeframe usually involved in developing major weapon systems and how requirements increases occur because programs want to introduce the latest technology advances into a system. Examples cited were information technology (IT) and electronics equipment—although often embedded computing gets lumped under IT in such discussions. As I see it, the report highlights an important insight—one that actually dovetails with COTS Journal’s mission. The reality is that an engineering approach to program development is key to success. Many decades ago military technology development required a lot of risk and scientific discovery—creating the early ballistic missile systems or inventing the first computer control systems. But today military system development is much more of a pure engineering discipline. It’s about taking existing computer and electronics technology and engineering IT for the unique requirements of defense platforms. I’m pleased that the defense industry is not only thinking in that direction, but is also embracing—for real—open architecture concepts that enable computing systems to be upgraded easily throughout the life of the program. And as engineers, like you know, the devil has always been in the details. Shifting gears, I want let you know that on August 25 I will be moderating a panel at our San Diego RTECC event to be held at the San Diego Del Mar Marriott. The panel discussion will explore trends in C4SIR, military networking, advanced computing and more. The panelists are an exciting mix of individuals from SPAWAR, Northrop Grumman, SAIC, Cubic Global Defense, ViaSat and Lockheed Martin. If you or your colleagues are in the area on August 25 please come and attend the show, and enjoy our panel discussion. And thanks to all those companies signed up as exhibitors for the event.


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INSIDE TRACK ADL Embedded Solutions to Provide Computing for Army’s HMDS ADL Embedded Solutions has been selected by NIITEK, a Chemring Group company, to be the sole provider of its embedded mission computing solutions for NIITEK’s Husky Mounted Detection System (HMDS) next generation offering to the U.S. Army’s HMDS A2 Program of Record. The HMDS A2 uses the NIITEK Time-Domain Ground Penetrating Radar (GPR). In a parallel/complementary project, ADL Embedded Solutions will also form the “brain” of the HMDS International Sales Variant utilizing the 3D-Radar Step-Frequency GPR. ADL will also be assisting NIITEK in retrofitting the existing

HMDS A1 fleet with its embedded computing solutions via a separate effort. The HMDS is a high-performance ground penetrating radar system which functions on manned and unmanned, blast resistant vehicles that provide rapid ability to detect anti-vehicular landmines and other explosive hazards such as improvised explosive devices (IEDs) on main supply routes and open areas (Figure 1). NIITEK has been developing the HMDS since 2006 successfully supporting the U.S. Army, U.S. Marine Corps and other coalition partners with HMDS systems in Afghanistan

Figure 1 The Husky Mounted Detection System (HMDS) is high-performance ground penetrating radar system which functions on manned and unmanned, blast resistant vehicles. through a Joint Urgent Operational Need (JUON) requirement now known as the HMDS A1.

NGC Mission Computers Tapped for Marine Corp H-1 Helicopter Upgrade Northrop Grumman was recently awarded a contract from Naval Air Systems Command to deliver its next-generation mission computer for Lot 12 of the Marine Corps’ H-1 helicopter upgrade program (Figure 2). Under this contract, Northrop Grumman will provide FlightPro Gen III mission computers for the UH-1Y and AH1Z aircraft. The period of performance for this Lot 12 contract is slated for October 2016 through October 2017. The lightweight FlightPro Gen III mission computer integrates advanced mission, weapons and video processing capabilities into FIND the products featured in this section and more at


COTS Journal | July 2015

ADL Embedded Solutions San Diego, CA. (858) 490-0597

Northrop Grumman Los Angeles, CA (310) 553-6262

DDC Expands Power Solutions Capabilities with the Acquisition of Emrise Electronics Ltd.

Figure 2 FlightPro Gen III mission computer provides the H-1 helicopter with mission, weapons and video processing capabilities in a conduction-cooled box that can drive four independent, multi-function displays. a conduction-cooled, high-performance airborne computer capable of driving four independent, multi-function displays. Northrop Grumman will provide identical mission computers for the UH-1Y

and AH-1Z aircraft that make up the Marine Light Attack Helicopter Squadrons. This means increased commonality across multiple platforms through a shared integrated mission equipment package.

Data Device Corporation (DDC) has announced the acquisition of Emrise Corporation’s Electronic Devices Group, Emrise Electronics Ltd. Emrise Electronics Ltd is comprised of XCEL Power Systems Ltd and Pascall Electronics Ltd, international market leaders in high reliability power conversion products. Serving the aerospace, defense and industrial markets for more than 30 years, XCEL Power Systems and Pascall Electronics are focused on generating value


INSIDE TRACK for their customers by providing world-class custom and semi-custom power supply solutions. These power supply solutions support a broad range of military and civilian aerospace applications including radar systems, cockpit displays and in-flight entertainment. Vincent Buffa, President and CEO of DDC said the acquisition of EMRISE Electronics will broaden DDC’s power management offering and capabilities. The deal also leverages the synergy of DDC’s solid-state power controllers with XCEL and Pascall’s power supply technology. This acquisition expands DDC’s business base in the European market with best-inclass power conversion products, while reinforcing DDC’s position as a leading supplier of high reliability Connectivity, Power and Control solutions. Data Device Corp. Bohemia, NY (631) 567-5600

Saft Li-Ion Battery to Power ExoMars Rover as it Explores Mars Saft has signed a contract worth over one million Euros from Airbus Defence and Space Ltd (UK) to develop, qualify and test a specific lithium-ion (Li-ion) battery system to power the ExoMars Rover vehicle. The Rover is the key component of the ExoMars Programme, run jointly by the European Space Agency (ESA) and Roscosmos, the Russian Federal Space Agency. Thales Alenia Space Italia SpA is the ExoMars prime contractor. The ExoMars Rover’s power system will comprise solar panels capable of producing 1200 W-hours working in combination with Saft’s 1142 Wh (nominal) battery system (Figure 3). The system will store the energy generated by the solar

MILITARY MARKET WATCH Procurement and Modernization Spur Growth for Military Fixed Wing Market

Figure 3 This 300 kg ExoMars Rover will land on Mars before moving between a number of sites and drilling into the surface to capture samples for analysis by its onboard scientific instruments. panels to ensure uninterrupted operation during the Martian night. The ExoMars Rover battery system is based on Saft’s MP 176065 Integration xtd cells. A key advantage of these Li-ion cells is their compact, lightweight design that minimizes the overall battery mass. Furthermore, the cells have been developed to deliver high performance in demanding operating conditions, even when subject to extreme fluctuations in temperature from -40 to +85 degrees C. Saft is scheduled to deliver the battery system before the end of 2016 to meet ESA’s launch plans for 2018. Saft America Cockeysville, MD (410) 771-3200

Figure 4 Frost & Sullivan found that the fixed-wing military aircraft market earned revenues of $63.33 billion in 2014 and estimates this to reach $72.77 billion in 2023. Procurement and modernization programs designed to enhance air capabilities that support the ground and naval domains continue to be the major reason for growth of the global military fixed wing market, according to new analysis from Frost & Sullivan’s Global Military Fixed Wing Market Assessment. Next-generation platforms, including modern multirole combat and special mission aircrafts are likely to dominate the market for the coming ten years. Advanced integrated modular avionics and intelligence, surveillance and reconnaissance (ISR)-oriented upgrades will also remain prominent. Frost & Sullivan found that the market earned revenues of $63.33 billion in 2014 and estimates this to reach $72.77 billion in 2023 (Figure 4). The study covers the combat, trainer, utility and special mission application segments. The combat and special mission application segments will continue to be lucrative as air forces across the globe are looking to establish and enhance air-to-ground attack and ISR capabilities. For aerial troop transport and tactical intelligence gathering efforts, transport and surveillance aircrafts will also be used, according to Frost & Sullivan’s Aerospace & Defense Senior Research Analyst Arun Kumar Sampathkumar. “These activities will impose the need to upgrade and expand existing fleets as per requirements.” However, budget cuts will adversely impact defense spending in the West. Until the situation improves, the execution of major procurement programs will be delayed. Defense forces will resort to upgrade programs to meet their immediate needs and push their procurement commitments to the mid- and long-term. Additionally, offering a diverse set of on-board avionics to choose from will be welcomed by the defense forces and give a competitive edge to military fixed wing suppliers. Overall, seamless connectivity, high data throughput, and commonality of data structures will be the most sought-after avionics features. For more information on Frost & Sullivan’s new research please email Edyta Grabowska, Corporate Communications, at Frost & Sullivan, San Antonio, TX. (210) 348-1000.

COTS Journal | July 2015


SPECIAL FEATURE HPEC Systems Meet New Defense Priorities


COTS Journal | July 2015


HPEC Reworks Data Center Computing for Embedded Duties A clear definition of High Performance Embedded Computing (HPEC) remains elusive. But system developers are starting to appreciate the many-faceted benefits of applying data center server levels of computing to military embedded platforms. Jeff Child, Editor-in-Chief


f you ask any handful of embedded computing vendors in our industry to define High Performance Embedded Computing (HPEC) you’re not likely to get any consistent answer. For some it’s about highly dense arrays of GPGPUs as one approach. For other it’s accomplishing data-center levels computing with the use of server-class Xeon processors and all their support electronics. Still others will insist that an element of computing virtualization is needed that lets software programs function on massively parallel multiprocessing systems as if they’re on a single processor. Should HPEC also include any SBCs or systems using the latest and greatest laptop processors? While there’s really been no consensus reached in the past 12 months, a broad definition that fits with what our market offers is this: HPEC leverages technologies like VPX and rackmounted PCI Express to provide massive processing power for compute-intensive systems. Such systems strive to embed cutting-edge levels of throughput and processing into spaceconstrained systems handling more than a teraflop of data.

Xeon CPUs for Embedded Systems One of the key technologies for HPEC systems has been Intel’s Xeon family of processors. Xeon processors are a staple in the world of data center server systems. Some HPEC offerings also use all the I/O and memory technology used with Xeons in data-center type servers. Fit-

COTS Journal | July 2015



Figure 1 The Xeon-D combines industry standard x86 cores with two ports of integrated 10 GbE Intel Ethernet and integrated I/Os (PCIe, USB, SATA and other general purpose I/Os) on a single package.

ting nicely into that strategy, in March this year Intel announced its Xeon processor D product family, Xeon-D is the company’s first Xeon processor-based system-on-chip (SoC) (Figure 1). It’s expected to bring server class processing even closer to the demanding HPEC needs of military embedded systems. Over the past couple months a slew of embedded board vendors have announced or hinted at board-level solutions based on the Xeon-D. Built on Intel’s industry-leading 14nm process technology, the Intel Xeon processor D product family combines the performance and advanced intelligence of Intel Xeon processors with the size and power savings of an SoC. The 64-bit Xeon-D products deliver up to 3.4x faster performance per node1 and up to 1.7x better performance per watt when compared to the Intel Atom processor C2750, part of Intel’s second-generation 64-bit SoC product family. Intel launched 4- and 8-core microserver optimized SoCs in March, with a more comprehensive portfolio of network, storage and IoT SoCs targeted for availability in the second half of this year.

Board-Level Xeon-D Solutions The Xeon-D combines industry standard x86 cores with two ports of integrated 10 GbE Intel Ethernet and integrated I/Os (PCIe, USB, SATA and other general pur12

COTS Journal | July 2015

pose I/Os) on a single package. It operates at a thermal design point near 20 watts and supports up to 128 Gbytes of addressable memory. It provides support or error-correcting code memory, combined with enhanced hardware-based Intel Virtualization Technology and Intel Advanced Encryption Standard-New Instructions (AES-NI). So far Extreme Engineering, Mercury Systems and Curtiss Wright Defense Solutions have released OpenVPX SBCs based on Xeon-D with other vendors expected to follow suit. Extreme Engineering’s offering for example is the XPedite7670 3U OpenVPX REDI single board computer module (Figure 1). The board is a 3U OpenVPX REDI, single board computer with support for up to 8 Gbytes of DDR3-1600 ECC SDRAM. The XPedite7670 provides two 10 Gbit Ethernet interfaces configured as XAUI or 10GBASEKX4, and four Gbit Ethernet interfaces configured as two 1000BASE-BX/KX (SerDes) ports and two 10/100/1000BASE-T ports. A x4 PCIe 3.0 interface, routed to the backplane P1 connector, supports communication with peripheral devices, as well as a Non-Transparent Bridge for direct communication with another processor. This reduces SWaP-C for the system integrator by eliminating the need for a separate switch module in the system. Extreme Engineering announced 6U VPX version, the XCalibur4640 at the same time.

requirements provided by the US Air Force. Curtiss-Wright says it will benchmark and optimize its HPEC-based radar processing system design. The Curtiss-Wright design is based on the company’s Fabric40 rugged OpenVPX board and chassis products that deliver the industry’s first complete end-to-end system approach for integrating the 40 Gbps high-speed fabrics into aerospace and defense HPEC applications. GE Intelligent Platforms will leverage its HPEC and GPGPU technology for the program and will carry out its participation in the project at GE’s HPEC Center of Excellence in Billerica, MA. According to GE the award includes the development of a lab-based processor system that has a clear path to rugged deployment on US Air Force platforms.

Emphasis on Software and APIs A number of embedded computer vendors are pushing software as a key element of making HPEC work to its maximum level. It’s not enough just to have superfast hardware. Along those lines, GE’s Intelligent Platform last fall announced Release 6.1 of its AXISPro advanced multiprocessor application development environment. It’s designed to ease and speed the development of sophisticated applications for advanced HPEC applications. The new AXISmpi library provides an open standard message passing interface to enable application por-

HPEC for Next-Gen Radar The U.S. military is definitely demanding HPEC performance. An example is Next Generation Radar evaluation program organized by the U.S Air Force. The goal of this program is reportedly to assess the capability of cost-effective COTS hardware and software to perform airborne radar signal processing. Benchmarks provided by the US Air Force leverage advances in commercial high performance computing (HPC) software, such as OpenCL, VSIPL, FFTW, and MPI. The firms from our industry tapped to participate in this program are CurtissWright Defense Solutions and GE Intelligent Platforms. Under the program, CurtissWright, GE and a select group of COTS vendors will each benchmark their proposed multiprocessor High Performance Embedded Computing (HPEC) Radar processing architecture based on specifications and

Figure 2 Based on the Xeon-D, the XPedite7670 is a 3U OpenVPX REDI SBC with support for up to 8 Gbytes of DDR31600 ECC SDRAM, 10 Gbit Ethernet interfaces and four Gbit Ethernet interfaces as well as a x4 PCIe 3.0


Figure 3 The BoldHPC system can contain one or two ACPU-20 blades which include 1 or 2 Intel E5 v2 processors and up to two NVIDIA Kepler processors (or Intel Phi’s). The blades are cooled with direct hot liquid cooling that doesn’t require air conditioning and ventilation.

tability and scalability from server clusters to SWaP-C (size, weight, power and cost) sensitive embedded systems via the industry standard MPI application programming interface (API). Application developers can now target HPEC open system architectures and avoid vendor lock-in, while achieving the same efficient, low latency inter-process communication (IPC) already available with GE’s proprietary AXISFlow IPC middleware. It’s also important in HPEC system development to leverage the rich field of standard APIs available. By adopting HPC industry open standard APIs, middleware, and development tools in HPEC systems you can take advantage of the sheer size of the HPC supercomputer industry, which is funded by large commercial markets such as finance and high-end computer simulations. Those markets drive the growth of a large population of software programmers who are fluent in those very languages, such as MPI, CUDA, OpenCL, RoCE and OFED, that can be optimally leveraged in aerospace and defense system HPEC designs. Curtiss-Wright expands on this topic in its article “Software and APIs are Key to Military HPEC System Development” in this issue of COTS Journal.

Leveraging Data Server Software There’s an even further stake that software emphasis means to HPEC system development. If the computer architecture of an HPEC matches standard data center servers more exactly, they can take advan-

tage of the same software model used by those servers. In other words, when an embedded system uses all the common components that standard servers use---Intel CPUs, GPUs from NVIDA (or Intel) and all the I/O devices that those server companies support, suddenly you can use the drivers, operating systems, libraries and tools that are available for running on any standard Intel-processor white box server to run your embedded application. With server-like hardware you can leverage server-class existing software such as those available from Intel, NVIDA and you can get them through channels. Moreover, when a system looks like a sever from the software perspective, it can do the same networking and virtual machine computing just like any VMware-certified and KVMcertified server system. This software model saves lots of time and makes it easier for any software engineer or system integrator to get their application up and running.

the market that only remove heat from hot spots like the CPU or GPU. Curtiss-Wright Defense Solutions Ashburn, VA (703) 779-7800 Dynatem Mission Viejo, CA (800) 543-3830 Intel Santa Clara, CA (408) 765-8080 GE Intelligent Platforms Charlottesville, VA (800) 368-2738 Mercury Systems Chelmsford, MA (978) 967-1401

Water-Cooled Supercomputer HPEC For its part, Dynatem took that philosophy when developing its BoldHPC system, a fanless, 1U high, 19 inch rack mount computer that brings super computer performance to embedded applications (Figure 3). Supercomputing levels of performance need extreme levels of cooling technology. Eurotech already employs water-cooling technology in products like its HiVe WaterCooled HPC system. Eurotech’s Dynatem division adapted that technology for a system suited to the needs of military embedded applications and the result was BoldHPC. The system’s safe reliable water cooling enables greater density and performance, 1,000 times more effective than air cooling, less expensive than fans. The BoldHPC system can contain one or two ACPU-20 blades of which includes 1 or 2 Intel E5 v2 processors, up to two NVIDIA Kepler processors (or Intel Phi’s) and optional Altera Stratix FPGA Each blade can provide 3.3 Teraflops/s with an energy efficiency greater than 3.15 Gflops per Watt. The blades are cooled with direct hot liquid cooling that doesn’t require air conditioning and ventilation. Pervasive cooling is applied to every component of the board to maximize the cooling effectiveness. This is in contrast to other liquid cooling solutions on COTS Journal | July 2015


SPECIAL FEATURE HPEC Systems Meet New Defense Priorities

Software and APIs are Key to Military HPEC System Development Ultra-fast computing hardware for HPEC is getting easier to come by. But the most efficient path to success means leveraging the wealth of standard APIs and software from the HPC realm. Chad Augustine. Product Marketing Manager – Software Curtiss-Wright Defense Solutions


he military embedded computing industry’s first big step in bringing highly scalable supercomputer processing performance from the commercial High Performance Computing (HPC) world to rugged, deployed High Performance Embedded Computing (HPEC) architectures was the adoption in recent years of industry standard hardware devices and technologies from leading suppliers such as Intel, AMD, NVIDIA, and Mellanox that enabled 40 Gbit fabrics, such as Infiniband and 40 Gbit Ethernet, capable of supporting HPC throughput rates (Figure 1). The next big leap in embedded computing-based HPEC system development will be about software, not hardware. By leveraging proven, robust development tools from the supercomputing world, aerospace and defense embedded system integrators will gain access to best-of-class open architecture APIs and tools, including debuggers, profilers, and communication and vector math libraries, that will ease and improve the design and verification of multi-node systems while greatly improving their time-to-deployment. In today’s environment, embedded computing customers frequently develop their own costly middleware to layer on top of APIs provided by hardware vendors, to ensure flexibility and protect their system 14

COTS Journal | July 2015

Figure 1 Serving HPEC needs, Fabric40 switch and IO configurations seamlessly interoperate over the 40 Gb Ethernet and PCIe. An example Fabric40 board is VPX6-1958 a 6U OpenVPX SBC with 2.4 GHz 4th gen Haswell Core i7 Quad-Core 22nm processor.

designs from being locked into proprietary software architectures. Hardware vendors, by bringing the embedded computing approach to software APIs and development tools, by identifying and supporting proven open sourced software libraries, middleware, and tools on their VPX-based HPEC systems will provide a non-proprietary open standards model for system software integration that eliminates the need for time consuming and expensive software customization (Figure 2). Adopting leading HPC-industry software will enable aerospace and defense embedded computing

customers to better focus on their application development, to better fortify their differentiators and reduce development cycles.

Costly Software Development We’ve consistently seen that software is, by far, the most costly component of system development programs. Over the last five or so years, interaction with embedded computing customer software engineers, compared to interaction with hardware engineers, has increased as system integrators struggle to understand the implications of new hardware technologies from the soft-


Figure 2 With a pair of quad-core Core-i7 (Haswell) processors, featuring the updated AVX 2.0 instruction units and redesigned on-chip graphics execution units, the CHAMP-AV9 is the DSP multi-processing component of Curtiss-Wright’s HPEC solution set.

ware perspective. One of the main concerns of system integrators is how to embrace next generation hardware, via technology insertion, without detrimentally affecting the valuable, and often critical, code base that they’ve depended on, in many cases, for two or more decades. By moving to open APIs and using commercial supercomputing industry software standards, embedded computing system integrators will be better able to insert latest generation technologies and upgrade their legacy systems without having to re-invent the proverbial wheel. Even better, system integrators will gain increased flexibility by eliminating dependence on proprietary hardware drivers from a single vendor, through the use of open standard middleware supported by a wide range of embedded computing hardware suppliers. A non-trivial benefit of adopting HPC industry open standard APIs, middleware, and development tools in HPEC systems is the fact that these are the software standards that numerous college students are being taught today. The shear size of the HPC supercomputer industry, which services large commercial markets such as finance and high-end computer simulations, drives the growth of a large population of software programmers who are fluent in those very languages, such as MPI, CUDA, OpenCL, RoCE and OFED, that can be optimally leveraged in aerospace and defense system HPEC designs. By using the same industry standard software that students are learning in college, rather than developing

proprietary APIs and tools, embedded computing vendors and customers can tap the knowledge and expertise of this programmer population, without requiring them to learn custom APIs or a different way of doing things. The table in Figure 3 lists several key HPC/HPEC APIs and tools.

Leveraging HPC API Work The large and growing user base of HPC software will also result in HPEC designers having access to APIs and middleware with far greater robustness. In the HPC community, the number of users writing API code likely numbers in the tens of thousands. Compare that to today’s HPEC market, where in all likelihood the number of coders for a particular API probably ranges from the hundreds to the tens. The huge installed base of HPC users provides embedded computing users with significant “crowd sourcing” benefits, such as a far greater number of use cases and much more regression testing. The large amount of feedback from the HPC open source user community is also available on the Internet at no cost. This means that aerospace and defense HPEC designers can take advantage of the intense and rigorous development and testing that HPC architects need to support a 6,000 node supercomputer on their own 20 or 40-node embedded systems. Examples of the open source resources and knowledge bases that can be leveraged by embedded computing software engineers include:, and It’s only recently that significant adop-

tion of commercial HPC software into the HPEC realm has become truly viable. For embedded deployed defense applications one of the key issues has always been determinism, which results from a combination of high throughput and low latency. Because these applications are often deployed in SWaP-C constrained ground and airborne platforms, there is also an important physical factor to embedded computing hardware, a constraint that has not been historically associated with the rooms full of servers that support HPC computing.

Latency, Memory and More The typical HPC code used from the 1990s-2000s often required too large of a memory footprint to make it practical for use in an embedded computing system. While the older code’s throughput might have been fast enough, the latency was often too high to support the embedded computing application’s required determinism. This led to the rise in popularity of small footprint RTOSes in the aerospace and defense market. What’s changed more recently is that newer server level multi-core processors, such as Intel’s Xeon devices, are being increasingly used in newer commercial HPC applications, such as those found in the finance industry. These commercial applications share the same needs as some military applications (such as Electronic Warfare) for extremely low latency, which in banking and investment houses is often measured in nanoseconds. To support these more demanding HPC applications, a new class of software, such as profilers that support cluster computers, has emerged that are optimized for throughput, latency, and smaller memory footprints. What’s more, HPC software is also now increasingly coming under some of the same SWaP pressures as those commonly found in the embedded computing market. Massive HPC data centers, such as those used by Wall Street firms and the NSA, are more frequently bumping up against power limits. Local power companies are being stretched to the limit to provide the powerlines needed to support the racks of computers and air conditioning required by large scale server farms. As a result, supercomputer designers are pursuing efforts to reduce the size and power requirements of COTS Journal | July 2015


SPECIAL FEATURE their system architectures in order to deliver ever more PetaFLOPS of performance. These recent HPC system trends have all converged to benefit embedded computing designers, making it possible to identify and “cherry pick” best-of-class HPC software for use in embedded computing systems, rather than developing new software for our much smaller market.

Embracing Standards Avoids Risk Last, but not least, one of the greatest benefits of leveraging open standard HPC software in the embedded computing market is that it effectively removes the risk from developing large scale embedded computer clusters. We are now able to take advantage of the advances and successes of the HPC community, which is collectively focused daily on solving these problems. It’s time for embedded computing vendors and embedded system integrators to benefit from the vast array of existing open standard drivers, middleware, and libraries and the proven solutions for cluster-wide debugging tools, performance profiling, performance re-

HPC/HPEC Standard Software Resources CUDA (Nvidia)

De Facto Standard API


Open Standard API


Open Standard API


Open Standard API


Open Standard API


Open Standard API


Open Standard API


Open Standard API


Open Standard Hardware API


Open Standard Hardware API


Development and Testing Tools

Cluster Manager

Development and Testing Tools

Figure 3 Using the same industry standard software that students are learning in college lets you tap the knowledge and expertise of this programmer population, without requiring them to learn custom APIs.

ports, data flow performance analysis, and built-in-test tools that have already been developed for commercial use.

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OUR ALL STAR PANELISTS: Rob Wolborsky, Space and Naval Warfare (SPAWAR) Systems Command Dr. Robert Smith, Lockheed Martin Howard Pace, ViaSat Keith Smith, Northrop Grumman Will Fitzgerald, Space and Naval Warfare (SPAWAR) Systems Command

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COTS Journal | July 2015

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TECH RECON Military Data Recorder Technology

Military Data Recording Advances to Accommodate Data Deluge Thanks to high res video and other technologies but the number of military data sources are increasing at the same time has the sheer density of data is ramping up. Military data recording solutions are keeping pace with more channels and high capacities. Jeff Child, Editor-in-Chief


he high-bandwidth sensor platforms on manned recon aircraft, UAVs, satellites and other system are bringing in a deluge of data. In turn data recording systems are being tasked to manage and store massive amounts of data. There’s no doubt that military data storage has become more of a mission-critical function than ever. Data recorder vendors are winning new and upgrade programs in numerous programs, particularly in the airborne space. Along just such lines, last mouth Physical Optics Corporation (POC) received a follow-on Increment II production contract in the amount of $7.1 million from the Naval Air Systems Command (NAVAIR), Patuxent River, MD, for associated development, production and delivery of 31 Digital Data Set (DDS) Systems for the Navy’s T-45C trainer aircraft (Figure 1). Work begins in the Torrance, CA, facility immediately, and is to be completed by 5/31/17. With options for an additional 84 systems, the total contract value would exceed $18 million. The DDS physically replaces three legacy systems on the T-45C aircraft into a single highly advanced system. In addition to a number of enhancements such as ED-112 Crash Survivable Memory Unit (CSMU), DDS combines the Airborne Data Recorder, Signal Data Computer, Advanced 18

COTS Journal | July 2015

Figure 1 Digital Data Set (DDS) Systems physically replace three legacy systems on the T-45C aircraft into a single highly advanced system. Signal Data Computer, Airborne Video Cassette Recorder, and the Mission Data Loader into a single digital footprint while improving safety, reliability and performance with added functionality.

Video Data Recording on P-8A At a whole different scale of recorder size, Crystal Group recently announced that Boeing awarded the company with a contract extension to provide Video And Data Storage System (VADSS) units aboard the U.S. Navy’s P-8A Poseidon maritime patrol aircraft (Figure 2). Boeing supplies the P-8A

surveillance plane to the U.S. Navy. Under this contract extension, Crystal Group will provide Boeing with VADSS hardware to retrofit twenty-four low rate initial production aircraft that Boeing has already delivered to the U.S. Navy with installations beginning in 4Q 2015. The entire contract, including prior award to supply VADSS for Lots 4 and 5 of the P-8A production, is expected to complete in 4Q 2016. Crystal Group will provide Boeing with VADSS hardware to retrofit twenty-four low rate initial production aircraft that Boeing has already delivered to the U.S. Navy. VADSS is comprised of Crystal Group’s rugged, lightweight computer servers and storage devices that capture and process video data gathered from surveillance sensors onboard the aircraft. The company also designs and manufactures installationready rugged servers, displays, networking devices, embedded systems, and storage devices that fit critical applications in demanding environmental conditions.

Helicopter-Based Data Recording Helicopter based data recording requires a whole different level of ruggedization and SWaP reduction. Exemplifying that trend, TTTech this spring was awarded a sub-contract by General Dynamics UK to


Figure 2 VADSS storage system on the P-8A aircraft is comprised of rugged servers and storage devices that capture and process video data gathered from surveillance sensors onboard the aircraft.

provide ARINC 664 p7 end system cards for the Tactical Processor mission system equipment that will be installed onboard AgustaWestland’s AW101 Merlin Mk4/4a helicopters. The rugged end system cards increase the flexibility and functionality of General Dynamics UK’s mission system through the support of three traffic classes (Standard Ethernet, ARINC 664 p7 and Time-Triggered Ethernet SAE AS6802), with three channels at 10/100/1000 Mbit/s. The end systems are available in various form factors (PMC, XMC, PCI, PCIe, CPCI). TTTech’s AFDX and TTEthernet end system cards and switches for safety-, mission- and time-critical systems support deterministic real-time data communication with defined

Quality of Service (QoS) as well as bounded latency and jitter. TTTech’s end system cards will be used in General Dynamics UK’s mission system equipment, which includes the Tactical Processor system and a secure data recorder to provide increased performance and capability onboard the helicopters. This sub-contract is awarded as part of the Merlin Life Sustainment Programme (MLSP), which was awarded to AgustaWestland by the UK Ministry of Defence in January 2014 to convert 25 AW101 Merlin helicopters for maritime operations.

Data Recorder With Independent FPDP Links For military applications, there’s always demand for faster performance, high-channel count and increased capacity for data recorders. Pentek has addressed all three of those factor with a new addition to the Talon Value Series of recorders, the Model RTV 2602 Serial FPDP recording and playback system (Figure 3). This new recorder extends the Talon Value Series

of rackmount recorders that are optimized for laboratory operating environments. The RTV 2602 supports up to four independently clocked Serial FPDP links using copper or optical cables with single-mode or multimode fiber with flexible baud rate selection to support virtually all popular Serial FPDP interfaces. It is capable of both receiving and transmitting data over these links and supports real-time data storage to disk and playback from disk. Up to four channels can be recorded or played back simultaneously with an aggregate rate of up to 400 Mbytes/s. Providing 4 Terabytes of data storage, the six enterprise-class, hot-swappable front-panel disk drives can be easily replaced by empty drives when full. All Talon recorders are built on a Windows 7 Professional workstation and include Pentek’s SystemFlow software, featuring a GUI (graphical user interface), signal viewer, and API (Application Programming Interface). The GUI provides intuitive controls for out-of-the-box turn-key operation using point-and-click configuration management. Configurations are easily stored and recalled for single-click setup. Crystal Group Hiawatha, IA (319) 378-1636 Physical Optics Corp. Torrance, CA (310) 320-3088 Pentek Upper Saddle River, NJ (201) 818-5900 TTTech Computertechnik AG Vienna, Austria. +43 1 585 34 34-0

Figure 3 Providing 4 Terabytes of data storage, the RTV 2602 supports up to four independently clocked Serial FPDP links. Up to four channels can be recorded or played back simultaneously with an aggregate rate of up to 400 Mbytes/s. COTS Journal | July 2015


SYSTEM DEVELOPMENT Safety Critical Choices in Embedded Software

Layered Approach Enhances Security For Safety-Critical Software As military platforms gain more network connectivity, keeping system secure gets trickier. A layered software approach along with the correct type of hypervisors can help smooth the way. James Deutch, Product Specialist for LynxOS, Lynx Software Technologies


oday’s safety-critical embedded environments are becoming more connected to the outside world. The ongoing growth of the Internet and IoT solutions will further drive connectivity requirements for safety-critical systems for the foreseeable future. Aerospace and defense are just some of the vertical markets that will expand as the ability to interconnect and remotely work with devices grows. The benefits of being able to monitor and control safety-critical embedded devices are real and substantial. Remote monitoring and command-and-control of embedded safety-critical devices will benefit military applications—such as UAV surveillance and payload delivery (Figure 1). Device makers will be driven towards networking their safety-critical devices in their bids to be innovative and stay competitive. However, with this increase in connectivity, safety-critical systems developers will also need to be concerned with security in addition to safety-critical functionality. Developers of safety-critical embedded software can no longer consider the domain of security as being separate from the domain of functional safety. Any system interfaced to the outside world has the potential to expose security vulnerabilities. In particular, systems connected to the Internet and IoT need to be protected against specialized 20

COTS Journal | July 2015

Figure 1 General Atomic’s Predator XP UAV supports a variety of overland and maritime Intelligence, Surveillance, and Reconnaissance (ISR) missions worldwide.

targeted malware attacks as well as a whole world of hackers.

Safety and Security are Linked The tie between security and safety is also acknowledged by safety related process standards. When there is a potential

for security vulnerabilities, standards such as IEC61508/EN61508 (process), ISO26262 (automotive), IEC62304/EN62304 (medical), IEC62278/EN50128 (railways), and DO-178 (aerospace) require functional safety requirements to deal with them. Each of these process standards have requirements for


Embedded Safety Criticle Application

Basic Embedded System Design

thermore, once an attacker gets into the system through the network, the entire system is potentially exposed. Typical microkernel architectures that link applications with the kernel to produce a single binary executable, have no separation between user space and kernel space. Once a hacker gets into such a system, everything is exposed and open to exploitation.

Embedded OS




Embedded Safety Criticle Application Embedded OS

Layered Software Approach

Network Application

IPC Channel

Common Networked Embedded System Design

TCP/IP Stack






Figure 2 Basic and common networked military platforms.

function identification, specification, classification, design, development, and verification to show compliance with system safety requirements. Security vulnerabilities in safetycritical systems are not merely academic concepts. There are published examples of safety-critical systems found to be vulnerable to security design flaws. In 2011, security researcher Barnaby Jack devised an attack to wirelessly take control of Medtronic’s implantable insulin pumps, demonstrating how such a pump could release a fatal dose of insulin. In 2014, researchers from the University of Michigan were able to take control of a networked traffic signal system currently deployed in the United States due to a number of security flaws. In today’s networked world, Johnny down the street, or a hacker halfway around the world, is now a potential safety threat if he hacks into a medical device or the local traffic light system. With all that in mind, it’s useful to explore how a least privilege separation kernel can provide security protection to a connected safetycritical military platform, while maintain-

ing the deterministic behavior required of the safety-critical functionality.

A Common Design Approach First, let’s consider how to design a safety-critical military platform with networked monitoring. A common approach would be to take an embedded design using sensors and actuators, and simply add networking to the system. The safety-critical part would commonly be one application, and the networked part would be another. The two applications would then coordinate over an IPC mechanism. Figure 2 shows at a high level how a simple safety-critical embedded application might be made into a network monitored safetycritical application. From a security standpoint, the basic safety-critical system’s isolation makes it more secure. However, hackers can attack the network monitored system via the Internet and exploit weaknesses in the networked application, TCP/IP stack, device drivers, or the OS itself. Each of these could provide a large surface for attackers. Fur-

A layered software approach is a pragmatic way of addressing security concerns. However, safety-critical military platforms also require real-time deterministic behavior. Real-time deterministic behavior, or determinism, requires a bounded response time to events. If the system loses its bounded response time, it loses its determinism. In the layered software approach, it is important to ensure that determinism is maintained while security is enhanced. Choosing the wrong software layers can compromise both determinism and security. For the layered software approach, hypervisors provide better security for safetycritical military platforms. The hardware isolation and virtualization of hypervisors will potentially allow isolation of the safetycritical functionality from the rest of the system and protect it from security threats. Hypervisors are typically classified as Type-2, Type-1, or Type-0. A Type-2 hypervisor sits on an OS and provides virtualization for other OSes to sit on top of the hosting OS. A Type-1 hypervisor sits on top of bare metal and uses an assisting OS in its virtualization. The Type-1 hypervisor’s OS is less obvious, but still provides a dynamic memory manager, process model, dynamic scheduler, file system, network stack, device drivers, system API, application ABI, and so forth, just like the host OS for a Type-2 hypervisor. The typical desktop hypervisors are prime examples of Type-2 or Type-1 hypervisors.

Different Types of Hypervisors A Type-0 hypervisor sits on top of bare metal, but unlike a Type-1 hypervisor, it does not use an assisting OS. A least privilege separation kernel is a Type-0 hypervisor that’s used to efficiently partition the system’s resources between guests and then tightly control the data flows of information between them. It is designed with security COTS Journal | July 2015



Type-2 Hypervisor Guest OS 1

Host Applications

Guest OS 2


Guest OS N

Type-2 Hypervisor Host OS Hardware

Type-1 Hypervisor Guest OS 1

Guest OS 2

Guest OS N


Type-1 Hypervisor Host OS Hardware Type-0 (zero) Hypervisor Guest OS 1

Guest OS 2

••• •••

Guest OS N

Type-0 Hypervisor Hardware

Figure 3 The 3 different types of hypervisors.

and minimal performance impact as its primary objectives. Figure 3 shows the three types of hypervisors. The following sections examine how hypervisors might be used to protect our hypothetical network monitored safety-critical military platform. A hypervisor can be used to separate the two sets of application functionality – safety-critical and networked monitor. One virtual machine guest will be the safety-critical system, and the other virtual machine guest will provide the remote monitoring capabilities. A data channel will be used for inter-VM communication between the two VMs. The safety-critical system can then discard its TCP/IP stack. This will simultaneously remove a large attack 22

COTS Journal | July 2015

surface from the safety-critical system and simplify its design. Figure 4 shows how such a design might look with each of the three different types of hypervisors.

Type-2 Hypervisor Scenario In this scenario, because the networked monitoring system is connected to the Internet, the host OS is also connected to the Internet. A security flaw in the host OS, or one of its applications, can thus be exploited by a hacker and the very underpinnings of the safety-critical system will then be compromised. Essentially, the safety-critical system is exposed to the security vulnerabilities of the host OS and its applications—a very large potential attack surface.

Furthermore, the determinism of the safety-critical system will be lost. General purpose OSes, which are used to host Type-2 hypervisors, are non-deterministic. They are built with user experience in mind, not determinism. A general purpose OS will dedicate CPU cycles to lower priority applications in order to enhance the user experience and carry on background tasks. Deterministic systems always run the highest priority task to the exclusion of lower priority tasks. One cannot place a deterministic system on top of a non-deterministic system and expect it to retain its determinacy. Using a Type-2 hypervisor will not work. It neither improves security nor retains the determinacy our safety-critical system requires.

Type-1 Hypervisor Scenario In the Type-1 hypervisor scenario, the Type-1 hypervisor is not exposed to the potential security vulnerabilities of host applications like a Type-2 hypervisor. This gives it a reduced attack surface, which is a plus for the Type-1 hypervisor. However, a Type-1 hypervisor still has the assisting OS’ dynamic memory manager, process model, dynamic scheduler, file system, network stack, device drivers, system API, application ABI, and other components as potential security vulnerabilities. As far as the determinism of the safetycritical system goes, the same issues arise with a Type-1 hypervisor as with a Type-2 hypervisor. The Type-1 hypervisor’s reliance on the functionality of a general purpose OS makes it non-deterministic. The safety-critical system’s determinism is lost because it has been inside a non-deterministic environment.

Type-0 Hypervisor Scenario Obviously, the typical Type-2 and Type-1 hypervisors are not going to be able to provide our safety-critical military platform with the security and determinism it requires. What is needed is a hypervisor that’s primary functionality is to efficiently partition the system’s resources (e.g. CPU cores, I/O devices, and memory) between guests and then tightly control the data flows of information between them. Functionality like device drivers and networking need to be pushed up the stack into the guest OSes, allowing the hypervisor to reduce the amount of privileged code. When


we do these things, we then have a least privilege separation kernel. In the least privilege separation kernel’s scenario, the safety-critical military platform and networked monitoring system will again be placed within the hypervisor as separate guests. The least privilege separation kernel, being a Type-0 hypervisor, sits on top of bare metal and does not use an assisting OS for virtualization. That means there are no host OS applications, dynamic memory manager, process model, dynamic scheduler, file system, network stack, device drivers, system API, application ABI and so on to provide possible attack surfaces. Because the safety-critical system’s network stack has been removed, its communication to the outside world has been reduced to just its sensors, actuators, and the tightly controlled data channel. This reduces the safety-critical system’s attack surface to a bare minimum. Placing our safety-critical system inside a least privilege separation kernel isolates the safety-critical system, and thus improves the security of the design.

Design using Type-2 Hypervisor (Fails) Safety Critical System Host Applications

Internal VM Communication


COTS Journal | July 2015


Type-2 Hypervisor Host OS Hardware TCP/IP

Sensor Actuator

Design using Type-1 Hypervisor (Fails) Safety Critical System

Network Monitoring System

Internal VM Communication


Type-2 Hypervisor Host OS Hardware Sensor Actuator


Design using Type-0 Hypervisor (Fails) Safety Critical System

Network Monitoring System

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Type-2 Hypervisor

Dealing with Attacks What happens if the networked monitoring system is hacked or attacked? Because the least privilege separation kernel partitions the hardware among its guests, the networked monitoring system’s hardware is separate from the safety-critical system’s hardware. The networked monitoring system cannot access the safety-critical system’s hardware and resources. If the networked monitoring system is hacked or attacked, the safety-critical system continues on unimpeded. In addition, since the least privilege separation kernel only partitions the system’s hardware resources and provides a tightly controlled data channel, there are no drivers, scheduler, network stacks, or other attack surfaces for the compromised monitoring system to use to get into the least privilege separation kernel. Both the least privilege separation kernel and the safety-critical system are protected against the compromised networked monitoring system. As far as determinism goes, the least privilege separation kernel does not have a host OS’ or assisting OS’ scheduler, device drivers, network stack, etc., to get in

Network Monitoring System

Hardware Sensor Actuator


Figure 4 System design concepts using the 3 types of hypervisors

the way of the guests’ determinism. It can be both deterministic and tiny—consisting of as little as 25K lines of code. Running a safety-critical military platform within the deterministic least privilege separation kernel can maintain the safety-critical system’s determinism. Using a least privilege separation kernel, the safety-critical military platform can retain its determinism and have improved security through the reduction of its attack surface.

Isolation is Protection A least privilege separation kernel is primarily concerned with partitioning a system’s hardware resources among guests and tightly controlling data flows between them. It isolates the guest systems into separate virtual machines so they cannot reach

or interfere with each other. Furthermore, a least privilege separation kernel does not contain OS-style schedulers, kernel services, device drivers, file systems, network stacks, etc. which can be exploited to compromise a system. It can be as small as 25K lines of code, and be deterministic. Layering safety-critical software with a least privilege separation kernel is a viable method of providing the security a connected safety-critical military platform needs through system isolation, while maintaining the deterministic behavior required of the safety-critical functionality. Lynx Software Technologies San José, CA (408) 979-3900


OpenVPX Enjoys Busy Phase of Product and Standards Activity As it gains momentum from continuous new product rolls outs, OpenVPX has quickly secure its place as a critical technology for military systems. VITA standards activities in the past several months provide new advantages in system management, cooling and space-ready design. Jeff Child, Editor-in-Chief


penVPX has become entrenched as the natural choice of slot-card open architecture high-bandwidth, data-intensive military applications. Feeding those demands are a constantly growing ecosystem of vendors and product choices feeds this strong position VPX now claims. In the past 12 month there’s been a lot of standards and interoperability activity around OpenVPX. At the same time, a tidal wave of new generation OpenVPX products, maintaining its place as one of the most active product category in our market in terms of new product releases. On the interoperability front, last fall VITA completed a successful first VPX System Management Interoperability Workshop (VSM - IW) to test compliance of relevant VPX products to the VITA 46.11 System Management for VPX standard. In a VSM - IW, VITA member companies who build VPX chassis and modules that comply with VITA 46.11 come together to systematically test the interoperability of their chassis and module combinations. Last most ANSI/VITA 46.11-2015 achieved ratification. That standard replaces the VITA 46.11 Draft Standard for Trial Use (DSTU) that was adopted in late 2013. In the drive to full ANSI ratification, the VITA Standards Organization’s (VSO’s) VITA 46.11 working group did multi-company interoperability testing and intensive review of the DSTU. Meanwhile in November VITA announced 26

COTS Journal | July 2015

Figure 1 3U OpenVPX technology was chosen by BAE Systems for the US Army’s CETU (Common Embedded Training Unit). The CETU provides in-vehicle training and simulation on the Bradley Fighting Vehicle.

the ratification of the VIT 48. “Mechanical standard for electronic plug-in units using air-f lowby cooling technology” as ANSI/VITA 48.7-2014. This specification completed the VITA and ANSI processes reaching full recognition under guidance of the VITA Standards Organization (VSO). ANSI/VITA 48.7 defines a detailed mechanical implementation for Air Flow-By (AFB) cooling and sealing technologies applied to plug-in modules, backplanes, and sub-racks as defined in VPX (ANSI/VITA 46) and VPX REDI (ANSI/VITA 48).

And finally, this Spring VTA announced that VITA 78 “SpaceVPX Systems” reached ANSI recognition as ANSI/VITA 78.00 -2015. ANSI/ VITA 78 defines an open standard for creating high performance fault tolerant interoperable backplanes and modules to assemble electronic systems for spacecraft and other high availability applications. Such systems support a wide variety of use cases and potential markets across the aerospace and terrestrial communities. The standard leverages the OpenVPX standards family and the commercial infrastructure that supports these standards. In terms of design wins, there’s been a dip in publically announced VPX contract wins in the past couple years, but vendors say they’re happening. An example was last Fall’s announcement by GE’s Intelligent Platforms that it won a $2.6 million order from BAE Systems Platforms and Services for a quantity of its latest generation 3U VPX COTS Rugged Systems that deliver an advanced HPEC (High Performance Embedded Computing) capability. The COTS Rugged Systems will be deployed as part of the US Army’s CETU (Common Embedded Training Unit) which sees in-vehicle training and simulation incorporated into the Bradley Fighting Vehicle. Housed in a rugged, 5-slot enclosure, the system includes a GE 3U VPX single board computer featuring an Intel Core i7 processor and a rugged graphics board that takes advantage of the performance of an NVIDIA 384-core ‘Kepler’ GPU.

VPX Solid State Storage StorePak™ and SataPak™

3U or 6U VPX Ultra High Density Removable

StorePak™ and SataPak™ are single slot VPX removable SSD (solid state drive) modules that provide high density, high performance rugged solid state storage with a small SWaP footprint. StorePak and SataPak can be used standalone, or with a StoreEngine™ storage manager blade, and are ideal for high bandwidth data recording, file server, and general purpose DAS/RAID applications.


▪ Removable SSD Storage Module ▪ Up to 6 Terabytes per slot ▪ Up to 2.2 GBytes/s per slot ▪ PCIe or SATA host connectivity ▪ Hardware RAID 0/1 (PCIe version) ▪ Scalable & Expandable ▪ 100,000 module insertion cycles ▪ Air or conduction cooled


OpenVPX SBCs Roundup

SBC Puts NVIDIA GeForce GT 745M GPU to Parallel Processing Work

OpenVPX-based SBC Boasts 12-core QorIQ Processor

6U OpenVPX Card Has Stratix V FPGAs and ARM Cortex A8 CPU

The VPX3G10 from ADLINK Technology is a 3U VPX GPGPU) blade in single-slot form factor featuring the 384 core NVIDIA GeForce GT 745M GPU with high resolution and high performance graphics capabilities for defense and aerospace applications. The VPX3G10 features 2 Gbytes of GDDR5 memory, providing high-bandwidth access to data during "massively parallel" GPGPU algorithm processing.

The C112 from Aitech is a rugged, 6U single-slot VPX-based SBC with the latest Freescale 12-core QorIQ processor that provides integrated performance characteristics for enhanced processing in data-intensive rugged and defense computing environments. The C112 has been enhanced by including the new, low power, multi-core, multi-processor T4080 QorIQ with AltiVec technology.

• NVIDIA GeForce GT 745M GPU (Kepler architecture).

• Freescale QorIQ Multicore SoC Processor, 12/8/4 e6500 Dual Thread Cores (T4240/T4160/T4080), AltiVec Unit.

Bittware’s S5-6U-VPX (S56X) is a rugged 6U VPX card based on the high-bandwidth, power-efficient Altera Stratix V GX/GS FPGA. Designed for high-end applications, the Stratix V provides a high level of system integration and flexibility for I/O, routing, and processing. An ARM Cortex-A8 control processor provides a complete control plane interface; and a configurable 48-port multi-gigabit transceiver interface supports a variety of protocols, including Serial RapidIO, PCI Express, and 10GigE.

• 2 Gbytes of GDDR5 memory. • CUDA compute capability 3.0 for parallel computation and graphics processing. • High-resolution, high-performance platform for rugged video I/O and GPGPU applications. • Available in conduction cooled and air cooled versions. • Ideal for defense, radar, sonar, UAV and ground vehicles. ADLINK Technology San Jose, CA (408) 360-0200

FIND the products featured in this section and more at


COTS Journal | July 2015

• Two VITA 57 FMC sites for processing and I/O expansion.

• 4 Gbytes DDR3 SDRAM, in two banks; Up to 16 Gbytes flash disk mass storage.

• Two High density Stratix V GX/GS FPGAs.

• SATA 2.0 port, 2 USB ports, 10 serial ports, dual redundant MIL-STD-1553B ports, 16 discrete I/O lines.

• 800 MHz ARM Cortex-A8 control processor.

• VPX Core Fabric:10GbE(XAUI)\PCIe Gen2\SRIO. • Up to 6 Gigabit Ethernet ports • Two PMC/XMC sites. • Conduction and air-cooled versions. Aitech Defense Systems Chatsworth, CA (888) 248-3248

• 48 multi-Gigabit transceivers. • Up to 8 Gbytes on-board memory. • Board management controller for intelligent platform management. •I/O includes: GigE, SerDes, LVDS, JTAG, RS-232. Bittware Concord, NH (603) 226-0404


Our new “Data Sheet” style round-up format Links to the full data sheets for each of these products are posted on the online version of this section.

3U OpenVPX Blends QorIQ T4080 CPU and Crosspoint Switch

4-core 1.91 GHz Atom Processor Rides Conduction-Cooled SBC

Freescale T2080 Board Features Two Independent SBCs on a Single Card

The RIOV-2478 from CES is a 3U OpenVPX single board computer for airborne applications requiring conduction-cooled equipment. It is specifically designed for the most demanding applications, combining very high computing and flight-worthiness capabilities along with harsh environment criteria.. It combines a multi-core processor with modern interconnect high-speed links and an onboard Crosspoint switch. It features an eight-core QorIQ P3/P4 processor designed for combined data and control plane processing.

The TR D2x/msd-RCx from Concurrent Technologies is a rugged conductioncooled 3U VPX board based on the Intel Atom processor E3800 product family. The board is offered with two processor options: single-core for lowest power consumption and quad-core for enhanced performance.

Curtiss Wright Defense Solutions offers a dual-node Power Architecture OpenVPX card that provides two independent SBC nodes on a single 6U VPX board. The rugged VPX6-195 features dual Freescale 1.5 GHz quad-core T2080 processing nodes, each of which is provided with its own power, I/O, FPGA and XMC expansion site. This innovative processing engine is designed so that both of its SBC nodes are isolated and incapable of impacting the other.

• 3U OpenVPX form-factor (VITA 65). • Freescale QorIQ P4080 processor. • Dual 1/2/4 Gbyte DDR3 memory. • Crosspoint switch (PCIe x4, GbE, 10GbE). • 3x PCIe x4, 8x GbE, 2x 10GbE, 4x UART, 1x Aurora Debug.

• 3U VPX-REDI (VITA 48.0) processor board. • Conduction-cooled to VITA 48.2, conformally coated. • -40°C to +85°C operating temperature (at card edge). • I/O interfaces compatible with several OpenVPX profiles, • Intel Atom processor E3800 family up to 4-core 1.91 GHz. • 4 Gbytes DDR3L DRAM with ECC.

• One XMC site.

• 2 x SATA300 mass storage interface,; Up to 2 x serial ports; Up to 3 x USB 2.0 ports.

• Advanced Board Management Controller (aBMC).

• XMC module interface (x4 PCI Express Gen 2) with rear I/O.

CES (Creative Electronic Systems) Geneva, Switzerland +41 (0)22 884 51 00

Concurrent Technologies Woburn, MA (781) 933-5900

• 6U OpenVPX format, support for 2 OpenVPX slot profiles. • Dual processing node general purpose SBC. • Two Freescale T2080 Quad-core 64-bit Power Architecture with AltiVec at 1.5GHz. • Up to 8 Gbytes of DDR3 SDRAM per processing node. • Full complement of I/O per processing node - Ethernet, serial (RS-232 and RS422), USB 2.0, 10G Ethernet TTL and differential discretes. • 10Base-KX4 Ethernet data plane ports. Curtiss-Wright Defense Solutions Ashburn, VA (703) 779-7800

FIND the products featured in this section and more at

COTS Journal | July 2015



Core i7 3U OpenVPX SBC Sports Trusted Platform Module

3U OpenVPX REDI SBC Serves up Xeon-D Eight Core Processors

3U OpenVPX SBC is Based Latest ‘Broadwell’ Processor

Dynatem’s CPU-110-20 is a high performance SBC based on the 3U OpenVPX (VITA 65) form factor. Offered in both convection cooled and ruggedized conduction cooled variants, the CPU110-20 will meet the needs of numerous commercial and military applications requiring maximum processing power, low power consumption, and small physical footprint.

The XPedite7670 from Extreme Engineering is a high-performance, 3U VPX-REDI SBC based on the Xeon D processor. The Intel® Xeon D processor can provide up to eight Xeon-class cores in a single, power-efficient System-onChip (SoC) package. The board maximizes network performance with two 10 Gigabit Ethernet interfaces and four Gigabit Ethernet interfaces.

The SBC347A Rugged SBC from GE Intelligent Platforms features the high performance, highly integrated 5th Generation Intel Core i7 processor. The board is designed to meet the requirements of a wide range of rugged defense and aerospace programs. It offers extended temperature capability and a range of air- and conduction-cooled build levels.

• Intel Core i7-3517-UE (Ivy Bridge) at 2.8 GHz. • Supports up to 8 Gbytes DDR3 SDRAM.

• Supports Intel Xeon D processors ( formerly Broadwell-DE). Up to eight Xeon-class cores in a SoC package. Extended temperature support.

• Integrated Graphics Controller

• 3U VPX (VITA 46) module

• SATA, DVI/HDMI, XMC expansion, USB and dual 1 Gbit Ethernet interfaces.

• Compatible with multiple VITA 65 OpenVPX slot profiles.

• Full Trusted Computing Group (TCG) Trusted Platform Module (TPM) Version 1.2 compatibility.

• Conduction or air cooling.

• PMC/XMC/DXM site. • 3U VITA 65 OpenVPX. • Rugged/conduction cooled versions. Dynatem Mission Viejo, CA (800) 543-3830

FIND the products featured in this section and more at


COTS Journal | July 2015

• Up to 8 Gbytes of DDR3L-1600 ECC SDRAM in two channels. (16 GB of DDR4 in Q4). • XMC site; x8 PCIe backplane fabric interconnect/ • Two 10 Gbit Ethernet ports and Four Gbit Ethernet ports and; 4 SATA ports; XMC (P16) SATA port for storage mezzanine. Extreme Engineering Solutions Middleton, WI (608) 833-1155

• Single slot 3U VPX single board Computer. • 5th gen Core i7 ‘Broadwell’ quad core processor. • Two channels DDR3L SDRAM up to 16 Gbytes. • Up to 32 Gbytes NAND flash. • 2x 10GBASE-T ports; 1x DVI port; 3x SATA ports ; 2x COM ports; 4x USB ports; up to 8x GPIO. • Five levels of ruggedization (convection and conduction cooling variants). • AXIS and deployed test software. GE Intelligent Platforms Charlottesville, VA (800) 368-2738


2.4 GHz Xeon-based 6U VPX Server Features Full Ruggedization

6U OpenVPX Board Marries QorIQ and Dual Virtex-7 FPGAs

3U SBC Sports 8-core Broadwell DE Intel Xeon D Processor.

General Micro Systems VPXCO300 "Mongoose" is a rugged 6U VPX server designed to provide the highest level of server-class performance possible in a fully ruggedized, conduction-cooled, 6U-8HP Open VPX module operating up to -40°C to +85°C (0°C to +55°C standard). The board supports 10 physical CPU cores with HyperThreading for a total of 20 logical cores, each operating at up to 2.4GHz.

Interface Concept’s IC-FEP-VPX6b board is controlled by a QorIQ T1042 quadcore supporting four integrated 64bit e5500 Power Architecture processor cores with high-performance data path acceleration architecture (DPAA) and network peripheral interfaces required for demanding The boards two FPGAs are directly interconnected via 8 GTH lanes and 35 LVDS signals.

The Ensemble LDS3506 from Mercury Systems is a dense, 3U processing OpenVPX building block for high-compute, SWaPconstrained applications with a large front-end, low-latency FPGA capability that is ideally suited to EW, SIGINT and EO/IR sensor chain applications. It blends the latest general processing devices from Intel and most capable FPGA resources from Xilinx.

• Intel Xeon Ivy Bridge-EP CPU with 10 cores, each operating up to 2.4GHz.

• QorIQ processor T1042, e5500 quad core.

• Supports up to 128 Gbytes of DDR3 memory.

• Up to 4 Gbytes of DDR3L SDRAM with ECC.

• 2x 10 Gbit Ethernet ports; 4x USB 3.0 and 10x USB 2.0 ports; 5x SATA ports; Full HD-audio support; 2z serial ports with RS-232/422/485 and 8x general purpose I/O lines.

• VPX 6U / 4HP 1” board compliant with 6U module definitions of the VITA 46.0 standard.

• Fully compliant to OpenVPX 6U, VITA 46/47/48 standards. • Fully compliant to MIL-STD-810G, MILS-901D and DO-160D. • Operates at standard temp 0°C to +55°C or extended temp -40°C to +85°C. General Micro Systems Rancho Cucamonga, CA (909) 980-4863

• Available in air-cooled and conductioncooled grades. • Two Xilinx Virtex-7 XC7VX690T FPGAs. • 4 PCIe x4 ports; GTH ports; General purpose I/Os; 3 QorIQ Serdes; 4 Ethernet ports; 1 RS485/RS232 port; 2 USB 2.0 ports; FMC links. Interface Concept Quimper, France. +33 (0)2 98 57 30 30.

• 3U OpenVPX compliant VITA 65/46/48 (VPX-REDI) module. • 8-core Broadwell DE Intel Xeon D family server-class processor. • Xilinx UltraScale FPGA with dual x4 PCIe data plane and Ethernet control plane. • 256 Gflops peak processing power in a single slot. • Dual 10 Gbit Ethernet interfaces for sensor I/O or inter-processor communication. • x8 PCIe expansion plane for additional I/O or offload. • Air-cooled (lab), conduction-cooled and Air Flow-By package options. Mercury Systems Chelmsford, MA (978) 967-1401 FIND the products featured in this section and more at

COTS Journal | July 2015




X6-1000M PMC/XMC Module with Two 1 GSPS 12-bit A/Ds, Two 1 GSPS 16-bit DACs, Virtex 6 FPGA, 4 GB Memory and PCI/PCIe.

High-performance FMCs in various types


• A/D & D/A FMCs – up to 5.7 GSPS, multiple resolutions

PMC/XMC Module with Eight 250 MSPS 14-bit A/Ds, Virtex6 FPGA, and 4 GB Memory.

PEX6-COP PCI Express Desktop/Server Coprocessor with Virtex6 FPGA computing core and FMC IO site.

• RF FMCs – Wideband transceivers & more • Networking FMCs – dual or quad port, to 40 GbE speeds

VadaTech – Redefining Performance Density! Phone: (702)896-3337 Web:

Innovative Integration Phone: (805) 383-8994 Email: Web:


2U server with EXTREME power + cooling XIOS 2U has:

WITH JUST A COUPLE CLICKS. • See Instructional Videos • Shop Boards Online • Read Articles & More • Request a Quote


COTS Journal | July 2015

• Ten slots (PCIeGen2 x8) in a 2U chassis • 45W per slot with high-volume cooling • 1-2 Xeon processors • 1-4 removable disks See more at

Shared Memory Network Interfaces Introducing a Gigabit Speed, Low Latency, Shared Memory Network for Deterministic Applications • 2.125 Gbps optical loop network • Single-mode and multi-mode optical interfaces supported • Up to 256 Shared Memory Network Nodes • Sustained data rates up to 200 Mbyte/Sec • Up to 256 MB of Shared Memory • Device drivers for Windows, VxWorks, Linux, and LabVIEW ...with flexible hardware options and complete software support PCI

PCI Express

AIT is a division of

PXI Express



FIND the products featured in this section and more at


Platform Enables Blending of PCI Express or Microserver Cards Artesyn Embedded Technologies has launched the MaxCore platform, which enables users to mix Artesyn microserver cards, media processing acceleration PCI Express add-in cards, and third-party PCI Express cards, with enabling and third-party application software to create rack-mount appliances quickly and easily. The MaxCore platform integrates a highly dense and versatile hardware architecture, which can accommodate up to 30 Intel Xeon processor D devices in a 3U enclosure, with cloud infrastructure and management software based on open technologies. Traditional rack-mount servers assume a single host processor with a small number of PCI Express IO cards, or multiple independent server nodes with no or minimal local IO extension capability. The MaxCore platform can be flexibly configured to support any combination of up to 15 Artesyn microserver cards, media acceleration add-in cards or third-party PCI Express cards, connected without cables. Based on new PCI Express switching technology called ExpressFabric, the solution enables developers to implement multiple connected servers within the same enclosure. The integrator can create several independent server

domains in the same enclosure, multiple ‘cloudsin-a-box,’ or can allow independent processors to share PCI Express cards, such as a network I/O cards, which is not usually supported in computing architectures. Housed in a 3U rack-mountable enclosure, Artesyn’s MaxCore platform can operate from a 90-264 VAC or -48 VDC power source, and features redundant hot-swappable cooling fans and power supplies, making it suitable for deployment in telecom central office, network data center or IT equipment environments. Artesyn Embedded Technologies Tempe, AZ (888) 412-7832

COM Express Type 6 Module Sports 5th Gen Intel Core Processor

High Efficiency Quarter Brick DC-DC Converter Provides 150 W

Axiomtek has launched CEM880. The COM Express Type 6 module features 5th generation Intel Core processor (H-processor line), one onboard 4 Gbyte extended temperature DDR3L chip, and one 204-pin SO-DIMM DDR3L socket supporting up to 8 Gbytes. Following the latest PICMG Rev 2.1 specification, the Axiomtek CEM880 is designed for serial signaling protocols, including one PCIe x16 v3.0, eight PCIe x1, four SATA-600 with Intel Smart Response Technology, 1 GB Ethernet supporting Wake-on-LAN, HD audio, one LPC interface, one SPI interface, 4 channels in and out Digital I/O, eight USB 2.0, and four USB 3.0. Furthermore, hardware monitor, TPM 1.2, SMBus and Watchdog Timer are supported as well.

Calex has announced the introduction of the QSW DC/ DC converter. The QSW offers a wide 9 to 36 VDC input range with an isolated, precisely regulated 12 Volt output. The QSW achieves efficiency of 93 percent through the use of high efficiency synchronous rectification, advanced electronic circuitry, packaging and thermal design. The QSW operates at a fixed frequency and follows conservative component derating guidelines. The 93 percent efficiency rating eases the job of thermal management given the high power density of the compact 2.39- x 1.54- x 0.50-inch quarter brick package. This level of efficiency is unprecedented in a 9 to 36 VDC input quarter brick.

Axiomtek City of Industry, CA (626) 581-3232


COTS Journal | July 2015

Calex Concord, CA (925) 687-4411


XMC Board Pair Supports 10 Gbit Ethernet and 6 Gbps SAS/SATA Concurrent Technologies has released two XMC modules to provide integrators with a method of introducing 10 Gigabit Ethernet or 6 Gbps SAS/SATA ports into their existing or future systems. XMC modules are widely used to add functionality to a range of modular, open standards based form factor boards including VPX, VME and CompactPCI within the defense, security, telecommunications, scientific and industrial markets. For applications needing high speed networking connectivity, XM530/x22 (shown) provides two 10 Gigabit Ethernet ports. This module supports rear I/O connectivity making it suitable for deployment in harsh environments where boards are typically mounted inside a rugged enclosure with all external connectivity through suitable grade connectors. The conduction cooled version of XM 530/x22 is certified for operation between -40°C and +85°C, has a conformal coating for protection and has been tested to survive harsh levels of shock and vibration. XM SA1/001 is an XMC module with the capability to connect to four external SAS or SATA 6 Gbps drives via a convenient front panel connector. A typical use would be to mount XM SA1/001

on a Concurrent Technologies’ processor board giving the combined solution the ability to connect to the latest, high speed drives without the need for any rear transition modules. XM SA1/001 is expected to be used in a range of data recorders, database management and video security systems. Concurrent Technologies Woburn, MA (781) 933-5900



Avionics Databus Solutions

ARINC429 AFDX®/ARINC664P7 Fibre Channel ARINC825 ARINC818

Modules – Software – Systems

Solving all your Avionics Databus Needs – Right on Target.

AIM Office Contacts: AIM USA LLC - Trevose, PA AIM GmbH - Freiburg AIM GmbH - Munich Sales Office

COTS Journal | July 2015



Oscillator Boasts 3,650 MHz Operation and Excellent Linearity

Stackable FPGA Solution Mixes PCIe/104 OneBank and FMC Sundance has taken full advantage of the current generation of lowest-cost Xilinx Artix-7 family, integrating four-lanes of Gen2 PCIExpress and re-programmable logic using the free Xilinx Vivado 2015 tools and designed it onto the latest PC/104 form-factor, called OneBank. The EMC2-7A can use commercial, industrial or automotive graded Artix-7 FPGAs and is complimented with 1 Gbyte of DDR3 local storage, 32 Mbytes of Flash memory for storage/configurations and has 68x free differential I/O pins which are routed to a VITA57.1 FMC-LPC high-speed connector for bespoke interfaces. The EMC2-7A introduces two new dimensions of modularity to the PC/104 world with the introduction of a ‘cable-less-breakout’ concept and upgradeable SoM (Systemon-Modules). The ‘break-out’ solution removes the requirement for cabling from the EMC2 to the external world, and is implemented using the 100-way Samtec Razor Beam self-mating connector solution that breaks out the I/O to a low-cost connector board. The SoM modules are 40mm by 50mm and are also available without the EMC2 Carrier for integration into custom-unique solutions. Pricing for 1+ unit of EMC2-7A100 with the Artix-7-100 FPGA starts at US $1250.00; 100+ units below $650. Sundance Multiprocessor Technology Chesham. UK +44 1494 793167

Crystek's CVCO55CC-3650-3650 VCO with a control voltage range of 0.5 V to 4.5 V. This VCO features a typical phase noise of -108 dBc/Hz at 10 KHz offset and has excellent linearity. Output power is typically +7 dBm. Engineered and manufactured in the USA, the model CVCO55CC-3650-3650 is packaged in the industry-standard 0.5- x 0.5-inch SMD package. Input voltage is typically 8.0V, with a typical current consumption of 35 mA. Pulling and Pushing are minimized to 1.0 MHz and 0.2 MHz/V, respectively. Second harmonic suppression is -15 dBc typical. Crystek Ft. Myers, FL (239) 561-3311

FMC Board Marries Eight ADC Channels, 8 DAC Channels Innovative Integration has announced the FMC-Servo, a module featuring eight simultaneously sampling A/D and DACs with a flexible, low-jitter programmable time base. The key benefit of the FMCServo is the ability to create high-end system solutions in which a portion of a sophisticated control algorithm is embedded in an FPGA, which performs high-speed computations at the sample rate, while the remainder of the algorithm is performed by a microcontroller. Low latency, fast-settling successive-approximation A/Ds and DACs support real-time servo control applications. The programmable, highresolution input range supports direct interfacing to many sensors, while the buffered outputs are capable of directly driving many transducers. Front panel digital IO can be also be used as PWM or process controls. The FMC-Servo clock and trigger controls include support for consistent servo loop timing, counted frames, software triggering and external triggering. Support logic in VHDL is provided for integration with FPGA carrier cards. Specific support for Innovative carrier cards includes integration with Framework Logic tools that support VHDL and Matlab developers. The Matlab BSP supports real-time hardware-in-the-loop development using the graphical block diagram Simulink environment with Xilinx System Generator for the FMC integrated with the FPGA carrier card. Innovative Integration Simi Valley, CA (805) 578-4260

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COTS Journal | July 2015


Data Recorder Supports Four Independent Serial FPDP Links

Pentek has introduced a new addition to the Talon Value Series of recorders, the Model RTV 2602 Serial FPDP recording and playback system. This new recorder extends the Talon Value Series of rackmount recorders that are optimized for laboratory operating environments. The RTV 2602 supports up to four independently clocked Serial FPDP links using copper or optical cables with single-mode or multimode fiber with flexible baud rate selection to support virtually all popular Serial FPDP interfaces. It is capable of both receiving and transmitting data over these links and supports real-time data storage to disk and playback from disk. Up to four channels can be recorded or played back simultaneously with an aggregate rate of up to 400 Mbytes/s. Providing 4 Terabytes of data storage, the six enterprise-class, hot-swappable front-panel disk drives can be easily replaced by empty drives when full. All Talon recorders are built on a Windows 7 Professional workstation and include Pentek’s SystemFlow software, featuring a GUI (graphical user interface), signal viewer, and API (Application Programming Interface). The GUI provides intuitive controls for out-of-thebox turn-key operation using point-and-click configuration management. Configurations are easily stored and recalled for single-click setup. User settings to configure data format for the signal viewer provide a virtual oscilloscope and spectrum analyzer to monitor signals before, during and after data collection. The C-callable API allows users to integrate the recorder control into larger application systems. The Talon RTV 2602 Value Series recorder starts at $19,495. Optional GPS time and position stamping and IRIG-B time stamping are available. Connector options include SFP+ copper, LC single-mode optical or LC multi-mode optical. Pentek Upper Saddle River, NJ (201) 818-5900

The industry’s most trusted and widely used USB interfaces

Portable Avionics Databus Interfaces A reliable USB interface from Astronics Ballard Technology does it all – databus test,

· MIL-STD-1553, EBR 1553 · ARINC 429, 708, 717 · Serial, Discrete

analysis and simulation. Use it in the lab or in the field – it’s fully powered by a single USB port. Simply connect it to any available laptop, desktop or tablet PC and it’s ready to go. Add our CoPilot® interactive software for a complete easy-to-use solution.

NEW models with multiple protocols mean the best is now even better!

Get the best solution – all the protocols and channels you need in a single device or call 425-339-0281

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4/10/2015 12:28:07 PM

COTS Journal | July 2015



Multifunction Software Defined Synthetic Demos Tech Insertion

RADX Technologies demonstrated the technology insertion capabilities of the LibertyGT family of Modular, COTS, Multifunction Software Defined Synthetic Instruments (SDSI) at IEEE IMS2015 by demonstrating the insertion of a National Instruments PXIe-5668R 26.5 GHz Vector Signal Analyzer into a RADX LibertyGT 1211B (LGT1211B). This effectively extended the system’s upper measurement frequency range from 6 GHz to 26.5 GHz, with no impact on user developed Test Program Sets (TPS) or other user applications. Developed in collaboration with National Instruments, the LGT1211B is designed to replace multiple “boxed” RF and microwave test and measurement (T&M) instruments to dramatically reduce T&M Total Cost of Ownership (TCO) while simultaneously improving measurement throughput, the LGT1211B supports high-performance, high-throughput wireless communications, and T&M applications with a stimulus and measurement frequency range between 100 kHz to 6 GHz. The LGT1211B’s modular architecture combines an extensive library of RADX COTS Realtime Measurement Science Firmware and Software (MSFS) with a powerful collection of COTS NI PXI modules and LabVIEW system design software — all housed in a RADX patent-pending integrated, field-serviceoptimized benchtop PXIe enclosure equipped with a comprehensive RF Interface Unit (RFIU), Internal Connector Panel (ICP) and 1080p HD touchscreen display. The LGT1310B prototype demonstrated at IEEE IMS2015 includes the NI PXIe-5668R 26.5 GHz VSA that extends the upper measurement frequency range of the system to 26.5 GHz, will be officially announced in the near future. The LGT1311B, which will include extended measurement and stimulus frequency ranges above 6 GHz, will also be announced in the near future. RADX Technology Palo Alto, CA (765) 481-1430


COTS Journal | July 2015

Military DC-DC Power SuPPlieS VITA 62 Compliant High Efficiency Field Proven

 VITA 62 Compliant  High efficiency: 90% at full load  3U: 500W total output power  6U: 1000W and 800W total output power  Active current share through backplane  MIL-STD-461F, MIL-STD-704, and MIL-STD-810G Compliant  Qualified to the most stringent VITA-47 levels Made in the United States of America. 1-978-849-0600


FPGA Accelerator Card Delivers Sustained 3 Teraflops Performance

PrXMC Board Sports Atom Bay Trail CPU and Optional Cisco Routing

Nallatech has announced the 510T, an FPGA coprocessor designed to deliver ultimate performance per watt for compute-intensive datacenter applications. The 510T is a GPU-sized 16-lane PCIe 3.0 card featuring two of Altera’s new floating-point enabled Arria 10 FPGAs delivering up to sixteen times the performance of the previous generation. Applications can achieve a total sustained performance of up to 3 Teraflops. The 510T is available with an unprecedented 290 Gbyte/sec of peak external memory bandwidth configured as eight independent banks of DDR4 plus an ultra-fast Hybrid Memory Cube (HMC). The FPGA’s on-chip memory bandwidth is 14.4 Terabytes/s.

Curtiss-Wright Defense Solutions has introduced a new high performance, low-power quad-core Intel Atom (“Bay Trail”) E3845-based XMC Processor Mezzanine SBC. With a typical power consumption of only 15 W, the XMC-120 can be hosted on any 3U or 6U VPX module with an available VITA 42 XMC mezzanine site, such as an SBC, DSP processor, or VPX carrier card, to provide a single-slot compute solution. The XMC-120 is also available preintegrated with the Cisco Systems 5921 Embedded Services Router (ESR) Software, enabling system designers to deploy a single-slot solution that combines both Cisco network routing and Intel multicore processing.

Nallatech Camarillo, CA (805) 383-8997

Curtiss-Wright Defense Solutions Ashburn, VA (703) 779-7800

COTS and Safety Certifiable

Want to save time and money on safety-critical programs ? CES offers COTS boards and boxes designed according to RTCA DO-178C / DO-254 and delivered with off-the-shelf certification evidences to meet Design Assurance Level C (or below). Our COTS safety-certifiable products rely on 15 years of DAL experience and in-service DAL-A-certified products expertise. From board to system level, our products are designed following a top-down approach ensuring a seamless, safe and secure integration.


COTS Journal | July 2015

MFCC-8557 - Safety Certifiable processor XMC


30W 1- x 1-inch DC-DC Converters Offer 4:1 Input Range

Mini-ITX SBC Serves Up Intel Atom Braswell SoC

TDK Corporation has announced the TDK-Lambda 30W CCG30G series of DC-DC converters. Operating over a 4:1 input range, these highly efficient products are enclosed in a 1 inch by 1 inch six-sided shielded metal case. The CCG30S is available with 3.3V, 5V, 12V or 15V outputs and can operate from either a 9 to 36Vdc or 18 to 76Vdc input. The wide range enables inventory reduction programs as the converters can operate from either 12V and 24V or 24V and 48V nominal inputs without the need to stock two parts. With operating efficiencies of up to 91 percent, the CCG30S series will operate in ambient temperatures from -40 to +85 degrees C.

WIN Enterprises has announced the MB-73400 featuring the Intel Atom Braswell System on a Chip (SoC). MB73400 is a thin Mini-ITX form factor capable of supporting a wide range of low-profile OEM devices. It features strong serial I/O (1x RS232/422/485 and 5x RS232 through pin headers), and two Gbit Ethernet LAN links. Memory includes two DDR3L SO-DIMM s with up to 8 Gbytes of DRAM. Other I/O provided are 2x HDMI/24-bit LVDS, 1x SATA III, 4x USB 3.0, 2x USB 2.0 and 2x Mini-PCIe sockets. The board comes with a choice of three Intel Atom Braswell processors that range in performance from 2.0 to 2.4 GHz.

TDK-Lambda Americas San Diego, CA (619) 628 2885

WIN Enterprises Andover, MA (978) 688-2000

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COTS Journal | July 2015



Atom-Based, Fanless Embedded Box PC is IP67 Capable Extreme Engineering Solutions has announced the XPand6903, a rugged, sealed, compact, fanless, embedded box PC utilizing the Intel Atom E3800 family processor. The XPand6903 is designed specifically for Industrial PC (IPC), Human Machine Interface (HMI), industrial automation, military, and transportation applications. The sealed, IP67 capable design makes it ideal for environments where exposure to high humidity, moisture, or harsh chemicals is a concern. The XPand6903 includes DIN rail mounting hardware to simplify installation. The Intel Atom E3800 family processor offers up to four cores at 1.91 GHz. Internal solid-state storage is included for the operating system and application. Each of the two VGA video connectors has a USB link that supports the connection of a touch screen with a single cable. The XPand6903 provides additional connectors for Gigabit Ethernet, USB, and RS-232/422 serial ports. Other I/O options for the XPand6903 also are available, such as WLAN, cellular, GPS, DVI-D, and CAN bus. The XPand6903's power input supports a wide range of input voltages, from 12 to 28 volts. Additional power input voltages also may be supported by request. Extreme Engineering Solutions, Middleton, WI (608) 833-1155.


COTS Journal | July 2015

XMC Serves Up UltraScale FPGA and 8 Gbytes DRAM Alpha Data has announced the ADMXRC-KU1 is a high performance reconfigurable XMC (compliant to VITA Standard 42.0 and 42.3) based on the Xilinx UltraScale range of platform FPGAs. The ADM-XRC-KU1 features enhanced system monitoring, which allows the board to be managed by PCI Express or via USB. The board has builtin DMA engines, contained in the always-up PCIe host interface. The ADM-XRC-KU1 features 8 Gbytes of DDR4 memory in four independent banks, 20nm ASIC-class FPGA with up to 1.2 million logic gates, GTH max line rate of 16.375 Gb/s, LVDS max rate of 1600 Mbits/s, and can be ruggedized for conduction-cooled systems. Alpha Data Denver, CO (303) 954-8768

A32_COTSJour2.25x9.875_A32.qxd 6/2/15 3:03 PM


DC-DC Converters Exerciser Helps Boost Power Efficiency of PCIe Devices A new protocol exerciser offers a broad range of PCIe test tools for validating Gen1, Gen2 and Gen3 operation for all lane widths up to x16. The U4305B PCI Express protocol exerciser tools from Keysight Technologies address PCIe developers’ needs, including providing ways to test new technologies like Non-Volatile Memory Express (NVMe) and L1 substate operation. The U4305B exerciser is designed to verify these low-power implementations. A built-in test bench allows users to generate automated tests of PCIe or NVMe operations. The test bench comes with scripts that validate the operation from ASPM or PCI-PM L1 substates. These prewritten tests exercise each state to provide pass/fail results that report on control register operation as well as operation of each L1 substate entry/recovery. Engineers can configure the Keysight U4305B exerciser to provide subprotocol layer test and debug for legacy and next-generation PCIe devices. The U4305B exerciser for PCIe is an advanced traffic generator that developers can use to send and respond to TLP, DLLP and physical-layer packets to stimulate PCIe devices and systems. Prices start at $24,793.

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12-bit 80 Msample/s PCI Express Digitizer Operates on 4 Channels A new high-speed PCI Express digitizer features four simultaneously sampled 80 MS/s input channels with 12-bit resolution, 40 MHz bandwidth, and up to 1 GB DDR3 onboard memory. The PCIe-9814 from Adlink Technology delivers compellingly accurate high dynamic performance in 76 dB SFDR, 64 dB SNR, and -75 dB THD, with up to 640 MB/s data streaming and value added functionality, enhanced price/performance, and maximum optimization for radar testing, power management monitoring, and non-destructive testing. The PCIe-9814’s 80 MS/s sampling and 40 MHz signal bandwidth easily meet the requirements of medium frequency (0.1mHz to 30mHz) radar signal reception from IF radar receivers. The PCIe9814 provides external digital trigger input for synchronous trigger radar signaling, while three extra synchronous digital inputs receive radar synch pulse signals or GPS IRIG-B code to support radar signal markers or synchronous time stamping used in radar testing. The PCIe-9814’s FPGAbased 31-order FIR digital filter supports noise reduction when signal content is 20 MHz or less. Adlink Technology, San Jose, CA. (408) 360-0200.

Probe Adapter Enables Full Speed Debugging of NAND Flash BGAs A new Probe Adapter which allows high-speed testing of NAND Flash while accessing the signals using testers via test pads. Features of the PB-BGA132E-NANDFLASH-01from Ironwood Electronics include shortest possible trace length for maximum speed, low inductance, low capacitance, blind and buried via PCB design technology. This probe adapter is designed to interface 1mm pitch Ball Grid Array packages to SMT pads on the target PCB while bringing the signals out for probing. Ironwood’s PB-BGA132E-NANDFLASH-01 Probe Adapter consists of rigid flex PCB with solder balls on the bottom side. The probe adapter can be soldered to the target system board in place of BGA132, 1mm pitch, 11x17 array, 12mm x 18mm body using standard BGA soldering methods. NAND flash can be soldered on the top side of probe adapter that employs a flex wing design to deliver all data, address, control, and other signals to test pads on 0.4mm centers. The flex wing test pads are interfaced to logic analyzer or other test equipment using appropriate cable connector. The PB-BGA132E-NANDFLASH-01 adapter is priced at $2,400 in quantities of 1 to 10 parts. Ironwood Electronics, Eagan, MN. (952) 229-8200.

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COTS Journal | July 2015



ADVERTISERS INDEX GET CONNECTED WITH INTELLIGENT SYSTEMS SOURCE AND PURCHASABLE SOLUTIONS NOW Intelligent Systems Source is a new resource that gives you the power to compare, review and even purchase embedded computing products intelligently. To help you research SBCs, SOMs, COMs, Systems, or I/O boards, the Intelligent Systems Source website provides products, articles, and whitepapers from industry leading manufacturers---and it's even connected to the top 5 distributors. Go to Intelligent Systems Source now so you can start to locate, compare, and purchase the correct product for your needs.


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COTS Journal (ISSN#1526-4653) is published monthly at 905 Calle Amanecer, Suite 150, San Clemente, CA 92673. Periodicals Class postage paid at San Clemente and additional mailing offices. POSTMASTER: Send address changes to COTS Journal, 905 Calle Amanecer, Ste. 150, San Clemente, CA 92673.

COMING NEXT MONTH Special Feature: Pre-integrated Systems Address Technology Readiness Demands In parallel with the trend toward rugged box-level systems is another trend toward “pre-integrated subsystems.” These are defined as a set of embedded computing and I/O boards put together and delivered as a working system to provide a certain function but intended to be used in a military customer’s larger system. These help feed the military’s desire for complete systems that are at a high TRL (Technology Readiness Level). Some of these are functionspecific, whereas others are more generic computing/networking platforms. This section explores the forces driving this trend and the trade-offs between the two types of systems.

Tech Recon Signal Chain: Signal Chain: Rugged Storage: From RAID to SSDs

Throughout 2015 our Tech Recon feature delivers a series of sections that follow a sequential path hitting all the key technologies that are part of a signal chain. The August Signal Chain section looks at how as military systems continue to rely more and more on compute- and data-intensive software, the storage subsystem is now a mission-critical piece of the signal chain. This part 2 on the storage topic looks at the spectrum of storage solutions from SSDs to RAID systems.


COTS Journal | July 2015

System Development: Space-Qualified Electronics and Subsystems

With the Space Shuttle program no more and the commercial space industry taking the baton, the space electronics industry is in a period of transition. Feeding those systems, space-based semiconductors and board-level systems must be capable of withstanding everything from intense radiation due to high-energy atoms to bombardments from neutrons and other particles. Articles in this section explore the radiation concerns facing space designers, and update readers on radiation-hardened boards and subsystems as well as ASICs, FPGAs and power components designed for those applications.

Data Sheet: COM and COM Express Boards Roundup

The Computer-on-Module (COM) concept has found a solid and growing foothold in military embedded systems. COM Express adds high-speed fabric interconnects to the mix. COM boards provide a complete computing core that can be upgraded when needed, leaving the application-specific I/O on the baseboard. This Tech Focus section updates readers on these trends and provides a product album of representative COM and COM Express products.

July Product Spotlight HDB8228 HDEC Series Midsize Backplane – More Bandwith, lower latencies

High-Density Backplane of the Month Intelligent Systems Source (ISS) recognizes the Trenton Systems for its revolutionary new HDEC Backplane design . ISS is proud to help introduce the HDB8228 HDEC Series Midsize Backplane. Supporting up to eight PCI Express option cards and one dual processor is the building block for scalable military and industrial computers. Learn more at   Routing PCIe links directly to a backplane’s option card slots eliminates PCIe switch hops between the SHB and any of the system plug-in cards.  Eliminating switch hops can provide a 15.3% average bandwidth gain per option card slot compared to previous generation PICMG 1.3 backplane designs.  Compared to the 32GB/s aggregate slot bandwidth of a similar previous generation backplane design, the switchless design of the HDB8228 HDEC Series midsize backplane delivers a 5x bandwidth increase for an amazing 160GB/s of aggregate slot bandwidth!

For the entire backplane line:

COTS Journal’s



OVER 30,000

Year NAVAIR expects to conduct a test launching the first manned aircraft off the future USS Gerald R. Ford (CVN 78) using its Electromagnetic Aircraft Launch System (EMALS). June 16 marked the successful launch of the first test sled from the starboard bow catapult using EMALS. Hurling the dead-load sleds, which represent different aircraft weights, marks a significant testing milestone for the first new aircraft launch technology employed by the Navy in more than 60 years. The ship’s test data will be compared to land-based test data, and after adjustments, becomes the basis for test launching the first manned aircraft next year.

110.4 Million


Worth of the contract the U.S. Army awarded BAE Systems to convert 36 M88A1 recovery vehicles to the M88A2 Heavy Equipment Recovery Combat Utility Lift Evacuation Systems (HERCULES) configuration. The fleet of ABCT vehicles is getting heavier, making it increasingly important that the recovery fleet is upgraded to support it. The HERCULES, which provides recovery support to soldiers in the field, is the only vehicle able to recover the M1 Abrams tank and the heaviest mineresistant ambush protected (MRAP) variants in a combat environment.



Value that the global electronic warfare market is expect to reach by 2020 according to a new market research report, now available on ASDReports “Electronic Warfare Market by category, by technology, by Platforms (Airborne, Naval, Land, Unmanned), and by Geography - Forecast & Analysis to 2014 - 2020”. Starting in 2014 at $17.72 billion this market is expected to register a CAGR of 5.37%, to reach $24.25 Billion in 2020. The analysis includes the competitive scenario and geographic trends and opportunities in the United States, Europe, China, Canada, and Brazil. 46

COTS Journal | July 2015

Multiple times the acceleration of gravity at which test projectiles were launched during tests of General Atomics Electromagnetic Systems’ (GA-EMS) 3 megajoule Blitzer electromagnetic railgun. The week of test activity included marking the 100th successful launch from the railgun. Projectiles with onboard electronics survived the railgun launch environment in four consecutive tests. The electronics on-board the projectiles successfully measured in-bore accelerations and projectile dynamics, for several kilometers downrange, with the integral data link continuing to operate after the projectiles impacted the desert floor.


Speed at which solid launch abort motor can transport a spacecraft crew far from harm’s way should the need arise. Orbital ATK has signed a $98 million agreement with Lockheed Martin to provide the just such a launch abort motor for the Orion human spaceflight capsule’s Launch Abort System (LAS). The Orion spacecraft will launch aboard NASA’s Space Launch System (SLS), enabling humans to explore new deep space destinations. If an emergency were to occur at the launch pad, or during lift-off and ascent, the abort system would rapidly lift the capsule and crew away from the rocket.


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COTS Journal  

July 2015

COTS Journal  

July 2015