High-Density Storage Roundup
The Journal of Military Electronics & Computing
VME, VPX & cPCI LINE UP FOR
TECH UPGRADE DUTIES
PLUS: UAV Ground Control Systems Embrace Advanced Display Technologies
— Data Acq and Sensor Systems Volume 13 Number 8 August 2011
An RTC Group Publication
Ponder Optical Alternatives
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The Journal of Military Electronics & Computing
COTS (kots), n. 1. Commercial off-the-shelf. Terminology popularized in 1994 within U.S. DoD by SECDEF Wm. Perry’s “Perry Memo” that changed military industry purchasing and design guidelines, making Mil-Specs acceptable only by waiver. COTS is generally defined for technology, goods and services as: a) using commercial business practices and specifications, b) not developed under government funding, c) offered for sale to the general market, d) still must meet the program ORD. 2. Commercial business practices include the accepted practice of customerpaid minor modification to standard COTS products to meet the customer’s unique requirements. —Ant. When applied to the procurement of electronics for the U.S. Military, COTS is a procurement philosophy and does not imply commercial, office environment or any other durability grade. E.g., rad-hard components designed and offered for sale to the general market are COTS if they were developed by the company and not under government funding.
Tech Upgrade Programs Tap the Benefits of VME, VPX and cPCI
CONTENTS August 2011
SPECIAL FEATURE VME, VPX and cPCI in Tech Upgrade Programs
10 Tech Upgrade Programs Tap the Benefits of VME, VPX and cPCI Jeff Child
18 Tech Refresh Strategies Bolster New Battlefield Compute Workloads David Pursley, Kontron
26 Modular Upgrades Continue to Extend VME-Based Systems Andy Reddig, Tek Microsystems
6 Publisher’s Notebook Defense Policy: The SecDef’s Mission Plan? 8
The Inside Track
70 Editorial Recognition Technology Takes a Bow
Coming in September See Page 68
TECH RECON Display and Computing Trends for UAV Ground Control
32 UAV Ground Control Systems Leverage Improved Display Jeff Child
40 Enhancement Options for Military Display Applications Richard Paynton and Jeff Blake, Dontech
SYSTEM DEVELOPMENT Military Data Acquisition and Sensors
48 Optical Sensing Changes Rules for Military Structural Measurements Nathan Yang, National Instruments
TECHNOLOGY FOCUS High-Density Storage Subsystems
54 Military Data Storage Systems Enter the Terabyte Era Jeff Child
High-Density Storage Subsystems Roundup
Digital subscriptions available: cotsjournalonline.com
On The Cover: Both VME and VPX have been a part of the Continuous Electronics Enhancement Program (CEEP), the System Enhancement Program (SEP V2) and the more recent Abrams Evolutionary Design (AED) program for the Abrams tank. A recent upgrade includes VPX SBCs, a VPX XMC carrier, a VPX Ethernet switch and a VPX SATA solid-state drive. Shown here, a U.S. Marine Corps M1A1 Abrams tank prepares to depart a combat outpost in Afghanistan. (Marine Corps photo by Master Sgt. Christopher Matt)
Ruggedized 3U Fibre RP R RPC PC12 Channel PC RAID System Phoenix International designs and builds rugged COTS Data Storage Systems that plug and play in any application -- from Multi-Terabyte Fibre Channel RAID and Storage Area Network configurations to plug-in Solid State Disk Drive VME Storage Modules.
The Journal of Military Electronics & Computing
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HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, www.rtcgroup.com Editorial office Jeff Child, Editor-in-Chief 20A Northwest Blvd., PMB#137, Nashua, NH 03063 Phone: (603) 429-8301 Fax: (603) 424-8122 Published by THEâ€ˆRTCâ€ˆGROUP Copyright 2011, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.
AMD is ushering in a new era of embedded computing. The AMD Embedded G-Series processor is the world’s ﬁrst integrated circuit to combine a low-power CPU and a discrete-level GPU into a single embedded Accelerated Processing Unit (APU). Unprecedented level of graphics integration High performance multi-media content delivery Small form factor and power efﬁcient platform Learn more about new levels of performance in a compact BGA package at : www.amd.com/G-series Stop by AMD’s booth (#801) at ESC Boston to learn ﬁrst-hand about this new APU (accelerated processing unit) architecture and how it can be leveraged to help you deliver innovative low-power and value-oriented solutions for a variety of embedded applications. ©2011 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD Arrow logo and combinations thereof are trademarks of Advanced Micro Devices, Inc. DirectX is a registered trademark of Microsoft Corporation in the United States and other jurisdictions. Other names are for informational purposes and may be trademarks of their respective owners.
Notebook Defense Policy: The SecDef’s Mission Plan?
hen you read this there will have been an outcome to the August 2nd federal spending limit issue; more than likely a band-aid solution rather than anything long term or meaningful. For months this issue has been all consuming for the White House, which it should be. Until Leon Panetta’s assumption of the role of SecDef, Robert Gates carried out a defense policy that was a carryover from the previous administration and tweaked by the current President. Setting a defense policy is one of the more difficult things a President has to do. It’s much more difficult than setting policies on things like energy and the environment where if things don’t go exactly as planned most people won’t notice. A good defense policy is out there and in everyone’s sights every time something happens. As the President stated, “I have no higher priority than the safety and security of the American people.” Putting Secretary Panetta in a position to succeed in his new position, it is essential that he has proper marching orders like any new executive put in charge of an organization. The fact that for the last two months the administration and Congress have been all consumed by a debt ceiling deadline is no reason for not having a clear, publicly stated defense policy. Secretary Gates gave everyone lots of notice that he was retiring, and no matter who would finally be selected to fill his role, that person would need to have clear targets and goals in order to execute effectively. Secretary Panetta will have to be the driving force to execute the President’s proposed $400 billion cut in defense spending over the next few decades. Panetta will need to know what America’s priorities are for its safety and security so he can restructure the military to meet the country’s safety and security goals as well as its economic goals. By being given a decisive defense policy to work with, the SecDef would be able to use it as leverage when dealing with Congress, other government agencies, even other countries. A stated defense policy is not only essential for the military but also for the industries that support and supply the military establishment. If Star Wars is not part of the defense policy then contractors will not try to develop or sell Star Wars products to the military. If “boots on the ground” are less a part of the policy, then logistics suppliers will cut back and technology suppliers will ramp up. Decision statements in the policy like upgrades versus new programs, are statements of the type that our [ 6 ] COTS Journal August 2011
industry and prime contractors will react to. Right now everyone in the supplier side is second guessing and trying to defend established corporate policies and programs that were developed under the last administration. That’s something you don’t want to do in the best of economic times, let alone now. Except for his service in the military, Panetta does not have any DoD experience or reputation to rely on when dealing with the Pentagon establishment. Executing a significant change in the military’s mission and organization, and continuing efficiency changes Gates initiated will not be easy. Reducing the size of both in-service and civilian support personnel will not be viewed well by politicians. But that reduction is essential when the total support personnel is compared to actual number of warfighters. Meanwhile we need to review military retirement and benefits packages. Don’t get me wrong. No expense should be spared for any wounded personnel, or any decrease in benefits while personnel are deployed. Part of the defense policy should state how we obtain and pay for members in the active and reserve services and whether we should consider reinstating the draft. Secretary of Defense Leon Panetta has his work cut out for him: base closures, cutting useless internal administrative programs, getting the old guard brass to reinvent themselves, getting the military industrial machine to accept change, killing development programs that don’t fit the future, cyber attacks, personnel reform, fighting new conflicts like Libya…the list is endless. All eyes will be on the SecDef waiting for his first major decision and how he moves forward in cutting the fat and useless or unnecessary “stuff” out of the budget. No matter what decisions he makes there will be a group that will vehemently oppose them. Let’s see if he makes the ones that meet the goal where the highest priority is indeed the “safety and security of the American people”—followed by the people’s needs to spend less and get more.
Pete Yeatman, Publisher COTS Journal
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Inside Track General Dynamics Starts Production of JTRS HMS Radios for U.S. Army General Dynamics C4 Systems has received an order from the DoD for the Joint Tactical Radio System (JTRS) Handheld, Manpack, Small Form Fit (HMS) Rifleman radio (AN/PRC-154) and Manpack (AN/PRC155) radio. Following a recent Milestone C decision, the Low Rate Initial Production (LRIP) order, which has an initial value of approximately $56.4 million, calls for the production of 6,250 Rifleman and 100 Manpack radios and includes expenses for non-recurring startup costs, accessories, training, related equipment and supplies. The JTRS HMS networking radios are the first ground-domain radios that will be fielded by the U.S. military that meet the full suite of JTRS requirements. Department of Defense documents indicate that the Army plans to purchase more than 190,000 Rifleman and approximately 50,000 Manpack radios. JTRS HMS Rifleman radios (Figure 1) will enable soldiers on the battlefield to have secure, mobile voice, video and data communications capabilities that are similar to those available through commercial cellular networks. For the LRIP order, General Dynamics and Thales Communications will manufacture the Rifleman radios while General Dynamics and Rockwell Collins will build the Manpack radios. When the radios are approved for full rate production, the JTRS Acquisition Strategy states that at least two qualified vendors will compete for production. As designed, the JTRS HMS System Design and Development and Low Rate Initial Production contract efforts will yield two qualified vendors for each radio type.
Curtiss-Wright Acquires ACRA Control, Limited Curtiss-Wright Controls announced that it has acquired ACRA Control, Limited (ACRA) for approximately $61 million in cash. Headquartered in Dublin, Ireland, ACRA designs and manufactures data acquisition systems and networks, data recorders, and telemetry ground stations for the commercial aerospace and defense markets. ACRA will operate within the Integrated Sensing division of Curtiss-Wright Controls. Combining ACRA’s customizable modular technologies, engineering expertise and advanced product technologies with Curtiss-Wright Controls’ current recording and avionics solutions, will provide Aerospace [ 8 ] COTS Journal August 2011
and Defense customers with a fully integrated system, featuring enhanced data acquisition capabilities, airborne Ethernet data transmission and synchronization, and wireless download of data to ground stations. ACRA’s advanced Ethernet switch technology will enhance the value of Curtiss-Wright Controls’ systemlevel approach to C4ISR solutions. The company’s key technologies include modular data acquisition, solid state recorders, Ethernet switches / networking, wireless data transmission, telemetry ground stations, and ground station analysis software. Curtiss-Wright Controls Charlotte, NC. (704) 869-4600. [www.cwcontrols.com].
JTRS HMS Rifleman radios enable soldiers on the battlefield to have secure, mobile voice, video and data communications capabilities that are similar to those available through cellular networks. General Dynamics C4 Systems Scottsdale, AZ. (480) 441-3033. [www.gdc4s.com].
U.S. Marine Corps Awards BAE Systems $56 Million Contract for MRAP Upgrades BAE Systems received multiple awards from the U.S. Marine Corps totaling more than $56 million for five separate delivery orders for work on the RG-33 Mine Resistant Ambush Protected (MRAP) Indefinite Delivery/Indefinite Quantity (IDIQ) contract. The awards will provide upgrades for MRAP vehicles currently in the field. The RG-33 (Figure 2) Family of Vehicles (FOV) are highly survivable, mine-resistant vehicles capable of meeting multiple mission profiles with several mission-specific variants. BAE Systems received awards totaling
The RG-33 family of vehicles are highly survivable, mine-resistant vehicles capable of meeting multiple mission profiles with several mission-specific variants.
$17.7 million for the delivery of RG-33 SOCOM A1 and AUV vehicles and related equipment and services. Additional funding in the amount of $5.8 million was awarded for periodic maintenance and updates to the RG-33 FOV technical data package. A total of $14.2 million was awarded to provide instructor and field service personnel in support of vehicle operation and maintenance training and to support and maintain the fielded RG-33 vehicle fleet. It will also support the field upgrade of the RG-33 SOCOM A0 vehicle to the A1 configuration with independent suspension and other vehicle improvements. BAE Systems McLean, VA. (703) 847-5820. [www.baesystems.com].
U.S. Army Awards Power Supply Contract to Analytic Systems Analytic Systems announced that it has again been awarded the subcontract to manufacture the power supply (Figure 3) for the U.S. Armyâ€™s Modern Burner Unit (MBU) program through the Energy Solutions Division of Teleflex Canada. After an exhaustive evaluation of power supply manufacturers on both sides of the border, Teleflex selected Analytic Systems to manufacture the power supplies for the program. Two years of development and testing culminated in Analytic Systems initially being certified as the manufacturer and supplier of the MBU power supply in late 2002. Since then over 10,000 units are now in theatre and have enjoyed a less than 0.01% return rate. The MBU is the replacement for the M2 gasoline burner currently used in all field feeding
Since 2002 over 10,000 of these MBU power supplies are deployed in theatre with a return rate of less than 0.01%. systems. The MBU employs an automatic, closed circuit fueling system, which avoids spill hazards and eliminates the need to remove the burner for refueling, as with the pressurized fuel system of the M2. It has an electronic ignition, which saves time by eliminating the pre-heat period required with the M2 and reduces the hazards associated with lighting and carrying lit burners into the kitchen. It reduces the logistical burden and safety hazards of the M2 by burning the less volatile JP-8 fuel instead of gasoline. Analytic Systems Delta, British Columbia Canada (604) 946-9981. [www.analyticsystems.com].
Army AH-64D Is First Platform to Receive JTRS Net-Enabled Comms Capability Lockheed Martin has delivered the first secure Joint Tactical Radio to the U.S. Armyâ€™s AH-64D (Figure 4) Apache Avionics Integration Lab. The Airborne, Maritime/Fixed Station Joint Tactical Radio System (AMF JTRS) delivery included the Engineering Development Model (EDM) of the Joint Tactical Radio-Small Airborne two channel radio running the Link-
The AMF JTRS allows users to seamlessly share secure (NSA Type 1) voice, data and video communications, in real time. 16 waveform and 200w Link-16 power amplifier. AMF JTRS is designed to allow Airmen, Sailors, Marines and Soldiers to seamlessly share secure (NSA Type 1) voice, data and video communications, in real time. Once completely fielded, AMF JTRS will link more than 100 platforms, providing connectivity to areas where no communications infrastructure previously existed. Airmen and Sailors will be able to synchronize with the Soldiers in the foxhole, providing near instantaneous awareness of the combat environment. The delivery of this radio allows the Apache integration team to begin integrating the Joint Tactical Radio command and control functions onto their platform architecture. The Apache Avionics Integration Lab will use the EDM unit for software integration and testing for incorporation into the AH64D Block III upgrade. Lockheed Martin Bethesda, MD. (301) 897-6000. [www.lockheedmartin.com].
Event Calendar August 23
Real-Time & Embedded Computing Conference Irvine, CA www.rtecc.com August 25
Real-Time & Embedded Computing Conference San Diego, CA www.rtecc.com September 13
Real-Time & Embedded Computing Conference Ottawa, ON www.rtecc.com September 15
Real-Time & Embedded Computing Conference Montreal, QC www.rtecc.com October 11
Real-Time & Embedded Computing Conference Portland, OR www.rtecc.com October 13
Real-Time & Embedded Computing Conference Seattle, WA www.rtecc.com To list your event, email: email@example.com
August 2011 COTS Journal [ 9 ]
VME, VPX and cPCI in Tech Upgrade Programs
Tech Upgrade Programs Tap the Benefits of VME, VPX and cPCI Fitting the needs of many long design cycle military programs, VME and CompactPCI shine as upgradable slot-card technologies. New choices like VPX and CompactPCI Serial are meanwhile finding ways to provide smooth pathways to higher bandwidths. Jeff Child, Editor-in-Chief
[ 10 ] COTS Journal August 2011
mong the reasons for VME’s soaring success fabric-based VITA-standard boards enter the mix. in military systems is its unique ability to Often filling the role as the “cash cow” of the miliremain backward compatible and fatary embedded computer business, slot-card technology cilitate technology refresh in miliupgrade programs are continuing to do brisk business. Many tary programs. As new board of these upgrade programs go unannounced—at least in terms with the latest and greatest procesof whose products and what technology is used—and they’re often sor, memory and I/O can easily be not the sexy advanced cutting-edge programs that receive a lot of press. dropped in to a slot that could But that ability to insert new processing, memory and I/O functionality be decades old. CompactPCI on legacy platforms is exactly why the military has favored modular slot-card has followed in those form factors like VME in the first place. same footsteps. But upgrades become A Legacy of Tech Refresh Success trickier as new Tech refresh programs are the heart of much of the embedded computer business. Among the highest profile of these include the F-18 Advanced Multi-Purpose Display program; Bradley Vehicle Electronics Upgrade; B-52 mission computer upgrade; Aegis Guided Missile Destroyer Sonar Upgrade; B-2 Bomber Radar Upgrade; Boeing B-1B Bomber Avionics Upgrade; and the C-130 cockpit upgrade. Most all of these upgrade programs involve standards-based embedded computer solutions such as VME. The M1A1D version of the Abrams tank famously allowed future electronic growth by providing unpopulated VME card slots.
August 2011 COTS Journal [ 11 ]
The Abrams M1A2 SEPv2 tank comes with the Commander’s Independent Thermal Viewer, which allows the commander and gunner to track multiple targets. Here, M1A2 Abrams tanks ride the new rail spur on the Ordnance Campus at Fort Lee. Exemplifying VME’s ability to serve long deployment cycles is General Dynamics’ Continuous Electronic Enhancement Program (CEEP), part of the overall Abrams Tank Systems Enhancement Package (SEP) upgrade (Figure 1). CEEP integrates new technologies that will reduce future obsolescence issues and take advantage of improved processing and display capabilities. The SEP upgrade includes improved processors, color and high-resolution flat panel displays, increased memory capacity, and an open operating system that will allow for future technology growth. The processor side of that involved GE Intelligent Systems rugged PowerPC processor, graphics and communications products. This processor board is designed to accept two onboard mezzanine modules all in a single VME slot and will allow for improved capabilities in both crew operations and vehicle diagnostics.
New Processing Technology The days are now gone when VME was the only option for new military system designs. That said, its ability to accommodate new technologies opens the [ 12 ] COTS Journal August 2011
door for a healthy stream of technology refresh business. A host of deployed programs and long design cycle programs continue to demand VME SBC upgrades that drop into an existing slot with the latest and greatest processing technology. Feeding that need, vendors continue to roll out new VME boards that sport the latest and greatest processors and memory technology. A recent example along those lines was Themis Computer’s new XV2 (Figure 2) VME SBC released early this summer. The XV2 is based on the low-power Quad-Core Xeon L5518 processor clocked at 1.73 GHz, and Intel’s 3420 chipset used in high-performance Xeon servers. The L5518 memory controller supports ECC to maintain the highest system integrity, and provides the bandwidth necessary to support high-performance I/O. XV2 memory is expandable to 24 Gbytes of DDR III memory. The XV2 base configuration includes 3 Gbytes of DDR III memory, four Gigabit Ethernet ports, five SATA II ports, four SAS ports, eight USB 2.0 ports and two XMC/PMC slots. Since its introduction in 1981, the VMEbus standard has certainly satisfied
An example of new computing technology on VME is this XV2 VME SBC. The board is based on the low power, QuadCore Xeon L5518 processor clocked at 1.73 GHz, and Intel’s 3420 chipset used in high-performance Xeon servers. Memory is expandable to 24 Gbytes of DDR III DRAM.
the requirements of many defense systems. Successive generations of new processors provided more and more compute cycles, while VME bandwidth evolved in a similar fashion, from 40 Mbytes/s on the original VMEbus to 80 Mbytes/s, then 160 Mbytes/s, and finally 320 Mbytes/s on 2eSST. However, after a run of more than two decades, there weren’t any tricks left to squeeze more bandwidth out of the VME connector. The VXS standard (VITA 41), begun in March 2002 and ANSI-approved in May 2006, has extended the life of
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VMEbus, offering both increased bandwidth and a high level of board-level backward compatibility. An alternative is the VPX standard (VITA 46), with a different set of characteristics for system bandwidth and backward compatibility.
VXS Extends Bandwidth of VME Systems The VXS standard was developed to provide greater system bandwidth while maintaining enough backward compatibility to preserve the value of investments in VME board-level technology. VXS achieves this through an updated connector, and the addition of a switch fabric architecture. The VXS base specification describes two types of cards—payload and switch—and a corresponding type of backplane slot for each. For payload cards, supporting processing, memory and I/O, VXS retains the P1 and P2 5-row DIN connectors of the VME64x connector, providing compatibility with the P1/ P2 resident VME parallel bus and the P2 resident user-defined pins, which are often used to distribute system-specific I/O data streams. With a VXS backplane, system engineers can also carry forward VME64 cards in payload slots, without the need for a hybrid backplane. The more recent technology hurdle is the challenge of using older installed legacy VME subsystems while still embrac-
An SBC based on the newly ratified PICMG CPCI-S.0 CompactPCI Serial specification is the G20. It sports the 64-bit Intel Core i7 processor with a base processing speed of 2.53 GHz. The board supports a CompactPCI Serial mezzanine module that leads to the Ethernet interfaces specified in the standard to the backplane where they are implemented on CompactPCI Serial connector. ing the benefits of new architectures like OpenVPX. Billions have been invested in legacy VME systems, and it will be a long while before pure OpenVPX-only systems dominate. OpenVPX is expected to have a strong presence in military programs that have brand new embedded comput-
ing implementations—some of which already use VPX. But side-by-side will be a substantial number of hybrid systems— systems using both VME and VPX boards and subsystems. If a VPX system, for example, needs a piece of technology like an RF tuner, the system designer could implement a hybrid system that accommodates a VXS or VME version of the tuner. Hooks have been designed into the OpenVPX spec to enable such systems. Using a specialized bridge chip, it’s straightforward for board makers to bridge between OpenVPX and VME.
CompactPCI Not the New Kid Anymore With nearly two decades now under its belt, CompactPCI can claim to offer all the aspects that pass the test for military decision makers. And though cPCI isn’t ever expected to eclipse the legacy of VME in the military market, its niche remains solid. An expanding set of conductioncooled CompactPCI boards has emerged, some even from outside the usual crowd of conduction-cooled board makers. Among these are a wide collection of cPCI products that are available from a variety of vendors in every category including single board computers, I/O boards, slotcard power supplies, storage subsystems, mezzanine carriers, DSP engines and many others. The “Conduction-Cooled
1553 Boards & Display Systems Gallery Featuring the latest in 1553 Boards & Display Systems technology PCIe-Mini-1553
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[ 14cots1108_scv3.indd ] COTS Journal 1 August 2011
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Special Feature cPCI Boards Roundup” on the following pages showcases some examples of the current crop of conduction-cooled cPCI single board computer products. In many cases, this group of cPCI boards includes air-cooled versions that offer a companion conduction-cooled version that’s electronically an identical design. Over the years, the PCI Industrial Manufacturers Group (PICMG) developed performance upgrade paths for cPCI, such as PICMG 2.16 and CompactPCI Express.
A year ago PICMG adopted the PICMG 2.30 specification, called CompactPCI PlusIO. This new specification adds PCI Express, Ethernet, SATA, SAS and USB extensions to the CompactPCI family of specifications, while preserving PCI bus connectivity. The next phase of that effort is a second spec called CompactPCI Serial (PICMG CPCI-S.0) that defines systems built completely on CompactPCI Plus. In March PICMG announced the completion and adoption of the CompactPCI Se-
rial (CPCI-S.0) specification. The specification added greater support for serial point to point fabrics like PCI Express, SATA, Ethernet and USB in the classic CompactPCI form factor. An example SBC based on the newly ratified PICMG CPCI-S.0 CompactPCI Serial specification is the G20 (Figure 3) from MEN Micro. It uses the 64-bit Intel Core i7 processor with a base processing speed of 2.53 GHz that supports Intel Turbo Boost Hyperthreading technology to provide a maximum speed of 3.20 GHz. In addition to the standard, fast 8 Gbyte DDR3 ECC SDRAM soldered against shock and vibration, a CompactFlash and a microSD card slot connected to the G20 via one USB interface can extend memory capacities. MEN Micro also offers the GM1 CompactPCI Serial mezzanine module that leads four of the possible eight Ethernet interfaces specified in the standard to the backplane where they are implemented on CompactPCI Serial connector P6 assembled on the GM1. The attraction to CompactPCI— particularly in its 3U size—is striking in military applications where the mix of size constraints and demand for sturdy slot-card style ruggedness is called for. In many case, 3U CompactPCI is delivered to customers in complete integrated systems—a trend that melds nicely with the emergence of “stand-alone rugged box systems” as a product category among military embedded board vendors. Also fueling that trend is consolidation in this industry to the point where the larger corporations can provide the entire computer, I/O and enclosure needs themselves. GE Intelligent Platforms Charlottesville, VA. (800) 368-2738. [www.ge-ip.com]. MEN Micro Ambler, PA. (215) 542-9575. [www.menmicro.com]. Themis Computer Fremont, CA. (510) 252-0870. [www.themis.com].
[ 16Untitled-4 ] COTS1Journal August 2011
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VME, VPX and cPCI in Tech Upgrade Programs
Tech Refresh Strategies Bolster New Battlefield Compute Workloads Technology upgrades are leveraging VPX, CompactPCI and x86-based VME to minimize redesign, increase performance and reduce footprint. David Pursley, Product Line Manager Kontron
he ability to handle increasing volumes of data is dramatically impacting the modern battlefield, often outpacing the performance of legacy systems. The value of sharing this data—within and between systems—has become as central to warfare as aircraft and weapons. As a result, designers are consistently challenged to build and maintain systems that manage greater bandwidth, increased processing power and advanced security fueling network-centric military communications. Essential and long-established legacy designs must be evaluated from this perspective; therefore, tech refresh programs must address DoD mandates for achieving the most effective tactical capabilities in the face of budget challenges. At the same time, it has become a necessity that designers leverage the latest COTS-based advancements to improve legacy systems based on any number of criteria. Mitigating obsolescence of older systems may be a primary tech refresh strategy, but addressing requirement changes or integrating new technology benefits may be an even greater design challenge. The reactive approach to tech refresh considers only short-term issues such as obsolescence and procurement costs, whereas ideal system updates leverage COTS solutions to [ 18 ] COTS Journal August 2011
WIN-T is replacing Mobile Subscriber Equipment (MSE) as the on-the-move, high-speed backbone comms network for the Army. Shown here, a staff sergeant prepares to deploy to Iraq with a WIN-T Increment One KU trailer. reduce Size, Weight and Power (SWaP) while improving system performance, scalability, reliability and/or ruggedness. For designers and military OEMs, understanding the benefits and drawbacks of key military computing platforms is essential in guiding tech refresh choices down the right path and for the right reasons.
Strategic Tech Refresh In today’s integrated battlefield, refresh designs typically need to be put in
place quickly with minimum risk to the overall system or application. For example, programs such as Brigade Combat Team (BCT) Modernization, JTRS (Joint Tactical Radio System) and WIN-T (Warfighter Information Network – Tactical) (Figure 1), require ongoing improvements to maintain significantly greater bandwidth than earlier battlefield technologies. The military’s diverse applications are united by their demand for highly reliable networkcentric connectivity, and these systems range from weapons control to handheld GPS-based radios to those that handle the real-time sharing of surveillance data. Furthermore, the military has deployed systems with more and more sensors that deliver monumental amounts of important data that enable increased surveillance capabilities with a greater reliance on secure video imaging as an integral element to situational awareness. New applications such as mapping, secure chat and augmented reality are evolving from this available data, and further driving the need for effective networking and increased bandwidth. Ultimately, the trend of making these applications mobile for the individual soldier is proving highly viable and likely to continue at a greater pace. Performance and reliability are essential for newly deployed systems as well as older systems that must be migrated
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Special Feature and consistently enhanced to meet increasing levels of sophisticated data sharing, ruggedness and performance. For example, a naval destroyer could have a tech refresh between its completion and even its initial deployment. Once built, its physical systems such as sensors and radar towers would remain in place; however its computing platforms, or anything that falls within the definition of shipboard IT, would be refreshed prior to a lengthy period of service at sea. This ensures ongoing availability, performance and supportability throughout the system’s lifecycle. The question of what to achieve in the refresh is firmly application-dependent. Higher speed signaling, increased bandwidth, more sophisticated interfaces and I/O are all examples of added capabilities or features that may be the ideal focus of system updates. Every design must address the military’s requirements for evolving mission support, varying enemy threats and network-centric battle environments. Of current importance is the consideration for performance levels of deployed VME systems and establishing
a critical path forward toward increased bandwidth, performance and flexibility.
Optimum Platforms for Evolving Needs Upgrading VME-based systems often migrates a design toward VPX. Gaining momentum are new high-performance embedded computing (HPEC) (Figure 2) platforms that are VPX-based super computer-like systems. Kontron has just developed a new HPEC platform that accommodates up to 18 6U VPX processor nodes, powered by Dual Intel Core i7 processor computing nodes, and employing 36 tightly coupled processors. This type of system delivers massive processing power for compute-intensive DSP-based systems, and allows high-speed socketbased communication between blades by using multiple switched fabric interconnects within the backplane. The HPEC system employs the Kontron VX6060, a 6U dual processor node with 16 Gbyte soldered ECC RAM, which is already deployed as a cluster in several significant military technology programs including an airborne surveil-
lance system. Such a system is optimal for this type of application based on its ability to successfully integrate multiple high-performance COTS products to meet immense throughput and processing requirements in a space-constrained airborne system handling more than a teraflop of data. The VPX architecture represents a dramatic shift from VME communication protocols, with signals moving across Serial RapidIO, Gigabit Ethernet or PCI Express instead of the PCI or VMEbus. In turn, Kontron VXFabric, a simplified API that helps accelerate the design process, is an essential element in simplifying this type of migration. VXFabric addresses complexity by providing a thin layer of software that speeds application development through an API for IP-based data transport over PCI Express. VXFabric allows 6U OpenVPX systems to benefit from a performance boost and simplified data flow management in HPEC applications, including faster development and deployment of high memory architectures incorporating Intel Core i7 technology.
Refresh Goals Drive Choice of Platform Designers approach refresh plans from several perspectives, each of which impacts their choice of platform. Each approach may not be exclusively appropriate for a certain application or deployed environment, and designers will find it necessary to make trade-offs between performance, development time, cost and legacy compatibility. Minimizing design risk is a key issue and may drive the simplest type of upgrade, focused solely on increasing processing performance and strategically leaving all other system elements untouched. This may be ideal for a complex system that has already been deployed and is performing to expectations; the refresh may simply position the application for greater duty in terms of bandwidth and more effective data sharing in real time. Software porting is generally required even with only a new processor, however, this approach keeps software design issues to a minimum. A deeper level of upgrade might be considered for a refresh, for example, if there is a need to increase performance based on new software capabilities established since the system’s initial design or deployment. Additional features may now be required, such as higher CPU performance or increased memory. In this scenario, physical requirements may be flexible enough to allow a form factor change as warranted. For instance, an existing VME system that needs to incorporate higher bandwidth technologies may need to evolve to VPX, but that requires changes to be made in the backplane and all system cards, dramatically different than a simple CPU card upgrade and often a refresh that requires greater design expertise. Often refresh designs are used to achieve smaller footprints. In these scenarios, SWaP must be decreased in a particular integrated system in order to decrease SWaP levels within the overall system. This refresh approach is common when OEMs are working to introduce other systems elsewhere in the platform. Further, the SWaP reduction may improve safety of troops simply by enabling a more streamlined deployment. Consider a military convoy in a rear deployed position and tasked with setting up network-enabled command centers in remote locations. Extensive computer equipment, and supporting hardware such as generators and air conditioners, may be transported relatively easily and physical space is comparatively available based on numerous vehicles. Even so, if system size can be reduced, the number of vehicles could in turn be reduced—and shorter, faster convoys could decrease danger for the troops and still get the job done very effectively. This particular approach to tech refresh is essential in aerospace implementations. SWaP continues to be a primary issue, with published data evaluating costs and determining operational savings based on cost per ounce. Shipboard and ground vehicle applications have similar design issues, with designers working to pack more functionality into a finite space that can only be extended by reducing the footprint of existing systems. [ 20 ] COTS Journal August 2011
Special Feature The form factor is reduced, meeting the goal of SWaP reduction. At the same time, CompactPCI provides a proven computing paradigm that more closely resembles VME, at least in terms of how application software recognizes the hardware.
Using Refresh Points to Migrate to x86 Not all tech refreshes require, or even allow for, a change to the underlying computing architecture. For ex-
ample, the cost of an architectural redesign may be too high, or specialized I/O boards may be difficult to replace. In these cases, improvements in power (the lower, the better), performance (the higher, the better) and cost may be had by migrating to a new processor architecture. Designs can stay within VME and simply transition from PowerPC architectures to x86 by means of current products supporting Intelâ€™s latest processors.
Helping system developers migrate VME-based systems toward VPX are products like this HPEC platform. Its VXFabric approach allows high-speed socket-based communication between blades by using multiple switched fabric interconnects within the backplane. Potential applications include radar, sonar, SIGINT and video processing for various aircraft or UAV programs.
Independent Memory Access Each of the independently implemented dual-core Intel Core i7 processing nodes of the Kontron VX6060 have full access to 8 Gbyte ECC RAM. This enhanced memory capacity allows extensive application data to be hosted in low latency RAM without reloading data from high latency mass storage devices. Data buffering and inter-board dataflow also benefit from these extended memory resources, simplifying resource management and improving overall application performance, which are key issues in tech refresh initiatives for radar, sonar, imaging systems, airborne fighters and UAVs. Additional design options should be considered based on the complexities of the application-specific demands. VPX replaces the bus with a network-based protocol, frequently requiring a significant retooling of application software. Based on this challenge, designers working with 6U VME refreshes will find the 3U CompactPCI as a good alternative. Untitled-4 1
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Special Feature performance in existing designs based on the current line of either Intel or PowerPC VME SBCs without adjustments to the backplane. Demanding graphics applications, such as those found in command and control centers or sophisticated military surveillance applications, benefit from Open GL 2.1 support and accelerated DirectX 10 capabilities through better and faster visual display on up to two monitors.
Migrating Applications Figure 3
VME is the mainstay technology of the military’s tech fresh efforts. An example VME card using the latest and greatest compute technology is the VM6050, a 6U VME SBC with an Intel Core i7 processor. Users can upgrade compute performance without adjustments to the backplane. Designing systems around 6U VME boards allows the final system to span different CPU architectures, which helps reduce development times as well as improve time-to-market and
TCO of new applications. For example, the Kontron VM6050 (Figure 3), a 6U VME SBC, is fully compatible with all Kontron 6U VME products. OEMs can leverage x86 computing and graphics
When migrating any application, the existing system, including its integrated products, boards and end-use feature sets must be taken into consideration. Technologies implemented in the existing system will directly impact recommendations made by any new supplier. For example, if a design uses single instruction-multiple data (SIMD) processing, such as within PowerPC Architecture’s AltiVec extensions, designers need to maintain the same result with the Intel instruction set’s SSE (Streaming SIMD Extensions). I/O details are essen-
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Special Feature tial as well, since their options represent an incredibly diverse range of possibilities that will vary based on the communication and networking requirements of the system. Form factor requirements will determine the necessity of migrating to a smaller footprint or lower power threshold and still attempt to maintain the performance level. Re-certification of a system may still be necessary; but the ability to swap outdated boards for newer products cuts
back on development time and engineering resources. For example, a tech refresh for a UAV program required an upgrade to high definition imagery. To reduce the cost of replacing the numerous systems already fielded, the decision was made to stay with VME and simply upgrade the processor board. The use of the UHS P0 connector was all that was necessary to allow the high speed video to connect to the higher performance VME processor board over the existing backplane.
Tech Refresh Options Moving Forward Based on costs and DoD budget requirements, many large, legacy military programs consider remaining in VME the most viable option—replacing legacy VME chassis, I/O cards and software with products that now offer improved availability, performance and features based on x86 architectures. In turn, many embedded computing suppliers are competing with this mandate, developing high-performance VPX and CompactPCI systems in parallel that deliver a range of compatible tech refresh options designed for pure performance and reliability. Most importantly, system designers have a growing slate of competitive design options that allow them to be proactive in refreshing critical applications, focusing on minimizing redesign, improving performance or reducing footprint. Defense budgets are tight and the pressure is on—system deployments are being extended years longer than originally anticipated even while performance expectations are higher than ever. Designers of today’s systems are challenged with getting creative—understanding evolving standardized platforms and finding the best embedded computing options to keep military applications and systems performing to battlefield expectations. Even more critical, applications such as next-generation radars, targeting and surveillance systems for UAVs, and broadband electronic warfare monitoring and jamming systems are requiring greater focus on immense data processing and sharing. Operations such as enhanced resolution imagery, higher I/O rates, faster storage and higher performance communications mean massive increases in data flow and real-time data sharing among the armed forces. These enhanced communications, radar and imaging systems call for designers to develop tech refresh strategies that continue to push embedded computing technology solutions to ever higher, more creative and sophisticated levels. Kontron America Poway, CA. (858) 677-0877. [www.kontron.com].
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VME, VPX and cPCI in Tech Upgrade Programs
Modular Upgrades Continue to Extend VME-Based Systems The concept of Modular Open Systems Approach (MOSA) ranks as a major success story for military embedded computing. It enables complex systems to easily upgrade processing technology without recreating a whole system architecture. Andy Reddig, President and CTO Tek Microsystems
odular Open Systems Approach (MOSA) is one acronym used today to describe a systems approach to creating modular, upgradable systems. MOSA is increasingly important as the rate of change of technology continues to accelerate, driving the need to upgrade systems with new capabilities and higher performance several times during a deployed program’s lifecycle. One important piece of the MOSA puzzle is the use of standard form factors and buses such as the venerable VMEbus. By using standardized building blocks, MOSA-based systems can swap in higher performance modules that enhance performance without a complete systems redesign, allowing defense and intelligence systems to keep up with the latest technology through incremental, low risk upgrades. Although VME-based systems predate the MOSA initiative by 10 years or more, the principle of using modular building blocks based on open standards has always been a key part of good systems design. For many programs, the mission requirements have evolved to need better performance but can[ 26 ] COTS Journal August 2011
Digitizers with FPGA processing are a critical technology in many defense and intelligence systems including advanced radar systems. not support the high cost, schedule and risk impacts of a “forklift upgrade” of the entire system. Fortunately, the same technology elements that enable new architectures today can also be applied to enhance legacy systems. Embedded computing modules based on current
Analog-to-Digital Converter (ADC) and Field Programmable Gate Array (FPGA) technology can be used to upgrade legacy systems while maintaining compatibility with the existing architecture mechanically, electrically, and even at the software level.
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Legacy System Block Diagram VMEbus
Processing Slice 1
Processing Slices 2,3,4
Additional card sets (RF, ADC/FPGA, CPU)
This example FPGA-based legacy digitizer system consists of an RF stage, an ADC / FPGA stage and a CPU stage.
Where FPGAs Reign Digitizers with FPGA processing are used in a wide range of defense and intelligence systems, including signals intelligence (including ELINT and COMINT), electronic warfare and radar (Figure 1) applications. For the purposes of discussion let’s assume that the legacy system consists of three processing stages: an RF stage, which converts antenna inputs to IF signals; an ADC / FPGA stage, which digitizes the IF signals and performs signal processing on the data stream to extract narrowband data; and a CPU stage, which performs general purpose processing of the resulting data streams. The system accepts four antenna inputs, each of which is processed by a “slice,” which consists of an RF module, ADC / FPGA module, and CPU module. The system uses VMEbus for control and status, and Front Panel Data Port (FPDP) for communication between each ADC / FPGA card and its associated CPU. The system also contains other CPU and I/O [ 28 ] COTS Journal August 2011
resources for platform interfaces and so forth, but we are primarily concerned with the signal acquisition and processing portion of the system. A block diagram of this example legacy system is shown in Figure 2. Within each slice, the RF module accepts an external input and generates two channels of I/Q data, each of which has IF bandwidth of 40 MHz centered at 30 MHz (i.e., signal information from 10 to 50 MHz). The ADC / FPGA module then samples the four analog signals using 14-bit 105 MSPS ADC converters, and the resulting digital data streams are each processed by Xilinx Virtex-4 SX55 FPGAs with 512 DSP slices per FPGA. The resulting channelized data is then combined into a single 160 Mbyte/s data stream and transferred through a FPDP interface to the adjacent CPU module. The CPU module is a standard Single Board Computer (SBC) with two PMC sites, one of which is used for the FPDP interface.
In our example, the deployed system has been used successfully for some time but the end user needs improvements to deal with an increasingly complex and congested electromagnetic environment. The upgraded system will need both improved probability of detection of signals as well as the ability to prosecute more signals concurrently. These mission requirements imply system enhancements in terms of better ADC resolution, improved signal integrity in the form of Signal to Noise Ratio (SNR) and spurious free dynamic range (SFDR), and more channelization processors within both the FPGA processing stages and the CPU processing stages. This implies higher performance FPGA and CPU devices as well as a 2x improvement in throughput (to 320 Mbyte/s) between the FPGA and CPU processing stages. To minimize cost, schedule and risk, the upgrade will not change the CPU modules that are not used for signal processing, the other I/O modules, the backplane, the enclosure, or the RF modules. This implies that both the ADC / FPGA modules and the signal processing CPU modules will need to be replaced with new modules that are mechanically and electrically compatible with the existing 6U form factor and VMEbus interconnect while providing an option for higher throughput card-to-card data flow at the front panel. In this example each legacy ADC / FPGA module is replaced with a QuiXilica-V6 ADC / FPGA VME module. A block diagram of the QuiXilica-V6 card is shown in Figure 3.
Analog to Digital Converter Significant improvements have been made in ADC technology since the original system was deployed, resulting in a number of options from multiple vendors with significant improvements in effective number of bits, SNR and SFDR over the legacy implementation. Because the RF front end is not being upgraded, the analog IF bandwidth, center frequency and clock rates have not changed, and therefore the ADC sample rate does not need to be increased. The optimum ADC
choice is a device that offers the best available performance at the required sample rate. The upgraded module uses the Analog Devices AD9265, which is a 16-bit 105 MSPS converter with improved ENOB, SNR and SFDR over the legacy 14bit device. In the legacy ADC / FPGA module, each analog input channel is processed by a Xilinx Virtex-4 SX55 FPGA, each of which contains 24,576 logic slices and 512 DSP slices. Unfortunately, it is difficult to directly compare Virtex-4 and Virtex-6 slice counts, because the functionality of both logic and DSP slices changes with each FPGA generation, and the effective use of the hardware is also dependent on the signal processing algorithm being implemented. Based on analysis of representative signal processing applications, we have found the ratio of V4 to V6 slices to be between 39 and 89% for logic slices and between 50 and 100% for DSP slices, prior to any allowance for the faster clock rates supported by V6 devices. After normalizing to V6 slices, each V4 SX55 therefore contains between 9,585 and 21,873 logic slices and between 256 and 512 DSP slices. The upgraded system has three Virtex-6 FPGAs across 4 analog channels, and each FPGA can be populated with either SX315 or SX475 devices. The resulting FPGA density per channel is shown in Table 1.
Front Panel Interconnect The legacy system uses Front Panel Data Port (FPDP) to provide a 160 Mbyte/s interconnect between the ADC / FPGA module and the associated CPU module. The FPDP interface is a built-in part of the ADC / FPGA module and is implemented using an off-the-shelf PMC I/O module on the CPU module. The FPDP interfaces are connected using a short ribbon cable on the front panel between the two modules. The upgraded system replaces the FPDP I/O module with a Serial FPDP module that uses fiber optic connections. Each fiber is capable of supporting up to 247 Mbytes/s for a total data transfer capability of just under 1 Gbyte/s. The upgraded ADC / FPGA module has a CXP
fiber optic module on the front panel that supports 12 separate fibers. This can be used to provide four fibers to the adjacent CPU module, retaining eight fibers for future expansion if needed. Serial FPDP also provides built-in support for a “copy” mode, which allows the FPGA-to-CPU data to be forwarded to an external system for recording or diagnostic purposes. Because Serial FPDP uses high-speed fiber instead of ribbon cables, the recording system can be located up to 20 meters away from the deployed system and the copy mode function can be implemented without affecting the FPGA-to-CPU data flow.
Legacy VME Interface The legacy system uses the VMEbus interface for control and status purposes, allowing the CPU resources to control and monitor all of the cards in the system over the VMEbus backplane. The upgraded system is required to continue using VMEbus for control and status functions and to minimize changes to the control software. The upgraded ADC / FPGA module supports a VMEbus A32:D32 slave interface, allowing the existing control infrastructure and software to be largely reused. The VMEbus implementation uses an FPGA-based VME interface core, which maps VMEbus data transfer cycles to separate address regions that are assigned to the three onboard Virtex-6 FPGAs. As the control processor performs VMEbus read and write cycles, the transaction is accepted by the interface core, transferred to the target FPGA through a high-speed serial link, and then the user firmware responds to the cycle. This architecture allows user firmware to emulate existing register maps in many applications, avoiding the need to modify legacy software.
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Gbit Ethernet as External Interface The legacy system uses Gigabit Ethernet as an external interface for control and status purposes. The upgraded system has additional Gigabit Ethernet ports available on the signal processing CPU modules and adds a Gigabit Ethernet switch to the chassis to enable a more
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August 2011 COTS Journal [ 29 ] Untitled-9 1
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Upgraded System Block Diagram DDR X2
ADC Analog Inputs (4)
ADC Virtex-6 FPGA DDR X2
ADC Analog Inputs (4)
Gigabit Ethernet VMEbus Serial Link Gigabit Ethernet Link
In the system example each legacy ADC / FPGA module is replaced with one of these QuiXilica-V6 ADC / FPGA VME modules. It is mechanically and electrically compatible with the existing 6U form factor and VMEbus interconnect while providing an option for higher throughput card-to-card data flow at the front panel. FPGA Processing Density Configuration
V6 Logic Slices per Channel
V6 DSP Slices per Channel
Legacy V4 SX55
9,585 to 21,873
256 to 512
By upgrading to new advanced FPGAs, the resulting boost in density per channel is dramatic.
network-enabled architecture for future technology insertions. The upgraded ADC / FPGA module supports Gigabit Ethernet connections to the front panel, the P2 backplane connector using a Rear Transition Module, and the P0 backplane connector if a VXS backplane is used. These network interfaces are all connected internally to an onboard Gigabit Ethernet switch, which provides network interfaces to the system controller and to each Virtex-6 FPGA device. This allows future expansion to a network-based control plane as an alternative to the VMEbus without additional hardware. [ 30 ] COTS Journal August 2011
The upgraded ADC / FPGA module has six banks of DDR3 memory available with total capacity of 5 Gbytes and total throughput of 32 Gbytes/s. One of the upgraded firmware functions uses the memory to implement a â€œsnapshotâ€? mode, which acquires a large block of raw analog input data and then transmits the data over the Gigabit Ethernet network to a support processor. This improves the built-in-test and diagnostic capabilities of the system without requiring additional CPU bandwidth or impacting normal operation. The legacy system is deployed in configurations that support between one and
four RF inputs, each with a processing slice of three modules (RF, ADC / FPGA and CPU). For some missions, the signal processing workload requires the additional capability of the upgraded FPGA and CPU modules, which results in the same three module architecture for each slice. For other missions, the signal processing workload is roughly the same as the legacy system, which allows one FPGA or CPU module to support two processing slices. With eight analog channels and 12 fibers per ADC / FPGA module, the upgraded module can be used for either one or two slices, and forward all of the required output data to either one or two CPUs with appropriate fiber optic cabling. This allows the user to mix and match ADC / FPGA and CPU modules as required for different application requirements while maintaining commonality across systems and optimizing size, weight and power of each configuration. Modular Open Systems Approach (MOSA) is the latest name for the philosophy of using modular building blocks based on open standards to build deployed systems that can be upgraded over time. While many new systems today are based on the latest architectures such as VXS and OpenVPX, there are still requirements to upgrade legacy systems and also to architect new systems that reuse legacy components such as VMEbased RF tuners. The same ADC and FPGA technology that enables the newest open standards can also be deployed through VME-compatible COTS modules to incrementally upgrade legacy systems while retaining compatibility with existing components and infrastructure. This enables an evolutionary approach to technology refresh, which lowers cost, schedule and performance risk without compromising the advantages of using the latest ADC and FPGA technology to improve mission capability. TEK Microsystems Chelmsford, MA. (978) 244-9200. [www.tekmicro.com].
Display and Computing Trends for UAV Ground Control
UAV Ground Control Systems Leverage Improved Display Ground control station designs are looking to advanced display subsystems to enable an unprecedented level of real-time situational awareness and command control.
Jeff Child Editor-in-Chief
AV Ground Control systems represent a focal point of advanced display and computing technology. The systems need real-time performance and sophisticated video and graphics processing. Meanwhile, the display subsystems in these systems need to display complex sets of real-time information. System architectures like ATCA and others have emerged as solutions for UAV Ground Control designs. This section compares the trends and products that meet the unique needs of these critical military systems. Command centers—both facility-based and mobile-based—along with UAV control stations, are making use of advanced display systems that do an unprecedented level of real-time situational awareness and command control. An example of an advanced UAV ground station design is AAI Corporation’s Universal Ground Control Station (UGCS) (Figure 1), which controls UAVs. AAI Corp.’s UGCS architecture meets U.S. Army and joint services interoperability requirements, as well as UAS joint information exchange capabilities for command, control, communications, computers, intelligence,
[ 32 ] COTS Journal August 2011
AAI’s Universal Ground Control Station offers a net-centric design, all-digital Tactical Common Data Link for data transmission, increased bandwidth and data security, weapons control, easy-to-read displays and up to 30 days of digitally archived data. surveillance and reconnaissance, or C4ISR. The system is designed for U.S. joint services interoperability require-
ments, including simultaneous mission control of multiple unmanned aircraft.
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[ 34Untitled-3 ] COTS1Journal August 2011
Earlier this year Saft received an order for lithium-ion (Li-ion) batteries from AAI Corporation to supply back-up power for its UGCS. The 28V batteries are capable of integrated charging, an innovative feature that strengthens and simplifies the powering system. The high-energy, yet low-weight batteries have a capacity of 100 amp/hours and are made up of 16 VL 52E cells in a 2P8S configuration. The batteries will provide emergency back-up power for a flight-critical function of the UGCS. In the event of a power failure, the battery will activate, allowing the UGCS to carry out its UAV control mission. The batteries accept universal AC input and provide 28V DC output. While simplifying and reducing the size of the system, the Integrated Charger Battery (ICB) eliminates the need for an additional power source to charge the battery. ICB capability is a unique technology that Saft will apply to other systems in the future. Another advanced ground control system is the Ground Control station for
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