SPECIFICATIONS UPDATE support and provide compatibility with two distinct SoC architectures – not only ARM, but also x86. With ARM, for example, the connector must guarantee a high degree of signal integrity as required by the high-frequency serial interfaces, as well as support a parallel TFT display, MIPI display interface, camera interfaces, multiple SPI links, and SDIO interfaces. At the same time, it must offer full compatibility with x86 requirements such as support for multiple USB and PCI Express lanes, and support for the LPC bus. Based on three years of valuable market feedback from a broad range of developers and users, SGET successfully updated the original specification. (See Table 1 below.) As part of its policy of continuous improvement, members recommended a variety of modifications and enhancements. Specifically, they identified interfaces which were rarely used or considered nearly outdated; these have now been removed from the specification. These little-used interfaces include the parallel camera interface, parallel display interface, PCI Express presence and clock request signals, alternate function block, SPDIF, one I2S (out of three), and the eMMC interface to the carrier. The new pinout version maintains compatibility with the V1.1 pinout as much as possible. Accordingly, previously under-utilized V1.1 pins have been repurposed for new interfaces: In particular, the parallel LCD interface offers almost 50 pins that have been repurposed to DP++, the second Ethernet port, and the upgraded dualchannel LVDS. The overall guiding principal was that there should be no damage if a V1.1-compliant module is placed into a V2.0-compliant carrier, or vice-versa if a V2.0-compliant module is placed into a V1.1-compliant carrier. Developers can still
SMARC 2.0 – WHAT’S NEW Added Interfaces
2nd channel LVDS 2nd Ethernet IEEE1588 trigger signals (software definable pins) 4th PCI Express lane Extra USB ports (6x USB 2.0 + 2x USB SS signals now) x86 power management signals eSPI DP++ Video Interface Total
2x 24 Bit LVDS / eDP 4 channel / MIPI DSI 4 channel HDMI / DP++ DP++ Other Changes
Added RF connector option Changed Module EEPROM from I2C_PM to I2C_GP Added power sequencing details Removed Interfaces
Parallel camera interface Parallel Display interface PCI Express presence and clock request signals Alternate function block SPDIF
count on SMARC 2.0 support for 1x SATA, 2x CAN, 1x SDIO, 12x GPIO, 1x HDMI, 4x UART, 4x I2C, and 1x SPI. ❚❚ The new version V2.0 will repurpose selected V1.1 pins that are underused for new interfaces in order to keep the compatibility with the V1.1 pins. ❚❚ New interfaces include a second channel LVDS, a second Ethernet port, IEEE1588 trigger signals, a fourth PCI Express Lane, extra USB ports (now up to 6x USB 2.0 + 2x USB SS signals), x86 power management signals, eSPI, and DP++. ❚❚ Three digital displays: As primary display, 2 x 24-bit LVDS or eDP (four channels) or MIPI DSI (four channels) can be used; the secondary display can either be HDMI or DP++, and the third display can be DP++. Meeting broader application needs SMARC 2.0 enables manufacturers to make more sophisticated products for its customers, and offers the features necessary to create the Internet of Things (IoT) applications of the future. For example, the second gigabit Ethernet (GbE) port allows designers to more easily develop simple gateway solutions. In addition, wireless connectivity can be enabled with the Version 2.0 optional RF connector. Ultra-low-power applications now get the benefit of full HD display support from the second LVDS channel. Furthermore, with the DP++ (dual-mode DisplayPort) interface that supports resolutions up to Ultra HD with 3,840 by 2,160 pixels makes state-of-the-art multimedia-based systems possible in mobile devices. Utilizing the DP++ interface allows systems integrators to connect DisplayPort, HDMI, and DVI displays. The dual-channel LVDS capabilities in Version 2.0 provide the ability to drive either two low-resolution displays or a single high-resolution display supporting up to 1,920 by 1,200 pixels at 60 Hz depending upon the processor used.
eMMC 1 of 3 I2S Table 1
8 y
There is also support for additional PCI Express (PCIe) and USB ports to streamline the process of connecting
Spring 2017 PC/104 and Small Form Factors Resource Guide www.smallformfactors.com