VME and Critical Systems - 2008 Buyers Guide by kwitte

www.vmecritical.com

Features Defining standards: Intuition behind VITA 40 14 December 2008 Volume 26 Number 5

By Craig Hartley, Sun Microsystems, Inc.

Hardware: NAS in the forefront

Columns Editor’s foreword

In 2008, software out-innovates hardware

MIL/COTS rises to new heights

By Ray Alderman

VITA standards update

VITA 57.1 recognized by ANSI, new standards brew

Blade-level NAS enables rugged reliability, availability in critical systems By Steve Gudknecht, ACT/Technico

By Chris A. Ciufo

VITA news

Seeing the light: VITA 40 standardizes status indicators

Special: GPUs – Hardware/software faceoff 20

Designing a safety-certifiable OpenGL software GPU By Mark Snyder, Quantum3D, Inc.

By John Rynearson

VITA standards activity chart

Technology: On-chip debug gets it right

Departments Editor’s Choice

By Steve Griffith, Aeroflex Colorado Springs

Events Components for Military & Space Electronics (CMSE) Conference Feb. 9-12, 2009 • San Diego, CA www.cti-us.com AFCEA International West 2009 Feb. 11-13, 2009 • San Diego, CA www.afcea.org

On THe cOver: Image generation technology rendered in a software-based GPU recreates a realistic visual scene. Even better, the code can be run on multiple CPU types and certified for mission- and life-critical applications. This technology is also put to good use within the aircraft on cockpit multifunction displays featuring sensor outputs, real-time video, digital maps, synthetic vision, and flight instruments. See article on page 20. (Image courtesy of Quantum3D, Inc.) All registered brands and trademarks within VME and Critical Systems magazine are the property of their respective owners. © 2008 OpenSystems Media © 2008 VME and Critical Systems

On-chip debug units maximize real-time embedded systems

Buyer’s Guide 28

VME and Critical Systems Annual Buyer’s Guide

E-letter www.vmecritical.com/eletter › Static analysis and the impact of the target architecture By Paul Anderson, GrammaTech, Inc.

› Serial RapidIO addresses design challenges in critical embedded systems By Kashif Hasni, Tundra Semiconductor Corporation

› Bringing multicore computing to VME By Doug Sandy, Emerson Network Power

Web resources Subscribe to the magazine or E-letter Live industry news Submit new products http://submit.opensystemsmedia.com

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VME and Critical Systems / December 2008

A D V E R T I S E R I N F O R M AT I O N

ADVERTISER INFORMATION Page Advertiser/Ad title 29 2 22 11 39 3 18 40 43 44 7 9 5 21 32 41 25 27 13 17 19 31 28 37 42 26 38 10 23 15

3M – Open your eyes Acromag, Inc. – Simply powerful. Powerfully simple. ACT/Technico – Embedded box level solution #538 AIM-USA – 1553 and 429 embedded interfaces Alphi Technology Corporation – Modular solutions for MIL-STD-1553 Annapolis Micro Systems, Inc. – WILDSTAR 5 BittWare, Inc. – COTS compliant Concurrent Technologies, Inc. – x86 processor boards Data Device Corp. (DDC) – MIL-STD-1553/ ARINC 429 Dynatem, Inc. – Core-Duo/Core 2 Duo Elma Electronic – Cutting it close doesn’t cut it Excalibur Systems, Inc. – Dense? GE Fanuc Intelligent Platforms, Inc. – Barriers were made to be broken Highland Technology – Precision signal generation Hybricon Corp. – Providing complete rugged solutions Hypertronics – Protect Interface Concept – Trust a worldwide expert North Atlantic Industries – More functions. Less space. Pentek, Inc. – Introducing the one board with all the right connections Phoenix International – Data storage technology Positronic Industries – Connector excellence Precision Analog Systems – Your source for VMEbus and PCI Express Red Rock Technologies, Inc. – Mass storage modules Rittal-Kaparel – For perfect system integration Simon Industries – Unwavering guidance for critical missions Technobox, Inc. – Your source for PMC solutions TEWS Technologies – COTS I/O solutions Themis Computer – Extreme performance across the board Vector Electronics & Technology, Inc. – Packaging solution of choice Winchester Electronics – Power connector solutions

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VME and Critical Systems / December 2008

By Chris A. Ciufo, Editor

In 2008, software out-innovates hardware In his book How Breakthroughs Happen: The Surprising Truth About How Companies Innovate, Andrew Hargadon1 argues that companies rarely achieve a “Eureka!” moment. Instead, they innovate by painstakingly exploiting existing ideas but combining them in new ways. Despite the prodigious gains achieved by VME and VPX hardware companies, COTS software companies are innovating much faster – with lots of new products recently launched based upon existing ideas. At the top of my innovation list is software vendor DDC-I. Once best known as “just an Ada supplier,” the company has reinvented itself by exploiting untapped niches not aggressively pursued by other companies. First DDC-I announced a focus on what some once considered an oxymoron: “safety-critical Java.” The company worked with Sun and others to catalyze the Open Group’s JSR-302 safety-critical Java profile. In parallel, the company retooled its Scorpion Java toolset for RTSJ, virtual machine realtime garbage collection, and made it Eclipse compliant. From “safety critical,” the company easily extended its reach into “trustworthy computing”: the contemporary movement that started with “secure software” but builds in a level of verification – just to be sure. DDC-I partnered with Arxan Defense Systems, an early-stage anti-tamper integrator whose EnforcIT platform works with DDC-I’s OpenArbor OOP IDE for C and C++. And as we went to press, DDC-I briefed VME and Critical Systems on DDC-I’s most innovative announcement to date: a DO-178B Level A certifiable RTOS called Deos. Like safety-critical Java and OpenArbor, Deos builds upon previous ideas – in this case, from technology first developed at Honeywell. Available at launch with artifacts, memory protection, and a “patented ‘slack’ scheduling mechanism,” the partitioned RTOS is built ground-up for safety-critical applications. Not to be outdone, DDC-I’s “arch rival” (just having some fun with this, folks) AdaCore recently made GNAT Pro available for Mentor Graphics’ Nucleus. The Nucleus OS competes with Express Logic’s ThreadX (more on that in a moment) as a highly deterministic but small-footprint RTOS used in general embedded applications like HP printers … or Mars Reconnaissance Orbiters (MROs). Nucleus didn’t plan to target AdaCore’s traditional applications that require Ada, but Nucleus remains an excellent choice for safety-critical systems because of its small footprint, direct link to the final application code, and high-volume applications where software failure is unthinkable to consumers (such as printers, automobiles, or cell phones). AdaCore saw an opportunity to meld Ada’s military goodness with Nucleus’ benefits – and voila! – we’ve now got Ada available in industries requiring hard real-time response, a very small memory footprint, and safety or security. Here again, AdaCore’s innovation builds upon existing ideas. Another innovative product is VLX from VirtualLogix, which turns a multicore Texas Instruments DSP into a CPU+DSP. This 1

novel software plays off of the multicore virtualization trend in the AMD/Intel desktop and server space, except that it’s applied to TI’s latest multicore DSPs such as the new tri-core TMS320C6474. With three 1 GHz cores and separate L1 data and program caches, the chip cranks out 24,000 16-bit MMACS (peak). That’s fine if all you want to do is crunch numbers and do I/FFTs, but power and real estate increasingly come at a premium. VirtualLogix’s idea? Dedicate one or more cores to CPU-like operation, thus replacing a dedicated CPU and memory subsystem – saving board space, thermal challenges, and BOM costs while easing the programming and tool models. VLX allows a traditional DSP/BIOS to run right alongside a CPU OS such as a multithreaded Linux distribution. The Linux OS can even include a TCP/IP stack and other networking protocols, turning a fast DSP such as the ’C6474 into a fast DSP plus a generalpurpose CPU running a desktop or blade OS like Linux. Here too, there’s no real Ah-ha! breakthrough involved because this kind of virtualization is becoming commonplace on x86 CPUs. But VirtualLogix applied these lessons learned to the embedded signal processing space … and the innovative VLX software emerged. Finally, “multicore” means more than just virtualization. Multiple cores distribute the workload in embedded applications, whereas in desktop or server applications multiple cores are used to “decompose” an application to run in multiple partitions. But embedded multithreaded applications need to communicate effectively between multiple cores (or nodes). To capitalize on this, RTOS vendor Express Logic modified the ThreadX API to incorporate the Multicore Association’s Multicore Communications API (MCAPI) specification. Through a partnership with PolyCore Software, ThreadX can now be used on multiple cores as a mechanism to distribute an application’s workload and cleanly communicate between threads. As in the previous innovation examples, this isn’t an earthshaking development on its own merit. The innovation part here was recognizing a way to propagate ThreadX into new areas by a relatively simple interface change to assure MCAPI compliance – while making sure PolyCore’s Poly-Messenger works as advertised. In each of these four examples – DDC-I, AdaCore/Mentor Graphics, Texas Instruments/VirtualLogix, and Express Logic/ PolyCore – a software vendor took existing ideas such as Ada and safety-critical or multicore processors and added onto them. To be fair, it’s harder to innovate in hardware because the only variables are packaging (such as VPX) or the ICs themselves. Perhaps this is why more than ever before, VME vendors are turning to innovative software value-adds.

Chris A. Ciufo, cciufo@opensystemsmedia.com

I recently met with Andrew to discuss tech innovation. His principles have given me a new set of criteria from which to evaluate all the exciting products and ideas coming from the robust VME/VXS/VPX vendor community.

VME and Critical Systems / December 2008

By Ray Alderman

MIL/COTS rises to new heights It is no secret that the MIL/COTS market is one of the largest market segments for boards and boxes, if not the most profitable segment for vendors. Also, VME technologies hold the lion’s share

in these applications, a statement that can be made without reservation. As the world financial crisis of September and October ripples through the economies, and we see telecom and industrial

markets retrench, you can expect to see the “Telecomites” and “Industrialites” invade the “Promised Land of MIL/COTS” in search of salvation. First, the MIL/COTS segment is the only stable market for embedded board-level products today. That statement comes from industry analysts and respected speakers at industry conferences, not just from me. With consumer and commercial demand declining, the industrial markets will probably see a corresponding decline in factory automation projects that use boards and boxes. At the same time, telecom will see further decline, even though that market is already terribly depressed as telecom service providers hoard cash, cannot secure loans, and refuse to take the increased risk of upgrading to 3G and 4G services. The telecom market is basically a consumer market, whether you look at services or devices. Consumers are not spending their money on those fads, not with the economic situation in such turmoil and their financial future uncertain. Consumers have lost confidence in their economic situation, and so have manufacturers that make consumer and telecom products. There is the medical market, but that segment moved to PC-based motherboards (CAT/PET/MRI machines) for image reconstruction and control years ago. Moreover, the remainder of that market is proprietary electronics. So, the medical market is a very small segment of the embedded board and box business and not particularly attractive. There will be some business here and there in industrial, telecom, and medical, but nothing like what was seen in previous years. Furthermore, as the business opportunities in those segments decline, there will be fierce competition for the few remaining orders. That leaves the MIL/COTS market. I receive calls all the time from companies asking me how they can enter the military markets. The MIL/COTS market has very high barriers to entry. It takes

VME and Critical Systems / December 2008

“The MIL/COTS market has very high barriers to entry. It takes approximately four years to enter these markets with organically grown products. ... Not many companies can hold their breath for four years

Cannot Operate To Specifications, Confuses Ordinary Telecom Suppliers, and Consumer Offerings Truly Suck. If you are a program manager on a MIL/COTS system, COTS means: Compromises Our Tactical Systems, Capable Of Terrible Stuff, and Contaminates Other Tested Systems. However, if you buy the right COTS stuff that meets or exceeds the application’s requirements, COTS means: Capable Of Terrific Success, Count On Trusted Suppliers, and Causes Obsolescence To Shrink.

As we move away from the shaky and unreliable semiconductor suppliers of processors and chipsets and use FPGAs, I think COTS means: Cores Over Traditional Semiconductors. Within VITA, COTS has another meaning: Create Open Technology Standards that meet or exceed the requirements of these critical military systems. One look at the list of VITA’s completed standards and ongoing committees will show that. For more information, contact Ray at exec@vita.com.

before they see orders and shipments.” approximately four years to enter these markets with organically grown products: It takes about two years to get designed in to a major program, and another two years before that program goes to deployment. Not many companies can hold their breath for four years before they see orders and shipments. So, the only efficient way to enter MIL/COTS is by acquiring an established company in that space. Additionally, designing and manufacturing MIL/COTS products requires a very different knowledge and skill base compared to designing and making telecom or industrial products. So, when the sales-starved refugees from telecom and industrial show up, does that mean some poor-quality products will get into the MIL/COTS supply chain? Yes. It already happened. Some program manager bought some small form factor PC-based refuse from some industrial board company and installed it in a critical weapons system; now those boards are failing left and right. That system is now in redesign, and that board supplier had one of the shortest stints on record as a MIL/COTS supplier. The DoD memo, sent out late last year, deals with such suppliers in a very harsh manner. (Department of the Army Memo, Dec. 6, 2007, “Reliability of U.S. Army Materiel System,” from Claude M. Bolton, Jr., Assistant Secretary of the Army.) That all leads to one question: What does COTS really stand for? Originally, when Secretary Perry sent out his memo in the 1990s, it meant Commercial-Off-theShelf. But it is now obvious that not all COTS products can meet the requirements of many military applications. If you enter the MIL/COTS market from the industrial or telecom sector, COTS means: VME and Critical Systems / December 2008 11

By John Rynearson

E cast

VITA 57.1 recognized by ANSI, new standards brew VSO ANSI accreditation Accredited as a Standards Development Organization (SDO) in June 1993 by the American National Standards Institute (ANSI), the VITA Standards Organization (VSO) meets every two months to address vital embedded bus and board industry standards issues. Information on ANSI/VITA standards is available on the VITA website at www.vita.com. VSO study and working group activities Standards within the VSO may be initiated by a study group and developed by a working group. A study group requires the sponsorship of only one VSO member and is used to build interest in a standard. A working group requires the sponsorship of at least three VITA members, and the proposed work must fit within the defined scope of VITA’s accreditation with ANSI.

ANSI/VITA 40-200x, Status Indicator Objective: Standardize front-panel indicators – revisions to ANSI/VITA 40-2003. Status: Craig Hartley reported on efforts to revise the ANSI/VITA 40, Status Indicator standard and discussed efforts to make the standard better known to others creating status standards for other devices. VITA 51.2, Physics of Failure Reliability Predictions Objective: This effort will look at the physics of failure as it relates to ANSI/VITA 51.0 and 51.1. Status: Lori Bechtold reviewed the development of 51.0 and 51.1 and CRANE’s effort to update MIL-HDBK-217. She proposed the formation of VITA 51.2, Physics of Failure Reliability Predictions. A signup list was distributed. Lori plans a full-day working group meeting at the November VSO meeting. VITA 57.1, FPGA I/O Mezzanine Pin Assignments Objective: To define a standard mezzanine connector, form factor, and pin assignment strategy optimized for connecting I/O to FPGAs. Status: John Rynearson reported on VITA 57 for Malachy Devlin, who could not attend the meeting. 57.1 has been recognized by ANSI. A marketing activity to promote 57.1 is being planned. The working group is working on 57.2 and 57.3.

VME and Critical Systems / December 2008

Editor’s note: By the time you read this in December, the November VSO meeting will have taken place. Be sure to check out our online E-cast archives for the latest video and audio updates on VITA 41, 46, and 48. See www.opensystems-publishing.com/ecast.

VITA 59, RSE: Rugged System-On-Module Express Objective: To develop a standard for a small form factor module used in applications that require ruggedized form factors. Status: Manfred Schmitz reported on VITA 59. The first draft has been completed. A second round of revisions should be completed by October. VITA 60, Alternative Connector on VPX Objective: Develop an alternative connector for VPX that is PCB compatible, but not mechanically interoperable with the current standard. Status: Colleen Murphy reported on the status of Amphenol’s efforts to develop an alternative connector for VITA 46 modules. A signup list was distributed to start a working group. The effort will be known as VITA 60. VITA 61, XMC with Alternative Connector Objective: Develop an alternative connector for XMC that is PCB compatible, but not mechanically interoperable with the current standard. Status: Greg Powers, Tyco, reported on the development status of an alternative connector for XMC. The design is complete. Currently work is progressing on modeling, and empirical testing will follow. VITA 62, Power Supply Modules Objective: Develop a standard for modular power supplies. Status: Sean Lorimer reviewed a proposal to develop a plug-in power supply standard for embedded applications. A signup list was circulated to start a working group. This effort will be known as VITA 62.

PDF – This column and the accompanying table are available at www.vmecritical.com For more information, e-mail John at techdir@vita.com.

SEPTEMBER MEETING HIGHLIGHTS Standard

Title

Status

ANSI/VITA 1.0 *2002

VME64 Standards

Released

ANSI/VITA 1.1 *2003

VME64 Extensions

Released

ANSI/VITA 1.3 *2003

9U x 400 mm Format

Released

ANSI/VITA 1.5

2eSST

Released

ANSI/VITA 1.6 *2005

Keying for Conduction-cooled VME

Released

ANSI/VITA 1.7

Increased Connector Current Level

Released

ANSI/VITA 3 *2002

Board Level Live Insertion

Released

ANSI/VITA 4.0 *2002

IP Modules

Released

ANSI/VITA 4.1 *2003

IP/I/O Mapping to VME64x

Released

ANSI/VITA 5.1 *2004

RACEway Interlink

Released

VITA 5.2

RACEway++

Withdrawn

ANSI/VITA 6.0 *2002

SCSA

Released

ANSI/VITA 6.1 *2003

SCSA Extensions

Released

ANSI/VITA 10 *2002

SKYchannel Packet Bus

Released

ANSI/VITA 12 *2002

M-Modules

Released

ANSI/VITA 13

Pin Assignments for HIC on VME

Withdrawn

ANSI/VITA 17.0 *2004

Front Panel Data Port

Released

ANSI/VITA 17.1

Serial Front Panel Data Port

Released

VITA 17.2

Serial Front Panel Data Port (SFPDP) Channel

VITA 19.0

BusNet Overview

Withdrawn

ANSI/VITA 19.1

BusNet MAC

Withdrawn

ANSI/VITA 19.2

BusNet LLC

Withdrawn

ANSI/VITA 20 *2005

Conduction-cooled PMC

Released

ANSI/VITA 23 *2004

VME64x Extensions for Physics

Released

ANSI/VITA 25

VISION

Withdrawn

ANSI/VITA 26 *2003

Myrinet-on-VME

Released

ANSI/VITA 29

PC•MIP

Released

ANSI/VITA 30.0 *2005

2 mm Connector Practice on Euroboard

Released

ANSI/VITA 30.1

2 mm Conduction-cooled Euroboard

Released

VITA 30.2

Power Connector Equipment Practice

Released

Apr. 2007

ANSI/VITA 31.1

GbE on VME64x Backplanes

Released

Feb. 2004

Released

Feb. 2004

Working Group

Apr. 2004

*reaffirmed

VME and CS edition Aug. 2004

By Craig Hartley

Feb. 2004

Indicator lights are often vital for safe and efficient operation and servicing of human/ machine systems. Inconsistent and nonintuitive use of color, behavior, placement, and labeling of status indicators increases the probability that users may commit errors in quickly and accurately interpreting the operational status of a component or system. These errors can be enormously costly. Loss of availability of a 911 emergency call center because of a simple error like misidentifying and removing the wrong hard drive can be a matter of life and death.

Aug. 2004

Feb. 2004

Working Group

Apr. 2005

ANSI/VITA 32

Processor PMC

VITA 34

A Scalable Electromechanical Architecture

ANSI/VITA 35 *2005

Pin Assignments for PMC to VME

Released

VITA 36

PMC I/O Modules

Withdrawn

ANSI/VITA 38

System Management on VME

Released

ANSI/VITA 39

PCI-X Aux. Std. for PMCs and PrPMCs

Released

Feb. 2004

ANSI/VITA 40

Status Indicator

Released

Dec. 2008

Apr. 2004

ANSI/VITA 41.0

VXS: VME Switched Serial

Released

Oct. 2006

ANSI/VITA 41.1

VXS: InfiniBand Protocol Layer

Released

Oct. 2006

ANSI/VITA 41.2

VXS: RapidIO Protocol Layer

Released

Oct. 2006

VITA 41.3

VXS: GbE

Working Group

Apr. 2006

VITA 41.4

VXS: PCI Express

Working Group

Apr. 2006

VITA 41.6

VXS: 1X GbE Control Channel Layer

Working Group

Oct. 2008

VITA 41.7

VXS: Processor Mesh Topology

Working Group

VITA 41.8

VXS: 10 GbE Protocol Layer Standard

Working Group

Oct. 2008

VITA 41.10

VXS: Live Insertion Requirements for VITA 41 Boards

Working Group

Apr. 2006

VITA 41.11

VXS: Rear Transition Modules

Working Group

Apr. 2006

VITA 42.0

XMC

Working Group

Oct. 2008

ANSI/VITA 42.1

XMC: Parallel RIO

Released

Oct. 2006

ANSI/VITA 42.2

XMC: Serial RIO

Released

Oct. 2006

ANSI/VITA 42.3

XMC: PCI Express

Released

Oct. 2006

VITA 42.4

HyperTransport

Working Group

Apr. 2005

VITA 42.6

XMC: 10 GbE XAUI Protocol Layer

Working Group

Dec. 2008

VITA 42.10

XMC: General Purpose I/O

Working Group

VITA 42.20

XMC: Dual Fabric I/O

Working Group

VITA 43S

Hot Swap NextGen Mezzanine

Inactive

VITA 45S

Serial VME

Canceled

Apr. 2004

ANSI/VITA 46.0

VPX: Base Specification

Working Group

Feb. 2008

ANSI/VITA 46.1

VPX: VMEbus Signal Mapping

Working Group

Feb. 2008

VITA 46.3

VPX: Serial RapidIO on VPX Fabric Connector

Working Group

Oct. 2008

VITA 46.4

VPX: PCIe Mapping and Advanced Switch Signal Mapping

Working Group

Oct. 2006

VME and Critical Systems / December 2008

Seeing the light: VITA 40 standardizes status indicators

Feb. 2004

Accordingly, the 2003 VITA 40 (Status Indicator) standard is being updated with new features and refinements to make it widely applicable to all types of systems and components. Although originally developed for industrial computer boards, the consistency and effectiveness VITA 40 provides can significantly reduce the probability of costly service and operational errors for any product, and it offers an implementation toolbox for product engineers. What VITA 40 delivers and why The implementation of status indicators in nonmilitary mission-critical, industrial, and commercial products today is extremely inconsistent and often based on old technology. It appears that virtually every company and committee having anything to do with implementing LEDs comes up with solutions independently and usually without any reference to human factors standards or expertise. One of the worst practices is to perpetrate bad solutions by adopting a previous committee’s or company’s original flawed guidance. ANSI/VITA 40-2003 was created to provide intuitive and consistent status indicator implementations such as color, behavior, and meaning based on existing human factors standards, guidelines, and engineering “best practices.” Where conflicts existed among different standards and guidelines, every effort was made to choose the most universally accepted practice. In some cases, such as when optimizing standby blink, usability research was conducted to validate aspects of the VITA 40 standard. Simple provisions in VITA 40, such as mandating the consistent meaning of color, can have a profound effect on the effectiveness of an indicator. In accord with human factors standards, VITA 40 uses green to indicate normal conditions, and amber to indicate abnormal conditions. VITA 40 also specifies a standard set of reliably discriminable indicator behaviors, which, when combined with colors, constitute a toolbox any product developer can use to effectively implement status indicators.

VITA 40 enhancements underway The VITA 40 update now underway will add some significant enhancements to the existing standard. These are based on needs identified by users of the standard over the past five years. They include:

Standard

 Providing implementation guidance

for one-, two-, and three-light applications so there can be consistency with VITA 40 even when space is very limited  Addition of behaviors including unison and sequential blinking of multiple indicators  Solutions for additional conditions including indication that diagnostics are running, feedback upon successful installation of a hot-swapped component, indication of predicted failure, and a component identification function  Minor adjustments to blink rates to bring them into conformance with international standards and recommended practices To provide timely information about VITA 40 developments and updates, a dedicated website has been created at http://av40.org. This website includes extensive rationale for, and explanation about, the specific provisions of VITA 40. Craig Hartley of Sun Microsystems, Inc. is the human factors engineering architect for hardware and VITA 40 chairperson. For more information on VITA 40, e-mail Craig at ansivita40@gmail.com.

Title

Status

*Reaffirmed

VME and CS edition

VITA 46.5

VPX: HyperTransport

Working Group

VITA 46.6

VPX: GbE

Working Group

VITA 46.7

VPX: 10 GbE

Working Group

VITA 46.9

VPX: XMC and PMC User I/O Mapping

Working Group

VITA 46.10

VPX: Rear Transition Module for VPX

Working Group

Oct. 2008

VITA 46.12

VPX: Fiber Optic Interconnect

Working Group

Oct. 2008

VITA 46.20

VPX: Switch Slot Definition

Working Group

ANSI/VITA 47

Env., Design and Const., Safety, and Qual. for Plug-in Units

Released

Jun. 2006

VITA 47r1

Revisions to ANSI/VITA 47

Released

Feb. 2008

VITA 47r2

Revisions to ANSI/VITA 47

Working Group

Oct. 2008

VITA 48.0

REDI: Ruggedized Enhanced Design Implementation

Working Group

Oct. 2008

VITA 48.1

Mechanical Specs for Microcomputers Using Air Cooling

Working Group

VITA 48.2

Mechanical Specs for Microcomputers Using Conduction Cooling

Working Group

VITA 48.3

Mechanical Specs for Microcomputers Using Liquid Cooling

Working Group

VITA 49.0

VITA Radio Transport (VRT)

Working Group

VITA 49.1

VITA Radio Link Layer (VRL)

Working Group

Oct. 2008

VITA 50

Best Practices for Electronic Module Cooling

Inactive

Dec. 2007

ANSI/VITA 51.0 *2008

Reliability Prediction

Released

Aug. 2008

ANSI/VITA 51.1 *2008

Reliability Prediction: MIL-HDBK-217 Daughter

Released

Oct. 2008

VITA 51.2

Physics of Failure Reliability Predictions

Working Group

Dec. 2008

VITA 52

Lead-free Practices

Working Group

Oct. 2006

VITA 53

Commercial Technology Market Surveillance

Working Group

Oct. 2007

VITA 54

Embedded Platform Management Architecture (EPMA)

Inactive

Aug. 2005

VITA 55

Virtual Streaming Protocol

Working Group

Jun. 2006

VITA 56

Express Mezzanine Card (EMC)

Inactive

Oct. 2007

ANSI/VITA 57 *2008

FMC: FPGA Mezzanine Card Standard

Released

Dec. 2008

VITA 57.1

FPGA I/O Mezzanine Pin Assignments

Working Group

Dec. 2008

VITA 58

Line Replaceable Integrated Electronics Chassis

Working Group

Aug. 2008

VITA 59

RSE: Rugged System-On-Module Express

Working Group

Dec. 2008

VITA 60

Alternative Connector on VPX

Working Group

Dec. 2008

VITA 61

XMC with Alternative Connector

Working Group

Dec. 2008

VITA 62

Power Supply Modules

Working Group

Dec. 2008

VME and Critical Systems / December 2008 15

Hardware

NAS in the forefront

Blade-level NAS enables rugged reliability, availability in critical systems By Steve Gudknecht

Harsh military computing requires the most advanced embedded technology that saves space and money while still operating reliably and achieving high availability. Blade-level Networked Attached Storage (NAS), a vital building block in network-centric operations, brings those capabilities to the harshest mil/aero environments.

Historically, NAS and Storage Area Networks (SANs) have dominated mass storage needs in military, enterprise, and industrial applications. However, the global storage paradigm typically conjures up images of an external chassis interconnected via a Fibre Channel or SCSI interface. Traditional SANs and NAS require space for added hardware and cabling needs, often proving cumbersome or unworkable in harsh military environments. By contrast, the relatively small footprint of 6U NAS blades enables use inside the box across many different applications where space constraints precluded older NAS configurations from consideration. In addition, conduction-cooled NAS blades now bring smaller footprints into avionics, where limited airflow for cooling is available. With the introduction of new, integrated 6U products, NAS is gaining acceptance in military embedded computing as a cost-effective and reliable shared storage solution. 6U VME and CompactPCI versions now bring multiple drives, RAID controllers, improved processor speeds, and dual GbE links together for network bandwidths of up to 50 MBps for reads. Half TB capacities in a single slot using 2.5" rotating drives and up to 128 GB in 2.5" solid-state flash drives with Serial Advanced Technology Attachment (SATA) and Parallel Advanced Technology Attachment (PATA) technology are now achievable. In accordance with these factors, bladelevel NAS is stepping into the forefront, offering the high reliability and high availability required in modern military applications. Meanwhile, within the NAS family, solid-state drives are proving themselves a viable contender against more traditional rotating drives.

6U NAS with RAID provides additional reliability The inside-the-box, high-speed, highcapacity design of NAS lends itself to a new level of rugged applications demanding high reliability and redundant operation. NAS with RAID is showing up in critical data repositories aboard ship, land, and air platforms that need protection against catastrophic events. Streaming audio and video applications in military settings dealing with increasing needs of storage data benefit from both smaller footprint systems and lower solid-state flash drive costs. Blade-level NAS incorporating RAID can address the storage needs of harsh environment, mission-critical applications in scalable dual star systems (see sidebar). The NAS blade provides the necessary internal processor, network interface, RAID controller, and disk storage in a single-slot VME or CompactPCI form factor. At the blade level, NAS operates as

a client/server model, using familiar protocols including NFS 3.0 and Common Internet File System (CIFS). NAS blades can either be single slot with two drives or dual slot with four drives. Network complexity ranges from single star/single NAS blade with intra-blade RAID 0 or RAID 1 to dual star/dual-slot NAS blades with RAID 0+1, 1+1, or 5+1 and cross-network redundancy. Depending on user-specified configuration, such a system could supply two to four copies of the data. However, reliability in harsh environments requires proper physical implementation. By incorporating pluggable drives into the thermal conduction frame, a solid-state drive-based NAS solution can be accomplished. An example of a conduction-cooled VME RAIDStor blade-level NAS is shown in Figure 1. It includes a VME PowerPC engine that can interface with two SATA drives to

Standards improve NAS capability

NAS requires updated components and redundant data paths to have a smaller footprint while providing cost-efficient storage. In the embedded space, PICMG 2.16 CompactPCI Packet-Switching Backplane (cPSB) and VITA 31.1 GbE on VME64x Backplanes are two standards for system networking. The first, which uses the standard CompactPCI form factor, and the second, which uses the VMEbus form factor, both make use of the 6U by 160 mm Eurocard form factor, allowing the system designer to build loosely coupled systems using embedded physical network connections in the system chassis. The PICMG 2.16 and VITA 31.1 dual star network topology with redundant 6U Ethernet switches connects individual 6U node slots. Each node accesses redundant 6U NAS blades via the backplane using redundant data paths. Embedded Ethernet increases system ruggedness as it eliminates bulky, failure-prone cabling that inhibits airflow. As loosely coupled nodes on the network, the NAS architecture fits right in with the DoDâ&#x20AC;&#x2122;s network-centric systems movement, specifically for tactical and strategic advantages in defense operations via information sharing across networked elements.

VME and Critical Systems / December 2008

form a conduction-cooled NAS blade. The PowerPC processor provides highthroughput network performance, on the order of 80 MBps, while providing enough computing capacity to effectively run the file system protocols and the RAID algorithms. NAS network reads can be supported from 25 MBps in RAID 1 to 50 MBps in RAID 0.

Specification Capacity Form factors Read/Write* Data transfer rate** Operating shock Operating vibration Operating temperature Operating humidity NOTES:

Solid-state drives Up to 64 GB in 2.5" CF, 1.8", and 2.5" 15 MBps to 34 MBps and 12 MBps to 20 MBps N/A 1,000 gs, 0.5 msec 16.3 gs (10 Hz to 2,000 Hz) -40 °C to +85 °C, industrial grade 5% to 95%, noncondensing

Rotating drives Up to 320 GB (SATA commercial) 2.5" N/A 56 MBps 180 gs @ 1 msec max, EA drive 2.0 gs (5 Hz to 500 Hz), extended T° drive -30 °C to +85 °C, extended T° drive 8% to 95%, noncondensing

* Read/Write rates vary widely by flash storage manufacturer, host processor board, and operating system being used. ** R otating drive manufacturers typically use data transfer rates to show performance. They also vary by drive type and manufacturer.

Table 1 Figure 1

Equally important to reliability is user interface support for NAS management configuration, event detection, and administrator notification such as SNMP, Web browser, or Telnet. Blade- and drivelevel hot swap helps avoid system powerdown when replacing failed components. In non-cPSB systems, front-panel or optional rear-panel ports can be used for traditional cabled links. Through proper storage selection and redundant hardware duplication, as high as 4-nines system availability can be reached. Extreme conditions require rugged considerations New conduction- and convection-cooled blade-level NAS products with solid-state flash drives enable use in environments with shock and vibration requirements exceeding 10 gs at 11 milliseconds and temperature extremes reaching -40 °C to +85 °C where the more environmentally sensitive rotating hard drives experience higher failure rates. (See Table 1 for a comparison of currently available solidstate drives and rotating hard drives.) As recent flash drive cost declines have shifted users away from traditional rotating hard drives (for example, hard disk or floppy disk drives), rugged solid-state drives – in combination with backplane embedded Ethernet standards and new 6U products – are moving NAS into new applications and resolving issues of space constraints. Military and aerospace environments that have limited storage areas and contend with extreme temperature ranges are prime beneficiaries. Temperature extremes outside the typical 0 °C to +50 °C operating range for rotating hard drives predicate the use of solid-state drives in conduction- and some convection-cooled systems, because even the most advanced cooling schemes can’t reduce temperatures enough to extend VME and Critical Systems / December 2008 17

Hardware rotating drive life expectancy. Recent solid-state drive costs have dropped by almost 80 percent, so rotating drives in many harsh environments might be nearing the end of their cost effectiveness, considering reasonable cost assumptions. Industrial solid-state drives routinely operate at -40 °C to +85 °C with shock and vibration resistance exceeding MIL-STD 810F testing methods requirements (shock survivability levels at <10 gs at 11 msecs). Solid-state drive endurance is impressive with up to 10-year data retention capabilities and MTBF rates

NAS in the forefront as high as 4M hours, with little or no downside operating in extended temperatures. Conversely, rotating drive systems typically require expensive shock isolation and temperature management. Lower MTBFs trigger higher spares and maintenance costs, and rotating drives are rated at 500k hours for 0 °C to +50 °C operation, then derated in higher temperatures. System failover versus high availability In addition to high reliability in harsh environments, high availability in case of

system failure is also critical in modern military applications. To cement a highly available storage design, engineers should consider the following:  Data replication over multiple drives to cover drive failure  Controller and interface replication to cover controller failure  Data duplication between storage blades to cover blade failure  Network path replication to cover network interface failure  Data access by the application program Implementing high-availability NAS blades requires features that address these functional issues. These include multiple disks organized as a RAID set within the blade, transparent duplication of user data between blades, redundant network paths and switching elements, as well as automatic failover between redundant NAS blades. Component failover times are key and must occur quickly and seamlessly without operator intervention, in order to improve system availability as the value of shared data increases with the number of host connections. Designers are taking advantage of NAS benefits Compact and rugged blade-level Network Attached Storage options now available allow embedded systems designers the opportunity to leverage the benefits of shared storage in applications where previous solutions could not have been considered due to space and environmental constraints. Price declines in form, fit, and function of solid-state flash drive replacements for rotating hard drives are beginning to erode economic barriers to flash drive utilization. CS Steve Gudknecht is a product manager at ACT/Technico. He has held positions in field applications and marketing in high-technology industries for more than 28 years. Steve’s responsibilities include product development, product marketing, training, and sales support. He can be reached at steveng@acttechnico.com. ACT/Technico 215-956-1200 www.acttechnico.com

VME and Critical Systems / December 2008

Special

GPUs – Hardware/software faceoff

Designing a safety-certifiable OpenGL software GPU By Mark Snyder Graphical Processing Units (GPUs) are important components in embedded systems. When GPUs are used for safety-critical embedded systems where design verification and certification are required, implementers must pay special attention to the design and implementation of the GPU to avoid costly development pitfalls and excessive costs. To address GPU demands in safety-critical systems, an efficient, portable, high-quality OpenGL software GPU enables new methods of implementing the GPU in embedded systems while circumventing issues that commonly arise when using a hardware GPU: safety certification design assurance, obsolescence, flexibility in interfacing, and performance output. GPUs are used to provide video and graphics processing capabilities that aid in processing pixel-intensive graphical operations, such as anti-aliased symbology, generation or 3D data visualization, video decode and overlay, and so forth. Most modern GPUs are dedicated ASICs, often reused from the desktops of the mobile computing world. But the concept of a software GPU is attractive, especially for safety-critical embedded systems. Safety certification for GPUs is problematic for a number of reasons, including the difficulty of obtaining suitable design assurance and the hardships of obsolescence and varying standards for the GPU’s software and driver interface. Hardware GPUs are often not flexible enough to meet custom embedded design challenges. Even though GPU hardware employed in an embedded system often has impressive raw performance, this performance is also surprisingly difficult to realize when the GPU is deployed in an embedded application. However, a software GPU implementation is proving itself a viable remedy in addressing these challenging areas. Safety certification: A top priority Commercial hardware GPUs are not developed with the intention to have rigorous hardware verification performed on them as is required by certification standards for various industries, such as DO-254 for avionics. Instead, they are developed to handle a multitude of desktop or mobile computing needs, many of which are not necessary in an embedded environment. A standard such as DO-254 provides a design assurance level for a system component, typically achieved via requirements decomposition, rigorous demands, and structural testing of logic elements.

This level of design assurance is never available for a commercial GPU chip comprising millions of gates. Therefore, system designers rely on other means to assure safety, such as fault-tolerant architectures, service life history analysis, and black box testing. Many of these methods involve extra system expense, both during development and recurring throughout the deployment phase of the system. Safety certification authorities might also take a dim view of safety evidence that does not incorporate proper design assurance. By contrast, the software GPU has a simple design, and one key factor to this simplification is to limit the API support to an essential subset. Accordingly, the subset OpenGL standards developed by the Khronos industry consortium are implemented in the software GPU (www.khronos.org). The resultant OpenGL SC Safety Critical Profile defines the subset of OpenGL designed specifically for safety-critical embedded systems. By focusing on this subset, the underlying implementation is kept simple and can undergo standard design assurance using the DO-178B software guidelines used for safety-critical software. The software GPU’s code base is under 15,000 Source Lines of Code (SLOC), and complete design assurance to the DO-178B standard has been developed with the software GPU implementation. Thwarting obsolescence Obsolescence is also a key concern with hardware GPUs. Once a traditional hardware GPU component has been selected and designed into the embedded system, any change or technology insertion typically involves much redesign. Unfortunately, commercial (hardware) GPU chips have a short service life, due to their primary usage in a fast-moving

VME and Critical Systems / December 2008

commodity PC marketplace. Therefore, lifetime buys are often necessary for these components when they are used in an embedded program with life cycles that can span decades. This problem is mitigated substantially by using a software GPU, which can be easily instantiated on any processor. Flexibility and interfacing Hardware GPUs are powerful, but they are often not flexible enough to address special-purpose needs found in embedded systems. Consider, for example, an ISR application accepting video data from a camera interface into a processor card, adding computer-generated symbology, and sending the output to an embedded sensor multifunction display in an aircraft. If the sensor input comes from a source not commonly found in a desktop computing environment (such as a DSP sensor processor, for instance), the GPU will not have a built-in path to handle it. Or, the computer symbology for blending may come from a separate processor, and an output transparency (or alpha) channel might be required to properly merge the two sources. In both cases, the GPU’s lack of flexibility will constrain system design. Similarly, modern GPUs are built to operate in a classic processor configuration, whereby the GPU receives graphics data from an AGP, PCI, or PCI-X bus and processes it in a parallel manner. This can cause issues when rendering must be segregated via time- or space-partitioned boundaries, such as those required for processing highly safety-critical data alongside noncritical data, or highly secure data with unclassified information. Hardware GPUs are designed as hardware components composed of ASICs and are not designed to be interrupted as is required in a time-partitioned system.

Also, drivers almost always utilize DMA transfers, which are nondeterministic in a memory-partitioned environment. By contrast, the flexibility of a software GPU allows many different software and parallel hardware architectures to be used, including multicore processors, softwarepartitioned processors, and combination processor/FPGA designs. Multiple instances of the software GPU can also be hosted within an ARINC 653 partitioned operating system such as Sysgoâ&#x20AC;&#x2122;s PikeOS to achieve a partitioned display environment that can support such multilevel secure and multicritical applications (Figure 1). In another configuration, the software GPU can be hosted on a PrPMC platform, allowing the PrPMC to work as a dedicated GPU in a VME SBC-based system. In this kind of implementation, the OpenGL client side driver communicates across a traditional bus, such as a PCI or PCI Express, and the PrPMC is indistinguishable from a traditional GPU in the system, except that it offers far more flexibility. The rise of multicore processing in embedded systems similarly provides an additional opportunity to leverage a software GPU design. To accomplish this, one core can be assigned as a graphics processor while the HMI or ISR application can run on another core. Thus, the software

enables a multicore system to eliminate a dedicated GPU. Performance and features Performance is a critical issue in embedded GPU design. It always seems performance falls short of what is needed. However, the factors that affect embedded GPU performance can be difficult to identify. Software that makes inefficient use of a GPU (such as inefficient graphics state changes) can perform badly even when rendering geometry well short of theoretical GPU performance. Performance is sensitive to such factors as processor concurrency, operating system throughput, bus contention, and other factors. Clearly a software GPU cannot achieve the same performance as a hardwareaccelerated dedicated ASIC â&#x20AC;&#x201C; especially one designed for high performance. And a software GPU cannot obviate the need for hardware acceleration in very demanding graphics applications such as geospatial data visualization or synthetic vision. However, due to design simplicity, it is often easier to identify and address performance bottlenecks in a software GPU graphics system. Using a software GPU, performance bottlenecks can be addressed through such means as leveraging specialized processor instructions, partial acceleration of GPU processing through FPGAs, parallel processing, or

Figure 1

VME and Critical Systems / December 2008 21

Special just plain old-fashioned profiling and optimization. In addition, the software GPU design allows graphics applications to take advantage of performance-enhancing techniques that are difficult to accomplish in traditional GPUs, such as one-time rendering of static backgrounds, rendering of differing screen regions at different refresh rates, and so forth. The feature set of the software GPU is also an important consideration. Image quality, for instance, is a key area for safety-critical displays. Commercial

hardware GPUs often do not achieve adequate image quality, resulting in timeconsuming workarounds or quality tradeoffs in the resultant emdedded HMIs. In a safety-critical GPU intended for use in a system where a human operator must use a system to make life-critical decisions or monitor the system for long periods of time, such qualities as smoothly moving lines, fonts, and texture-mapped images that do not distract an operator are needed. Figure 2 illustrates an example of a safety-critical HMI display generated with the software GPU. This display comprises 2 to 3,000 antialiased line segments, antialiased texture-mapped test Figure 2

strings, a bilinear filtered texture map, and several additional symbology elements. It renders all the symbology of each frame at 60 frames per second into an 800 x 600 frame buffer. On the same computer using a hardware-accelerated GPU, the display renders at twice the frame rate. A clear future for software GPUs Utilizing GPUs in safety-critical applications poses significant challenges in the areas of safety certification design assurance, obsolescence, flexibility in interfacing, and performance. Software GPUs, such as Quantum3Dâ&#x20AC;&#x2122;s IGL 178, are designed to address a powerful API such as OpenGL SC and can help resolve the aforementioned safety-critical GPU needs. CS Mark Snyder is a senior engineering manager with Quantum3D, Inc. Prior to joining Quantum3D, he was an engineer at Honeywell International. He also spent nine years as an Air Force officer, where he was involved in 3D virtual simulation and visualization research at the Air Force Research Lab and engineered C4ISR systems at Air Force Space Command. He holds a BS in Computer Science from Arizona State University and an MS in Computer Science from the Air Force Institute of Technology, and is inventor on several patents in the avionics flight deck display arena. He can be contacted at msnyder@quantum3d.com. Quantum3D, Inc. 623-486-9939 www.quantum3d.com

VME and Critical Systems / December 2008

Technology

On-chip debug gets it right

On-chip debug units maximize real-time embedded systems By Steve Griffith

To achieve time-to-market goals involving increasingly complex technology, designers are taking advantage of on-chip debug units. These units improve system visibility and create a non-intrusive debug environment. Designers can then get it right the first time … before product launch.

No matter how advanced our design process becomes, or how good we get at it, there will always be that phase in the design process called debug. Once the basic integrity of a system is established and tests are running, the focus inevitably turns to finding out why a certain test or application does not complete as expected. That is, errors in the behavior of the program must be diagnosed and fixed – debugged. Debugging poses unique challenges for real-time embedded applications, such as increased complexity amidst short design cycles, decreased visibility, and keeping up with real time while staying non-intrusive. However, new on-chip debug units are helping to alleviate these issues via market requirements so that systems designers can achieve program goals … the first time. Issue: Increasing complexity and short design cycles One challenge for the debug phase is related to the increasing complexity of devices and the shortening design cycles. The proliferation of high-performance, fault-tolerant, commercially available RISC processors and System-on-Chip (SoC) devices has been a boon to designers of next-generation systems ranging from consumer electronics to medical, transportation, nuclear control, and highreliability applications. Add to this the statistic that more than 50 percent of new embedded designs now use commercial operating systems such as RTOSs and generic operating systems such as Linux and Windows CE .NET[1]. These factors have made it possible to create increasingly complex systems in shorter periods of time with product delivery expected soon after. Figure 1 shows a typical example. This one-million-gate SoC and its supporting development board were both completed in six months. The system

was then ready for embedded application testing and the start of debug.

Figure 1

With traditional debug tools, having the development board and SoC ready would just be part of a typical setup. For example, if debug were to be performed using an In-Circuit Emulator or In-Circuit Debugger (ICE or ICD), then a customized “emulator” would also have to be developed, or a generic emulator adapted, to work with the new SoC. This would add another aspect of hardware and software design (and debug) to the project. However, with a built-in debug unit, all the extra debug hardware was already designed and on-chip. No other boards needed to be plugged into the system in order to debug it. As a result, it is possible to more quickly debug test applications and meet the demanding product delivery schedules with fewer design resources. Accordingly, during the past several years, silicon and Intellectual Property (IP) vendors have worked to develop standardized, on-chip debug units that can be included with the other IP blocks used in an SoC chip design. Debug standards such as the ARM EmbeddedICE + Embedded Trace, MIPS EJTAG, and Intel XScale On-Chip Debug are some examples. Each debug standard sets expectations for common

VME and Critical Systems / December 2008

interfaces and visibility into internal registers and memory, as well as expectations for breakpoint, single stepping, and profiling features. New IP versions of the processor and other SoC blocks are accompanied by new releases of IP for the debug unit. All vendors typically provide any software drivers needed to run the debug units. It is notoriously difficult to predict and schedule how much time and effort it will take to find and fix bugs. While using standard built-in debug units does not solve the problem, it does make many of the variables and risks go away: variables such as how much time it will take engineers to learn or design a new nonstandard external debug tool, and the risk that there will be problems with a new nonstandard debug tool. Issue: Decreasing visibility With higher levels of integration come lower levels of visibility into the system’s operation and more challenges for debug. For example, not long ago an Ethernet interface would have been implemented with discrete devices on a board, and any access to memory as a result of Ethernet activity would be easily visible using a logic analyzer on the external memory bus. As that interface is moved on-chip with the microprocessor, memory controller, data cache, and other interfaces, it is likely that many of the Ethernet memory accesses are no longer observable off-chip. As a result, traditional bus-based methods for debugging interface problems have become hugely impractical, if not impossible. On-chip debug units solve this visibility problem. For example, the SoC architecture shown in Figure 2 uses the industrystandard Advanced Microcontroller Bus Architecture (AMBA) with an Advanced High-performance Bus (AHB) connecting all the interfaces together. This makes them readily accessible to

the debug unit (DSU3) and ultimately visible to the external user.

problem in the execution of a program could be related to the order in which two signals occur. Both source-level or assembly-level debuggers may stop the program execution in a way that changes this timing and hides the problem. This is an example of “intrusive” behavior from a debugging tool. A better method for debugging real-time problems is to put a logic analyzer or oscilliscope probe on the signals in question and observe the exact timing of the signals during the regular flow of the program. However, this method does not provide any details about the state of the rest of the system. What is needed is some debug functionality built into the SoC that provides logic analyzer type trigger capability, source/assembly-level debugger type state visibility, and subclock cycle time resolution, all without altering the program flow. This is available in new generations of RTNI on-chip debug units.

Issue: Real-Time Non-Intrusive (RTNI) debugging A couple of common debug tools that do not use on-chip debug resources are source-level debuggers and lower-level assembly language debuggers. These debug tools can allow the engineer to step through the execution of a program lineby-line in the source code and into some of the details of the assembly instructions. Using these tools, a program execution can be stopped at predetermined breakpoints set by the user. When the execution of the program has stopped on a line of the program, the engineer can determine some information about the state of the execution of the program, such as which subroutine of the program is executing and what values the program’s variables are currently holding. With these basic features, both source-level and assembly language debuggers are capable of helping to diagnose a large number of errors. However, they are not as useful for finding bugs in software written for real-time systems – which by their very nature have timing as a critical element: Inputs are processed and outputs are created on boundaries of nanosecond clock cycles, for example, sampling directional velocity and firing engines.

Common debug unit features A few examples have been given describing debug challenges and how onchip debug units can help in the debug phase. Insight into important elements and requirements for what is typically found in these on-chip debug units is also valuable. Easy connection – The first requirement for an on-chip debug unit is the ability to easily connect to it from an external debug host. For embedded systems, the debug host might just be a terminal program that

In a real-time system, the relational timing between events occurring in the system is also critical. For example, a

GDB (port 2222)

Terminal

DEBUG HOST Command layer

Basic commands

IP Debug drivers Debug interface drivers

GDB protocol

GRLIB Debug Drivers USB

Serial I/F

PCI

JTAG

Ethernet

GRESB

Debug interfaces

GRESB

USB debug link

Serial debug link

PCI debug link

JTAG debug link

Ethernet debug link

UT699 LEON 3FT TARGET SYSTEM

SpW RMAP link

AHB

LEON Processor

Memory Controller

APB Bridge

Custom IP core

DSU3

Figure 2

VME and Critical Systems / December 2008 25

Technology interprets commands and sends them to an interface using a simple software driver. Referring back to Figure 2, there might be a wide variety of interfaces supported. In this case USB, UART, PCI, JTAG, Ethernet, and SpaceWire standard interfaces are all implemented. When multiple interfaces are implemented on the SoC device, and supported by the on-chip debug unit, debug can be performed through any one or more of them. For example, if an application uses SpaceWire, the debugging can be performed through any other interface without affecting packet flow on the SpaceWire link. Maximized visibility/control – As alluded to previously, another important element for on-chip debug support is to maximize internal visibility and control. The debug unit should give access not only to all registers defined by the processor architecture, but also SoC feature registers, debug unit registers, and even internal memory such as instruction and data caches. The access to these registers and memory should be available without affecting the flow of the application being debugged: non-intrusively. The DSU3 in Figure 2 can share read or write cycles on the AHB bus without bandwidth conflicts, even at maximum CPU frequencies. Write cycles from a debug unit are by definition intrusive, but might be helpful for debug as a “what-if” experiment or quick-fix experiment. Many debug units include some sort of buffering of the history of the program flow, for example, a circular buffer holding the CPU instruction history and another holding the AHB address/data transaction history. A good

debug unit should also provide the ability to read or modify any external RAM or flash memory on the board. Attainable breakpoints/control – The debug unit must provide a way to set breakpoints and control stepping through instructions. This is usually set up using debug unit control registers. For example, a debug “control register” used with an “AHB register” value may create a break in program execution based on the AHB address. Breaks may also be defined based on the value in a trap register or an external trigger, or an assembly instruction. The debug unit may also have timers that can be invoked to delay a break for a specific number of clock cycles after the breakpoint event. Debug support software usable, but not required – Often on-chip debug units are used without any special Graphical User Interface (GUI) software. Many experienced developers like the speed and ease of plain low-level commands as opposed to working through a GUI. For example, when a particular register value is sought it may be more convenient to use a single command line query. Other times it is desirable to display lots of information together. For example, the user might want to display the source code disassembly, cache contents, trace buffer contents, external memory contents, and so on, all together. Most IP vendors have more sophisticated software tools to do this. For example, Gaisler Research offers an Eclipse-based GUI environment (Grmon RCP). A typical session is shown in Figure 3. With such an environment (as

Figure 3

VME and Critical Systems / December 2008

On-chip debug gets it right

“These integrated debug units are restoring much of the ability to quickly and effectively resolve problems seen in today’s embedded applications. They also allow system designers to get it right the first time ... before product launch.”

Steve Griffith is principal IC design engineer at Aeroflex Colorado Springs. He has more than 20 years of design experience and serves on the standard product design team at Aeroflex Colorado Springs launching microcontrollers, SpaceWire, and 1553 databus products for the HiRel environment. Steve received his Bachelor of Science in Electrical Engineering from the University of Calgary, Canada. He holds 10 U.S. patents (2 pending). He can be reached at steve.griffith@aeroflex.com. Aeroflex Colorado Springs 719-594-8174 www.aeroflex.com

opposed to single command query), it is easier to do a wide scan for irregularities when trying to narrow the scope of a debug problem. On-chip debug units launch success The wide availability of commercial IP has made it possible to create very highly integrated SoCs in a short amount of time. With higher levels of integration come lower levels of visibility into the system’s operation. Decreased visibility makes it very difficult to debug the increasingly complicated programs running on the system. This has led to the emergence of on-chip integrated debug units that provide the functionality of traditional software debug tools, with internal visibility similar to full emulation, and timing resolution equal to that of highperformance logic analyzers. These integrated debug units are restoring much of the ability to quickly and effectively resolve problems seen in today’s embedded applications. They also allow system designers to get it right the first time ... before product launch. CS References 1. Laengrich, Norbert, “Adapting hardwareassisted debug to Embedded Linux and other modern OS environments,” PC/104 Embedded Solutions, September 2006. www.smallformfactors.com/articles/ laengrich

VME and Critical Systems / December 2008 27

ANNUAL BUYERâ&#x20AC;&#x2122;S GUIDE Carriers/Mezzanines Alphi Technology Corporation . . . . . . . . . . . . . . . . . . 29

DSP/FPGA boards Annapolis Micro Systems, Inc. . . . . . . . . . . . . . . . . . . 29 BittWare, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Inicore, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Enclosures/Backplanes/Connectors Sponsored by Alligator Designs, Carlo Gavazzi Computing, and Elma Electronic 3M Electronic Solutions Division . . . . . . . . . . . . . . . . 30 Alligator Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Alligator Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Alligator Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Alligator Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Carlo Gavazzi Computing . . . . . . . . . . . . . . . . . . . . . . . 30 Elma Electronic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Elma Electronic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Hybricon Corp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Hypertronics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Positronic Industries . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Vector Electronics & Technology, Inc. . . . . . . . . . . . . 30

Kontron . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Themis Computer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Themis Computer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Themis Computer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

PMC/XMC

Red Rock Technologies, Inc. . . . . . . . . . . . . . . . . . . . . 33

Acromag, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Data Device Corp. (DDC) . . . . . . . . . . . . . . . . . . . . . . . 34 Excalibur Systems, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . 34 Kontron . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Technobox, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 TEWS Technologies LLC . . . . . . . . . . . . . . . . . . . . . . . 35

I/O boards

RapidIO/PCI-X/GbE/PCIe

Harsh environments

CAEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Kontron . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Precision Analog Systems (PAS) . . . . . . . . . . . . . . . . 33

Multicore Sponsored by Themis Computer Dynatem, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Emerson Network Power Embedded Computing . . . 33

Concurrent Technologies, Inc. . . . . . . . . . . . . . . . . . . . 35 Interface Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Tundra Semiconductor Corporation . . . . . . . . . . . . . 35 Tundra Semiconductor Corporation . . . . . . . . . . . . . 35 Tundra Semiconductor Corporation . . . . . . . . . . . . . 35

SBCs Sponsored by Themis Computer Kontron . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Themis Computer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Themis Computer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Themis Computer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Software-Defined Radio Pentek, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Pentek, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Pentek, Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Storage 3M Electronic Solutions Division . . . . . . . . . . . . . . . . 36 ACT/Technico . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Conduant Corporation . . . . . . . . . . . . . . . . . . . . . . . . . 37 Phoenix International . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Test and instrumentation AIM-USA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Highland Technology, Inc. . . . . . . . . . . . . . . . . . . . . . . 38 North Atlantic Industries . . . . . . . . . . . . . . . . . . . . . . . 38 Precision Analog Systems (PAS) . . . . . . . . . . . . . . . . 38

VITA 46 Sponsored by Elma Electronic Elma Electronic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

VITA 41 Sponsored by Elma Bustronic Elma Bustronic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 GE Fanuc Intelligent Platforms, Inc. . . . . . . . . . . . . . . 38 Hartmann Elektronik . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 W-IE-NE-R Plein & Baus GmbH . . . . . . . . . . . . . . . . . 39

VME and Critical Systems / December 2008

VME and Critical Systems Carriers/Mezzanines

IP-ARINC 429

Carriers/Mezzanines | DSP/FPGA boards

Alphi Technology Corporation

RSC# 37178

Serial bus interface • 16 independent receiver channels • Eight independent transmitter channels • Label matching for all receiver channels (eight x16 bits A/D channels) • One 64 Kword SRAMs buffer for storing data • Burst and continuous mode for transmitting data at the rate of 100 ms to 1,200 ms • 8/32 MHz IP clock

www.alphitech.com

DSP/FPGA boards

Annapolis Micro Systems, Inc. WILDSTAR 5 for PCI Express with Xilinx Virtex-5

RSC# 38792

A Virtex-5 based processor board • Up to three Xilinx Virtex-5 FPGA I/O processing elements – LX110T, LX220T, LX330T, or FXT • Up to 7 GB DDR2 DRAM in 12 memory banks per board or up to 2 GB DDR2 DRAM in 2 memory banks and up to 40 MB DDRII, QDRII SRAM, or up to 1.4 GB RLDRAM • Programmable flash for each FPGA to store FPGA image • 8x PCI Express bus • High-speed DMA multichannel PCI controller • Supports PCI Express standard external power connector • Commercial or industrial temperature ranges • VHDL model, including source code for hardware interfaces and ChipScope access

www.annapmicro.com

BittWare, Inc. T2-6U-VME

DSP/FPGA boards RSC# 33238

6U VME board featuring eight ADSP-TS201 TigerSHARC DSPs from Analog Devices • Designed for demanding multiprocessor-based operations • Targeted toward a broad range of applications including radar, sonar, communications, and imaging • Implements BittWare’s ATLANTiS architecture, which combines robust TigerSHARC processing with a versatile, high-density FPGA to offer ultra-high performance and I/O bandwidth • Provides two large onboard banks of SDRAM, flash memory for hostless boot, and a PMC site for adding additional processors or I/O capabilities

www.bittware.com

Inicore, Inc. VME64M Master Controller

DSP/FPGA boards RSC# 39319

A VME master controller for use in FPGAs/ASICs • IP core supports A16/24/32 address modes and D8(EO), D16, D32, D32-BLT, and D64-MBLT data modes • Interrupter and bus requester • Master interface • Supports data read-ahead and posted write • Constant local bus address for DMA transfers to/from FIFO • Slave interface – Access modes: Read, write, read-modify-write; selectable rescinding DTACK • Interrupter: D8(O), D16, D32; supports RORA and ROAK interrupt schemes • Bus requester: Supports RWD and ROR arbitration schemes; FAIR requester • Local bus interface: User-selectable wait states; optional big-endian to little-endian conversion • VHDL RTL code • Self-verifying system-level test bench • Synthesis information • User guide

VME and Critical Systems / December 2008 29

Enclosures/Backplanes/Connectors

ANNUAL BUYER’S GUIDE

522 Development System Carlo Gavazzi Computing

Hybricon Corp.

Enclosures/Backplanes/Connectors

A development system designed to be a compact and portable system for lab and desktop use yet rugged enough to withstand transporting to and from the field • A modular test and development platform that supports 6U cards, the 522 Development System features a versatile design for hardware and software developers looking for performance and functionality advantages over customary chassis configurations • It provides unobstructed access to both system and rear transition boards for device monitoring • Affords high-performance cooling via 200 cfm speed-controlled fans that provide distributed cooling to both the front and rear card modules • The system is available with front-mounted test points and LEDs for all DC voltages, as well as an optional LCD for displaying system voltages and both fan and temperature monitoring functions • The 522 Development System is available with a seven-slot (CompactPCI, two VME64x and five VPX) 6U VPX backplane offering high bandwidth in the latest VITA 46 standards with the proven legacy capabilities of VMEbus technology • It accommodates VME64, VXS, and VPX boards in 6U and 3U form factors and is available in both standard and custom configurations at competitive pricing

RSC# 39609

3M Electronic Solutions Division 3M HSHM B19 Connector

Sponsored by Carlo Gavazzi Computing www.gavazzi-computing.com

VME and Critical Systems

Forced Air Conduction ATR

www.hybricon.com

Hypertronics KFT

Enclosures/Backplanes/Connectors RSC# 37571

High-density, low-profile mezzanine ultra-high reliability connectors suited for stacking and use in areas where board real estate is at a premium • Fine pitch, 1.27 mm spacing • 8.71 mm stacking height • Lowprofile, dual row in-line connector • Immune to shock and vibration fretting • Glass filled LCP insulator • 0.40 mm Hypertac hyperboloid contact

www.hypertronics.com

Enclosures/Backplanes/Connectors RSC# 34896

Positronic Industries PCS Mixed Density

Enclosures/Backplanes/Connectors RSC# 39522

VPX VITA 46/48 backplane • IEEE 1101.1/2 air- and conductioncooled • Mesh, star, dual star, ring, and daisy chain technology • Interconnect support • 16 differential pairs: 5 GBps/3.125 GBps • VME: 320 MBps using 2eSST • Fabric: Up to 192 differential pairs for signaling • 10 GBps @ 3.125 Gbps • 30 GBps @ 10 Gbps • 0.8" slot pitch • 0.8", 0.85", and 1.0" with REDI slot pitch • 5 V, 12 V, and 48 V power distribution

www.alligatordesigns.com

Enclosures/Backplanes/Connectors RSC# 34416

A connector that combines size 8 power contacts and size 20 signal contacts in a single housing • Conforms to U.L. requirements for 300 VAC applications • Size 8 power contacts have a resistance as low as 0.0003 ohms and can carry up to 85 A per U.L. 1977 • Available with 2 power and 8 signal contacts or 4 power and 10 signal contacts in solder, press-fit, and cable terminations • Other features include an integral locking system and blind mate capability

www.connectpositronic.com

www.3M.com/electronics

BKV46/48

RSC# 36385

Forced air, conduction-cooled enclosure • Responsible for protecting the COTS electronic payload in a sealed card cage • Capable of operating in extended temperature and shock/vibration environments • Nonoperating temperature: -50 °C to +85 °C • Temperature: -40 °C to +60 °C ambient at MSL • Top-load 6U dip brazed card cage • Eight-slot customer-specific VME64x backplane • Sealed internal area offering protection against foreign matter • Front-to-rear airflow over folded fin stock • 400 W MIL-STD-704E conductioncooled power supply • 28 V input • System monitoring • Top access panel with captive hardware • Front I/O panel • Provisions to mount rugged slides

www.gavazzi-computing.com

A High Speed Hard Metric (HSHM) connector • Supports speeds of up to 5.0 Gbps per differential pair while maintaining full pin-to-pin compatibility on the backplane with VME64x, P0 VITA 31, and P3 PICMG 2.16 connectors • Designed to meet the industry standard 2 mm hard metric format in accordance with the IEC-61076-4-101 connector standard • Virtual coaxial shielding provides maximum performance with minimal crosstalk and skew, allowing it to plug into existing 2 mm hard metric connectors and support PCI Express and RapidIO protocols • Fully compatible designs can be built with fast serial links running up to 5.0 Gbps per differential pair

Alligator Designs

Enclosures/Backplanes/Connectors

Vector Electronics & Technology, Inc. Series 790

Enclosures/Backplanes/Connectors RSC# 36945

A ruggedized VME/CompactPCI chassis/system enclosure • MIL-STD-461D compliant and certified • Low cost • Withstands high humidity, shock, and vibration in storage or transport • EMI/RFI gasketed removable front door • 300 W embedded power supply, conditioned for high humidity • 6U monolithic seven-slot backplane (other slot sizes available) • Wall-mounted fans for push/pull (four fans, 12 VDC, 89 cfm), side-to-side airflow • Rear-panel removable for custom I/O connector punching • Lightweight • Field tested

www.vectorelect.com

VME and Critical Systems / December 2008

ANNUAL BUYER’S GUIDE

VME and Critical Systems

Elma Electronic

“E-Frame” Open Access Test Chassis

Enclosures/Backplanes/Connectors

Elma Electronic

Enclosures/Backplanes/Connectors

The liquid-cooled Air Transport Rack (ATR) chassis can be configured in various sizes and configurations without starting from scratch, saving time, effort, and money • Can fit up to ten 6U x 160 mm slots in a 1 ATR short size • Designed to ARINC 404A, the chassis accepts conduction-cooled modules in various architectures such as VME64x, CompactPCI, VXS, VPX, and more • Independent dual liquid-cooled sidewalls dissipate in excess of 100 W per slot • Various cooling fluids can be used including glycol, kerosene, PAO, and salt water • With a proven high-integrity frame construction, the unit is highly ruggedized and meets MIL-STD-810E, -461D, and -704E • With a modular design, the ATR can be designed in various configurations • The chassis can easily be scaled up or down while using the same liquid-cooled side walls (that is, the walls for a 1 ATR are the same as those for a 1/2 ATR) • To reduce costs, the liquid cooling can be optionally limited to one side wall • The unit is powered via 28 V DC/270 V or optionally one- and three-phase 115 VAC @ 400 Hz • The chassis can take up to 1 KW of input power • Custom I/O solutions are optional including MIL-STD wiring and connectors

Elma Electronic Inc. has announced a new open-frame chassis for test/debugging • The unit does not have side or back walls around the card cage area, leaving it open for easy access • The E-Frame was designed with the high (and flexible) power and cooling requirements for VPX (VITA 46/48) systems • However, any 3U or 6U backplanes can be used, including VME64x, VXS, CompactPCI, and other backplane architectures • The Type 39E portable tower has a convenient carrying handle • With a rugged modular aluminum construction, the E-Frame tower can support up to 21 slots at .8" or 17 slots at 1" pitch • There are frontaccessible test points and monitoring LEDs for all VME, VPX, VXS, and CompactPCI voltages • This includes +3.3 V, ±5 V, ±12 V, ±24 V, and ±48 VDC • The E-Frame features high-performance cooling with 3 x 150 cfm fans under the card cage • The fans are speed controlled with fan fail indication • A system monitor with remote monitoring via Ethernet capability is optional • The black powder-coated finish of the E-Frame enhances aesthetics • Other features include a rear A/C Power Entry Module (PEM) with fuses, GND stud, and front-located ESD jacks • The unit also offers full Rear Transition Module (RTM) support

RSC# 35217

RSC# 39611

www.elma.com

Off-the-shelf products include 16-bit analog input and output cards, digital I/O cards with up to 160 channels, and signal conditioning cards. Call or visit our web site today to see what we can do to meet your embedded computing needs.

www.precisionanalog.com VME and Critical Systems / December 2008 31

Sponsored by Elma Electronic www.elma.com

Precision Analog Systems (PAS) specializes in VME and PCI Express designs, whether offthe-shelf, tailored to your specific application, or fully custom. PAS will modify existing products or design a new solution to meet your exact needs.

954.587.0668

Enclosures/Backplanes/Connectors

Liquid-cooled ATR

Enclosures/Backplanes/Connectors

ANNUAL BUYER’S GUIDE

ATR & Rugged Chassis Alligator Designs

VME/cPCI Backplanes

Enclosures/Backplanes/Connectors

www.alligatordesigns.com

Sponsored by Alligator Designs www.alligatordesigns.com

Alligator Designs

Enclosures/Backplanes/Connectors

VME32/VME64x/VXS/ VPX-REDI and CompactPCI 3U/6U backplanes ideally suitable for deployment of open-system based, real-time mission-critical applications • Comply with IEEE 1014-1987 and ANSI/ VITA 1-1994 standards and IEEE 1101.x mechanical standards • 2 to 21 VME slots • 2 to 8 CompactPCI slots, expandable up to 16 slots through CompactPCI bridge board • Temperature range: -40 °C to +85 °C • 16/32/64-bit addressing • 8/16/32/64 data width • Data transfer implementation: 40 MBps VME BLT bus cycle; 80 MBps VME64 MBLT; 160 MBps VME64x 2eVME; 320 MBps VME320 2eSST; PCIe, RapidIO, Star Fabric, Gigabit, and InfiniBand on VXS/VPX/REDI

ATR and rugged chassis providing standard or custom ATR volumes for air, land, and sea deployments • Standard or custom ATR sizes • Card area supports VME64x/CompactPCI or custom module resources • 2 to 18 slots count for ATRs • 2 to 20 slots count for rugged chassis • Input transients per MIL-STD-704E; environmental per MIL-STD-810F; EMI/EMC per MIL-STD-461E • Convection, conduction, forced air conduction with plenum, and liquid cooling methods implementations • Operating temperature: -40 °C to +85 °C • ARINC style or MIL-STD-C38999 connector termination for external interfacing

RSC# 39231

VME and Critical Systems

VME and Critical Systems / December 2008

RSC# 39230

www.alligatordesigns.com

ANNUAL BUYER’S GUIDE

VME and Critical Systems Enclosures/Backplanes/Connectors

BKV41

RSC# 39521

A VXS VITA 41 backplane • 6U VME switched serial • Up to 18 payload plus 2 switch slots • Switch fabric over P0: InfiniBand VITA 41.1, Serial RapidIO VITA 41.2, GbE VITA 41.3, and PCI Express VITA 41.4 • 320 MBps VME bandwidth • 16 differential pairs: 5 GBps/ 3.125 GBps • User I/O/bandwidth • 0.8" slot pitch • Optional custom design available

www.alligatordesigns.com

Precision Analog Systems (PAS) 9417/AO

I/O boards RSC# 31649

A 16-channel, 80 V 50 mA 6U VME amplifier card • 16 amplified channels with a gain of 2.4 • Other gains available as custom options • Output drive of up to ± 35 V and ± 50 mA • External supply voltage of ± 10 V to ± 40 V • Allows either onboard or external power supplies • Onboard DC-to-DC power supplies available • Output slew rate of 7 V per microsecond • Two optional frontpanel status LEDs driven by the PAS 9716/AO digital card • DB37 input and output connectors • Amplifier input and output signals available on P2 as an option

www.precisionanalog.com Harsh environments

Red Rock Technologies, Inc. Model RRT-1SFA-LW-X

RSC# 30397

A SCSI flash drive module with extended temperature range of -40 °C to +85 °C in a VME form factor • Provides a transparent interface from the SCSI bus to solid-state flash • Offers solid-state, drop-in replacement for electromechanical hard drives • Capacity of up to 128 GB in a single 6U VMEbus slot • Wide SCSI-2 LVD interface, configurable for 8-bit, single-ended, and SCSI-2 operation • Fast, efficient field replacement • Resistant to magnetic fields • Compatible with all CPUs using SCSI, SCSI-2, and Fast SCSI-2 SCSI interfaces • No additional software is required for operation as a SCSI data storage/bootable drive

Multicore

Dynatem, Inc. DPD

RSC# 34979

A rugged, low-power VMEbus SBC • Intel low-power Core-Duo (Yonah) processor @ 1.66 GHz • E7520 chipset for PCIe support and high memory bandwidth • Onboard SVGA controller • Two Gb LAN frontpanel ports plus two more routed to the backplane in compliance with VITA 31.1 • Supports two PMC sites, one of which optionally supports XMC modules • Available in conduction-cooled versions for rugged applications

www.dynatem.com

www.RedRockTech.com

CAEN

I/O boards

V1718 RSC# 18905

Emerson Network Power Embedded Computing MVME7100 SBC

VME master/slave; system controller • No boot required, ready at power-on • VME64x; A16, A24, A32, CR-CSR; D8, D16, D32, D64 • Front-panel display; seven programmable I/O NIM/TTL • USB 2.0 • Up to 30 MBps sustained transfer rate • Software: Windows/Linux; LabVIEW, VB, C/C++

VMP3

I/O boards RSC# 39414

3U VME CPU board with the Freescale PowerQUICC III RISC processor MPC8541 • Bandwidth with dual GbE plus one Fast Ethernet channel provide unprecedented networking bandwidth • Security provided by integrated security engine for encryption and authentication • Functionality is delivered via the VMEbus interface (Universe 2 bridge) for automatic first-slot detection • Integral FIFO buffers for multiple transactions and programmable DMA controller with linked list support • Diverse configuration is possible through one terminal port (Rx/Tx) routed to the front panel, and an additional four serial channels provide an extension connector

www.kontron.com

RSC# 38694

Multicore SBC • SoC MPC8641D processor • System-on-Chip Freescale MPC8641D with dual PowerPC e600 processor cores, dual integrated memory controllers, DMA engine, PCI Express interface, Ethernet, and local I/O • 2eSST VMEbus protocol • USB 2.0 controller for integrating cost-effective peripherals • Dual 33/66/100 MHz PMC-X sites for expansion via industry standard modules with support for processor PMCs • 8x PCI Express expansion connector for PMC-X and XMC expansion using XMCspan • MVME721A direct-connect Rear Transition Module (RTM) for I/O routing through rear of compact VMEbus chassis

www.emersonnetworkpower.com/ embeddedcomputing

www.caen.it

Kontron

Multicore

Kontron PENTXM2/4

Multicore RSC# 39449

6U VME single/twin Intel Dual-Core Xeon ULV boards • PENTXM2: 1.67 GHz Intel Dual-Core Xeon ULV processor SBC; dual Ethernet 10/100/1000 configurable either on front or rear VITA 31; commercial and rugged conduction-cooled • PENTXM4: Twin 1.67 GHz Dual-Core Intel Xeon processor VME SBC; up to 4 GB of DDR2 SDRAM and 4 GB soldered USB flash disk option

www.kontron.com

VME and Critical Systems / December 2008 33

Enclosures/Backplanes/Connectors | Harsh environments | I/O boards | Multicore

Alligator Designs

Multicore | PMC/XMC

ANNUAL BUYER’S GUIDE

VME and Critical Systems

Themis Multicore Boards

Acromag, Inc. Multicore

Themis Computer

Themis’ new processor boards incorporate multicore processors and design trends that were featured in their successful family of SPARC-based boards • New multicore VME SBCs from Themis bring low power and high performance to military and general embedded computing users for a wide range of applications, even in challenging environments – up to 30 g shock, 20 ms • The XV1 is Themis’ first board to feature the new Intel quadcore Intel Xeon processor • The TC2D64 memory modules feature a screwdown design to withstand high shock and vibration • Users can choose from cost-effective single-slot board configurations with extensive I/O • Or with the use of an optional I/O expansion card, occupying a second VME slot can significantly extend the I/O capabilities of these boards

RSC# 39523

Multicore

Sponsored by Themis Computer www.themis.com

RSC# 36187

The TC2D64 6U VME SBC • Intel Core 2 Duo processor, clocked at up to 2.16 GHz • Intel 7520 chipset • Clock rates of 1.5 GHz to 2.16 GHz • Up to 4 GB SDRAM • 1 MB flash • Error detection/correction: 8-bit ECC • PMC single slot (64-bit/66 MHz) • Two GbE ports • Four USB and four serial ports • Low 42 W power dissipation (1.5 GHz without PMC) and 54 W power dissipation (2.16 GHz without PMC) • -5 °C to +55 °C (ambient temperature) • OS support: Solaris, Linux, and Windows • Up to 30 g shock

www.acromag.com

Data Device Corp. (DDC) BU-65590F/M

Multicore

XV1

RSC# 39525

The XV1 is based on Intel’s quad-core Xeon processor, clocked at up to 2.13 GHz, and Intel’s 5100 chipset used in high-performance Xeon servers • Up to 8 GB DDRII SDRAM memory • Flash memory: 1 MB • Error detection/correction – 8-bit ECC • CompactFlash slot • XMC/PMC single expansion slot • Up to three GbE ports • Four USB ports and three SATA II ports • VITA 41 compliant • Cooling: -5 °C to +55 °C (ambient temperature) • Up to 30 g shock • Solaris 10, Linux, and Windows support

www.themis.com

VME and Critical Systems / December 2008

PMC/XMC RSC# 39277

A multi-protocol PMC card providing high levels of performance and flexibility for systems interfacing to a MIL-STD-1553 or ARINC 429 data bus • Conduction or air cooled • Multiple configuration options • IRIG-B time code input • 48-bit/1 microsecond time stamp • IRIG 106 Chapter 10 monitor format • DMA engine for low CPU and PCI utilization • E²MA BC/RT/MT architecture • 1 MB memory w/parity per 1553 channel • Built In Self Test (BIST) • VxWorks 5.x/6.x, Linux 2.6.x, and Windows 2000/XP support

www.ddc-web.com

Excalibur Systems, Inc. EXC-1553ccPMC/Px

PMC/XMC RSC# 34434

A multichannel (up to four) MIL-STD-1553 interface board for conductioncooled PCI Mezzanine Card (PMC) compatible computers • Each dual redundant 1553 channel can operate simultaneously as a bus controller and up to 32 remote terminals, and as a triggerable monitor • Compatible with all common variations of MIL-STD-1553 (A, B) • Error injection (BC and RT modes), error detection (all modes), and cableless internal loopback are supported on each channel • Supplied with C drivers, including source code and Merlin+ Windows software

www.themis.com

Themis Computer

RSC# 34853

PMC module with user-configurable Virtex-5 FPGA and plug-in analog and digital I/O cards • Download logic routines or algorithms into the FPGA for custom signal processing • Three Xilinx Virtex-5 FPGA options (VLX110T, VLX85T, and VSX95T) • Up to 110 K logic cells • Up to 640 DSP48E slices • Plug-in I/O for 100 MHz A/D, CMOS, LVDS, or RS-485 differential I/O • Two 256 K x 36-bit dual-ported SRAM and two 32 Mb x 36-bit DDR2 SDRAM • Conductioncooled or 0 to 70 °C operation

www.themis.com

Themis Computer Themis TC2D64

PMC-VLX/VSX

PMC/XMC

www.mil-1553.com

Kontron XMC-G72

PMC/XMC RSC# 39447

Dual-head graphics XMC mezzanine card • Dual independent display DVI-I and VGA • ATI/AMD M72-CSP-128 E2400 graphics controller • 128 MB on-chip GDDR3 memory • PCI Express x8 interface to host • Low power dissipation • Rugged conduction-cooled also available

www.kontron.com

ANNUAL BUYER’S GUIDE

VME and Critical Systems

4978

RSC# 39353 An eight-lane SATA/SAS controller PMC • Dual SFF-8470 front-panel connectors • Rates up to 3 Gbps per lane • Onboard storage of user-defined parameters, BIOS, and mirroring data • Eight sets of onboard LEDs convey device status and activity • RoHS compliant, lead-free

www.technobox.com PMC/XMC

TEWS Technologies LLC TPMC363

RSC# 33388

A conduction-cooled PMC module with four high-speed synchronous/ asynchronous serial interfaces implemented in FPGA logic and designed for harsh environmental conditions • I/O access on rear connector P14 • Physical interface (individually programmable per channel): EIA-232, EIA-422, EIA-449, EIA-530, EIA-530A, V.35, V.36, and X.21 • Maximum data rate: 10 Mbps (synchronous), 2 Mbps (asynchronous), internal or external clock provided • EIA-232: up to 115.2 kbps • Temperature range: -40 °C to +85 °C

www.tews.com

Concurrent Technologies, Inc. FP 210/024

RapidIO/PCI-X/GbE/PCIe RSC# 38998

A 24-port managed Ethernet switch • Designed for time-critical voice, video, and data • Marvell Prestera 98DX240-based 6U card • Routes 12 ports to the front panel and 12 to P2 • Optional rear transition module with 12 RJ45s on it • Consumes less than 20 W • Available in wide temperature and conduction-cooled versions • Each port is 10/100/1000 Mbps • Two of the front panel’s ports can be rigged for optical Ethernet connections • The switch’s core supports wire-speed and Layer 2 QoS switching and can learn and cache up to 8,192 MAC addresses • Four hardware priority queues are available per port • FP 210/024 supports port ID, MAC address, IEEE 802.1p, IEEE 802.1Q, IPv4, and IPv6

www.cct.co.uk

Interface Concept Cometh4070a

RapidIO/PCI-X/GbE/PCIe RSC# 36097

L2 and L3 GbE VME switch • 24 10/100/1000 Ethernet ports routed to the rear VME connectors – optional front ports with fibre channels • Layer (L3) IPv4 and IPv6 routing • Low power consumption • Standard, extended, rugged, and conduction-cooled grades • Remote diagnosis and cable fault report • Advanced security functions (SSL/SSH, address learning, and threat management)

www.interfaceconcept.com

Tundra Semiconductor Corporation Tsi382

RapidIO/PCI-X/GbE/PCIe RSC# 39328

Small form-factor, high performance PCI Express bridge that connects a single-lane PCI Express (x1 PCIe) interface to the PCI bus standard • RoHS compliant 10 mm x 10 mm, 0.8 mm ball pitch BGA package rated for industrial temperature operation (-40 °C to +85 °C) • A 20 mm x 20 mm LQFP package option available for cost-sensitive applications • Bridging – transparent, opaque, and nontransparent • No power sequencing restrictions, simple 2 V supply • Suited for applications that need to bridge from PCIe to conventional 32-bit PCI devices

www.tundra.com

Tundra Semiconductor Corporation Tsi620

RapidIO/PCI-X/GbE/PCIe RSC# 39327

Multi-standard RapidIO switch • RapidIO interface with configurable port modes: up to three ports in 4x mode, and up to six ports in 1x mode FPGA interface that supports one 4x or 1x RapidIO port • PCI interface: 32/64-bit addressing, 32-bit data, up to 66 MHz operation, supports message signaled interrupts, PCI master, and PCI target capability • RapidIO switch: 10 Gbps inbound/outbound bandwidth at 3.125 Gbaud/s per lane for a 4x mode port • RapidIO-toPCI bridge: nontransparent bridging between RapidIO ports and up to four PCI devices • Low power: Leverages Tsi57x technology at 120-200 mW per RapidIO port, while typical power at full operation is less than 4 W

www.tundra.com

Tundra Semiconductor Corporation Tsi148

RapidIO/PCI-X/GbE/PCIe RSC# 31131

VME-to-PCI-X bus bridge • Sustained transfer rate of 305 MBps in 2eSST – higher system bandwidth • Multithreading – capable of a number of simultaneous transactions while optimizing bus utilization • Full-featured master, slave, and system controller – can be used in any VME application • PCI-X local bus supports two loads at 133 MHz • Small device footprint • Proven VME backwards compatibility • VME64 extensions 2eVME and 2eSST protocols bring support for higher bandwidth • Full VMEbus system controller functionality • Interrupt and interrupt handling capability • Flexible register set; programmable from both the PCI-X bus and VMEbus

www.tundra.com SBCs

Kontron PowerEngine7

RSC# 39446

A 6U VME PowerPC SBC • Features a PowerPC 750FX/GX microprocessor • Single or dual PowerPC 750FX/GX operating at up to 1 GHz • Two PCI Mezzanine Card sites • Lowpower ALMA2e PCI/VME64 bridge featuring 2eSST capabilities • Available in all four environmental ruggedization levels • Fast-track two-week lead time version available • Supports VxWorks, LynxOS, INTEGRITY, Linux, and SYSGO ELinOS

www.kontron.com

VME and Critical Systems / December 2008 35

PMC/XMC | RapidIO/PCI-X/GbE/PCIe | SBCs

PMC/XMC

Technobox, Inc.

SBCs | Software-Defined Radio | Storage

ANNUAL BUYER’S GUIDE

VME and Critical Systems

Themis VMEbus SBCs

Pentek, Inc. SBCs

Themis Computer

Themis’ Single Board Computers (SBCs) incorporate high-performance processors with design features used in their successful family of processor boards • New VMEbus SBCs from Themis bring low power and high performance to military and general embedded computing users for a wide range of applications, even in challenging environments – up to 30 g shock, 20 ms • Themis’ TC2D64 memory modules feature a screw-down design to withstand high shock and vibration • Users can choose from cost-effective single-slot board configurations with extensive I/O • Or with the use of an optional PMC I/O expansion card, occupying a second VME slot can significantly extend the board’s I/O capabilities

RSC# 39524

SBCs

Sponsored by Themis Computer www.themis.com

RSC# 36187

A 6U VME SBC • Intel Core 2 Duo processor, clocked at up to 2.16 GHz • Intel 7520 chipset • Clock rates of 1.5 GHz to 2.16 GHz • Up to 4 GB SDRAM • 1 MB flash • Error detection/correction: 8-bit ECC • PMC single slot (64-bit/66 MHz) • Two GbE ports • Four USB and four serial ports • Low 42 W power dissipation (1.5 GHz without PMC) and 54 W power dissipation (2.16 GHz without PMC) • -5 °C to +55 °C (ambient temperature) • OS support: Solaris, Linux, and Windows • Up to 30 g shock

RSC# 38703

32-channel Software-Defined Radio PMC module • Four 200 MHz 16-bit A/D converters • 32-channel digital downconverter IP core installed in its Xilinx Virtex-5 FPGA • LVPCL clock/sync bus for multimodule synchronization • User-programmable filter coefficients • 32 channels of DDC in four banks of eight channels • Independent 32-bit DDC tuning for all 32 channels • DDC decimation from 16 to 8,192 in steps of 8 • Bandwidths from 20 KHz to 10 MHz • Common decimation factor within each DDC bank • Different decimation factors between banks • Userprogrammable 18-bit FIR filter coefficients • Default filters offer 0.2 dB ripple and 100 dB rejection

www.pentek.com

Pentek, Inc. 7153

Software-Defined Radio RSC# 39407 A four-channel SDR PMC module • Four 200 MHz 16-bit A/D converters • Four-channel digital downconverter IP core installed in a Xilinx Virtex-5 FPGA • Also functions as two-channel DDC with higher decimation range • LVPCL clock/sync bus for multiboard synchronization • User programmable filter coefficients • Complete software radio interface solution

www.pentek.com

www.themis.com

Themis Computer Themis TC2D64

7152

Software-Defined Radio

Pentek, Inc. RTS 2721

Software-Defined Radio RSC# 38753

Portable multiband recording and playback instrument • Portable briefcase-sized instrument with built-in LCD display • 23 lbs with 12-drive RAID array installed • Dual-channel transceiver recording and playback system • High-performance Windows workstation • Two 14-bit 125 MHz A/Ds • Two 16-bit 500 MHz D/As • RAID storage to 2.4 TB

www.pentek.com

www.themis.com SBCs

Themis Computer XV1

RSC# 39525

The XV1 is based on Intel’s new quad-core Xeon processor, clocked at up to 2.13 GHz, and Intel’s 5100 chipset used in high-performance Xeon servers • Up to 8 GB DDRII SDRAM memory • Flash memory: 1 MB • Error detection/correction – 8-bit ECC • CompactFlash slot • XMC/PMC single expansion slot • Up to three GbE ports • Four USB ports and three SATA II ports • VITA 41 compliant • Cooling: -5 °C to +55 °C (ambient temperature) • Solaris 10, Linux, and Windows support • Up to 30 g shock

www.themis.com

VME and Critical Systems / December 2008

3M Electronic Solutions Division 3M MiniSAS System

Storage RSC# 39490

The new 3M Mini Serial Attached SCSI (small computer system interface) external cable assembly provides top performance for SAS storage • Capable of 6 Gbps per channel data rate • Tested to SAS-2 specification • Conforms to the SFF 8086, 8087, and 8088 standards as well as the current SAS 1.1 specification • Metal latch designed to promote retention • Pull tab ring provides easier unmating • Two levels of EMLB for hot plugging

www.3M.com/electronics

VME and Critical Systems

Flash PMCStor

Storage

Storage | Test and instrumentation

ACT/Technico

RSC# 38205

A low-power, conduction-cooled, solid-state flash memory PMC module with up to 128 GB of NAND flash memory • Complete solution with drive, interface, and software provided • Replaces external hard drives or disk modules that require external fixtures or system slots • Eliminates cables and the need to use SCSI-based storage • Ultra ATA/133 mass storage solution on PMC form factor • Uses industrial temperature range components (-40 °C to +85 °C operating) • 32 Kb flash memory provides storage for BIOS • Supports CompactFlash drives (CF and CF-II) • Available in two versions: convection-cooled extended temp with solid front panel or conduction-cooled extended temp with no front panel

www.acttechnico.com

Conduant Corporation StreamStor Amazon Express

Storage RSC# 38330

A storage controller with sustained recording and playback at more than 600 MBps • Multisource card-to-card PCI Express recording • PCI Express eight-lane bus interface • Mezzanine card bus to add external data I/O interfaces • Capacity from 250 MB to 16 TB • Onboard PowerPC and real-time operating system • 16 SATA disk interfaces • 2,048 MB (2 GB) memory buffer • Record card-to-card from PCI acquisition cards • Scatter/gather DMA to/from host memory

www.conduant.com

Phoenix International VS1-250-SS/SA

Storage RSC# 37068

Can be configured with SAS and/or SATA hard disk or solid-state disk drives • Storage capacity to 640 GB in a single 6U VMEbus slot • Very low power consumption • Dual drive configurations may be mirrored for data redundancy or stripped for high data throughput • Individual point-to-point storage device connectivity • Optional extended operating temperature HDDs from -30 °C to +85 °C

www.phenxint.com

AIM-USA APG-FC4

Test and instrumentation RSC# 33358

AIM-USA’s Fibre Channel multifunction, high-performance test module offers simultaneous data generation and analyzer functions • Used for test and verification of all layers of the Fibre Channel International communication protocol and upper layer protocols including Anonymous Subscriber Messaging (ASM), RDMA, FC-AV, and ARINC 818 • Configured with two Fibre Channel ports that can operate at 1, 2, and 4 Gbaud, and ports can be software configured to run at any speed in between • Board can be configured with up to 8 GB onboard memory • PCI-X interface enables data to be streamed quickly

www.aim-online.com

VME and Critical Systems / December 2008 37

Test and instrumentation | VITA 46 | VITA 41

ANNUAL BUYER’S GUIDE

VME and Critical Systems

VPX SerDes Test Modules

Highland Technology, Inc. VITA 46

Elma Electronic

The SerDes modules are designed to plug into VPX backplanes and directly test the channel compliance • They can be used to test VPX switch and node cards and/or the backplane channels without requiring external equipment or special test fixtures • Plugging directly into the backplane/chassis, the modules allow quick and easy characterization of the signals and eliminate the need for SMA connectors, cables, and capital-intensive measurement hardware • With a USB connection to a laptop or desktop computer, it is easy to create eye diagrams, measure Bit Error Rates (BER) and jitter, and more • The module kit includes software with a simple GUI interface • Within minutes, the user can plug the cards into the test chassis, connect the USB cable to a laptop, download the GUI software, and begin measurements • The first in the test module series is an eight-channel version for 6U cards • With a scalable design, configurations in 4, 12, or 16 channels are available upon request • The SerDes test technology deployed in the VPX test modules is modular and can be affixed to various form factor carrier boards • The modules can be designed for other architectures

RSC# 36795

Test and instrumentation

T344 & T346

RSC# 37789

Two new members of T340 series of embedded complex waveform generators • The T346 features four output channels capable of generating standard and arbitrary waveforms from microHz to +32 MHz, and four additional internal channels are usable as modulation and summing sources • T346 channels can also be pulse/PWM and Gaussian noise sources, and can be summed with or modulate one another in any combination • Modulations for the T346 include AM, FM, PM, and PWM • The T344 version is a four-channel ARB without modulations

www.highlandtechnology.com

North Atlantic Industries

Test and instrumentation

65CS4

RSC# 36322

A high-accuracy, high-density synchro/resolver VXI instrument card • Up to 0.005° accuracy provided for measurement and stimulus channels • Up to four synchro/resolver instrument-grade measurement channels and up to four synchro/resolver instrument-grade stimulus channels; or up to eight synchro/resolver embedded-grade stimulus channels and up to six programmable reference supplies • All functions are independent, user programmable for either synchro or resolver format, and may be formatted for single-speed or multi-speed applications • Incorporates an internal wraparound selftest function that does not require external hardware or software

www.naii.com

www.elma.com

Precision Analog Systems (PAS)

Test and instrumentation

PAS 9510/MON

RSC# 39322

A remote temperature monitoring module • Remotely monitors a system’s temperature, fan, and power supply status to ensure a safe operating environment in equipment cabinet • Prevents malfunction and overheating in critical systems • The module monitors 16 open collector fan status lines and four thermistor temperature sensors • Signal status is transmitted to the host computer over an RS-232 serial interface in response to queries from the host • All of the circuitry is contained in a small anodized aluminum enclosure that can be mounted close to the points being monitored • Designed to operate in harsh environments

Sponsored by Elma Electronic www.elma.com

www.precisionanalog.com

GE Fanuc Intelligent Platforms, Inc. V7812

VITA 41 RSC# 38568

A 6U VMEbus SBC suited for graphics-rich applications such as flight simulation control, data encryption, and video compression • Features Intel’s Quad- or Dual-Core LV Xeon at up to 2.13 GHz • Intel 5100 Memory Controller Hub (MCH) chipset offers six PCI Express connections onboard • 4 MB L2 cache • Includes the AMD ATI Radeon M72 graphics module, which incorporates 65 nm technology and the ATI Radeon E2400 graphics processing unit for HD decoding and high-quality display • V7812 also includes support for six USB 2.0 ports and up to 4 GB DDR2 ECC SDRAM • Available in the VXS (VITA 41) form factor

www.gefanuc.com/embedded

VME and Critical Systems / December 2008

ANNUAL BUYER’S GUIDE

VME and Critical Systems

VXS Backplane VITA 41 (18+2+1 slot)

RSC# 39526

A VITA 41 VXS backplane (18+2+1 slot) • Two dual-star switch slots in the middle • Equal data line length on both sides, with a max skew of 1.8 ns • Payload slot connected by a differential pair to each switch slot • VME64x slot at the left • Differential pairs can be used for VITA 41.1 (InfiniBand) as well as for VITA 41.2 (RapidIO) • Based on patented technology, the automatic electrical daisy chaining signal goes in both directions • Highcurrent power rails for each voltage at the back

www.hartmann-elektronik.de

W-IE-NE-R Plein & Baus GmbH WIENER 6023

VITA 41 RSC# 39527

VITA 41/VXS chassis, modular designed • 21 slots (2 switch slots, 18 payload slots, 1 legacy VME64x slot) • Combines superior mechanical quality with lowest noise power supply technology; up to 3 kW low-noise DC power in different configurations • Microprocessor-controlled power supplies and fan trays with advanced integrated diagnostic and remote monitoring (Ethernet/WWW) • Outfitted with IEEE 1101.10-style mechanics offering excellent EMC and ESD shielding • Built-in air compression chamber

www.wiener-d.com

VXS Backplanes Elma Bustronic

VITA 41

Hartmann Elektronik

Elma Bustronic Corporation, an industry leading designer and manufacturer of highperformance backplanes, has developed a new size for its line of VXS backplanes • The eightslot VXS backplane features a star routing topology and fits in most 4U high horizontal-mount enclosures • The eight-slot star VXS backplane complies to VITA 41.0 • It features one hub slot and seven payload slots in a 14-layer controlled-impedance strip-line design • Backplane simulation confirms strong signal performance • Meanwhile, the 6U high-backplane has power studs in 3.3 V, 5 V, 12 V, and GND along the top and bottom of the backplane to allow for flexible power options • Bustronic also offers VXS star backplanes in five slots and an eight-slot with one hub, five payload, and two legacy VME64x slots

RSC# 39610

www.bustronic.com

Sponsored by Elma Bustronic www.bustronic.com VME and Critical Systems / December 2008 39

By Chris A. Ciufo

Core 2 Duo comes to VPX Staying flawlessly on message, Curtiss-Wright Controls Embedded Computing continues its VPX market onslaught with its new VPX6-1952 VPX SBC, this time with Intel’s T9400 Core 2 Duo CPU. Says CWCEC, the board is used in the Integrated Computer System (ICS) of the Army’s Future Combat Systems (FCS) program. Intel’s Penryn CPU is part of the 45 nm mobile processor family, is on the company’s seven-year availability plan, and boasts a maximum TDP of 35 W running at about 1.0 VDC. On CWCEC’s SBC, the unit screams along at 2.5 GHz, has a 6 MB cache, and a 1,066 MHz FSB (versus a “mere” 667 MHz on previous versions). The ever-important chipset is Intel’s GM45, which supports up to 8 GB of memory on this 6U VPX board. Elsewhere there are dual GbE ports, 3 serial ports, an astounding 10 USB ports, and even an XMC site with 20 differential and 2 single-ended backplane-mapped pairs. Though VPX is designed as a platform for myriad gigabit backplane I/O, many C4ISR applications still run on civilian-style x86 processors, with COTS peripherals such as printers, biometric scanners, and flash drives. The VPX6-1952 balances embedded desktop capabilities with custom mezzanine I/O in VPX-equipped chassis. Curtiss-Wright Controls Embedded Computing • www.cwcembedded.com • RSC# 39639

Graband-go dev system Developing systems or boards based upon 6U VME, CompactPCI, or VPX? Then you know that trying to debug boards inside a 19-inch rack, ATR box, or shoebox is next to impossible. Never mind the 0.8 backplane spacing (which allows “zero” access to the boards), but it’s also more than difficult to access the chassis backplane or extender cards. Carlo Gavazzi Computing Solutions has an answer to this paradigm: the 522 Development System. This open-frame design is both compact and portable – allowing designers access to boards – and rugged enough to be transported to the field. Designed specifically for 6U cards, the chassis features 200 cfm speed-controlled fans designed to cool up to seven cards and rear transition modules. The Development System’s standard backplane accommodates one CompactPCI, two VME64x, and five VPX 6U LRUs. Of course, the system is compatible with the applicable VITA and PICMG standards for each type. The system is available with front-mounted test points, LEDs for all DC voltages, and an optional LCD monitoring system for voltage, temperature, and fans. Carlo Gavazzi Computing Solutions www.gavazzi-computing.com RSC# 39609 Editor’s Choice Products are drawn from OSM’s product database and press releases. Vendors may add their new products to our webs te at http://subm t.opensystemsmedia.com and submit press releases at http://submit.opensystemsmedia.com. OSM reserves the right to publish products based on ed tors’ discretion alone, and does not guarantee publication of any product entries.

VME and Critical Systems / December 2008

RSC# 44 @ www.vmecritical.com/rsc