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The Gating Factor to Higher Yield Application of Scatterometry for Inline Prediction of Electrical Performance Matthew Sendelbach, Chas Archie, Bill Banke, IBM Microelectronics Jason Mayer, Formerly of IBM Microelectronics Hideaki Nii, Toshiba America Electronic Components Pedro Herrera, Matt Hankinson, KLA-Tencor
Currently, CD-SEMs are the tool of choice for inline gate length measurements for most semiconductor manufacturers. This is mainly due to their flexibility, throughput, and ability to correlate well to physical measurements (e.g., XSEM). Scatterometry, however, is still being used by an increasing number of manufacturers to monitor and control gate lengths. But can a scatterometer measure such small critical dimensions well enough? In this article, we explore this question by analyzing data taken from wafers processed using 90 nm node technology. We also show how total measurement uncertainty (TMU) analysis is used to improve the scatterometry model and understand the relative contributions from obstacles that hinder even better correlations.
Introduction
A critical component of device performance is the effective control of gate linewidth in manufacturing. There are several critical dimension (CD) metrology technologies currently used, including CD-SEM, electrical CD, CD-AFM, and scatterometry. The ideal measurement should provide the linewidth information and throughput required for an inline measurement, while providing adequate correlation to electrical performance. In this article, we will address several key questions essential for the adoption of scatterometry CD technology for high-volume manufacturing at the 90-nm node and beyond. Does the technique provide a measurement of sufficient quality for line control, and how should that quality be quantified? Can the measurement provided by scatterometry CD on grating targets be directly related to critical electrical measurements (Lpoly, for example)? What is the best grating pitch for scatterometry to monitor? Previous authors have compared multiple CD metrology techniques. For instance, Kye and Levinson1
investigated methods for achieving good correlation between electrical CD and CD-SEM to reduce the offset. Correlation between scatterometry CD and electrical parameters (i.e., drive current) was established by Hodges et. al.2 Solecky, Mayer, and Archie3 have investigated methods to improve the correlation between CD-SEM and electrical test, and discuss the appropriateness of metrics to evaluate correlation between metrology systems. These evaluation metrics were formalized by Sendelbach and Archie4 with a rigorous statistical analysis, called total measurement uncertainty (TMU) analysis, to compare multiple metrology techniques. This article presents recent work to provide a statistically rigorous comparison (using TMU analysis) between scatterometry and electrical data to establish scatterometry as a viable measurement technique for inline prediction of electrical performance. Wafer samples and their measurement
Wafer description IBM fully integrated 200 mm SOI product wafers at the 90 nm node were used in this experiment. After gate formation, the wafers were measured on both a CD-SEM and a scatterometer. The CD-SEM is a Winter 2005
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