Weighted least squares regression for advanced overlay control Dana Kleina, John C. Robinson*b, Guy Cohena, Chin-Chou Kevin Huangb, Bill Piersonb a
KLA-Tencor Corporation Israel, Haticshoret St., Migdal Haemek 23100, Israel b KLA-Tencor Corporation, One Technology Drive, Milpitas, CA 95035, USA Abstract
Controlling overlay performance has become one of the key lithographic challenges for advanced integrated circuit manufacturing. Overlay error budgets of 4 nm in the 2x node require careful consideration of all potential error sources. Overlay data modeling is a key component for reducing systematic wafer and field variation, and is typically based on ordinary least squares (OLS) regression. OLS assumes that each data point provides equally reliable information about the process variation. Weighted least squares (WLS) regression can be used to improve overlay modeling by giving each data point an amount of influence on the model which depends on its quality. Here we use target quality merit metrics from the overlay metrology tool to provide the regression weighting factors for improved overlay control in semiconductor manufacturing. Keywords: Overlay, overlay analysis, overlay modeling, weighted least squares
1. INTRODUCTION Lithographic process control and the reduction of parametric variability has been one of the key enablers in the progression of advanced integrated circuit manufacturing. Controlling overlay performance has always been an important factor and has garnered in increasing proportion of concern as the industry transitions to the 2x and 1x nodes. The ITRS roadmap [1], as shown in Figure 1 indicates 4.7 nm and below overlay error budgets are required, and for which there are no known manufacturable solutions. Given the shrinking overlay error budget, a careful consideration of all potential error sources is required. For overlay metrology, previously the primary industry focus has been on precision and matching whereas more recently the emphasis is turning to accuracy and the improvement of metrology tools, metrology tool recipes, metrology targets, and sampling [2]. This study focuses on improvements in the accuracy of overlay data modeling, which is a key component of overlay process control.
Figure 1. The ITRS Roadmap outlines the significant challenges of overlay in the coming years including 4 nm overlay error budgets for the 2x nodes. Shrinking overlay budgets indicate the need for improved performance and process control methods. White indicates manufacturable solutions exist, yellow indicates manufacturable solutions are known, and red indicates that there are no known manufacturable solutions.
*John.Robinson@KLA-Tencor.com, +1-512-231-4221 Metrology, Inspection, and Process Control for Microlithography XXVI, edited by Alexander Starikov, Proc. of SPIE Vol. 8324, 832425 路 漏 2012 SPIE 路 CCC code: 0277-786X/12/$18 路 doi: 10.1117/12.916396
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