Computer organization and architecture 10th edition stallings test bank 1

Page 1

ComputerOrganizationandArchitecture,10th Edition,byWilliamStallings

Computer Organization and Architecture 10th Edition Stallings

Test Bank

Full download at link: https://testbankpack.com/p/testbank-for-computer-organization-and-architecture-10thedition-by-stallings-isbn-0134101618-9780134101613/ CHAPTER 4: CACHE MEMORY

TRUE OR FALSE

T F 1. Nosingletechnologyisoptimalinsatisfyingthememory requirementsforacomputersystem.

T F 2. Atypicalcomputersystemisequippedwithahierarchyofmemory subsystems,someinternaltothesystemandsomeexternal.

T F 3. Externalmemoryisoftenequatedwithmainmemory.

T F 4. Theprocessorrequiresitsownlocalmemory.

T F 5. Cacheisnotaformofinternalmemory.

T F 6. The unit of transfer mustequalawordoranaddressableunit.

T F 7. Bothsequentialaccessanddirectaccessinvolveasharedreadwritemechanism.

T F 8. Inavolatilememory,informationdecaysnaturallyorislostwhen electricalpowerisswitchedoff.

T F 9. Toachievegreatestperformancethememorymustbeabletokeep upwiththeprocessor.

T F 10. Secondarymemoryisusedtostoreprogramanddatafilesandis usuallyvisibletotheprogrammeronlyintermsof individual bytesorwords.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

ComputerOrganizationandArchitecture,10th Edition,byWilliamStallings

T F 11. TheL1cacheisslowerthantheL3cache.

T F 12. With write back updatesaremadeonlyinthecache.

T F 13. Ithasbecomepossibletohaveacacheonthesamechipasthe processor.

T F 14. AllofthePentiumprocessorsincludetwoon-chipL1caches,one fordataandoneforinstructions.

T F 15. CachedesignforHPCisthesameasthatforotherhardware platformsandapplications.

MULTIPLE CHOICE

1. __________referstowhethermemoryisinternalorexternaltothecomputer.

A. Location B. Access

C. Hierarchy D. Tag

2. Internalmemorycapacityistypicallyexpressed intermsof_________.

A. hertz B. nanos

C. bytes D. LOR

3. Forinternalmemory,the__________isequaltothenumberofelectricallines intoandoutofthememorymodule.

A. accesstime B. unitoftransfer

C. capacity D. memoryratio

4. “Memoryisorganizedintorecordsandaccessmustbemadeinaspecific linearsequence”isadescriptionof__________.

A. sequentialaccess B. directaccess

C. randomaccess D. associativeaccess

5. individualblocksorrecordshaveauniqueaddressbasedonphysical locationwith__________.

A. associativeaccess B. physicalaccess

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

C. directaccess D. sequentialaccess

6. Forrandom-accessmemory,__________isthetimefromtheinstantthatan addressispresentedtothememorytotheinstantthatdatahavebeenstored ormadeavailableforuse.

A. memorycycletime B. directaccess

C. transferrate D. accesstime

7. The________consistsoftheaccesstimeplusanyadditionaltimerequired beforeasecondaccesscancommence.

A. latency B. memorycycletime

C. directaccess D. transferrate

8. Aportionofmainmemoryusedasabuffertoholddatatemporarilythatisto bereadouttodiskisreferredtoasa_________.

A. diskcache B. latency

C. virtualaddress D. miss

9. Alineincludesa_________ thatidentifieswhichparticularblockiscurrently beingstored.

A. cache B. hit

C. tag D. locality

10.__________isthesimplestmappingtechniqueandmapseachblockofmain memoryintoonlyonepossiblecacheline.

A. Directmapping B. Associativemapping

C. Setassociativemapping D. Noneoftheabove

11.Whenusingthe__________techniqueallwriteoperationsmadetomain memoryaremadetothecacheaswell.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

ComputerOrganizationandArchitecture,10th Edition,byWilliamStallings

A. writeback B. LRU

C. writethrough D. unifiedcache

12.Thekeyadvantageofthe__________designisthatiteliminatescontentionfor thecachebetweentheinstructionfetch/decodeunitandtheexecutionunit.

A. logicalcache B. splitcache

C. unifiedcache D. physicalcache

13.ThePentium4_________componentexecutesmicro-operations,fetchingthe requireddatafromtheL1datacacheandtemporarilystoringresultsin registers.

A. fetch/decodeunit B. out-of-orderexecutionlogic

C. executionunit D. memorysubsystem

14.Inreferencetoaccesstimetoatwo-levelmemory,a_________occursifan accessedwordisnotfoundinthefastermemory.

A. miss B. hit

C. line D. tag

15.Alogicalcachestoresdatausing__________.

A. physicaladdresses B. virtualaddresses

C. randomaddresses D. noneoftheabove

SHORT ANSWER

1. __________memoryconsistsofperipheralstoragedevices,suchasdiskand tape.

2. Onebyteequals__________bits.

3. Fromauser’spointofviewthetwomostimportantcharacteristicsof memoryarecapacityand_____________.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

ComputerOrganizationandArchitecture,10th Edition,byWilliamStallings

4. Thethreeperformanceparametersformemoryare: accesstime,transfer rate,and_________.

5. _________isarandomaccesstypeofmemorythatenablesonetomakea comparisonofdesiredbitlocationswithinawordforaspecifiedmatch,and todothisforallwordssimultaneously,thusretrievingawordbasedona portionofitscontentsratherthanitsaddress.

6. The________rateistherateatwhichdatacanbetransferredintooroutofa memoryunit.

7. Themostcommonlyusedphysicaltypesofmemoryare: semiconductor memory,__________memory(usedfordiskandtape),andopticaland magneto-optical.

8. Thethreekeycharacteristicsofmemoryarecapacity,accesstime,and_______.

9. External,nonvolatilememoryisreferredtoas___________orauxiliary memory.

10. Thecacheconsistsofblockscalled__________.

11. __________computingdealswithsupercomputersandtheirsoftware.

12. ThePentium4processorcoreconsistsoffourmajorcomponents: fetch/decodeunit,out-of-orderexecutionlogic,memorysubsystem,and __________.

13.The__________unitsexecutemicro-operations,fetchingtherequireddatafrom theL1datacacheandtemporarilystoringresultsinregisters.

14. __________memoryisafacilitythatallowsprogramstoaddressmemoryfrom alogicalpointofview,withoutregardtotheamountofmainmemory physicallyavailable.

15.Forset-associativemappingthecachecontrollogicinterpretsamemory addressasthreefields: Set,Word,and__________.

ComputerOrganizationandArchitecture,10th Edition,by
WilliamStallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

ComputerOrganizationandArchitecture,10th Edition,byWilliamStallings

CHAPTER

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
OR FALSE 1. T 2. T 3. F 4. T 5. F 6. F 7. T 8. T 9. T 10. F 11. F 12. T 13. T 14. T 15. F
CHOICE 1. A 2. C 3. B 4. A 5. C 6. D
4: CACHE MEMORY
TRUE
MULTIPLE

byWilliam

7. B 8. A 9. C 10. A 11. C 12. B 13. C 14. A 15. B
ANSWER 1. External 2. 8 3. performance 4. memorycycletime 5. Associative 6. transfer 7. magneticsurface 8. cost 9. secondary 10. lines 11. High-performance 12. executionunits 13. execution 14. Virtual 15. Tag
ComputerOrganizationandArchitecture,10th Edition,
Stallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
SHORT

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