IRJET- Analysis and Simulation of 9-Level Cascaded H-Bridge Multi Level Inverter using Level-Shift P

International Research Journal of Engineering and Technology (IRJET)

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Analysis and Simulation of 9-Level Cascaded H-Bridge Multi Level Inverter Using Level-Shift PWM Technique Narendra Verma1, Dr. Pramod Sharma2 1M.Tech

Scholar,

2Professor,

Dept. of electronics and communication engineering, Regional college for education and technology Jaipur, Rajasthan, India ----------------------------------------------------------------------------***---------------------------------------------------------------------------Abstract: This manuscript presents the achieved efforts on (SPWM) etc and to control the output voltage of multilevel 1-ϕ 9-level cascaded H-bridge multilevel inverter. To cheer

inverter; carrier based PWM is one of them. It is a so called

the quality of 9-level CHBMLI output parameters primarily

sine triangle PWM; as a reference is sine wave and carrier is

THD and switching losses, multicarrier level shifted

triangular wave. Level shifted method is a type of sine PWM

technique is consider for controlling the gate pulse of 9-level

technique and it has three types, namely: In this paper

CHBMLI and the complete analysis of THD for 9-level is

simulation of 9-level CHBMLI is done using level shifted

done. This work is performed and results are validated using

PWM technique for single phase, and there THD is analyzed.

MATLAB/SIMULINK.

CASCADED H BRIDGE MULTILEVEL INVERTER

Keywords: Multilevel Inverter (MLI), Cascaded H-Bridge

The multilevel inverter (MLI) is best suited for the

(CHBMLI), Multicarrier pulse width modulation technique

application which demands the finest quality of AC output

(MCPWM).

waveform. Cascaded H bridge multilevel inverter (CHB MLI)

INTRODUCTION:

is different in many features from NPC MLI and CC MLI on the approach to accomplish different voltage waveforms at

Multilevel inverter (MLI) is playing a important role in the

different levels. It uses cascaded H bridge inverters various

field of medium and high voltage industries. The design of

DC sources in the formation of various units. The total output

MLI is mainly depends on number of DC supplies, number of

voltage in figure is the sum of the total of all full H bridge

switches, voltage levels, DC link capacitors and output power

inverter and all H bridge creates three voltages(+V, 0 & -V).

quality. Most of the MLI are subdivided into three main categories flying capacitor (FC), neutral point clamped (NPC)

The switching state of CHB MLI (ss) can be determined by

and the cascaded H bridge (CHB). CHB MLI is very commonly

S=2n+1

used in industrial application and has a reliable structure

(9)

when compare to others. CHB MLI is very beneficial with low

n is the number of DC sources employed and S is the number

dv/dt stress, less total harmonic distortion (THD) and less

of output levels generated.

electromagnetic interference (EMI) among all of them CHB ss=3m

MLI is very suitable for PV array application because each panel of CHB MLI operates with separate DC voltage sources

(10)

output 2n+1,

there are very large number of techniques to control the various operations MLI such as space vector pulse width

In order to minimise the THD, the switching angle can be

modulation (SVPWM) and sinusoidal pulse with modulation

optimized by adjusting all of them.

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International Research Journal of Engineering and Technology (IRJET)

e-ISSN: 2395-0056

Volume: 08 Issue: 03 | Mar 2021

p-ISSN: 2395-0072

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The Fig 3 demonstrates the waveform of voltage output for a

From Fig 4.2 it can be known that the carriers that have the

7-level CHBMLI [7, 8].

similar frequency fc and amplitude Ac are in phase. The modulating signal has a frequency of fr and an amplitude Ar.

Fig. 3: Assumed reference signal of level shifted PWM Fig 1: Topology for CHBMLI

technique.

SIMULATION AND RESULTS: 9-level CHBMLI is simulated in MATLAB/SIMULINK and the level shifted modulation technique is employed to trigger gate pulse of multilevel inverter. The output of the 9-level CHBMLI is shown in Fig. 4.

Fig 2: Typical Output Waveform for CHBMLI MODULATION TECHNIQUE: Level shifted technique is the reasonable addition of sine triangle PWM for MLI, in which n-1 carriers are required for n-level inverter. They are approved in vertical shifts in constant bands defined by the levels of the inverter [8]. 3(n-

Fig. 4: Output waveform of 9-level CHBMLI.

1) carriers are requisite for 3-phases. Based on managed degrees of liberty grouping, The PDPWM with single reference is based on the evaluation of a sinusoidal reference signal with n-1 carriers which are vertically shifted.

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International Research Journal of Engineering and Technology (IRJET)

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Volume: 08 Issue: 03 | Mar 2021

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www.irjet.net 4.

Geetha, R & Ramaswamy, M 2015, ‘New PWM strategy for three phase multilevel inverter,’ International Journal of Power Electronics, vol. 7, no. 1/2, pp. 86 –108.

5.

Lai, JS & Peng, FZ 1996, ‘Multilevel converters–a new breed of power converters,’ IEEE Transaction on Industrial Application, vol. 32, pp. 509–517.

6.

Mahdi Toupchi Khosroshahi 2014, ‘Crisscross cascade multilevel inverter with reduction in number of components,’ IET Power Electronics, vol.

7, no. 12, pp. 2914–2924.

Fig. 5: THD of 9-level CHBMLI. Conclusion: This paper present a single phase 9-level cascade H-Bridge multilevel inverter for DC source application. The CHB MLI copious advantages such as generation of high power, low dv/dt stress, minimum EMI and less THD. The projected multilevel inverter has lesser %THD without use of filter.

Level shifted modulation technique is used to modulate the gate pulses of 9-level CHB-MLI and there simulation is developed in MATLAB platform. From the obtained results by simulations it is observed that level shifted technique can be useful to multilevel inverter.

References: 1.

Banaei, MR, Khounjahan, H & Salary, E 2012, ‘Single source cascaded transformers multilevel inverter with reduced number of switches,’ IET Power Electronics, vol. 5, no. 9, pp. 1748–1753.

2.

Carrara, G, Gardella, S, Marchesoni, M, Salutari, R & Sciutto, G 1992, ‘A new multilevel PWM method: A theoretical analysis,’ IEEE Transaction on Power Electron, vol. 7, no. 3, pp. 497–505.

3.

Fu-San Shyu & Yen-Shin Lai 2002, ‘Virtual stage pulse-width modulation technique for multilevel inverter/converter’, IEEE Transaction on Power Electronics, vol. 17, no. 3, pp. 332-341. © 2021, IRJET

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