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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012


INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

UK: Managing Editor International Journal of Innovative Technology and Creative Engineering 1a park lane, Cranford London TW59WA UK E-Mail: editor@ijitce.co.uk Phone: +44-773-043-0249 USA: Editor International Journal of Innovative Technology and Creative Engineering Dr. Arumugam Department of Chemistry University of Georgia GA-30602, USA. Phone: 001-706-206-0812 Fax:001-706-542-2626 India: Editor International Journal of Innovative Technology & Creative Engineering Dr. Arthanariee. A. M Finance Tracking Center India 17/14 Ganapathy Nagar 2nd Street Ekkattuthangal Chennai -600032 Mobile: 91-7598208700

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY & CREATIVE ENGINEERING Vol.2 No.12 December 2012

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

From Editor's Desk Dear Researcher, Greetings! Research article in this issue discusses about Study of Elliptical Core Step Index,Reduction in Packet Delay Through the use of Common Buffer. Let us review research around the world this month; Biofuel that's better than carbon neutral. The green sludge burbles away quietly in its tangle of tubes in the Spanish desert. Soaking up sunshine and carbon dioxide from a nearby factory, it grows quickly. Every day, workers skim off some sludge and take it away to be transformed into oil. People do in a single day what it took geology 400 million years to accomplish. If touch computing is the future, The new Amazon Kindle Fire costs $199. Amazon's advantages the company owns an entire content store of movies, e-books, TV shows and other media. With tablet devices, the hardware is somewhat important but the content available for the device is absolutely critical. Data will be driving point for success. Celebrities turn to encryption to keep phones private they increasingly placing their bets on emerging smartphone technologies that foil eavesdroppers by encrypting voice and text data in real time. One such technology hails from GSMK, based in Berlin, Germany. Its CryptoPhones are commercial smartphones that use military-grade encryption algorithms to ensure that calls, texts and voicemails - when passing between people with similar secure devices are all but unhackable. These cost around €2000 per handset. But now a rival has entered the fray with a much cheaper approach. All-seeing headset gives you 360-degree vision. EYES in the back of your head - you know you want them. And soon you may get your wish, simply by slipping on a headset that gives you a 360-degree field of vision. Called FlyVIZ, the system was designed by Jérôme Ardouin and colleagues at the Grande École d'Ingenieurs Paris-Laval in France. It captures images from every direction around the wearer, then transforms them into something our measly human vision system can comprehend. Thanks, Editorial Team IJITCE


INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

Editorial Members Dr. Chee Kyun Ng Ph.D Department of Computer and Communication Systems, Faculty of Engineering, Universiti Putra Malaysia,UPM Serdang, 43400 Selangor,Malaysia. Dr. Simon SEE Ph.D Chief Technologist and Technical Director at Oracle Corporation, Associate Professor (Adjunct) at Nanyang Technological University Professor (Adjunct) at Shangai Jiaotong University, 27 West Coast Rise #08-12,Singapore 127470 Dr. sc.agr. Horst Juergen SCHWARTZ Ph.D, Humboldt-University of Berlin, Faculty of Agriculture and Horticulture, Asternplatz 2a, D-12203 Berlin, Germany Dr. Marco L. Bianchini Ph.D Italian National Research Council; IBAF-CNR, Via Salaria km 29.300, 00015 Monterotondo Scalo (RM), Italy Dr. Nijad Kabbara Ph.D Marine Research Centre / Remote Sensing Centre/ National Council for Scientific Research, P. O. Box: 189 Jounieh, Lebanon Dr. Aaron Solomon Ph.D Department of Computer Science, National Chi Nan University, No. 303, University Road, Puli Town, Nantou County 54561, Taiwan Dr. Arthanariee. A. M M.Sc.,M.Phil.,M.S.,Ph.D Director - Bharathidasan School of Computer Applications, Ellispettai, Erode, Tamil Nadu,India Dr. Takaharu KAMEOKA, Ph.D Professor, Laboratory of Food, Environmental & Cultural Informatics Division of Sustainable Resource Sciences, Graduate School of Bioresources, Mie University, 1577 Kurimamachiya-cho, Tsu, Mie, 514-8507, Japan Mr. M. Sivakumar M.C.A.,ITIL.,PRINCE2.,ISTQB.,OCP.,ICP Project Manager - Software, Applied Materials, 1a park lane, cranford, UK Dr. Bulent Acma Ph.D Anadolu University, Department of Economics, Unit of Southeastern Anatolia Project(GAP), 26470 Eskisehir, TURKEY Dr. Selvanathan Arumugam Ph.D Research Scientist, Department of Chemistry, University of Georgia, GA-30602, USA.

Review Board Members Dr. Paul Koltun Senior Research ScientistLCA and Industrial Ecology Group,Metallic & Ceramic Materials,CSIRO Process Science & Engineering Private Bag 33, Clayton South MDC 3169,Gate 5 Normanby Rd., Clayton Vic. 3168, Australia Dr. Zhiming Yang MD., Ph. D. Department of Radiation Oncology and Molecular Radiation Science,1550 Orleans Street Rm 441, Baltimore MD, 21231,USA Dr. Jifeng Wang Department of Mechanical Science and Engineering, University of Illinois at Urbana-Champaign Urbana, Illinois, 61801, USA Dr. Giuseppe Baldacchini ENEA - Frascati Research Center, Via Enrico Fermi 45 - P.O. Box 65,00044 Frascati, Roma, ITALY. Dr. Mutamed Turki Nayef Khatib Assistant Professor of Telecommunication Engineering,Head of Telecommunication Engineering Department,Palestine Technical University (Kadoorie), Tul Karm, PALESTINE.


INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012 Dr.P.Uma Maheswari Prof & Head,Depaartment of CSE/IT, INFO Institute of Engineering,Coimbatore. Dr. T. Christopher, Ph.D., Assistant Professor & Head,Department of Computer Science,Government Arts College(Autonomous),Udumalpet, India. Dr. T. DEVI Ph.D. Engg. (Warwick, UK), Head,Department of Computer Applications,Bharathiar University,Coimbatore-641 046, India. Dr. Renato J. orsato Professor at FGV-EAESP,Getulio Vargas Foundation,São Paulo Business School,Rua Itapeva, 474 (8° andar) ,01332-000, São Paulo (SP), Brazil Visiting Scholar at INSEAD,INSEAD Social Innovation Centre,Boulevard de Constance,77305 Fontainebleau - France Y. Benal Yurtlu Assist. Prof. Ondokuz Mayis University Dr.Sumeer Gul Assistant Professor,Department of Library and Information Science,University of Kashmir,India Dr. Chutima Boonthum-Denecke, Ph.D Department of Computer Science,Science & Technology Bldg., Rm 120,Hampton University,Hampton, VA 23688 Dr. Renato J. Orsato Professor at FGV-EAESP,Getulio Vargas Foundation,São Paulo Business SchoolRua Itapeva, 474 (8° andar), 01332-000, São Paulo (SP), Brazil Dr. Lucy M. Brown, Ph.D. Texas State University,601 University Drive,School of Journalism and Mass Communication,OM330B,San Marcos, TX 78666 Javad Robati Crop Production Departement,University of Maragheh,Golshahr,Maragheh,Iran Vinesh Sukumar (PhD, MBA) Product Engineering Segment Manager, Imaging Products, Aptina Imaging Inc. Dr. Binod Kumar PhD(CS), M.Phil.(CS), MIAENG,MIEEE HOD & Associate Professor, IT Dept, Medi-Caps Inst. of Science & Tech.(MIST),Indore, India Dr. S. B. Warkad Associate Professor, Department of Electrical Engineering, Priyadarshini College of Engineering, Nagpur, India Dr. doc. Ing. Rostislav Choteborský, Ph.D. Katedra materiálu a strojírenské technologie Technická fakulta,Ceská zemedelská univerzita v Praze,Kamýcká 129, Praha 6, 165 21 Dr. Paul Koltun Senior Research ScientistLCA and Industrial Ecology Group,Metallic & Ceramic Materials,CSIRO Process Science & Engineering Private Bag 33, Clayton South MDC 3169,Gate 5 Normanby Rd., Clayton Vic. 3168 DR.Chutima Boonthum-Denecke, Ph.D Department of Computer Science,Science & Technology Bldg.,Hampton University,Hampton, VA 23688 Mr. Abhishek Taneja B.sc(Electronics),M.B.E,M.C.A.,M.Phil., Assistant Professor in the Department of Computer Science & Applications, at Dronacharya Institute of Management and Technology, Kurukshetra. (India). Dr. Ing. Rostislav Chot•borský,ph.d, Katedra materiálu a strojírenské technologie, Technická fakulta,•eská zem•d•lská univerzita v Praze,Kamýcká 129, Praha 6, 165 21


INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012 Dr. Amala VijayaSelvi Rajan, B.sc,Ph.d, Faculty – Information Technology Dubai Women’s College – Higher Colleges of Technology,P.O. Box – 16062, Dubai, UAE

Naik Nitin Ashokrao B.sc,M.Sc Lecturer in Yeshwant Mahavidyalaya Nanded University Dr.A.Kathirvell, B.E, M.E, Ph.D,MISTE, MIACSIT, MENGG Professor - Department of Computer Science and Engineering,Tagore Engineering College, Chennai Dr. H. S. Fadewar B.sc,M.sc,M.Phil.,ph.d,PGDBM,B.Ed. Associate Professor - Sinhgad Institute of Management & Computer Application, Mumbai-Banglore Westernly Express Way Narhe, Pune - 41 Dr. David Batten Leader, Algal Pre-Feasibility Study,Transport Technologies and Sustainable Fuels,CSIRO Energy Transformed Flagship Private Bag 1,Aspendale, Vic. 3195,AUSTRALIA Dr R C Panda (MTech & PhD(IITM);Ex-Faculty (Curtin Univ Tech, Perth, Australia))Scientist CLRI (CSIR), Adyar, Chennai - 600 020,India Miss Jing He PH.D. Candidate of Georgia State University,1450 Willow Lake Dr. NE,Atlanta, GA, 30329 Jeremiah Neubert Assistant Professor,Mechanical Engineering,University of North Dakota Hui Shen Mechanical Engineering Dept,Ohio Northern Univ. Dr. Xiangfa Wu, Ph.D. Assistant Professor / Mechanical Engineering,NORTH DAKOTA STATE UNIVERSITY Seraphin Chally Abou Professor,Mechanical & Industrial Engineering Depart,MEHS Program, 235 Voss-Kovach Hall,1305 Ordean Court,Duluth, Minnesota 55812-3042 Dr. Qiang Cheng, Ph.D. Assistant Professor,Computer Science Department Southern Illinois University CarbondaleFaner Hall, Room 2140-Mail Code 45111000 Faner Drive, Carbondale, IL 62901 Dr. Carlos Barrios, PhD Assistant Professor of Architecture,School of Architecture and Planning,The Catholic University of America Y. Benal Yurtlu Assist. Prof. Ondokuz Mayis University Dr. Lucy M. Brown, Ph.D. Texas State University,601 University Drive,School of Journalism and Mass Communication,OM330B,San Marcos, TX 78666 Dr. Paul Koltun Senior Research ScientistLCA and Industrial Ecology Group,Metallic & Ceramic Materials CSIRO Process Science & Engineering Dr.Sumeer Gul Assistant Professor,Department of Library and Information Science,University of Kashmir,India Dr. Chutima Boonthum-Denecke, Ph.D Department of Computer Science,Science & Technology Bldg., Rm 120,Hampton University,Hampton, VA 23688 Dr. Renato J. Orsato Professor at FGV-EAESP,Getulio Vargas Foundation,São Paulo Business School,Rua Itapeva, 474 (8° andar) 01332-000, São Paulo (SP), Brazil


INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012 Dr. Wael M. G. Ibrahim Department Head-Electronics Engineering Technology Dept.School of Engineering Technology ECPI College of Technology 5501 Greenwich Road - Suite 100,Virginia Beach, VA 23462

Dr. Messaoud Jake Bahoura Associate Professor-Engineering Department and Center for Materials Research Norfolk State University,700 Park avenue,Norfolk, VA 23504 Dr. V. P. Eswaramurthy M.C.A., M.Phil., Ph.D., Assistant Professor of Computer Science, Government Arts College(Autonomous), Salem-636 007, India. Dr. P. Kamakkannan,M.C.A., Ph.D ., Assistant Professor of Computer Science, Government Arts College(Autonomous), Salem-636 007, India. Dr. V. Karthikeyani Ph.D., Assistant Professor of Computer Science, Government Arts College(Autonomous), Salem-636 008, India. Dr. K. Thangadurai Ph.D., Assistant Professor, Department of Computer Science, Government Arts College ( Autonomous ), Karur - 639 005,India. Dr. N. Maheswari Ph.D., Assistant Professor, Department of MCA, Faculty of Engineering and Technology, SRM University, Kattangulathur, Kanchipiram Dt - 603 203, India. Mr. Md. Musfique Anwar B.Sc(Engg.) Lecturer, Computer Science & Engineering Department, Jahangirnagar University, Savar, Dhaka, Bangladesh. Mrs. Smitha Ramachandran M.Sc(CS)., SAP Analyst, Akzonobel, Slough, United Kingdom. Dr. V. Vallimayil Ph.D., Director, Department of MCA, Vivekanandha Business School For Women, Elayampalayam, Tiruchengode - 637 205, India. Mr. M. Moorthi M.C.A., M.Phil., Assistant Professor, Department of computer Applications, Kongu Arts and Science College, India Prema Selvaraj Bsc,M.C.A,M.Phil Assistant Professor,Department of Computer Science,KSR College of Arts and Science, Tiruchengode Mr. G. Rajendran M.C.A., M.Phil., N.E.T., PGDBM., PGDBF., Assistant Professor, Department of Computer Science, Government Arts College, Salem, India. Dr. Pradeep H Pendse B.E.,M.M.S.,Ph.d Dean - IT,Welingkar Institute of Management Development and Research, Mumbai, India Muhammad Javed Centre for Next Generation Localisation, School of Computing, Dublin City University, Dublin 9, Ireland Dr. G. GOBI Assistant Professor-Department of Physics,Government Arts College,Salem - 636 007 Dr.S.Senthilkumar Post Doctoral Research Fellow, (Mathematics and Computer Science & Applications),Universiti Sains Malaysia,School of Mathematical Sciences, Pulau Pinang-11800,[PENANG],MALAYSIA. Manoj Sharma Associate Professor Deptt. of ECE, Prannath Parnami Institute of Management & Technology, Hissar, Haryana, India RAMKUMAR JAGANATHAN Asst-Professor,Dept of Computer Science, V.L.B Janakiammal college of Arts & Science, Coimbatore,Tamilnadu, India


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Dr. S. B. Warkad Assoc. Professor, Priyadarshini College of Engineering, Nagpur, Maharashtra State, India Dr. Saurabh Pal Associate Professor, UNS Institute of Engg. & Tech., VBS Purvanchal University, Jaunpur, India Manimala Assistant Professor, Department of Applied Electronics and Instrumentation, St Joseph’s College of Engineering & Technology, Choondacherry Post, Kottayam Dt. Kerala -686579 Dr. Qazi S. M. Zia-ul-Haque Control Engineer Synchrotron-light for Experimental Sciences and Applications in the Middle East (SESAME),P. O. Box 7, Allan 19252, Jordan Dr. A. Subramani, M.C.A.,M.Phil.,Ph.D. Professor,Department of Computer Applications, K.S.R. College of Engineering, Tiruchengode - 637215 Dr. Seraphin Chally Abou Professor, Mechanical & Industrial Engineering Depart. MEHS Program, 235 Voss-Kovach Hall, 1305 Ordean Court Duluth, Minnesota 558123042 Dr. K. Kousalya Professor, Department of CSE,Kongu Engineering College,Perundurai-638 052 Dr. (Mrs.) R. Uma Rani Asso.Prof., Department of Computer Science, Sri Sarada College For Women, Salem-16, Tamil Nadu, India. MOHAMMAD YAZDANI-ASRAMI Electrical and Computer Engineering Department, Babol "Noshirvani" University of Technology, Iran. Dr. Kulasekharan, N, Ph.D Technical Lead - CFD,GE Appliances and Lighting, GE India,John F Welch Technology Center, Plot # 122, EPIP, Phase 2,Whitefield Road,Bangalore – 560066, India. Dr. Manjeet Bansal Dean (Post Graduate),Department of Civil Engineering ,Punjab Technical University,Giani Zail Singh Campus, Bathinda -151001 (Punjab),INDIA Dr. Oliver Juki• Vice Dean for education, Virovitica College, Matije Gupca 78,33000 Virovitica, Croatia Dr. Lori A. Wolff, Ph.D., J.D. Professor of Leadership and Counselor Education, The University of Mississippi, Department of Leadership and Counselor Education, 139 Guyton University, MS 38677


INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

Contents Study of Elliptical Core Step Index Fiber Using Marcatili’s Method by Negar Sendany, Somayeh Makouei..[1] Reduction in Packet Delay Through the use of Common Buffer over Distributed Buffer in the Routing Node of NOC Architecture by Nilesh A. Mohota, Sanjay L. Badjate…………………………………………………...……[5]


INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

Study of Elliptical Core Step Index Fiber Using Marcatili’s Method Negar Sendany 1, Somayeh Makouei 1,2 1

Electrical Engineering Department, Faculty of Electrical and Computer Engineering, Islamic Azad University of Ahar, Iran 2 Electrical Engineering Department, Islamic Azad University, Sofian Branch, Sofian, Iran 1 n_sendanei@iau-ahar.ac.ir 2 makouei@tabrizu.ac.ir

Abstract —This paper is interested to study the propagation characteristics of the elliptical core step index fiber by the marcatili’s method. With the help of this method, we can analyze the elliptical core fiber and extract its birefringence and chromatic dispersion behaviors at different wavelengths. Also the study of optical and geometrical structural parameters influences on the birefringence, dispersion and polarization mode dispersion (PMD) is done.

n2 n1 b′

b

a Keywords: Elliptical core polarization mode dispersin

fiber,

marcatili

method,

Fig. 1. Solid line shows cross-section of the core rectangular waveguide while dashed lines shows the core cross-section of elliptical fiber

I. INTRODUCTION Elliptical core fibers have many applications such as in coherent optical communication systems [1] fiber optic sensors [2], and acousto-optic frequency shifters [3]. There are numerical, approximate and experimental methods for analysis of elliptical core fiber. Propagation characteristics of elliptical core optical fibers with any ellipticity can be obtained exactly using a series of Mathieu Functions [4], and using simple approximate methods like effective-index method [5], Marcatili’s method [6] and experimental method like white-light spectral interferometry [7,8]. Because propagation characteristics of elliptical core fibers are nearly to those of a rectangular-core waveguide having the same core area and aspect ratio [9], in this letter we using marcatili’s method.

The rectangular core dimensions are chosen such that it and the elliptical core have the same area and aspect ratio (i.e. a/a′ =b/b′ =(π)1/2 /2) [9]. The key assumption made in marcatili's analysis is that the mode is well guided [6], i.e., most of its guided power is contained within the core region on the other hand, far from the cutoff. Most of the power travels in core region and a small part travels in cladding region. Hence, Maxwell’s equations can be solved by assuming relatively simple sinusoidal and exponential field distributions. Rectangular dielectric waveguide is found to support a discrete number of guided modes that can x y be grouped in two families, Epq and Epq [10]. The subindex p and q indicate the number of extreme of the electric or magnetic field in the x and y directions, x respectively. The components of the Epq mode are Ex, y Ez, Hx, Hy, and Hz, with Ey=0. The components of the Epq x mode are Ey, Ex, Ez, Hz, and Hx , with Hy=0. The Epq mode has Ex and Hy as principal field components, and the Epqy mode has Ey and Hx as principal field x y components. E11 and E11 are the fundamental modes. x y We consider only the case Epq mode, as Epq mode can be treated similarly. According to Marcatili’s method the propagation constant (β) of these modes are determined from: (1) β 2 = k 2n 12 − k x2 − k y2

II. ANALYSIS We consider a step – index elliptical core fiber with n1 and n2 as the core and the cladding refractive indices, respectively, and a′ and b′ as the semimajor and semiminor axes of the core ellipse. Now we approximate elliptical-core fiber with a rectangular dielectric waveguide as illustrated in Fig.1.

1

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012 Where k is wave number in the vacuum and defined by (2π)/λ, λ is the wavelength, kx and ky are the transverse propagation constants along the x and y directions respectively, they are the solutions of the following transcendental equations:

-5

3 .5

x 10 ζ= 0 . 6

3 ζ= 0 . 5 5

2 .5

(k

2

kx ) 2 (n 1 − n 22) − k x2)0.5

…………(2)

B ire frin g e n c e

k x a = p π − (2) × tan−1(

2

ζ= 0 . 5

1 .5

k y b = q π − (2) × tan−1(

2 2 y 2 2 1 2

n k

(n (k (n − n ) − k y2 )0.5 ) 2 1

2

) …………(3)

ζ= 0 . 3 3 0 .5 0 1 .2

The propagation constant βpqx (or βpqy) of the Epqx mode (or Epqy mode) of the given elliptical core fiber can now be obtained by the above relation. The effective refractive index is given by:

n eff =

β

1 .4

1 .5 1 .6 W a v e le n g th (m )

1 .7

1 .8 -6

x 10

At first, the influence of • (called Ellipticity) on the birefringence is extracted and demonstrated in Fig. 2. From these curves, it is clear that birefringence of elliptical core fiber is increased by increasing the ellipticity of the core and birefringence increases slightly with the increase in wavelength. In other words, the more ellipticity, the better polarization maintenance.

…………(4)

k

-5

n eff2 − n 22 n 12 − n 22

1 .3

Fig. 2. Variation of birefringence versus wavelength for different ellipticity

Also for easy handling of the problem and identifying the proposed fiber, following optical parameters are defined.

b =

ζ= 0 . 4 2 1

4 .5

,

x 10

…………(5) 4 ∆= 0 . 0 1

(a − b ) ζ = , (a + b )

…………(6)

n 12 − n 22 n 1 − n 2 ≈ . 2n 22 n2

B ire frin g e n c e

∆ =

3 .5

…………(7)

∆= 0 . 0 0 8

3 2 .5

∆= 0 . 0 0 5

2 1 .5 1 1 .2

III. RESULT and DISCUSSION

1 .3

1 .4

1 .5 W a v e le n g th

1 .6

1 .7

1 .8 -6

x 10

Fig. 3. Variation of birefringence versus wavelength for different ∆

It is well known that fibers with large birefringence are used to preserve the polarization state of the incident light over large distance. Large birefringence can be achieved by asymmetric waveguide geometry such as an elliptical core fiber. Modes in an elliptical core fiber are nondegenerate. Elliptical core is used to introduce birefringence in order to maintain the polarization thus elliptical optical fibers are one type of the polarization maintain fibers. Birefringence is defined by : ∆β = (βx - βy) / k x Where βx and βy are the propagation constants of Epq y and Epq modes, respectively.

Fig. 3 illustrates the variation of the birefringence as a function of wavelength for different refractive index differences. It is evident that the birefringence of such elliptical core fibers is grown up proportional to ∆, that high index difference necessary to give a sufficiently large birefringence. The propagation constant varies with wavelength, thus the group velocity depends on wavelength too and, consequently, different spectral components of the signal will travel with different group velocities. This

2

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

dB y 1 dB ∆τ =  x − c  dk dk

phenomenon is called chromatic dispersion and since chromatic dispersion limits the performance of fibers, we have evaluated this parameter in the elliptical core fiber. From Fig. 4 which shows dispersion curves versus wavelength for different ellipticities, it is clear that the dispersion decreases with ellipticity increasing and zerodispersion wavelength shifts to a higher value of wavelength.

D is p e rs io n [p s /(k m - n m )]

25 20

(

)

(8)

Elliptical core fiber are engineered in such a way that the two orthogonally polarized modes are forced to travel at different propagation constant, group velocities between the fundamental modes is zero but where there is a large enough difference in the phase velocities to preserve polarization. Fig. 6 illustrates variation of the Polarization mode dispersion versus wavelength for different ∆. It is observed that the elliptical core fiber with large index difference hold polarization well.

35 30

 1 x  = n g − n gy .  c

ζ= 0 . 3 ζ= 0 . 5 ζ= 0 . 6 5 ζ= 0 . 8

15 10 200 5 150

0 -5

∆= 0 . 0 0 8

1 .3

1 .4 1 .5 W a v e le n g th

1 .6

P M D (p s /k m )

100 -1 0 1 .2

1 .7 -6

x 10

Fig. 4. Dispersion curves of fundamental mode for different ellipticities

50 ∆= 0 . 0 1 0 -5 0

Fig. 5 shows dispersion curves at different ∆. It is evident that by ∆ increasing, the dispersion value is increased to and zero-dispersion wavelength shifts to a lower value of wavelength. Meanwhile, there is no appreciable change in the dispersion slope regime.

-1 0 0 1 .2

D is p e rs io n [p s /(k m - n m )]

20

1 .4 1 .5 W a v e le n g th

1 .6

1 .7 -6

x 10

Fig. 6. PMD curves of fundamental mode for different ∆

Fig. 7 illustrates variation of the Polarization mode dispersion versus wavelength for different ellipticities. The results prove the strong dependence of the Polarization mode dispersion on the fiber core ellipticity i.e. Polarization mode dispersion increases strongly with core ellipticity. It is clear from this figures that Polarization mode dispersion becomes zero with careful design, the optical and geometrical parameters of elliptical core fiber. i.e. elliptical core fiber reduces mode coupling between orthogonal modes.

40

30

1 .3

∆= 0 . 0 1 ∆= 0 . 0 0 8 ∆= 0 . 0 0 5 ∆= 0 . 0 0 3

10

0

-1 0

-2 0 1 .2

1 .3

1 .4 1 .5 W a v e le n g th

1 .6

1 .7 -6

x 10

Fig. 5. Dispersion curves of fundamental mode for different ∆

Polarization mode dispersion (∆τ ) between Epqx and Epqy modes per unit length of the fiber can be obtained by the following relation:

3

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012 [2]. R. Ulrich, and M. Johnson, “Fiber-ring interferometer: polarization analysis,”, opt.lett, vol. 4, pp.152-154, 1979. [3]. B. Y. Kim, J. N. Blake, H. E. Engan, and H. J. Shaw, “All-fiber acousto-optic frequency shifter,”, Optics Letters, Vol. 11, Issue 6, pp. 389-391, 1986. [4]. C. Yeh, “Elliptical dielectric waveguide,”, J. Appl. phys, vol. 33, pp. 3235-3243, 1962. [5]. K. S. Chiang, “Analysis of optical fibers by the effective-index method,”, Applied optics, vol. 25, pp. 2169-2174, 1986. [6]. E. A. J. Marcatili, “Dielectric rectangular waveguide and directional coupler for integrated optics,”, Bell syst, tecj. Vol. 48. pp, 2071-2102, 1969. [7]. Tadeusz Martynkien, Waclaw Urbanczyk, “Dispersion of group and phase modal birefringence in elliptical-core fiber measured by white-light spectral interferometry,” optical society of America, vol.11, pp. 2793-2798, 2003,. [8]. Petr Hlubina, “White-light spectral interferometry to measure intermodal dispersion in two mode elliptical-core optical fibers,” optics communications, pp. 283-289, 2003. [9]. Arun Kumar and R. K. Varshney, “propagation characteristics of dual-mode elliptical-core optical fibers,” opt. lett, vol. 14, pp. 817819, 1989. [10]. C. yeh and F. i. Shimabukuro, “The Essence of Dielectric Waveguides,” Springer us, 2008.

400

300

ζ= 0 . 5

P M D (p s /k m )

200 ζ= 0 . 4 2

100

ζ= 0 . 3 3

0 -1 0 0

-2 0 0 1 .2

1 .3

1 .4 1 .5 W a v e le n g th

1 .6

1 .7 -6

x 10

Fig. 7. PMD curves of fundamental mode for different ellipticities

IV. CONCLUSION Using marcatili’s method we have obtained birefringence, dispersion and polarization mode dispersion at elliptical core optical fiber. we show that birefringence of elliptical core fibers can be increased by increasing the ellipticity of the core or the index difference ∆ between the core and cladding and high value of birefringence is usually desired to maintain the polarization. We show that at elliptical core optical fiber, birefringence can be increased and zero Polarization mode dispersion can be obtained.

REFERENCES [1]. F. Favre, L. Jeunhomme, I. Joindot, M. Monerie, and J. C. Simon, “Progress towards heterodyne-type single-mode fiber communication systems,”, IEEE j.quantum Electronics, vol. 17, pp. 897-906, 1981.

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

Reduction in Packet Delay Through the use of Common Buffer over Distributed Buffer in the Routing Node of NOC Architecture Nilesh A. Mohota #1, Sanjay L. Badjate #2 #1

Department of Electronics Engineering Department of Electronics & Telecommunication Engineering #1 Rashtrasant Tukdoji Maharaj Nagpur University Nagpur, India #2 Rashtrasant Tukdoji Maharaj Nagpur University Nagpur, India #1 J D College of Engineering, Nagpur, India #2 S. B. Jain Institute of Engineering, Management & Research, Nagpur, India #2

1

nileshmohota@gmail.com

Abstract — The continuous innovation of semiconductor technology enables more complex System on-Chip (SoC) designs. Tens, even hundreds of intellectual properties (IPs) are integrated into an SoC to provide various functions, including communications, networking, multimedia, storage, etc. The bus scheme connects multiple IP cores with a cost efficient shared medium. The bus-based scheme still fails to satisfy the requirements of future SoC mainly due to two major drawbacks. Non-scalable and the bandwidth is shared by all IPs and thus the bus becomes the performance bottleneck when more and more IPs are connected. In order to interconnect such a high number of elements on a die, researchers have turned to Network On Chip as a replacement to conventional shared buses and ad-hoc wiring solutions. They are attractive due to their regularity and modular design, which can lead to better routability, electrical characteristics and fault tolerance.

A Simulink model later simulated on MATLAB to calculate the improvement in packet delay. It has been observed that the delay improved by approximately 40% through the use of a common buffer. A verilog RTL for both common and shared buffer has been prepared and later synthesized using Design Compiler of SYNOPSYS. In distributed buffer, arrival of data packet could be delayed by 2 or 4 clock cycles which lead to latency improvement either by 17 % or 34 % in a common buffer

Keywords: Arrival rate ( λ ), service rate, FIFO, latency, Simulink model, packet array, IP mapping.

I. INTRODUCTION A packet-switched 2-D mesh is the most used and studied topology so far. It is also a sort of an average NOC currently. Good results and interesting proposals provoke design engineers to use this topology as the base [1] .The key research problems in the design of NOCs include but are not limited to topology, channel width, buffer size, floor plan, routing, switching, scheduling, and IP mapping [2]. Additionally, [3] lists research issues to be application modeling and optimization, NOC communication architecture analysis and optimization, NOC communication architecture evaluation, and NOC design validation and synthesis. The most important metrics for NOCs are application runtime, silicon area, power consumption, latency and throughput. All these are to be minimized and usually appropriate trade-off is sought [4]. The required silicon area is the most commonly reported value (77%) followed by latency (55%) and maximum operating frequency (50%). The other metrics have lower occurrence [1].

Performance evaluation of the routing node in terms of latency is the characteristics of an efficient design of Buffer in input module. It is intended to study and quantify the behavior of the single packet array design in relation to the multiple packet array design. The utilization efficiency of the packet buffer array improves when a common buffer is used instead of individual buffers in each input port. First Poisson’s Queuing model was prepared to manifest the differences in packet delays. The queuing model can be classified as (M/M/1); (32;FIFO). Arrival rate has been assumed to be Poisson distributed with a mean arrival 6. rate ( λ ) of 10 x 10 The service rate is assumed to be exponentially distributed with a mean service rate of 10.05 6. x 10 It has been observed that latency in Common Buffer improved by 46% over its distributed buffer.

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012 In this regard, the current work is related to optimization of buffers in the router design so as to achieve lower latency. The router consists of four major components: Crossbar, Switch, FIFO & Buffers, see fig. 1.1. The no. of buffers in the routing node are dependent on the type of topology and the no of adjacent nodes [1]. In 2D Mesh NoC topology, a node may have four adjacent contemporary nodes. In the existing work [3], the routing node holds four buffers each to accommodate input stream of data from adjacent node. The buffers are also referred as packet arrays hold the stream of the incoming packets and dispatch them once scheduling is done.

crossbar. Topology defines their logical lay-out (connections) whereas floor plan defines the physical layout. The function of a network interface (adapter) is to decouple computation (the resources) from communication (the network). Routing decides the path taken from source to the destination whereas switching and flow control policies define the timing of transfers [2][5]. Task scheduling refers to the order in which the application tasks are executed and task mapping defines which processing element (PE) executes certain task. IP mapping, on the other hand, defines how PEs and other resources are connected to the NoC.

A. Router Structure NOC architectures are based on packet-switched networks, see figure 2.1.a. This has led to new and efficient principles for design of routers for NOC [6]. Assume that a router for the mesh topology has four inputs and four outputs from/to other routers, and another input and output from/to the Network Interface (NI). Routers can implement various functionalities from simple switching to intelligent routing. Since embedded systems are constrained in area and power consumption, but still need high data rates, routers must be designed with hardware usage in mind. For circuitswitched networks, routers may be designed with no queuing (buffering). For packet-switched networks, some amount of buffering is needed, to support bursty data transfers [3].

Fig. 1.1 A generalized 2D Mesh NoC

II. OVERVIEW OF NETWORK ON CHIP ARCHITECTURE

Buffers can be provided at the input, at the output, or at both input and output [7].Various designs and implementations of router architectures based on different routing strategies have been proposed in the literature. Wolkotte et al. proposed a circuit switched router architecture for NOC [8], while Dally and Towles proposed a packet switched router architecture [9]. Albenes and Frederico provided a wormhole-based packet forwarding design for a NOC switch [10]. In this paper, the buffers in the design of the routers are based on the principle of virtual output queuing since it is simple and reduces the risk of Head of Line Blocking [11] [12] [13]. In this paper, the scheduling policy embodied in the router is based on Iterative SLIP algorithm. iSLIP uses round-robin to choose on port among those contending. This permits simpler hardware implementations compared, besides making iSLIP faster. iSLIP achieves close to maximal matches after just one or two iterations.. iSLIP achieves 100%

Fig. 2.1 Generic NOC structure

A NOC consists of routers/switch, links, and network interfaces (Fig. 2.1). Routers direct data over several links (hops). Routers further consists of a scheduler, buffer to store the incoming data packet and the

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012 throughput under uniform traffic and the round robin policy ensures fairness among contenders. Even though its behavior may be unstable under bursty traffic, iSLIP is commonly implemented in commercial switches due to its simplicity [14]. This algorithm becomes more silicon area efficient if it is implemented with its folding concept [15].

packet array. Queue size is dynamically determined depending on the arrival pattern of the data. If more data is destined for output port “m”, then correspondingly, more buffer space, and hence, a longer queue is maintained for data packets to be routed to output port “m,” subject to the maximum space available in the packet array (Fig.3.1). An alternative design is based on using a common packet for all the input ports. For example, if the crossbar switch consists of four input ports, then the original design calls for four packet arrays. The proposed design would utilize one common packet array for all the four input ports (Fig.3.2). It is intended to study and quantify the behavior of the single packet array design in relation to the multiple packet array design. Intuitively, a common packet buffer would result in better utilization of available buffer space. This in turn would translate into lower delays in transmission.

Fig 2.1.a NOC Router Components

III. RELATED WORK Out 0

In_M0 Out0

InM1

C

Buf

Buf1

Out 1 Buf2

InM3

C

InM3

Out1_b

3

Out3 Buff0

InM1

Out

InM0

Out 2

InM2

Out2 Fig. 3.2 Common buffer shared between all input ports

InM2

IV. POISSON’S QUEUING THEORY [18]

• Mean Arrival Rate (λ) = 10 x 10 6 • Mean Service Rate (μ) = 10.05 x 10 • Traffic Intensity (ρ) = λ / μ = 0.995 6

Fig. 3.1 Each input port has its own buffer

The current design of the input block is based on virtual output queues. The queues are maintained in a

• The queuing model is classified as: (M/M/1); (32;FIFO).


INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

= 26.18

• In the first model there is a common buffer having capacity of 128 packets, see fig. 5.1 • In the second model there are 4 independent queues each having capacity of 32 packets, see fig. 5.2

Latency

Latency = E(n) / λ

E (n ) =

129

0.995(1− 129× 0.995 + 128+ ×0.995 ) 129

(1− 0.995)(1− 0.995 ) =

0.995(0.136) = 56 0.005× 0.476

Latency

(1 − 0.0995) × 0.99532 Ρ32 = 1 − 0.99533

=

56 = 14× 10−7 4 × 10× 106

It has been seen theoretically that latency reduces merging of the queues.

0.005× 0.8151 = 0.027 1− 0.8475

A MATLAB model used to show quantitatively how performance is improved in a common packet array design.

i.e. 2.7%

V.

1) Latency for N = 32: Avg. no. of packets in system

ρ[1 − (N + 1)ρ N + NP (1 − ρ )(1 − ρ N +1 )

= 26.18× 10−7

128

(1 − ρ ).ρ n 1 − ρ N +1

E (n ) =

6

2) Latency for N = 128: In this case four input queues are merged into a single input queues of capacity 128. Since all the sources put data into the same queues, arrival rate is assumed to be 4 times higher. The servicing rate is also assumed to be four times higher. Traffic intensity remains same at 0.995.

Some assumptions have been made regarding arrival rate and service rate of packets. Arrival has been assumed to be Poisson distributed with a mean arrival rate ( λ ) of 10 x 106. The service rate is assumed to be exponentially distributed with a mean service rate of 10.05 x 106. Traffic intensity • = • / • = 0.995. In the first model there are four independent queues each having capacity of 32 packets. The queuing model can be classified as (M/M/1); (32;FIFO) [18]. The system stops taking further input when queue size reaches 32. The average no. of packets in the system are given by

Ρ32 =

26.18 10× 10

A. Effect of Having a Single Input Buffer

Ρn =

=

N +1

SINGLE BUFFER OF SIZE  PACKETS VERSUS  BUFFERS OF SIZE  PACKETS

The block diagram of the Simulink model is given below. Single 128 packet buffer with 4x4 Scheduler fig 5.1.

0.995× (1− 33× 0.99532 + 32× 0.99533) (1− 0.995)(1− 0.99533 ) 0.995(1− 28.1+ 27.12) = 0.005× 0.152 =

Four 32 packet buffers with 4x4 Scheduler fig 5.2.

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

Fig. 5.1 Simulink model for single buffer

Fig. 5.2 Simulink model for 4-buffers

The first block is labeled “Exponential Distribution1.” This block specifies packet arrival time. The packet arrival pattern is an exponential distribution. The block labeled “Packet Source1” generates packet events. The “Set Attribute1” block combines the effects of “Exponentia Distribution1” with “Packet Source1” to generate packet entities at time intervals specified by the exponential distribution mentioned above. The arrival of a packet event at the “Start Timer2” block causes the simulation timer to start. Generated packets are stored in a common 128 packet buffer designated “Common Buffer.” The packets leave the common buffer when they are serviced by the scheduler vector. The scheduler vector is generated for four input ports by “4x Scheduler Vector.” The total number of packets served are recorded in the “Number Serve1” block. Whenever a packet leaves the buffer, the departure time is recorded by the “Read Timer.” The packet exits the simulation flow through the “Entity Sink1” block. The average time spent by the packet in the buffer is captured by the “Average Delay1” block.

The behavior of the dedicated 32 packet buffer model differs only in two components, “Output Switch” and “Path Combiner.” The “Output Switch” block demultiplexes the generated packets into their respective input port packet buffers. The “Path Combiner” aggregates the output stream to help calculate total number of packets served and average time spent by packet waiting for service. The simulation was run for 50000 packets. The packet generation rates for both models are identical, using the exponential distribution for inter-arrival times. Multiple simulation runs were performed to verify the average delays observed.

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VI. RESULTS

A. Latency in HDL Model

TABLE I LATENCY IN COMMON BUFFER VS DISTRIBUTED BUFFER

SIMULATION MODEL

COMMON BUFFER

DISTRIBUTED BUFFERS

(128 PACKETS)

(4 x 32 PACKETS)

MIN LATENCY – It is defined as the total amount of time from the start of packet transmission at source to start of packet reception at destination. TABLE II LATENCY IN COMMON BUFFER VS DISTRIBUTED BUFFER HDL MODEL

SIMULATION MODEL

Average Latency

1.4 time unit

4.3 time unit (M)

(T)

2.6 time unit (T)

7.9 time unit (M)

Average Latency

COMMON BUFFER

DISTRIBUTED BUFFERS

(128 PACKETS)

(4 x 32 PACKETS)

[2+4+4] = 10 CCs x 4 ns = 40 ns

[2+4+4+2] = 12 CC x 4 ns = 48 ns

T - Latency derived using Poisson’s Queuing Theorem.

Common Buffer:

M – Latency derived using SIMULINK MATLAB MODEL

2 CCs – to store the packets in two phases in packet array 4 CCs – to reach to scheduling decision 4 CCs – to travel to destination

Distributed Buffer: In normal case, Avg. latency may be 10 CCs for data packet to move to its destination as described in Common Buffer. However, it may take additional 2 or 4 CCs if the desired packet array is hugely crowded. Synthesis using Design Compiler of SYNOPSY has been done and it has been observed that the longest combinational path of 4 ns i. e. clock period was compatible to both the design.

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012

Fig 6.1: A 4x4 Routing node

Fig 6.2: Common Buffer waveform

REFERENCES

VII. CONCLUSION

[1] Salminen et al., survey of network-on-chip proposals, white paper, @ OCP-IP, march 2008.

The utilization of buffer memory space is improved by replacing separate buffers in each input block with a shared buffer common to all input blocks. This is manifested in the form of lower delay in transferring a packet from the input to the output. First Poisson’s Queuing model was prepared to manifest the difference in latencies. It has been observed that latency in Common Buffer improved by 46% over its distributed buffer. A Simulink model later simulated on MATLAB to calculate the improvement in packet delay. It has been observed that the delay improved by approximately 40% through the use of a common buffer. A verilog RTL for both common and shared buffer has been prepared and later synthesized using Design Compiler of SYNOPSYS. In distributed buffer, arrival of data packet could be delayed by 2 or 4 clock cycles under heavy and undistributed traffic. Under such circumstances, latency improvement could be claimed either by 17 % or 34 % in a common buffer.

[2] U. Ogras, J. Hu, and R. Marculescu, “Key Research Problems in NoC Design: A Holisitic Perspective,” in Proceedings of the CODES, ISSS, 2005, pp. 69-74. [3] R. Marculescu, U. Ogras, L. Peh, N. Jerger, and Y. Hoskote, “Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives,” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Vol. 28, No. 1, January 2009. [4] E. Salminen, A. Kulmala, and T. H¨am¨al¨ainen, “On network-onchip comparison,” in Euromicro DSD, Aug. 2007, pp. 503–510 [5] S. Lee, “Implementation of a NoC”, KAIST, 2005. [6] E .Rijpkema, K. Goossens, A. Radulescu, J. Dielissen, J. van Meerbergen, P.Wielage, and E. Waterlander,“Trade-offs in the design of a router with both guaranteed and best-effort services for networks on chip”, IEE Proc. on Computers and Digital Techniques, vol. 150, Issue 5, pp. 294-302, September 2003. [7] A. Kumar, D. Manjunath, and J. Kuri, Communication Networking: An Analytical Approach, Morgan Kaufmann, 2004.

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INTERNATIONAL JOURNAL OF INNOVATIVE TECHNOLOGY AND CREATIVE ENGINEERING (ISSN:2045-8711) VOL.2 NO.12 DECEMBER 2012 [8] P. T. Wolkotte, G. J. M. Smit, G. K. Rauwerda, and L. T. Smit, “An energy-efficient reconfigurable circuit- switched network-on-chip”, Proc. 19th IEEE International Conference on Parallel and Distributed Processing Symposium, pp. 155-163, 2005.

[14] Nick McKeown, “The iSLIP scheduling algorithm for input-queued switches,” IEEE/ACM Trans. Netw., vol. 7, no. 2, pp. 188–201, 1999.

[15] RehanMaroofi, V. N. Nitnaware and Dr. S. S. Limaye, “AREAEFFICIENT DESIGN OF SCHEDULER FOR ROUTING NODE OF NETWORK-ON-CHIP” International Journal of VLSI design& Communication Systems (VLSICS) Vol.2, No.3, September 2011.

[9] J. W. Dally and B. Towles, “Route packets, not wires: On-Chip interconnection networks”, Proc. IEEE International Conference on Design and Automation, pp.684-689, June 2001. [10] C. Albenes, ZeferinoFrederico G. M. E. Santo, AltarniroAmadeuSusin, “ParlS: A parameterizable interconnect switch for Networks-on-Chips”, Proc. ACM Conference, pp. 204-209, 2004. International Journal of VLSI design & Communication Systems (VLSICS) Vol.2, No.4, December 2011

[16] Adnan Aziz, AmitPrakash, and VijayaRamachandra, “A near optimal scheduler for switch-memory switch routers,” in Proceedings

of the fifteenth annual ACM symposium on Parallel algorithms and architectures, SPAA ’03, 2003, pp. 343–352. [17] A semester project of John D. Pape on “Implementation of an On-chip Interconnect Using the iSLIP Scheduling Algorithm” at The University of Texas at Austin December 11, 2006

[11] Y. Tamir and G. L. Frazier, “High-performance multi-queue buffers for VLSI communications switches,” SIGARCH Comput. Archit. News, vol.16, no. 2, pp. 343–354, 1988. [12] H. Obara, “Optimum architecture for input queuing ATM switches,” Electronics Letters, vol. 27, no. 7, pp. 555–557, Mar. 1991.

[18] Ref: A book on “Operation Research [topic, Poisson's Queuing Theory]” by Heera Gupta.

[13] H. Obara and Y. Hamazumi, “Parallel contention resolution control for input queuing ATM switches,” Electron. Lett., vol. 28, no. 9, pp. 838–839,Apr. 1992.

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