d. Tasks: Do the following tasks prior to coming to the lab. Write the answers to all questions in your lab notebook prior to coming to the lab. There is no on-line submission for the pre-lab. Ask the TA to sign pre-lab section in your lab notebook at the start of the lab session. You will also need to include answer to the pre-lab questions in your lab report. 1. Design the MUX. You can choose to design the MUX with gates or by writing HDL (VHDL) code. Choose one of the two methods and write the design down in your lab notebook. 2. Design of the Logic unit. Here you also have several choices to design this unit: a. Write truth table, derive the K-map and give the minimum gate implementation b. Use a 4:1 MUX and gates c. Write an HDL file As part of the pre-lab, you can choose any of the three methods. Briefly justify why you chose a particular design method. Explain the design procedure and give the logic diagram or the HDL file. In case you use a MUX, you need also to give the schematic or the HDL file for the MUX. 3. Design the arithmetic unit. Again, here you have different choices to design and implement the arithmetic unit. A particularly attractive method is one that makes use of previously designed modules, such as your Full Adder. The arithmetic unit performs basically additions on a set of inputs. By choosing the proper inputs, one can perform a range of operations. This approach is shown in Figure 4. The only blocks that need to be designed are the A Logic and B Logic circuits. You can make use of your previously designed full adder (MYFA).
Figure 4: Schematic block diagram of the arithmetic unit. a. Give the truth tables for the Xi and Yi functions with as inputs S1, S0 and Ai, and S1, S0 and Bi, respectively. Fill out the following tables. Notice
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