Iphone 6 full schematic diagram

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1

FIJI: JTAG,USB,HSIC,XTAL ROOM=SOC

D

FL0201

D

1KOHM-25%-0.2A 26

PP1V8_XTAL

1

ROOM=SOC

26 12 11 5 4

R02012

PP1V2

1

0.00

26

C0203

PP1V2_PLL

ROOM=SOC

1

C0206 0.1UF

20% 2 4V X5R 01005

ROOM=SOC

1

C0213 0.1UF

20% 2 4V X5R 01005

ROOM=SOC

1

1

0.1UF

01005 ROOM=SOC

1

0.01UF

10% 2 6.3V X5R 01005

1

C0208 0.01UF

2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27

0201

C0204 2.2UF

20% 4V X5R 2 01005

ROOM=SOC

C0207

PP1V8

2

20% 6.3V 2 X5R 0201-1

ROOM=SOC

10% 2 6.3V X5R 01005

ROOM=SOC

1

VOLTAGE=0V PWRTERM2GND

1.2V

VDD18_XTAL E14

VDD18_EFUSE1 J7

VDDA18_CPU_TSADC AE15

VDDA18_SOC0_TSADC V17 VDDA18_SOC1_TSADC G7

M16 V19 AD14 AN24 VDDA12_PLL_SOC VDDA12_PLL_MG VDDA12_PLL_CPU VDDA12_PLL_LPDP

VDD12_UH0_HSIC0 D7 VDD12_UH2_HSIC1 AN4

20% 6.3V X5R 2 0201

PP0201 P4MM SM PP

REMOVE PP IF SPACE IS NEEDED

PP0202 P4MM SM PP

20 15 13 12 11 10 7 6 5 3 2 27 26 25 24 23

PP1V8

NC NC

1

50_AP_BI_BB_HSIC1_DATA 50_AP_BI_BB_HSIC1_STB

29

BASEBAND

29

NC NC NC NC

1

R0206 SERIAL MODE NAMES

5% 1/32W MF 2 01005

17 17

TRISTAR_BI_AP_JTAG_SWDIO TRISTAR_TO_AP_JTAG_SWCLK

ROOM=SOC 25 17 15 13 4

RESET_1V8_L ROOM=SOC

1

AR4 AP4

UH2_HSIC1_DATA UH2_HSIC1_STB

3.3V

C0201

K4 L4 J5 L3 K5 K3 K2

AH32

RESET*

AJ33 W4

CFSB CFSB1

AH33

1000PF

10% 6.3V 2 X5R-CERM 01005

B

13

AP_TO_PMU_TEST_CLKOUT

JTAG_SEL JTAG_TRTCK JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK

4 12 23 26

20% 2 6.3V X5R-CERM 01005

ROOM=SOC

1

C0211 0.1UF

20% 4V 2 X5R 01005

C

P2MM-NSM PP SM

0.95V

PP0203 PLACE NEAR SOC.

P2MM-NSM PP SM

PP0204

POP-FIJI-1GB-DDR-B0 BGA SYM 1 OF 13 ROOM=SOC

ANALOGMUXOUT D15 NC USB_DP F5 USB_DM E5

1

NO_XNET_CONNECTION=TRUE

100K

UH1_HSIC0_DATA UH1_HSIC0_STB

20% 2 4V X5R 01005

C0205 0.1UF

PP1V2_SDRAM

U0201 C1 C2

90_AP_BI_TRISTAR_USB0_P 17 90_AP_BI_TRISTAR_USB0_N 17 USBHS ON/OFF TOLERANCE 5V/1.98V

USB_VBUS D3 USB_ID D2

USB_VBUS_DETECT

14

NC

USB_REXT D1

USB_REXT 1

WDOG AK30

HOLD_RESET

AP_TO_PMU_RESET_IN

TST_CLKOUT

AG29

FAST_SCAN_CLK

AH29

TESTMODE

R0203

13

200

NOTE: NEW USB_REXT VALUE FOR FIJI = 200 OHM

1% 1/32W MF 2 01005

XI0 A16 XO0 A15

AH31

C0212 0.1UF

12 26

ROOM=SOC

1

VDD33_USB E1

0.22UF

VDD12_CKE_DDR0 D16 VDD12_CKE_DDR1 N5

C0202 1

VDDH_USB E2

ROOM=SOC

C

PP3V3_USB

B C0209 12PF

DEVICE ADI PMU: LM3534 BL DRIVER: TRISTAR: CHESTNUT:

I2C1

TIGRIS CHARGER: LINEAR VIBE: CS35L19B AMP: MESA EEPROM (MEMORY): MESA EEPROM (ID):

BINARY

7-BIT HEX

8-BIT HEX

1110100X 1100011X 0011010X 0100111X

0X74 0X63 0X1A 0X27

0XE8 0XC6 0X34 0X4E

1110101X 1011010X 1000000X 1010110X 1011110X

0X75 0X5A 0X40 0X56 0X5E

0XEA 0XB4 0X80 0XAC 0XBC

0101001X 1010001X

0X29 0X51

0X52 0XA2

1100011X 0010000X 0001100X

0X63 0X10 0X0C

0XC6 0X20 0X18

0010000X

0X10

0X20

24.000MHZ-30PPM-9.5PF-60OHM

2 4

Y0201

1% 1/32W MF 01005 2

1.00M

1.60X1.20MM-SM

R0207 1.33K2

1 1% 1/32W

1

45_XTAL_24M_I 45_XTAL_24M_O

I2C0

R02021

3

1

I2C ADDRESS MAP

2

5% 16V CERM 01005

PCB: PLACE THIS XW AT U0201, NEAR XI/XO

C0210

XW0204

12PF

45_XTAL_24M_O_R

MF 01005

1

2

SHORT-10L-0.1MM-SM 1 2

45_XTAL_24M_O_GND

ROOM=SOC 5% 16V CERM 01005

I2C2 CT814 ALS: DISPLAY EEPROM:

A

RCAM I2C OPEL STROBE DRIVER: REAR FACING CAM: VCM AF DRIVER:

SYNC_MASTER=N56_MLB

SYNC_DATE=08/29/2013

PAGE TITLE

SOC:MAIN DRAWING NUMBER

FCAM I2C FRONT FACING CAM:

Apple Inc.

051-9903 REVISION

R

NOTE: ACCEL, GYRO, COMPASS ALL USING SPI (VIA OSCAR) FOR AP COMMUNICATION.

NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED

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