Lab Experiment > CPSC_121_Pre_Lab_02_Submission. CPSC_121_Pre_Lab_02_ SCIENCE 101_CPSC 121 Pre Lab 2

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CPSC 121

Pre Lab 2

Pre Lab 2 Instructions: 1. Do not change the questions and document that is given. Simply add solutions by editing this document, using the soln environment we provided as follows: \begin{soln} My solution is here. \end{soln} Your solution will then appear in blue, and be easier to differentiate from the rest of the document.

2. If you need more space, add a page between the existing pages using the \newpage command.

3. Export the completed assignment as a PDF file for upload to gradescope.

Academic Conduct: I certify that my assignment follows the academic conduct rules for of CPSC 121 as outlined on the course website. As part of those rules, when collaborating with anyone, all of the below statements are true: 1. I and my collaborators took no record but names away.

2. After a suitable break, I am submitting without help from anyone other than the course staff.

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CPSC 121

Pre Lab 2

There are three pre-lab questions to prepare you for the upcoming lab. In this lab, your TA will assign you with two mystery ICs. An integrated circuit (IC) is a manufactured electronic circuit and in the 121 labs, this will refer to the black chips that you have already seen in lab 1 - they are the subcircuits that you can see on the left side of your Logisim window. The labels on both mystery ICs will be covered. One of these chips is a hex inverter, a chip with six inverters. The other is one of: a quad 2-input NAND gate, a quad 2-input AND gate, a quad 2-input OR gate, or a quad 2-input XOR gate. Your job is to identify these two chips.

The Logisim probe: Using the probe will simplify this task, and help you to debug your circuits in the future. The probe in the simulated Magic Box works very differently from that of a physical Magic Box. The probe will only show you the value of the input that you have connected, either a 1 or a 0. In Logisim, when the probe is connected to an input that is not connected to anything, the wire turns to blue, and when you have it connected to a logically invalid input it turns to red.

(Optional Reading) The physical probe: For a physical Magic Box we’d work with in the lab, this is how the probe output works. The probe input pin is in line with, and to the left of the clock outputs, and is connected to the red LED directly above it. The probe is on when the top half of the leftmost switch is down. An unused probe will blink. It will also blink if connected to an input that is not connected to anything. This is a common error, and the probe will help you quickly identify it. The probe will otherwise output the value of any input or output that it connects to. (The probe is detailed in Appendix B and Section 2.1 in The Magic Box User’s Manual).

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CPSC 121

Pre Lab 2

1. [1.00 marks] Using the probe, how will you determine which of the two chips is the hex inverter? (a) Sketch your wiring plan. Provide enough details so that your TAs could implement the plan just by looking at your diagram. (b) Write down the steps you’ll take.

Hint: This simple example wiring diagram that might be useful:

Step 1:Wire the input with pin 13 Step 2:Wire the output with pin 14 Step 3:Toggle switch on and off and build truth table based off results Step 4:Connect the probe to the output wire. It is the hex inverter if a 1 is displayed with the switch off.

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CPSC 121

Pre Lab 2

2. [0.50 marks] Once you’ve done that, how will you determine which “quad” chip you have? Again, sketch your wiring plan with sufficient details and write down your steps.

1.Wire input A to pin 13 and input B to pin 12 2. Wire pin 11 with output and connect the probe wire to the same wire as output.

3.Create truth table with 4 different combinations to observe the outputs.

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CPSC 121

Pre Lab 2

3. [0.50 marks] Why didn’t we include the quad 2-input NOR gate as one of the possible “quad” chips?

Because NOR gates have similar outputs to other gates. NOR gates could be used instead of other gates and vice versa so we didn’t need to include the quad 2-input NOR gate as one of the possible "quad" chips.

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