IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN, VOL. XX, NO. X, MMM YYYY
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TABLE II N OTATIONS USED IN TABLES III AND IV min max µ σ NTI NLD NST NRD NWT
The best-case co-simulation time and the worst-case simulation efficiency of 30 runs, where the “simulation efficiency” is defined to be the number of instructions or operations simulated per second as far as this paper is concerned. The worst-case co-simulation time and the best-case simulation efficiency of 30 runs. The mean of co-simulation time and simulation efficiency of 30 runs. The standard deviation of co-simulation time and simulation efficiency of 30 runs. The number of target instructions simulated. The number of load operations of the virtual processor. The number of store operations of the virtual processor. The number of times the virtual processor reads data from the VIC (PL190). The number of times the virtual processor writes data to the VIC (PL190).
TABLE III T HE EXPERIMENTAL RESULTS OF BOOTING UP THE L INUX KERNEL ON THE PROPOSED FRAMEWORK FOR 30 TIMES . Statistics
Co-simulation time
min
14m01.994s
max
15m37.327s
µ
14m49.317s
σ
00m22.461s
NTI 658,473,617.00 (67.96%) 701,925,646.00 (67.94%) 672,447,292.77 (67.91%) 13,997,515.54
NLD 231,778,725.00 (23.92%) 244,722,965.00 (23.69%) 236,356,464.13 (23.87%) 3,911,802.32
NST 78,616,811.00 ( 8.11%) 86,537,514.00 ( 8.38%) 81,375,519.70 ( 8.22%) 2,405,392.30
NTI+LD+ST 968,869,153.00 (100.00%) 1,033,186,125.00 (100.00%) 990,179,276.60 (100.00%) 20,314,710.16
NRD 132,556.00 (0.01%) 150,312.00 (0.01%) 141,016.27 (0.01%) 4,264.56
NWT 198,556.00 (0.02%) 225,370.00 (0.02%) 211,326.10 (0.02%) 6,421.29
TABLE IV S IMULATION EFFICIENCY OF BOOTING UP THE L INUX KERNEL ON THE PROPOSED FRAMEWORK FOR 30 TIMES ( I . E ., TRANSACTIONS PER SECOND ). Statistics min max µ σ
NTI 727,662.00 (67.84%) 782,040.00 (67.90%) 756,285.83 (67.91%) 10,303.83
NLD 256,299.00 (23.89%) 275,273.00 (23.90%) 265,844.27 (23.87%) 3,565.36
NST 88,724.00 (8.27%) 94,408.00 (8.20%) 91,501.37 (8.22%) 1,277.69
not necessarily proportional to the time it takes.
C. Performance of Co-simulation on the Proposed Framework One of the major concerns on the framework for virtual platform construction and design space exploration on the SoC development is certainly the hardware/software cosimulation speed, especially when co-simulating a full-fledged OS. The co-simulation times shown in the column labeled “Co-simulation time” of Table III are collected using the Linux’s time command, and the configuration of the virtual platform is identical to that used in Section IV-B. The rows labeled “min,” “max,” and “µ” present, respectively, the bestcase, the worst-case, and the average-case running time of booting up the kernel and shutting it down immediately for 30 times. The row labeled “σ” gives the variability. Note that only the real time of the time command, i.e., the time elapsed between invocation and termination of a co-simulation, is shown. From the perspective of the hardware designer, it is probably much much faster than just acceptable to co-simulate a full-fledged operating system in less than 15 minutes in average and less than 16 minutes in the worst-case, especially in the early stage of SoC development.
NTI+LD+ST 1,072,685.00 (100.00%) 1,151,721.00 (100.00%) 1,113,631.47 (100.00%) 15,146.88
NRD 157.00 (0.01%) 160.00 (0.01%) 158.00 (0.01%) 1.06
NWT 235.00 (0.02%) 241.00 (0.02%) 237.17 (0.02%) 1.63
V. C ONCLUSION This paper presents a framework for virtual platform construction and design space exploration on the SoC development based on QEMU and SystemC. The proposed framework is not only flexible for model replacement, but it also provides the capability of design space exploration. Moreover, our experience shows that the proposed framework can even benefit from whatever enhancements are made to QEMU and SystemC. Our experimental result shows that the vector interrupt controller of the existing virtual platform of QEMU written in C can be easily replaced by a hardware interrupt controller modeled in SystemC. Furthermore, design space exploration can be easily achieved by making QEMU play the role of an ISS, which will send all the information required by design space exploration to SystemC such as the instructions executed, the addresses of the memory accessed, the I/O operations performed, and so on. Finally, the “faster than fast” co-simulation time indicates that the framework we proposed in the paper makes it possible to co-simulate a full-fledged operating system in the early stage of the SoC development.