Reliability, maintainability and risk pract meths for engineers 8th ed d smith (b h, 2011) bbs

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122â•… Chapter 8 In the case of an AND gate it can be shown that the resulting MDT is obtained from the multiple of the individual MDTs divided by their sum. Thus for G3 the result becomes (24 × 168) _________ ╉╯ ╯╉╯ = 21h (24 + 168)

8.3.3╇ Cutsets A problem arises, however, in evaluating more complex trees where the same basic initiating event occurs in more than one place. Using the above formulae, as has been done for Figure 8.8, would lead to inaccuracies because an event may occur in more than one Cutset. A Cutset is the name given to each of the combinations of base events which can cause the top event. In the example of Figure 8.7 the cutsets are: pump motor panel detector PSU and standby. The first four are referred to as first-order Cutsets since they involve only single events which alone trigger the top event. The remaining cutset is known as a second-order Cutset because it comprises a pair of events. There are no third- or higher-order Cutsets in this example. The relative frequency of cutsets is of interest and this is addressed in the next section.

8.3.4╇ Computer Tools Manually evaluating complex trees, particularly with basic events that occur more than once, is not easy and would be time-consuming. Fortunately, with today’s computer speed and memory capacity, a large number of software packages (such as TTREE) are available for fault tree analysis. They are quite user-friendly and the degree of competition ensures that efforts continue to enhance the various packages in terms of facilities and user-friendliness. The majority of packages are sufficiently simple to use that even the example in Figure 8.7 would be undertaken considerably more quickly by computer. The time taken to draw the tree manually would exceed that needed to input the necessary logic and failure rate data to the package. There are two methods of inputting the tree logic: 1. Gate logic, which is best described by writing the gate logic for Figure 8.7 as follows: GTOP G1 G3 G2

+ G1 G2 PUMP + G3 MOTOR * PSU STANDBY + DETECT PANEL


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