technology in context
the AES algorithm depends on the number of bits used for encryption, i.e., 128, 192 or 256 bits. Traditionally, an increase in the number of bits translates to an increase in the power used by the CPU for AES processing.
Many RF protocols require a cyclic redundancy check (CRC) for detecting errors during transmission. Additionally, certain wireless protocols, such as the wireless M-Bus stack used for metering in Europe, require encoding the bit stream to
19mA @ 3.6 V
eliminate the DC component (e.g., a string of 0s and 1s). This ensures frequent signal transitions directly proportional to the clock rate and helps in clock recovery. An advanced MCU design may include hardware blocks for each of these
19mA @ 1.8 V
19mA @ 1.8 V
19mA @ 1.8 V LDO
LDO + HEAT RF XCVR
5mA @ 3.6 V
RF XCVR
14.5mA @ 3.6 V
5mA @ 1.8 V
5mA @ 1.8 V (for rest of chip)
(for rest of chip) LDO
DCDC
+ HEAT (wasted energy)
Traditional MCU
Total draw from the battery
Total draw from the battery
C8051F960
14.5mA @ 3.6 V
24mA @ 3.6 V Figure 1
Comparison of Switching Efficiencies between Traditional and Advanced MCUs.
707 Âľsec
noDPPE
current
4.1mA
with DPPE
132 Âľsec 2.3mA
time Figure 2 The benefits of using a DPPE can result in significant power savings. RTC MAGAZINE APRIL 2012
19