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System-on-Chip for FPGA Processing CoSine is a fully integrated, completely preconfigured System-on-Chip for real time FPGA based signal processing. Bridging two high speed interfaces (Serial RapidIO , PCI-X , or PCI-Express ) through a multi-port DDR controller, the elegant design enables non-contentious access to a User Programmable Logic (UPL) block. ®
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Similar to a structured ASIC, the IP cores, memory controllers, specialized DMA engines, embedded processors and surrounding logic are factory preconfigured and supplied as a fully tested system. This provides users the ability to focus on application specific state machine processing in the UPL block without concerning themselves with coding other modules, complicated SoC integration, or verification. The CoSine development toolkit includes a standalone ATCA board with up to 8GB of DDR that demonstrates continuous sustained transfers from a 64-bit/ 133MHz PCI-X PrPMC site at maximum bandwidth through CoSine to a Serial RapidIO x4 XMC site. Along with a complete “How to” Developer’s Manual, the kit includes a demo program using an off-the-shelf Xilinx 1024 FFT, robust library of VHDL test benches, and extensive suite of PCI, sRIO, and standalone diagnostic “C” test code. ®
CoSine will also be offered on several forthcoming XMC, AMC, and Othello VxS VITA 41 and 46/48 formats in both commercial and conduction cooled options.
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MICRO MEMORY, LLC. 9540 Vassar Avenue, Chatsworth, California 91311 U.S.A. (US) Tel 818 998 0070 • (US) Fax 818 998 4459 www.micromemory.com • sales@micromemory.com