3rd part where 0 £ t £ Ls I ld / U1. The interval of current increase t1r = Ls I ld / U1 can be extended so that it is much times higher than t r + t rec . In order to weaken the energy collected in Ls, discharge resistance R Ls is connected in parallel to Ls through the reverse diode. Then during the off-state of the transistor that should be longer than 3Ls/R Ls, the current of inductance decreases almost to zero. At the end of the turn-on process, the overvoltage produced by this snubbing circuit can achieve Ild R Ls. The power losses of the resistor R Ls are calculated as follows: ∆PRLs = 0.5Ls I ld2 f , where f is frequency. a
b
+
+
RLs Ild V
Vs
U1
U1
Vs Ls
V
RLs
iVT –
Ild
Ls
iVT –
VT
VT
IVTmax Ild
U1
U1
Ild iVT
uVT uVT 0
tr
trec
t
0
t1r
t
Fig. 3.28. The damping circuits of the turn-on process of the transistor (a) and clamp diode (b)
Example Calculate the inductance of the damping circuit at the turn-on process, if the supply voltage is U1 = 600 V, load current is 50 A, transistor t r = 30 ns , frequency is 50 kHz. Maximum duty ratio of the transistor is Dmax = 0.9 . 1. Inductance of the damping circuit is Ls =
U1t r 600 ⋅ 30 = 9 = 0.36 µH. I ld 10 ⋅ 50 195
EnergoelektronikaEN BOOK.indb 195
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