7:00 – 8:00
BREAKFAST
BREAKFAST
8:15 – 8:45
WELCOME
WELCOME
8:45 – 9:30
KEYNOTE I
KEYNOTE I
9:30 – 10:15
KEYNOTE II
KEYNOTE II
10:15 – 10:30
BREAK
BREAK
GROUP 10:30 – 12:00
MIXED SIGNAL
POWER MANAGEMENT/ AUTOMOTIVE
PRODUCTION INTEGRATION & HW/SW INTERFACE
RF WIRELESS
ASSEMBLY TEST MIL/AERO
The Man with the Innovative Test Technique
Q's Lab
Accelerating Program Development and Characterization
Data Analysis
Instrumentation
Test Development
10:30 – 11:00
1/A Pattern Matching on the Tiger™ Jason Laderman, Intel Corp.
1/A Jitter Testing with Dig_Cap Joyce Ng, Kevin Walt, David Yin, Broadcom
1/A Reduce Program Development Time for the 1/A Use Scripting to Get the Most out of Data Automotive Market on the FLEX™ Analysis Antoine Megens, Salland Engineering Dominique Le Roux, Teradyne
1/A Introducing the Port Expander Instrument Glenn Burnham, Teradyne
1/A Using Interchangeable Virtual Instrument (IVI) to Increase Test Development Efficiency Sameer Bivalkar, Teradyne
11:00 – 11:30
1/B Using the HexVS as an Independent DVM Data Acquisition Instrument Patrice Ducharm, Roxan Lemire, Michel Paradis, IBM; George. Simbles, Teradyne
1/B What Is and How to Use Learn Mode Michael Cavallini, Brent Herling, Kent Magnuson, Teradyne
1/B VBT or POP? How to Decide the Implementation of a Mixed-Signal Test Fast Cristian Cesarini, Filomena Ricci Teradyne
1/B Data Analysis in Real-time Mode Martijn van der Vlag, Salland Engineering
1/B Improving the Level Accuracy of Gen4 MW Hardware David DiBona, Teradyne
1/B Cost Benefit Analysis for Using ATLAS Brandon Beaulieu, Jim Danscuk, U.S. Air Force/Tinker
11:30 – 12:00
1/C KeepAlive™: Then and Now Way Kyi, Teradyne
1/C FLEX™ DSSC vs. ADB Bus Kevin Cheng, Jerry Hsieh, Teradyne
1/C Better Programming on the FLEX™ Tester for Easy Debug and Easy Switch from Characterization to Production Test Elie Trognon, Freescale Semiconductor
1/C Yield Monitor Tool for IG-XL™ Platforms Jimmy Chan, Yeng Chee Liew, Broadcom; Nagappan Nachiappan, Jeffrey Tan, Teradyne
1/C The Implementation of GSM/EDGE Source and Receive Library in IG-XL™ Ronald Burke, Helen Chen, Peter Chen, Greg Dionne, Shu Xia, Zhe Xu, Teradyne
1/C Programmable Test Boards for Assembly TPS Troubleshooting Luis Villalta, Teradyne
12:00 – 1:00 1:00 – 2:30
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DIGITAL
LUNCH For Your SB6G Only
LUNCH Q's Lab
Accelerating Program Development and Characterization
Tester Integration A
Code Examples
1:00 – 1:30
2/A A User Characterization of the SB6G Instrument Patrice Ducharme, Roxan Lemire, Dany Minier, Doris Viens, IBM; Fady Bishay, Mike Patnode, George Simbles, Teradyne
2/A Advanced Measurement Methods of Hysteresis Featured in Mixed-Signal IC Chips Weishu Wu, Texas Instruments
2/A My Pattern is Running - Can I Still Debug? Lorenzo Simonini, Elisa Woo, Teradyne
2/A Integrating the FLEX™ Test System into a Well-Established Test Floor Chad Bray, Trevor Dixon, Texas Instruments
1:30 – 2:00
2/B Characterizing High-Speed Parallel Buses with the SB6G and Sub-MOSC Timing Erik Lusis, IBM; Fady Bishay, Doug Mainz, Teradyne
2/B The Implementation of Fourier eXtended Transform (FXT) in IG-XL™ Edmond Tan, Shu Xia, Teradyne
2/B Using the PLMeter as a Debug Resource Krista Bertsch, Teradyne
2/B Planning and Logistics: Converting a 2/B On-the-Fly Statistics with IG-XL™ Complex SoC Catalyst™ to FLEX™ in Asia without Jos Driessen, NXP Semiconductors Leaving Europe John Tatchell, CSR; Ian Beck, Teradyne
2:00 – 2:30
2/C Testing High-Speed Serial Buses through a Generalized Template for the UltraFLEX™ SB6G Joe DeSimone, Freescale Semiconductor; Bill Davis, Teradyne
2/C Understanding IG-XL™ DSP Enhancements Hmayak Dravatshyan, Scott Therrien, Teradyne
2/C Sync Panel, Uncovering Issues Walter Oldham, Derek Sam, Teradyne
2/C Working with OpenFLEX™ — A Customer’s Experience of Developing Test Solutions through Teradyne’s OpenFLEX Office Omar Biabani, Sten Peeters, Teradyne
2:30 – 3:00
BREAK
3:00 – 5:00
Protocol, High-Speed Protocol
2/A Migrating a Final Test RF SoC from SingleSite Catalyst to Quad-Site FLEX™ Kim Gundersen, AMI Semiconductor
Programming in C # 2/A Programming in C # Workshop (90 Minutes)
BREAK Tools
Test Quality: Ready to Ramp?
DIB Design Verification
Board/Material Considerations
3:00 – 3:30
3/A High-Speed Loop-Back Test Solution for SerDes Products Using SB6G Patrice Ducharme, Dany Minier, Doris Viens, IBM; David Keezer, Georgia Institute of Technology
3/A Get the Best of your High-Density PMU DirkJan Stuij, Salland Engineering; Francois Deun, Teradyne
3/A Faster Ramps and Higher Yields in the Pursuit of 0 DPM Richard Ackerman, Mentor Graphics (Vendor)
3/A DIB Design Sanity Check Using Circuit 3/A Defining Inductance in Contactors Simulation Software Ryan Satrom , Everett Charles (Vendor) Ambika Krishnamoorthy, Swetha Thiagarajan, Intel Corp; Tom Chambers, Chris Paull, Teradyne
3:30 – 4:00
3/B SATA Testing with SB6G Zubir Ebrahim, Teradyne
3/B AC Characterization of BBAC and POOL2 Signal Sources Don Jussaume, Analog Devices
3/B Force Fail Tool, Accelerating Production Release Walter Oldham, Teradyne
3/B Automating Schematic Verification for Better Efficiency and Better Chance for FirstPass Success David Baird, Freescale Semiconductor
3/B RF Connectors and Material: A Performance Comparison Martin Dresler, Wolfgang Steger, Teradyne
4:00 – 4:30
3/C High-Definition Multimedia Interface (HDMI) Receiver Characterization and Test Techniques on the UltraFLEX™ Peter Huber, Edward Seng, Teradyne
3/C Automated Test Program Conversion K. Padma Priya, Vinai Kumar Singh, Teradyne/HCL Technologies
3/C Relays — Conquering the Test Engineer's Nemesis Paul Nelson, Elisa Woo, Teradyne
3/C Self-Documenting PIB Diagnostics Chad Bray, Trevor Dixon, Texas Instruments
3/C Design Example for a Generic RF DIB and Custom Daughter Board KN Chui, Corad; Charles Kao, Teradyne
4:30 – 5:00
3/D HyperTransport™ 3.0 Link Characterization with SB6G on the UltraFLEX™ James Yeh, AMD; Fady Bishay, Shawn Sullivan, Teradyne
3/D Understanding DCTime Larry Lovell, Teradyne
3/D Lowering DPPM without Increasing Burn-in 3/D A Chip that Avoids Mechanical Relays on a or Test Time DIB Jeff Bibbee for OptimalTest Giuseppe Amelio, Francesco Cantini, Moreno Lupi, Francesco Picchi, Microtest
6:00 – 9:00
TERADYNE PARTY
Bi-Series 3/A Hands-on Programming the Bi4-Series Workshop
3/D RF Debugging Techniques for Volume Production Peter Higgins, Teradyne
TERADYNE PARTY
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