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June 2014

Electromagnetic Compatibility for Switching Power Ultralow-Power Embedded Applications

Dr. Keh-Shew Lu President & CEO of Diodes Incorporated

Diodes Incorporated

Delivers the Power to

Next-Generation Devices


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Adjustable Soft Start – To avoid large E frequency is 500kHz if FS is tied to VCC; in-rush current, VOUT is slowly increased if a resistor is tied from FS to GND, the T at startup to its final regulated value. switching frequency can be programmed a Soft-start time is determined by the SS To further reduce radiated noise, metal from 300kHz to 2MHz. “In regard to powe f pin connection. If SS is pulled to VCC,shielding an can be utilized to contain internal 2ms timer is selected for softmanagement, we aa radiation. This is achieved by placing the Synchronization Control – To minimize a start. For other soft-start times, simply involved with man noise generating source within a grounded the input voltage ripple and reduce connect a capacitor from SS to GND. In conductive housing. Interface to the clean aspects of powe EMI, frequency synchronization is often this case, a 2μA current pulls up the SS outside environment is via in-line filters. products, focusing for applications with multiple DCvoltage and the FB pin will follow thisCommon required mode bypass capacitors would consumer electron DC converters.Solutions The switching frequency ramp until it reaches the 600mV Power foron Modern also needManagement to be returned to ground the Electronic Devices that we use in of the ISL8541X product family can be reference level. conductive housing. day-to-day life.” synchronized up to 2MHz by an external signal (10% greater than the programmed Power-Good – To indicate the operation ADDITIONAL MITIGATION CONSIDERATIONS free running IC frequency) applied to condition of the switching regulator, a FOR SWITCHING POWER SUPPLIES the SYNC pin. This will also allow two Power Good (PG) pin is implemented Reliable with wiring connections should be regulators to be synched together. open-drain output and internal pull-up implemented to and from the power supply. Wiring must be of suitable size and be kept Figure 5. Electromagnetic Compatibility Considerations as short as possible, and wiring loops should and forfrequency Switching Power Supplies (PartSchematic 2) allows be“Programmable minimized. Avoid running input or output Image of ISL8541X wirings near power devices to prevent noise for optimization between efficiency Demo Board pick up.

Power Developer

CONTENTS

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and external component size. It also allows low frequency operation for low onsidering the importance of conservation, the portability Ensure all grounding connections are made of embedded systems is a key design consideration. 7: Eliminate loops in sup and properly secured. Earth ground wireswould Portable systems areFigure VOUT when minimum on time generally battery-powered with Interview with Dr.battery Keh-Shew Lu,upon the systems’ power consumption. life dependent should be kept as short as possible. If the otherwise limit the operation.” These days, as part of “Go Green” initiatives, power consumption circuit or system operations induce current President and CEO of Doides Incorporated is a selection criterion even for wall-powered applications.

COVER INTERVIEW C

Designing Embedded Applications for ULTRALOWtransients, it is very important to have

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POWER TECH ARTICLE

local decoupling capacitors to supply the pulsed current locally, instead of letting the pulsed current propagate upstream to the supply. These capacitors should include high frequency ceramic caps and bulk1capacitors. Part Designing Embedded Applications for Ultralow-Power If the operation allows, slow down the clock, or rising/ falling edges. Circuits with higher Sachin Gupta, Kannan Sadasivam, Cypress clockByrates/fast switching times should be located close to the power line input to reduce power transients. It is recommended that both analog and digital circuits should be individually physically isolated on both power supply and signal lines.

(Part 1)

Figure 8: Decoupled supply line local Boundaries.

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Power Developer

Power Management Solutions

for Modern Electronic Devices

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ntegrated circuits (ICs) are a vital component in almost all fields of the modern world. As a result, power management in these ICs has become more and more critical. From consumer products such as computers, tablets and TVs, to servers and industrial applications such as medical equipment, portable instruments and fitness equipment, modern electronic devices require efficient power management solutions. Some of the key requirements of today’s power management solutions include less power consumption under various load conditions, less space, high reliability and wide input voltage. These requirements are driving the need for highly efficient, wide VIN, low quiescent current (IQ) switching regulators in a broad range of applications. By George Liang, Applications Manager for Power Products, Intersil

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ntersil’s ISL85410/15/18 product family is designed to meet the power requirements of modern electronic devices. These ICs integrate the PWM control, power MOSFET, compensation network, protection and monitoring circuit into a tiny 4mmx3mm 12 LD DFN package for efficient, compact and costeffective power conversion. With the proprietary current model control scheme implemented, these ICs can precisely regulate output voltage for input voltage varying from 3V to 36V and load current up to 1A. With output voltage adjustable from 0.6V to 96% of VIN and switching frequency adjustable from 300kHz to 2MHz, the ISL8541X product family provides the flexibility to design optimal power solutions. The ISL8541X product family has internal compensation and the option to use external compensation to achieve fast transient performance. The protection and control logic circuit is well designed to ensure robust protection including OCP, OVP and OTP under severe operation conditions. These ICs have other important features such as synchronization with external clock,

adjustable soft start, forced PFM for light load operation, up to 96% efficiency and low IQ of 80μA. The pin-compatible ISL85415 (500mA), ISL85418 (800mA) and ISL85410 (1A) switching regulators are the ideal choice for implementing highly efficient, compact and costeffective power solutions in a broad range of industrial, infrastructure and consumer applications.

Typical Applications of ISL85410/15/18 Switching Regulators The ISL8541X sync buck regulators can be used for a wide range of industrial and infrastructure products such as defibrillators, fitness equipment, portable instrumentation, distributed power supply, computer motherboards, data cards, network switches, satellite set top boxes, medical imaging systems, portable emergency communication equipment, car chargers, power tools battery powered data acquisition devices and more. Figure 1 shows the typical applications of the ISL85410/15/18 devices to convert wide VIN power source to various low output voltage for various load conditions with current up to 1A.

“The ISL8541X product family has internal compensation and the option to use external compensation to achieve fast transient performance.”

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TECH ARTICLE High Efficiency Operation with Light Load Feature The ISL8541X power management ICs combine a synchronous buck PWM controller with integrated power switches. With compensation circuit and other control functions integrated inside the IC, only a few external components are needed for an efficient DC-DC power supply (Figure 2).

Figure 1. ISL8541X Family Applications

To achieve high efficiency under heavy load conditions, the internal high-side and low-side N-channel MOSFETs of ISL85410/15/18 were designed with ultra low resistance and low gate charge. In addition, the ON/OFF control of the switching FETs is optimized with very little dead time to reduce the power loss.

Figure 2. Default Application Schematic with Internal Compensation

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Power Developer “With optimal internal power circuit and light load operation mode, the DC-DC converter based on the ISL85410/15/18 product family can achieve superior efficiency over the entire operation range.” In the light load operation, the converter efficiency can be improved by enabling variable frequency operation (PFM). Connecting the SYNC pin to GND will allow the controller to choose such operation automatically when the load current is low. The IC enters the DCM mode of operation when 8 consecutive cycles of inductor current crossing zero are detected. Should load current rise beyond the limit, VOUT will begin to decline. Once the output voltage drops to 99% of the set voltage, the converter will return to PWM operation. Figure 3 shows the transition from PFM to PWM mode in light load operation.

With optimal internal power circuit and light load operation mode, the DC-DC converter based on the ISL85410/15/18 product family can achieve superior efficiency over the entire operation range. Figure 4 shows the efficiency of a 3.3VOUT voltage regulator based on ISL85410 over the load and various VIN conditions.

Robust Protection for Safe Operation Over-current Protection – During PWM on-time, current through the upper FET is monitored and compared to the peak

Figure 3. Transition of PFM to PWM for Light Load Efficiency Improvement

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TECH ARTICLE over-current limit. If the current reaches the limit and persists for 17 sequential clock cycles, the regulator will begin its hiccup sequence. In this case, both FETs will be turned off to protect the device and PG will be pulled low to indicate a fault condition. There is no danger even if the output is shorted during soft-start. If VOUT is shorted very quickly, the regulator recognizes this condition and will begin to lower its switching frequency proportional to the FB pin voltage. This ensures that under no circumstance (even with VOUT near 0V) will the inductor current run away. Negative Current Limit – Should an external current be driven into VOUT, the controller will attempt to regulate VOUT by reversing its inductor current to absorb the externally sourced current. If the current is reversed to unacceptable levels, the controller will initiate its negative current limit protection. Similar to normal

over-current, the negative current protection is realized by monitoring the current through the lower FET. When the valley point of the inductor current reaches negative current limit, the lower FET is turned “OFF” and the upper FET is forced “ON” until current reaches the POSITIVE current limit, when the lower FET is allowed to operate. Should the current again be pulled to the negative limit on the next cycle, the upper FET will again be forced “ON” and current will be forced to 1/6th of the positive current limit. At this point the controller will turn “OFF” both FETs, applying a 100Ω load from PHASE to PGND in the attempt to discharge the output. Recovery is automatic. Over-Temperature Protection – Over-temperature protection limits maximum junction temperature to +150°C, when both FETs are turned “OFF” and the controller waits for temperature to decrease by approximately 20°C. After that the controller will initiate a normal soft-start sequence.

“During PWM on-time, current through the upper FET is monitored and compared to the peak over-current limit. If the current reaches the limit and persists for 17 sequential clock cycles, the regulator will begin its hiccup sequence.” Figure 4. ISL85410 Efficiency at Light and Heavy Load (VOUT=3.3V)

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Power Developer Boot Under-Voltage Protection – If the boot capacitor voltage falls below 1.8V, the boot under voltage protection circuit will turn on the lower FET for 400ns to recharge the capacitor. This operation may arise during long periods of no switching operation in PFM mode. In PWM operation where the VOUT is very close to VIN, the lower FET is forced on for approximately 200ns every 10 clock cycles to prevent the boot capacitor from discharging. This mechanism ensures the safe operation of the switching regulator.

Other Important Features Adjustable Soft Start – To avoid large in-rush current, VOUT is slowly increased at startup to its final regulated value. Soft-start time is determined by the SS pin connection. If SS is pulled to VCC, an internal 2ms timer is selected for softstart. For other soft-start times, simply connect a capacitor from SS to GND. In this case, a 2μA current pulls up the SS voltage and the FB pin will follow this ramp until it reaches the 600mV reference level. Power-Good – To indicate the operation condition of the switching regulator, a Power Good (PG) pin is implemented with open-drain output and internal pull-up

resistor. PG is actively held low when EN is low and during the buck regulator softstart period. After the soft-start period completes, PG becomes high impedance provided the FB pin is within the operating range. Should FB exit the specified window, or a fault condition occur, PG will be pulled low. Adjustable Operating Frequency – Programmable frequency allows for optimization between efficiency and external component size. It also allows low frequency operation for low VOUT when minimum on time would otherwise limit the operation. Default switching frequency is 500kHz if FS is tied to VCC; if a resistor is tied from FS to GND, the switching frequency can be programmed from 300kHz to 2MHz. Synchronization Control – To minimize the input voltage ripple and reduce EMI, frequency synchronization is often required for applications with multiple DCDC converters. The switching frequency of the ISL8541X product family can be synchronized up to 2MHz by an external signal (10% greater than the programmed free running IC frequency) applied to the SYNC pin. This will also allow two regulators to be synched together.

“Programmable frequency allows for optimization between efficiency and external component size. It also allows low frequency operation for low VOUT when minimum on time would otherwise limit the operation.”

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Figure 5. Schematic and Image of ISL8541X Demo Board


TECH ARTICLE Option to Use External Compensation – The internal compensation parameters are carefully selected to ensure robust stability and good dynamic performance with a wide range of output inductor and capacitor combinations. In the case that further improvement on transient performance is needed, the external compensation circuit can be used via COMP pin to optimize the operation. If COMP pin is connected to VCC via an external resistor, internal compensation will be used. With both options, the ISL8541X product family provides extra flexibility for circuit design.

Evaluation Platform To provide users the flexibility to explore all features of the ISL8541X product family, a compact demo board is available and features component stuffing options as shown in Figure 5.

Conclusion The ISL85410/15/18 switching regulator family is designed for wide VIN and low current POL DC-DC applications. The solutions offer high efficiency, flexibility, low quiescent current and robust stability over a wide range of VIN and output conditions. The devices are highly reliable with complete protection features, making them ideal for highly efficient, compact power conversions in industrial, infrastructure, consumer and automotive applications. Find out more about Intersil’s ISL8541X switching regulator family at www.intersil.com/ISL8541X.

References [1] Intersil Corporation, ISL85410 Datasheet and ISL85410 Application Note

About Intersil Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixedsignal and power management semiconductors for the industrial and infrastructure, personal computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com. 1-888-INTERSIL or 1-888-468-3774 ©2014 Intersil Americas LLC. All rights reserved. Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.

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Power Developer

Electromagnetic Compatibility Considerations for

Switching Power Supplies Characterization of the EMI problem requires understanding the interference source

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witching power supplies generate Electromagnetic Interference (EMI) by virtue of their inherent design characteristics. Internal switching power supply circuits that generate undesirable emissions that are rich in harmonics can cause electrical interference both internally to the circuit in which the power supply is installed and to other electronic equipment in the vicinity of the emission source.

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PRACTICAL MEASURES FOR EMI MITIGATION IN POWER SYSTEMS In systems and circuits that are powered by switching power supplies, good practices should be observed in order to minimize EMI problems and ensure agency compliance. Suppression of EMI to levels below that specified by regulatory bodies requires an understanding of the design of the power supply and the application in which it is incorporated. It is important to note that even an application with a properly filtered switching power supply may not achieve compliance if the application is not designed to minimize EMI. Cautions must be taken to use the power supply/converter properly as intended, to prevent power supply generated noise from radiating or reaching the source, minimize noise pick up from the power supply, minimize system noise generation, and prevent system generated noise from reaching the power supply. MITIGATION TECHNIQUES FOR CONDUCTED EMI To effectively mitigate conducted emissions, it is imperative to address the differential mode noise and common mode noise separately becaus e the remediation solution is different for each type of noise. Solutions for differential mode noise will not eliminate common mode noise present in the circuit. The same is true for common mode noise solutions as applied differential mode noise. Differential mode noise can usually be suppressed by connecting bypass capacitors directly between the power and return lines of the power supply.

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The power lines that require filtering may be those located at the input or the output of the power supply. The bypass capacitors on these lines need to be physically located adjacent to the terminals of the noise generating source to be most effective. The actual location of the bypass capacitor is critical for efficient attenuation of differential mode currents at high frequencies. Attenuation at lower frequencies of differential mode currents around the fundamental switching frequency of the noise generating source

Figure 4: Differential mode noise can usually be suppressed by connecting bypass capacitors directly between the power and return lines of the power supply.

may dictate that a much higher value of bypass capacitance be required that cannot be attained with a ceramic style capacitor. Ceramic capacitors up to 22 ÎźF may be suitable for differential mode filtering across the lower voltage outputs of switching power supplies but not suitable for inputs where 100 volt surges can be experienced. For these applications electrolytic capacitors are employed because of their high capacitance and voltage ratings.


TECH ARTICLE

Figure 5: Common mode conducted currents are effectively suppressed by connecting bypass capacitors between each power line of the power supply and ground.

Differential mode input filters usually consist of a combination of electrolytic and ceramic capacitors to suitably attenuate differential mode current both at the lower fundamental switching frequency as well as at the higher harmonic frequencies. Further suppression of differential mode currents can be achieved by adding an inductor in series with the main power feed to form a single stage L-C differential mode low pass filter with the bypass capacitor. Common mode conducted currents are effectively suppressed by connecting bypass capacitors between each power line of the supply and ground. These power lines may be at the input and/or at the output of the power supply. Further suppression of common mode currents can be achieved by adding a pair of coupled choke inductors in series with each main power feed. The high impedance of the coupled choke inductors to exiting common mode currents forces those currents through the bypass capacitors.

MITIGATION TECHNIQUES FOR RADIATED EMI Radiated EMI can be suppressed by reducing RF impedance and reducing the antenna

loop area which is done by minimizing the enclosed loop area formed by the power line and its return path. The inductance of a printed circuit board track can be minimized by making it as wide as possible and routing it parallel to its return path. Similarly, because the impedance of a wire loop is proportional to its area, reducing the area between the power line and its return path will further reduce its impedance. Within printed circuit boards this area can be best reduced by placing the power line and return path one above the other on adjacent printed circuit board layers. Recall that reducing the loop area between a power line and its return path not only reduces the RF impedance, but also reduces the effectiveness of the antenna because the smaller loop area produces a reduced electromagnetic field. A ground plane located on the outer surfaces of the printed circuit board, particularly if located directly below the noise generating source, suppresses radiated EMI significantly.

Figure 6: Reduced antenna loop area to reduce radiated emissions.

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To further reduce radiated noise, metal shielding can be utilized to contain radiation. This is achieved by placing the noise generating source within a grounded conductive housing. Interface to the clean outside environment is via in-line filters. Common mode bypass capacitors would also need to be returned to ground on the conductive housing.

ADDITIONAL MITIGATION CONSIDERATIONS FOR SWITCHING POWER SUPPLIES Reliable wiring connections should be implemented to and from the power supply. Wiring must be of suitable size and be kept as short as possible, and wiring loops should be minimized. Avoid running input or output wirings near power devices to prevent noise pick up. Ensure all grounding connections are made and properly secured. Earth ground wires should be kept as short as possible. If the circuit or system operations induce current transients, it is very important to have local decoupling capacitors to supply the pulsed current locally, instead of letting the pulsed current propagate upstream to the supply. These capacitors should include high frequency ceramic caps and bulk capacitors. If the operation allows, slow down the clock, or rising/ falling edges. Circuits with higher clock rates/fast switching times should be located close to the power line input to reduce power transients. It is recommended that both analog and digital circuits should be individually physically isolated on both power supply and signal lines.

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Figure 7: Eliminate loops in supply lines.

Figure 8: Decoupled supply lines at the local Boundaries.


TECH ARTICLE

“The inductance of a printed circuit board track can be minimized by making it as wide as possible and routing it parallel to its return path.� Care must be taken to prevent ground loops in the system, especially when the system becomes complex. This can be achieved by using a single point ground or a ground plane. An example is highlighted in figure 7. If there are multiple circuits in a system, decouple the circuits from each other by running separate supply lines, and/or place inductance in the supply lines as highlighted in figure 8. If needed, ferrite beads can be placed on the dc supply lines to isolate the system and the supply. This can be effective to prevent power switching harmonics from disrupting the system’s operation, or to prevent system generated noise from reaching the power supply. On the input side, if the built-in EMI filter is insufficient for a specific application, additional EMI filtering can be applied before the power supply. A bead can also be placed on the earth ground wire between the ac inlet and the supply.

Although many of the mitigation techniques highlighted above are applicable to the implementation of both ac-dc and dc-dc converters within a system, there are specific considerations that must be addressed for dc-dc converters. The switching action in most dc-dc converters demand a pulsed input current, which is best supplied by local capacitors close to the switching devices. As many dc-dc converters are compact in size, they generally do not contain sufficient capacitance. The system designer will need to place additional capacitance at the input to reduce differential mode noise. For even better filtering performance, a PI filter can be employed. The additional capacitors are used to reduce common mode noise.

ADDITIONAL SYSTEM-LEVEL MITIGATION TECHNIQUES As mentioned above, although most switching power supplies are designed to meet applicable EMI standards as standalone modules, the system itself needs be designed to generate a minimum EMI profile to meet regulatory standards. Specific areas in the system design that are candidates for EMI mitigation practices include the signal lines, printed circuit boards (PCB), and solid state components. Signal line considerations include the use of low pass filters on signal lines to reduce allowable bandwidth on the line to the minimum that will still allow the signal to pass un-attenuated. Feed and return loops should

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be kept close on wide bandwidth signal lines to minimize radiated emissions. Additionally, signal lines carrying RF or near-RF signals should be properly terminated to reduce reflection at the termination. Ringing and overshoot on these lines can also be minimized as a result of using the appropriate termination. PCB high impedance runs that contribute to EMI can be mitigated by using wide PCB metal stripes to decrease the impedance of power lines. Where possible, signal tracks should be designed considering their propagation delay vs. signal rise/ fall time and include a ground and a power plane. Slit apertures in PCB layout should be strictly avoided, particularly in ground planes or near current paths to reduce unwanted antenna effects. Board metal stripes should be kept as short as is practical, and metal stubs which can cause reflection and harmonics should be avoided. Also, avoid overlapping power planes to reduce system noise and power coupling. Reduce or eliminate sharp bends in metal stripes (also known as beveling or track mitering) to reduce field concentration and run conducting stripes orthogonally between adjacent layers to reduce crosstalk. Floating conductor areas can act as a source of radiated emissions, so their use should be avoided except for overriding thermal considerations. Additionally, solid state components on the PCB should be decoupled close to chip supply lines to reduce component noise and power line transients.

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“Specific areas in the system design that are candidates for EMI mitigation practices include the signal lines, PCBs, and solid-state components.� SUMMARY Switching power supplies can generate EMI because of their inherent design. Domestic and international regulatory bodies regulate these emissions through promulgation of rules and standards such as the FCC Part 15 rules and the CISPR 22 standard. Noise has been discussed with respect to type, how the noise is transmitted, frequency of the noise, and noise modes in circuits. A basic design guideline for suppression of noise has been provided, including input/output filter circuits and reduction of antenna loop area. Best practices for EMI mitigation as regards power supply, signal line, printed circuit board (PCB) and components have also been discussed. http://www.cui.com/


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COVER INTERVIEW

Diodes Incorporated

DELIVERS the POWER to Next-Generation Devices Interview with Dr. Keh-Shew Lu, President and CEO of Diodes Incorporated

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iodes Incorporated is a leading global manufacturer and supplier of high-quality products within the broad discrete, logic, and analog semiconductor markets. Diodes serves the consumer electronics, computing, communications, industrial, and automotive markets. With corporate headquarters in Plano, Texas, Diodes has other locations in the U.S., Asia, and Europe. EEWeb spoke with Dr. Keh-Shew Lu, president and CEO of Diodes Incorporated, about how his company is meeting the demand for power management devices used in consumer electronics. Dr. Lu also discussed the company’s focus on green technology.

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Power Developer “In regard to power management, we are involved with many aspects of power products, focusing on consumer electronics that we use in day-to-day life.�

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What kind of power management devices is Diodes focusing on, and what markets is it targeting? Diodes Incorporated features a widerange product line to span discrete, analog, and logic devices. In regard to power management, we are involved with many aspects of power products, focusing on consumer electronics that we use in day-to-day life, such as TVs, monitors, set-top boxes, gaming equipment, LED lighting, and a variety of portable applications from tablets to medical and personal assistance devices. In those portable applications, we focus on extended standby times, protection features, and reduced power consumption to support environmentally friendly green products.


COVER INTERVIEW We have a long-standing product offering in protective switches for USB, HDMI ports, and hard-disk drives. Our load switches provide low RDSON and fast switching performance, which enables segments to be turned off when not in use, thus decreasing wasted power. We also have a broad offering in LDOs and linear regulators. Diodes Incorporated is currently developing LDOs that enable very low power supply, high PSR, and extremely low noise capabilities. These features, especially when packed into the miniature package types we specialize in, are required by powerdemanding applications such as cell phones and mobile devices. Our DC-DC converters support increasingly lower output voltages with higher load currents and demanding fast response times to dynamic loads. We offer step-up and step-down DC-DC converters optimized for typical supply

voltages of 5V, 9V, and 12V. These support high-current, high-switching frequencies and come as single and dual devices. We design DC-DC converters for portable applications, which allow for longer standby times and increased usable battery power. One of Diodes Incorporated’s key focuses moving forward is our AC-DC power supply component. We offer low standby power, costeffective, primary-side controllers that, when used in conjunction with Diodes’ MOSFETs and Super Barrier Rectifiers, are able to provide a robust, total power-charging solution. We are also actively engaged with industry leaders to provide increasingly popular quick-charging, or smart-charging, solutions. Additionally, a growing market for our AC-DC devices is the LED lighting market segment for residential and commercial buildings, as well as signs and signals.

“We offer low standby power, cost-effective, primary-side controllers that, when used in conjunction with Diodes’ MOSFETs and Super Barrier Rectifiers, are able to provide a robust, total power charging solution.”

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Power Developer

What advantage does Diodes have in driving efficiency upward?

“If you look at power efficiency innovations, we are really targeting two directions— thinner and smaller devices.”

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One of our main themes is a focus on green technology, especially from the packaging point of view—we aim to make devices smaller, thinner, and more efficient. If you look at power efficiency innovations, we are really targeting two directions—thinner and smaller devices. We are even getting into what we call “chip-scale” packaging. For our power management product line, we strive to have our footprint be half the height and half the dimension of previous packages, while improving the efficiency by 50 percent. We really focus on packaging to give customers better power output while reducing component count and saving space.

Could you talk about the BCD process, and why it is advantageous to your innovation? BCD stands for “Bipolar CMOSDMOS.” This process combines the CMOS and DMOS processes into one. The bipolar aspect is good for power efficiency because it allows more power to be delivered to the application. Without a driver, you need a big transistor in the back end. CMOS is traditionally low voltage and therefore, not much power is needed. A logic gate is needed to get the signal in. In addition, the driving capability is needed to drive outside loads. By using the BCD process, there is a bipolar portion of the circuit that provides better driving capability.


COVER INTERVIEW Could you please describe the corporate environment at Diodes? Diodes Incorporated’s corporate environment is ultimately driven by the needs of our dynamic, global customer base. We embrace market intelligence, we learn from the customer, and we recognize that our customers’ timely demand for new products and technology is ever changing. Time-to-market is critical to our customers’ success, so a speedy response to their needs is successful to ours. As a result, we nurture a corporate culture that stays focused on and is responsive to customer requirements. Diodes’ aggressive approach to meeting and exceeding customer demands has resulted in 23 consecutive years of profitable growth. As Diodes continues to expand and grow operations, it is imperative that we retain the agility and flexibility to respond quickly and efficiently to emerging market opportunities. We gear our corporate environment to remain

proactive and quick in our decision making at all times. At Diodes, we make our customers the number one priority. We have three types of customers, the first being the traditional customer that buys products from us. This type of customer cares about quality, support, and affordability. Our employees are our second type of customer—this is how we view them. We plan on keeping our employees long-term, and we treat them well. We provide a stability and commitment to them that is akin to how we treat our customers. The shareholders are our third type of customer. We share with them the vision of our company. From there, we make sure that we continue to grow and increase the company’s presence in the industry. Since we are a global company, we promote teamwork, integrity, and commitment for the collective vision of Diodes Incorporated.

“Our employees are our second type of customer— this is how we view them. We plan on keeping our employees long-term, and we treat them well.”

“We gear our corporate environment to remain proactive and quick in our decision making at all times.”

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Power Developer

Designing Embedded Applications for ULTRALOW-

POWER Part 1

By Sachin Gupta, Kannan Sadasivam, Cypress

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TECH ARTICLE

C

onsidering the importance of conservation, the portability of embedded systems is a key design consideration. Portable systems are generally battery-powered with battery life dependent upon the systems’ power consumption. These days, as part of “Go Green” initiatives, power consumption is a selection criterion even for wall-powered applications.

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ortable devices are commonly classified by whether they use rechargeable or nonrechargeable batteries. For applications that use nonrechargeable batteries, battery life is an absolutely critical specification requirement. In any application, the battery life is dependent on the following: • The amount of charge available in the battery being used • The average current consumption of the application Applications that use rechargeable batteries have another added parameter of how often and how long it takes to charge the battery. At the simplest level, the problem of battery life is either solved by increasing the battery capacity or by decreasing the average current consumption of the application. System designers can only increase battery capacity up to the point that the weight of the battery begins to adversely affect the system’s mechanical constraints or cost. While new developments in battery chemistry technologies are aimed at improving the charge density of batteries, the

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pressing need to decrease average power consumption continues to be a reality. The average power consumption of an application depends on the following: • The power consumption by individual circuit components • The power scheme of the application and how power is gated to different parts of the design • The way that individual components are designed to work in various operating modes Individual component power consumption is available from the device data sheet for each component. Knowledge of this individual power break up is important for good system design capable of optimizing lower power consumption.

“While new developments in battery chemistry technologies are aimed at improving the charge density of batteries, the pressing need to decrease average power consumption continues to be a reality.”


TECH ARTICLE Consider the example of a simple battery-powered pocket, digital clock. The purpose of this device is to keep time and display the current time when a key is pressed. The device would typically be in a power-down mode to conserve power and only wake to refresh the display when a key press is detected. Both the display and main circuitry would power down after a time out to conserve power. A high-level block diagram representation of this system is illustrated in Figure 1. The circuit has an RTC for time keeping and a main controller chip to communicate with the RTC and also manage the display interface. The entire system is generally in a power-down state where the display is off and the main controller is in a power-down mode where the current consumption is reduced to bare minimum by shutting down all peripherals. A key press is used as a trigger to awaken the device, fetch the RTC data, and display it on the display, typically an LCD. To analyze the power consumption of such a system, the first number to look for is the typical average current when the device and display are both in their power-down mode. For power consumption numbers, the data sheet for each of the peripherals and controller can be examined. To minimize total power consumption and achieve longer battery life, there should be a way to completely

“To minimize total power consumption and achieve longer battery life, there should be a way to completely shut down the power to all peripherals that are not in use.�

Figure 1. High-level block diagram of pocket digital clock

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Power Developer shut down the power to all peripherals that are not in use. In this application, such a peripheral would be the display. The RTC, in contrast, needs to be powered continuously to keep track of time. The MCU is generally a major contributor to the total power consumption of most systems. The same would be true in the case of this application as well if an appropriate MCU is not selected and used wisely. There are various ways to reduce the power consumption of the MCU, such as the following: • Reduce operating frequency • Run at a lower operating voltage • Utilize low-power operating modes MCUs support a range of operating frequencies at which they can run. However, the number of options can vary from device to device. The power consumption of an MCU is proportional to the operating frequency as the dynamic power consumption increases with frequency. Thus, the MCU should be run at the lowest possible frequency at which it can still reliably meet system requirements.

Frequency also comes into play around the clock source. Devices support various options for clock sources like an internal high-speed oscillator, an internal low-speed oscillator, and an external crystal oscillator. In most cases, an external crystal will provide higher accuracy but at the expense of higher power consumption. The choice of clock source from a low-power perspective is generally a trade-off of accuracy and speed. System requirements should be analyzed carefully to select the right clock source to ensure the right balance of system performance and power consumption. Most MCUs support low-power operating modes to facilitate low-power system design. Again, the number of modes supported and features in each mode vary from device to device. These lowpower modes should be used properly to reduce average power use. Common modes include: • Active mode in which the MCU is running normally • Lower-power mode in which the clock is gated to the MCU while the status of various registers and RAM is maintained

“System requirements should be analyzed carefully to select the right clock source to ensure the right balance of system performance and power consumption. “

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TECH ARTICLE “Today, SoCs are available that offer significant integration of complete systems or subsystem onto a single chip.”

• Lowest-power mode in which all peripherals, including the MCU, are powered-down When the clock is gated to the MCU, power consumption is the result of the static power consumption. Static power consumption is contributed by several factors, like subthreshold conditions and tunneling current in FETs. Also, tunneling current becomes dominant when the FETs are scaled down for compact chip design. Today, SoCs are available that offer significant integration of complete systems or subsystem onto a single chip. Beyond integration, when it comes to power consumption, these SoCs can help bring down the average power consumption to lower than what can be achieved using a stand-alone MCU and discrete peripherals.

Sachin Gupta has several years of experience in embedded solution development. He holds a bachelor’s degree in electronics and communications from Guru Gobind Singh Indraprastha University, Delhi.  He can be reached at sachin@embeddedroots.com.

Kannan Sadasivam is a Staff Applications Engineer with Cypress Semiconductor Corp. He has spent a considerable amount of his past career designing and integrating Satellite subsystems. He loves working on different types of analog circuits and applications. He can be reached at qvs@cypress.com

Part two of this three-part series, will discuss SoCs and how can they be more efficient in terms of designing systems to consume less power.

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Power Developer: June, 2014