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consumer electronics: Active Noise Cancellation wireless communications: Mobile Application Environments for Software Radio technology focus: High Efficiency Audio Designs for Portable Devices

June 2008

www.portabledesign.com

An RTC Group Publication

CEO Interview: Wally Rhines, Mentor Graphics

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www.linear.com/portsolutions

, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.

contents

More Light Absorbed

departments

editorial letter dave’s two cents industry news analysts’ pages product feature products for designers second opinion

cover feature

5 6 8 12 42 44 50

Wider CRA (Easier Zoom Tolerance)

Color Filter

Metal 2

Shorter Path for Light to Reach Sensor -Lower Stack Height(Lower Z-Heights)

Metal 1

No Metal to Block/Reflect Light

3000

Silicon

140000

1.75µm

120000

FSI Pixel

100000

Falk Alicke, Texas Instruments 2000

wireless communications

80000 1500 60000

Mobile Application Environments 1000 22

for Software Radio

40000

Jeffrey H. Reed, Virginia Tech 500

consumer electronics

0

2007

2008

2009

2010

Arvind Narayanan, Magma Design

technology focus

2012

0

2013

Thousands of Units

portable power Receiver

Unified Power Format to Simplify 34

Low-Power Design Flows

2011

Millions of U.S. Dollars

Active Noise Cancellation Comes to Mobile Phones 30iSuppli Corp. May 2008 Source:

David Monteith, Wolfson Microelectronics

20000

15 analysts’ pages

DISPLAY DRIVER

18 cover feature Handheld PLD Power Comparison

PLD Mode

Device Speed

SiliconBlue FPGAs* mW

SRAM FPGAs* mW

Other PLDs* mW

Operat’g

Active Fast Power (AFP)

~32 MHz

9

60-62

30-170

Stand-by

Active Slow Power (ASP)

32 KHz

.025

30-36

.044-.35

Static

0 MHz

42 product feature 0.15 15-36 .044-.35

Shutdown Sleep Freeze

Tough Recovery Design

Henry Kwok, Mode National Semiconductor Corporation

Wally Rhines 52 Mentor Graphics

Application Processor

Transmitter

High-Efficiency Audio Designs for Portable Devices Handheld 38

ceo interview

C

Worldwide Active-Matrix OLED Market Forecast (Millions of U.S. Dollars and Thousands More Metal Layers Available 9 industry news of Units)

High-Speed Video Bus Battle 2500 16 in Portable Designs Millons of U.S. Dollars

From FSI to BSI Light

Stand-by Rarely used by handsets

PowerDown

Recovery Time

No Need

15-36

.037-.35 MONTH 2008

team editorial team

Editorial Director Editor-in-Chief Managing Editor Copy Editor

Creative Director Art Director Graphic Designer Director of Web Development Web Developer

Intern

Warren Andrews, warrena@rtcgroup.com John Donovan, johnd@rtcgroup.com Marina Tringali, marinat@rtcgroup.com Rochelle Cohn

art and media team Jason Van Dorn, jasonv@rtcgroup.com Kirsten T. Wyatt, kirstenw@rtcgroup.com Christopher Saucier, chriss@rtcgroup.com Marke Hallowell, markeh@rtcgroup.com James Wagner, jamesw@rtcgroup.com Andrew Fuller, andrewf@rtcgroup.com

management team

Associate Publisher Product Marketing Manager Western Advertising Manager Western Advertising Manager Eastern Advertising Manager Eastern Advertising Manager

Circulation

Marina Tringali, marinat@rtcgroup.com Aaron Foellmi, aaronf@rtcgroup.com Stacy Gandre, stacyg@rtcgroup.com Lauren Trudeau, laurent@rtcgroup.com Nancy Vanderslice, nancyv@rtcgroup.com Todd Milroy, toddm@rtcgroup.com Shannon McNichols, shannonm@rtcgroup.com

executive management

Chief Executive Officer Vice President Vice President of Finance Director of Corporate Marketing Director of Art and Media

John Reardon, johnr@rtcgroup.com Cindy Hickson, cindyh@rtcgroup.com Cindy Muir, cindym@rtcgroup.com Aaron Foellmi, aaronf@rtcgroup.com Jason Van Dorn, jasonv@rtcgroup.com

portable design advisory council Ravi Ambatipudi, National Semiconductor Doug Grant, Analog Devices, Inc. Dave Heacock, Texas Instruments Kazuyoshi Yamada, NEC America

corporate office The RTC Group 905 Calle Amanecer, Suite 250 San Clemente, CA 92673 Phone 949.226.2000 Fax 949.226.2050 www.rtcgroup.com For reprints contact: Marina Tringali, marinat@rtcgroup.com.

Published by the RTC Group. Copyright 2008, the RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of the RTC Group.

All other brand and product names are the property of their holders. Periodicals postage at San Clemente, CA 92673 and at additional mailing offices. Postmaster: send changes of address to: Portable Design, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673. Portable Design(ISSN 1086-1300) is published monthly by RTC Group 905 Calle Amanecer, Suite 250, San Clemente, CA 92673. Telephone 949-226-2000; 949-226-2050; Web Address www.rtcgroup.com.

PORTABLE DESIGN

Austin_01.indd 1

6/3/08 4:59:02 PM

editorial letter

W

When engineers talk about I/O they’re generally referring to data throughput, power, pinout, etc. But since the ultimate source of input—and consumer of output—is humans, considering how to deal with them shouldn’t be an afterthought.

Tell the truth: isn’t it a bit humorous—possibly even a little painful—to watch a 200-lb. man trying to answer his email on his handheld wireless messaging device by typing with his thumbs? It wasn’t enough that computers forced a generation of adults to learn to type in order to escape becoming techno-relics. Now we have to type with our thumbs?

Interacting with digital devices has always been a stretch for humans—OK, except maybe for Unix programmers, who can so relate. Humans remain stubbornly analog, and their input devices—mainly fingers and now thumbs—are the main limiting factor in designing interactive electronic systems. Today you could make a cell phone the size of a credit card, but no one could use it. Ergonomics may be the last frontier for electronics, but it’s a tough one.

The keyboard remains our main input device. The QWERTY keyboard was patented in 1878 by C. L. Sholes, who built the prototypes of the first commercial typewriter in a Milwaukee machine shop in the 1860s. The first keyboards were alphabetical, and the first machines were clunky. If you pressed two characters in rapid succession, the keys would lock up. Sholes solved this problem by making sure that the most common combinations required two hands to input. He created an illogical input device to accommodate the needs of the machine.

In the 1960s, Xerox PARC did pioneering work on graphical input systems, inventing the graphical user interface (GUI) and the mouse, which were a huge step forward over typing arcane commands into a computer (Unix programmers notwithstanding). Add touch screens, and you have the main input systems we still use today.

But these human-interface devices (HIDs) are being stretched as portable products get both smaller and more interactive. You can’t really type on a keyboard that’s only a few inches wide—at least I can’t. I’ve tried in vain to write with a script shorthand on the screen of my PDA, but the error rate is too high. The fallback is a “soft keyboard” on the touch screen on which you “type” with a stylus. Workable, if neither fast nor elegant.

Apple created a huge stir with the sexy graphical user interface (GUI) for its iPhone.

Now you can select applications and functions at the touch of a finger. On an iPhone you can do almost everything you can do on a computer without the need for a mouse or keyboard—everything except type, that is. If you want to do email, get a BlackBerry.

How Do You Talk to Your Phone? john donovan, editor-in-chief

Star Trek may once again point the way forward. I’m thinking of the episode in which the crew of the Enterprise goes back to a time when Earthlings still used classic Apple McIntosh computers. Scotty picks up the mouse, holds it in front of his mouth, stares at the screen and says, “Computer?”

Voice recognition systems have made great strides in the last several years. When properly trained to a person’s voice, they can give the user complete control over complex electronic systems. Most people can talk an order of magnitude faster than they can type. While not useful for all applications, voice recognition systems work well to control computers, toys and a potentially wide range of embedded systems.

I’ve been using Dragon Naturally Speaking 9.0 for the past several months to transcribe recorded interviews. I listen to the recording on headphones while parroting the speaker’s words into the microphone. With a second pass for editing the output—generally quite easy—I’m there. This month’s CEO Interview with Wally Rhines was transcribed this way—a good trick, since it’s hard to talk as fast as Wally! It would have taken many hours of work without voice recognition.

The computational requirements for voice recognition are no longer daunting for portable devices; at worst you’d need to throw a small ARM(-9) coprocessor at it. Voice recognition would go the final mile in the search for the perfect human interface device.

JUNE 2008

dave’s two cents

I

“It’s tough getting older” may be a cliché, but it is true. However, I think it is still better than the alternative. One aspect of getting older is that all those things around you get older too. I had to replace one of those things recently.

My cell phone made it just over four years.

The main problem was the battery; it just could not keep up any longer. So in its retirement it now resides with my teenage daughter. Her less than one-year-old cell phone had become partially disabled. This happened when she decided to put it on the floor in her school cafeteria so

dave’s two cents on...

Simple to Use Is Simple to Start

it would not get knocked off the lunch table. I guess it is just not that common for the other students to watch out for cell phones on the floor. Her device lived through the trauma, but now can only provide regular phone service.

However today, regular phone service does not make it over the bar for teenagers. They must have “texting” and photo exchange, and her phone no longer had a display.

When I gave her my old phone, she asked how old it was. I said about four years, which she asked me to translate into “people years.”

When I threw out 50, she said it seemed more like 60. The old phone does not have features like Bluetooth and a camera, but it certainly performed the phone function well. She commented that it was crazy to be able to receive pictures, but not be able to take them. I told her the color display was really meant for personalization.

At least she didn’t start down the path toward, “Why does your new phone have so many non-phone features?” The new phone is definitely feature-rich. The wealth of capabilities motivated me to enable, configure, validate

PORTABLE DESIGN

and just plain play with them all. As a result, I spent most of the weekend getting to know my new travel companion, much to the chagrin of my wife.

I was really surprised at how easy it was to configure the Wi-Fi. The configuration got right to the point. It found the home network, asked the security key, and that was that. It seems this same function on my notebook lets a multitude of options get in the way of getting the job done. Bluetooth was the same easy “find-it, select-it, use-it” method. The only real problem was that the old phone contact list had become corrupted. Yet there was no evidence of this from scrolling through the list. The IR link detected and connected fine. But after a minute of attempting to transfer data it just gave up and let me know that it couldn’t complete the transfer. Yes, I had to transfer the data the old fashioned way—wasting valuable play time! I could have tried to use the PC transfer cable, but that meant having to ask my wife one more time where she hid it. After her response to the third time I asked, I decided I did want to grow older.

I was very satisfied by how many features you could get in a relatively small cell phone.

It’s amazing how the concept that a phone is supposed to be simple was maintained in all the aspects of the phone setup. For my two cents, there are quite a few portable applications like notebooks, cameras and GPS that should be simple to use. So they need to be simple to configure and set up. Most consumers correlate usability based on the level of difficulty encountered when getting started. It’s all about play time, and configuring is not part of play! For now, I am going to look for more applications for my new phone because there is a weekend coming up. Of course, I need to make sure it looks likes work—at least to my wife.

¥ !CTEL #ORPORATION !LL RIGHTS RESERVED 3PARTAN AND #OOL2UNNER ARE REGISTERED TRADEMARKS OF 8ILINX )NC #YCLONE AND -!8 ARE REGISTERED TRADEMARKS OF !LTERA #ORPORATION

7(!4 $/ 7% (!6% 4/ $/ $2!7 9/5 ! 0)#452% /NLY !CTEL GETS YOU THIS CLOSE TO ZERO !NY OTHER CLAIMS OF LOW POWER SUPERIORITY ARE JUST THAT !CCORDING TO THEIR OWN DATA !LTERA AND 8ILINX USE BETWEEN AND TIMES THE POWER OF !CTEL )',// &0'!S DEPENDING ON DEVICE AND MODE 7ANT SPECIFICS 6ISIT US TO GET THE WHOLE PICTURE INCLUDING A VIDEO OF ACTUAL MEASUREMENTS

MORE PROOF AND PICTURES AT ACTEL COM POWER

news Ziebart Out at Infineon

To no one’s surprise, the CEO and President of Infineon Technologies AG, Dr. Wolfgang Ziebart, has resigned positions with the company “due to different opinions on the future strategic orientation of the company.” Infineon not only ousted Ziebart, it scrapped the office of CEO. Peter Bauer, Member of the Management Board, Ziebart’s replacement, is officially “Spokesman of the Management Board.” This sounds like “management by committee,” the only idea worse than matrix management.

During his term of office, Ziebart strategically re-positioned the company and spun out Infineon’s memory business to form Qimonda, which was listed at the NYSE in August 2006.

Operative results of the core business improved considerably during this period. Last year, In-

nd

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

ed

fineon got back into the top ten semiconductor companies due to its superior growth.

That was then, this is now. Infineon has struggled unsuccessfully to reinvent itself, a problem reflected in its stock price. Qimonda, companies providing solutions now forthe itslatest part,datasheet was born a down market, which exploration into products, technologies and companies. Whether your goal is to research frominto a company, mp to a company's technical page, the goal of Get Connected is to put you in touch withonly the right resource.

Whichever level of still owns a has gotten worse.

Infineon gy, Get Connected will help you connect with the companies and products you aremajority searching for. stake in loss-making Qimonda, which onnected to date no one wants to buy. Ziebart’s removal was predictable, but the lack of a strong replacement doesn’t augur well for Infineon’s future.

There has been much talk about Infineon merging with another European partner, but neither NXP nor STMicroelectronics have expressed interest. Carlo Bozotti of STMicro specifically said he isn’t inclined to buy Infineon’s wireless business unit. A joint venture with NXP or Freescale might make Get Connected with companies mentioned in this article. sense; both companies would benefit from www.portabledesign.com/getconnected Infineon’s wireless technologies, which have

End of Article

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Get Connected with companies mentioned in this article.

earned them high marks in the mobile handset market.

Stay tuned for more exciting developments—and be glad you’re just a spectator.

by John Donovan – Editor-in-Chief Infineon Technologies North America Corp. Milpitas, CA. (866) 951-9519. [www.infineon.com].

Xilinx Layoffs

When you get a new CEO, things change. In January, Xilinx named Moshe Gavrielov president and CEO, replacing Wim Roelandts, who remains as chairman of the board. Gavrielov took a look at Xilinx’s organizational structure—as well as arch-rival Altera’s recent excellent performance—and decided there was a better way to do things.

Xilinx has announced a corporate reorganization into functional areas “to better serve its customers and improve its operating performance.” As a result of the reorganization, Xilinx will eliminate approximately 250 positions, or about 7 percent of the company’s global workforce. The workforce reduction is expected to be completed by the end of the next fiscal quarter. This has to be a shock to Xilinx employees—those laid off in particular—since Xilinx has long been famous in Silicon Valley for not laying off anyone even in the face of

serious downturns such as the Tech Crash of 2000-2003. A high percentage of Xilinx employees are “Xilinx babies” who have never worked anywhere else.

Xilinx expects to record restructuring-related charges of approximately $18-22 million in connection with the reorganization. These one-time pre-tax charges are comprised of approximately $16-19 million of severance pay expenses, which will be recorded in the first

quarter of fiscal 2009, and approximately $2-3 million of facility and other associated costs, a portion of which will be recorded in the second quarter of fiscal 2009.

by John Donovan – Editor-in-Chief Xilinx, San Jose, CA. (408) 559-7778. [www.xilinx.com].

Backside Illumination Demonstrated for CMOS Image Sensors

OmniVision Technologies, Inc. has launched its OmniBSI architecture, a novel sensor design that adopts a radically different approach to traditional CMOS image sensor technology.

BSI methodology involves turning the camera chip sensor upside down so that it collects light

through what was previously the backside of the sensor, the silicon substrate. This approach differs from conventional front-side illumination (FSI) image sensors, where the amount of light reaching the photo-sensitive area is limited, in part, by the multiple metal and dielectric layers required to enable the sensor to convert photons into electrons. The FSI approach can block or deflect light from reaching the pixel, ultimately reducing the fill factor and causing additional problems, such as cross talk, between pixels.

BSI reverses the arrangement of layers so that the metal and dielectric layers reside below the sensor array, providing the most direct path for light to travel into the pixel. This novel approach optimizes light absorption, enabling OmniVision to build a 1.4 micron BSI pixel that surpasses all the performance metrics of 1.4 micron, and even most 1.75 micron, FSI pixels.

From FSI to BSI Light

Light

More Light Absorbed

Color Filter

Wider CRA (Easier Zoom Tolerance)

Metal 2

Shorter Path for Light to Reach Sensor -Lower Stack Height(Lower Z-Heights)

Metal 1

No Metal to Block/Reflect Light

Color Filter Silicon

Metal 1 Metal 2

More Metal Layers Available Silicon

Metal 3 Metal 4

1.75µm

1.4µm

FSI Pixel

BSI Pixel

OmniBSI architecture delivers a number of performance improvements over FSI, including increased sensitivity per unit area, improved quantum efficiency and reduced cross talk and photo response non-uniformity, which all lead to significant improvements in image quality. Since light directly strikes the silicon, the fill factor of the image sensor is significantly improved so as to deliver best-in-class low-light sensitivity. A much higher chief ray angle enables shorter lens heights, which in turn allows for thinner camera modules, which are ideal for use in the next generation of ultra-thin mobile phones. Finally, BSI technology affords a much larger aperture size, which allows for lower f stops facilitating the development of better performing camera modules with superior camera performance.

In an interview with Portable Design, Michael Hepp, product marketing manager in OmniVision’s Camera Technology Group, claimed that while BSI technology has been an active research area for over 20 years, OmniVision is the first company to bring it to the consumer electronics market. OmniVision developed OmniBSI architecture with the support of its long-time foundry and process technology partner TSMC, using TSMC’s older 1.4 micron CMOS fabs and technologies, which provides a cost advantage over other firms pursuing 65nm designs. Also, according to Hepp, because BSI allows for more than three layers of metal, it achieves significant manufacturing benefits without moving to smaller process nodes. This means routing can be simplified and die sizes can be smaller than in FSI sensors, without the need to move to smaller process nodes with all their associated complexities and additional costs. Hepp says the company “has a roadmap to 90nm,” which should be a well-amortized mainstream process by that point.

OmniVision is currently demonstrating an 8 MegaPixel, OmniBSI CameraChip sensor, and expects to start sampling first products before the end of June.

OmniVision Technologies Inc., Sunnyvale, CA. (408) 542-3000. [www.ovt.com].

JUNE 2008

news WSTS Projects 4.7 Percent Global Semiconductor Growth in 2008 and 5.8 Percent in 2009

The global semiconductor market is expected to grow 4.7 percent on an annualized basis to $267.7 billion in 2008, according to the spring 2008 forecast of the World Semiconductor Trade Statistics (WSTS). Projected growth in the worldwide semiconductor market will increase from 3.2 percent growth in 2007. The current projections have however been reduced by 4.4 percentage points compared to the forecast that WSTS issued in November last year, mainly due to a weak 4th quarter 2007. However no need was seen to revise the future market development scenario significantly, so that the further years 2009 and 2010 remained very close to the original projections with 5.8 and 8.8 percent growth respectively.

“The WSTS foresees a continuously growing demand for electronic products

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Spring 2008

ed

Amounts in US$M 2009

2010

Americas

42,336

43,151

45,559

49,612

-5.7

1.9

5.6

8.9

Europe

40,971

42,225

44,157

47,308

2.7

3.1

4.6

7.1

48,845

52,456

54,328

58,203

5.2

7.4

3.6

7.1

123,492

129,864

139,196

153,059

6.0

5.2

7.2

10.0

Total World - $M

255,645

267,696

283,239

308,182

3.2

4.7

5.8

8.8

17,761

18,254

19,582

1.3

5.7

2.8

7.3

15,901

17,551

19,079

21,134

-2.3

10.4

8.7

10.8

5,126

5,066

5,430

5,834

-4.0

-1.2

7.2

7.4

Integrated Circuits

217,810

227,317

240,476

261,632

4.0

4.4

5.8

8.8

Analog

36,453

37,140

38,914

42,212

-1.3

1.9

4.8

8.5

Micro

56,211

59,241

63,439

68,014

4.2

5.4

7.1

7.2

Logic

67,292

76,285

78,178

83,139

11.9

13.4

2.5

6.3

Memory

57,854

54,651

59,946

68,267

-1.1

-5.5

9.7

13.9

Total Products - $M

255,645

267,696

283,239

308,182

3.2

4.7

5.8

8.8

Sensors

Get Connected

with companies mentioned in this article. www.portabledesign.com/getconnected

10

2007 2008 2009 2010

Asia Pacific

Optoelectronics

End of Article

Year on Year Growth in %

2008

exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, Discrete mp to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of Semiconductors 16,809 gy, Get Connected will help you connect with the companies and products you are searching for.

onnected

World Semiconductor Trade Statistics Inc., San Jose, CA. (408) 559-3592. [www.wsts.org].

2007

Japan

companies providing solutions now

such as PCs, digital consumer appliances, mobile communications, and last but not least, automotive electronics, enhanced by the increase of semiconductor content per installed system.” said Dr. Ulrich Schaefer, worldwide chairman of WSTS. He continued, “These trends are expected to unfold in a challenging, yet generally healthy world economy.”

The current forecast anticipates a positive growth throughout the forecasting period, peaking in 2010. While the forecasted semiconductor market does not show a pronounced cyclical pattern, some product groups maintain cycles similar to historical patterns. In the long run, the Asia Pacific region continues to be the fastest growing geographical area, due to the dynamics of both strongly rising domestic demand and the continuing manufacturing shift to this region.

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Intel and Micron First to Deliver Sub-40 Nanometer NAND Flash Memory Device

Intel Corporation and Micron Technology, Inc. have introduced the industry’s first sub-40 nanometer (nm) NAND memory device, unveiling a 34nm 32 Gbit multi-level cell chip.

This process technology was jointly developed

by Intel and Micron and manufactured by the companies’ NAND flash joint venture, IM

Flash Technologies (IMFT). It is the smallest NAND process geometry on the market. The 32 Gbit NAND chip is the only monolithic device at this density that fits into a standard 48lead thin small-outline package (TSOP), providing a cost-effective path to higher densities in existing applications. Shipments of customer samples begin in June and mass production is expected during the second half of this calendar year.

“This new 32 Gbit device provides the best bit storage density available in the industry,” said Brian Shirley, vice president of Micron’s Memory Group. “Together with our partners at Intel, we’re proud to have now taken the lead in production process technology.”

“The introduction of 34nm process technology highlights IMFT’s rapid progress and moves us to the forefront of NAND process technology,” said Pete Hazen, director of marketing, Intel NAND Products Group. “These advancements will expand the value proposition and accelerate the adoption of solid-state drive (SSD) solutions in computing platforms.”

The 34nm 32 Gbit chips will be manufactured on 300 millimeter wafers, each producing approximately 1.6 terabytes of NAND.

Measuring just 172 mm², less than the size of a thumbnail, the 34nm 32 Gbit chip will costeffectively enable high-density solid-state storage in small form factor applications.

• A single 32 Gbit chip could store more than 2,000 high-resolution digital photos or hold up to 1,000 songs on a personal music player.

• Two 8-die stacked packages would realize 64 Gbytes of storage, enough for recording anywhere from eight to 40 hours of highdefinition video in a digital camcorder.

The 34nm 32 Gbit chip was designed with solid-state drives in mind. The product will enable more cost-effective SSDs, instantly doubling the current storage volume of these devices and driving capacities to beyond 256 Gbytes in today’s standard, smaller 1.8-inch form factor. SSDs are becoming the new storage medium for notebook computers, providing lower power, faster boot-up time, increased reliability, improved performance and reduced noise than hard disk drives. With the innovations in NAND process technology, such as with the 34nm NAND process, SSDs now offer a significant range of capacities to meet market requirements.

Based on the 34nm architecture, Intel and Micron also plan to introduce lower density multi-level cell products including single-level cell products, by the end of this calendar year.

Intel Corporation, Santa Clara, CA. (408) 7658080. [www.intel.com].

Micron Technology Inc., Boise, ID. (208) 3684000. [www.micron.com].

Tensilica and SPIRIT DSP Form Strategic Partnership

SPIRIT DSP and Tensilica have formed a strategic partnership and can now deliver 18 optimized, high-quality digital audio and voice software packages that run on Tensilica’s HiFi 2 Audio Engine.

Immediately available, SPIRIT audio software packages include: AAC-LC decode and encode, aacPlus v1 and v2 decode and encode,

BSAC decode, MP3 decode and encode, Ogg Vorbis decode, and WMA decode and encode.

Voice codecs include AMR-NB (narrowband), AMR-WB and G.729AB. In addition, under the strategic partnership, the two companies will work on porting the full SPIRIT Audio and wideband Voice Engines to Tensilica’s HiFi 2 platform.

The SPIRIT Voice Engine brings high-quality real-time wideband voice and video to nextgeneration VoIP equipment, such as Mobile Internet Devices (MIDs), Video IP-phones, video conferencing terminals, IP set-top boxes, residential gateways and multimedia terminal adapters. Spirit’s Audio Engine is a popular,

easy-to-integrate high-quality player/recorder solution for both mobile/portable audio and professional appliances. The SPIRIT Audio Engine is a comprehensive software solution supporting all popular music formats along with audio performance functions such as a parametric equalizer, loudness control and channel mixing.

As part of the strategic partnership, SPIRIT has joined Tensilica’s Xtensions Network of partners. Tensilica’s HiFi 2 Audio Engine is a fully programmable processor core optimized for audio and voice applications, with a library of over 30 of the most popular audio software packages. Built on the full featured Xtensa 32-bit RISC CPU architecture, it can also run operating systems, control code and other functions.

Tensilica Inc., Santa Clara, CA. (408) 986-8000. [www.tensilica.com] .

JUNE 2008

11

analysts’ pages Wireless Semiconductors Outgrow Overall Chip Market in 2007

Riding the momentum of continued strong demand growth for mobile handsets, sales of semiconductors for wireless products rose at a faster pace than the overall chip market in 2007, according to iSuppli Corp.

The global wireless semiconductor market generated $29.5 billion in revenue in 2007, up 7.6 percent from $27.4 billion in 2006. These figures consist of revenue from sales of application-specific semiconductors—excluding memory—for wireless applications, including mobile handsets, wireless infrastructure equipment, wireless LANs and connectivity products. In contrast, the global market for all kinds of semiconductors grew by only 3.3 percent during the same period.

Worldwide mobile handset shipments amounted to 1.15 billion units in 2007, rising by a robust 16.1 percent from 990 million in 2006. This helped keep the wireless semiconductor market on a high growth track in 2007, with six of the Top-10 suppliers achieving double-digit increases in revenue for the year.

nd

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Qualcomm the Undisputed Leader

“iSuppli in mid-2007 reported that Qualcomm Inc. had usurped Texas Instruments Inc. as the world’s leading supplier of semiconductors for wireless applications during the initial three months of 2007, the first time this had occurred on a quarterly basis,” said Francis Sideco, senior analyst, Wireless Communications for iSuppli. “Qualcomm held onto the lead for the entire year of 2007.”

Qualcomm handily outgrew the overall wireless semiconductor market, with its revenue in this segment rising by 24.1 percent.

The company shrugged off its legal woes and benefitted from strong demand for its EvDO and WCDMA/HSPA chips. Company market share rose to 19.1 percent in 2007, up from 16.5 percent in 2006. Texas Instruments’ performance in 2007 was not as strong as Qualcomm’s, with the company’s share declining to 16.7 percent, down from 19.4 percent in 2006. Company revenue declined by 7.7 percent in 2007.

“Texas Instruments’ results were influenced by a confluence of events in 2007—

ed 2006 2007 Rank Rank

companies providing solutions now

Company Name

2

1

Qualcomm

1

2

Texas Instruments

exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, 5 right resource.

3 STMicroelectronics mp to a company's technical page, the goal of Get Connected is to put you in touch with the Whichever level of gy, Get Connected will help you connect with the companies and products you are searching 8 for. 4 Infineon Technologies

onnected

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3

5

NXP

11

6

MediaTek

7

7

4

8

6

9

RF Micro Devices

10

10

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PORTABLE DESIGN

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Percent Change

2006 Percent of Total

2007 Percent of Total

Cumulative Percent

24.1%

16.5%

19.1%

19.1%

-7.7%

19.4%

16.7%

35.7%

14.4%

4.8%

5.1%

40.8%

54.3%

3.3%

4.8%

45.6%

-7.6%

5.6%

4.8%

50.4%

81.2%

2.5%

4.2%

54.6%

Broadcom

15.8%

3.5%

3.7%

58.3%

Freescale Semiconductor

-19.2%

4.8%

3.6%

61.9%

0.1%

3.6%

3.4%

65.3%

20.2%

2.6%

2.9%

68.1%

Top 10 Companies

10.1%

66.6%

68.1%

All Others

2.7%

33.4%

31.9%

Total Semiconductor

7.6%

100.0%

100.0%

CSR

especially occurrences in the market for high-end 3G semiconductors,” Sideco said.

“The year 2007 brought a market slowdown in Western Europe, where Texas Instruments’ customers have a large presence. This, combined with Ericsson Mobile Platform’s (EMP’s) rising use of STMicroelectronics parts in some of its 3G digital baseband platforms, conspired to diminish Texas Instruments’ market share in 2007,” Sideco said.

STMicroelectronics surged to the No.-3 ranking in 2007, up from fifth in 2006, due to a 14.4 percent rise in revenue. The company’s strong performance was due in part to the previously mentioned usage of its 3G digital baseband chips by EMP. Infineon posted an impressive 54.3 percent increase in revenue, allowing it to move to No. 4 in 2007, up from No. 8 in 2006.

Consolidation Pros and Cons

iSuppli’s 2007 rankings illustrate the consolidation of market demand among the top semiconductor suppliers. The wireless semiconductor market is structuring itself to match the concentration of market share among the Top-5 mobile handset OEMs. “Scale is sine qua non to compete in today’s wireless semiconductor market,” Sideco said.

“Chip suppliers need at least $1 billion in revenue to even sit at the wireless table. However, scale goes beyond revenue and extends into having sufficient resources to support a broad and cutting-edge product portfolio, which must include single chip and reference platform solutions.”

Wireless semiconductor suppliers with annual revenue greater than $1 billion increased their collective share of the market to 62 percent in 2007, up from 51 percent in 2006. Sideco projects this trend will continue in 2008. iSuppli Corporation, El Segundo, CA. (310) 524-4000. [www.isuppli.com].

Smartphones: The Clear Choice over Mobile Internet Devices in U.S.

As categories of mobile devices converge, there are four primary types of productivity tools—the ultra-mobile PC (UMPC), the mobile Internet device (MID), smartphones and smartphones with mobile companions, reports In-Stat. The clear winner in an In-Stat survey of U.S. consumers is the smartphone, either alone or with a mobile companion, the high-tech market research firm says. Nearly half of the respondents chose the benefits and capabilities associated with smartphones. Fewer than 10% indicated a preference for the capabilities of MIDs. “Helping the smartphone’s chances for success are the established and successful channels of distribution and the fact that the actual pricing of this solution is somewhat less than end-user expectations,” said Bill Hughes, In-Stat analyst. “That smartphones are established as a valuable solution today makes the sales process easier than for the other mobile device options.”

Recent research by In-Stat found the following: • Mobile companions for smartphones are also popular, but users have unrealistically low expectations for pricing.

• About one-quarter of users like the idea of the ultra-mobile PC, as long as it does not involve sacrificing the capabilities of a fullfunction laptop.

• Those showing an interest in MIDs were unclear about how they would use these devices or where to buy them.

• The main objection for non-users of mobile data technology in general, and smartphones in particular, is that users are skeptical of the benefits of mobile data and view it as a “luxury.” At the same time, they tend to overestimate the actual cost of smartphones.

• Many employees expect to purchase these devices for themselves, rather than their employer supply these productivity tools.

In-Stat, Scottsdale, AZ. (480) 483-4440. [www.in-stat.com].

SuperSpeed USB Announcement Shakes Up USB Market

2008 will mark the first year in which shipments of high-speed USB devices will surpass shipments of low- and full-speed USB-enabled devices, reports In-Stat. But the most significant development over the past year in the USB market has been the announcement of SuperSpeed USB, the third major revision of the wired USB specification, the high-tech market research firm says. SuperSpeed is expected to deliver actual throughput of 3 Gbits/s, a rate significantly higher than that of high-speed USB. “SuperSpeed USB is expected to begin shipping as discrete silicon in 2009, and broad deployment of SuperSpeed USB-enabled products is expected in 2010,” said Brian O’Rourke, In-Stat analyst. “SuperSpeed USB will be targeted initially at the PC market and in devices requiring high rates and volumes of data transfer, such as external storage, CE and communications devices with increasing amounts of storage.”

Recent research by In-Stat found the following: • More than 2.6 billion USB-enabled devices shipped in 2007.

• Annual shipment growth of USB-enabled devices through 2012 will be 8.3%.

In-Stat, Scottsdale, AZ. (480) 483-4440. [www.in-stat.com].

Nearly 2.4 Billion Units of Bluetooth-Enabled Equipment to Ship in 2013

A new study from ABI Research forecasts that close to 2.4 billion units of Bluetooth-enabled equipment are expected to ship worldwide in 2013. Of these, more than half will be cellular handsets; adding the accompanying headsets brings that figure to more than 75% of the total market.

Notebook computers and portable music devices will run a distant second and third, JUNE 2008

13

analysts’ pages although the compound annual growth rate for the latter is by far the greatest of any product class.

Bluetooth is showing up everywhere; in addition to the products just mentioned, it can be found in PDAs, desktop PCs, Human Interface Devices (e.g. keyboards and mice), printers, automotive products, addin cards and dongles, digital cameras and medical products. That ubiquity opens up new opportunities: “Integration is a key trend in Bluetooth markets,” says ABI Re-

generations of the three leading game consoles/remote controls.

McEuen adds, “The big Bluetooth IC vendors—CSR, Broadcom and Texas Instruments—remain the market leaders. And as they see OEMs moving to develop Bluetooth into a more capable solution, they are meeting that demand.”

ABI Research, Oyster Bay, NY. (516) 624-2500. [www.abiresearch.com].

Linux Framework Wars Down to Two Parties

nd

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

ed

search senior analyst Douglas McEuen.

“Designers are saying ‘Bluetooth is in everything, so what can we add to the exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from else a company, mp to a company's technical page, the goal of Get Connected is to put you in touchBluetooth with the right resource. of chip?’ Whichever GPS islevel a popular candigy, Get Connected will help you connect with the companies and products you aredate, searching for. as is FM radio.” onnected Some forms of integration just add speed and range, such as the current development of “Bluetooth over 802.11.” It’s the same with ultrawideband: the Bluetooth SIG is working with the WiMedia Alliance to create a technology codenamed “Seattle,” which will also add UWB’s high speed capabilities to Bluetooth.

Gaming is another quite significant market for Bluetooth, although it is characterized by eccentric cycles of growth and conGet Connected with companies mentioned in this article. traction caused by the staggered 4-5 year

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The recent raft of announcements made by the LiMo Foundation and the Open Handset Alliance indicate that incumbent smartphone OS software vendors will soon face a serious challenge, deriving from two technically competent and coalesced Linux consortia. The LiMo foundation announcement of support from another major carrier in the form of Verizon, as well as the growing support for Android in the form of numerous global application developers coding innovative applications for the platform, categorically proves these are not a flash in the pan as many incumbents would have you believe.

ABI Research vice president and research director Stuart Carlaw states, “By 2013, we expect that Linux will take 23% of the smartphone market and will be the second most prevalent solution behind Symbian. And although LiMo and Android will take the lion’s share of the market for Linux solutions, there will be opportunities for solutions such as Maemo that will be facilitated by the encroachment of the MID (Mobile Internet Device) form factor into the mobile devices landscape.”

In a recent report, ABI Research found that Nokia’s poor position in the Americas resulted in a 2007 share of only 4% for Symbian in the American smartphone market. It is imperative that Symbian looks to grow its share of the North American market by gaining more traction from other handset vendors that are performing well there. Otherwise, the company could face a situation whereby its leadership in

the European markets is challenged by a combination of a resurgent Windows and emerging Linux, while simultaneously being locked out of the North American market.

Worldwide Active-Matrix OLED Market Forecast

AM-OLED Shipments to Nearly Quadruple in 2008

The Society for Information Display (SID) 2008 International Symposium, Seminar and Exhibition served as a showcase for a display technology that has generated major buzz due to its vivid images and brilliant colors: Organic Light Emitting Diodes (OLEDs).

The OLED industry will be on a rapid growth path during the next few years, with worldwide panel revenue rising at a more than 36 percent Compound Annual Growth Rate (CAGR) from 2007 to 2013, according to iSuppli Corp. New bright and clear Active-Matrix OLEDs (AMOLEDs) will account for the majority of OLED panel market growth, with revenue rising by 86 percent during the same timeframe.

Spurred by the arrival of Sony Corp.’s compelling OLED television, global shipments of AM-OLED panels for applications including TVs, mobile handsets and PMP players will nearly quadruple in 2008, rising to 10.2 million units, up 294.2 percent from 2.6 million units in 2007. AM-OLED revenue in 2008 will rise by 237 percent to reach $225 million, up from $67 million in 2006. By 2013, global AM-OLED shipments and revenue will rise to 132.4 million units and $2.8 billion.

While the OLED industry is set for strong growth in 2008 and beyond, the business does face some supply-side and competitive challenges that could limit its expansion in the coming years.

“The key factors determining the success of OLED in the market will be the display industry’s capability to address key issues like manufacturing costs, material lifetime and efficiency,” said Vinita Jakhanwal, principal analyst for mobile displays at iSuppli Corp. “Furthermore, given that OLEDs are LCD replacements, the

Millons of U.S. Dollars

ABI Research, Oyster Bay, NY. (516) 624-2500. [www.abiresearch.com].

3000

140000

2500

120000 100000

2000

80000 1500 60000 1000

40000

500 0

Thousands of Units

(Millions of U.S. Dollars and Thousands of Units)

20000 2007

2008

2009

2010

Millions of U.S. Dollars

2011

2012

2013

0

Thousands of Units

Source: iSuppli Corp. May 2008

technology at least initially will be subjected to the price pressures placed on it by competing LCD panel products.”

Sony’s Impact

The positive response to Sony’s launch of an AM-OLED TV late last year has built momentum in the industry. While small, the Sony television’s display quality was superior to anything anyone had seen to date—and extremely flat. Now Sony is now expanding on its OLED portfolio with a 3.5-inch, 0.2mmthick panel that will be used in high-end mobile devices.

Liquid Crystal Display-Television (LCDTV) makers are introducing thinner models to compete with the flatter-than-flat OLEDs. Furthermore, other OLED products are making their way to market, including an OLED-based DVD Global Positioning System (GPS) device for car navigation from Grand View Technology Co. Ltd., Chi Mei El Corp., LG Displays and Maction Technologies Inc. SID 2008 also saw the presentation of more

information about the recent OLED technology alliance between DuPont and Dainippon Screen Manufacturing Co. Ltd., which will develop integrated coating and printing equipment for the fabrication of OLED displays.

DuPont showed a 4.3-inch, 300nit display using this solution. iSuppli Corporation, El Segundo, CA. (310) 524-4000. [www.isuppli.com].

JUNE 2008

15

cover feature high-speed buses

High-Speed Video Bus Battle in Portable Designs The parallel bus ruled the world in the past. Most of today’s video architectures still use low serialization density and keep the pixel clock in parallel with the data. That’s not going to work any more.

D

by Falk Alicke, Texas Instruments

During the 80s, I vividly remember my friend sketching his first computer graphic image of a Marlboro cigarette box on a Commodore 64 screen. Using his DOS operating system, he programmed a software routine that would output the color value and address of every pixel and pixel fields onto the CRT screen. It took hours to finish the red, black and white image. Amazing how far we’ve come! Today’s images are designed by graphical artists or laymen with no understanding of how to push a pixel to its destination. Display devices are not only known for great electronics, but also for their appealing aesthetic design and portability. Digital display technology has brought colorful images everywhere, currently pushing up to mindboggling 33 billion bits/sec through the video pipe in the living room. I for one am glad that the days of cigarette smoke and DOS images are over!

16

PORTABLE DESIGN

Video in Mobile Products – A Brief History of How We Got Here

The new world of personal computing became possible through the advances in digital processing. This pushed the need for fat data transfer pipelines. When CRT screens dominated projection technology, video data was mainly encoded into analog signals and transported in an impedance-controlled environment fairly well. Analog displays are no friend of portable electronics.

The true leap in bringing video into portable designs originated with the availability of liquid crystal displays. The analog video interface turned digital. For small screen resolutions, the CPU interface is the most common solution. It is simply a parallel data bus from the video source to the display and can be driven like a memory bus. A local frame buffer inside the display allows the use of fairly slow microprocessors.

The next generation of display technology brought color to the display, which demanded

Digital Signal Controllers Analog Serial EEPROMs

Microchip Technology’s new UNI/O serial EEPROM uses only ONE connection to the host microcontroller. This compares to two or three pins for I2C™ and three to six pins for Microwire or SPI buses. This new, flexible bus offers advanced features like a status register and write protection on demand, along with all I/O, data and command functions through a single pin.

Simplify designs & reduce system cost

t Free up pins on the MCU – Enhance your design by adding new features – Move to a smaller MCU = lower cost t Free up pins on your connector – Smaller connector = lower cost t Compact: Tiny packages and no pullup resistors

Optimized for embedded applications t t t t t

Software Write Protection ¼, ½, or full array Flexible data rate 10 - 100 kHz set by host 1-million E/W cycles, 200-year data retention Low standby current - 1 μA Real EEPROM, up to 125˚C

Device 11AA010 11LC010 11AA020 11LC020 11AA040 11LC040 11AA080 11LC080 11AA160 11LC160

Density Operating (bits) Voltage 1K 1.8-5.5V 1K 2.5-5.5V 2K 1.8-5.5V 2K 2.5-5.5V 4K 1.8-5.5V 4K 2.5-5.5V 8K 1.8-5.5V 8K 2.5-5.5V 16K 1.8-5.5V 16K 2.5-5.5V

www.microchip.com/UNIO

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Purchase the MPLAB® Starter Kit for Serial Memory Products (DV243003), which supports the UNI/O family of serial EEPROM and all other Microchip serial EEPROMs for $79.98 at www.microchipDIRECT.com.

Microchip Direct...

2nd line

The Microchip name and logo, the Microchip logo, dsPIC, MPLAB and PIC are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. UNI/O is a trademark of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks mentioned herein are property of their respective companies. © 2008, Microchip Technology Incorporated. All Rights Reserved.

Microcontrollers

NEW Single-wire EEPROM Family In a Tiny 3-lead Package!

cover feature

nd

an even faster data pipe. Combined with shrinking mobile phone designs, the display became an adaptable and attractive design component.

Fewer and faster wires were needed to connect the processor to a swivel display. At this point

DISPLAY DRIVER

figure 1

Receiver

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

ed Transmitter

Application Processor

a smartphone using a discrete serializer (TX) and de-serializer (RX) to reduce the amount companiesExample providing of solutions now of cabling across the hinge from 28 signals to only two differential data pairs.

exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, mp to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of gy, Get Connected will help you connect with the companies and products you are searching for.

onnected

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several companies introduced data serialization concepts to overcome the bottleneck. Among them are National Semiconductor’s MPL technology and Fairchild’s μSerdes technology. The basic concept is a discrete transmitter (serializer) located near the graphic source. A discrete receiver (de-serializer) is located near the display panel and often mounted directly on the flexible printed circuit (FPC) cable. The FPC connects the main computing board with the display panel. Target resolution for such a system is up to QVGA with color resolution not exceeding 16-bit/pixel.

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With advanced display technology, higher display resolution with more vivid colors became possible. Display resolution of two to six times that of QVGA, and up to 24-bits/pixel color resolution required again an increase in data throughput. The local display frame buffer at this point became so large and costly that the CPU interface was replaced with a RGB video interface already known in notebook PCs. However, standby and in-operation time of a mobile phone compared to a notebook needs to be much longer. This demands more power-efficient solutions than notebook technology provides.

To eliminate this bottleneck, Texas Instruments introduced FlatLink3G technology into its OMAP application processor platform. Standalone transmitter and receiver ICs were also released. The technology was developed with the support of various display driver and panel design houses. Other companies approached this problem in similar ways, such as Qualcomm with mobile display digital interface (MDDI) technology. Video Electronics Standards Association (VESA) later adopted MDDI. Maxim decided to pursue a stand-alone bridge solution reducing the number of cabling to one wire only with embedding clock into data. Existing serializer solutions with CPU interface started to also offer the RGB video interface.

Ultimately, mobile equipment designers want to see a path that provides for integrating the transmitter inside the graphic engine and the receiver inside the display (Figure 1).

Only a few solutions such as MDDI and FlatLink3G truly enable this integration. Several competing concepts use complicated analog design techniques (such as MPL). While they can reduce the power consumption, integration is very difficult into standard CMOS transmitter technology or high-voltage display driver technology.

With all these available technologies a new problem came into existence: how can a system designer select components from different manufacturers and interconnect them with each other? A solution that would bring together all these technologies was needed. To resolve this issue, the Mobile Industry Processor Interface (MIPI) alliance, including most leading companies in the mobile industry, developed the display serial interface (DSI). This technology interconnects the graphic engine to the display within mobile

cover feature figure 2 Camera

10-bit ADC

Serial to parallel

Digital preprocessing

Pixel array Buffer

Digital preprocessing

Ref clock

Parallel to serial

12C

Parallel to serial

Most camera and display interfaces transfer pixel data in the RGB format. Figure 2 shows the pixel data flow from a camera sensor to an application processor and from the processor to the display. The camera sensor outputs 10 bits of raw data per pixel. Each pixel contains the information of one color component only.

The video engine recovers the true 30-bit RGB color value of the pixel digitally using color information of adjacent pixels. In contrast, the display output path transfers all three color components for each pixel in parallel. The 24bit output value for each pixel represents 8-bit data for R, G and B color components.

Processor and ASIC vendors are constantly challenged to control the device pin-count. The pin reduction due to serial video interconnects is very attractive. Intel first replaced the GPU output parallel bus with DVO outputs, reducing the bus width by nearly 50 percent. Later Intel offered SDVO, a true serial interface with four differential lines only.

One significant bottleneck for the graphics industry is the display panel input. LVDS serializers with 7:1 data compression ratio are found today in nearly every large graphic panel (refer to TI’s FlatLink or National Semiconductor’s PanelLink). Notebook display panels come mainly with a color resolution of 18-bits per pixel. The data and additional three synchronization signals are transferred to the panel using three differential data lines and one clock line. Monitor and TV panels require 24-bits, 30-bits, and even up to 48-bits of color resolution per pixel. The same 7:1 LVDS serialization technology is often used. The number of LVDS channels increases from four differential pairs to five, six, or seven accordingly.

Serial to parallel

IT Products and Video

Display panels come in different color resolution (16-bits vs. 48-bits) as well as in different screen resolution (QVGA vs. FHD). Increased panel resolution translates into a faster pixel clock rate and demands more data throughput.

LVDS serializers reach the maximum transferable data rate at around 135 MHz pixel clock speed. To allow faster clock rates, the pixel transfer can be split into even and odd pixel data and is transferred through two parallel LVDS links.

The largest TVs today use up to 32 differential signal pairs, making a pixel clock frequency of up to 540 MHz possible. Dealing with such a large number of LVDS signals makes dealing with EMI very challenging. While clearly limited as a technology, the 7:1 LVDS serialization architecture is still extremely popular. The technology is available from multiple sources.

While 7:1 LVDS SERDES is used as an internal interface, digital visual interface (DVI) is the external box-to-box counterpart. Prior to serialization the data is encoded. The encoding scheme is transition minimized differential signaling (TMDS), a technology developed by Silicon Image. TMDS provides AC-balanced signaling and reduces EMI of data lines at the cost of increased clock rates. A third similar technology is the high-definition media interface (HDMI). HDMI expanded on the DVI concept by adding audio and data encryption

Parallel out

products. The technology integrates the advantages of both CPU and RGB video interface. DSI is very powerful through the use of data packetization. DSI facilitates integrating the transmitter inside the application processor and the DSI receiver into the display driver. However, discrete bridge solutions with DSI are only suboptimal.

A packet engine is costly and consumes additional power. Proprietary alternatives such as FlatLink3G have a competitive advantage here.

Additionally, no software is required.

10+2

Camera RGB input port

Display 8-bit DAC 8-bit DAC

Timing Control

8-bit DAC LCD driver

Gamma buffer

12C

24+3

LCD display driver (RGB) output port

Display pixel Buffer

Video Engine

Pixel data flow between a camera sensor, an application processor and the display.

JUNE 2008

19

Interface Standardized?

End of Article

20

Yes

No

No

No

No

Yes

Caution

Caution

Caution

No

Yes

Yes

Yes

No

Dual parallel RGB

Maxim 92xx series

µSerDes

Get Connected

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MPL

FlatLink3G

MIPI DSI (rev1b)

MDDI (rev1.1)

FlatLink PanelLink

dualLVDS

Quad LVDS

DVI(rev1.0)

HDMI(1.3)

with companies mentioned in this article.comparison of popular technologies found in a wide variety of portable products.

A side-by-side www.portabledesign.com/getconnected

DP1.1(rev1.1)

V-by_One(rev0.1)

No

Yes

Yes

Yes

Caution

Yes

Yes

Caution

Yes

Caution

No

No

No

Yes

Yes

Current

Yes

companies providing solutions now Availability

Parallel RGB

No

Caution

Yes

Yes

Caution

Yes

Best

Caution

Caution

Yes

Yes

Yes

Yes

Caution

Best

~1,200

~450

~340

165

540

270

135

~180

~130

65

26

26

20

~300

~148 ~30

~30

~24

0.47

0.88

1.6

64(se)

No

No

No

1516(se) 34(se)

Yes

22(se)

Caution

Caution

Caution

Caution

No

No

No

No

dna

dna

dna

dna

7

7

7

9.3

5.75

11.5

2-10(d)

1-5(d)

2-4(d)

2-4(se)

1-2(d)

1(d)

No

Best

No

Caution

Caution

No

Caution

Best

Yes

No

No

No

Caution

Caution

Caution

No

Caution

Caution

No

No

Yes

Yes

Yes

Yes

36

48

48

24 -48

30

30

30

18.5

14

6

3.5

0.7

1.4

2.8

1-32(d)

1-4(d)

4(d)

4-7(d)

24(d)

8-12(d)

4-6(d)

No

No

No

No

No

No

No

No

Best

Caution

Caution

No

No

No

Caution

Best

Yes

Yes

Yes

Yes

Yes

Yes

No

No

Caution

Yes

Yes

Yes

Interfaces found mainly in IT and TV designs (optimized for larger displays)

24

24

24

24

18

18

Yes

Yes

Yes

No

No

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

No

No

Caution

Interfaces found around mobile processor designs (optimized for smaller displays)

Highest Typical Pixel clk frequency(MHz) ~148

Maximum Pixel Color Resolution

Yes

Highest practical Data Compression Density

Caution

# Signals(single ended/ differential)

No

Support of Multiple Displays

0.72

Support of Long Transmission Lines?

~16

Bridge-Chip Friendly Technology?

~5

Easy to integrate into New Product Design

Best

IF Robustness (bit error Handling?)

Parallel Interfaces

Caution

Caution

No

No

No

No

No

Caution

Caution

Yes

Yes

Yes

Yes

Caution

Best

Best

Best

Power Consumption

DVO

onnected exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, mp to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of Multiple Supplier gy, Get Connected will help you connect with the companies and products you are searching for. of Technology?

Yes

ed Yes

Best

Caution

Caution

No

No

Caution

Yes

Yes

Yes

Yes

Yes

Yes

No

No

No

Caution

EMI

Yes

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products Thine’s website listed only two devices available with <40MHz and <28-bit color

Box-to-box video+audio IF PCs; best performance versatility

Box-to-box video+audio IF consumer products

Box-to-box video IF

Enhanced throughput for high-end TV panel

Enhanced throughput for panels WXGA++

Most common display IF>10” panels

Packetized Interface

Integrates video+CPU mode; handle multiple display

Lowest power of all 24-bit IF, no software required

Most effective power use for serialized IF+P10

Bi-directional capability

Data and clk use same differential line

High-data throughput; pin count very high (inefficient)

Most common processor video IF

Reduced Pin Count and clock frequency

Most Common IF; lowest power if space and EMI is a don’t care

Other Comments

Parallel CPU IF

nd

figure 3

cover feature

to the TMDS signals. LVDS serialization, DVI and HDMI have one major design drawback: the pixel clock signal is transmitted in parallel to the data. The receiver uses this clock signal for data recovery (DLL). This makes the setup and hold time budget of the link very critical and limits the maximum data rate even for a receiver with built-in deskew.

Serializer technology with the clock signal embedded into the data allows for the highest data transfer rate. THine’s V-by-One is a technology example here. Proprietary solutions, however, limit the adoption of the technology.

DisplayPort (DP) has emerged as the preferred display interconnect for the future in the PC industry. DP is an open technology combining historic lessons learned. The technology is highly scalable and utilizes 8B10B coding with data scrambling, SSC and inter-lane deskewing in addition to embedded clocking. DP offers a low-power high-throughput video interface with low EMI. DP adoption started last year with direct drive monitors and is currently starting to replace the LVDS display connection within the notebook.

In 2007 the consumer industry was caught by surprise with the success of the iPhone and by sky-rocking UltraMobilePC sales records.

Mobile processors are used to back up PC engines for their low power. Display panel makers currently develop solutions to reduce power through the use of dynamic backlighting and by advancing OLED displays. Mobile processors driving large and colorful notebook panels are becoming reality. This leaves the mobile processor designer with the difficult decision of choosing the right video interface(s). Demand for driving HDMI from a mobile phone is growing. The DSI, HDMI, LVDS SERDES and DP world start overlapping.

We now also see demand for video transport through optical and wireless links. The picture frame desires a wireless connection, and so does the super-flat LCD TV on the wall. Pushing compressed video through existing infrastructure using MPEG decoding is challenging, especially when film and video content is displayed on large TV screens. The parallel bus ruled the world in the past. Most of today’s video architectures still use low serialization density and keep the pixel clock in parallel with the data. We now start seeing a transition to fully optimized serial connections with clock embedded into the data. The amount of cabling is reduced further by using adaptive receiver equalization and transmit pre-emphasis techniques.

What’s Next?

We should not ignore the trend to full HD screens in the TV industry. People will want to share content from their personal devices on large screens with their friends. We are ill advised to believe 18-bits of color and QVGA resolution is “good enough” for portable, lower power products. We miss a trend if we ignore the late growth in 3D cinemas or the commercial availability of 3D DLP TVs. DreamWorks, for example, has plans to release all new films in 3D starting in 2009. 3D imaging requires twice the data throughput and a lot more advanced signal processing. Holographic techniques give us the chance to build image-projection eyeglasses that are lightweight and cool looking. Pocket image projection is becoming real right now! First demos prove up to 30-inch projection can be achieved powered by notebook batteries. Screen sizes this large demand more than VGA resolution.

Figure 3 gives a side-by-side comparison of popular technologies found in a wide variety of portable products. The list of technologies is not complete and more technologies may be available, but are not mentioned here. The author would like to apologize for any unintended error or misrepresentation of data in the technology comparison.

Conclusion

Many display interface technologies coexist today. Picking the right technology depends on specific product concerns. Most often the graphic engine output or display panel input will dictate the choice. If a bridge solution becomes necessary, look for a simple technology optimized for your application. Proprietary solutions for mobile processor are a great choice here due to low power, cost and design complexity. For product external interfaces consider HDMI due to its wide installation base and put DisplayPort on your “watch-for” list. DP technology is superior to HDMI but lacks the installation base today. Inside a box, DP is the best choice when throughput, low pin count and EMI really matter.

Many display interface technologies coexist today. Picking the right technology depends on specific product concerns.

About the Author

Falk Alicke is a Senior System Engineer with the Interface products group at Texas Instruments (www.ti.com/interface) where he is responsible for mobile camera and display SERDES, DisplayPort LCD timing controller and video link product definition. Alicke received his MSEE in telecommunications at the Technical University of Applied Sciences (HTWK) in Leipzig, Germany.

Texas Instruments Inc., Dallas, TX. (800) 336-5236. [www.ti.com].

JUNE 2008

21

wireless communications mobile environments for SDR

Mobile Application Environments for Software Radio SDR techniques are starting to appear in handsets, but complex issues regarding application environments and infrastructure need to be resolved before they become commonplace.

by Jeffrey H. Reed, Virginia Tech

T

Though the potential of object brokers in a distributed environment is great, object brokers have some limitations when applied to a dynamic system. From a software radio framework, an object broker provides the developer with an advanced mechanism to support changes to the system. However, an object broker falls short when supporting user-defined changes to the system because it requires the developer to create a software framework that allows the integration of new applications into the system without requiring the user to modify the system software. The solution to this shortcoming inherent to the application of object brokers to software radio is to create an application environment where it is easy and safe for users to add and remove applications from the system. Furthermore, a software radio can significantly and quickly change its configuration and capabilities as the software defining the radio changes.

22

PORTABLE DESIGN

Given the dynamic nature of the hardware, the suite of applications that a system contains at any one point may be inadequate for the new capabilities of the system. These aspects are important when deploying a reconfigurable system and, if managed improperly, require the developer to foresee all the application and hardware variations that the user may need during the lifetime of the system. Figure 1 illustrates this concept and depicts a system running a high-resolution videophone (a high-requirement application) in a high-noise environment, resulting in high system BER. To compensate, the system includes a strong FEC in the link, reducing the effective data rate of the system. The application, detecting that it no longer can support the desired service, performs a negotiation with the server and switches to a low-resolution videophone.

As seen in Figure 1, it is important for the application to be able to switch its service capabilities as a function of the current environ-

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wireless communications

ment. However, the magnitude of the development effort required to support such features is daunting. The solution is to create an application environment that can support dynamic changes in the underlying hardware and that is capable of performing all the negotiations necessary to establish the ability of new applications to operate in a dynamic system. MExE is an example of a mobile application environment and has received significant levels of interest in the reconfigurable systems community.

MExE

While MExE was initially developed by European Telecommunications Standardization Institute (ETSI), it is now the domain of the Third figure 1 Generation Partnership Project (3GPP), or the 3G standardization effort. The roots of MExE are important because they provide a basis for understanding the original vision for MExE. High-Resolution Videophone While 3G is at first sight an enhancement to the 2G (IS-95, IS-136, GSM) and second-and-ahalf-generation (2.5G) systems (GPRS, IxRTT, EDGE), it signifies a change in philosophy supporting the current market trends. nd The Internet has allowed users to access vast User moves to high-noise environment amounts of information from a single device, er exploration - System detects high BER ether your goal namely the desktop computer. As small wire- System adds FEC speak directly - New data rate cannot support less devices proliferate and desirable services high-resolution video phone ical page, the Application switches to low-resolution video phone ght resource. develop, users will expect to experience on technology, mobile devices the usage paradigm inherent to es and products desktop computers. 3G systems are expected to Low-Resolution Videophone ed provide the data infrastructure necessary to support these features, with the seamless interconnection of metropolitan area network (MAN), WLAN and personal area network (PAN).

However, the data infrastructure provided by 3G still needs an application component. To afcompanies providing solutions now ford the mobility anda company, flexibility inherent to a exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from mp to a company's technical page, the goal of Get Connected is to put you in touch3G withnetwork, the right resource.

Whicheverneed level ofto be scaled to applications Service modification to account for changes in the gy, Get Connected will help you connect with the companies and products you arematch searching for. the capabilities of a wide variety of delink onnected vices, from handsets with their smaller screens, awkward interface and reduced computational power to laptop computers with capabilities comparable to desktop computers. As seen in Figure 2, a single application is expected to run on multiple platforms and may access the network through multiple air interfaces.

The system structure seen in Figure 2 is the target structure for which MExE was originally developed. However, the flexible frame established by MExE is also applicable to software Get Connected with companies mentioned in this article. radios, which will become apparent as the exwww.portabledesign.com/getconnected ecution environment is described.

End of Article

24

PORTABLE DESIGN

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To achieve the goal of seamless application integration into multiple platforms, MExE leverages existing technology. The two technologies that MExE currently targets are the Wireless Application Protocol (WAP), developed to provide WWW access to the mobile handset, and Java, a language developed for applications designed to operate over multiple platforms. Given the success of the WWW paradigm, it forms the core of the MExE specifications. MExE is a protocol specification allowing different applications to interface with each other. Therefore, a MExE core that is capable of supporting these negotiations is present in the devices that are part of the negotiation, such as the client and the server in a client/server architecture or in each peer in a peer-to-peer negotiation.

Classmarks Because of the variety of application environments that are available today, MExE classifies application environments, providing a guide as to the type of application involved.

The classifications are called classmarks, and three are currently described in the MExE specifications: the WAP environment, the PersonalJava environment and the Java 2 Micro Edition (ME) Connected Limited Device Configuration (CLDC) environment. More will be specified as new technology is developed and more environments gain prominence.

As stated previously, WAP is the environment developed to provide WWW access to mobile phones, and it is also Classmark 1. A client specifying Classmark 1 would inform the environment that the application is based on WAP, implicitly indicating the types of applications that will be executed.

The PersonalJava environment (Classmark 2) is a subset of the JavaPhone API. Specifically, the PersonalJava environment is the wireless profile of the JavaPhone API and is optimized for mobile devices accessing WWW sites that contain Java applets. The Java-Phone API operates over multiple layers of the mobile device, allowing the Java applet to manage various aspects, such as telephony control, messaging and applications, (e.g., address books and calendars). Given that the core language is Java, a JVM must operate at the handset because it is a real-time interpreter of Java bytecodes. As an interpreter, the virtual machine may be unable to maintain the strict timing requirements of a wireless system, limiting its ability to manage some of the lower-layer functions.

Service Management and Negotiation Given that mobile devices are capable of roaming multiple networks, a form of service discovery is needed. The service discovery method suggested in the MExE specifications is a WWW page, requiring a browser on the client side, where the service discovery page contains the list of services available. The browser is a suggested way of performing service discovery but does not have to be the way in which services are discovered. An application could be developed that queries the server for the services available.

Once service discovery has been performed, these services need to be transferred to and installed in the client. While these processes are not specified in the MExE specification, they can be achieved through a variety of methods, such as FTP and Bluetooth data exchange. The installation of the sendee in the local environment is also not specified in the MExE specification, but the services can be installed, given the userâ&#x20AC;&#x2122;s permission, in the local environment through a variety of means that may be devicedependent. After the service has been installed in the local device, the client device has the ability to manage these services. Examples of service management include control of the execution of the service, termination of the service and deletion of the service.

In the MExE context, a service is some application like a videophone, i.e., the service is the actual program executed by the client.

However, how this service is executed or even if this service can execute on the local environment have yet to be determined. To perform this task, a negotiation needs to take place.

Negotiation for services is performed through the text-based Hypertext Transfer Protocol version 1.1 (HTTP/1.1) or one of its derivatives, such as Wireless Session Protocol (WSP) developed for WAP. There are two basic negotiations that need to be performed by MExE: capability and content negotiation. All negotiations are performed between the MExE-capable client device requesting the service and the MExE service environment at the server(s) side.

The goal of the capability negotiation is to determine the capabilities of the client device so that the server can also determine the limitations of the devices. While this negotiation must be performed before the service is established, the client may decide to perform this negotiation while a service is engaged, as shown in Figure 1, where a videophone changes its QoS parameters in real time. The capability negotiation is derived from the composite capability/ preferences profile (CC/PP) specification made by the World Wide Web Consortium (W3C), but the actual properties and schema that are at the core of the negotiation are based on the WAP UAProf specification. Since the negotiation is based on extensible markup language (XML), it can be easily extended.

Three mandatory properties must be exchanged: the classmark, the MExE specification version that the client device is using, and whether the client device supports security.

The device may also send to the MExE Service Environment a set of recommended properties, including properties such as the screen size and the type of audio encoder. While there is a set of mandatory and recommended properties that the client device can disclose during the capability negotiation, the WAP UAProf specification contains other properties, which may also be disclosed as part of the negotiation. A mechanism should be included to guarantee that the client device does not disclose information that the user wants to keep private.

Content negotiation is the process by which the best content match to the declared capabilities is selected. While this process may seem to naturally fit the server side, where the content is stored in applications such as WWW browsing, the client may actually perform the selection in client-driven applications, for example

wireless communications

The Java 2 ME CLDC environment (Classmark 3) is based on a version of Java 2 that targets embedded devices such as those found in consumer electronics. Given that Java 2 is designed to operate over embedded devices, which can be limited in attributes such as processor speed, the JVM is designed as an interpreter that is customized for the constrained resources available to the embedded device. The CLDC is a general framework that provides high-level libraries applicable to a large set of devices running Java. The Mobile Information Device Profile (MIDP) is then used to extend the support provided by CLDC. The collected APIs are then used to create a MIDP application (MIDlet), forming the core of the application; multiple MIDlets can be packed together into a single file, forming a MIDlet suite that can be handled as a single entity.

Given that mobile devices are capable of roaming multiple networks, a form of service discovery is needed.

JUNE 2008

25

wireless communications

sensor data retrieval in which the mobile device is connected to sensors collecting information on some remote infrastructure. Since the content negotiation is based on the HTTP/1.1 or WSP request headers, no new headers need to be defined.

Application security is an important aspect of any application environment because an unrestricted application can cause

nd

User Profiles A user profile allows the user and service provider to personalize the characteristics of the device. User profiles can be a powerful tool for the user, but MExE devices are not required to support them.

The user profile contains the userâ&#x20AC;&#x2122;s preferences for the operation of the device. Given the nature of MExE devices, these preferences may or may not be applicable to the current device capabilities. Therefore, if user profiles are supported, the capabilities negotiation should contain information on the user preferences to determine whether or not the device can support the current user profile. Examples of user preferences include the userâ&#x20AC;&#x2122;s language preference and whether the MExE device should accept downloadable software.

significant damage to the

Security Application security is an important aspect local device. of any application environment because an unrestricted application can cause significant damage to the local device. To provide a security framework, MExE devices employ four seed curity domains: operator, manufacturer, thirdparty and untrusted.

The operator domain contains executables authorized by the network operator, the manufacturer domain contains executables authorized by the device manufacturer, and the third-party domain companies providing solutions now contains exploration into products, technologies and companies. Whether your goal is to research the latestexecutables datasheet fromauthorized a company, by a trusted third mp to a company's technical page, the goal of Get Connected is to put you in touchparty. with the rightuntrusted resource. Whichever level of The domain contains all other gy, Get Connected will help you connect with the companies and products you areexecutables, searching for. which require no authentication and onnected are restricted from executing in any of the other three domains. Each MExE device is required to support the untrusted domain, but support of the other three domains is optional. Though support of the operator, manufacturer and third-party domains is optional, if one of those domains is supported, all three must be supported. Therefore, a MExE device can support either one or four security domains.

Each security domain contains different levels of access to the system. Table 1 provides Get Connected with companies mentioned in this article. the levels of permissions and the restrictions www.portabledesign.com/getconnected on general functionality. The actual operations

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

End of Article

26

PORTABLE DESIGN

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are performed through a set of APIs, and the behavior of those APIs must be assessed to determine whether they violate the permissions.

Security domains restrict types of activities, and permission levels provide specific types of permission for the executables. There are three permission types: blanket, session and single action. Blanket permission allows the executable to use the same set of permissions every time it executes, providing the greatest level of security freedom for the executable. A more restricted level of permission, the session permission is valid only through the current run of the executable, so the executable must request new permissions every time it executes. Single action permission is the most restrictive and allows the executable to perform only once the specific action for which it was given permission. Any subsequent executions of that action require the permission to be provided again.

MExEâ&#x20AC;&#x2122;s final security feature is the authentication process, and MExE specifies the public key solution as its authentication process. To authenticate, the executable needs to contain a private key and the MExE device needs to contain the corresponding public key. The public key can be hard-coded when the MExE device is manufactured or a signed public key can be provided with a certificate. For its validity to be verified, the certificate must contain a private key that corresponds to the public key hard-coded into the MExE device. Obviously to support this feature, a certificate chain must be supported by the MExE device.

A public key is needed for each of the domains (except the untrusted domain) because public keys are not shared between domains.

So the public keys for the operator and manufacturer domain need to be hard-coded into the MExE device. The only difference is the thirdparty key, which is not typically hard-coded into the system. Such a key would be packaged into the MExE device WWW browser just as it is in personal computer WWW browsers.

Service Discovery

The previous sections described ways in which services can be supported across multiple platforms and how these services can be used in dynamic devices operating in a network. There are two basic methods by which a device is made aware of the existence of a new service or module in the network: user-based discovery and automatic discovery.

Mobile Application Environments and Software Radios

The mobile application environment described in this section was designed to target the usage profile where a single application is ported to a variety of different devices seamlessly, but the benefits of applying environments such as MExE to software radios should be apparent. From a hardware standpoint, a multi-device network is different from a dynamic device, but from a services standpoint, both models are essentially the same. Software radio based systems are capable of dynamically changing aspects, such as bandwidth and QoS, making the software radio seem like a new device. When the dynamic behavior of software radios is applied, the application running over the software radio may be unable to function properly any longer, and its behavior will need to change with the change in circumstances. In such cases, the use of an application environment like MExE can greatly reduce the development burden placed on the system designer.

MExE and application environments like it

wireless communications

User-based discovery is the simplest of the discovery methods. The classical way in which this discovery is made is through some common interface, such as a Web browser. Upon arriving at a particular Web site, the user is informed of available services. The user selects a service and the protocol necessary to perform this service instantiation is performed through one of the methods discussed in previous sections of this chapter.

Automatic discovery is more complicated since it requires the use of some service discovery protocol (SDP), which performs an automatic negotiation with the local network to determine which services are available in the network. After the available services are discovered, the user, the network service provider, a third party, or the device itself then selects the service. Note that the initiation of the service is required to go through one of the standard protocols, guaranteeing that requirements for device compatibility and authorization are met. One example of such a protocol is the SDP available in the Bluetooth specifications.

Beyond discovery of new services, Bluetoothâ&#x20AC;&#x2122;s SDP also performs other functions such as device capability matching, integrating the functionality that would normally be the domain of other protocols, such as MExE.

allow application developers to (somewhat) isolate themselves from the idiosyncratic behavior of software radios and the (typically) unreliable radio channel. Instead of requiring the software radio developer to create a framework that allows for the smooth transition between application service states, the implementation of an application environment allows the developer to concentrate on providing the application with the best possible QoS. The description of object brokers and mobile application environments indicates how their application to software radios can allow the smooth integration of software radios into net-

table 1 Operator Domain

Manufacturer Domain

Third-Party Domain

Device core function access (i.e.. turn device on or off, change date/time)

No

No

No

Support core software download (update)

No

Yes

No

Smart card low-level access

No

No

No

Network security access

No

No

No

Network property access

Yes

No

No

Network services access

Yes

Yes

Yes

Access user private data

Yes

Yes

Yes

Access MExE security functions

Yes

Yes

Yes

Access application (i.e.. launch application, get application status)

Yes

Yes

Yes

Executable lifecycle access

Yes

Yes

Yes

Terminal device data access

Yes

Yes

Yes

Peripheral access

Yes

Yes

Yes

User interface access (read/write)

Yes

Yes

Yes

Action

Security domain permissions

works and the full exploitation of the dynamic nature of software radios.

Security in Software Radio

While security is an important aspect of any communications system, it becomes significantly more complicated when applied to software radio systems. In traditional communications systems, a handful of basic security issues need to be addressed. First, the identity of the user with whom communications are intended needs to be authenticated. This exchange is JUNE 2008

27

wireless communications

complemented with the use of another authentication technique to guarantee that the device with which communications are established is the device that passed the identity authentication. A classical form of implementing an attack on a system that exploits this type of security hole is a preemptive attack; a device preempts the transmissions of another device and pretends to be the intended device.

Second, the data transmitted must be secure.

In communications systems in general and in wireless systems in particular, the chanfigure 2 nel is vulnerable to interception. When the “A” Server A: Application output link is intercepted, an intruder device may have access to the inNetwork WLAN node formation transmitted over the link. Elaborate encryption algorithms using a set of encrypPDA nd tion keys are used to Handset Switch mitigate this problem. er exploration WAN base station ether your goal The use of encryption Laptop Computer speak directly on the link can make ical page, the ght resource. it computationally diftechnology, ficult for an intruder to Integrated services es and products intercept the link but ed raises several performance issues. The introduction of bit errors on an encrypted stream can lead to significant reductions in performance since the bit error can cause a failure in the decoding mechanism that will extend the impact of that error to several companies providing solutions now subsequent bits. from a company, exploration into products, technologies and companies. Whether your goal is to research the latest datasheet mp to a company's technical page, the goal of Get Connected is to put you in touch with right resource. level of In the software radio,Whichever these problems are intensigy, Get Connected will help you connect with the companies and products you arefied. searching for.

Given that software radio allows for the onnected reconfiguration of multiple layers in a radio system, attacks are possible for several vulnerable spots in the architecture. For example, the transmission of new configurations with over-the-air programming, when not properly protected, can lead to the easy interception of messages by an opponent, the easy geolocation of the transmitter (through the introduction of pilot signals), and perhaps even the loss of ownership of the equipment in remote devices such as satellite systems. Every reconfiguration Get Connected with companies mentioned in this article. of the system, whether it was begun through a www.portabledesign.com/getconnected vertical or horizontal negotiation on the proto-

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28

PORTABLE DESIGN

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col stack, must go through a powerful authentication process. Furthermore, the transmission of system configuration data, as in over-the-air programming, must include powerful encryption algorithms to prevent interception and system identification.

The short discussion above deals primarily with the integrity of the system and the data transmitted over that system. However, security is a complex part of any communications system, and other areas beyond just the integrity of the system and data are vulnerable to attack.

These aspects of security include functional issues such as denial-of-service attacks. A full discussion of these issues is beyond the scope of this text, and the reader is encouraged to investigate this topic further. As the availability of inexpensive and powerful computing platforms increases, the sophistication of the possible attacks increases, thus requiring the implementation of yet more sophisticated countermeasures.

This article is excerpted from Reed, Jeffrey H., ed. Software Radio: A Modern Engineering Approach. New Jersey: Prentice Hall, 2002. Used with permission.

About the Author

Dr. Jeffrey H. Reed is a professor in the Bradley Department of Electrical and Computer Engineering at Virginia Polytechnic Institute and State University (Virginia Tech) in Blacksburg, Virginia. He currently serves as Director of the Mobile and Portable Radio Research Group (MPRG). Dr. Reed received his B.S., M.S. and Ph.D. from the University of California, Davis (UC Davis), in 1979-1987. Dr. Reed was employed by Signal Science, Inc. from 1980 to 1986 and worked as a private consultant and part-time faculty member at UC Davis before coming to Virginia Tech in 1992.

Dr. Reed’s areas of expertise are DSP implementation and software radios. He has co-authored or co-edited fourteen books and over ninety-eight journal and conference papers. Dr. Reed is a past recipient of Virginia Tech’s College of Engineering Award for Excellence in Research. He has served as principal investigator or co-principal investigator on over fortyfour projects while at Virginia Tech. Dr. Reed continues to work as a consultant and has provided short courses to many companies.

Optimize Performance at the Lowest Power National’s PowerWise® Solutions Help Engineers Design Energy Efficient Systems PowerWise products are analog and mixed-signal semiconductors that balance higher performance with lower power consumption.

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Introduction

The obvious advantage of lower power is higher economy

(less dollars spent on energy) or longer battery life (i.e. play Today’s technological civilization is driven by energy – either Gigamachines. sample ADC, uses a novel time on a portable musicfolding player). A not so obvious advantage stored or captured, it is required to run our With-the ADC083000 is longer service due to reduced heat wear on the elecconverter topology reduces thelife power required out energy and the proper method to convert it into useful that greatly tronics.

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The WEBENCH® design tool allows the engineer regulators. The to “dial-in” a performance level for power supply designs as a trade off ff to other parameters (i.e. size of components). A good example of this is from the PowerWise family of is SIMPLE SWITCHER® regulators (i.e. LM25576). Th This family is supported in the WEBENCH tool with a control for setting the required efficiency of the system as shown in Figure 2.

National Semiconductor 2900 Semiconductor Drive Santa Clara, CA 95051 1 800 272 9959

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M ili g Add Mailing Address: PO Box B 58090 Santa Clara, CA 95052

© National Semiconductor Corporation, 2007. National Semiconductor, , PowerWise, SIMPLE SWITCHER, and WEBENCH are registered trademarks of National Semiconductor Corporation. All other brand or product names are trademarks or registered trademarks of their respective holders.

Find PowerWise products, metrics, white papers, app notes and tools at:

national.com/powerwise

Timing Solutions

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PowerWise Resources Help Designers Improve System Performance to Power Visit national.com/powerwise for white papers, app notes and design tools that help system engineers by highlighting the optimal balance between performance and power consumption at the component, subsystem and system level.

consumer electronics noise cancellation

Active Noise Cancellation Comes to Mobile Phones Active noise cancellation is no longer limited to well-heeled air travelers. It can bring considerable benefits to handsets, too.

by David Monteith, VP Business Development, Wolfson Microelectronics

A

All of us have experienced trying to make a mobile phone call from a noisy street, crowded restaurant or train station where the background noise can make it impossible to hear the incoming call. It can be worse when the person next to you in these situations is yelling into the receiver in an attempt to be heard. Active and passive noise canceling technologies can minimize background noise in high-end headphones; however, these technologies today cannot provide the same benefits in mobile handsets. Clearly mobile handsets could benefit from noise cancellation.

Active noise cancellation (ANC) has been used in headphones for several years, often used to cut out the drone of an aircraft on a long journey. But the full benefit of the technology has not been realized—the potential is for noise cancellation to be used in a much wider range of applications creating a field of quiet for users of a variety of consumer equipment. A highly effective noise canceling scheme would not only benefit consumers by

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PORTABLE DESIGN

helping to save our hearing, but carriers would benefit from longer calls, more calls and more satisfied consumers resulting in higher revenues.

The technology of ANC has moved down from the high end into mid-range headphones, but it has remained pretty much in headphones.

Part of the problem has been the feedback in ANC technology that most of these headphones use. This technology tries to create a stable null; a microphone measures the noise inside the headphone “cans” and a circuit generates a cancellation signal that is sent to the headphone speaker. This technique is limited in the frequencies that can be cancelled, and most often it needs significant sound proofing around the earphones to block out the external noise through passive noise cancellation.

Mobile Phones

In current mobile phone handsets the voice signal from the microphone can be filtered and

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consumer electronics

improved, creating a high-quality transmit link from you to the other person on the call. But receiving a call in a busy place can make the voice of the person calling you unintelligible.

ANC is an attractive feature for makers of highend phones for developed markets. Imagine a business phone that lets you clearly hear the information that a colleague is communicating to you

figure 1

Challenges of Receive Side Noise Cancellation

Signal Amplitude

Speaker Volume Background noiseANC OFF

Background noiseANC ON

Time

Simplified effects of Wolfson ANC

nd

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

when you are on a noisy train, or a phone that allows you to receive a friend’s call in a busy restaurant without needing to go outside to hear them.

This approach is also of interest to the low-end phone makers and network operators in develed oping markets where callers are often struggling to complete calls on very noisy street environments. Also, using technology in the handset to improve the quality of the call means that the network can stretch further for the same level of signal quality, either bringing phones to more companies providing solutions now customers with the infrastructure equipexploration into products, technologies and companies. Whether your goal is to research the latest datasheet fromsame a company, mp to a company's technical page, the goal of Get Connected is to put you in touchment with the resource.

Whichever level or right reducing the roll out ofofnew infrastrucgy, Get Connected will help you connect with the companies and products you areture searching for. equipment. Implementing this technology onnected in mobile phones is a very significant challenge, not only in making the technology work, but to make it work cost-effectively for designs that are manufactured in the tens of millions of units.

That is not a trivial challenge.

End of Article Get Connected

with companies mentioned in this article. www.portabledesign.com/getconnected

32

phone “cans” create a sealed cavity over the listener’s ear. The noise inside the can is then monitored using a microphone and an electronic feedback circuit is used to generate a noise cancellation signal, which tries to create a null, silence, inside the can. This combination of active and passive noise cancellation works fine for headphones that are used to listen to music or drown out unwanted sounds on airplanes. Clearly, passive noise cancellation isn’t practical for a mobile handset.

Types of Noise Cancellation

Passive noise cancellation involves insulation and absorption, typically in the form of cups or cans that surround the ear. Active noise cancellation can be classified as feedback or feed-forward.

In headphones a feedback approach is typically used with passive noise cancellation. The head-

PORTABLE DESIGN

Get Connected with companies mentioned in this article.

One possibility for receive side noise cancellation is to use a feed-forward architecture rather than the traditional feedback approach. This technique uses microphones to capture the ambient noise, but instead of using feedback to create a null it inverts the noise signal and generates a field of sound timed to cancel the noise as it hits the eardrum. This avoids the need for cans around the headphones, or the need for passive cancellation at all. However, there are major challenges to this approach, both technical and commercial. There is limited time to do the signal processing, invert the signal, calculate the time shift that is needed, and produce the output waveforms for the speaker. All this needs to be done in the time it takes for the ambient noise signal passing the noise monitoring microphones till the same signal reaches the ear. The generated cancellation signal also has to be exactly phase aligned to ensure that the noise is correctly cancelled. If done correctly, this creates the field of quiet around the ear so that the audio signal is clearer regardless of the noisy environment.

The other challenge is commercial. Mobile phones use a wide range of microphones and speakers, and such a system has to be easily designed into a specific phone. Having a configurable approach where different parameters can be easily programmed into different phones to optimize the signal processing is vital to get the level of performance required to make a difference to the user experience. For low-end phones, this also has to be a cost effective solution that does not add expensive components to the bill of material of the phone.

While there is significant processing power available in a phone through the baseband processor, there is not enough time to route the signal through the phone to the processor and still achieve good levels of ANC. This processing power has to be added to the audio signal chain in a cost-effective way, but also not compromise the existing sound quality or the battery life. Tra-

Wolfson Microelectronics has patented a new feed-forward approach that addresses the needs of the mobile phone and portable consumer equipment maker. These patents cover the time alignment and signal processing techniques that remove the latency from the signal chain to provide an implementation in which the ambient noise and noise cancellation signals are time and phase aligned.

This implementation uses two microphones on the edge of the phone to the left and right of the earphone speaker. They intercept the ambient noise, feed it to a signal processor that generates the anti-noise signal, and feeds it to the earphone speaker. The signal processor also has to take into account how quickly the speaker responds to particular frequencies to ensure all the frequencies are time and phase aligned.

Figure 1 shows an example of the effects of the Wolfson ANC. The blue line represents a voice signal. The red shape represents a background noise signal, often higher in amplitude than the voice signal, making the voice inaudible. The black shape indicates what the noise signal would look like with the Wolfson ANC turned on.

The implementation shown in Figure 2 uses two standard microphones, and a signal processing chip from Wolfson replacing the speaker driver. The signal processing chip holds a set of parameters for different elements of the signal chain and these can be tuned to the acoustic characteristics of a particular handset design. These include the latencies of different speakers, different form factors such as clam-shell or candy bar phones and the microphone signal-to-noise ratio.

Wolfson ANC technology is already being used for ear-bud headphones and in now being designed into mobile phones. In the future it will also be used in portable equipment such as personal media players to improve the quality of sound for games and video, and user tests have shown that improving the audio performance of a system dramatically improves the overall user experience.

Future Trends

In order to continue to reduce the cost and size of mobile handsets, additional opportuni-

consumer electronics figure 2

Received Voice Input

VOICE CODEC

Handset MIC

Voice ADC

MIC Amplifier

Voice DAC

Wolfson

Earpiece Driver

AMBIENT NOISE CANCELLATION

Transmit Voice Received Voice

RF Baseband Processor

AVDD SPKVDD DCVDD DBVDD

Earpiece 32 Ohm

Ambient Noise Sensing Microphones

Master Clock

2- wire 2 IC

Clock Output

Proposed Implementation

ties for integration must be explored. The integration of transmit path noise cancellation is one possibility, as this would offer handset vendors a convenient single-chip solution for noise entering the handset and transmitted through the network as well as for the same noise making it hard for the handset user to hear the voice call. There is also potential to integrate the signal processing with silicon microphones.

Integration steps such as these would reduce the noise in the system, improve the performance and require less power, while reducing the overall bill of materials and complexity of the phone design.

IRQ I 2C Control

ditional feedback-based ANC headphones use an additional battery to power the signal processing.

Mobile handset designers donâ&#x20AC;&#x2122;t have the luxury of adding an additional battery. The ANC approach in a mobile phone has to have a negligible impact on the talk time and standby time of the phone.

Power Management

Block diagram of receive side active noise cancellation

Conclusion

Active noise cancellation is a powerful tool for improving the user experience in mobile phones and also improving the economics and user satisfaction of mobile phone networks. It has not been possible to apply feedback ANC techniques to mobile phones due to the need for passive noise cancellation and the need to create a sealed cavity around the ear of the listener. It is now possible to provide very effective noise cancellation in a phone at a cost that is acceptable for both high-end and low-end phone makers.

Wolfson Microelectronics, Inc., San Diego, CA. (858) 676-5090 [www.wolfsonmicro.com].

JUNE 2008

33

portable power low-power design

Unified Power Format to Simplify Low-Power Design Flows SoC designers need to get maximum performance within a limited power budget. The Uniform Power Format (UPF) captures the low-power design specification from RTL to GDSII, helping you to orchestrate a wide variety of low-power design and optimization techniques.

by Arvind Narayanan, Product Director, Implementation Business Unit, Magma Design

P

Power management and power integrity signoff is a serious challenge for IC designers, especially at smaller technology nodes. Dynamic and static power minimization must begin at the earliest design stage and continue throughout the RTL-to-GDSII flow. Multiple advanced power-saving design strategies must be implemented to achieve the maximum power reduction. Power and voltage drop analysis must begin at the register transfer level (RTL) and continue through sign-off to ensure power integrity. It is also critical to have a common format throughout the design to improve productivity and minimize design iterations. A true open format such as the Unified Power Format (UPF) also ensures easy interoperability between different electronic design automation (EDA) vendors.

This article describes how the proposed IEEE standard Unified Power Format (IEEE P1801 UPF) helps to optimize low-power

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PORTABLE DESIGN

design flows. Advanced techniques including automated multi-voltage designs, ultra-lowpower clock tree synthesis, and physical implementation, which meet 45nm dynamic and leakage power requirements, will be covered in the context of the UPF flow. The article will also illustrate how the UPF flow is a portable format across the design flow and also across different tool vendors.

Power Dissipation Considerations

Dynamic Power Dissipation Dynamic power dissipation occurs in logic gates as they switch states. During switching, power supplies must charge internal capacitance associated with a gate’s transistors. That process consumes power. The gate also must charge any external––or load––capacitances that comprise parasitic wire capacitances and input capacitances associated with downstream logic-gate inputs. The following equation

Pd F C load V 2 By minimizing circuit activity, reducing the supply voltage or reducing the capacitance a gate must drive, IC designers can decrease dynamic power dissipation for a semiconductor device. As designers reduce the frequency of a system’s clock, they reduce switching activity and minimizing circuit activity. They also can gate a clock signal and distribute it to only the portions of an IC that need the signal at a given time. And, by appropriately balancing delays, they can minimize local data activity, glitches and hazards.

Designers can use two techniques to reduce capacitance. First, they can reduce the size of gate circuits, lowering their capacitances. Second, they can apply a power-aware placement algorithm to minimize the length of critical conductors and reduce their parasitic capacitances.

By decreasing an IC’s supply voltage, designers reduce a logic gate’s power consumption, but they also reduce the gate’s switching speed. To overcome this speed decrease, designers can have different areas on a die run at different voltages (MVDD). Key chip functions would operate at one voltage, while other circuits would run at a lower voltage.

Static Power Dissipation Static power dissipation is associated with logic gates when they are inactive (static)––that is, not currently switching from one state to another. In this case, these gates should theoretically not be consuming any power at all. In reality, there is always some amount of leakage current passing through the transistors, which means they do consume a certain amount of power.

Even though the static power consumption associated with an individual logic gate is extremely small, the total effect becomes significant with today’s ICs, which can contain tens of millions of gates. Furthermore, as transistors shrink in size when the industry moves from one technology node to another, the level of doping has to be increased, causing leakage

portable power

(Eq. 1) shows the relationship between dynamic power dissipation (Pd) and frequency (F), load capacitance (Cload), and supply voltage (V):

currents to become relatively larger. The end result is that, even if a large portion of the device is inactive, it may still be consuming a significant amount of power. In fact, static power dissipation is expected soon to exceed dynamic power dissipation for many devices.

One solution to minimize static power is to use multiple voltage domains as introduced in the discussions on dynamic power dissipation above. Another option is to use low Vt transistors only on timing-critical paths, and to use high Vt transistors on non-critical paths. These two solutions may, of course, be used together.

Yet another technique involves selectively powering down leaking blocks using non-leaking transistors (MTCMOS switches) whenever those portions of the device are not required–– for example, when those portions are placed in a “stand-by” mode.

However, switching entire blocks on and off can cause dramatic current surges, which may require the use of additional circuitry to provide a “soft” (staged) power on/off for these blocks.

figure 1 Power Consumption (Generates heat, requires expensive packaging and cooling, increases mechanical stress, reduces battery life)

Static and Dynamic Power Dissipation Voltage Drop (Degrades timing, reduces noise immunity)

Electromigration (Degrades reliability, increases voltage drop)

Power distribution considerations include total power consumption, voltage drop and electromigration effects

Power Distribution

Of course, designers must get current from a power supply through a device’s pins and to the silicon chip. Wires that distribute power throughout the chip have resistance. The longer the wires, the larger the resistance and the greater the associated voltage drops and power losses. As a result, traditional packaging techJUNE 2008

35

portable power

nologies based on power pads around the periphery of a chip no longer offer an acceptable option for large and complex devices.

Flip-chip packaging technology, though, places power pads across the “face” of an IC die and delivers power through short, low-resistance paths directly to internal areas on the chip. A flip-chip can provide additional power and ground pads that reduce resistances and reduce power loss.

Voltage Drop Effects

figure 2

Synthesis

UPF

nd

Verilog (Netlist)

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

P&R UPF

Verilog (Netlist)

ed

Analysis

Simulation, Logical Equivalence Checking...

UPF

HDL (RTL)

Deep-submicron and ultra-deep-submicron devices are prone to voltage-drop effects. Such effects are caused by the resistance associated with the network of wires used to distribute power and ground from the external pins to the internal circuitry.

Voltage drop effects have become increasingly significant because the resistivity of the power and ground conductors rises as chip-design geometries decrease. Increasing the width of power and ground “tracks” decreases resistance at the cost of valuable space of silicon die. The wider tracks also may cause routingcongestion problems. To overcome this congestion, designers can place logic functions farther apart, but longer signal tracks increase delays and power consumption. Figure 1 summarizes the power distribution problem.

Low-Power Design and Optimization Techniques

A wide variety of low-power design and optimization techniques exists that can be brought into play datasheet to address dynamic and static exploration into products, companies. your goal is to research the latest from aboth company, RTL to technologies GDSII Lowand Power Flow Whether using UPF mp to a company's technical page, the goal of Get Connected is to put you in touchpower with thedissipation. right resource. These Whichever level of include: gy, Get Connected will help you connect with the companies and products you are searching for.

• Cloning onnected • Substrate Biasing • Voltage Islands and (using multiple supply voltages, also known as multi-VDD) • Voltage Scaling • Power-Gating (including MTCMOS and state retention) • The “Gas Station” concept • Power-Aware Mapping • Using multiple switching threshold transistors (also known as multi-VT) • Power-Aware Floor-Planning and Placement Get Connected with companies mentioned in this article.

• Power-Aware Decoupling Capacitor Placement www.portabledesign.com/getconnected • Power-Aware Clock-Tree Synthesis

companies providing solutions now

End of Article

36

PORTABLE DESIGN

Get Connected with companies mentioned in this article.

• Power-Aware Clock-Gating and Clock Gate Cloning/Un-Cloning • Power-Aware Timing Optimization • Iterative Power Network Design

Requirements of a True LowPower Design Environment

Open Power Format As solution providers to the chip and system design industry, EDA vendors have long been researching many innovative approaches to power management, resulting in a host of design verification, implementation and analysis tools. Of late, finding solutions has become a three-way collaboration between chip design, semiconductor process and manufacturing, and EDA communities. Designers have come up with many clever approaches for “gating” the design’s clock and power so it operates only when necessary. Process developers have created special processes to operate digital logic at different threshold voltages and developed various power-saving structures. EDA vendors have provided the design tools to bring these processes and design techniques together.

Until recently, it was left to designers to create a consistent flow across all phases of the design using only a set of “features” in the tools that resembled a bag of tricks. Clearly, there was a need for addressing power management across many aspects of design for high-volume consumer products manufactured in advanced 65nm and 90nm processes.

In 2006, designers and process (library) developers demanded that the EDA industry collaborate on creating a power management standard. Besides the obvious interoperability required for implementing this standard in various tools, additional requirements were established to ensure that the standard was developed and accessible to the entire industry in an open and inclusive manner. A technical committee assembled under standards body Accellera, which included designers of mobile, automotive, storage and consumer applications and EDA vendors, was tasked to develop this new low-power standard.

The openness in developing the low-power standard was clearly evident; participants had no restrictions such as licensing, membership or annual fees. As for inclusiveness, eight

UPF Flow UPF describes the low-power intent for design implementation, analysis and verification.

It captures the low-power design specification from RTL to GDSII, with consistent language throughout the design and verification flow.

UPF allows designers to use open, multi-vendor tool flows for low-power silicon design. A UPF specification defines how to create a network to supply power to each design element.

It describes how the individual supply nets behave with respect to one another and how the logic functionality is extended to support dynamic power switching to these logic design elements. By controlling the operating voltages of each supply net and whether the supply nets––and their connected design elements–– are turned on or off, the supply network only provides power to the functional areas of the chip needed to complete the computational task in a timely manner.

Combined with a design’s RTL code, the UPF file is the input to several tools––simulators, synthesis tools, formal verification tools and place and route tools (Figure 2). Synthesis tools can read the RTL code and UPF design input files and produce a netlist. The UPF file may be reused without change later in the tool flow. A UPF-aware logical equivalence checker can read the full design files and perform checks, including the results of the UPF

portable power

donations of proven technology were made from seven companies and every donation was considered by the committee in order to develop the base for this standard. No one donation was treated exclusively or required others to be force-fit into a specific use model. Considering that technology donations came from multiple participants and that many concepts as well as commands were assimilated into one cohesive format, the low-power standard was aptly called Unified Power Format (UPF).

Accellera and the UPF committee worked closely with the IEEE. The resulting UPF standard has now formed the foundation of IEEE project 1801 (P1801), which is well on its way to ratification. Not only does the industry now have a low-power standard, but it also has a roadmap through IEEE P1801 for further development and broader adoption.

commands, to ensure equivalence. Place and route tools read both the netlist and UPF files and produce output, potentially including an output UPF file to account for changes in hierarchy or other transformations.

Power design intent can be easily specified over many elements in the design. A UPF specification can be included with the other deliverables of intellectual property (IP) blocks and reused along with the other delivered IP files.

True Interoperability UPF is a robust, flexible standard that addresses designers’ needs throughout the design cycle, allowing them to mix and match tools and flows from various vendors. A prime example of how competitive companies can work together for the common good of the industry, UPF is ready now for users who need to focus on low power for their complex ASICs and SoCs. Although some EDA vendors may debate the superiority of certain proprietary solutions––and accompanying formats––there was a prevailing opinion in the designer community that an open standard was needed to enable interoperability. UPF has successfully achieved this goal.

Summary

Designers need an open power format to capture low-power design intent that can be used across different tools and vendors. The Unified Power Format enables the designer to capture power requirements that seamlessly work across different EDA tools.

Magma Design Automation, Inc. Santa Clara, CA. (408) 565-7500. [www.magma-da.com].

JUNE 2008

37

technology focus audio amplifiers

High-Efficiency Audio Designs for Portable Devices In order to improve efficiency, a new technology for Class D amps is now available, giving a typical Class D audio amplifier an efficiency of 80% or more.

by Henry Kwok, Senior Applications Engineer, National Semiconductor Corporation

W

With an ever increasing feature set found in today’s portable devices, a mobile phone can now function as a multimedia playback system, digital still camera and personal digital assistant (PDA). A portable media player (PMP) is now a navigation system, music player, global positioning system (GPS) and digital film library. Several systems are available with MP3 / MP4 playback, GPS, TV and gaming with Web browser. Most manufacturers are now placing a greater emphasis on sound quality because sound is a key element to differentiate their products. Some manufacturers will even put more than one speaker in a system to improve the sound quality and output level.

This article uses a high-efficiency class D audio power amplifier to demonstrate how to lower a portable device’s heat dissipation by reducing power consumption. It will also show how to reduce the amplifier’s electromagnetic

38

PORTABLE DESIGN

interference and improve audio quality by reducing noise.

Power savings is always a challenging mission, especially for battery-operated portable devices. Multiple speakers are becoming more popular due to the improved sound quality and louder output. In single-speaker applications, products only require one power amplifier to drive the speaker; but for stereo or multiple speaker applications, systems demand two audio power amplifiers to drive the speakers.

This requirement more than doubles the power consumption and the heat generated by the dual power amplifiers and is another design issue engineers need to address. Many previous portable system designs used Class AB amplifiers, which have higher power consumption and a typical efficiency in the 40-55% range. Increasing efficiency can enable a reduction in the heat generated by the audio power amplifiers. In order to improve efficiency, a new technology for

technology focus

Class D amps is now available, giving a typical Class D audio amplifier an efficiency of 80% or more.

Basic Class D amplifier theory asserts that from a small analog signal into the power amplifier input you get a digital output. The power amplifier’s internal modulator takes the conversion from analog to digital signals by using pulse width modulation (PWM) or pulse code modulation (PCM), depending on the type of modulation used. But it’s still a small digital signal. After the analog to digital conversion, bridge amplifiers are used to increase the digital signal amplitude. For converting high-amplitude digital back to analog, output passive LC filters are needed. The block diagram (Figure 1) shows the details where the red block is the power amplifier device (chip) portion.

Figure 1 is a typical PWM Class D amplifier structure, which includes a PWM converter (modulator). The “H-Bridge” block is the digital signal amplifier, which functions similar to a level shifter. The final output stage (between the amplifier and speaker) is a passive low pass filter (LPF).

The low pass filter circuit in Figure 2 shows a typical implementation with two in-series inductors connected between the power amplifier and speaker. A high current flows through these two inductors when the power amplifier is operating.

Due to the high current flow, the inductor’s size is rather large. But for portable products with very limited printed circuit board (PCB) space, using two big inductors is not a good solution.

Besides the inductors, three external capacitors are consuming PCB space, too.

In order to eliminate the output filter, National Semiconductor developed a series of filter-less Class D amplifiers: mono versions (LM4671, LM4673, LM4675 and LM48310) and stereo versions (LM4674, LM48410 and LM48411).

The concept is to use a moving coil speaker as a transducer. The typical transducer load on an audio amplifier is quite reactive (inductive).

For this reason, the speaker load can act as its own filter. So without the usual output filter, the power amplifier outputs an aggressive waveform that can radiate or conduct to other components in the system and cause interference. It is essential to keep the audio power amplifier and output traces short and well shielded.

In the past, only fixed frequency technology was used for Class D products, but today electromagnetic interference (EMI) effects are more sensitive on portable designs. Fixed frequency, Class D amplifier outputs switch at a constant 300 kHz, where the output spectrum consists of the fundamental and its associated harmonics (Figure 3a).

Manufacturers want an improved solution to Figure 1

figure 1

Small Analog Signal

Small signal PWM converter

Low Pass Filter

H-Bridge

Typical Class-D amplifier operation

resolve these EMI issues. Using spread spectrum is one method to reduce EMI. In spread spectrum mode, the switching frequency varies randomly by 30% (about a 300 kHz center frequency), reducing the wideband spectral content and improving EMI emissions radiated by the speaker and associated cables and traces. A fixed frequency Class D amplifier exhibits large amounts of spectral energy at multiples of the switching frequency. The spread spectrum architecture spreads the same energy over a larger bandwidth (Figure 3b). The cycle-to-cycle variation of the switching period does not affect the audio reproduction, efficiency, or power supply rejection ratio (PSRR).

With this new technology available, manufacturers’ end products are more easily able to pass EMI testing. Figure 4 shows the EMI report for the LM48410 audio amplifier using 3inch length stereo speaker cables. It passes the FCC EMI test with at least a 6 dB margin.

figure 2 L C RL

CL C L Typical passive LC Low Pass Filter (LPF)

JUNE 2008

39

technology focus

Figure 5 shows the LM48410 focused on a speaker application (there is no headphone output capability). The LM48410 features four selectable gain (6dB, 12dB, 18dB & 24dB) options to choose from.

figure 3a Fixed Frequency FFT VDD=3.6V 0 dB

0

-10 -20

EMI Reduces Handling

-30 -40 -50 -60 -70 -80 -90 -100 20 Hz

10 MHz

Fixed Frequency FFT

figure 3b Spread Spectrum FFT VDD=3.6V 0 dB -10 -20

0

-30 -40 -50 -60 -70

-90 -100 20 Hz

10 MHz

Spread Spectrum FFT

The values for RIN are the reference to calculate the input capacitor value.

The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers cannot reproduce, and may even be damaged, by low frequencies.

High-pass filtering the audio signal helps protect the speakers.

When the LM48410 is configured to using a single-ended signal source, power supply noise on the ground is seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies (217 Hz in a GSM phone) filters out the noise such that it is not amplified nor heard on the output. Capacitors with a tolerance of 10% or better are recommended for impedance matching and improved commonmode rejection ratio (CMRR) and power supply rejection ratio (PSRR).

External Components Selection

PCB Layout Handling for HighPower Design

table 1 Login Input

f = 1 / 2�RinCin

With a better PCB layout, EMI performance can be further improved. The traces from the amplifier outputs to the speaker have the greatest potential to couple the EMI to other circuits.

Since most Class D audio amplifiers use a bridge-tied-load (BTL) configuration to maximize the output power, both speaker outputs have switching frequency included. Below are some methods to improve EMI performance: • Layout the speaker traces side by side (this configuration is very similar to differential pair).

• Make the speaker output trace on an internal PCB layer, with ground layer shielding above and below (this method is similar to RF shielding).

• Keep the device to speaker trace length as short as possible (using a twisted pair) to minimize EMI. Input capacitors may be required for some applications, or when the audio source is single-ended. Input capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of the audio source and the bias voltage of the LM48410.

-80

The input capacitors create a high-pass filter with the input resistance RIN. The -3dB point of the high-pass filter is found using the equation below.

Gain

Resistance

G0

G1

V/V

Gain

RIN

GND

GND

2

6

160KΩ

GND

VDD

4

12

80KΩ

VDD

GND

8

18

40KΩ

VDD

VDD

16

24

20KΩ

40

PORTABLE DESIGN

Another main parameter portable product designers must focus on is output power. The PCB trace current ratings are one way to evaluate and indicate an opportunity to improve efficiency.

As output power increases, interconnect resistance (PCB traces and wires) between the amplifiers, load and power supply create a voltage drop. The voltage loss due to the traces between the LM48410 and the load results in lower output power and decreased efficiency. Higher trace resistance between the supply and the LM48410 has the same effect as a poorly regulated supply, increasing ripple on the supply line, and reducing peak output power. The effects of residual trace resistance increases as output current increases due to higher output power or decreased load impedance or both. To maintain the highest output voltage swing and corresponding peak output power, the PCB traces that connect the

technology focus figure 4

Amplitude (d8uV/m)

output pins to the load and the supply pins to the power supply should be as wide as possible to minimize trace resistance.

The use of power and ground planes will give the best total harmonic distortion plus noise (THD +N) performance. In addition to reducing trace resistance, the use of power planes creates parasitic capacitance that helps filter the power supply line. The inductive nature of the transducer load can also result in overshoot on one or both edges, clamped by the parasitic diodes to GND and VDD in each case.

In summary, as our technologies evolve, new ideas and consumer requirements will continue to drive the product advancement. As these new features continue to expand and improve performance, designers will need to create better solutions, to be creative to solve complex problems, including new ways to get better sound in portable devices.

This never-ending cycle involves using better filters and board layout techniques for EMI and, of course, power savings through better heat management. Designers need to listen to the requests from the real world. And they are listeningâ&#x20AC;&#x201D;but now with much better quality.

Figure 4

55.0 50.0 45.0 40.0 35.0 30.0 25.0 20.0 15.0 10.0 30.0 100.0

200.0

300.0

400.0 500.0 600.0 Frequency (MHz)

800.0

900.0 1000.0

LM48410 EMI report

figure 5 +2.5V to +5.5V

R3D+

C3D-

3DL+

National Semiconductor Corporation Santa Clara, CA. (408) 721-5000. [www.nsc.com].

700.0

CIN

CIN

+

VDD

CS

PVDD PVDD

INR+ INR-

CIN

3DR+

CS

OUTRA

GAIN

MODULATOR

SDR G0 G1 SDL

OUTRB

OSCILLATOR

3D

INL+ INL-

HBRIDGE

GAIN

MODULATOR

HBRIDGE

OUTLA OUTLB

CIN 3DEN SS/FF 3DLR3D-

3DR-

GND

PGND

C3D-

LM48410 Application Circuit

JUNE 2008

41

product feature New FPGA Technology for Handheld, Ultra-Low-Power Applications CMOS-compatible non-volatile memory seeks to replace embedded flash in portable designs.

By John Donovan, Editor-inChief

Handheld PLD Power Comparison

Handheld Mode

PLD Mode

Device Speed

SiliconBlue FPGAs* mW

Operat’g

Active Fast Power (AFP)

~32 MHz

9

Stand-by

Active Slow Power (ASP)

32 KHz

.025

Static

0 MHz

0.15

Shutdown Sleep Freeze

Tough Recovery Design

No Need

Stand-by Rarely used by handsets

PowerDown

Recovery Time

42

PORTABLE DESIGN

SiliconBlue has announced a new class of single-chip, ultra-low-power FPGA devices, which set a new industry standard for price, power and space along with unprecedented ASIC-like logic capacity for battery-powered, handheld consumer applications. Manufactured on TSMC’s 65nm LP (low-power) standard CMOS process, the new single-chip iCE family of FPGAs incorporates the company’s proprietary NVCM (Non-Volatile Configuration Memory) technology, eliminating external flash PROM costs while making it easy to use.

“We are introducing the first new FPGA technology in ten years, allowing us to build from the ground up single-chip, reprogrammable, ultralow-power FPGAs,” said SRAM Other Kapil Shankar, CEO of FPGAs* PLDs* SiliconBlue in an interview mW mW with Portable Design. “Our two-process generation 30-170 60-62 lead gives our customers an unprecedented two to five times price advantage .044-.35 30-36 over competing non-volatile PLDs. We have delivered all the capabilities and 15-36 .044-.35 advantages of wall-plugged consumer FPGAs to battery-powered handhelds 15-36 .037-.35 today.” Shankar said SiliconBlue was particularly targeting handhelds, since “30 percent of all ICs go into handhelds.” It’s one where Shanker feels an ultra-low-power FPGA like iCE can gain sockets where CPLDs like CoolRunner have topped out.

SiliconBlue claims to be the first company to combine low-power, Non-Volatile Configuration Memory (NVCM) and standard SRAM technologies at the 65nm LP process node. Fabricated at Taiwan Semiconductor Manufacturing Company (TSMC), Shankar maintains that the process is scalable to 40nm and beyond. SiliconBlue’s FPGAs carry their own non-volatile configuration memory on-chip for storing configuration data; therefore, there is no need for the external flash PROM employed by traditional FPGA solutions.

This saves part count, space, cost and removes the threat of bitstream snooping, resulting in secure designs.

Compared to existing non-volatile FPGAs, which employ embedded flash technology on two-generations-old 0.18μ / 0.13μ processes, the iCE FPGAs on 65LP process offer ASIC-like logic capacity and deliver the industry’s lowest logic cost.

The 65nm LP process, coupled with SiliconBlue’s proprietary low-power design, delivers more usable logic per unit of cost, lower standby power and lower active power than competing programmable logic products. SiliconBlue uses the same definitions for power modes as handset designers: Operating (active-fast, ~MHz) and Standby (active-slow, ~kHz). SiliconBlue’s FPGAs remain operating, consuming less standby power than other products which require complex power down sleep modes. Active power remains low through a combination of 65LP process, proprietary chip design and operating the logic core as low as 1.0 volt.

SiliconBlue’s first family of FPGAs, the iCE65, is comprised of four members that provide ultra-low power in small packages. Configuration is reprogrammable from many sources including secure, on-chip, embedded, NVCM, or external sources such as commodity SPI serial flash PROM or download from processor SPI interface. Operating current as low as 25µA and lowest dynamic current, maximize battery life. Logic capacity ranges from 2k to 16k logic cells with I/O count from 128 to 384. BGA packages range from 3x4 mm to 12x12 mm. The iCE family of FPGA devices is offered in both volatile and non-volatile versions.

SiliconBlue’s iCEcube VHDL and Verilog-based development software is easy to use and offers a familiar interface to guide developers from concept to bitstream. Synthesis and placement are provided by Magma Design Automation Inc., while routing and bitgen were developed by SiliconBlue.

The development software increases productivity, shortens design cycles and achieves performance and power requirements quickly and efficiently.

The tools include a power estimator spreadsheet for estimating total power of a design.

The iCEman65 evaluation kit provides a complete platform for low-power testing and application development. The board includes an iCE65L04 ultra-low-power FPGA with over 3,500 logic cells, 80 Kbits of RAM and 176 programmable I/O pins.

Designers can quickly and easily develop applications using the USB-based programming solution integrated on board. The kit also includes extensive I/O expandability, supporting four different I/O banks, and a full line of affordable, third-party accessories. Test points provide easy access to all iCE65 voltage rails for easy power measurements.

The first member of the iCE65 family, the iCE65L04, is sampling now with prices starting at $2.00 in high volume. Additional devices in the iCE65 family will be available by the end of the year.

SiliconBlue Technologies Corporation, Sunnyvale, CA. (408) 530-8800. [www.siliconbluetech.com].

portabledesign conference & exhibition Power Management for a Wireless World Conference sessions, Analyst Presentations and Panel Discussions on designing and powering portable, low-power wireless consumer devices.

Complimentary Registration Keynotes Panel Discussions Technical Seminars Exhibition Lunch Networking Reception

September 18, 2008 San Jose, California Wyndham Hotel

Attend for free. Register now. www.portabledesignconference.com sponsored by

products for designers CPLD Family for Low-Power, High-Volume Portable Applications Lattice Semiconductor has announced its new, ultra-low-power CPLD, the 1.8-volt ispMACH 4000ZE family.

This second-generation in-system programmable CPLD family is ideal for low-power, high-volume portable applications, with typical standby current as low as 10 µA. The cost-optimized and feature-rich ispMACH 4000ZE devices offer ultra-small, space saving chip scale Ball Grid Array (csBGA) package options, a new Power Guard feature that provides ultra-low system power, and new system integration capabilities, including an on-chip user oscillator and timer. The ispMACH 4000ZE family will be offered in four logic densities, from 32 to 256 macrocells. Samples of the first two devices, the 32-macrocell ispMACH 4032ZE and the 64-macrocell ispMACH 4064ZE, are available now.

The ispMACH 4000ZE family offers enhanced system features such as Power Guard dynamic power reduction; per pin pull-up, pull-down or bus keeper control; an on-chip user oscillator and timer; and input hysteresis. The Power Guard feature lowers power consumption by selectively disabling unused input pins so their switching does not consume dynamic power needlessly. This feature consists of an enabling multiplexer between the I/O pin and the input buffer and its associated circuitry inside the device. All I/O pins in a block share a common Block Input Enable (BIE) signal. Depending on the device size, there can be from 2 to 16 blocks per device. Any I/O pin in the block can be programmed to ignore the BIE signal, allowing the Power Guard feature to be enabled or disabled on a pin-by-pin basis.

An internal oscillator also is provided for use in miscellaneous housekeeping functions such as watchdog “heartbeat” functions, digital de-glitch circuits and control state machines. The ispMACH 4000ZE family also offers “always on” input hysteresis for each pin. This new feature provides improved noise immunity for 3.3V and 2.5V inputs.

The ispMACH 4032ZE CPLD is available in the 48-TQFP and 64-ball csBGA package. The ispMACH 4064ZE CPLD is available in the 48-TQFP, 64-ball csBGA, 100-TQFP and 144-ball csBGA. Both devices are sampling now and are available in both commercial and industrial temperature options. The entire ispMACH 4000ZE family is expected to be released mid-2008. Projected pricing for the ispMACH 4032ZE is less than $.70 in 100,000 piece quantities, and for the ispMACH 4064ZE less than $.85 in 100,000 piece quantities.

Lattice Semiconductor, Hillsboro, Oregon. (503) 268-8000. [www.latticesemi.com].

High-Performance Singleand Dual-Frequency Crystal Oscillator Modules ON Semiconductor has announced the expansion of its high-performance clock and data management portfolio with the introduction of nine new PureEdge PLL-based clock modules for crystal oscillator (XO) replacement. The NBXxxxx series of devices is ideal for high-speed networking, telecom and high-end computing applications.

The new NBXSBA010, NBXDBA012, NBXDBA014, NBXDBA015, NBXDDA016, NBXDBA017, NBXDBA018, NBXSBA020 and NBXSBA021 crystal oscillator modules use a high Q fundamental mode crystal and analog Phase Lock Loop (PLL) multiplier to provide single or dual frequency, ultra low jitter and phase noise LVPECL/CML differential output. The NBXSxxx (single frequency) / NBXDxxx (dual frequency) family of crystal oscillators includes the industry’s best long-term time domain jitter performance and exceptional device noise floor of -163 dBc / Hz at 10 megahertz (MHz) offset with Phase RMS jitter of 0.4 picoseconds (ps) when integrated 12 hertz (Hz) to 20 MHz allowing bigger clock timing margins for whole system clock tree.

They create sub-picosecond (ps) jitter quality clocks delivering single and/or dual frequency of 100 MHz, 106.25 MHz, 125 MHz, 155.52 MHz, 156.25 MHz, 200.00 MHz, 212.5 MHz, 250 MHz, 311.04 MHz and 312.5 MHz that are ideal for 1x/2x Fibre Channel, SATA, iSCSI, PCIe, SONET / SDH, Ethernet and clock margining applications.

These devices are available in the 5.0 mm x 7.0 mm SMD (CLCC-6) package. The NBXSxxx (single frequency) and NBXDxxx (dual frequency) are budgetary priced at $5.99 for the +/-50 PPM (frequency accuracy) and $7.50 USD for +/-20PPM (frequency accuracy) per unit for 1,000 unit quantities.

ON Semiconductor, Phoenix, AZ. (602) 244-6600. [www.onsemi.com].

Flash Capacitor Chargers with Output Short- and Open-Circuit Protection Maxim Integrated Products has introduced the MAX8685 series of xenon photoflash capacitor chargers with an integrated switching FET, IGBT driver, and output short- and open-circuit protection. The MAX8685F has the fastest charge time of the series and integrates a voltage monitor. The MAX8685C/ MAX8685D are the industry’s smallest xenon photoflash capacitor chargers that include an integrated switching FET and IGBT driver. Due to fast charge time and small size, the various versions of the MAX8685 are ideal for compact and single-lens reflex (SLR) digital still cameras (DSCs), film cameras, cell phone cameras, Web cameras, or personal media players.

Having a programmable current limit of up to 2.6A, the MAX8685F can charge a 100 microfarad capacitor to 300V in 2s, which is 20% faster than the competition. Its resistor-programmable current limit allows for one version of the part to be used across a platform requiring various current-limit settings. The MAX8685F provides a scaled replica of the output voltage to a microprocessor to assist in implementing red-eye reduction. An additional input voltage monitoring feature provides added flexibility by automatically reducing the current limit at low battery voltages for the fastest charge rate under any battery conditions.

Other MAX8685 competitive advantages include an auto-refresh mode, no inrush current, short-circuit protection, open-capacitor protection, and a robust architecture that allows the use of low-cost transformers. This high level of integration makes the MAX8685 devices a series of very versatile, low-solution-cost photoflash chargers.

The MAX8685F is available in a tiny 3 mm x 3 mm, 14-pin TDFN package.

The MAX8685C and MAX8685D, which do not include a voltage monitor or input-voltage monitoring, are available in a 2 mm x 3 mm, 8-pin TDFN package. All versions of the MAX8685 are screened for the extended industrial temperature range (-40° to +85°C). Prices start at $1.50 (1000-up, FOB USA). An evaluation kit is available to speed designs and time-to-market.

Maxim Integrated Products, Inc., Sunnyvale, CA. (408) 737-7600. [www.maxim-ic.com].

44

PORTABLE DESIGN

Qualcomm MEMS Technologies, Inc., a wholly owned subsidiar y of Qualcomm Incorporated, demonstrated the first reflective Interferometric Modulation (IMOD) color mirasol display at the SID 2008 Conference. This move is another step for ward for Qualcomm MEMS Technologies and its phased approach to move mirasol displays into mainstream mobile devices.

The first 0.9-inch IMOD color mirasol display will be introduced

by Freestyle Audio, creator of the world’s first and only waterproof, shockproof and virtually indestructible MP3 player, in its next-generation MP3 player product line. IMOD technology requires no backlighting and reflects light so that wavelengths interfere with each other creating pure, vivid colors. Mobile devices, such as MP3 players and mobile phones, stand to benefit from mirasol displays, which require significantly less power and harness ambient light sources to automatically scale for optimal viewing in virtually any lighting condition.

“The delivery of Qualcomm’s color reflective display constitutes a major milestone for Qualcomm MEMS Technologies and the industry,” said Jim Cathey, vice president of business development for Qualcomm MEMS Technologies, Inc. “Our initial shift from bichrome displays to color will help move mirasol displays into the devices that matter most to consumers and enable mobile devices to finally come out of the shadows and perform in various lighting environments. Freestyle Audio customers will truly benefit from mirasol displays’ low power consumption and sunlight viewability—whether it’s on land or in water.”

San Diego-based Freestyle Audio is a leading provider of action sports audio technology and prides itself on developing products that can withstand all environmental conditions, including water, snow and other extreme environments. Freestyle Audio’s waterproof and shockproof MP3 players allow athletes to significantly enhance their action sports experience with its durable and fully submersible products.

Qualcomm Incorporated, San Diego, CA. (858) 587-1121. [www.qualcomm.com].

Low-Power FPGA-based HMI and Motor-Control Solutions Actel Corporation has announced two plug-in daughter cards developed to manage human machine interface (HMI) and miniature motor control functionality. The new HMI Daughter Card and the Motor Control Daughter Card are offered as plug-ins to Actel’s popular IGLOO Icicle Kit. The HMI Daughter Card demonstrates keypad control, brightness control for white LEDs, color mixing for red, green blue (RGB) LEDs and tone generation, which is beneficial for applications like smart phones, portable gaming consoles and remote control devices. The Motor Control Daughter Card demonstrates brushless DC and stepper motor control and can support a variety of functions often found in portable medical, industrial and consumer applications, such as respirators, infusion and volumetric pumps, smart phones and security cameras.

Leveraging the company’s 5µW IGLOO FPGA, the Icicle Kit showcases the ultra-low-power attributes, flexible implementation options and batterysaving advantages of IGLOO FPGAs for portable applications. The $99 kit allows designers to easily and rapidly program, evaluate and modify their low-power IGLOO-based portable designs. Powered by a rechargeable lithium-ion battery, the 1.4” x 3.6” Icicle evaluation board consumes less than one-seventh the power of competitive FPGA development solutions in a design the size of a small cell phone.

Available now, customers can purchase the Icicle Kit from Actel. The HMI and motor control daughter cards can be purchased from Avnet’s Design Resource Center at http://em.avnet.com/acteligloohmicard and http://em.avnet.com/acteligloomotorcard, respectively. Pricing for the daughter cards is $139 and $229 for the HMI and motor control solutions, respectively. The RTL design files, packaged as design examples, will also be available for free download from Actel’s Web site.

Actel Corporation, Mountain View, CA. (650) 318-4200. [www.actel.com].

Next-Generation MSP430 MCUs Add More Memory, Peripherals Texas Instruments Incorporated has announced the next generation of ultra-low-power MSP430 microcontrollers (MCU), offering the industry’s lowest power consumption for devices that can provide up to 25 MHz peak performance, increased flash and RAM memory and integrated peripherals such as radio frequency (RF), USB, encryption and LCD interfaces. With as low as 160 µA/MHz active power consumption and 1.5 µA in standby, MSP430F5xx MCUs enable longer battery life and the ability to use smaller batteries for portable applications, or no batteries at all for energy harvesting systems that run off of solar power, vibration energy or human body temperature.

With 56 percent more processing performance and double the flash and RAM memory of previous 1xx, 2xx or 4xx generations, F5xx devices help systems perform demanding tasks while operating from very limited power sources.

Designers can tap into peak execution performance of up to 25 MHz while consuming as low as 160uA/MHz. A wake up time of less than 5 microseconds with full status retention from both standby and sleep modes provides full performance on demand and instant reaction to events like external interrupts. Multi-channel direct memory access (DMA) permits data exchange with peripherals while the core remains in low-power modes. The industry’s highest code density among comparable devices maximizes performance while minimizing memory and power requirements.

A true 32-bit real-time clock (RTC) with an alarm requires just 1.5 µA of standby current, enabling batteries to operate without servicing for 20 years or longer. A new, cutting-edge power management module (PMM) offers flexibility to choose the optimum core voltage dynamically for lowest power vs. performance requirements while enabling accurate power on reset and supply voltage supervision with monitoring. A unified clock system (UCS) offers a selection of clocks to achieve the right mix of power and precision, including an option for operation without a crystal.

Intelligent, high-performance digital and analog peripherals consume no power when not in operation, and future F5xx devices will include peripherals such as RF, USB, encryption and LCD interfaces. A new high-resolution timer will offer advanced processing capabilities to enable applications like voice-activated home security systems. Up to one megabyte of linear memory mapping enables robust user interfaces, as well as applications for ZigBee and other low-power RF sensor networks. F54xx devices offer up to 16 KB of RAM and up to 256 KB flash, doubling flash and RAM available on previous MSP430F2xx, F1xx and F4xx devices. The new devices offer read/erase/write capability down to 1.8V and with AAA battery-based application, flash write is possible down to the battery end of life voltage of 0.9V. MSP430F5438IPZ devices are sampling now and MSP430F5437IPN, F5436IPZ, F5435IPN, F5419IPZ and F5418IPN will be released in August 2008, with additional F5xx introductions scheduled for the coming months. Package options include both 80- and 100-pin thin quad flatpacks (TQFPs), the latter with additional general-purpose I/Os. Pricing at 1ku quantities vary from $3.29 to $4.85; F5418IPN devices will be priced at $2.99 in 10ku quantities.

Texas Instruments Inc., Dallas, TX. (800) 336-5236. [www.ti.com].

JUNE 2008

45

products for designers

Qualcomm Introduces First Reflective Color Display

products for designers

Freescale Unveils NextGeneration i.MX Processor for Portable Multimedia Devices

Scalable Multicore Graphics Processing for Portable Designs

Freescale Semiconductor has introduced the i.MX37 multimedia applications processor—a highly advanced device for portable media player (PMP), mobile Internet and portable GPS navigation (PND) markets.

Freescale’s first offering is based on the ARM1176JZF-S core; the device delivers 532 MHz at 1.0V to efficiently drive demanding applications in top-of-the-line portable devices. In lower performance applications such as audio and video playback where power consumption is a primary concern, the i.MX37 processor can run at voltages under 1.0V to achieve the longest possible battery life.

The i.MX37 multimedia applications processor is architected with Freescale’s Smart Speed technology, an intelligent integrative approach that uses hardware accelerators to offload the CPU and a crossbar switch to bring parallelism to the system. The result is a processor that performs with a much higher clock speed, while conserving power for extended battery life The i.MX37 solution integrates Freescale’s most advanced image processing unit (IPU) to date. Freescale’s IPU v3D technology supports up to 24-bit color depth at XGA resolution, enabling large display support for high-end multimedia players and mobile Internet devices. When used in conjunction with the image processing unit, Freescale’s i.MX37’s multimedia hardware acceleration delivers the rich playback experiences required on next-generation multimedia devices.

The device’s multimedia hardware contains logic that decodes industry standard video formats such as MPEG4, H.264, WMV/VC-1, MPEG2 and H.263 up to 576x720 (D1) resolution, which offloads the ARM CPU. This allows the processor to deliver rich user interfaces blended with video playback for an uncompromised user experience. The i.MX37 processor also includes an integrated PAL/NTSC encoder with triple video DACs to deliver a pristine picture on larger displays or televisions over component, composite or S-video interfaces.

Offered in a compact 10x10 MAPBGA package at .5 mm pitch, the i.MX37 multimedia applications processors are designed to enable creation of sleek end devices featuring streamlined form factors. Initial sampling to selected customers is underway now in both Linux and WinCE board support packages.

If ever there were an application that could benefit from parallel processing, it’s graphics acceleration.

ARM has announced the ARM Mali-400 MP scalable multiprocessor graphics solution, capable of delivering performance of up to 1G pixels per second and enabling licensees to serve multiple product markets with the same architecture, while retaining the flexibility to choose the optimum power, performance and area configuration for their application.

ARM Mali-400 MP is a scalable embedded multiprocessor GPU design that enables up to four processor cores to deliver high-end performance graphics processing to a broad range of screen-based devices. The ARM family of Mali GPUs is opening up new product markets that will benefit from graphics acceleration, from mobile feature phones through to 1080p-based iDTVs. Chris Porthouse, senior product manager in ARM’s Media Processing Division, told Portable Design, “Our vision is that any screen QVGA or higher will have a hardware graphics accelerator. In portable devices, the user interface has become a key buying decision. The need for TV output—via HDMI or UWB—is driving high resolution on mobile devices.

You need significant pixel throughput to be able to do this.” Porthouse see the scalable multicore graphics processing design of the Mali-400 MP bringing graphics acceleration to almost any device with a screen.

The Mali-400 MP solution builds on ARM’s experience and knowledge gained in the widely adopted ARM MPCore technology, implemented in the ARM11 MPCore and Cortex-A9 MPCore multicore processors, designed to reduce system bandwidth, optimize performance and reduce power consumption. Porthouse claims Mali software is currently running in 50M handsets.

Mali-200 will continue targeting feature phones; Mali-400 picks up from there.

Power consumption and area efficiency are key aspects of the Mali-400 MP GPU design. The ability to scale performance to meet different price points and power budgets allows the Mali-400 MP GPU to address the widest possible market while bringing significant cost benefits through utilizing the same single software stack across multiple devices.

The ARM Mali-400 MP GPU is available for licensing today.

Freescale Semiconductor, Austin, TX. (800) 521-6274. [www.freescale.com].

ARM Inc., Sunnyvale, CA. (408) 734 5600. [www.arm.com].

Innovative Image Enhancement Technology Enables 3X Zoom without Moving Parts Tessera Technologies, Inc. has announced that its OptiML Zoom solution is now available for licensing. This innovative image enhancement solution combines unique lens design with specialized algorithms to replace traditional mechanical zoom capabilities, enabling 3X optical zoom capabilities in a compact camera module without moving parts.

Mechanical zoom solutions require moving parts, making them too expensive and too large for handset manufacturers to integrate into today’s smaller, thinner cell phones; they also have the potential for mechanical failures.

Digital zoom solutions are inexpensive but provide poor image quality. The OptiML Zoom solution enables camera phone module makers to integrate high-quality optical zoom functionality at a significantly lower cost and with higher reliability, while enabling a reduction in the overall size of the camera module.

The OptiML Zoom solution provides a significant performance advantage when compared to the most advanced digital zoom technologies in use today. The technology incorporates an innovative lens design that distorts an image in a controlled manner, which utilizes oversampling in the sensor periphery to increase the resolution in the center of the image. The result is true optical magnification without loss of detail.

“Tessera’s OptiML Zoom technology addresses many of the issues that have plagued camera phones since day one,” said Tony Henning, senior analyst at Future Image, Inc. “We’re optimistic about the adoption of Tessera’s non-mechanical zoom capabilities by handset OEMs and module manufacturers, and the subsequent widespread availability of higher quality camera phones in the near future.”

The OptiML Zoom solution is now available for licensing from Tessera.

Tessera Technologies, Inc., San Jose, CA. (408) 894-0700. [www.tessera.com].

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PORTABLE DESIGN

Microchip Technology Inc. has announced the industry’s most comprehensive portfolio of 8-, 16and 32-bit USB microcontrollers (MCUs) supported by a single integrated development environment—the free MPLAB IDE. Building on its extensive 8-bit USB PIC MCU offerings, Microchip now offers the low-power 16-bit PIC24F USB family, which is pin, peripheral and software compatible with the new high-performance, 80 MHz, 32-bit PIC32 USB MCUs. In addition, Microchip expands its 8-bit USB product offering at the low end with the lower-cost, smaller-footprint PIC18F1XK50 family. The entire USB PIC microcontroller line is supported with free USB software stacks and USB class drivers.

The PIC18F13K50 and PIC18F14K50 (PIC18F1XK50) are the lowestcost USB MCUs from Microchip, and build on a broad family of existing USB PIC microcontrollers. They provide a host of features not normally found on inexpensive 8-bit MCUs—enabling the addition of embedded USB into a wide range of applications. The PIC18F1XK50 MCUs include a variety of serial communications interfaces, such as USB 2.0, I2C, SPI and USART; enabling them to transfer data between USB and other embedded serial networks.

The 12-member PIC24F USB microcontroller family is the lowest power (2.6 µA standby current) large-memory (up to 256 KB flash and 16 KB RAM) 16-bit USB microcontroller family in the world. As the only 16-bit microcontroller family with integrated USB 2.0 device, embedded-host, dual-role and OTG functionality, the PIC24F makes it cost-effective and easy to add advanced USB features to embedded designs.

The PIC32 microcontroller family members with integrated USB 2.0 OTG functionality bring more performance and memory to embedded designers, while maintaining pin, peripheral and software compatibility with Microchip’s 16-bit microcontroller families. With a maximum operating frequency of 80 MHz, up to 512 KB of flash and 32 KB of RAM, and USB OTG, the PIC32 USB family members enable lower BOM costs and smaller PCB real estate.

All of the new 8-, 16- and 32-bit USB PIC MCU families are supported by the full suite of Microchip’s world-class development tools, including the MPLAB IDE, the MPLAB REAL ICE emulation system, the MPLAB ICD 2 in-circuit debugger and the MPLAB PM3 universal device programmer. Additionally, separate MPLAB C Compilers are available for all three families.

Pricing and Availability The PIC18F1XK50 MCUs are all available in 20-pin SSOP, SOIC, PDIP and 5 x 5 mm QFN packages. The PIC18F13K50 and PIC18LF13K50 MCUs are priced at $1.32 each, in 10,000-unit quantities; the PIC18F14K50 and PIC18LF14K50 MCUs at $1.46 each, in 10,000-unit quantities. Higher-volume pricing is below $1.00, depending upon quantity. General sampling and volume production is expected to be available in June 2008.

The 12-member PIC24FJ256GB1 family is offered in 64-, 80-, or 100pin TQFP package options, and all are available now for general sampling with volume production expected in May 2008. Pricing starts at $3.47 each in 10,000 unit quantities.

The new USB OTG PIC32 family member, the PIC32MX420F032H40I/PT, runs at 40 MHz and features 32 KB of flash memory, comes in a 64-pin TQFP package and establishes a new low-cost entry point for the PIC32 family with USB at $3.25 each in 10,000-unit quantities. Volume production for the first seven general-purpose members of the PIC32 family is available now.

Microchip Technology Inc., Chandler, AZ. (480) 792-7200. [www.microchip.com].

QuickLogic’s ArcticLink Platform Now Available in Wafer-Level Chip Scale Packaging QuickLogic has now made its ArcticLink Customer Specific Standard Product (CSSP) platform available in a tiny Wafer Level Chip Scale Package (WLCSP). The ArcticLink platform family addresses the connectivity needs of mobile devices by offering, in a single device, an array of configurable interfaces and host controllers, including high-speed USB OTG with built-in PHY, storage and networking I/Os and controllers such as SDIO, MMC, CE-ATA, mini-PCI, Compact Flash and SPI/UART, etc. The newly available WLCSP option helps minimize mobile device design size needed to augment processor interfaces and functionality.

The WLCSP packaging option is immediately available for QuickLogic’s ArcticLink CSSP platform family.

QuickLogic Corporation, Sunnyvale, CA. (408) 990-4000. [www.quicklogic.com].

Synopsys Unveils New IC Compiler Router Delivering 10x Speed-Up Synopsys has introduced Zroute, a new multi-threaded router fully integrated into IC Compiler. Driven by leading-edge early users in the microprocessor, consumer, wireless and computergraphics markets, Zroute has been developed from the ground up to take full advantage of the newest multicore microprocessor architectures and to solve emerging design-for-manufacturability (DFM) challenges in IC design.

In an interview with Portable Design, Maria Gkatziani, Synopsys’ marketing manager for Routing Products, claimed that utilizing a combination of advanced routing algorithms and multi-threading technology, Zroute has shown a speed increase of more than 10X on customer designs running on quad-core machines. Designs at smaller geometries result in more litho shorts, resistive vias and a far higher via failure rate; avoiding them requires more sophisticated design rules. Synopsys took this one step farther and is introducing what they consider an entirely new routing architecture in Zroute.

Zroute’s modern architecture incorporates state-of-the-art routing technology, such as native support of soft rules to enable “lithographyfriendly” routing and avoid manufacturing problems. By simultaneously considering the impact of manufacturing rules, as well as timing and other design goals, Zroute delivers high quality of results (QoR) and improved manufacturability. Zroute was developed to take advantage of modern multicore compute platforms.

Zroute is incorporated as a standard feature in IC Compiler, offering an alternate choice for routing technology, which can be enabled by customers as required. Zroute was specifically developed as a concurrent optimization router to deal with future technical challenges. Rather than addressing these issues later in the flow, Zroute’s strategy reserves routing resources for yield optimizations at each step of the flow, enabling their impact to be considered simultaneously with other cost functions.

Additionally, Zroute is multi-threaded at each of its internal steps. Its routing engines have demonstrated near-linear scalability of runtimes as the number of threads increases, promising significant speed-ups for IC Compiler customers transitioning to four- or eight-core platforms and beyond.

Zroute will be in limited production availability as a standard feature in IC Compiler in June 2008.

Synopsys, Inc., Mountain View, CA. (650) 584-5000. [www.synopsys.com].

JUNE 2008

47

products for designers

Microchip Announces Complete Portfolio of 8-, 16- and 32-bit USB MCUs

products for designers

Magma Introduces Flexible, Automated Floorplan Synthesis Product Magma Design Automation Inc. has announced Hydra, an automated floorplan synthesis and hierarchical design planning product with physical optimization capabilities that delivers superior predictability.

Unlike existing floorplanning and prototyping tools, Hydra takes timing, power, congestion and area into consideration and generates an implementation-ready floorplan, reducing turnaround time of very large designs. Hydra combines automated chip planning, automated partitioning and physical block shaping, top-level clock-tree generation and time budgeting for block-level implementation, dramatically improving designer productivity. Unlike traditional approaches that require manual macro placement, Hydra is the first product to offer a fully automated shape-aware and congestion-aware macro placer, enabling rapid and optimal placement of macros without time-consuming manual interventions.

According to Sanjay Bali, Magma product director, Hydra can be used in third-party flows or integrated with Magma’s Talus IC implementation system. Used in conjunction with Talus Design or Talus Vortex, Hydra offers seamless integration from prototyping to implementation within the same data model. Hydra is seamlessly integrated with RioMagic, Magma’s package-aware chip planning solution, enabling early I/O planning and placement tradeoffs for both peripheral and flip-chip packages and fullchip DRC-clean 45-degree redistribution layer (RDL) routing.

Designers can manage the complexity of multimillion-gate designs and reliably achieve timing closure thanks to a number of Hydra capabilities: • Full hierarchical methodology supports bottom-up block-based flows, top-down black-box flows and mixed bottom-up/top-down flows with automated floorplanning, partitioning and time budgeting.

• Early design planning is possible using a netlist consisting of a mix of gates, RTL, macros, black-box models and GlassBox models.

Provides quick design prototype feedback for floorplan, design and timing constraint refinement.

• Automated hierarchy management, physical partitioning, macro placement and soft block shaping not only save considerable runtime and manual effort, but also provide better timing, area and quality of results.

• Relative Floorplanning Constraints eliminate manual intervention when changes need to be made in logical hierarchy or size and shape of physical partitions.

• Leverages the same placement, timing, routing and analysis engines as the Talus IC implementation platform, ensuring a highly predictable flow.

• Based on Magma’s unified data model, Hydra enhances productivity, provides ease of use by eliminating unnecessary, error-inducing and time-consuming file transfers.

Hydra is available as a stand-alone product, or integrated within the Magma flow.

Magma Design Automation, Inc., Santa Clara, CA. (408) 565-7500. [www.magma-da.com].

48

PORTABLE DESIGN

Calypto and Cadence Deliver Optimized Power Flow Calypto Design Systems has announced the availability of an RTL power optimization flow to integrate Calypto’s PowerPro CG product with the Encounter RTL Compiler from Cadence Design Systems, Inc. The integrated flow provides an automated, single-pass sequential analysis capability that produces the lowest power implementation while still meeting design constraints.

By using Encounter RTL Compiler’s multi-objective synthesis and PowerPro CG’s sequential analysis capability, the integrated flow optimizes sequential clock gating by using accurate timing information in the power/ performance trade-off analysis. The collaborative effort has resulted in a seamless design flow that generates RTL code that reduces power in system-on-chip designs. In addition, the collaboration has identified new constructs to be added to the Si2 Common Power Format (CPF) standard that will be beneficial for system-level design flows.

“The integration of PowerPro CG with Encounter RTL Compiler provides our mutual customers with automated sequential RTL clock gating within their existing synthesis environments,” says Nimish Modi, corporate vice president of Front-End Design R&D at Cadence. “This provides customers with additional power optimization while not impacting the performance of their designs.”

Calypto’s PowerPro CG, which is based on patented Sequential Analysis Technology, reduces power by up to 60%. PowerPro CG evaluates circuit behavior across multiple clock cycles to identify and insert sequential clock gating enable logic into RTL designs while maintaining all user-defined pragmas and comments. PowerPro CG consistently produces better results in significantly less time than manual clock gating.

The Cadence Encounter RTL Compiler, a key technology in the Cadence Encounter digital IC design platform and a component of the Cadence Logic Design Team Solution, delivers production-proven global synthesis for faster, smaller and low-power chips in less time. With its unique set of patented global-focus algorithms, combined with physically aware optimization and analysis, Encounter RTL Compiler cuts design time while ensuring the highest quality of silicon.

CPF, a Si2 standard format, is used for specifying power-saving techniques early in the design process, enabling sharing and reuse of lowpower intelligence throughout the design flow. The Cadence Low-Power Solution is the industry’s first complete flow that integrates logic design, verification and implementation with the Common Power Format.

Calypto Design Systems, Santa Clara, CA. (408) 850-2300. [www.calpyto.com].

Cadence Design Systems Inc, San Jose, CA. (408) 943-1234. [www.cadence.com].

Carbon Design Systems has released an enhanced version of Carbon Model Studio, the leading solution for the automatic generation, validation and implementation of hardware-accurate software models, to dramatically reduce the time it takes to develop and deploy new system models. Additional capabilities were added to Carbon Model Studio to reduce the debug time and improve the generation of Model Validation components.

In an interview with Portable Design, Bill Neifert, chief technical officer (CTO) at Carbon Design Systems, maintained that the transaction-level modeling (TLM) that underpins ESL is becoming mainstream, but past approaches don’t scale well. “We’ve seen it go from being something that’s being used for single projects to being scaled out to the enterprise. They’re finding that the issues they encountered with a single project aren’t scaling to 5-10 platforms.

There you may have 20-30 models you need to write, validate, maintain and synch up. That’s the biggest problem encountered when scaling ESL to the enterprise.”

With improved model validation, design teams can control the model validation generation process from inside Carbon Model Studio through a new component editor. The Model Validation component’s mixed-language shadow hierarchy matches that of the original design for tighter integration into complex testbenches, assertion languages and custom validation environments.

A key debug improvement provides increased visibility into complex design constructs. Carbon Model Studio offers full visibility into named and unnamed generate blocks, VHDL composite types and multi-dimensional arrays, including nested arrays and composites. In addition, Carbon Models have new application programming interface (API) calls for accessing design constructs.

Carbon Model Studio is the only model generation solution with integrations to a wide variety of commercial and open source virtual platforms, such as environments from CoWare, MIPS, OSCI SystemC, Synopsys and VaST. It is used by the entire design team, from system architects and software engineers to hardware designers and third-party intellectual property (IP) providers. System architects can use it for architectural analysis and profiling.

Software engineers can develop and debug embedded software, firmware, drivers and diagnostics concurrent with hardware development. Carbon Models can be securely distributed to third-party partners to accelerate adoption of an IP provider’s technology devices.

Carbon Model Studio is shipping now and is available for Solaris and PC platforms running Linux and Windows. Pricing for the complete model-generation and execution solution is “use-model” dependent and starts at $20,000.

Carbon Design Systems, Acton, MA. (978) 264-7300. [www.carbondesignsystems.com].

Virage Logic Delivers Open RTL-to-Test-Floor Embedded Memory Test and Repair Subsystem Virage Logic has announced the availability of a completely open register transfer level (RTL)-to-test-floor embedded memory test and repair subsystem based on the latest release of its flagship Self-Test and Repair (STAR) Memory System and the recently introduced STAR Yield Accelerator. The new release of the STAR Memory System features an open memory interface, giving System-on-Chip (SoC) designers the freedom to use the system’s capabilities with their choice of Virage Logic memories, other commercially available third-party memories or internally developed embedded memories.

The STAR Memory System, when used in conjunction with the STAR Yield Accelerator, provides a complete RTL-to-test-floor embedded memory test and repair solution that addresses the needs of SoC designers, test and product engineers. Created to reduce time-to-tapeout and accelerate time-to-volume, the STAR Yield Accelerator bridges the design and manufacturing disciplines to enable automated test vector generation, silicon debug, fault isolation and classification to be used at the critical semiconductor characterization, bring-up, volume manufacturing and electrical failure analysis stages.

The STAR Memory System provides an integrated, cost-effective solution for embedding on-chip test and repair of memories in designs with a few to a few-thousand memory instances. Repairable or non-repairable embedded memories across any foundry or process node can be incorporated as part of the STAR Memory System to address a broad range of SoC design requirements. The STAR Memory System consists of a complete solution allowing users to select and automatically integrate and verify all of the components required within the system. The STAR Shared Fuse Processor allows users to reduce routing complexity and drastically reduce fuse area, while the STAR Builder automated integration tool enables users to better meet aggressive time-to-volume requirements.

The test floor component of Virage Logic’s complete solution, STAR Yield Accelerator, addresses the requirement to rapidly, cost-effectively and accurately identify, analyze, isolate and classify memory faults as designs are readied for transition from first silicon to volume manufacturing. The STAR Yield Accelerator consists of the STAR Verifier, STAR Vector Generator and STAR Debugger components. Leveraging the infrastructure of the STAR Memory System, the STAR Yield Accelerator automatically generates vectors for test equipment and provides fault analysis and root-cause failure guidance based on silicon test results. Using STAR Yield Accelerator, test and product engineers can rapidly analyze failures manifested in embedded memories and inspect the physical location and class of each fault to determine the root cause without involving the IP vendor or SoC designer.

Working in concert to provide a complete RTL-to-test-floor embedded memory test and repair solution, the STAR Memory System is proven to reduce tapeout schedules for new complex SoCs by weeks, and the STAR Yield Accelerator can reduce silicon bring-up by months, reducing overall time-to-volume production.

The newest release of Virage Logic’s STAR Memory System, supporting Virage Logic, third-party and internally developed memories, is now available and can be licensed on a project basis with pricing starting at $25,000. STAR Yield Accelerator is also available today. Project-based engagements include software and services with pricing starting at $50,000.

Virage Logic Corporation, Fremont, CA. (510) 360-8000. [www.viragelogic.com].

JUNE 2008

49

products for designers

Enhanced Carbon Model Studio Reduces Time to Create Models

second opinion Mobile Phones: A Flash Mainstay?

by Jim Handy, Objective Analysis and Tom Coughlin, Coughlin Associates

T

There has been some discussion in recent years of whether cell phones will continue to use flash or if they will migrate to another technology, perhaps HDDs. After all, hard drives offer significant amounts of storage for a modest price, and cell phones are moving toward models with voracious storage appetites, holding entire record libraries or shooting full-motion video. Will these needs converge to drive cell phones toward an HDD-based model? To see where the market is heading, and to understand why, we must look at the cell phone market and come to terms with its fundamental operating model.

There are two basic models of applications for semiconductors and storage technology: those whose functionality is well defined and limited, and those with a price point, but whose feature set continually improves over time. Figure 1 is a conceptual diagram of how the first model works, and Figure 2 uses a similar diagram to explain the second model. An example of the first is the digital four-function calculator.

A calculatorâ&#x20AC;&#x2122;s features have not evolved over time. We see the same features in these devices that they offered when they were introduced 35 years ago.

The second kind of application, the kind with a fixed price point and evolving features, includes PCs and mobile phones.

Devices with a fixed feature set see the cost of their technology content decline over time

50

PORTABLE DESIGN

figure 1 until the price of the appliance is only minimally influenced Fixed Feature by the cost of the System Set Price technology inside.

Decreasing Decreases Cost of Devices with a fixed Technology price point maintain a relatively constant technology budget, but their feature set grows to keep pace with advances in the Technology price reductions reduce costs of technology. fixed feature applications As the cost of mo(Source: Objective Analysis, 2008) bile phone chips declines due to manufacturing process dimension shrinkage and increased chip integration, there becomes room in the budget to add significant new features. When in doubt, storage is always a good bet. Samsung led the effort to add storage to cell phones in September 2004 with the first hard disk drive enabled phone, and has introduced three other HDD-based models since then. Other companies also introduced cell phones that incorporate HDDs, some of which have sold in some volume, but shipments of these devices seem to be less than one million units. Similar devices are the Toshiba W41T supplied by Japanese carrier KDDI, and the Nokia N91, which has been discontinued because of a smaller-than-expected sales volume. One industry participant explains that HDD-based hand-

figure 2

Decreasing Cost of Technology

Fixed Price Point

Increasing Technology Content

Technology price reductions drive increasing features in applications with fixed price points (Source: Objective Analysis, 2008)

figure 3 2,000

1,500 Millions of Units

sets were introduced about two years before the market was ready for them, and once the market actually did develop, NAND was available at a satisfactory price.

The first NAND-based cell phones predated their HDD counterparts, arriving in 2003 with the advent of card-based storage for picture phones.

Not only were users suddenly able to store hundreds of VGA-quality photos between downloads, but they were also able to migrate to higher-resolution cameras, although that migration has been slowed by the low quality of photos taken on cell phones. Cell phone cameras use tiny lenses that are incapable of capturing the image quality of a larger lens, so users tend to use their phone cameras more for documentary than for artistic purposes.

Today, as NAND densities have grown, sufficient NAND capacities can now be added to a handset to support the use of embedded MP3 players and even video capture and playback.

Several currently available cell phones sport 8 Gbytes of NAND and are sold as MP3 models.

Meanwhile, the mobile handset market is continuing to grow at a strong and steady pace, leading to a confluence of factors that will drive good NAND growth, even though this does not appear to be much of an opportunity for other forms of mass storage like HDDs. Figure 3 illustrates cell phone unit shipments.

At under one million units, the penetration of HDD into the handset has been too small to show up in the chart of Figure 3. It appears that the days of HDD-enabled handsets are over.

Meanwhile, many more phones are being introduced today with ample amounts of internal storage, removing the need for card-based storage. We expect this trend to work against

1,000

500

0 Internal Card HDD

2005

2006

2007

2008

2009

2010

2011

2012

2013

694 126 0.5

664 305 0.6

616 499 0.1

594 655

694 680

799 699

914 704

1,019 712

1,134 701

Mobile phone handset unit shipments (Source: Objective Analysis and Coughlin Associates, 2008)

growing acceptance of flash cards in cell phone handsets, leading to stagnation in the number of handsets that employ memory cards for storage. Even so, this number will level off at roughly 700 million units, not a bad size market for flash cards!

As NAND prices continue to drop over time, the amount of NAND will increase in high-end handsets while the basic 4 Gbytes or 8 Gbytes required for music will migrate to lower-level handsets making music phones more common. This is an embodiment of both types of applications outlined at the beginning of this section. We do not see music as a likely complement to basic handsets since these are most often purchased for their limited functionality as well as for their low price.

Music will not be the main driver for everincreasing capacity in cell phones. NAND larger than 8 Gbytes will start to see large-scale consumption of storage for video. This will include video recorded by the phoneâ&#x20AC;&#x2122;s camera as well as that downloaded from popular video sites like YouTube.

(This article is excerpted from the report: Digital Storage in Consumer Electronics, 2008, by Objective Analysis and Coughlin Associates)

MONTH JUNE 2008

51

ceo interview Wally Rhines

Mentor Graphics

Mentor Graphics’ CEO Wally Rhines rarely sits still—except presumably on the Portlandto-San Jose “nerd bird” that is his second home. Mentor’s performance under his leadership reflects his restlessness. Last year Mentor acquired Sierra Design Automation, whose Olympus-SoC place-and-route system bought Mentor a leading position in this market. Also last year Mentor acquired Dynamic Soft Analysis, a provider of thermal analysis software. nd In the last 12 months Mentor has introduced their Veloce family of next-generation, harder exploration ether your goal ware-assisted verification platforms; expanded speak directly their Questa functional verification product ical page, the ght resource. line; and launched TestKompress Xpress (ontechnology, chip test pattern compression), Precision RTL es and products Plus (FPGA synthesis) and Expedition Entered prise 2007 and Board Station XE (PCB enterprise-wide design flows). While jousting with Cadence, Synopsys and Magma in the various corners of the EDA market, Mentor has managed to pull ahead in physical verification, design concept-through-verification and printed companies providing solutions now circuit board design. exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, mp to a company's technical page, the goal of Get Connected is to put you in touch with right resource.

Whichever levelPortable of In the between his plane trips, Design gy, Get Connected will help you connect with the companies and products you aremanaged searching for. to catch up with Mentor’s peripatetic onnected CEO to get his take on low-power design, ESL, Catapult C vs. SystemC, the fate of EDA startups, the future of the EDA industry and Mentor’s place in it.

End of Article Get Connected

with companies mentioned in this article. www.portabledesign.com/getconnected

52

Portable Design: The major focus in portable designs is getting maximum performance on a very limited power budget.

Mentor helped initiate and standardize the Unified Power Format (UPF). How long will it be before we see a unified tool flow that fully supports UPF—or CPF, for that matter?

PORTABLE DESIGN

Get Connected with companies mentioned in this article.

Rhines: Today UPF is well supported in functional verification, and of course Mentor was the first one to market with a complete functional verification solution for UPF, largely because most of UPF came out of Mentor’s Power Aware RTL. We had customers who had been doing designs for a couple of years—people like Nokia and TI and others—who really were very pleased to see UPF become a broadly adopted standard by other companies. So we worked with Accelera to make it a standard, and it should shortly be an IEEE standard also.

The crux of your question though is it’s not just functional verification; you need to use this in all the other tools and flows, and all of those are in process, particularly place and route and design for test—one spec we feel is quite important. Those will be coming; we can’t pre-announce products. But I think the basic functionality for functional verification is mature. It’s had many years to debug and it works very well.

Portable Design: ESL has been “the next big thing” in systems design for at least 10 years. Just how close are we to having a unified tool flow from algorithmic design down to gate-level verification?

Rhines: Important words there: algorithmic design through synthesis and down to the physical design and net lists. The answer is we are there, and there are dozens of companies in the world using the flow to take their algorithms and optimize them, synthesize them directly, generate the Verilog or VHDL automatically and proceed right through design.

I’ve visited many companies where it is the plan of record, it’s a standard design. System engineers are in fact able to take their algorithms and automatically turn them into Verilog and VHDL. They typically wade through many cycles to get the optimum design; but they become black boxes or white boxes in the designer’s verification cycle, and users tell me that they have never found a logic problem with that.

The important thing about it is the algorithms, which define the data path where you can impact things like low-power design. That’s where you can have a big impact—order of magnitude kind of impact—and that’s exactly who’s using them.

There are companies who have a lot of systems expertise that can experiment with different ap-

proaches to implementation and achieve major reductions in power or improvements in performance or reductions in die size by using direct synthesis. So I’m really excited about this, it’s a really hot area.

Portable Design: You’ve put a lot of energy behind Catapult C in contrast to SystemC. What are their relative merits, and what roadmap do you foresee for each of them?

Rhines: Catapult C thus far has been primarily algorithmic synthesis—the ability to take C code that is typically C/C++; that’s just what the algorithm writer is used to running and is used to verifying and testing. The biggest strength of Catapult C is that you don’t have to change anything, you don’t have to learn a new version of C, you don’t have to write the parallelism into the C that wouldn’t naturally be there; you just take your C or C++ algorithms and implement them.

That’s means that people can adopt much more easily and it’s a painless process. Verilog writers can implement algorithms with standard C++.

SystemC has a lot of strengths, and although it may not be as visible, SystemC is a key part of a lot of products from Mentor, particularly those that move to a higher level of abstraction but not all the way to a C++ language. At these intermediate states of transactional verification and analysis, the implementations in SystemC have allowed us to do things like high-level power and performance optimization; extracting power and performance models from RTL from existing designs; and abstracting it up to a SystemC level, therefore doing architectural exploration—not as high a level as the algorithms but for the entire design, for the physical design. So they each have their unique space, lots of successful products, and I think you’ll see a lot more.

Portable Design: Do you see flavor of C— an inherently serial language—being able to handle the multi-threading challenge of parallel computing once you move beyond a few cores?

Rhines: It’s quite possible that new languages will be developed. I think the best thing, though, is to be able to allow writers of C++—system engineers and algorithm developers—to use the same language they’ve always used and put the

parallelism in as part of the process; that’s what Catapult C does. It unrolls loops; it guides the developer into the introduction of parallelism, into the design so that by performing some fairly simple operations and responses to queries, you’re able to end up with Verilog or VHDL that in fact has the parallelism in it. Then of course we have a fair amount of experience in implementation of multiprocessing algorithms from Verilog or VHDL, so you can take it to the next step as well.

Portable Design: Multicore is all the rage now in the press and at ESC. But the tools for developing parallel applications—especially heterogenous ones—are seriously lacking. Is this an area where EDA vendors will be stepping up to the bat, or is it a “software problem?”

Rhines: This is one where we have as big a need as anyone else. We implement our tools—for years we’ve been running them on multiprocessors: 4way, 8-way or 16-way machines—and now we have single chips with multiple cores. According to what I’m told, this is now called “Core’s Law,” where the number of cores doubles every 18 months. So the opportunity is great.

We are working on implementation of our tools for multicore environments. I believe that the whole software industry will develop lots of innovative tools to help us and to help other developers of software. Then on the embedded side, of course, we have activity where it is a problem for our company to take on to develop the tools for embedded systems and software development that will support multicore, and that of course is a significant part of the current development activity.

Portable Design: The major EDA vendors have been acquiring a lot of small companies of late. How have you seen the EDA landscape changing, and where do you see the market going over the next new years?

Rhines: One way it’s changed is that there aren’t many big companies left. EDA companies have changed in the sense that while some have grown almost exclusively by acquisition, they can no longer add large amounts of revenue through acquisition alone. So from my point of view, this is quite good news for Men-

tor and other companies that have been largely developing their own products because that’s what’s going to be required going forward. You may be able to acquire technology or small companies, but the Big Three today have almost 80% of the total industry, so there won’t be as many companies of size that are attractive targets, and those that are big enough probably already have some overlap.

I think that the industry will focus more on developing and extending existing products among the big companies, and the innovators—the small companies that come in to fill new niches—will be developing ever more specialized niches in order to find those spaces that the big companies aren’t already supporting.

Portable Design: As we move to the next level of system integration, where do you want Mentor to be and how are you going to get there?

Rhines: Mentor is a little different from the other major EDA companies. We started as a systems company selling to military, aerospace and automotive companies and worked our way down to the transistor level and chip design. Our major competitors started at the transistor level and worked their way up. So that’s why you see the mentality you see at Mentor; it’s why for the last 15 years we’ve had major thrusts to produce tools for hardware/software co-design, for embedded software development and higher-level systems solutions and more recently system solutions that cover interfaces to mechanical as well as electrical and software and even optical [devices].

So my vision for the future is that you’re able at a high enough level of extraction to do the trade-offs required for evaluating the design for more dimensions than just the hardware, the software and other design inputs; to evaluate the power, the performance, the cost; and do the trade-offs in real time for complex systems, not just chips and not even just boards, but in fact collections of boards and ultimately automobiles, airplanes and so forth. That’s the goal we have to target, because until we can do those things virtually, the cost and difficulty of development will continue to be a barrier to introducing new systems quickly and effectively.

JUNE 2008

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The RTC Group is a media services company specializing in bringing companies and their products to a focused group of electronic and computer manufacturers. RTC is proud of its track record of blazing new trails in search of marketing value for our clients. Portable Design magazine is the newest addition to RTC Groupâ&#x20AC;&#x2122;s collection of publications.

event calendar

advertiser index Actel Corporation www.actel.com

7

07/15-16/08

2008 Wireless & Mobile Expo and Conference Toronto, ON www.wowgao.com 08/05-07/08

NIWeek08 Austin, TX www.ni.com/niweek 08/26/08

Real-Time & Embedded Computing Conference Montreal, QC www.rtecc.com/montreal2008

ARM Developersâ&#x20AC;&#x2122; Conference www.arm.com/developersconference Austin Semiconductor www.austinsemiconductor.com Linear Technology www.linear.com

31

4

2,55

Microchip Technology, Inc. www.microchip.com/16bit

17

Mouser Electronic www.mouser.com

23

08/28/08

Real-Time & Embedded Computing Conference Ottawa, ON www.rtecc.com/ottawa2008 09/18/2008 (NEW !)

Portable Design Conference & Exhibition Wyndham Hotel - San Jose, CA www.portabledesignconference.com 09/25/08

Real-Time & Embedded Computing Conference Phoenix, AZ www.rtecc.com/phoenix2008 09/30-10/02/08

WiMAX World 2008 Chicago, IL global.wimaxworld.com 10/12-15/08

PCIA Wireless Infrastructure Assoc.

Hollywood, FL www.pcia.com If you wish to have your industry event listed, contact Sally Bixby with The RTC Group at sallyb@rtcgroup.com 54 PORTABLE DESIGN

National Semiconductor www.national.com Portable Design Conference & Exhibition www.portabledesignconference.com

29,56

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