VITA Technologies Fall 2015

p. 6 Editor’s Foreword Supersized options can slow tech adoption

p. 18 Technology Feature Maturing VITA 46.11 to address VPX-specific needs

FALL 2015 | VOLUME 33 | NUMBER 3

@VitaTechnology

On the cover The Fall issue of VITA Technologies highlights the various optical transmission methods engineers use to move computer data at very high rates and discusses the advantages and challenges involved in choosing copper or optical backplane interconnects.

Copper versus optical: The battle begins »» p. 10

By Jerry Gipper, Editorial Director

DEPARTMENTS

6 Editor’s Foreword

Jerry Gipper

Supersized options can slow tech adoption

7 Defining Standards

Jerry Gipper

Come one, come all to improve computing efficiency

8 VITA Standards Update

Jerry Gipper

VITA Standards Organization activity updates

22 Primetime Choices FMC steps it up »» p. 16

By Jerry Gipper, Editorial Director

Advertiser Index 23 Aitech Defense Systems – Our technology investments protect yours 3 Annapolis Micro Systems, Inc. – WILDSTAR OpenVPX Ecosystem 2 Behlman Electronics – Higher 6U power 13 Connect Tech, Inc. (CTI) – GraphiteVPX/GbE and GraphiteVPX/CPU 15 Creative Electronic Systems – COTS and safety certifiable 19 Dawn VME Products, Inc. – You need it right 21 Elma Electronic – Reduce, save, improve 17 Highland Technology, Inc. – Continuing our long term commitment to VME 5 Interface Concept – Build your own VPX system 11 LCR Embedded Systems – Rugged systems engineered for your application

Maturing VITA 46.11 to address VPX-specific needs »» p. 18

By Mark Overgaard, Pigeon Point Systems

2 Orbit Electronics Group and Orbit Power Group – Higher 6U power; higher 6U health monitoring performance 24 Pentek, Inc. – Got tough software radio design challenges 9 VEROTEC Electronics Packaging – Verotec integrated packaging

All registered brands and trademarks within VITA Technologies magazine are the property of their respective owners. ™VPX and its logo is a registered product/trademark of VITA. © 2015 OpenSystems Media © 2015 VITA Technologies enviroink.indd 1

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16/01/2015 16:37

Editor’s Foreword

By Jerry Gipper, Editorial Director @VitaTechnology

jgipper@opensystemsmedia.com

Supersized options can slow tech adoption For years I have been pushing the concept of using innovation to become and remain a market leader. Innovating products can help companies push through difficult financial straits by making their products viable in weak economies. However, this summer I saw how innovation could perhaps impede the market’s ability to adopt new products.

America’s craze for new and innovative products might be hindering our access to some of the better solutions.

While vacationing in Australia for two weeks this summer, I made a couple of observations that led me to reflect on our use of technology in the United States. I made the first observation when paying the taxi fare for the ride from the airport to the hotel. I used my new chip-enabled credit card as I normally would, but instead of taking my card and running it through a swipe card reader, the driver had me personally insert the card into a chip reader without the card leaving my hand.

This happened repeatedly at every opportunity I had to use my credit card. Every ­business I frequented was enabled with chip readers – both mobile and at pointof-sale terminals.

I made the second observation while touring along the Great Ocean Road. At the end of the day, the tour guide stopped for dinner in a small town along the route that offered several fast food options. I chose to go to McDonald’s (called Macca’s in Australia). After entering the restaurant, I was surprised to see several touch screen ordering kiosks set up where you could review the menu, pick from the standard items, or customize your own meal (see example kiosk in Figure 1). I could select my bun, make it cheesy, turn up the taste, freshen it up, and get it saucy! The kiosks presented detailed photos and an itemized list of your selections before confirming your order, which you could pay for with your chip-enabled credit card. Your order number was displayed above the counter when your order was ready.

I was duly impressed by the fact that both of these technology advances were widely used in Australia. In contrast, I have only used my chip-enabled credit card once in the United States, at a Walmart, where it was a bit unreliable and required me to run the card a couple of times before the transaction completed. I had never seen kiosks in any restaurant in the United States like those I saw in Macca’s.

These observations caused me to think about why these types of devices are not common in the United States, the epicenter of the Internet of Things. It struck me that perhaps one of the reasons we are slow to adopt a lot of innovative solutions is because we have too many options. Our economy is not particularly good at filtering options and going with a solution that can be rolled out across the country. Chipenabled credit cards and readers are not new; they have been around for decades, yet we are probably the last major economy to begin using this more efficient solution.

Even now, with the pervasive problems of identity theft and stolen credit card information, we are slow to complete the changeover that is critical to making our financial transactions much more secure.

The Australian Outback was the last place I would have expected to see my first McDonald’s kiosk. I would have guessed my first such experience would be in Silicon Valley.

6 | VITA Technologies Fall 2015

›

Figure 1 | A touch screen-enabled ordering kiosk provides a variety of menu choices for customers at Macca’s (McDonald’s in Australia).

We do see exceptions to this. Apple’s iPod is a classic example of innovation that quickly squeezed out the competition, leaving us with a fairly universal and compatible solution.

I propose that the reason we are sometimes slow to adopt new technology is that we are offered too many choices – so many choices that it takes way too much time for one to bubble to the top.

Competing kiosk companies push their own designs. Take for instance smart phone payment systems. Several have rolled out, yet few businesses use them because of the differences. Regions like Australia see a more limited number of choices and subsequently sort out the winners and losers faster, leading to widespread usage of solid solutions.

Don’t take this as a message to give up on innovation, but as a message that standards provide a way to help innovation gain market traction faster. www.vita-technologies.com

Defining Standards

By Jerry Gipper

Come one, come all to improve computing efficiency For years, knowledgeable companies have had product marketing and engineering teams gather input from existing and potential customers’ engineering teams to define requirements for new products. The process involved plenty of dialogue with target users to identify the problem and develop a solid set of product requirements.

The Internet is enabling a new way of defining products that makes much of this interaction more collaborative with a broader audience.

Facebook’s Open Compute Project (OCP) is a prime example of what can happen if a user opens the door to ideas for ways to solve computing problems.

A small team of Facebook engineers undertook the challenge of creating a scalable computing infrastructure that would be the most efficient and economical design possible. The project resulted in Facebook building its own customdesigned servers, power supplies, server racks, and battery backup systems. The company started with a clean slate to exert total control over every aspect of the system, from the software to the servers to the data center.

The resulting Prineville data center uses 38 percent less energy to accomplish the same work as Facebook’s existing facilities, while costing 24 percent less. When the design team realized they might not have gotten everything right, they opened the technology to the world by forming the OCP Foundation in 2011.

The OCP Foundation is a rapidly growing community of engineers around the world whose mission is to design and enable the delivery of the most efficient server, storage, and data center hardware designs for scalable computing.

The OCP Foundation provides a structure in which individuals and organizations can share their Intellectual Property with Open Compute Projects. www.vita-technologies.com

Several projects are underway in the areas of storage, networking, open racks, data centers, and hardware management that are all tied together through a certification project that addresses interoperability concerns. Facebook is contributing a new common slot architecture specification for motherboards. This specification – ­nicknamed “Group Hug” – can be used to produce boards that are completely vendor-neutral and will last through multiple processor generations.

OCP Foundation membership comprises both individual contributors who have a passion for data centers and corporations that are heavily vested in data center technology. Meetings are public and posted on the website (www.opencompute.org).

The organization has strong principles that drive the direction of community efforts: ›› The technologies behind data centers are understood by their users – they know what they need and want, and can innovate. Collaboration between these users and technology developers is the best way to openly create and develop opportunities for innovation in this space. ›› The organization endeavors to enable the development of the most efficient servers, storage, and data center infrastructure from a useful work per total cost perspective, bringing computing to users at the lowest cost and widest distribution. ›› All infrastructure technology and energy consumption (renewable and nonrenewable) has environmental impact, which should be minimized whenever possible. ›› The base designs that emerge from this project should be freely implemented and improved upon by any and all. ›› Open-source software and hardware democratize access to the best server, storage, and data center technologies available. This project concentrates on open technologies that can be multisourced. ›› Community benefit for all participants – contributors, consumers, and technology suppliers – is critical to accelerate innovation and maximize opportunity throughout the OCP community. ›› Interoperability and compliance are crucial for scaling effectiveness.

Collaboration with industry standards bodies helps balance modularity and customization as needed. ›› Transparency of processes, including communications, promotes participation, respect, honesty, and trust.

The aggressive goals and principles of the OCP Foundation are gaining traction in this era of worldwide collaboration. An open invitation is extended to anyone interested in joining the group’s mission to collectively develop the most efficient computing infrastructure possible.

Existing standards organizations are in a great position to take advantage of this trend, as they already have the collaborative blood in their systems. However, there is much room for improvement in using today’s Internet technology for improving the efficiency of the process. The trend of open collaboration is only going to strengthen, as tools become more natural to use for new projects and new generations of engineers raised on collaboration projects enter the workplace.

VITA Technologies Fall 2015 |

7

VITA Standards Update

By Jerry Gipper jgipper@opensystemsmedia.com

VITA Standards Organization activity updates The Raytheon Corporation hosted the July VITA Standards Organization (VSO) meeting in San Pedro, California. This update is based on the results of that meeting. The Cabrillo Marina was full of sailboats preparing for the start of Transpac 2015, a biannual sailing race to Honolulu.

Contact VITA if you are interested in participating in any of these working groups. Visit the VITA website (www.vita.com) for details on upcoming VSO meetings.

ANSI accreditation

Status: ANSI/VITA 46.11-2015 has been accredited by ANSI. Specifications are available for download by VITA members and are posted at the VITA Store for purchase by the general public.

Accredited as an American National Standards Institute (ANSI) developer and a submitter of Industry Trade Agreements to the IEC, the VSO provides its members with the ability to develop and promote open technology standards. The VSO meets every two months to address embedded bus and board industry standards issues.

VITA 48.4: VPX REDI: Mechanical Specification Using Liquid Flow Through (LFT) Applied to VPX

VSO study and working group activities

Objective: This standard will establish the mechanical design requirements for an LFT cooled electronic VPX module.

Standards within the VSO may be initiated through the formation of a study group and developed by a working group.

A study group requires the sponsorship of one VITA member, and a working group requires sponsorship of at least three VITA members.

Several working groups have current project work underway; the following roundup summarizes those projects.

Status: The working group is developing a vibration test plan, as well as designing a simplified prototype vibration test module and backplane fixture to further validate the concept of removing the two outer guide pins. A first draft version of the standard is out for review to establish the content structure with details filling in as the design solidifies. The goal is to have testing complete and a draft standard ready for review by the end of the year.

VITA 17.1: Front Panel Data Port (FPDP)

ANSI/VITA 49.x: VITA Radio Transport (VRT)

Objective: This standard defines a multi-drop synchronous ­parallel non-addressable bus connection between multiple boards in a single chassis. Extension specifications define protocols for specific use cases.

Objective: The VITA Radio Transport (VRT) standard defines a transport-layer protocol designed to promote interoperability between radio frequency receivers and signal processing equipment in a wide range of applications. The VRT protocol provides a variety of formatting options allowing the transport layer to be optimized for each application. The ANSI/VITA 49.1 VITA Radio Link Layer (VRL) standard specifies an optional encapsulation protocol for VITA 49.0 (VRT) packets.

Work in progress

Status: ANSI/VITA 17.1 has been submitted to ANSI for reaccreditation. A VITA 17.3 working group was formed recently to incorporate the Interlaken protocol for packet transfers scaling from 10 Gbps to 100 Gbps. The current plan of record is for VITA 17.3 to be based on 64B/67B encoding and support channel bonding.

ANSI/VITA 42.0: XMC Switched Mezzanine Card Base Specification

Status: The working group has completed revisions to VITA 49.0 and VITA 49.1; both were approved to be submitted for ANSI accreditation. The VITA 49a working group has completed a document for control packet and spectrum analyzer packet specifications and has voted to submit for ANSI accreditation.

Objective: This standard defines a PMC form factor with open standard switch fabric interconnects.

VITA 57.4: FMC

Status: The draft specification has been approved to move to the ANSI balloting phase.

Objective: This project aims to develop a next-generation specifi­cation calling for a new set of connectors to support higher-speed serial interfaces.

ANSI/VITA 46.11: System Management on VPX Objective: This standard defines a system management architecture for VPX systems.

8 | VITA Technologies Fall 2015

Status: The working group is reviewing pinout proposals and plans to finalize a specification for working group ballot by the end of this year. www.vita-technologies.com

ANSI/VITA 65: OpenVPX Architectural Framework for VPX

Status: The working group is developing a draft document of the specification.

Objective: The OpenVPX architectural framework specification is a living document that is continuously being updated with new profile information and corrections.

VITA 79: Embedded Photonics

Status: The working group is reviewing clocking, keying, and nomenclature proposals for the next release.

Objective: This working group is chartered with developing a standard based on work done by the JEDEC 13.6 subcommittee for photonics. This is the first step in preparing a series of projects to address using optical backplane technology in the future.

VITA 66: Optical Interconnect on VPX – Half Width MT Objective: The VITA 66 base standard defines physical features of a stand-alone compliant blind mate Optical Interconnect for use in VPX systems. This standard defines a Half Width MT style contact variant.

Status: The working group is currently working on developing an environmental qualification document that encompasses complimentary features from various U.S. and European standards.

Status: VITA 66.4 has completed the ANSI public review ballot.

The working group is reviewing comments.

Participating in these working groups is a great way to influence the direction of the next generations of technology important to the critical embedded computing industry. Contact VITA if you are interested in participating in any of these working groups and for details on upcoming VSO meetings.

VITA 67.3: VPX: Coaxial Interconnect, 6U, Four Position SMPM Configuration Objective: This specification details the configuration and interconnect within the structure of VITA 67.0, enabling a 6U VPX interface containing multi-position blind mate analog connectors with up to four SMPM contacts.

Copies of all specifications reaching ANSI recognition are available from the VITA website. For a more complete list of VITA specs and their status, go to www.vita.com/ Specifications.

Status: The working group has begun work on the draft specification.

VITA 68: VPX: Compliance Channel Objective: This standard defines a VPX compliance channel including common backplane performance criteria required to support multiple fabric types across a range of defined baud rates. This allows backplane developers to design a backplane that supports required Bit Error Rates (BER) for multiple fabric types. This also allows module developers to design plug-in modules that are interoperable with other modules when used with a compliant backplane.

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Status: The working group has developed a simulated model and is now collecting actual performance data to help refine the models when the specification goes to “Trial Use” status.

VITA 75: VNX Objective: VNX describes a rugged small form factor subsystem intended to be rugged for deployed environments.

Status: The working group is reconvening to complete the work necessary to take this specification to ANSI accredited status. Interested parties are invited to join the working group.

VITA 78.1: SpaceVPX Lite Systems Objective: This document leverages the work done on ANSI/ VITA 78 to create a specification with an emphasis on 3U module implementations. The most significant change from SpaceVPX is to shift the distribution of utility signals from the SpaceUM to the System Controller to allow a radial distribution of supply power to up to eight payload modules. www.vita-technologies.com

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9

MAIN FEATURE

Copper versus optical: The battle begins

By Jerry Gipper

R&M R&Mfoxs Single Circuit Management System with fiber optic cabling interconnect

The debate over copper vs. optical transmission mediums started the minute it was realized that photons could be used to transmit data. Since then, engineers have been trying to develop methods to economically and practically use various optical transmission methods to move computer data at very high rates. Optical fiber cable is widely used, but optical backplane interconnects remain a rarity. What is the status of embedded optical lanes in a backplane? This article examines current efforts in the rivalry between copper and optical backplane interconnects.

Fiber optics are commonly deployed in telecommunications and data center applications where bundles of fibers are used for communication links. Optical fiber cable can be used as a medium for telecommunication and computer networking because it is flexible and can be bundled as cables. It is especially advantageous for long-distance communications, because light propagates through the fiber with little attenuation compared to electrical cables. This allows long distances to be spanned with few repeaters. Telecommunications led the charge with fiber optics for longhaul transmission lines and wide area networks (WANs). Datacom followed, using fiber optics for local area networks (LANs) within data centers in rack-to-rack and intra-rack networks. Figure 1 illustrates how fiber optics have migrated from telecom to the computing industry within the past 15 years.

High-performance system overview The demand for higher bandwidth throughout the entire architecture of a computer network is continuously pushing the need for speed. Processor performance has far outstripped I/O performance and is craving faster pipes

10 | VITA Technologies Fall 2015

to get data to and from the processing engines. The growth in demand has been greatest in systems, which are I/O intensive rather than computing intensive. A typical system requires the routing of data from many inputs to many outputs, as is found in switched serial fabric architectures such as VPX. The mesh topologies of the VPX switched serial fabric-based architectures create complex levels of interconnection, which is especially significant when compared to the previous VME parallel bus architecture.

The level of fault tolerance and scalability offered by these topologies is also ­significant; however, this forces increased complexity and cost into the backplane, particularly when platforms support protocols with bit rates up to 5.0 Gbps. A fully populated VPX blade supports 192 pairs and 48 single-ended signals.

In terms of PCB design and manufacture, the challenge of developing a backplane with 192 differential pairs in a mesh architecture is significant and costly. Copper traces must be impedance controlled, which means that they must be referenced to a ground plane. Consequently, for each high-speed routing layer there also must be a reference plane, as well as layers for power and slow-speed signals. Therefore, it would not be too difficult to conceive that backplanes in the future with 30 to 40 layers will be necessary to build systems with Terabit routing requirements.

In order for these type of platforms to scale further than 10 Gbps, the level of interconnect will have to rise proportionately or the link speed will have to increase. If a full mesh topology requires 40 Gbps between blades, then this will require more than 5,800 copper traces on the backplane in a bidirectional 14 node system and more than 800 connections per blade.

Challenges of copper technology The first obvious solution to this problem would be to increase the point-to-point link speed over copper traces. However, there are fundamental problems with pushing the www.vita-technologies.com

serial link speed of copper above 5 Gbps through a typical backplane configuration. Additional environmental effects such as temperature and humidity compound the problems facing designers, as well as manufacturing variation in the PCBs and connectors. This forces backplane designers to use more expensive techniques and materials.

Substrates other than FR-4 carry a premium, and the same goes for microvias, buried vias, and backdrilling to eliminate via stubs, along with increasingly more complex and expensive backplane connectors. Even with transceivers that incorporate pre-emphasis in their drive circuits, the effects of insertion loss, crosstalk, and jitter can degrade signals such that operation above 5 Gbps is not viable.

Optical backplane requirements There is a clear advantage to increasing serial link speed as opposed to increasing the number of interconnects.

The most prominent option would be to use optical interconnects; however, this presents a number of issues in itself.

The adoption of optical interconnects

OPTICAL ACCEPTANCE 1980s

1990s

2000s

WAN

LAN

System

Metro/long haul, Internet

Campus, enterprise

Market segment

Telecom

Distance

Multi-km

100s m

# of links

1s

1s – 10s

›

Rack-to-rack

> 2018 Board

Module

Chip

Intra-rack

Module-tomodule, Blade-toblade

Chip-to-chip

On-chip

10s m

<1m

< 10 cm

< 20 mm

1,000s

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Datacom

Computercom

~100 m 100s

Figure 1 | Optical migration into computing

for use in VPX and other switched fabric environments would have to meet the following demands: ›› Optical must coexist with copper on a substrate in order to draw power and slow speed management interfaces. ›› Connectors must be pluggable for field-replaceable units (FRUs). ›› Optical connectors must operate under current environmental conditions in the chassis. ›› The backplane must be a passive electrical and optical element of the system. ›› The solution must be cost-effective.

Optical interconnect challenges The first demand of optical interconnection concerns the development of a mixed copper and optical PCB where both can coexist. Several companies offer fabrication of

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www.vita-technologies.com

VITA Technologies Fall 2015 |

11

MAIN FEATURE optical PCBs incorporating high-density parallel multimode polymer waveguides.

The methods used for manufacturing such PCBs and the tolerances involved are compliant with current techniques, which when combined with a set of design rules, allows waveguides to be laid out by PCB designers in the same fashion as copper.

Waveguides can either be formed on the surface layer of a PCB or embedded within internal layers of the FR-4. Several polymers are available today with characteristics suitable for backplane applications, such as resilience to high temperatures needed for solder processes, low loss at conventional optical wavelengths, and good immunity to long-term degradation.

The second issue concerns the requirement that optical connectors need to be pluggable in a similar fashion to copper connectors. The main problem with optical interconnects concerns the alignment of the driver and receiver elements to the waveguide. Parallel waveguide structures are typically in the order of 70 μm cross-section on a 250 μm pitch, so it is critical to have a reliable, low-cost, and repeatable method of connector alignment. Furthermore, 90-degree corners and multidrop requirements add to the complexity of a pluggable backplane design.

The third point is that it would be mandatory that any optical connector must be able to operate within the parameters of temperature, vibration, and reliability required for platforms that currently use copper interconnects. System availability of 99.999 percent remains a key requirement in telecom and datacom markets; however, in the military markets this is often extended even further.

Point four highlights the fact that existing copper backplanes are passive elements, thus any optical backplane should also be a passive element. Blade systems are popular in applications where they can be removed, especially when a system shutdown is not required. Any fault in an active backplane system would require a complete strip down in order to re­place it, something which is not considered acceptable. The implementation

12 | VITA Technologies Fall 2015

of backplane interconnects should not use active switch components in either copper or optical systems.

The final and perhaps most important point is that in order to be cost-effective, an optical solution should be able to match the price point of copper interconnect or offer a performance improvement metric. Although many different cost models are available for copper vs. optical, the real inflection point will likely be driven by other market conditions such as competition or technology innovation in markets outside of the telecom, datacom, or computercom markets. Cost will remain an excuse until someone else does it first. The industry might have to create and accept new cost models that take into consideration the bandwidth performance of blades and ­systems in order to break through the cost barrier.

To prevent unnecessary conversions from electrons to photons and back, the complete pipeline must be optical. Today, there are too many conversions in a typical system. Optical implementations will really gain traction when the complete chipboard-backplane-board-chip data path can be implemented over optical waveguides.

New form factors for boards, blades, and backplanes might need to be considered.

Designers have stuck with the typical four-sided, multilayer PCB, but what if they tried using other geometries and 3D or 4D dimensions? Would a new pluggable optical backplane be better suited if it were a cylindrical or other shape? New concepts for servers are already emerging from Facebook’s Open Compute Project (www.opencompute.org) that could displace traditional motherboard and blade architects.

Competing technologies that are under research now are also slowing down commercial adoption. There is still ongoing debate between free-space and waveguide transmission, and even within each of these options, there are derivatives supported by competing suppliers. It is going to take a large player in the market making a stand to make one option or another bubble to the top. Waveguide technology seems to have the upper hand, but the technology is still in its infancy.

Optical waveguide technology also holds the promise of enabling passive optical splitters that are independent of data rates, which means that electrical point-to-point buses could potentially be replaced by optical multidrop buses. The possibility of inplane waveguide crossings could enable a reduction of board layer count. In addition, optical waveguide technology is unaffected by electromagnetic interference, which might be an important factor in hostile or sensitive environments.

Current industry status Optical innovation lags in board-to-board (backplane) and chip-to-chip implementations. Many papers have been written and demonstrations made of possible solutions, from waveguide backplanes to embedded optical fibers in a backplane. Several years ago, Defense Advanced Research Projects Agency (DARPA) saw the need for research on chip-to-chip optical interconnection and provided funding for studies on Terabus from 2009 to 2011. Unfortunately, this program is no longer funded by DARPA. IBM produced several demonstrations of Terabus (see Figure 2), but it has never progressed beyond the research stage.

The February issue of the Journal of Lightwave Technology published a white paper titled “Pluggable Electro-Optical Circuit Board Interconnect Based on Embedded Graded-Index Planar Glass Waveguides” that goes into great depth on electro-optical circuit boards (ECOBs) that could possibly be used as the foundation for future optical backplanes. Waveguides offer several advantages over fiber that make their use in backplanes attractive.

I attended the Optical Fiber Communication Conference and Exposition (OFC) in Los Angeles last March. I was hoping to learn more about research on backplanes with optical fibers or waveguides. All I found were a couple of outdated (10-plus-years-old) www.vita-technologies.com

Optochip CMOS IC SLC

VCSEL

PD

SLC

Lens Array

Optomodule Polymer waveguides SLC

Optomodule 2 CMOS IC VCSEL

PD

Lens Array

SLC

Optocard

›

Figure 2 | IBM implementation of Terabus

demonstrations in the IEEE booth. Both demonstrations highlighted connector technology for tapping off the back of a backplane to link into a run of fiber-optic cable.

No signs of functional optical backplanes were in sight.

The Optical Internetworking Forum (OIF) conducts an annual interoperability testing.

The tests conducted in August 2014 included three demonstrations on backplane connector technology that were a bit more up-to-date. These demonstrations showed the OIF-28G-VSR interface comprising a Xilinx evaluation board, a length of cable, and a Finisar CFP4 evaluation board exhibiting interoperability across both electrical and optical interfaces at 25+ Gbps.[1] Again, no practical optical backplane implementations were demonstrated.

More recently, a panel of industry experts met at DesignCon 2015 to discuss the topic “Will the Optical Backplane Ever Happen?” Rick Merritt, UBM, EETimes, captured these comments from the panelists: ›› The optical backplane of the future is still a far future dream. Optics are superior to copper in reach, enabling a larger chassis, but “optics have not demonstrated power efficiency – you waste all the energy in optoelectronic conversions,” said Hong Liu, a Principal Engineer in Google’s platform group. ›› “The feasibility of cost-effective manufacturing is highly unlikely in the short term,” said J. Balachandran, a senior Cisco Systems engineer. Dense wavelengthdivision multiplexing (WDM) will open a door to 100x greater I/O density in systems, a capability that eventually will make a move to optical backplanes inevitable. “That will change the system architecture radically, but there are still a lot of factors to solve, and cost is a key one,” he added. ›› Ed Priest, a Distinguished Engineer at Juniper Networks, predicted a switch to optical backplanes could come at 200G data rates, two major generations from now. “What’s finally going to tip it is …[at some point the SERDES] won’t fit on the ASIC anymore, and once [that happens] you can design a new custom I/O chip that opens [the system] up to optics,” Priest said. “I’m pretty convinced at 100G [serial rates the electronics] will work, but at 200G I don’t know yet,” he said. ›› “I predict the percent of optical backplanes will continue to grow, but very slowly,” said John Monson, VP of sales at SERDES designer MoSys. “They won’t become predominant until electrical alternatives fail, and that won’t happen anytime soon,” he said.

These experts are from the telecom and datacom industries, so their comments must be taken from that perspective. The computercom industry has not been able to fully leverage optical connectivity, and thus is under a different set of pressure points to make decisions perhaps a bit sooner.

VITA member initiatives VITA members have been working on an early generation of optical interconnection with the work done in VITA 66. Blind-mate optical connectors are implemented in a pass-through fashion, allowing backplanes and plug-in modules to mate with the ability to then pass the optical link on to a fiber cable that can be routed either internally or externally to a system. This is still not a fully pluggable optical backplane, but it is www.vita-technologies.com

VITA Technologies Fall 2015 |

13

MAIN FEATURE

›

Figure 3 | Elma 3U OpenVPX backplane with VITA 66.4 optical slots

solving the problems for now. VITA members Elma Electronics and Pentek have announced products that implement the VITA 66 standard (see Figures 3 and 4).

VITA architectures for optical study group VITA members recognize the need for higher-density, higher-performing interconnect technologies to meet the speeds of 10 Gb and higher serial channels that will be used in next-generation critical embedded systems.

Achieving the projected level of combined performance and connector density is no easy challenge. The lead time to develop technologies and supporting specifications is very long. To

›

Figure 4 | Pentek Flexor Model 5973 3U VPX FMC carrier with VITA 66.4 optical connector

that end, VITA launched a study group, VITA Architectures for Optical Study Group, with the mission to research and determine the feasibility of developing a standard architecture for optical interconnects suitable for deployment in critical embedded systems. The study group is focused on high-density options for backplanes and connections between line-replaceable units, mezzanines, and daughtercards.

Innovation on the horizon The study group will move to working group status as the need to develop specifications emerges. Existing standards and those under development by standards

Advantages over copper wiring Optical fiber communication offers several advantages when compared to copper wire systems.

Broad bandwidth Nippon Telegraph and Telephone has modulated per-channel light signals propagating in the fiber at rates as high as 111 Gbps, although 10 or 40 Gbps is typical in deployed systems. In June 2013, researchers demonstrated transmission of 400 Gbps over a single channel using four-mode orbital angular momentum multiplexing.

Each fiber can carry many independent channels, each using a different wavelength of light through wavelength-division multiplexing (WDM). The net data rate (data rate without overhead bytes) per fiber is the per-channel data rate reduced by the forward error correction overhead multiplied by the number of channels (usually up to 80 in commercial-dense WDM systems as of 2008). As of 2011, the record for bandwidth on a single core was 101 terabits per second (Tbps) (370 channels at 273 Gbps each).

The record for a multicore fiber as of January 2013 was 1.05 petabits per second (Pbps). In 2009, Bell Labs broke the 100 Pbps kilometer barrier (15.5 Tbps over a single 7,000 km fiber).

Immunity to electromagnetic interference Light transmission through optical fibers is unaffected by other electromagnetic radiation nearby. The optical fiber is electrically non-conductive, so it does not act as an antenna to pick up electromagnetic signals. Information traveling inside the optical fiber is immune to electromagnetic interference, even electromagnetic pulses generated by nuclear devices.

Electrical insulator Optical fibers do not conduct electricity, preventing problems with ground loops and conduction of lightning.

14 | VITA Technologies Fall 2015

developing organizations (SDOs), as well as appropriate industry alliances, community collaboration efforts, and other groups will be used whenever practical.

The study group will proactively reach out to such groups to facilitate their early involvement. Interested parties are invited to participate in the study group discussions. For more information, visit www.vita.com/VAO.

Optical interconnects must overcome considerable challenges before they can become a reliable technology in critical embedded computing systems.

However, the combination of high-speed, low-power, small-footprint, optoelectronic modules with a data rate-scalable transmission medium prom­ises to meet the demands of future ultra-broadband onboard and backplane interconnection.

While no serious advancements have been made in the development of practical and deployable products using optical interconnections at the board or chip levels, the technology is slowly advancing, leaving room for more innovation. Optical backplanes are still on the horizon, but we are getting closer.

References [1] Multi-Vendor Interoperability Testing of CFP4, QSFP28, and Backplanes with CEI-28G-VSR and CEI-25G-LR Interface During ECOC 2014 Exhibition (September 2014) www.oiforum.com/ public/documents/OIF_Interoperability_ ECOC2014_White_Paper_Final.pdf www.vita-technologies.com

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SPECIAL FEATURE

FMC steps it up

By Jerry Gipper

FPGA Mezzanine Cards (FMCs) are solidly established as a key mezzanine and carrier strategy in high-performance embedded computing platforms. Because FMCs are so firmly established, it is critical to the continued success of this technology that it remain relevant by keeping current with evolving performance demands of the computing industry. To this end, the FMC Marketing Alliance members launched an effort to step up the performance of FMCs. The FMC specification is currently the most frequently downloaded specification in the inventory of nearly 100 VITA specifications. FMC is very popular in many computer market segments that use FPGA technology. The FMC Marketing Alliance, formed in 2010, has more than 20 members that supply either FMCs or FMC carriers in several different form factors. Many more are not officially registered with the FMC Marketing Alliance.

Late in 2014, the effort to update the specification was started. The VITA 57 working group set out to: 1) extend the VITA 57.1 FMC specification to handle up to 32 Gbps to 28 Gbps transceivers on a single module, and 2) maintain backward compatibility between the new and old technologies in line with VITA tradition. Initially, the effort focused on the first priority and started a new working

16 | VITA Technologies Fall 2015

group under the VITA 84 working group, but feedback demanding that backward compatibility be maintained redirected the working group to be named VITA 57.4 so that this focus would not be lost. Suppliers and users alike clearly wanted the ability to plug a VITA 57.1 FMC into a new VITA 57.4 carrier.

Xilinx took the lead in developing the VITA 57.4 specification. Several proposals were made for achieving the working group’s goals of performance and backward capability. The popularity of FMC led to an abundance of prominent ideas from suppliers and users alike. Members spent much of the first weeks discussing the pros and cons of each of the proposals. The group also was quick to adopt the naming convention of FMC+ to identify their new work.

Samtec compared several configurations of the SeaRay connector system used in ANSI/VITA 57.1. To incorporate the additional pins needed for VITA 57.4, Samtec studied 12x40, 14x40, 16x40, and 18x40 pin layouts. The company determined that the 14x40 socket would be most practical, as it would accept the original 10x40 connector and the new 14x40 connector. It would also share contacts and signal integrity characteristics with the existing system.

An optional 4x20 pin auxiliary connector was part of the original proposal. This c­ onnector would extend support beyond 24 GTs to 32 GTs. The working group was concerned about the exact placement of the proposed auxiliary connector on an FMC. Space is very limited, and cooling is constrained. For carrier cards the location of the auxiliary www.vita-technologies.com

connector would be right in the middle of the highest-density area of signal routing related to the FMC site. Keeping the auxiliary connector to one side of the other would minimize congestion near the primary connector. If the auxiliary connector was put on the front side of the main connector, then signal routing could potentially avoid interfering as high-speed routes could go around the primary main connector on the carrier card. The FMC itself has more flexibility, as it only has to route the signals that it needs, usually not all of the SERDES and all LVDS signals.

Other concerns discussed by the working group included reduction of the thermal interface of the wider connector.

A more serious concern was raised about the impact of shock and vibration on the smaller auxiliary connector due to the weaker retention force of small size.

Highland Technology VITA Issue As of the time ofSummer this writing, theinsert working 04/01/15 group is still discussing pinouts. HiTech

Summary of FMC+ VITA 57.4 The VITA 57.4 FMC standard extends the original VITA 57.1 FMC standard by specifying two new connectors that enable additional gigabit transceiver interfaces that run at up to 28 Gbps and eventually 32 Gbps. It also describes FMC+ I/O modules and introduces an electromechanical standard that creates a low overhead protocol bridge between the front panel I/O on the mezzanine module and an FPGA processing device on the carrier card that accepts the mezzanine module.

FMC Marketing Alliance The FMC Marketing Alliance aims to establish an ecosystem of interested parties that promotes and creates name recognition, as well as grow adoption of the FMC specifications and technology. The following companies participate in the alliance by educating, training, and promoting the capabilities of the FMC family of specifications and informing the broader community and press: ›› 4DSP LLC

›› Mercury Systems, Inc.

›› Alpha Data Parallel Systems

›› MoSys

›› Altera Corporation

›› Nutaq

›› Annapolis Micro Systems, Inc.

›› Pentek, Inc.

›› ApisSys SAS

›› Samtec

›› BittWare, Inc.

›› Talent Technology Co., Ltd.

›› CBT Technology

›› TechwaY

›› CES-Creative Electronic Systems

›› Tokyo Electron Device Ltd.

›› Curtiss-Wright Global has also been performing layout NOTE:is KEYLINE NOT PRINT analysis, which being usedDOES to guide ›› Faster Technology refinements to the final pinouts of the ›› Interface Concept TRIM as shown specification.

›› VadaTech Inc. ›› Xilinx

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VITA Technologies Fall 2015 |

17

TECHNOLOGY FEATURE

Maturing VITA 46.11 to address VPX-specific needs

By Mark Overgaard VITA 46.11, System Management on VPX, was adopted as a draft standard for trial use (DSTU) in late 2013. Since then, the VITA 46.11 working group has pursued a systematic plan to complete a fully ratified ANSI/VITA 46.11-2015, which was accomplished in June. This article describes that maturation work and highlights some of the key improvements made to the specification.

ANSI/VITA 46.11, System Management on VPX, defines components, interfaces, mechanisms, and general infrastructure to support the implementation of an interoperable, application-independent management subsystem within VPX that enables features such as inventory, sensor and diagnostic management, and system configuration and recovery.

Standardization of this subsystem is increasingly important, as defense budgets continue to tighten and the demand for cost-effective COTS-based hardware strategies inexorably ramps up. “System management on VPX: Leveraging VITA 46.11 for VPX plug-in modules,” in the Spring 2014 issue of VITA Technologies introduces the standard, with an emphasis on its plug-in module level.

ANSI/VITA 46.11 is based on the management layer defined in PICMG’s AdvancedTCA (ATCA) specification and therefore benefits from more than a decade of demanding field experience with ATCA systems deployed around the world and an active ecosystem of management component suppliers. While

18 | VITA Technologies Fall 2015

strongly leveraging ATCA management, VITA 46.11 has been adapted to the specific needs of VPX applications, including VPX-specific management commands and data structures.

The two largest factors in revising the DSTU to produce ANSI/VITA 46.11-2015 were an organized interoperability testing program for early DSTU implementations and a thorough comparison of the DSTU with the ATCA management specifications from which it was derived. The VITA 46.11 working group organized both initiatives.

How did interoperability testing help identify areas for ANSI/VITA 46.11 maturation?

The working group decided that multi-company interoperability testing was a necessary part of the path from the DSTU to a ratified standard. This was an ambitious choice, because it required participating companies to invest significant effort in: 1) building system management components compliant with the DSTU and 2) coming together to test the interoperability of those components in a systematic way.

VITA sponsored and the working group organized the first VPX System Management Interoperability Workshop (VSM-IW). This event, which took place in September 2014, brought together chassis and modules from multiple VPX product companies for testing. The tested products spanned four distinct management implementations at the module level and two implementations at the chassis level.

One key working group decision in this area was to model the testing approach on that used for ATCA by PICMG, which has presented dozens of ATCA interoperability testing events stretching back to 2002. PICMG agreed to turn over its testing materials as a potential basis for corresponding VITA 46.11 testing. The working group’s original choice to base VITA 46.11 on the management layer of ATCA paid yet another dividend down this path. “Validating the interoperability of VITA 46.11-based system www.vita-technologies.com

stress tested in the system management layer. Figure 1 shows an example maximum configuration chassis with its module population.

During the VSM-IW, participant companies that had developed or configured their management components independently discovered areas where they had interpreted the DSTU differently, resulting in incompatible implementations. Areas like this were queued for resolution by the working group via modifications or sometimes simply clarifications in VITA 46.11.

How did interoperability testing and systematic textual comparison with ATCA influence the evolution of VITA 46.11?

›

Figure 1 | Example maximum configuration chassis tested at the first VSM-IW. System management products from four VITA companies (Elma Electronic, Extreme Engineering Systems, Mercury Systems, and Pigeon Point Systems, the latter now of Pentair) were tested in this chassis.

After the VSM-IW, the working group focused on the various issues identified in the DSTU during VSM-IW preparation and live testing. A key example area was the handling of exceptional events, carefully considering how the application contexts and constraints differed between the ATCA and VPX communities. ANSI/VITA 46.11 now includes content in this area, with appropriate adaptations to the VPX context.

You need it right. You want

management elements,” published in the Fall 2014 issue of VITA Technologies, provides more detail on the preparations and organization for this event.

As indicated in that article, the working group prepared explicit test plans to be used during the VSM-IW to guide testing activities. While many of the plans were leveraged from ATCA, some were created for VITA 46.11 from scratch. Each plan provided step-by-step guidance for testing a particular functional area. Even before the VSM-IW, the creation of these detailed plans was useful in highlighting areas of the DSTU that were incomplete or potentially ambiguous.

For instance, test plan development in the working group highlighted the fact that the DSTU omits a substantial area of the ATCA specification that details how exceptional events (such as temperature threshold crossings) are generated and handled. PICMG test plans for this functionality could not be mapped for VITA 46.11 because that area was simply unaddressed in the DSTU. The VSM-IW testing had two primary components. First, individual pairs of chassis (each with its chassis manager) and module types were tested for interoperability according to relevant test plans. These two-company tests occurred in a series of two-hour test blocks. Second, in a parallel maximum configuration test, separate chassis were filled with additional modules and then www.vita-technologies.com

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VITA Technologies Fall 2015 |

19

TECHNOLOGY FEATURE Specifically, the content illustrated in Figure 2, as well as normative and informative supporting text, were added to VITA 46.11. This additional material was adapted for VPX from corresponding content in the ATCA specification. It explains threshold levels that apply to temperature events in the intelligent platform management interface (IPMI) and provides guidance for how such events should be reported by intelligent platform management controllers (IPMCs) and handled by chassis managers.

Alert conditions are asserted as a sensor detects rising temperatures and de-asserted as a sensor detects falling temperatures, based on thresholds specifically configured for each individual sensor. To avoid generating numerous events while the temperature is moving just above or below a threshold, the system enables hysteresis, in which deassertion occurs only when a temperature falls below the hysteresis level for a given threshold.

Much of this material is covered in the underlying IPMI specifications, but the terminology is different. It is important for clarity and interoperability that this coverage is now included in ANSI/ VITA 46.11-2015.

Other than VSM-IW-related evolution influences, the biggest source of input for ANSI/VITA 46.11 was a systematic comparison of the DSTU with corresponding ATCA specification text. This comparison, though difficult to accomplish, uncovered numerous areas of functional difference.

The working group completed a lengthy review of the differences in each function. For those areas that were important to address in ANSI/VITA 46.11, new specification language was developed and refined as necessary.

One example area of changes identified through this review was in the state machine, which governs and tracks the operational state of VPX field replaceable units (FRUs). The VITA 46.11 architecture diverges significantly from the ATCA architecture in this area, including

20 | VITA Technologies Fall 2015

›

Figure 2 | IPMI event thresholds with hysteresis.

a lack of hot-swap support in VPX. When ATCA requirements were mapped into this different context for the DSTU, some key aspects were missed. These aspects were fixed in ANSI/VITA 46.11.

To summarize the differences between the DSTU and ANSI/VITA 46.11-2015, working group editor and moderator Jeff David of Mercury Systems compiled the following “by the numbers” list: ›› ›› ›› ››

Number of posted working group revisions: 10 Number of months between DSTU and ANSI adoption: 19 Number of pages: 208 in DSTU vs. 231 in the final specification Number of words: 64,562 in DSTU vs. 70,779 in the final specification

In addition to substantial functional changes like those described in this list, ANSI/VITA 46.11-2015 includes numerous editorial enhancements over the DSTU.

How can VPX chassis and modules be equipped quickly with ANSI/VITA 46.11 compliant management?

One way is to take advantage of an adaptable COTS management controller core and customize it to the specific needs of a particular VPX chassis or module. This approach, which is successfully used in the ATCA ecosystem, allows a VPX product implementer to defer to a specialized partner for thorough knowledge of the relevant governing specifications and the corresponding interoperability testing.

One example of this class of adaptable COTS management controller cores is the Schroff Pigeon Point family of chassis-level and module-level controller products.

The Schroff Pigeon Point BMR-A2F-VPX IPMC is a reference h­ ardware/­firmware design based on the SmartFusion intelligent mixed-signal FPGA that is widely used in the ATCA domain. Multiple VPX module vendors are already delivering VPX modules that integrate an IPMC based on a Schroff Pigeon Point board management reference (BMR) design integrated into the module design.

The Schroff Pigeon Point ChMM-700R implements the core of a chassis manager on a small SODIMM-sized module. It can be integrated as a physical module with a carrier board specific to a chassis architecture. Alternatively, its circuitry can be merged with that of the main PCB to form a single-PCB chassis manager implementation. www.vita-technologies.com

manager or IPMC levels, that core can be adapted to the specific needs and constraints of a particular VPX chassis or module. The ANSI/VITA 46.11-2015 specification is available for purchase and download at http://Shop.VITA.com.

Mark Overgaard is the founder and CTO of Pigeon Point Systems. He is a leader in the VITA 46.11 working group and actively contributed to the development of VITA 46.11. Within PICMG, he chairs the HPM.x subcommittee and participates in numerous others.

›

Figure 3 | Example benchtop implementations of COTS solutions for the core of both a chassis manager and an IPMC. Benchtop boards for each controller type include implementations for each controller core, plus a multitude of switches and connectors, intended to help designers become familiar with these solutions.

Figure 3 shows the benchtop implementations of these two solutions, with an intelligent platform management bus (IPMB) cable between them. This benchtop configuration implements an ANSI/VITA 46.11 compliant management layer that can help VITA 46.11 adopters learn about the standard and serve as a “known good” implementation for comparisons when product implementers bring up their adaptations of the COTS solution.

Schroff Pigeon Point chassis- and module-level solutions compliant with the DSTU have already been used to develop chassis and module products from multiple VPX vendors. An ANSI/ VITA compliant updated chassis manager is available now. For module-level controllers, an ANSI/VITA 46.11-2015 compliant BMR IPMC release with modest firmware updates will be available by late 2015. For developers using the DSTU compliant release, the transition to this new release will be straightforward.

One of the most cost-effective ways to implement compliant and interoperable management components for ANSI/ VITA 46.11 (both at the chassis manager and IPMC levels) is to choose an adaptable COTS generic core that supports ANSI/VITA 46.11 and those specifications. At either or both of the chassis www.vita-technologies.com

›

Pigeon Point Systems info@pigeonpoint.com • www.pigeonpoint.com

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Reconfiguration of the Artix-7 FPGA is possible via a direct download into the flash configuration memory over the PCI Express bus or the JTAG port. A four-lane high-speed serial interface over the rear P15 connector for PCI Express Gen 1/2 (standard), Serial RapidIO, or Xilinx Aurora implementations is supported. Rear I/O provides an eight-lane high-speed serial interface on the P16 XMC port. Select I/O or LVDS pairs plus global clock pairs directly to the FPGA via a rear P4 or P16 port.

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Extreme Engineering Solutions, Inc. (X-ES) is leading the parade with the XPedite7572, a secure and high-performance 3U VPX-REDI SBC. It is an optimal choice for computationally heavy applications requiring maximum data and information protection. With integrated SecureCOTS technology, the XPedite7572 protects critical program information from being modified or observed and provides an ideal solution when stringent anti-tamper or information assurance capabilities are required.

The XPedite7572 includes a customizable SmartFusion2 security system-on-chip, which can control and monitor the CPU subsystem, as well as host custom functions such as data encryption.

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Nuclear hardened mission computer for combat vehicles Testing a product at the White Sands Missile Range test facilities usually means that a product is in for a rough time. Curtiss-Wright Controls Defense Solutions’ MPMC-9331 multi-platform mission computer, based on the popular 3U OpenVPX small form factor architecture, is designed to satisfy demanding compute-intensive combat vehicle applications such as ballistic fire control. The rugged mission computer has been fully qualified for a program of record to the ground combat vehicle environment, including nuclear hardening.

The MPMC-9331 provides three payload slots, two of which are pre-integrated with a Vehicular Integration for C4ISR/EW Interoperability (VICTORY)-compliant networking and vehicle maintenance module and a powerful Power Architecture processor module.

The third payload slot is available for system expansion to meet designers’ unique application requirements.

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22 | VITA Technologies Fall 2015

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Established platform parallel bus protocols like VMEbus and CompactPCI still have their place in today’s and tomorrow’s harsh environment, real-time/hard-deadline embedded sub-system applications...especially when these products are upgraded and maintained to keep pace with the newest, fastest processor and memory technologies.

While there are some applications where high speed serial fabrics like VPX are ideal, there are others where VMEbus or CompactPCI still rule the roost.

One company continues to actively invest in maintaining – and not obsolescing – their military and space embedded computing products with a proactive 12-year minimum COTS Lifecycle+™ Program.

And one company continues to also invest in delivering the very best of the newest embedded COTS computing platforms with the new, serial fabric protocols.

And one company actively invests in technology insertion at the board level, creating backplane, pin-compatible products with the latest, next generation memory and processor technologies “on-board”.

And that same company still delivers their legacy bus products at full speed and full capability and full mil temp range (-55 to +85°C) with those latest technologies.

The one company to do all that? Aitech. Check our website to learn more about our technology roadmaps and how they protect your investments.

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Pentek’s Onyx® Virtex-7 FPGA boards deliver unprecedented levels of performance in wideband communications, SIGINT, radar and beamforming. These high-speed, multichannel modules include: • A/D sampling rates from 10 MHz to 3.6 GHz • D/A sampling rates up to 1.25 GHz • Multi-bandwidth DUCs & DDCs • Gen3 PCIe with peak speeds to 8 GB/sec • 4 GB SDRAM for capture & delay • Intelligent chaining DMA engines • Multichannel, multiboard synchronization ® • ReadyFlow Board Support Libraries ® • GateFlow FPGA Design Kit & Installed IP ® • GateXpress FPGA - PCIe configuration manager • OpenVPX, AMC, XMC, PCIe, cPCI, rugged, conduction cooled • Pre-configured development system for PCIe • Complete documentation & lifetime support

With more than twice the resources of previous Virtex generations plus advanced power reduction techniques, the Virtex-7 family delivers the industry’s most advanced FPGA technology.

Call 201-818-5900 or go to www.pentek.com/go/vitaonyx for your FREE online Putting FPGAs to Work in Software Radio Handbook and Onyx product catalog.

Pentek, Inc., One Park Way, Upper Saddle River, NJ 07458 • Phone: 201.818.5900 • Fax: 201.818.5904 • e-mail:info@pentek.com • www.pentek.com Worldwide Distribution & Support, Copyright © 2013 Pentek, Inc. Pentek, Onyx, ReadyFlow, GateFlow & GateXpress are trademarks of Pentek, Inc. Other trademarks are properties of their respective owners.