Embedded Computing Design Spring 2022 with Embedded World Profiles

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Development Kit Selector SPRING 2022 | VOLUME 20 | 1 | EMBEDDEDCOMPUTING.COM

2022 EMBEDDED WORLD Profiles PG 32

Edge AI & Sensor Advancements Enable Predictive IoT Experiences

Michael Hurlston, CEO, Synaptics Inc.

PG 22

Success Story: How Electric Vehicles Can Give Back to the Grid

1NCE IoT connectivity and software for a global, lifetime flat rate PG 43

PG 30

ELMA ELECTRONIC JetSys-5010: NVIDIA® Xavier Powered 3U CompactPCI Serial AI Inference Board PG 17

AD LIST EMBEDDED COMPUTING BRAND DIRECTOR Rich Nass rich.nass@opensysmedia.com EDITOR-IN-CHIEF Brandon Lewis brandon.lewis@opensysmedia.com ASSOCIATE EDITOR Tiera Oliver tiera.oliver@opensysmedia.com ASSISTANT EDITOR Chad Cox chad.cox@opensysmedia.com ASSISTANT EDITOR Taryn Engmark taryn.engmark@opensysmedia.com TECHNOLOGY EDITOR Curt Schwaderer curt.schwaderer@opensysmedia.com MARKETING COORDINATOR Katelyn Albani katelyn.albani@opensysmedia.com CREATIVE DIRECTOR Stephanie Sweet stephanie.sweet@opensysmedia.com WEB DEVELOPER Paul Nelson paul.nelson@opensysmedia.com WEBCAST MANAGER Ryan Graff ryan.graff@opensysmedia.com EMAIL MARKETING SPECIALIST Drew Kaufman drew.kaufman@opensysmedia.com

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CONTENTS

Spring 2022 | Volume 20 | Number 1

FEATURES 6

Arm’s Total Solution to the Hardware/ Software Co-Design Challenge

Make Any Sensor a Smart Sensor with PICMG IoT.1

By David Sandy, PICMG, Chad Cox, Assistant Editor, & Brandon Lewis, Editor-in-Chief

14

Testing and Analyzing the Success of Your Robot Navigation System

14

By Charles Pao, CEVA

18

@Embedded.Computing.Design

@embedded_comp

bit.ly/ECDYouTubeChannel

COVER

By Brandon Lewis, Editor-in-Chief

8

opsy.st/ECDLinkedIn

How HALT Testing and HASS Testing Drive Product Reliability

End users want exceptional experiences from their IoT devices, and the technologies to achieve this are well under way. embedded world 2022 is approaching, providing a perfect place for manufacturers and developers to showcase their latest.

Read more from Synaptics Inc. CEO Michael Hurlston on page 22.

Show profiles from embedded world 2022 begin on page 32.

By Jay Patel, Volansys

24

WEB EXTRAS

How Manufacturers, End-Users, and Regulators Can Close the Embedded Device Security Gap

D emocratizing Silicon Roots of Trust with Software

By Dr. Ang Qui, Red Balloon Security

26

Success Story: How an Industry Collab Helped the World Wildlife Fund Upgrade Polar Bear Tracking Tags

Sponsored by Intrinsic ID

18

O ne Memory to Rule Them All: The Rise of CXL

By Taryn Engmark, Embedded Computing Design

30

Watch On Demand: https://www.bigmarker.com/ Embedded-Computing-Design/DemocratizingSilicon-Roots-of-Trust-with-Software

By Embedded Computing Design Staff Tune In: https://embeddedcomputing.com/ technology/open-source/one-memory-to-rulethem-all-the-rise-of-cxl

Success Story: How Electric Vehicles Can Give Back to the Grid

By Taryn Engmark, Embedded Computing Design

32 2022 EMBEDDED WORLD PROFILES

 Embedded Toolbox: Back to ’Scope Basics – I2C Protocol Analysis

By Brandon Lewis

Watch Now: https://embeddedcomputing.com/ technology/debug-and-test/oscilloscopesanalyzers-generators/embedded-toolbox-back-toscope-basics-i2c-protocol-analysis

Published by:

26

COLUMNS 5

TRACKING TRENDS

CHIPS Act: State of the Art or State of the Practice?

By Brandon Lewis, Editor-in-Chief

4

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TRACKING TRENDS

brandon.lewis@opensysmedia.com

CHIPS Act: State of the Art or State of the Practice?

By Brandon Lewis, Editor-in-Chief I recently came across an 8-bit PIC MCU data sheet that predates 1982. That means it also predates Microchip as a company (incorporated in 1989), making it a remnant of bygone General Instruments days.

That’s not a slight, it’s just a fact. And it’s scary because it opens the door to lobbyists. And like anything else, the winners usually have the best lobbyists, and the best lobbyists usually work for whoever has the deepest pockets.

40 (!) years later, Microchip has released five new families of 8-bit PIC and AVR devices. In total, these families represent more than 60 SKUs that include new features such as ADCs with computation, multi-voltage I/O, and smart peripherals like software-controlled op amps that improve performance while simplifying embedded development. But at their core, they’re still 8-bit MCUs like the one from General Instruments.

Usually, the question of state of the art versus state of the practice doesn’t exist. You use what suits the application, which makes the choice of one category or the other pretty clear. But now the question isn’t “What will you use?”

It’s “What will we make and who’s going to make it?”

The point of this little anecdote is that reliable technology sticks. So, while we spend a lot of time in the electronics media industry covering the newest, smallest nodes manufactured using the latest, most exotic process technologies, the truth is there’s often a big gap between the “state of the art” and the “state of the practice.” In other words, what’s in the news and what’s sitting on a design engineer’s bench can be two very different things.

With CHIPS Act legislation on the table, that difference is more relevant than ever. As a quick refresher, the CHIPS for America Act is a piece of legislation that recently passed in the U.S. Senate and House of Representatives authorizing roughly $52 billion of federal investment to improve onshore semiconductor fabrication capacity, research, and development. A piece of companion legislation, the FABS Act, is also being considered that would institute a semiconductor investment tax credit.

The CHIPS Act is rooted in Trump-era economics instituted largely in response to strategic Chinese technology and manufacturing initiatives to reduce dependence on foreign trade. Now that the CHIPS Act looks more like a reality, the question becomes how the money gets spent.

Broadly speaking about $39 billion is earmarked for the expansion of fabs or building of new ones; $10 to $12 billion will go to R&D; and the remainder will be allocated to the Department of Defense.

Beyond that is still up in the air, which means politicians will play a big role in deciding who gets what and when.

The Best Lobbyist Wins I bet you got concerned when you read the word “politicians.” You should be. Asking a politician to invest billions of dollars in tech is like asking me to win the Iowa caucus. www.embeddedcomputing.com

I spoke with John Costello, Microchip’s Corporate Vice President of Government Affairs, about the state of the art, the state of the practice, and the potential implications of the CHIPS Act. He pointed out that even the iPhone, considered by most to be a pretty advanced piece of technology, only contains about 17 percent of what he’d call “state of the art” ICs. That covers everything from diodes and resistors to the main applications processor, but it’s eye-opening nonetheless when talking about distributing billions of tax dollars.

“If people actually look, they’d be surprised at the disconnect – whether it’s government, aerospace and defense, or the semiconductor industry itself – between what these guys really need and what they really buy,” Costello says.

“I see all the alleged experts start talking about microelectronics and there’s obviously a disconnect.

“I’ve found so many errors that I’ve actually called these guys out, unfortunately in public, ’Hey, that number’s way off,’” speaking of his interactions in the Raegan National Defense Forum, Aerospace Industry Association, and elsewhere. “[I’m] sitting next to a congressperson who’s going to be voting on it. And if they’re voting on that information, you’re doing a disservice to this industry.

“You’re going to spend this money blindly unless you’re really paying attention to what you actually buy,” he continues. “The question is, will they actually address the problem or will the company with the best government relations guys and lobbyists rule the day? That would be my concern as a taxpayer.”

Considering the iPhone analogy and Microchip’s recent launch of 60-plus new 8-bit MCUs, how would you spend the money? On state of the art or state of the practice?

For more, listen to the Embedded Insiders podcast “The Problem with the CHIPS Act, Part 1.”

Embedded Computing Design EMBEDDED WORLD | Spring 2022

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EMBEDDED PROCESSORS & IP

Arm’s Total Solution to the Hardware/ Software Co-Design Challenge

By Brandon Lewis, Editor-in-Chief

Everyone has had a conversation with that experienced engineer or tenured member of the technical staff who’s said, “IoT is nothing new. I’ve been doing that for [insert number of decades], we just called it [insert connected embedded/M2M/other term implying networked equipment].” It’s eye roll-inducing.

And it’s wrong.

T

he IoT has redefined embedded systems engineering as we know it. It has ushered in an era where faster time to market and extended lifecycle support are expected from the same product development teams at the same time. It has forced organizations to abandon traditional development workflows and organizational structures in favor of agile practices and DevOps that can support those expectations.

At their 2021 DevSummit, Arm unveiled Total Solutions for IoT, an ecosystem of tools and IP constructed to reduce barriers to entry in IoT development. The heart of that iterations of the Total Solutions stack revolved around Arm Virtual Hardware (AVH) models of the Cortex-M55 CPU, Ethos-U55 microNPU, and other system and security IP that enabled software build and test before silicon availability.

The explosion of AI and machine learning technology, enabled

by IoT infrastructure, has only accelerated these shifts.

Total Solutions for IoT also introduced a pre-integrated, preverified, and pre-validated IP subsystem called Corstone-300 based on the aforementenioned cores. While on the surface Corstone-300 served as an example subsystem for endpoint AI designs, the tools supplied around it implied much more.

These included:

The increased emphasis on design speed and flexibility driven

by IoT projects has also renewed demand for hardware/­ software co-design solutions. Conceptually speaking, hardware-software co-design has been a part of electronics as long as chipmakers have been defining and implementing instruction set architectures. Only now, it has evolved to the system level through offerings like Arm Total Solutions for IoT that support accelerated application development, sophisticated AI model creation, and comprehensive IoT technology stacks.

› Project Centauri APIs that link RTOS-based devices to the cloud › Off-the-shelf keyword recognition machine learning models › Application-specific reference code

On the Road to a Totally Virtual Development Experience To understand where Arm is headed with its Total Solutions for IoT roadmap you have to consider where we started.

For the first time, application developers had access to an endto-end, silicon-less environment that Arm estimated would shrink development lifecycles by years.

As mentioned, hardware/software co-design principles have been in place for decades. However, they’ve been largely unsuccessful in the embedded and IoT space because of the sheer amount and diversity of hardware solutions that are used. Creating virtual targets for all the components required to build even a relatively simple embedded or IoT device would require massive ecosystem partnerships and datacenters full of models to be effective. And even if those resources were to coalesce in some sort of universal virtual model library, the legions of cloud-native developers being introduced to IoT edge systems for the first time would be completely lost when presented with the heterogeneous spread of virtual hardware targets in need of integration.

Further Down the Road When Arm first launched AVH there wasn’t any production silicon based on the Cortex-M55 CPU, Ethos-U55 microNPU, or Corstone-300 subsystem available anywhere. The only access software developers had to the IP was via freshly minted AVH models hosted in cloud-based virtual machines on the AWS Marketplace.

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Although it was a small collection of IP, it laid the foundation for Arm to expand the Total Solutions for IoT ecosystem while giving cloud-native developers something they could digest and embedded applications engineers enough flexibility to

Embedded Computing Design EMBEDDED WORLD | Spring 2022

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EMBEDDED PROCESSORS & IP

achieve their specific design goals. This was demonstrated in the expansion of the Total Solutions portfolio this spring.

The new and improved Total Solutions for IoT ecosystem now includes seven additional virtual CPU models spanning the Cortex-M0 to Cortex-M33 families. It also adds a virtual version of the new Cortex-M85 CPU core, which exhibits performance improvements over the next-fastest Cortex-M-class device by 30 percent.

With these now part of the AVH environment, two new Corstone IP subsystems were also released. Similar to the Corstone-300, Corstone-310 swaps out the Cortex-M55 CPU core for the new -M85 core while still supporting an optional Ethos-U55 NPU. This makes it a great starting point for voice recognition designs like smart speakers, smart thermostats, and drones.

More groundbreaking advances can be found in the Corstone-1000 subsystem, which is intended as a reference for cloud-native edge devices. It’s based on a Cortex-A53 applications processor, Cortex-M CPU, and secure enclave, and packs enough performance to support rich OSs like Linux. Its integrated security features are also so robust that Arm has precertified the IP subsystem to PSA Level 2 out of the box.

But one of the most significant enhancements to the AVH ­portfolio, at least for those interested in specific hardware functionality, came from scaling up rather than scaling out. This was achieved through the inclusion of virtual models for the Raspberry Pi and NXP and STMicroelectronics development kits in the AVH library.

Virtual models of other boards from Arm silicon partners are expected to be added to AVH soon. And all of this virtual ­hardware – from the processor and security IP to the Corstone subsystems to the development kit targets – are available for free on the AWS Marketplace.

Virtual Hardware: It’s All About the Software Of course, AVH on its own is not enough. To empower software engineers in their continuous integration and delivery efforts, AVH models must be compatible with the automation and development tools they use on a daily basis.

As part of this year’s Total Solutions update, Arm added integrations with the Keil Studio IDE, Jenkins automation servers, and Github for direct access to code repositories.

Programmers working with AVH can also take advantage of improvements to Project Centauri that make it a true software reuse and programming framework. These include expanded support for CMSIS hardware abstraction layer features like Open-CMSIS-CDI and Open-CMSIS-Pack, which help define a common interface for microcontrollers and improve software manageability, respectively. Open IoT-SDK, a reference implementation of Open-CMSIS-CDI, is also a part of Project Centauri that brings example applications to the table that help www.embeddedcomputing.com

Corstone-310 Scripts and outof-the-box testbenches

Subsystem

Ethos-U55 NPU

Cortex-M85

(Optional)

Documentation

AMBA AXI Interconnect (NIC-400) TrustZone Protection Controllers

System Peripherals

System Control

Power Control Kit

Corstone-1000 Scripts and out-of-the-box testbenches

Subsystem

Cortex-A53

Cortex-M

Secure Enclave

Documentation

AMBA AXI Interconnect Message Unit

Secure Debug

System Control

Power Control

The Arm Corstone family of integrated IP subsystems contains all the building blocks required to develop an SoC for end use cases like voice recognition, cloud-native edge devices, and keyword spotting.

FIGURE 1

fast-track the development of voice and keyword recognition solutions, for example.

“If you think about the way software is developed for the IoT today, it’s very tightly coupled to the hardware and every time you add a new piece of hardware you’ve got to kind of start over and port your software,” says Mohamed Awad, VP of IoT and Embedded at Arm. “The ROI is not nearly as great because you’re limited every time you write software to a smaller number of devices.

“By integrating Arm Virtual Hardware into their offerings, it becomes a natural part of the software design,” he continues.

“The point is we’re going to where developers are.”

More and more it appears that “where developers are” is anywhere jumpers and cables aren’t next to a workstation. This makes it hard but to wonder if this foreshadows a not-too-­ distant future in which entire phases of what used to be the typical embedded engineering lifecycle cease to exist.

If that future becomes a reality, just promise you won’t tell colleagues that you remember when hardware-software co-design was called embedded engineering.

Embedded Computing Design EMBEDDED WORLD | Spring 2022

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EMBEDDED & IOT HOW-TOS

Make Any Sensor a Smart Sensor with PICMG IoT.1

By David Sandy, PICMG, Chad Cox, Assistant Editor, & Brandon Lewis, Editor-in-Chief

To accelerate the development and deployment of smart sensors in Industry 4.0 applications, the PICMG IoT.1 specification outlines a standard data model for sensor manufacturers and systems integrators. In Part 1, we look at the requirements of a smart sensor and outline the tools required to make your own.

T

o accelerate the development and deployment of smart sensors in Industry 4.0 applications, the PICMG IoT.1 specification outlines a standard data model for sensor manufacturers and systems integrators. In Part 1, we look at the requirements of a smart sensor and outline the tools required to make your own.

At a basic level, smart sensors are what they sound like. Data acquisition endpoints that integrate some amount of logic for identifying, filtering, and transmitting points of interest from captured data onto other systems.

Data is the foundation of smart factory and Industry 4.0 value, and that data is captured by sensors at the edge.

Transforming that data into intelligence requires the convergence of the IT and OT domains, which begins with smart sensors.

For non-engineers, this is enough to stop a smart sensor initiative before it starts. But for Industry 4.0 to deliver on its value proposition, technologists of all skill levels must be able to develop, deploy, and manage smart sensors with ease.

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Of course, it’s more than that, especially if you’re an enterprise professional who needs to capture and analyze operational data in business intelligence efforts. Smart sensors use sophisticated firmware that’s usually written by embedded engineers with years of experience, and that firmware must be validated and tested to ensure production sensors operate reliably and as expected.

PICMG’s IoT.1 firmware specification was designed with that in mind, and offers a simple, no-code path to creating smart sensors that makes this process easier than ever before.

Embedded Computing Design EMBEDDED WORLD | Spring 2022

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EMBEDDED & IOT HOW-TOS

To understand how PICMG IoT.1 makes this possible, first we need to understand exactly what makes a sensor smart.

sensor and uses a set of predetermined parameters to output usable data to the host.

But unlike the homogeneous world of consumer PCs and mice, sensor integrators today often write their own custom firmware and device drivers.

What Makes a Sensor Smart?

What differentiates a smart sensor from a traditional sensor is the ability for it, and by extension any host, to interpret data in a user-friendly, human-readable format.

While this doesn’t add much, if any, value for the sensor manufacturer, it creates massive interoperability issues across sensors that segment the market – and not in a good way. Recognizing this, and the need for technologists of all skill levels to be able to develop smart sensors quickly and easily, PICMG developed the IoT.1 firmware specification.

You should be able to plug a smart sensor into any device and have it, and its output, be recognized right away.

Just as you plug a mouse into a computer and it is immediately recognized as a mouse so you can start navigating with your cursor, any system you plug a smart thermistor into should immediately read its outputs as ºC or ºF and the value of the outputs as natively formatted on the thermistor.

The magic behind all this is firmware that reads electrical signals generated by the

The PICMG IoT.1 specification defines a standard firmware data model that was designed with simplicity in mind. It can be used by sensor manufacturers to transform normal sensors into smart sensors, and by OEMs and system integrators to pull data from any smart sensor into any design with ease.

With PICMG IoT.1 as a foundation, anyone should be able to configure a smart sensor in minutes.

But first, let’s get a better understanding of PICMG IoT.1 by peeking under the hood at how the spec’s data model will fit into our project.

A data model, for the uninitiated, is a structured way of organizing data that contains specific rules or instructions for how that data is packaged. In situations where you are dealing with vast quantities of data, data models help keep data accessible and easily managed.

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EMBEDDED & IOT HOW-TOS

Think about it as a database record consisting of multiple predefined fields. The data model for a car, for instance, might contain information about the make, model, color, trim style, total miles driven, and so forth. Having a common database representation (data model) that can be used for all cars makes operating on a vast database of car data simple since all the records contain the same fields (Figure 1).

Similarly, a smart sensor data model might configure the unique model number, minimum and maximum values, readout types, and linearization of a smart sensor in preparation for transport to a system. In settings where there may be hundreds or thousands of sensors capturing data, like in a smart factory, there could be dozens of different types of data.

In these cases, data models are critical to keeping track of all that information. After all, data is only useful if it’s usable and it’s only usable if you know what and where it is.

How PICMG IoT.1 Makes Data Usable Users can specify the unique characteristics of their sensor in the IoT.1 data model.

From there, the IoT.1 data model organizes the data into predetermined fields based on the type of data it is, since every sensor has different fields that dictate the sensor raw input, minimum and maximum values, and how the system is to interpret and send commands for that data.

Then the data is ready for transport.

When PICMG developed the IoT.1 data model, they selected two industry-standard communications protocols for data transport: PLDM and MCTP. Each of these protocols operates at different layers in the bi-directional transfer of data.

The Data Management Task Force’s (DMTF’s) PLDM protocol allows operation and interaction with the device’s data model through pre-determined commands. MCTP takes the PLDM requests and provides reliable transport across the system hardware interfaces.

One of the most useful aspects of this communications stack is the ability of the smart sensor to notify the system when it has been plugged in. Upon receiving a discovery request from the sensor, the system can query the device, receive its data model, and integrate it into the system as necessary.

Plug-and-play device discovery would be impossible without the data model.

Next, we will learn how to configure the sensor’s firmware by specifying the data model so that the smart sensor can later be discovered by the system.

How to Create Smart Sensor Firmware Now that we have a more complete understanding of the PICMG IoT.1 data model and why it’s important, it’s time to start configuring the firmware. Usually this would require some amount of programming in languages like C, but PICMG has developed an open-source reference tool for users of the IoT.1 specification that abstracts this complexity and makes the process of developing compliant firmware as simple as filling out a few text boxes.

But first, why is configuring the firmware so important if we’re running it through a data model?

Whereas the data model is a template of what data is needed and how it is represented, the firmware is the implementation of the device that is represented by the data model. In other words, the firmware implements the behaviors of the sensor and contains all the information about the sensor that the system needs to recognize it as a smart sensor.

FIGURE 1 10

A data model can be thought of as a database record for a vehicle that’s comprised of multiple pre-defined fields, each of which can contain different values.

Embedded Computing Design EMBEDDED WORLD | Spring 2022

Without properly configured firmware, the system has no way of telling that a sensor even connected in the first place and the sensor has no way of interacting properly with the system. www.embeddedcomputing.com

“IN SETTINGS WHERE THERE MAY BE HUNDREDS OR THOUSANDS OF SENSORS CAPTURING DATA, LIKE IN A SMART FACTORY, THERE COULD BE DOZENS OF DIFFERENT

to manipulate data even for those without any programming experience. After the necessary data is input, the Configurator exports a JSON file the Builder can use to generate firmware.

[Editor’s Note: More information is available on Github, where the Configurator can also be downloaded for free: https://github.com/PICMG/iot_configurator.]

Configuration at Scale Besides abstracting away the more tedious technical aspects of developing smart sensor firmware, the Configurator allows professional technologists to compile large libraries of configured sensors for mass deployment (Figure 2, 3). This means that a factory that manufactures or uses sensors can easily transform large numbers of them into smart sensors automatically.

The Configurator makes this level of automation possible, for example, by recognizing and presenting the user with the different sensors that support a specific channel in a

TYPES OF DATA.” Automating Firmware Build & Configura­tion in PICMG IoT.1 While a developer could write IoT.1compliant firmware in C that defines all the specific behaviors required by the data model, writing firmware for multiple sensors can be tedious for engineers and impossible for non-programmers to do at all.

To make this process simpler, PICMG developed a sample tool called “The Builder” that generates C-based firmware from user-provided JSON files and installs it onto the target logic device.

[Editor’s Note: The Builder is addressed in more detail in Part 4.

It is not part of the PICMG IoT.1 specification. More information is available on Github, where the Builder can also be downloaded for free: https://github.com/PICMG/ iot_builder.]

FIGURE 2

The PICMG IoT Configurator abstracts the task of writing firmware so non-technical personnel can quickly and easily create and deploy data models.

FIGURE 3

The PICMG IoT Configurator presents users with sensors available to the system that can be selected from a sensor library.

The Builder makes the task of writing firmware easier, as there is no longer a need to create C code. However, the user still has to provide a JSON file, which is much more straightforward than writing C code but can still be confusing and tedious. Enter the final piece of sample software provided by PICMG: “The Configurator.”

The Configurator tool enables simple firmware configuration within a graphical user interface, which makes it easy www.embeddedcomputing.com

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EMBEDDED & IOT HOW-TOS

given sensor library. All the user must do is choose a logical control system (such as PID or PIV) and select one of the supported sensors.

That’s where the Builder comes in.

A “Builder” converts JSON files into machine-readable code then uploads it to the smart sensor hardware. PICMG doesn’t explicitly specify a Builder as part of the IoT.x family of specifications, but they have made reference software available that demonstrates how a Builder could function.

The conversion process with PICMG’s example Builder works a lot like Mad Libs – a story is generated with words left out. Depending on the words that are chosen to fill in the blanks, you can create wildly different meanings.

When PICMG’s sample Builder receives a configured JSON file, it takes the data and splits it into two files as part of the conversion process: “config.h”, and “config.c”. › “config.h” contains the definitions of blocks of code that can be turned on or off. › Active “config.h” definitions are called into the main config.c file to complete firmware code that is unique to the configured data model and smart sensor.

The only thing left is to compile both the config.c and config.h files with the microcontroller’s C compiler toolchain (the builder is intended to work with AVR GNU Debugger, avr-gdb).

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config.h config.c

config.json

Device Configurator

This process is all that’s needed to create a JSON file that defines our smart sensor.

From here, a closer look at the Builder that will convert that JSON into systemreadable C firmware is warranted.

Using the Builder and Getting Started JSON is a great format for storing and transmitting human-readable data objects. However, it’s not designed to be interpreted by machines, and the data needs to be presented in a way our target hardware (the smart sensor) can use it.

Vendor Specific

devices

Sensors/ Effecters

OEM State Sets

config.json “Builder”

Firmware .hex file

GNU Build Tools for AVR

AVRDUDE

Firmware Source Code

The PICMG IoT.1 specification supports all of the tools necessary for non-programmers to configure, compile, and deploy data models in an industrial IoT system or system of systems.

FIGURE 4

Ready to Build Your Own? Ready to build your own interoperable smart sensor? You already have all the knowledge and tools you’ll need to get started (Figure 4).

Just as a quick refresher, here’s a bill of materials snapshot: › Sensor – Any sensor will do, as long as it has a datasheet. › Microcontroller board – For the PICMG Smart Sensor Challenge we used a PICMG MicroSAM board from Triple Ring Technologies based on an 8-bit ATmega MCU. › PICMG IoT.1 Configurator – Software that converts datasheet values into a JSON file to be interpreted by a builder. Download an IoT.1-compliant reference Configurator from Github (PICMG/iot_configurator (github.com)), or use your own that meets the spec requirements. › Builder – Vendor-specific software that accepts the configurator’s JSON file, produces firmware that can be read by the microcontroller board, and deploys it to the target. For the purposes of this demonstration, we have created a reference builder that is available on Github (PICMG/iot_builder (github.com)).

Now you can make any sensor interoperate with any logic device!

[Editor’s Note: If you’re looking for more guidance, an Embedded Toolbox video with PICMG CTO Doug Sandy walks through this entire build process in just a few minutes. You can also head over to the PICMG website to learn more or download the IoT.1 specification.]

David has been instrumental in developing the open source Configurator as part of the PICMG IoT effort. He has been involved with PICMG since 2020 as both an intern and a technical writer. David is currently pursuing his Bachelor’s of Science in Software Engineering at Arizona State University.

Chad is an assistant editor responsible for web content and the IoT Design Weekly newsletter. He graduated with a B.A. in Cultural and Analytical Literature from the University of Cincinnati. After spending some time in the classroom, Chad earned a M.S. in Curriculum Design and Technology, which he enjoyed using to get students engaged in all things technology related. Since leaving the classroom, Chad has dedicated more time to researching and building gaming PCs. Brandon is responsible for guiding content strategy and community engagement across the Embedded Computing Design ecosystem. An 11-year veteran of the electronics media industry, he enjoys covering topics ranging from development kits to cybersecurity and tech business models. Brandon received a BA in English Literature from Arizona State University, where he graduated cum laude. He can be reached at brandon.lewis@opensysmedia.com.

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LEARNING AT THE EDGE: Building Intelligence into the Industrial IoT Endpoint

By Sailesh Chittipeddi, Executive VP and General Manager, IoT, Infrastructure and Industrial Business Unit, Renesas Electronics The Covid-19 pandemic, the proliferation of 5G networks and a shortage of skilled manufacturing workers. What do these have in common? They are three macroeconomic drivers accelerating growth of the Industrial Internet of Things (IIoT).

According to research firm Statista, the installed base of IIoTconnected devices is projected to explode from 16.4 billion this year to nearly 31 billion in 2025 as the world seizes on high-speed wireless technology and plugs into the cloud to automate everything from farming and smart cities to the factory floor of the future.

This wave is already breaking in two directions, with manufacturers simultaneously driving their work streams into the datacenter and out to the edge of the IIoT network. The latter trend is particularly interesting as these IIoT endpoint devices aren’t just growing in number, they’re becoming increasingly intelligent. Why is that? In short, low-latency requirements, significant computing and AI capabilities at very low-power and cost at the end-point, privacy and minimal bandwidth needs.

Having stuck their toe in the proverbial water, manufacturers across every industry have come to realize the potential of IIoT to provide predictive maintenance notifications that eliminate surprise equipment failures, incorporate machine learning to improve productivity and defect detection – even enable passport biometric recognition systems to accelerate airport screening and boarding. Some applications are well served by a heavy reliance on the cloud. Weather forecasting, financial services, and actuarial sciences, for instance, are all fields that collect, process, and distribute enormous data sets and where the datacenter is the logical epicenter for transacting massive compute tasks.

There are a host of other applications, however, for which local data capture and execution is necessary. These require near real-time decision-making without porting workloads to and from the cloud. Amazon’s Alexa virtual assistant was an early example of a device with an instantaneous feedback loop. A blood glucose monitor that controls a body-worn insulin pump is another instance where actionable information must be conveyed immediately. These use cases are bounded by latency

and the need to actuate locally at the sensor node without data traveling to the network endpoint. This is especially true as the IIoT moves increasingly to touchless processing in the form of voice and video capture.

There is a lot of innovation happening here, especially at the foundational access layer, which includes smart sensors, actuators, MCUs, MPUs, ASICs and I/O. The access layer connects the sensor network to the overall control plane, and because it sits closest to the network endpoint it benefits disproportionately from advanced control, monitoring and analysis capabilities.

Early IIoT applications typically ran on a small MCU that performed simple, repetitive tasks. That soon evolved as designers incorporated more advanced MCUs, MPUs and Neural Processing Units (NPUs) capable of running artificial intelligence algorithms and complex compute functions. Even so, these single-core processors were only able to perform jobs sequentially, first sensing the data, and then processing it before sending an instruction to the actuator. The future of IIoT will see multi-core CPUs, multi-threaded neural processing units, and even low-power, cost-efficient FPGAs driving parallel operations to multiple sensors and actuators. This is the intelligence that’s moving toward the IIoT endpoint. This is what will enable automated systems to locally handle most AI-centric workloads below 10 Tera Operations Per Second (TOPS).

With endpoint data creation growth expected to increase at a CAGR of 85 percent from 2017 through 2025, we expect the trend of driving intelligence from the cloud to the IIoT edge will become increasingly common among our customers as hardware and software continue to mature. In the end, however, moving intelligence from the cloud to the IIoT endpoint is only possible if we do so power efficiently and sustainably with a goal to extend battery life and improve product reliability.

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Testing and Analyzing the Success of Your Robot Navigation System

By Charles Pao, CEVA If you’re designing a robot navigation system, for example for an autonomous vacuum cleaner, then it’s important that it can find its way around accurately. After you have decided on the right sensors and put your system together, testing is necessary to prove the navigation algorithms and ensure consistent high performance.

But how do you go about conducting this testing, and measuring performance?

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I

n the case of a ground-roving robot, its localization algorithm must accurately track its location while other algorithms help it achieve its larger function. The algorithms designed for navigation and those fulfilling a robot’s objective are meaningless without proper direction.

This is especially true of a cleaning robot that needs to cover an entire surface to finish its job. The more accurate its mapping, the faster it finishes its job, and the happier the end user. The same principle applies to any ground-roving robot. For instance, accurate movement from a large warehouse’s robots means that customers are getting their products that much faster, thus improving efficiency.

Since wheeled robots tend to move in straight lines, heading accuracy and heading drift (how heading errors change over time) are important metrics. While heading is a component of where the robot is going, it’s where it actually ends up that is most important. Measuring trajectory error, or how far away from the desired endpoint our robot reaches, will help us understand how accurate our system really is.

The Test Environment In this example we have chosen heading and trajectory error as the two most important criteria we are going to investigate. Now, we need a reference point, or truth, to compare to our robot’s outputs. To achieve this by tracking the robot’s motion, an IR-based camera system can provide flexibility, accuracy, and precision. IR-based camera systems are the same technology used for movie motion capture and in robotics labs around the world.

The robot should be tested under conditions like its intended deployment environment – whether that is a mock warehouse, mock hospital, or mock living room.

Environments vary in many ways, such as room sizes, where objects are located, changes in flooring, magnetic fields, and temperature. Ensuring that your test environment can cover these types of changes builds a more robust solution.

For example, CEVA’s robot vacuum testing is done in a mock living room based on an international standard. This standard is highly specific, and contains multiple pieces of furniture, changes in flooring, inclines, bumps, and even requirements for what is on the walls (which is relevant for VSLAM robots). By using this set of obstacles and settings, we can collect heading and trajectory data for the same scenarios that would be seen during use.

Keep It Real Our testing needs to investigate what happens when we change the environment in a way that’s similar to what would occur in the real world. For example, we know that heading errors are introduced due to inaccuracies in inertial sensors caused by temperature changes. We should then verify the operation of our robot across its expected temperature range.

Infrared camera systems provide the flexibility, accuracy, and precision needed to track a robot’s motion.

FIGURE 1

In contrast to our well-organized test environment, we know that the real world is messy. Our robot will frequently be affected by unexpected changes: people or animals will bump into it, there may be other obstacles not in our test setup, or the flooring material may be unexpected.

Testing needs to reflect these scenarios to be robust. The more iterations, the more complete our picture, and the better we can adjust our algorithms to improve system performance.

For example, we might include the following tests:

Testing rooms like this provide a real-world environment for robot vacuum testing.

FIGURE 2

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› Baseline – Changing temperatures within expected range inside the test environment › Bump – Adding sudden orientation change or displacement to emulate incidental bumps › Obstacles – Increasing the number of objects and disruptions › Longevity – Increasing testing run-time to emulate use in an industrial setting Embedded Computing Design EMBEDDED WORLD | Spring 2022

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Ideally, we should run each of these tests multiple times on multiple testing platforms to gather as much data as possible.

This is obviously more costly and complex if you are testing the whole robot.

With our focus on sensors, CEVA tests multiple sensors on the same robot to get as much data as possible. This allows us to track headings relative to truth with multiple data points and gain more insight into how the base and outside factors affect their performance.

Analyze This Data is nothing without proper analysis, and with careful curation we can optimize our robot’s tracking performance.

For instance, with our comprehensive test plan, we can look at how fast the robot’s perceived heading is drifting away from the heading measured by our motion capture system.

You can miss valuable insights if you only summarize heading accuracy with a few numbers (like the heading difference at the end of each trial) because sometimes

FIGURE 3

Cumulative distribution functions (CDFs) allow testers to compare the performance of multiple algorithms in different conditions.

there can be large errors that are later cancelled out by other large errors or maybe one test was mostly accurate except for a brief glitch at the end.

So, instead, we examine the error growth rate at each moment in time (for example, over a rolling 15-second window) and treat each of these as a separate data point.

Then we plot the distribution of these error growth values for each trial in a cumulative distribution function (CDF) as seen in Figure 3. Looking at the plot (lines closer to the left are better here), we can easily compare the median performance versus the worst case or other percentile and identify outliers.

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This helps us determine which sensors and algorithms run with less heading drift than others and shows us how to adjust the values for higher accuracy.

We can perform a similar analysis while looking at trajectory error. It can be measured in several ways: › Absolute error compares the endpoints of the perceived and actual trajectories independently.

This allows us to see the accumulation of heading and distance error over a long trial. › Relative error adjusts the two datasets to the same starting point over each measurement window.

This isolates the accumulation of previous errors from the error growth arising from heading errors. › Reoriented relative error accounts for translation and rotation differences at the start of each measurement window. This isolates the overall error growth per unit distance from previously accumulated errors. This is the most useful metric for identifying the source of trajectory errors, which appear as “hot spots” in the reoriented relative error.

Conclusions Designing and testing a robot navigation system may seem like a difficult task, but by breaking it down into its constituent parts, it becomes more manageable.

With the right sensors and the right software to combine their data, the robot can be as accurate as possible within the project specifications.

The testing approach described in this article can be used to determine the accuracy of a robot and its behavior under typical real-world conditions. By testing in a suitable environment and analyzing the test data appropriately we can ensure that the finished robot behaves as expected, whatever conditions it encounters.

If this process sounds overly complex for dealing with the sensors of your robot, CEVA’s “Navigating the Complexities of Robotic Mapping White Paper” provides a useful guide to help you gain more confidence. It highlights issues to think about when designing a sensor system www.embeddedcomputing.com

for robots (how to get the best sensors, make the right test plan, collect data, and find insight in the analysis) so that a suitable sensor system can be designed for any ground-moving robots.

To download a copy of the whitepaper, visit https://www.ceva-dsp.com/resource/ navigating-the-complexities-of-robotic-mapping-whitepaper/.

Charles Pao started at CEVA Hillcrest Labs after graduating from Johns Hopkins University with a Master of Science degree in electrical engineering. He started work in software development, creating a black box system for evaluating motion characteristics. With a passion for media and communications, Charles started producing demo and product videos for Hillcrest Labs. This passion led to an official position transfer into Marketing. He’s also held various account and project management roles. Charles also earned Bachelor of Science degrees in electrical engineering and computer engineering from Johns Hopkins University.

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How HALT Testing and HASS Testing Drive Product Reliability

By Jay Patel, Volansys

OEMs and enterprises are seeking more robust designs, reduced lifecycle costs, and shorter time to market. Thus, testing and verification of the design, circuits, functionality, and more is crucial at every stage of the product lifecycle.

In this article we focus on highly-accelerated lifecycle test (HALT) and highly-accelerated stress screening (HASS) testing as ways that manufacturers can remain competitive by offering test recommendations prior to manufacturing in the design phase.

H

ALT testing is a kind of stress test­ing to validate product reliability during the engineering development process. HASS testing is primarily used during mass production to screenout weak PCBAs. Both are commonly applied to electronic equipment to help identify and resolve design weaknesses in newly developed products.

During HALT testing, incremental step stressors (temperature, vibration, and combined temperature and vibration) are

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applied until the product fails. Hence, HALT helps determine a product’s weaknesses, operational design margins, and destruct limits before field deployment. HALT is generally performed on a minimum viable product (MVP) prototype device under test (DUT) during the design phase of the product development lifecycle, while HASS is useful for identifying manufacturing flaws during mass production in a very short time.

HALT is an important method for precipitating component-level latent failures in integrated products that might be caused by process or design weaknesses. This makes it necessary to stress test products beyond their desired or expected field deployment conditions and each stress should be applied in a stepwise manner where thermal and vibration stresses increase incrementally. Sometimes, input and output (AC/DC voltage variation) loading stresses can also be applied to power supply units make HALT testing more effective.

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Why is a HALT/HASS Testing Chamber Important?

Unlike other environmental simulation chambers, HALT and HASS chambers offer fast temperature ramp rates (of up to 60ºC per minute) and combine thermal, vibration, and shock simulation in a single apparatus. Vibration levels of up to 50 Grams can be applied simultaneously in three linear axes (X, Y, and Z) and three rotational axes (pitch, roll, and yaw).

How Does HALT Enhance the Reliability of the Product?

HALT testing is basically used to incrementally apply high-stress levels that are known to be beyond the expected field environment for short durations of time.

The benefit of using an incremental step stress approach is to deliberately stretch all variables until any anomalies occur.

As HALT testing is purely designed to precipitate failures, it is not just a simple www.embeddedcomputing.com

FIGURE 1

Complete HALT testing involves five individual test profiles.

FIGURE 2

Complete HALT testing involves five individual test profiles.

pass/fail test but requires root cause analysis (RCA) on certain failures and the prescription of corrective measures to achieve optimum value from the overall testing process. It enhances an engineer’s ability to scrutinize the product’s design and material limitations, while also providing opportunities to continuously improve the design during development and prototyping stages before market launch (Figure 1).

Complete HALT testing includes five different individual test profiles (Figure 2): 1. Low/Cold Temperature Step Stress – This test exposes DUTs to decreasing temperatures of about 10°C steps for about 10-15 minutes per step until the product begins to perform abnormally. The first recorded abnormality is labeled as the lower destruct limit (LDL), indicating the first place further analysis and corrective action should occur. The temperature stress can then be decreased until the product returns to normal operation, which is recorded as the lower operating limit (LOL) for further analysis (Figure 2).

2. High/Hot Temperature Step Stress – This test mirrors the low/cold temperature step stress test only with increasing temperatures. The first recorded abnormality is labeled as the upper destruct limit (UDL)while the threshold at which the product returns to normal operation after the stress test is recorded as the upper operating limit (UOL).

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here the ramp rate temperature change maxes out at a dwell time of about 10 minutes or long enough for the DUT to achieve thermal stabilization while executing test diagnostics. At least five such thermal transition cycles are applied to uncover any weaknesses related to thermal rate/range. Lastly, the HALT chamber is returned to 20°C (room temperature) and the DUT is retested to verify no product performance degradation has occured.

4. Vibration Step Stress – Vibration step stresses securely fastened a product to a vibration table using some kind of mechanical fixture that simulates the DUT’s deployed mounting, orientation, and/or position when installed. The temperature during these tests is set to 20°C (room temperature). Vibrations start at 5-10 Grms and increase by 5/10 Grms with dwell times of approximately 10 minutes so that diagnostics can be performed. This continues until a vibration UOL and UDL are obtained, then the stress is reduced to ambient normal conditions so corrective action can be taken.

5. Combined Environment – Combined stress is the final step in the HALT test process. Considering all previously applied stresses, the same rapid thermal transition profile is used. For vibration, each step will be equal to one-fifth of the destruct limit. Dwell time at each temperature limit is roughly 10 minutes, during which time vibration remains constant. Five such cycles of combined rapid thermal and vibration stepping help uncover any additional defects.

Power on/off cycling may not be appropriate for every product but is sometimes applied at every temperature or vibration step to induce additional electrical stresses simultaneously. Such power cycles should be conducted quickly but with sufficient time to generate any artificial excessive overloads and/or failure modes.

Each of the above tests are conducted with the specific goal of examining material degradation in hot and cold environments or discovering potential electrical and mechanical issues (Figure 3).

When Failures (Inevitably) Occur When a failure occurs during an ongoing test, testing is immediately stopped to record and document the stress level of the failure. After implementing a temporary fix the DUT is tested at continuously higher levels of stress, which helps incur any latent component, design, or manufacturing defects.

To accelerate parallel testing, between one and four DUTs can be tested simultaneously if the DUT size and setup cost is practical given the physical constraints of the HALT chamber. It’s prudent to keep a few spare parts and/or backup units so that repairs or replacements can be administered quickly so testing can continue when a failure occurs.

HALT is not a pass/fail test but helps identify the weakest points of a product design and thus improve its reliability and life expectancy. HALT testing is only considered successful when a failure is produced, a root cause is identified, and corrective action is taken to expand the product’s operational limits. HALT readings and results are used to develop the final HASS screening profile, which is used in post-production processes.

Below is a distribution of type of failures generally observed in typical products that undergo HALT testing (Figure 4).

Benefits of HALT Product Testing › Prevents costly re-design or amendments in the product development cycle › Improves time-to-market by reducing overall product development time › Enables discovery of a design’s physical limitations › Results in more accurate forecasts of product life expectancy and mean time between failures › Delivers quality assurance and more robust, higher quality product designs › Reduces manufacturing screening costs and warranty claims How Does HASS Help in the Screening Production Process?

HASS stress levels are typically lower than those of HALT because the goal is to expose 100 percent of manufactured units (or samples) at a reasonable maximum level of stress to look for faults without reducing the product’s performance or life expectancy.

HASS is a kind of pass/fail testing, and its profile should be finalized after proof-ofscreening (POS) – a process that ensures a screening would not damage working hardware but sufficiently detect product defects. During POS, it’s suggested that the HASS process be run 15 to 30 times to acquire a screening profile that does not excessively damage the product.

FIGURE 3 20

The five HALT test profiles provide a comprehensive overview of a device’s physical limitations for further analysis and remediation.

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In short, HASS testing helps reject production batch samples with early failures resulting from poor labor or manufactur­ing processes. www.embeddedcomputing.com

HALT. It HASS to be Done.

Printed circuit boards are the backbone of any electrical or electronic device.

The functioning of the device depends on the PCB and its components, which plays an important role in the reliability of a product.

FIGURE 4

HALT testing generally reveals five common failure types.

Benefits of HASS Product Testing › Helps in hidden or latent failures precipitation induced by either poor labor or manufacturing processes. › Detects early mortality of weak components to weed-out faulty PCB assemblies › Verifies the integrity of mechanical assembly › Filters out flawed units before reaching end-users and customers › Decreases warranty and RMA/field service costs › Uncovers problems caused by changes in hardware, firmware, or variations in manufacturing › Unveils BOM component supplier quality issues and any part revision changes

As companies look to extend the deployment lifecycle of IoT devices by continuously upgrading their software, they will require robust hardware solutions capable of withstanding the rigors of years or decades in the field. The only way to verify sustained mechanical and electrical performance and operational integrity is through the rigorous testing available via HALT and HASS procedures.

Jay Patel is Principal Engineer at VOLANSYS Technologies, where he has worked for more than 4 years.

He has rich experience in embedded hardware product design including concept/feasibility, system architecture, PoC/MVP, final product certification, and mass production transfers. He also supports field trials and deployments of consumer and industrial products.

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How Can Advances in Edge AI and Sensors Enable Predictive IoT Experiences?

By Michael Hurlston, CEO, Synaptics Inc.

From wireless connectivity, artificial intelligence (AI), and sensing, to automotive displays and security, Embedded World this year has something for everyone interested in transforming an IoT design from a functional device to an exceptional experience for the end user. To understand what this “exceptional experience” means, developers need to look beyond the nuts and bolts of functional requirements to study what it will take to allow users to truly enjoy their IoT device.

Once understood, the good news is that many of the concepts and technologies necessary to deliver new experiences are either available now, or are in various phases of development.

They allow new thinking in how AI principles can be applied in resource-constrained environments to dramatically improve the user experience. Some concepts will excite more study, conversations, and innovation.

Identifying and solving IoT user pain points At a high level, the frustrations end users have with the IoT and its associated devices are known. Bitkom, a German industry association, did a study to attach numbers to the issues and found that users are concerned about cost (37%), complexity (32%), installation complexity (29%), personal data misuse (39%), general privacy (32%) and security (hackers) (41%).

While the study was specific to smart home devices, it’s not a stretch to say these concerns apply to almost any IoT device, which typically comprises three main subsystems; sensing, processing and connectivity. Effectively addressing end-user worries requires innovation along all three axes independently, along with a creative approach to optimize how these subsystems interoperate.

Security and privacy at the edge Security will always be a concern for embedded systems, and rightfully so: the cost of hacks whether at the personal, business, or industrial level, can be devastating. Developers are fighting back by applying classic root-of-trust (RoT) techniques, using appropriate memory partitioning, and incorporating endto-end encryption. If hackers can’t get physical access, firmware

can’t be compromised, and they will most likely move on to more vulnerable attack surfaces.

Closely related to security is privacy. As Bitkom noted, users are concerned about the misuse of their data. One way to prevent misuse is to avoid sending personal data back and forth to the cloud by performing as much of the data processing and analysis as possible on the device itself. This AI processing at the edge also has the benefit of reducing latency for the end user as responses to various sensor inputs can be computed and interpreted locally without any network overhead.

The recently announced low-power Katana SoC with its neural network and its accompanying evaluation kit (EVK) is a good example of such an edge AI solution that can perform inferencing on the data produced by multiple sensor inputs while keeping a lid on power consumption (Figure 1).

Supported by its own highly efficient wireless module, the EVK has sensors for vision, audio, light, and motion, and all the processing is performed on the Katana IC – at the edge – ensuring user privacy and low latency.

The EVK’s vision capabilities are supported by AI algorithms for people counting – used in crowd management – as well as person fall detect, and panel meter reading. Meter reading brings legacy equipment into the industrial IoT (IIoT) revolution by allowing their displayed outputs to be captured and sent for analysis, without having to upgrade or replace the equipment.

AI, sensor fusion, and the power of intent While solutions such as Katana are already stepping up to meet the challenges and requirements of rapidly emerging and evolving applications, there’s also a more nuanced application for edge AI: making the IoT devices themselves easier to use by analyzing usage models and interactions.

For example, difficulties arise on surfaces that respond to touch, as mistouches can be frustrating, or life-threatening, depending upon whether it’s a gaming controller or a missioncritical application such as automotive.

The underlying problem here is that devices are very good at detecting touches, but are not very good at detecting user

EXECUTIVE SPEAKOUT intent. The latter requires more data inputs to understand and apply context. While this can be powerful, adding more sensors, their signal chains, and respective controllers, is very hard to implement in resource-constrained applications where microjoules matter and every square millimeter is hard fought.

A better approach is to integrate as many sensors as possible on a single IC with its own microcontroller. Synaptics took this approach with its recently announced FlexSense™ IC. This innovative semiconductor device integrates capacitive, inductive, Hall effect, and ambient temperature sensing with an MCU and a low-latency, low-power analog front end (AFE) in a package measuring 2.62 mm2 that consumes only 240 microwatts (µW).

There are many reasons to integrate all four sensing modes, ranging from lower cost, faster time to market, simplified supply chains, and ease of configuration, all the way to the use of sensor fusion techniques to improve reliability and overall performance.

In its current instantiation, the immediate applications that can benefit from FlexSense include true wireless stereo (TWS) earbuds and other wearables like those that monitor health, as well as smart home devices, gaming and virtual reality (VR) controllers, and power-sipping remote controls that are integrating ever higher levels of functionality.

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However, the concept of FlexSense, and what it enables, really gets interesting when we start to think about adding even more sensing capability and pairing it with power-efficient AI processors such as Katana, and future generations of the SoC. By combining the two concepts – ultra-low-power edge AI processing and highly integrated “sensing engines” – we can analyze extraordinary amounts of contextual data using advanced AI algorithms with forward learning capabilities to allow IoT devices to actually predict user intent.

Doing this efficiently and effectively at the edge, particularly on battery powered devices, is challenging, as embedded IoT devices tend to be both compute and memory capacity constrained. It’s going to take innovative approaches to algorithm development, processor architecture, and sensor integration to make this vision a reality, and Synaptics stands ready to deliver them. Events like Embedded World open the door to deepdive conversations about where we can best apply our current solutions, while also engaging with fellow innovators on future directions.

Come join us, along with other creators at the edge of AI at the EBV Elektronik Booth #3A-125 in Hall 3A, or follow up with us through www.synaptics.com.

Synaptics Inc. | www.Synaptics.com

The Katana EVK allows experimentation with the Katana SoC, a low-power edge AI processor with its own neural network inference engine. The kit supports multiple sensors, including vision, with associated algorithms for people counting, person fall detect, and industrial panel meter reading. (Image source: Synaptics)

EMBEDDED & IOT HOW-TOS

How Manufacturers, End-Users, and Regulators Can Close the Embedded Device Security Gap

By Dr. Ang Qui, Red Balloon Security

Here are recommendations for overcoming the insecure status quo.

T

he safe and continuous operation of communication satellites, building management systems, energy production, delivery systems, and other essential infrastructure depends on embedded devices that often have highly specific, limited use cases, storage and memory limitations, and limited exposure to the internet.

So, it’s not surprising that security controls on these devices are often lacking, especially compared to higher levels of infrastructure that have undergone extensive cyber defense upgrades over the past decade.

To be sure, some end users are pushing for more security controls on embedded devices. And some manufacturers have engineered them, although not at a rate that is commensurate with the increasing cyber risk. By now it’s clear that industrial control systems (ICS) and their essential devices make attractive targets for bad actors. With international tensions elevated and two new, dangerous, and ICS-capable malware strains identified in early 2022, it is more important than ever that this layer of security be hardened to a very high standard.

But despite increasing recognition that on-device security is essential, there is no clear path to its rapid and extensive adoption in most ICS deployments.

This current impasse has several causes.

Embedded devices are often missioncritical and difficult to take offline and

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upgrade; they have limited storage and memory, which makes security engineering difficult and dependent on firmware expertise that is in limited supply; and security upgrades are often expensive, requiring extensive R&D resources for manufacturers and increases in end users’ procurement costs.

We can achieve robust embedded security despite these challenges before attackers exploit current weaknesses. But manufacturers, end-users, regulators, and security providers must acknowledge their independent and shared responsibility for protecting our critical industries and infrastructure, making strategic changes based on mutual self-interest, and recognizing the importance of investment and collaboration.

Here are considerations for each group that may help accelerate the process.

Device Manufacturers One of the best ways to recognize the value of security investment is to acknowledge the potential losses associated with inaction. Concerns about supply chain integrity and increasingly sophisticated attackers have put many device users on notice. An October 2021 Ponemon report found that 59% of respondents (mostly connected device manufacturers) reported they had lost sales due to product security concerns.

OEMs can defend their market advantage and reputation simultaneously by not ­cutting corners, particularly with the security of new devices. There are two salient reasons for this: 1. On-device security is now essential. As more devices are connected and targeted by attackers, concepts such as “security by obscurity” are becoming obsolete. Increasingly, devices can be accessed through attacks that exploit permissions and legitimate protocols and against which external security controls are ineffective. The devices themselves will need security controls to achieve a truly robust level of protection.

2. Partnerships can help fill the expertise gap. The problem created by a lack of resources can be mitigated by working with security vendors. OEMs can help set a high standard by engaging with leaders in the security field and working to ensure the controls do not compromise device performance. Building effective security features can be an iterative and collaborative process; it will be beneficial to set a high-quality standard for partnerships and security itself.

End Users OEMs will not be incentivized to build out device security if their customers don’t demand it. While the Ponemon report suggests end-users are expecting more, they can create even more demand by accepting these conditions:

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Red Balloon Security

www.redballoonsecurity.com

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EMBEDDED & IOT HOW-TOS

› No matter where responsibility for a cyberattack may lie, the buck typically stops with the service provider. They will bear the reputational damage of a breach. This should provide an incentive for them to demand device features such as secure boot, secure code updates, on-device firewalls, intrusion detection, and authentication capabilities in all mission-critical devices. › They must bear some of the security costs. For the time being, increased embedded device security will mean higher costs for everyone. End-users must accept that the prices of these devices will rise in the short term. However, we can expect costs to decrease as on-device security features become standardized.

Regulators, Standards Bodies, and Government Agencies Regulations such as IEC 62443 and California’s SB327 supply helpful guidance around cybersecurity standards.

However, in most cases, guidance specific to embedded systems is still insufficient. The same is true for Executive Orders and directives such as CISA’s Shields Up. Addressing these oversights would be an excellent first step.

Additionally: › The US Government can use the power of the purse. As some of the most deep-pocketed customers, government agencies can influence OEMs’ decision-making by raising their own security standards.

Executive Order 14028 (Section 4) includes directives for improving the security of supply chains and laying the groundwork for a “labeling” program that can help identify the strong cybersecurity standards in consumer devices. As the Order suggests, USG agencies can influence the public sector if it leads by example. www.embeddedcomputing.com

› Regulations can interlink safety and security concerns. 62443 and other regulations are beginning to reflect the overlap between safety and security engineering. But we need more; experts from both disciplines are necessary to bring regulations into alignment with the current security threats to embedded systems.

Security Professionals and Vendors Security professionals need to recognize the challenges OEMs are confronting and maintain a focus on mutually beneficial solutions by acknowledging other areas of expertise. As threats to ICS safety systems intensify, collaboration will be more critical than ever. Security experts need to listen to product safety engineers and operators and be ready to collaborate on solutions.

Vendors can accelerate the adoption of security features by offering solutions that support devices’ core functionality. When problems arise, they must be ready to work with OEM engineering teams to resolve them.

Dr. Ang Cui is the Founder and CEO of Red Balloon Security, a leading cybersecurity provider and research firm that specializes in the protection of embedded devices across all industries. In addition to publishing innovative research, he frequently provides commentary and thought leadership on the most pressing challenges in cybersecurity today. Dr. Cui earned a Ph.D. in computer science from Columbia University, where he worked extensively in the Intrusion Detection Systems Lab.

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INDUSTRY 4.0 IN ACTION

Success Story: How an Industry Collab Helped the World Wildlife Fund Upgrade Polar Bear Tracking Tags

By Taryn Engmark, Embedded Computing Design

Learn how MistyWest, a sustainability-centric design engineering firm out of Vancouver, British Columbia helped the World Wildlife Fund transform the state of the art in wild polar bear tracking.

P

olar bears are the largest bears on the planet and reside exclusively in the Arctic. Much of their time is spent on frozen sea ice, which has earned them the distinction of “marine mammal,” just like whales, seals, and dolphins.

to be. Polar bears are traveling farther and into new regions. Reduced access to natural food sources like seals means their diets aren’t what they once were.

By now it’s well known that their sea ice habitats, which take shape in the fall and recede in the spring, have been in constant retreat from the impetuous forces of climate change. Polar bear populations have dwindled to somewhere between 22,000 and 31,000 in the wild today, leading to their identification as a Threatened or Vulnerable species.

In May 2008 they were placed under the protections of the United States Endangered Species Act.

One ongoing effort is to produce tracking tags that monitor polar bears in the wild.

Life, for the polar bears that remain, has changed. Less time on the ice and more time on dry land means their home ranges are very different than they used

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Wildlife conservationists like the World Wildlife Fund (WWF) are now looking for ways to track the range of polar bears as the environment changes around them and gain deeper insights into their health.

Outdated Collars Make Way for Time-Release Ear Tags Wildlife tags are a very common research tool for observing animal behavior and migration patterns. But unlike the tags used on other animals, polar bear tags present unique challenges related to the animals’ physical and behavioral characteristics and the hostility of their habitat.

For these and other reasons, including funding, polar bear tracking technology has not seen any major updates since the 1980s. The state of the art has been collar tags, but these can only be used on females because the circumference of male polar bears’ necks is larger than their heads. Polar bear activity and behaviors also make them highly susceptible to damage.

So, in 2016 WWF and IDEO hosted a workshop where polar bear experts defined parameters for an “ideal” polar bear tracking device. The solution needed an antenna that could transmit sensor data from the tracking device to orbital satellites, but also

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INDUSTRY 4.0 IN ACTION

FIGURE 1 The open-source ARTIC R2 Argos Satellite Transceiver Shield is available for just $199.99 and includes everything needed to build a wildlife tracker or environmental monitoring system that communicates with the constellation.

(Source: SparkFun Electronics)

phases, the first of which included the Iridium satellite constellation. Iridium satellites transmit data at relatively high frequencies and therefore require smaller Rx and Tx antennas than other broadband technologies, which makes for a more practical tracking device.

But the Iridium solution ended up with power limitations that were prohibitive for an ear tag and resolving those made the device about 2x heavier than the specification laid out by the WWF. At that point the MistyWest team changed tactics and landed on the Argos satellite system.

withstand the extreme environmental conditions of the Arctic for extended periods.

It was decided that the most effective type of tracker for these bears would be an ear tag that included a location sensor, temperature sensors to correlate seasonal movements, and pressure sensors to calculate diving depth. Data from these sensors would be transmitted to satellites, then relayed to researchers who could view data from individual bears or entire sleuths. The tags had to release and fall off after about a year.

After the workshop, the WWF enlisted the help of MistyWest, a Canadian engineering design consultancy with a focus on UN Sustainable Development Goals.

MistyWest’s IoT design team, in partnership with WWF, IDEO, the U.S. Fish & Wildlife Service, and others, then started developing a satellite-based geolocation system to track polar bears.

Design Secrets for Optimizing Animal Trackers The project started with several different tag iterations during its initial design www.embeddedcomputing.com

The Argos satellite system was created in the late 1970s as a collaboration between the French Space Agency (CNES), NASA, and the National Oceanic and Atmospheric Administration (NOAA). Argos’ original purpose was to collect and relay meteorological and oceanographic data for scientific use, but now it also receives transmissions from more than 8,000 animal tracking devices every day.

The CLS Group formed in the 1980s to oversee the Argos satellite system, and they continue that work today. However, Thomas Gray, a user services analyst at CLS Group subsidiary the Woods Hole Group, says that working with the Argos satellite system has historically been very difficult because it required users to source parts, design, and manufacture their own Argos transmitter boards.

“Typically, that process of developing your own transmitter board in-house is measured in years and hundreds of thousands of dollars,” he said, adding that an overall expense around half a million dollars was nowhere near out of the ordinary.

But the challenges of Argos transmitter development didn’t fall on deaf ears.

In 2013-2014, CLS Group partnered with AnSem to produce very small Argos-based RF chips that could be integrated into a transmitter design. A few years later in 2017, the Woods Hole Group started working on an open-source Argos transmitter that finally made it to market in 2019. Now available on SparkFun Electronics for $199.99, it includes the bill of materials, PCB layout files, and all required software and firmware (Figure 1).

MistyWest began work on the WWF polar bear tracker prior to the availability of the open-source Argos transmitter, but by then their work had revealed key design insights such as the optimal type, size, and placement of the antenna, ways to optimize and extend the tag’s battery life, and more. They were also able to gain valuable knowledge from the CLS Group on Argos satellite telemetry and communications as the two organizations worked in parallel on their respective projects.

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INDUSTRY 4.0 IN ACTION

“There is actually a lot of great data provided by CLS where we were able to get things like predictive satellite algorithms,” explains Kevin Lockwood, CTO of MistyWest.

“We could know, based on where the bear was and the time of day, which satellites would be overhead or how many satellites would be overhead. So we could make sure that any of our transmissions would be assured to hit the satellite.”

The MistyWest-designed Argos tags filter captured temperature, pressure, and timestamped actigraphy data on a Bluetooth Low Energy-enabled (BLE-enabled) microcontroller from Nordic Semiconductor, which also allows “people installing these on bears to configure them for field deployment,” Lockwood says.

Sensor data is transmitted from the tracker to the Argos satellite constellation using a ceramic chip antenna and the 400-466 MHz AnSem R2 transceiver radio mentioned previously. Successfully implementing this RF subsystem, in which the antenna resides inside the tag, was a significant design accomplishment for MistyWest and its partners, as it reduced the system’s footprint and made it more robust (Figure 2).

“The lower frequency your radio transmission, the longer your antenna needs to be, so some devices have an 18-centimeter antenna sticking out, which obviously makes it quite vulnerable to breakage,” Lockwood explains.

The AnSem R2 transceiver radios dictate that the trackers operate in an Argos II configuration, which means they transmit data to satellites but don’t receive an acknowledgement back. As a result, tags often repeatedly transmit the same message anywhere between 45-90 times per week to maximize the chances of successfully reaching an Argos satellite.

Depending on this transmission volume, the tag’s battery life ranges from between 4-6 months to up to a year. Lockwood notes this is a potential area of improvement.

“Extrapolating that over the year, the result of all these redundant transmissions to make sure we hit the satellite is a lot more power consumption than if we had this two-way communication.”

Perpetual Improvement: Do it for the Bears The tags designed by MistyWest are currently being tested on polar bears in captivity at zoos so researchers can familiarize themselves with the technology and learn how to view and interpret the data it generates. The goal is to place them on bears in the wild later this year.

But that doesn’t mean the work is done. MistyWest and its partners hope to continue improving the polar bear tracker with the addition of an AnSem R3 chip that would enable message received acknowledgements from Argos satellites. This could potentially eliminate hundreds of outbound message transmissions and, ultimately, reduce power consumption, extend each tag’s service life, increase the amount of captured data, and lower overall project costs.

Other improvements to the system include plans to integrate machine learning that would characterize polar bear activity and behavior more accurately. According to Lockwood, the system would then “be able to detect a lot more and then have to transmit less data over the satellite systems so that you can increase your battery life,” along with being able to discard irrelevant information or filtering transmissions for certain data types.

WWF confirms that the organization and its partners “are working to catalyze development of new technology that will make polar bear research more cost effective, less invasive, and deliver more useful data.” Hopefully continued efforts will help optimize the limited resources available for projects like this and deliver better tracking of polar bears fighting to survive in the wild.

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Embedded Computing Design EMBEDDED WORLD | Spring 2022

The Argos tracking tag MistyWest designed swaps an external antenna for an on-board ceramic chip antenna to minimize damage or breakage when deployed on polar bears in the wild.

(Image Source: MistyWest)

FIGURE 2

› Donate to the World Wildlife Fund: www.worldwildlife.org/pages/ ways-to-support-wwf › To learn more about this and other MistyWest design accomplishments, visit www.mistywest.com › To learn more about WWF’s polar bear tracking efforts, visit https://www.arcticwwf.org/wildlife/ polar-bear/polar-bear-tracker/ › To learn more about the Argos satellite system and how CLS Group and Wood Hole Group facilitate the technology, go to www.clsamerica. com/science-with-argos › To purchase or learn more about the open-source Argos transmitter board, go to www.sparkfun.com/ products/17236 › For more on AnSem’s ARTIC Argos radio transceivers, visit www.ansem.com/success-stories/ 400mhz-satellite-transceiver-fortracking-wildlife › For CLS Group’s inventory of ­ Argos-compatible products, visit www.cls-telemetry.com/argossolutions/argos-products Taryn Engmark is an Assistant Editor at Embedded Computing Design.

She graduated from Arizona State University with her BA in Journalism and Mass Communication. Before working at ECD, she was a digital editor for the ASU’s student-led newspaper, The State Press. Taryn’s responsibilities at ECD include editing and posting news, press releases, and guest blogs in addition to interviewing sources and contributing original content for the website. Taryn also regularly contributes to the Embedded Daily Newsletter, the Embedded Insiders podcast, and ECD print. www.embeddedcomputing.com

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EXECUTIVE SPEAKOUT

Reconfigurable Hardware is Key to System Longevity

By Steve Douglass, Head of R&D, Lattice Semiconductor

What changes have you seen in the embedded space over the past few years?

The rapid expansion of global technology trends that extend across markets, like IoT, AI, and Automation, have tremendously accelerated the adoption of embedded technology. The increasing interconnectedness of our devices, the shift in virtually all applications toward more power-efficient processing, and the integration of more intelligence across a range of devices, has made us reassess our system design flow, as well as our overall design mindset.

Reconfigurable hardware is also very useful for efficiently building product families with varying feature sets. For example, a single system can be configured into multiple product configurations to help minimize inventory levels and optimize manufacturing flows. In general, reconfigurability and programmability help designers “future proof” their systems by paving a path for hardware upgrades throughout the life of the product. Fixed hardware, in comparison, would need to be physically replaced each time an update is required – consuming time and creating financial expenses and e-waste.

That is to say the landscape is quickly changing. The explosive growth of AI applications across domains, the worldwide shift towards autonomous driving and factory automation, among other megatrends, all require a level of flexibility in system design that challenge engineers to think differently about their designs, and even the lifecycle of their end-products. Today’s systems need connectivity to both local networks and the cloud, robust system security throughout every stage of the product lifecycle, and to be capable of intelligent, real-time decision making. All of this in conjunction with the ability to adapt and perform optimally as requirements continue to evolve.

The benefits of programmable hardware are clear, but what is Lattice doing to mitigate some of the challenges that come with integrating FPGAs? In the last few years, Lattice has refocused on FPGA innovation in the small and mid-range market where many of our competitors have pulled away. We’ve revamped our product roadmap and overall portfolio, and software is a big part of that innovation. We offer an array of tools to make it easy for customers to adopt and integrate our technology. Our software portfolio ranges from developmental tools to application-specific solution stacks, which are pre-engineered solutions that our customers can use to get products to market faster.

Given these changes, what is a key takeaway for engineers feeling the brut of these challenges?

The key to system longevity for those tasked with designing nowadays is adaptability. Adaptive systems are incredibly valuable today because as devices evolve, so must their underlying technology. Engineers today need to consider the rapid pace of product and technology evolution beginning from the design phase so they are enabled to build systems that can be easily updated post-deployment and ensure their designs remain relevant and the speed of innovation continues to increase.

That is why reconfigurable hardware plays such a crucial role in the market today, because it provides the flexibility to update system hardware that is already in the field, making systems adaptable to emerging technologies. This is extremely beneficial for designers, especially as architecture and algorithms continue to rapidly evolve.

With regard to our software tools, our primary goal is to simplify the design process and maximize productivity for the developers. We even offer a Software Development Kit and graphicbased System Builder for easy creation of embedded hardware design. At the end of the day, we want our customers to know that when they choose Lattice, they have all of the support needed to bring their designs to life quickly and easily, with hardware that gives them an added competitive advantage.

Lattice Semiconductor www.latticesemi.com

INDUSTRY 4.0 IN ACTION

Success Story: How Electric Vehicles Can Give Back to the Grid

By Taryn Engmark, Assistant Editor

I used to think electric vehicles (EVs) were invented recently in response to the global outcry to reduce carbon emissions. So, you can imagine my surprise when I learned EVs have been in and out of popularity since the late 19th century but didn’t stick until the 21st century mostly because fossil fuels were just so available.

B

ut the EV revolution, spearheaded by the likes of Tesla and the Toyota Prius, not only made these vehicles popular (especially in the U.S.), but also revealed an utter lack of charging infrastructure. And now many countries have instituted policies requiring all vehicle sales be electric by 2030.

Assuming there are enough charging stations available by then to accommodate all the EVs on the road (a big assumption, I know), will the electric grid be robust enough to accommodate them too? Or, with so many people worldwide needing to charge their vehicles daily, are we in for regular apocalypse-class blackouts from power grid overload?

“The problem with that is if we all transition to EVs we’ll be putting a huge load onto the grid,” explains Dunstan Power, Director of ByteSnap Design, an electronics engineering consultancy headquartered in the U.K. “There’s this concept of what they call vehicle-to-grid (V2G), which is where in­stead of the energy going into the vehicle, energy’s coming out of the vehicle,” he continues. “That energy coming out of the vehicle can either be used to reduce the power a building it’s connected to is drawing from the grid, or it could even be used to put energy all the way back into the grid itself.”

V2G technology is also probably older than you think. In 2018, ByteSnap Design, Nortech Management, Grid Edge, and

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Aston University formed the V2G Consortium, an industry-academia partnership funded by the U.K.’s Office for Low Emission Vehicles (OLEV) and the Department for Business Energy and Industrial Strategy (BEIS).

Their work focused on the design, development, and testing of an EV discharge platform under the VehIcle-to-Grid Intelligent controL (VIGIL) Project. The resulting VIGIL platform intelligently monitors the energy distribution network for demand constraints and communicates that information to bi-directional charge points that can efficiently manage and regulate EV battery charging and discharging.

Before you get concerned about some future municipality commandeering your car for its stored power, in practice EVs would not be required to participate in V2G discharging activities and could elect whether and how much energy they export back to the grid.

And they (well, their owners) would likely be compensated for the energy they share.

When Vehicles Talk Back Although it’s a vehicle to grid solution, VIGIL actually doesn’t have any components onboard the EVs themselves. Rather, it’s composed of three core components: an active network management (ANM) system, V2G/building controller, and smart charge point controller. › ANM – Nortech Management delivered the ANM scheme that allows VIGIL to monitor the voltage levels and available capacity of local substations connected to the grid. › V2G/Building Controller – Provided by Grid Edge, the V2G/Building Controller allows the platform to control and optimize all the distributed energy assets connected to a VIGIL network. It ensures the service conditions of transformers as well as VIGIL platform components are maintained. › Charge Point Controller – ByteSnap contributed a charge point communications controller that transmits messages using version 2.0 of the Open Charge Alliance’s Open Charge Point Protocol (OCPP). Called MantaRay, the OCPP adapter instructs charge points when and how much to charge or discharge an EV’s battery and communicates with energy management systems for localized power load balancing (Figure 1).

The OCPP protocol is an interesting thread that ties all this infrastructure together, as it can talk to the cloud or local building energy management systems to provide low-latency control. In addition to carrying diagnostics and metering data, it’s used to authorize vehicles to charge at specific charging stations and can facilitate payment between charge point operators and EV owners.

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understand and vice versa, effectively allowing the VIGIL platform to interoperate with any V2G charger.

During the trial period, the testers recorded conversion efficiencies of around 90 percent in either direction, which is on par with today’s high-efficiency EV chargers. And, importantly, there wasn’t any recordable impact on battery health or performance.

FIGURE 1

The MantaRay embedded controller from ByteSnap Design/Versinetic acts as an OCPP converter that makes any charge point interoperable with the VIGIL platform.

“The ANM system sends a signal to the V2G controller saying, ‘This is the headroom available for you to optimize charging or discharging,’” says Preye Ivry, network innovation engineer at Nortech Management Ltd. “The V2G controller takes that signal and sends it to the OCPP adapter, and that accepts the signal and passes it on to the charge point itself to then act.

“The V2G charge point now speaks another language with the vehicle. And in our case, it was CHAdeMO, which is a DC protocol,” Preye went on. “The cable that connects from the charge point to the electric vehicle accepts commands and control signals from the charge point.”

These building blocks delivered all the functionality necessary for the VIGIL Project to support AC/DC and DC/DC V2G power conversion using standard IGBTs and MOSFETs. The VIGIL (Auto)Pilot From 2018 to 2020, the VIGIL pilot tested four vehicles, three of which were Nissan Leafs – one of the few vehicles that supports V2G. They were leased from Electric Zoo who, of course, was informed of their intended use prior to leasing. The VIGIL team also put its money where its mouth is by using Dunstan’s car during the tests.

Three EV charge points equipped with ByteSnap’s MantaRay embedded OCPP adapter were installed on the Aston University campus. The primary VIGIL user interface was hosted in Nortech’s cloud-based iHost data management platform.

The pilot consisted of three test cases that, at any time, charged or discharged no more than 10 kW from EV batteries: › A bidirectional V2G setup where power flowed from charge point to vehicle and vehicle to charge point using IGBT or MOSFET inverters for DC/AC and AC/DC conversion. › A test setup that only discharged the EV battery to the charge point. › A standard, unidirectional power flow from charger to vehicle that used rectifiers for AC/DC conversion. This served as the pilot’s control test.

Today’s EVs use both AC (for the motor) and DC (stored and dispensed by the battery), which explains all the conversion activity happening at the charge point. Whenever the Grid Edge V2G/Building Controller determined more energy was required by the grid or an adjacent building, the VIGIL platform’s ANM system sent a message to the charge point(s) over OCPP. Once received, the MantaRay board embedded within the charge points would translate VIGIL OCPP messages into control messages the charge point could www.embeddedcomputing.com

Waiting for the Automotive World to Catch Up Members of the V2G consortium have experienced individual successes and setbacks on the other side of the VIGIL pilot program. Grid Edge has gone on to deploy its controllers in shopping malls, HVAC environments, and EV settings as a means of monitoring and optimizing energy demand and delivery. Nortech, on the other hand, is seeking additional funding for further testing of their ANM scheme.

ByteSnap launched a business out of its participation in the VIGIL pilot called Versinetic.

As a greater percentage of the world’s energy comes from renewable sources, members of the V2G Consortium also anticipate increased interest in the technology to help offset the inconsistent generation of power sources like wind or solar. Beyond the V2G Consortium, there are other early-stage projects focused on developing V2G capabilities within vehicles themselves.

However, the biggest gains will come from widespread adoption of the technology by automakers and their suppliers.

Preye noted the limited availability of V2G-enabled charge points, which meant the pilot had to use chargers from a single manufacturer, possibly skewing test results.

“It’s got a lot of potential to solve problems, not only around the use of EVs loading the grid but to solve issues around the lumpiness of renewable energy generation,” Dunstan points out.

“The main challenge is getting the auto makers on board to actually enable V2G in their cars.”

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Embedded Computing Design

2022 EMBEDDED WORLD The 2022 Embedded Computing Design embedded world issue showcases embedded tools and solutions for those designing in the areas of industrial control, edge computing, autonomous machines, and more.

EMBEDDED SOFTWARE, OSS, & TOOLS

EMBEDDED PROCESSING: X86

Real-Time Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Abaco Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

CYBERSECURITY

INDUSTRIAL AUTOMATION & CONTROL

BG Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

EDGE AI & MACHINE LEARNING SECO USA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

EMBEDDED HARDWARE congatec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 embeddedTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36-38 Infineon Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

EMBEDDED HARDWARE: PICMG COM-HPC

PEAK-System Technik GmbH . . . . . . . . . . . . . . . . . . . 40-42

IOT 1nce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Techvision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

PC/104 & SMALL FORM FACTORS Rigel Engineering LLC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 RTD Embedded Technologies, Inc. . . . . . . . . . . . . . . . 45-46

congatec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Embedded Software, OSs, & Tools

REAL-TIME Hypervisor The Real-Time Systems Hypervisor splits the hardware into individual partitions containing one or more processor cores, some memory and PCI devices. Different partitions may run different operating systems or multiple instances of the same OS. Two different OS Execution Modes that may run on different processor cores in parallel: • With the Privileged Mode you have direct hardware access, therefore, no added latencies and additional (latency-free and hardware-assisted) protection, which is configurable like Virtual MMU, restricted I/O, IOMMU. • With the Virtualized Mode you have pass-through access to assigned devices, you can run unmodified operating systems and update them at any time. or processor cores running GPOS’s like Windows or standard Linux distributions.

The RTS Hypervisor sits in-between the hardware and the OS to ensure proper isolation. In terms of device sharing like mass storage disk partitions, USB ports, even behind USB hubs. You have complete isolation of OS in memory, no interdependence, reboot of any system is possible at any time and it is definable in the boot sequence.

Real-Time Systems GmbH

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BGN-SAT Security Automation Tool

FEATURES

BGN-SAT Security Automation Tool helps engineers quickly improve security, reduce development time, and take advantage of insilicon security features in their embedded designs. An intuitive GUI-based software tool, BGN-SAT is used to define a security profile aligned to your cybersecurity needs and automatically implement a customized solution for your IoT device.

Leveraging embedded processor in-silicon security features, BGN-SAT makes it easy and quick to securely implement: • Authentication: Ensure only your code is run and prevent code injection or modification by creating a hardware root of trust and securely booting your embedded processor.

Ą Ą Ą Ą Ą Ą

• Encryption: Protect your IP and private data from being stolen while at rest or in motion.

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• Unique security for each device at the time of manufacturing: With one click, BGN-SAT automatically generates and securely stores per-device keys, signs and encrypts firmware, programs the device, and secures processor interfaces to quickly provision each device during manufacturing.

BGN-SAT Security Automation Tool takes the learning curve and uncertainty out of deploying embedded security to your IoT device. It improves developer efficiency in deploying security, eliminates guesswork, and removes the impact of cybersecurity on your product’s time to market.

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Ą Ą Ą

Delivers secure, encrypted code without complex cybersecurity coding Reduces development time with an easy-to-use GUI interface Leverages in-silicon processor cybersecurity functions to increase speed and efficiency Implements authenticated and encrypted boot for a RTOS or U-boot and Linux kernel Generates public and private keys for RSA digital signatures with key lengths up to 4096 bits Generates AES keys up to 256 bits for code and data encryption Downloads secure binaries to flash via a range of interface options Easily transfers security profiles from design to manufacturing with one click key generation, device programming, and port locking during manufacturing Supports a growing range of security-enabled Arm processors as well as FPGA platforms BGN-SAT GUI-based tool supports both Windows and Linux environments Also offers a command-line control interface for flexible integration of BGN-SAT into your development and production environments

Available today for NXP Semiconductor i.MX 8M and i.MX 6 processors. Please contact BG Networks for other processor and FPGA platforms supported.

https://bgnet.works/security-automation-tools-overview/security-automation-tool/

BG Networks

www.bgnetworks.net www.embeddedcomputing.com





info@bgnetworks.net  888-787-8708 www.linkedin.com/company/bgnetworks

 @BGNetworksIOT

Embedded Computing Design EMBEDDED WORLD | Spring 2022

33

Embedded Computing Design

Cybersecurity

Embedded Computing Design

Edge AI & Machine Learning

SECO Intelligence and Electronic Solutions With 40+ years of expertise in edge computing design, system assembly, custom packaged product, and IoT software platforms, SECO enables its customers with full end-to-end solutions, from edge device hardware to fully integrated products with Artificial Intelligence (AI) that transforms business operations.

Edge computing SECO provides a broad array of cutting-edge embedded computing building blocks through worldwide engineering design, manufacturing, and technical support excellence.

Off-the-shelf computer-on-module (COM) and single board computer (SBC) products feature leading processing technologies (NXP, Intel®, Xilinx, AMD) compliant with major standards (SMARC, QSeven®, COM-HPC®, COM Express®, Pico-ITX, eNuc). The ORION COM-HPC® Client Module Size A is enabled by 12th Gen Intel® Core™ (formerly Alder Lake – H series) processors, delivering outstanding graphics performance for automation and AI at the edge.

The COM Express® OPHELIA, based on AMD Ryzen™ Embedded V2000 SoC, merges high performance with compactness for graphic and compute demanding edge applications. The Qseven® ATLAS SOM and the ICARUS Pico-ITX SBC leverage the Intel® Atom™ X6000E series (formerly Elkhart Lake) in AIoT applications.

Modular HMIs, rugged tablets, boxed PCs, communication gateways, and payment systems, complete SECO’s portfolio of off-the-shelf edge platforms. SECO also offers custom design and integration of electronic devices, built for reliability and robustness.

FEATURES Ą

Ą

Ą

Ą

Ą

Ą

Ą Ą

Off-the-shelf embedded products: SOMs, SBCs, HMI devices and gateways compliant with widely used standards that reduce time to market.

Operating systems for edge devices: Linux, Android, Windows, and RTOS such as VxWorks modified to match edge device hardware Customized computing platforms: custom-designed circuitry, software, and enclosures to meet unique product requirements Clea: software suite solution that integrates AI, IoT, cloud computing, and big data analysis for easy deployment and facilitates efficient operations Embedded AI: algorithms that autonomously analyze and optimize operation on the edge device without cloud connectivity Product development: design and production of rugged high reliability electronic devices, including rugged tablets, medical devices, and industrial equipment World-class electronics manufacturing: ISO 9001 and 13485 certified US-based engineering and operations for direct support of North America clients

Intelligent Platform Solutions SECO edge computing solutions are enabled with intelligence via Clea – an AI/IoT software suite that easily connects edge electronic devices to the cloud and facilitates real time device monitoring, analytics, infrastructure management, predictive maintenance, secure remote software updates, data orchestration, and more. AI can run autonomously on the edge device or in conjunction with cloud computing services. Clea facilitates business growth by optimizing efficiency, strengthening productivity, and minimizing maintenance time and cost. SECO is the leader in offering edge, IoT, and AI technologies as an all-in-one solution. https://www.seco.com

SECO

www.seco.com

34

 sales.us@seco.com  +1-240-558-2014 www.linkedin.com/company/seco-spa/



Embedded Computing Design EMBEDDED WORLD | Spring 2022

www.embeddedcomputing.com

What industrial IoT applications need today is a combination of high-performance low-power processor technology, robust real-time operation, real-time connectivity, and real-time hypervisor technologies. Featuring the very latest Intel Atom, Celeron, and Pentium processors (aka Elkhart Lake), congatec boards and modules offer more power for low-power applications in every aspect.

Target markets include automation and control – from distributed process controls in smart energy networks and the process industry to smart robotics, or even PLC and CNC controls for discrete manufacturing. Other real-time markets are found in test and measurement technology and transportation applications, such as train and track systems or autonomous vehicles, all of which also benefit from the extended temperature options.

The new low-power processor generation is also a perfect fit for graphics-intensive applications such as edge-connected POS, kiosk and digital signage systems, or distributed gaming and lottery terminals.

FEATURES Ą Intel Atom x6000E Series processors, Intel Celeron and Pentium N & J Series

processors (code named “Elkhart Lake”)

Ą Intel® UHD Graphics (Gen11) for up to 3x 4k @ 60fps and 10-bit color depth Ą Extended temperature range from -40°C to +85°C is supported Ą Time Sensitive Networking (TSN), Intel Time Coordinated Computing (Intel

TCC) and Real Time Systems (RTS) hypervisor support

Ą Up to 4.267 MT/s Memory Support with Inband ECC Ą UFS 2.0 for higher bandwidth and data processing

congatec

www.congatec.us



sales-us@congatec.com

 www.linkedin.com/company/congatec

 858-457-2600 twitter.com/congatecAG



Embedded Hardware

congatec i.MX 8M Plus Starter Set congatec extends its i.MX 8 ecosystem with a new starter set for AI accelerated intelligent embedded vision applications. Based on a SMARC Computer-onModule with i.MX 8M Plus processor, the starter set’s sweet spot is the utilization of the new processor integrated NXP Neural Processing Unit (NPU). Delivering up to 2.3 TOPS of performance for deep learning based artificial intelligence, it can run inference engines and libraries such as Arm Neural Network (NN) and TensorFlow Lite. It also integrates seamlessly with Basler embedded vision software to give OEMs an application ready solution platform for the development of nextgeneration AI accelerated embedded vision systems.

Typical applications are wide ranging, from price sensitive automated checkout terminals in retail to building safety, and from in-vehicle vision for navigation to surveillance systems in busses. Industrial use cases include HMIs with vision based user identification and gesture based machine operation as well as vision supported robotics and industrial quality inspection systems.

congatec

www.congatec.us www.embeddedcomputing.com



sales-us@congatec.com

FEATURES Ą 4 powerful Arm Cortex®-A53 cores, 1x Arm Cortex®-M72

controller and the NXP NPU to accelerate deep learning algorithms at the edge and comes with passive cooling. Ą 3.5 inch carrier board conga-SMC1/SMARC-ARM directly connects the 13 MP Basler dart daA4200-30mci BCON for MIPI camera with an F1.8 f4mm lens via MIPI CSI-2.0 without any additional converter modules. Next to MIPI CSI-2.0, USB and GigE vision cameras are also supported. Ą On the software side, congatec provides a bootable SD card with preconfigured boot loader, Yocto OS image, matching BSPs, and processor-optimized Basler embedded vision software enabling immediate AI inference training on the basis of captured images and video sequences.

 www.linkedin.com/company/congatec

 858-457-2600 twitter.com/congatecAG



Embedded Computing Design EMBEDDED WORLD | Spring 2022

35

Embedded Computing Design

Embedded Hardware

More edge computing power

Embedded Computing Design

Embedded Hardware: PICMG COM-HPC

New design options on COM-HPC and COM Express The first COM-HPC Client size A module and a next generation COM Express Compact Computer-on-Module provides engineers the choice to further scale the performance of their existing systems or develop the next generation of products utilizing COM-HPC’s broader array of interfaces. OEMs will benefit from the substantial performance improvements as well as communication enhancements that the new modules based on 11th Gen Intel® Core™ processors deliver to the highend computing sector. Typical applications can be found in many high-end solutions, from embedded systems and edge computing nodes to network hubs, and local fog data centers to core network appliances, as well as ruggedized central cloud data centers for critical government applications.

FEATURES Ą conga-HPC/cTLU COM-HPC Client Size A module and conga-TC570 COM Express

Compact module will be available with new scalable 11th Gen Intel Core processors.

Ą Both modules are the first to support PCIe x4 in Gen 4 performance to connect

Ą Ą Ą Ą

congatec



peripherals with massive bandwidth. In addition, designers can leverage 8x PCIe Gen 3.0 x1 lanes.

COM-HPC module offers latest 2x USB 4.0, 2x USB 3.2 Gen 2, and 8x USB 2.0, the COM Express module offers 4x USB 3.2 Gen 2 and 8x USB 2.0.

COM-HPC modules offer 2x 2.5 GbE for networking, whereas COM Express modules execute 1x GbE, with both supporting TSN. Sound is provided via I2S and SoundWire in the COM-HPC version, and HDA in the COM Express modules.

Comprehensive board support packages are provided for all leading RTOS’s, including hypervisor support from Real-Time Systems as well as Linux, Windows and Chrome.

sales-us@congatec.com

 www.linkedin.com/company/congatec

www.congatec.us

 858-457-2600 twitter.com/congatecAG



Embedded Hardware

TS-4100 The TS-4100 is an extremely low-power, high-performance System-onModule powered by NXP i.MX 6UltraLite with the Arm® Cortex®-A7 core operating up to 696 MHz. Typical power usage is about 1 W, packed with up to 1 GB RAM, 4 GB eMMC flash, 32 bit programmable off-load engine, microSD with UHS support (up to 60 MB/s), Wi-Fi and Bluetooth module with built-in antenna, and many industry-standard interfaces. It targets applications with strict power requirements, yet needs a highperformance system with wireless connectivity, like industrial internet of things gateways, medical, automotive, industrial automation, smart energy, and many more.

The TS-4100 is embeddedTS's first SoM module that can also be a standalone micro Single Board Computer. When powered from the onboard micro USB connector, the TS-4100 does not require a baseboard to operate. The system could be a processing node on a Wi-Fi or Bluetooth network, or with the optional daughter card expansion connector, it could interact with other devices directly.

FEATURES Ą Arm® Cortex®-A7 based NXP i.MX 6 UltraLite Ą 1 W Typical Power Usage Ą 4 GB MLC eMMC Ą Up to 1 GB RAM Ą FPGA includes integrated ZPU Ą CPU can access ZPU memory Ą 802.11b/g/n and Bluetooth LE

https://www.embeddedts.com/products/ts-4100

embeddedTS

www.embeddedTS.com

36



sales@embeddedTS.com

 480-837-5200

 www.linkedin.com/company/embeddedts

Embedded Computing Design EMBEDDED WORLD | Spring 2022

 @embedded_TS www.embeddedcomputing.com

TS-7100-Z embeddedTS is proud to introduce the TS-7100-Z, our smallest single board computer in an optional DIN-mountable enclosure that measures 2.4" by 3.6" by 1.7", powered by the Arm® Cortex®-A7 based iMX6 UltraLite CPU. It ships with industry-standard interfaces, including Ethernet, USB, RS-232, RS-485, and CAN. For wireless connectivity, the TS-7100-Z comes with WiFi and Bluetooth module, as well as a NimbeLink/Digi cellular modem and mesh network socket.

With all of these features packed into a smaller foot print, not only will the TS-7100-Z fit in your cabinet, but it can also help to replace other peripherals and modules to free up even more space and get more done.

Combining all of these components into one small DIN mounted unit, we provide the ability to promote hot swapping in the field, limiting costly technician time and troubleshooting.

FEATURES Ą NXP i.MX 6UltraLite 696 MHz Arm® Cortex®-A7 based SPC

with FPU

Ą 512 MB RAM Ą 4 GB eMMC Flash Storage Ą 2 KB FRAM Storage Ą 3" 18-bit, 320x240, 135dpi Resistive Touchscreen Display Ą Dual Ethernet, WiFi, Bluetooth, NimbeLink/Digi socket Ą Industrial Temperature Range (-40 °C to 85 °C)

https://www.embeddedts.com/products/ts-7100-Z

embeddedTS

www.embeddedTS.com



sales@embeddedTS.com

 480-837-5200

 www.linkedin.com/company/embeddedts

 @embedded_TS Embedded Hardware

TS-7680 The TS-7680 is an embedded computer powered by a 454 MHz Arm®based CPU that offers a great balance between industrial features, such as a 24-position rugged screw terminal connector and 3 Amp relays, and high-end capabilities, such as Wi-Fi and Bluetooth 4.0 Low Energy.

The TS-7680 offers low power and low cost at industrial grade, including industrial temperature operation and a rugged enclosure with a DIN mount. Power input allows 8 – 40 VDC as well as 10 – 28 VAC, making this product also suitable for the HVAC and building automation and control systems industry.

Additional features include 2x 10/100 Ethernet ports, 1x micro SD socket, 4 GB eMMC Flash, 2x USB Host, 2x CAN ports, 2x RS-485, high precision, battery-backed RTC, 30 V tolerant DIO, analog I/O, BACnet, and more. The TS-7680 also offers a sub-watt low power operation mode as well as sleep mode for even lower power consumption. The TS-7680 ships with Linux 3.14.28 and Debian Jessie running out of the box on the onboard flash storage.

FEATURES Ą 454 MHz Arm®-based CPU Ą 4 GB MLC eMMC Ą Wi-Fi 802.11b/g/n and Bluetooth 2.1+EDR (4.0 BLE) Ą BACnet protocol support Ą 24-position rugged screw terminal connector Ą Rugged, Industrial Environment Ready with Fanless -40° C to

+85° C Range

Ą 2x USB Host, 2x CAN ports, 2x RS-485 and more

https://www.embeddedts.com/products/ts-7680

embeddedTS

www.embeddedTS.com www.embeddedcomputing.com



sales@embeddedTS.com

 480-837-5200

 www.linkedin.com/company/embeddedts

 @embedded_TS

Embedded Computing Design EMBEDDED WORLD | Spring 2022

37

Embedded Computing Design

Embedded Hardware

Embedded Computing Design

Embedded Hardware

TS-7800-V2 Powered by the Marvell Armada 385 Dual Core 1.3 GHz Arm® Cortex®-A9based CPU, the TS-7800-V2 industrial Single Board Computer (SBC) stands out from the crowd with its high-performance components, connectivity options, and an unbelievable feature set packaged into a small footprint in both size and power. It’s a general-purpose, low-power SBC ready to tackle demanding applications including data acquisition, IoT, industrial automation, and anything in between.

A productive out-of-the-box experience includes pre-installed Linux OS, development tools, and utilities for controlling PC104 peripheral boards, DIO, CAN bus, a variety of serial interfaces and bringing in data from the analog ports, or monitoring the system temperature. The development kit makes sure you have all the necessary connections and cables to get off the ground quickly. The guaranteed 10+ year lifecycle ensures a longterm deployment in the field, free from expensive replacements that come from short, disposable lifecycles which are all too common.

FEATURES Ą Marvell Armada 385 Dual Core 1.3 GHz Arm-based CPU Ą 1 GB RAM Ą 4 GB eMMC Flash Ą 20k LUT Cyclone FPGA (145 Various I/O Pins) Ą SuperSpeed USB 3.0 host, Gigabit Ethernet, RS-232 serial ports,

and more

Ą 6x PWM Channels Ą Industrial temperature range of -40 °C to 85 °C

https://www.embeddedts.com/products/ts-7800-V2

embeddedTS

www.embeddedTS.com



sales@embeddedTS.com

 480-837-5200

 www.linkedin.com/company/embeddedts

 @embedded_TS Embedded Hardware

OPTIGA™ TPM SLB 9672 Ready-to-use TPM with SPI interface and PQC-protected firmware update mechanism OPTIGA™ TPM SLB 9672 is the latest member of Infineon’s OPTIGA™ TPM family. The standardized, out-of-the-box TPM provides a solid foundation for securely establishing the identity and software status of PCs, servers, and connected devices, and for protecting the integrity and confidentiality of data at rest and in transit.

OPTIGA™ TPM SLB 9672 is future-proof – it comes with extended memory and stronger cryptographic algorithms, and is the first TPM in the market that offers a PQC-protected firmware update mechanism using XMSS signatures. Integrated resiliency features allow the TPM firmware to be recovered in compliance with the NIST SP 800-193 Platform Firmware Resiliency Guidelines. This, combined with improved computational performance, takes system security to the next level.

OPTIGA TPM SLB 9672 offers various tools to support design activities and simplify integration. Natively supported by Microsoft Windows and the major Linux distributions and derivatives, OPTIGA™ TPM SLB 9672 is a ready-to-use security building block, available in a wide range of modules with different temperature ranges and features to fit individual needs and use cases. It is ideal to support computing platforms and embedded systems use cases that call for robust security. ™

FEATURES Ą PQC-protected firmware update mechanism using Ą Ą Ą Ą Ą

Ą

XMSS signatures High-end standardized security controller Support for latest specifications of TCG TPM 2.0 standard (revision 1.59) TCG, CC and FIPS certifications Windows HLK certification Support for various cryptographic algorithms: up to RSA-4096, AES-128, AES-256, ECC NIST P256, ECC BN256, ECC NIST P384, SHA-1, SHA2-256, SHA2-384 Extended non-volatile memory (51 kB)

https://www.infineon.com/OPTIGA-TPM-SLB9672

Infineon Technologies www.infineon.com

38

 @Infineon  www.linkedin.com/company/infineon-technologies/

Embedded Computing Design EMBEDDED WORLD | Spring 2022

www.embeddedcomputing.com

Introducing the first 100GbE SOSA™-aligned HPCs SBC3612D 3U VPX and HPC2812 6U VPX 100GbE SOSA-aligned HPCs

FEATURES Ą

Take your next system to unprecedented levels of performance with Abaco’s two new embedded supercomputers with 100 Gigabit Ethernet (GbE). Featuring the brand-new Intel® Xeon® D-2700 processor, these boards are the highest performing SOSA™-aligned, Intel-based computers you can get.

The 3U SBC3612D delivers a SOSA-aligned 3U VPX computeintensive plug-in-card (PIC) with a 16-core Xeon D CPU, 100Gbit Ethernet with RDMA data plane and PCIe Gen4 expansion plane.

The 6U HPC2812 provides a SOSA-aligned 6U VPX multiprocessor PIC with dual (20 cores per node) Xeon D CPUs, per node 100Gbit Ethernet with RDMA data plane and dual PCIe Gen4 expansion plane (P2 and P5) and 128GB memory per node.

Discover how these one-of-a-kind supercomputers will raise the bar for your entire system, delivering the highest performance you can get to conquer your most demanding applications.

Single slot VPX high-performance computers with 100 Gigabit Ethernet

Ą

Aligned to the SOSA Standard

Ą

Intel Xeon D-2700 with AVX-512 (Dual nodes on HPC2812)

Ą Ą

Four channels of soldered DDR4 SDRAM with ECC, 128GB in total, per node (HPC2812) Two channels of soldered DDR4 SDRAM with ECC up to 64GB (SBC3612D)

Ą

480GB NAND Flash (NVMe) (HPC2812 per node)

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2x 40G/100G data plane with RDMA per node (HPC2812)

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Xilinx® Zynq® security capable FPGA

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100GbE data planes include RDMA (RoCEv2 / iWARP)

Ą Ą

32 lanes (16 lanes per node) of PCIe Gen4 (dual expansion planes) (HPC2812) x8 or x16 PCIe Gen4 expansion plane (SBC3612D)

APPLICATIONS: • Aerospace • Commercial • Defense • Industrial • Infrastructure • Transportation

Learn more at abaco.com/sbc3612d-hpc2812

http://abaco.com/sbc3612d-hpc2812

Abaco Systems / AMETEK www.abaco.com

www.embeddedcomputing.com

 866-OK-ABACO www.facebook.com/AbacoSystems/ @AbacoSys www.linkedin.com/company/abaco-systems-embedded-solutions/







Embedded Computing Design EMBEDDED WORLD | Spring 2022

39

Embedded Computing Design

Embedded Processing: x86

Embedded Computing Design

Industrial Automation & Control

PCAN-PC/104 FEATURES:

Ą Form factor PC/104

Ą Multiple PC/104 cards can be operated in parallel (interrupt sharing) Ą 14 port and 8 interrupt addresses are available for configuration

using jumpers

Ą 1 or 2 High-speed CAN channels (ISO 11898-2) Ą Bit rates from 5 kbit/s up to 1 Mbit/s

Ą Compliant with CAN specifications 2.0A (11-bit ID) and 2.0B Ą Ą Ą Ą Ą Ą

(29-bit ID) Connection to CAN bus through D-Sub slot bracket, 9-pin (in accordance with CiA® 303-1) NXP SJA1000 CAN controller, 16 MHz clock frequency NXP PCA82C251 CAN transceiver 5-Volt supply to the CAN connection can be connected through a solder jumper, e.g., for external bus converter Optionally available with galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel Extended operating temperature range from -40 to 85 °C (-40 to 185 °F)

PEAK-System Technik GmbH

www.peak-system.com/quick/PC104-1



CAN Interface for PC/104 The PCAN-PC/104 card enables the connection of one or two CAN networks to a PC/104 system. Multiple PCAN-PC/104 cards can easily be operated using interrupt sharing.

The card is available as a single or dual-channel version. The opto-decoupled versions also guarantee galvanic isolation of up to 500 Volts between the PC and the CAN sides.

The package is also supplied with the CAN monitor PCAN-View for Windows and the programming interface PCAN-Basic.

info@peak-system.com

 www.linkedin.com/company/peak-system

 +49 (0) 6151-8173-20

 @PEAK_System

Industrial Automation & Control

PCAN-PC/104-Plus FEATURES: Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą

Form factor PC/104 Use of the 120-pin connection for the PCI bus Up to four cards can be used in one system 1 or 2 High-speed CAN channels (ISO 11898-2) Bit rates from 5 kbit/s up to 1 Mbit/s Compliant with CAN specifications 2.0A (11-bit ID) and 2.0B (29-bit ID) Connection to CAN bus through D-Sub slot bracket, 9-pin (in accordance with CiA® 303-1) NXP SJA1000 CAN controller, 16 MHz clock frequency NXP PCA82C251 CAN transceiver 5-Volt supply to the CAN connection can be connected through a solder jumper, e.g., for external bus converter Extended operating temperature range from -40 to 85 °C (-40 to 185 °F) Optionally available with galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel PC/104-ISA stack-through connector

PEAK-System Technik GmbH

www.peak-system.com/quick/PC104-2

40



CAN Interface for PC/104-Plus The PCAN-PC/104-Plus card enables the connection of one or two CAN networks to a PC/104-Plus system. Up to four cards can be operated, with each piggy-backing off the next. The CAN bus is connected using a 9-pin D-Sub plug on the slot bracket supplied.

The card is available as a single or dual-channel version. The opto-decoupled versions also guarantee galvanic isolation of up to 500 Volts between the PC and the CAN sides.

The package is also supplied with the CAN monitor PCAN-View for Windows and the programming interface PCAN-Basic.

info@peak-system.com

 www.linkedin.com/company/peak-system

Embedded Computing Design EMBEDDED WORLD | Spring 2022

 +49 (0) 6151-8173-20

 @PEAK_System

www.embeddedcomputing.com

PCAN-PC/104-Plus Quad FEATURES: Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą

Form factor PC/104 Use of the 120-pin connection for the PCI bus Up to four cards can be used in one system 4 High-speed CAN channels (ISO 11898-2) Bit rates from 5 kbit/s up to 1 Mbit/s Compliant with CAN specifications 2.0A (11-bit ID) and 2.0B (29-bit ID) Connection to CAN bus through D-Sub slot brackets, 9-pin (in accordance with CiA® 303-1) FPGA implementation of the CAN controller (SJA1000 compatible) NXP PCA82C251 CAN transceiver Galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel 5-Volt supply to the CAN connection can be connected through a solder jumper, e.g., for external bus converter Extended operating temperature range from -40 to 85 °C (-40 to 185 °F) Optionally available: PC/104-ISA stack-through connector

PEAK-System Technik GmbH

www.peak-system.com/quick/PC104-3



Four-Channel CAN Interface for PC/104-Plus The PCAN-PC/104-Plus Quad card enables the connection of four CAN networks to a PC/104-Plus system. Up to four cards can be operated, with each piggy-backing off the next.

The CAN bus is connected using a 9-pin D-Sub plug on the slot brackets supplied. There is galvanic isolation of up to 500 Volts between the computer and CAN sides.

The package is also supplied with the CAN monitor PCAN-View for Windows and the programming interface PCAN-Basic.

info@peak-system.com

 www.linkedin.com/company/peak-system

 +49 (0) 6151-8173-20

 @PEAK_System

Industrial Automation & Control

PCAN-PCI/104-Express FEATURES: Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą

PCI/104-Express card, 1 lane (x1) Form factor PC/104 Up to four cards can be used in one system 1 or 2 High-speed CAN channels (ISO 11898-2) Bit rates from 5 kbit/s up to 1 Mbit/s Compliant with CAN specifications 2.0A (11-bit ID) and 2.0B (29-bit ID) Connection to CAN bus through D-Sub slot bracket, 9-pin (in accordance with CiA® 303-1) FPGA implementation of the CAN controller (SJA1000 compatible) NXP PCA82C251 CAN transceiver Galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel Supplied only via the 5 V line 5-Volt supply to the CAN connection can be connected through a solder jumper, e.g., for external bus converter Extended operating temperature range from -40 to 85 °C (-40 to 185 °F) Optionally available: PCI-104 stack-through connector

PEAK-System Technik GmbH

www.peak-system.com/quick/PC104-4 www.embeddedcomputing.com



CAN Interface for PCI/104-Express The PCAN-PCI/104-Express card enables the connection of one or two CAN buses to a PCI/104-Express system. Up to four cards can be stacked together. The CAN bus is connected using a 9-pin D-Sub plug on the slot brackets supplied. There is galvanic isolation of up to 500 Volts between the computer and CAN sides.

The package is also supplied with the CAN monitor PCAN-View for Windows and the programming interface PCAN-Basic.

info@peak-system.com

 www.linkedin.com/company/peak-system

 +49 (0) 6151-8173-20

 @PEAK_System

Embedded Computing Design EMBEDDED WORLD | Spring 2022

41

Embedded Computing Design

Industrial Automation & Control

Embedded Computing Design

Industrial Automation & Control

PCAN-PCI/104-Express FD FEATURES: Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą Ą

PCI/104-Express card, 1 lane (x1) Form factor PC/104 Up to four cards can be used in one system 1, 2, or 4 High-speed CAN channels (ISO 11898-2) Complies with CAN specifications 2.0 A/B and FD (ISO and Non-ISO) CAN FD bit rates for the data field (64 bytes max.) from 20 kbit/s up to 12 Mbit/s CAN bit rates from 20 kbit/s up to 1 Mbit/s Connection to CAN bus through D-Sub slot bracket, 9-pin (in accordance with CiA® 303-1) FPGA implementation of the CAN FD controller Microchip CAN transceiver MCP2558FD Galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel CAN termination and 5-Volt supply to the CAN connection can be activated through a solder jumper Extended operating temperature range from -40 to 85 °C (-40 to 185 °F) Optionally available: PCI-104 stack-through connector

PEAK-System Technik GmbH



CAN FD Interface for PCI/104-Express

The PCAN-PCI/104-Express FD allows the connection of PCI/104Express systems to CAN and CAN FD buses. Up to four cards can be stacked together. The CAN bus is connected via 9-pin D-Sub connectors to the supplied slot brackets. There is a galvanic isolation between the computer and the CAN side up to 500 Volts. The card is available as a single, dual, or four-channel version.

The monitor software PCAN-View and the programming interface PCAN-Basic are included in the scope of supply and support the new standard CAN FD.

info@peak-system.com

 +49 (0) 6151-8173-20

 www.linkedin.com/company/peak-system

www.peak-system.com/quick/PC104-5

 @PEAK_System

PC/104 & Small Form Factors

PC5005 Rigel’s PC5005 Dual 10GbE card addresses the next generation highspeed connectivity and network security requirements for PCIe/104 and PCI/104-Express systems. The PC5005 provides exceptional small packet performance, advanced network security and reliability while the low-power adapter’s TDP is only 8W (typical).

The PC5005 features Intel’s next generation 10GbE controller XL710. The XL710 interfaces to the host processor through a single x8 lane PCI Express generation 3 port. The XL710 controller is capable of auto-negotiating down to x4 or x1 PCIe lanes.

The XL710 employs the latest in Intel’s Virtualization Technology for Connectivity (VT-c) such as On-Chip QoS and Traffic Management, Flexible Port Partitioning, Virtual Machine Device Queues (VMDq) and PCI-SIG* SR-IOV Capable.

Contact our experienced engineering team to learn more about the PC5005.

FEATURES Ą Dual 10GbE ports on a PCIe/104 or PCI/104 Express platform Ą Configured as a single x8 PCIe Generation 3 Port (8 GT/s) Ą Power-driven by Intel’s XL710 Ethernet Controller Ą Stack up or stack down flexibility Ą 10GbE ports support SFP+ transceivers Ą Supports Jumbo Frames (9728 bytes) Ą Air-Cooled and Rugged, Conduction-Cooled available

https://www.rigel-eng.com

Rigel Engineering, LLC



sales@rigel-eng.com

 321-473-6999

www.rigel-eng.com

42

Embedded Computing Design EMBEDDED WORLD | Spring 2022

www.embeddedcomputing.com

IoT connectivity and software for a global, lifetime flat rate 1NCE is the only provider of connectivity and software for IoT at a global flat rate – offering fast, secure, and reliable cellular connectivity and software services in more than 110 countries worldwide. Our mission is to deliver true cross-border, future-proof IoT connectivity and software services without uncertainty over the lifetime of the device.

For only 10 US$/EUR for 10 years, customers can deploy, connect, and manage IoT sensors across the globe. The 1NCE IoT Flat Rate is simple: 500 MB of data and 250 SMS, for as little as a Dollar/Euro per year per device. This makes IoT applications affordable and scalable for smart utilities, asset tracking, vehicle telematics and more.

More than just connectivity 1NCE offers a unique set of ready-to-use and adaptable software tools that solve typical challenges every IoT developer is confronted with, such as: • Device Authentication: The SIM card itself is being used as a secure element for authentication and unique device identification.

1NCE, in partnership with operators like Deutsche Telekom, provides unrivaled global IoT connectivity and software services in more than 110 countries, with plans to reach more than 140 by the end of 2022. We support all radio standards (2G, 3G, 4G/LTE-M and NB-IoT).

Start 1NCE today Order the 1NCE IoT Flat Rate at shop.1nce.com or test 1NCE free for 12 months exclusively at the AWS Marketplace.

More than 8,500 customers worldwide already trust 1NCE with more than 10 million connections.

FEATURES Ą Ą Ą Ą Ą Ą

• IoT-to-Cloud Connection: 1NCE significantly reduces the complexity of reliably connecting IoT devices to customer cloud systems by translating protocols (UDP, CoAP or LwM2M) into AWS IoT Core or Webhooks.

Ą Ą Ą

IoT connectivity via 2G/3G/4G/LTE-M/NB-IoT SIM card included Coverage in 110+ countries and regions One-off payment of 10 US$/EUR for 10 years 500 MB and 250 SMS included Connectivity Management Platform Free access to all APIs Plug & Play Software Tools Software Development Kit

• Device Inspection: Easy access of current and past device states and telemetry data allow easy monitoring and support for devices in the field.

• Energy Saving: Optimize payload transmission and remarkably increase the runtime of battery powered devices.

Focused on IT challenges 1NCE’s global platform is built on a lean, virtualized and cloud-based core network, with a streamlined and fully automated business support system. All components and features have been developed with a clear focus on reducing IT complexity, while also increasing usability and scalability. https://www.1nce.com

1NCE

www.1nce.com www.embeddedcomputing.com



sales@1nce.com

 www.linkedin.com/company/1nce/

 @ https://twitter.com/1NCE_IoT

Embedded Computing Design EMBEDDED WORLD | Spring 2022

43

Embedded Computing Design

IoT

Embedded Computing Design

IoT

Edge Computing & AIoT Solutions Provided by Techvision Techvision, a leading IDH & ODM of Rockchip solutions, is one of the very first solution providers who offer RK3588 based products in edge computing, video codecs, smart large screen devices and other industries.

Powerful network communication capabilities, with integrated dual Gigabit Ethernet, it can also support various connectivities of WiFi5 or WiFi6 with Bluetooth, 5G or 4G LTE and so on, satisfying various network communication requirements and reduce network delay.

The new release single board computer developed by Techvision is based on Rockchip RK3588, which is an octa-cores 64-bit CPU with maximum frequency up to 2.4GHz. It adopts the 8nm LP process and integrates an ARM Mali-G610 MP4 quad-core GPU. With the built-in AI accelerator NPU, it can provide 6Tops computing power and support mainstream deep learning frameworks.

Techvision provides full Rockchip product line (including RK3288/ RK3399/RK3568/RK3588 CPU) of SOM module and single board that can be used in various scenarios including intelligent retail, intelligent energy, intelligent industry, intelligent security, intelligent campus and etc. We provide technical support on both hardware and software (including Android and Linux SDK).

It has a much better performance in various AI application scenarios and can support the edge computing very well, which enables faster and more comprehensive data analysis, creating the opportunity for deeper insights, faster response and improved user experience compared to the cloud-computing.

It supports 8K@60fps H.265/VP9 video decoding & 8K@30fps H.265/H.264 video encoding and can do the encoding and decoding at the same time, which can achieve up to 32 channels of 1080P@30fps decoding and 16 channels of 1080P@30fps encoding. The powerful video encoding and decoding capabilities enable 8K high-definition images to be presented, which can easily meet the requirements of the video conferencing application, multi-channels encoding and decoding.

FEATURES Ą RK3588/ARM Cortex Quad-core A76 + Quad-core A55,

up to 2.4GHz

Ą Memory LPDDR4 8GB, Up to 32GB Ą NPU 6TOPS computing power Ą 8K video codec capability Ą Multi-channel display output, asynchronous displays,

supports the maximum display resolution Ą Support Android12 and Debian11 OS Ą Wide temperature range chip optional

It has HDMI 2.1/eDP1.3/VBO/LVDS multichannels video output and HDMI_RX2.0, MIPI-CSI video input interface and supports 8K video output and 4K video input. It can also realize the requirements of the asynchronous displays & extended displays. With the integrated 48MP ISP with HDR&3DNR, it supports dual MIPI-CSI camera input. This is the ideal choice for smart large screen and multiscreen extended display applications.

http://www.techvision.com.cn/pro.aspx?nid=3

Techvision Intelligent Technology Co., Ltd

www.techvision.com.cn

44



sales@techvision.com.cn

 +86-755-26907241

 www.linkedin.com/company/techvision-intelligent-technology-limited/  @Techvision_SZ

Embedded Computing Design EMBEDDED WORLD | Spring 2022

www.embeddedcomputing.com

Intel® Xeon High-Performance SBC The CMX34KB is an advanced PC/104 single board computer with a PCIe/104 stackable bus structure. As a part of RTD’s PCI Express offering, this CPU based on Intel’s 7th generation Xeon processor (formerly codenamed Kaby Lake) is exceptionally suited for intelligent systems requiring high performance in harsh thermal conditions. TPM 2.0 (Trusted Platform Module) included for hardware-based cryptography. The surface-mount Type 2 PCI Express connectors enable users to stack multiple peripheral modules above and below the CPU. The 60GB onboard industrial grade flash drive makes this CPU Windows 10 ready.

FEATURES Ą PCIe/104 stackable bus structure Ą Available in modular, rugged enclosures Ą Intel Xeon E3-1500 Series Processors Ą 4 Cores, 8 Threads, and up to 4.0 GHz max turbo frequency Ą 16GB Dual-Channel DDR4 SDAM (surface-mounted) Ą 60GB standard surface-mounted industrial-grade SATA flash drive Ą 5 added SATA Ports, 4 PCIe x4 Links, 8 PCIe x1 Links, Dual GigE, 4 Serial Ports,

5 USB 3.0 Ports, 2 USB 2.0 Ports, DisplayPort 1.2 with Audio, Advanced Digital I/O, TPM 2.0 Encryption. https://www.rtd.com/PC104/CM/CMX34KB/CMX34KB.htm

RTD Embedded Technologies, Inc. www.rtd.com



sales@rtd.com

 814-234-8087

 www.linkedin.com/company/rtdembedded PC/104 & Small Form Factors

Dual 10 Gbit/s Twisted Pair Ethernet Controller The LAN24550 and LAN34550 are dual 10 Gbit/s Copper Ethernet Modules. They provide two independent IEEE 10GBASE-T Ethernet connections using a single Ethernet controller chip. This board runs completely off of the PCI-Express bus, utilizing Intel’s X550 10 Gigabit Ethernet controller.

The X550-AT2 Ethernet controller is a second-generation 10GBASE-T controller with integrated MAC and PHY. It provides backward compatibility with existing 1000BASE-T, simplifying the migration to 10 GbE, and provides iSCSI, FCoE, virtualization, and Flexible Port Partitioning (FPP).

Users will find this product useful for applications such as server virtualization and centralized environments requiring shared workflow such as large CAD and software projects.

FEATURES Ą PCIe x4 Gen3 Interface Ą PCIe/104 and PCI/104-Express stackable bus structures Ą Available in modular, rugged enclosures Ą Intel X550 10 Gigabit Ethernet Controller Ą 2 Independent 10 Gb/s Twisted Pair Ethernet Connections with

Integrated MAC and PHY Ą RJ45 connectors with integrated magnetics and Link/Activity indicator LEDs Ą 10/1 GbE data rate per port: support for vision systems, network and server virtualization, and LAN and SAN flexibility https://www.rtd.com/PC104/UM/network/LANx4550.htm

RTD Embedded Technologies, Inc. www.rtd.com

www.embeddedcomputing.com



sales@rtd.com

 814-234-8087

 www.linkedin.com/company/rtdembedded Embedded Computing Design EMBEDDED WORLD | Spring 2022

45

Embedded Computing Design

PC/104 & Small Form Factors

Embedded Computing Design

PC/104 & Small Form Factors

PC104 NVIDIA Jetson Xavier NX The supercomputing performance of the NVIDIA Jetson Xavier NX meets the modular, stackable versatility of PC104 in this rugged solution. RTD has brought the Jetson Xavier NX to PC104 – the industry-proven, stackable small form factor. With a comprehensive set of on-board I/O and a PCIe/104 expansion bus, users can quickly prototype and deploy complete embedded systems using verified, off-the-shelf modules.

FEATURES Ą 21 TOPS AI Performance Ą 384-core NVIDIA Volta™ GPU with 48 Tensor Cores Ą 6-core NVIDIA Carmel ARM®v8.2 64-bit CPU, 6MB L2 + 4MB L3 Ą Stackable PCIe/104 Type 2 Bus Connector (down-stacking) Ą I/O connections including DisplayPort, 2 MIPI CSI-2 Video Inputs,

One Gigabit Ethernet, 2 USB 3.1 Type A, One Serial Port, One Serial Port or CAN Bus, 14 GPIO, M.2 E-key 3030 Socket (Wi-Fi, BT, NFC, GPS, GNSS, LoRa, NB-IoT), M.2 B-key 3042 Socket (WWAN/SSD), MicroSIM Card Socket, MicroSD Card Socket, Utility Port Ą Rugged packaging available https://www.rtd.com/nvidia/

RTD Embedded Technologies, Inc. www.rtd.com



sales@rtd.com

 814-234-8087

 www.linkedin.com/company/rtdembedded PC/104 & Small Form Factors

RTD Off-the-Shelf Mission Computer RTD’s standard HiDANplus® embedded computer system provides a robust Commercial-Off-the-Shelf (COTS) solution enabling rapid uptime for mission-critical applications. The system includes a rugged single board computer, power supply, mSATA card carrier, and room for an additional peripheral module. Without increasing the enclosure size, functional upgrades can include high-performance data acquisition, versatile networking options, or enhanced capabilities from a variety of special-purpose add-in modules. Additional configuration options include a removable SATA drawer. The milled aluminum enclosure with advanced heat sinking delivers passivelycooled performance from -40 to +85°C. Integrated tongue-andgroove architecture with EMI gaskets create a watertight solution with excellent environmental isolation. Keyed cylindrical connectors offer easy cable connections while maintaining the integrity of the environmental seal.

FEATURES Ą -40 to +85°C standard operating temperature Ą Designed for high ingress protection in harsh environments Ą Milled aluminum enclosure with integrated heat sinks and heat fins Ą Rugged Intel and AMD-based Single Board Computers Ą High-performance, synchronized power supply Ą mSATA card carrier and optional 2.5" removable drive Ą Designed to include an additional PCIe/104, PCI/104-Express or

PCI-104 peripheral module without increasing overall enclosure size https://rtdstacknet.com/iot

RTD Embedded Technologies, Inc. www.rtd.com

46



sales@rtd.com

 814-234-8087

 www.linkedin.com/company/rtdembedded

Embedded Computing Design EMBEDDED WORLD | Spring 2022

www.embeddedcomputing.com

NEW DATE 21–23.6.2022

Reunited in Nuremberg!

Join the embedded community! embedded-world.com/tickets Media partners

IIoT devices run longer on Tadiran batteries.

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LIFE

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