Xcell Journal issue 81

Page 22

X P E RT S C O R N E R

Testing and Debugging Zynq SoC Designs with BFMs by Martin Hofherr Design Engineer Missing Link Electronics martin.hofherr@missinglinkelectronics.com Endric Schubert Co-founder Missing Link Electronics endric.schubert@missinglinkelectronics.com

AXI bus functional models make it easy to verify Zynq-7000 All Programmable SoC components and subsystems. Here’s how to do it, with a step-by-step example based on the Xilinx tool chain.

22

Xcell Journal

Fourth Quarter 2012


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