Xcell Journal issue 87

Page 27

XCELLENCE IN INDUSTRIAL

sine and cosine signals have the same phase as the original excitation signal; only their amplitudes are modulated by sine and cosine as the shaft rotates. In the second method, a stator winding is excited with the alternating signals, which are in phase quadrature to each other. Then a voltage induces in the rotor winding. The winding’s amplitude and frequency are fixed, but its phase shift varies with the shaft angle. The resolver can be positioned where the angle needs to be measured [2]. The electronics, generally a resolver-to-digital converter (RDC), can be positioned where the digital output needs to be measured. Analog output from the resolver, which contains the angular position information of the shaft, is then transformed in digital form using the RDC. FUNCTIONALITY OF THE TYPICAL RDC In general, the two outputs of a resolver are applied to the sine and cosine multiplier of the RDC [3]. These multipliers incorporate sine and cosine lookup tables and function as multiplying digital-to-analog converters. Figure 2 shows their functionality. Let us assume, in the beginning, that the current state of the up/down counter is a digital number representing a trial

RH

angle, ψ. The converter seeks to adjust the digital angle, ψ, continuously to become equal to and track θ, the analog angle being measured. The stator output voltage of the resolver is: V1= V sinωt sinθ V2= V sinωt cosθ

where θ is the angle of the resolver’s rotor. The digital angle ψ is applied to the cosine multiplier and its cosine is multiplied by V1 to produce the term: V sinωt sinθ cosψ.

V sinωt cosθ sinψ.

(V sinωt sinθcosψ – V sinωt cosθ sinψ)

Eq. 5

V sinωt (sinθ cosψ- cosθ sinψ)

Eq. 6

From trigonometric identity, this reduces to: V sinωt [sin (θ -ψ)]

R

CONTROL TRANSFORMER

-5 V (-4.2 V typical)

C1

ERROR R1

DEMODULATOR

GAIN B

HYSTERESIS

14/16 BIT UP/DOWN COUNTER

DC/DC CONVERTER

47 µf external capacitor

BIT DETECTOR

“S” OPTION SYNTHESIZED REFERENCE

+5 V

FILTER

Eq. 7

BIT

A

+5 V

Eq. 4

These two signals are subtracted from each other by the error amplifier to yield an ac error signal of the form:

RL

LOS

INPUT OPTION

Eq. 3

The digital angle ψ is also applied to the sine multiplier and multiplied by V2 to produce the term:

REFERENCE CONDITIONER

S1 S2 S3 S4

Eq. 1 Eq. 2

INTEGRATOR

VEL

E

VCO & TIMING

DATA LATCHES 8

EM DATA

8

EL

INH

A

B

Figure 3 – SD-14620 block diagram (one channel) Second Quarter 2014

Xcell Journal

27


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