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Benchmark: Vivado’s ESL Capabilities Speed IP Design on Zynq SoC by Syed Zahid Ahmed, PhD Senior Researcher CNRS-ENSEA-UCP ETIS Lab, Paris syed-zahid.ahmed@cifre.org Sébastien Fuhrmann, MSc R&D Engineer CNRS-ENSEA-UCP ETIS Lab (now at Elsys Design), Paris se.fuhrmann@gmail.com Bertrand Granado, PhD Full Professor CNRS-ENSEA-UCP ETIS Lab and UPMC LIP6 Lab, Paris bertrand.granado@lip6.fr

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Xcell Journal

Third Quarter 2013


Xcell Journal issue 84