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Instruments offers the TMS320C6455 DSP processor with Serial RapidIO, while the Freescale MPC8641 includes both PCI Express and Serial RapidIO interfaces. These native interfaces simplify carrier board design and significantly boost peripheral I/O transfer rates by taking advantage of XMC modules. VITA 42.5 defines the popular Xilinx Aurora protocol for use in XMC. This lightweight link-layer protocol is quite attractive for XMC modules because many XMCs only need to move data from a dedicated source, such as an A/D converter, to a dedicated destination, such as memory on a processor board. The extra protocol layers necessary to support a full switched network and routing can significantly reduce the payload data rate and add complexity and cost at both ends of the link. This standard is still in the definition phase. Most of the pins on P15 are reserved for serial links, power and other functions, but P16 has a wealth of user-defined pins now being addressed by the VITA 42.10 General Purpose I/O draft specification. It offers a standardized way of implementing interfaces for popular system I/O including Ethernet, USB ports, RS-232, RS-485, Serial ATA, Fibre Channel and Serial Attached SCSI (SAS). The clear benefit here is that by following these definitions, XMC and carrier board designers can achieve a much wider range of interoperability, the essential goal of industry standards.

FPGAs: The Vital Ingredient

In recent years, FPGAs have permeated mezzanine card architectures for reasons entirely incidental to XMC, yet today FPGAs represent the single most significant catalyst for XMC adoption. FPGAs offer a collection of resources ideally suited for peripheral I/O functions. FPGAs can be configured to implement numerous electrical interface standards as well as a variety of protocol engines. By the reconfiguration of its FPGA, not only can a single I/O product replace several legacy products, it can also be adapted to future standards and protocols. This forestalls product obsolescence, both at the board level and at the deployed system level. Another reason that FPGAs find their way onto mezzanine cards is their unmatched ability to implement real-time

signal processing and high-level local control. FPGAs deal effectively with the very high, front-end data rates for A/D and D/A converters, network interfaces, sensor arrays and high-speed data channels by mustering a troop of high-performance hardware resources, configured to match the specific task at hand. For more sophisticated front-end processing, most FPGAs now feature DSP engines with built-in hardware multipliers to tackle the toughest algorithms with CH A IN CH B IN

125 MHz 14bit A/D 125 MHz 14bit A/D


125 MHz 14bit A/D 125 MHz 14bit A/D

CLK A Clock & Sync Bus CH A OUT

Figure 3

500 MHz 16bit A/D

efficiently, often well beyond the scope of larger systems with more loosely coupled elements. With such widespread use of FPGAs on mezzanines, the emergence of built-in gigabit serial interfaces on these devices was a major windfall for XMC. During the last five years, both Xilinx and Altera have invested heavily in developing this technology, and have now produced three generations of FPGAs with gigabit serial interfaces. 256 MB SDRAM 256 MB SDRAM 256 MB SDRAM


Dual Timing Bus Gen

XC4VSX55 or XC4VLX100

320 MHz Interpolator & Up Converter

32 32 32 64

VIRTEX-4 FX FPGA XC4VFX60 or 100 Parallel Digital I/O & Gigabit Serial I/O PCI 2.2 Interface 64 bits/66 MHz



XMC Dual 4x Gigabit Serial 64 PCI Bus

Model 7142 XMC Module using Virtex-4 FPGA for Gigabit Serial Interface.

ease. Arrays of these engines can be deployed in parallel, completely surpassing the capabilities of general-purpose programmable RISC or DSP processors that must execute serial instructions. By performing these types of intensive protocol, formatting, decoding and DSP functions on the mezzanine, the workload for the processor on the carrier board can be significantly reduced. This may lead to fewer processors or fewer processor boards in the system, for considerable savings in system cost and size. With integrated microcontrollers, FPGAs can implement a complete system-on-a-chip. Executing a program coded into the FPGA or from external flash memory, these microcontrollers can perform complex processing tasks to implement real-time control functions for adaptive processing, signal classification, target identification and object recognition. Having intimate contact with the surrounding DSP hardware, FPGA microcontrollers can modify real-time operating parameters and modes very

Xilinx offers its RocketIO GTP transceivers on the latest Virtex-5 LXT family of devices with bit rates of up to 3.125 GHz. Altera offers its Stratix-II GX multigigabit transceivers with bit rates of up to 6.375 GHz. Both vendors support these physical interfaces with SERDES hardware engines that perform serial/parallel conversion so that data and clock are combined in the signaling on each differential pair over the external serial channel. Protocol engines for specific standards can be configured using FPGA logic so that FPGAs can adapt to different protocols as required. They interface to the SERDES and correctly process protocol-specific packets, header information, control functions, error detection and correction, and payload data format. This strategy makes FPGA-based XMC modules truly fabric-agnostic and allows a single hardware design to be deployed in several different fabric environments. The new Xilinx Virtex-5 LXT devices advance the technology even further by including a built-in PCI Express endMarch 2007


The magazine of record for the embedded computing  

Imagine the possibilities, now that Radstone is part of GE Fanuc Embedded Systems. 0 Digital Motion Controllers Provide Precise Motion i...

The magazine of record for the embedded computing  

Imagine the possibilities, now that Radstone is part of GE Fanuc Embedded Systems. 0 Digital Motion Controllers Provide Precise Motion i...