Industry Insider
February 2007
New StackableUSB Specification for I/O Expansion in Embedded Systems Micro/sys, Inc. has announced the release of the StackableUSB Specification, which defines a standard for stacking I/O boards onto a single board computer using the popular USB 2.0 interface. A single board computer, operating as a host, can communicate to multiple USB peripheral cards directly through mating USB 2.0 connectors resident on the CPU and I/O cards. Satisfying the growing demand for faster communication between I/O channels and CPUs in embedded applications, the StackableUSB format eliminates cables, reduces pin count, and requires a smaller connector footprint than traditional interconnect architectures. Securely bolting together to increase reliability and mobility in rugged or harsh environments, the StackableUSB format features a USB point-to-point architecture where connections are routed up a stack to the next peripheral in the stack. These features combine to make StackableUSB a platform with many advantages for embedded systems. Each StackableUSB connector supports up to eight USB peripheral devices in the stack without a hub. There are several features USB I/O supports that have not been available in the past when using traditional stacking architectures such as PC/104 and PC/104Plus. USB supports automatic enumeration that allows the host to detect devices plugged into the stack and to install the drivers necessary for the system to operate with minimal human intervention. USB also supports power management so that USB peripherals or devices can be placed in a low power mode to conserve power, The Micro/sys USB148 an issue that is paramount in embedded systems relying on bat- StackableUSB I/O board tery-backed power or environments where heat generation is of key with 48 lines of digital concern. USB 2.0 also offers increased data bandwidth to support I/O. The USB connector is at the lower left. today’s high-speed A/D, and DAC data rates. Inclusion of USB in most popular chipsets and many microcontrollers makes this an easy and inexpensive implementation compared to PCI and PCI Express I/O. USB also offers a range of speeds, from 480 Mbits at high speed, 12 Mbits at full speed, and 1.5 Mbits at low speed. This provides embedded system designers a road map into the future for increasing their system throughput as technology advances. Micro/sys, the industry originator of the StackableUSB specification, is opening up a market for USB I/O to move into embedded OEM applications. StackableUSB uses the same serial interconnect standard that is found on the common desktop or laptop PC, but on formfactors such as the popular 3.5” x 3.5” size computer board with a stackable connector. This specification is available at www.stackableusb.org and is published by Micro/sys, Inc.
Event Calendar 03/03-10/07
03/13-14/07
MVA Communications Ecosystem Conference San Diego, CA www.mvacec.com
IEEE Aerospace Conf. Big Sky, MT www.aeroconf.org
TechNet Tampa 2007 Tampa, FL www.afcea.org
03/06/07
03/20/07
03/01/07
Real-Time & Embedded Computing Conference Atlanta, GA www.rtecc.com/atlanta
Real-Time & Embedded Computing Conference Phoenix, AZ www.rtecc.com/phoenix
02/28-3/01/07
Real-Time & Embedded Computing Conference Huntsville, AL www.rtecc.com/huntsville
Intel Announces 45 nm Processor Technology— Smaller and Faster with Less Power
In what may be one of the biggest advancements in fundamental transistor design, Intel has announced it will use dramatically different transistor materials to build the hundreds of millions of 45 nanometer (nm) transistors inside the next generation of the company’s Core2 family of processors. Intel already has 45 nm CPUs inhouse—the first of at least fifteen 45 nm processor products in development. This new transistor technology is expected to allow Intel to continue increasing processor speeds while reducing the amount of electrical leakage from transistors that can hamper chip and PC design, size, power consumption, noise and costs. It also indicates that Moore’s Law should thrive well into the next decade. Intel says it is on track for 45 nm production in the second half of 2007. Compared to today’s 65 nm technology, Intel says its 45 nm technology will provide the following product benefits: • Approximately twice the transistor density • Approximately 30 percent reduction in transistorswitching power • Greater than 20 percent
03/22/07
04/17-19/07
Real-Time & Embedded Computing Conference Albuquerque, NM www.rtecc.com/albuquerque
NDIA Science&Engineering Technology Conference No. Charleston, SC www.ndia.org
04/01-05/07
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Embedded Systems Conf. San Jose, CA www.embedded.com
February 2007