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SYSTEM DEVELOPMENT

RF SIGNAL GENERATOR MODULE

SWITCH

RF DOWN CONVERTER MODULE

DIGITIZER MODULE

FPGA PROCESSOR MODULE

DISPLAY PROCESSOR POST PROCESSOR

SWITCH

SWITCH

SIGNAL CONDITIONING

RF SIGNAL INTERFACE

EMBEDDED CONTROLLER

ARBITRARY WAVEFORM GENERATOR MODULE

CONTROL PROCESSOR

Figure 2

SDSI block diagram for RF, microwave and wireless communications test and measurement.

However, bolting-on OM in the middle of Figure 2 contains a high-level block dia- or direct digitization of input RF signal(s). a program is more expensive and substan- gram of an SDSI for RF, Microwave and Once the signals are digitized, specific meatially less effective than if included from Wireless Comms stimulus, test and mea- surements are performed by DSP-based surement. or numeric processing techniques within program start, since a bolt-on approach The Embedded Controller (EC) pro- the FPGA for real-time measurements can rarely address the key elements that vides housekeeping, dominate the Life Cycle Cost (LCC). As a result, the Total Cost of Ownership (TCO) local and remote of ATE includes the rewrite and recertifica- control for the SDSI, as well as non-realtion of Test Program Sets (TPS), but also GPETE calibration, repair and other logis- time DSP functions, DSP post-processing tics expenses. A promising capability for fundamen- on FPGA output and tally addressing ATE OM issues that has display processing for emerged in recent years is Software De- the system and each Amazingly compact fined Synthetic Instrumentation (SDSI). “synthesized instruand designed to run Analogous to Software Defined Radio ment.” The EC also completely fanless, the Relio R2 is perfect for (SDRs) that synthesize “radio” function- hosts sequences TPS applications requiring alities, SDSI “synthesizes” measurement that are run locally high reliability, small capabilities or “instruments” via software on the SDSI. TPS are footprint, scalable processing, and long that runs on a common hardware plat- usually written in a product life cycle. form. SDSI provides a fundamental benefit high-level, mark-up Relio R2 systems offer: or scripting language in ATE OM because SDSI mitigates and • Intel Dual-Core i7, i3 or Atom Processor and typically include in some cases can eliminate the required • Dual Gigabit Ethernet • Optional 802.11 a/g/n Wireless Interface multiple instruments, change and recertification of TPS—which • 2 RS-232, 1 RS-485 and 4 USB Ports multiple measuredominates ATS TCO. SDSI can also greatly • Video and Audio Interfaces ments and, in many reduce the expense associated with GPETE • Versatile Mounting Options calibration and repair, which also is a pri- cases, multiple Unit Visit www.sealevel.com/cots044/r2 or scan the QR code. Under Test (UUT) mary contributor to ATS TCO. And since SDSI may also be modular and off-the- settings as well. shelf (MCSDSI), the modular replacement, For each TPS technology insertion, reduced logistics measurement, the sealevel.com • 864.843.4343 • sales@sealevel.com expenses and multi-source procurement EC configures signal advantages associated with modular, off- paths and uses either the-shelf products also accompany SDSI. RF down conversion April 2014 | COTS Journal

31

COTS Journal  

April 2014

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